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98693b73 NC |
1 | ; Infineon XC16X CPU description. -*- Scheme -*- |
2 | ; | |
aa820537 | 3 | ; Copyright 2006, 2007, 2009 Free Software Foundation, Inc. |
98693b73 NC |
4 | ; |
5 | ; Contributed by KPIT Cummins Infosystems Ltd.; developed under contract | |
6 | ; from Infineon Systems, GMBH , Germany. | |
7 | ; | |
8 | ; This file is part of the GNU Binutils. | |
9 | ; | |
10 | ; This program is free software; you can redistribute it and/or modify | |
11 | ; it under the terms of the GNU General Public License as published by | |
9b201bb5 | 12 | ; the Free Software Foundation; either version 3 of the License, or |
98693b73 NC |
13 | ; (at your option) any later version. |
14 | ; | |
15 | ; This program is distributed in the hope that it will be useful, | |
16 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | ; GNU General Public License for more details. | |
19 | ; | |
20 | ; You should have received a copy of the GNU General Public License | |
21 | ; along with this program; if not, write to the Free Software | |
22 | ; Foundation, 51 Franklin Street - Fifth Floor, Boston, MA | |
23 | ; 02110-1301, USA. | |
24 | ||
ab5f875d DE |
25 | (define-rtl-version 0 8) |
26 | ||
98693b73 NC |
27 | (include "simplify.inc") |
28 | ||
29 | ; define-arch appears first | |
30 | ||
31 | (define-arch | |
32 | (name xc16x) ; name of cpu family | |
33 | (comment "Infineon XC16X") | |
34 | (default-alignment aligned) | |
35 | (insn-lsb0? #t) | |
36 | (machs xc16x) | |
37 | (isas xc16x) | |
38 | ) | |
39 | ||
40 | ; Attributes. | |
41 | ; An attribute to describe which pipeline an insn runs in generally OS. | |
42 | (define-attr | |
43 | (for insn) | |
44 | (type enum) | |
45 | (name PIPE) | |
46 | (comment "parallel execution pipeline selection") | |
47 | (values NONE OS) | |
48 | ) | |
49 | ||
50 | ; Instruction set parameters. | |
51 | ||
52 | (define-isa | |
53 | (name xc16x) | |
54 | (default-insn-bitsize 32) | |
55 | (base-insn-bitsize 32) | |
56 | (default-insn-word-bitsize 16) | |
57 | (decode-assist (15 14 13 12)) | |
58 | ; The XC16X fetches 1 insn at a time. | |
59 | (liw-insns 1) | |
60 | (parallel-insns 1) | |
61 | ) | |
62 | ||
63 | ; Cpu family definitions. | |
64 | ||
65 | (define-cpu | |
66 | ; cpu names must be distinct from the architecture name and machine names. | |
67 | ; The "b" suffix stands for "base" and is the convention. | |
68 | ; The "f" suffix stands for "family" and is the convention. | |
69 | (name xc16xbf) | |
70 | (comment "Infineon XC16X base family") | |
71 | (endian little) | |
72 | (insn-chunk-bitsize 32) | |
73 | (word-bitsize 16) | |
74 | (parallel-insns 1) | |
75 | ) | |
76 | ||
77 | (define-mach | |
78 | (name xc16x) | |
79 | (comment "Infineon XC16X cpu") | |
80 | (cpu xc16xbf) | |
81 | ) | |
82 | ||
83 | ; Model descriptions. | |
84 | ||
85 | (define-model | |
86 | (name xc16x) (comment "XC16X") (attrs) | |
87 | (mach xc16x) | |
88 | ||
89 | (pipeline p-mem "" () ((prefetch) (fetch) (decode) (address) (memory) (execute) (writeback))) | |
90 | ||
91 | ; `state' is a list of variables for recording model state | |
92 | (state | |
93 | ; bit mask of h-gr registers, =1 means value being loaded from memory | |
94 | (h-gr UINT) | |
95 | ) | |
96 | ||
97 | (unit u-exec "Execution Unit" () | |
98 | 1 1 ; issue done | |
99 | () ; state | |
100 | ((dr INT -1) (sr INT -1)) ; inputs | |
101 | ((dr INT -1)) ; outputs | |
102 | () ; profile action (default) | |
103 | ) | |
104 | (unit u-cmp "Compare Unit" () | |
105 | 1 1 ; issue done | |
106 | () ; state | |
107 | ((src1 INT -1) (src2 INT -1)) ; inputs | |
108 | () ; outputs | |
109 | () ; profile action (default) | |
110 | ) | |
111 | (unit u-cti "Jump & Call Unit" () | |
112 | 1 1 ; issue done | |
113 | () ; state | |
114 | ((condbit) (sr INT -1)) ; inputs | |
115 | ((pc)) ; outputs | |
116 | () ; profile action (default) | |
117 | ) | |
118 | (unit u-mov "Data Movement Unit" () | |
119 | 1 1 ; issue done | |
120 | () ;state | |
121 | ((dr INT -1) (sr INT -1)) ; inputs | |
122 | ((dr INT -1)) ; output | |
123 | () ; profile action (default) | |
124 | ) | |
125 | ) | |
126 | ||
127 | ; Instruction fields. | |
128 | ; | |
129 | ; Attributes: | |
130 | ; PCREL-ADDR: pc relative value (for reloc and disassembly purposes) | |
131 | ; ABS-ADDR: absolute address (for reloc and disassembly purposes) | |
132 | ; RELOC: there is a relocation associated with this field (experiment) | |
133 | ||
134 | (define-attr | |
135 | (for ifield operand) | |
136 | (type boolean) | |
137 | (name RELOC) | |
138 | (comment "there is a reloc associated with this field (experiment)") | |
139 | ) | |
140 | ||
141 | (dnf f-op1 "op1" () 7 4) | |
142 | (dnf f-op2 "op2" () 3 4) | |
143 | (dnf f-condcode "condcode" () 7 4) ;condition code required in other jmps and calls | |
144 | (dnf f-icondcode "indrct condcode" () 15 4) ;condition code required in other jmpi and calli | |
145 | (dnf f-rcond "relative-cond" () 7 4) ;condition code required in JMPR | |
146 | (dnf f-qcond "qbit" () 7 4) ;used in enum of bset/bclear macro | |
147 | (dnf f-extccode "extended condcode" () 15 5) ;condition code required in other jmpa and calla | |
148 | (dnf f-r0 "r0" () 9 2) ;required where 2 bit register used(only R0-R3) | |
149 | (dnf f-r1 "r1" () 15 4) | |
150 | (dnf f-r2 "r2" () 11 4) | |
151 | (dnf f-r3 "r3" () 12 4) | |
152 | (dnf f-r4 "r4" () 11 4) | |
153 | (dnf f-uimm2 "uimm2" () 13 2) ;used for immediate data,eg in ADD,MOV insns | |
154 | (dnf f-uimm3 "uimm3" () 10 3) ;used for immediate data,eg in ADD,SUB insns | |
155 | (dnf f-uimm4 "uimm4" () 15 4) ;used for immediate data,eg in MOV insns | |
156 | (dnf f-uimm7 "uimm7" (PCREL-ADDR RELOC) 15 7) ;used in TRAP | |
157 | (dnf f-uimm8 "uimm8" () 23 8) ;used in immediate byte data,eg in ADDB,MOVB insns | |
158 | (dnf f-uimm16 "uimm16" () 31 16) ;used for immediate word data | |
159 | (dnf f-memory "memory" () 31 16) ; used for memory operands | |
160 | (dnf f-memgr8 "memory" () 31 16) ; memory location of gr | |
161 | (dnf f-rel8 "rel8" (PCREL-ADDR RELOC) 15 8) ;used in JMPR,CALLR | |
162 | (dnf f-relhi8 "relhi8" (PCREL-ADDR RELOC) 23 8) ;used in JB,JBC,JNB,JNBS | |
163 | (dnf f-reg8 "reg8" () 15 8) ;required where 8bit gp register used | |
164 | (dnf f-regmem8 "regmem8" () 15 8) ;required where 8bit register used | |
165 | (dnf f-regoff8 "regoff8" () 15 8) ;required for offset calc | |
166 | (dnf f-reghi8 "reghi8" () 23 8) ;required where 8bit register number used | |
167 | (dnf f-regb8 "regb8" () 15 8) ;required for byte registers RL0,RH0, till RL8,RH8 | |
168 | (dnf f-seg8 "seg8" () 15 8) ;used as segment number in JMPS,CALLS | |
169 | (dnf f-segnum8 "segnum8" () 23 8) ;used in EXTS,EXTSR | |
170 | (dnf f-mask8 "mask8" () 23 8) ;used as mask in BFLDH,BFLDL insns | |
171 | (dnf f-pagenum "page num" () 25 10);used in EXTP,EXTPR | |
172 | (dnf f-datahi8 "datahi8" () 31 8) ;used for filling with const data | |
173 | (dnf f-data8 "data8" () 23 8) ;used for filling with const data | |
174 | (dnf f-offset16 "address offset16" (ABS-ADDR RELOC) 31 16) ;used in JMPS,JMPA,CALLA,CALLS | |
175 | (dnf f-op-bit1 "gap of 1 bit" () 11 1) ;used for filling with const data | |
176 | (dnf f-op-bit2 "gap of 2 bits" () 11 2) ;used for filling with const data | |
177 | (dnf f-op-bit4 "gap of 4 bits" () 11 4) ;used for filling with const data | |
178 | (dnf f-op-bit3 "gap of 3 bits" () 10 3) ;used in CALLA, JMPA | |
179 | (dnf f-op-2bit "gap of 2 bits" () 10 2) ;used in CALLA | |
180 | (dnf f-op-bitone "gap of 1 bit " () 10 1) ;used in JMPA | |
181 | (dnf f-op-onebit "gap of 1 bit " () 9 1) ;used in JMPA | |
182 | (dnf f-op-1bit "gap of 1 bit " () 8 1) ;used in JMPA, CALLA | |
183 | (dnf f-op-lbit4 "gap of 4 bits" () 15 4) ;used for filling with const data | |
184 | (dnf f-op-lbit2 "gap of 2 bits" () 15 2) ;used for filling with const data | |
185 | (dnf f-op-bit8 "gap of 8 bits" () 31 8) ;used for filling with const data | |
186 | (dnf f-op-bit16 "gap of 16 bits" () 31 16) ;used for filling with const data | |
187 | (dnf f-qbit "qbit" () 7 4) ;used in bit field of bset/bclear | |
188 | (dnf f-qlobit "qlobit" () 31 4) ;used for filling with const data | |
189 | (dnf f-qhibit "qhibit" () 27 4) ;used for filling with const data | |
190 | (dnf f-qlobit2 "qlobit2" () 27 2) ;used for filling with const data | |
191 | (dnf f-pof "upof16" () 31 16) ; used for memory operands | |
192 | ||
193 | ; Enums. | |
194 | ; insn-op1: bits 0-3 | |
195 | (define-normal-insn-enum insn-op1 "insn format enums" () OP1_ f-op1 | |
196 | ("0" "1" "2" "3" "4" "5" "6" "7" | |
197 | "8" "9" "10" "11" "12" "13" "14" "15") | |
198 | ) | |
199 | ||
200 | ; insn-op2: bits 4-7 | |
201 | (define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2 | |
202 | ("0" "1" "2" "3" "4" "5" "6" "7" | |
203 | "8" "9" "10" "11" "12" "13" "14" "15") | |
204 | ) | |
205 | ||
206 | ;/*for bclr/bset*/ | |
207 | ; insn-rcond: bits 0-3 | |
208 | (define-normal-insn-enum insn-qcond "bit set/clear enums" () QBIT_ f-qcond | |
209 | (("0" 0) ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7) ("8" 8) ("9" 9) ("10" 10) | |
210 | ("11" 11) ("12" 12) ("13" 13) ("14" 14) ("15" 15)) | |
211 | ) | |
212 | ;/************/ | |
213 | ; insn-rcond: bits 0-3 | |
214 | (define-normal-insn-enum insn-rcond "relative jump condition code op2 enums" () COND_ f-rcond | |
215 | (("UC" 0) ("NET" 1) ("Z" 2) ("NE_NZ" 3) ("V" 4) ("NV" 5) ("N" 6) ("NN" 7) | |
216 | ("C" 8) ("NC" 9) ("SGT" 10) ("SLE" 11) ("SLT" 12) ("SGE" 13) ("UGT" 14) ("ULE" 15) | |
217 | ("EQ" 2) ("NE" 3) ("ULT" 8) ("UGE" 9)) | |
218 | ) | |
219 | ||
220 | ||
221 | ||
222 | ; Hardware pieces. | |
223 | ; These entries list the elements of the raw hardware. | |
224 | ; They're also used to provide tables and other elements of the assembly | |
225 | ; language. | |
226 | ||
227 | (dnh h-pc "program counter" (PC) (pc) () () ()) | |
228 | ||
229 | (define-keyword | |
230 | (name gr-names) | |
ab5f875d | 231 | (enum-prefix H-GR-) |
98693b73 NC |
232 | (values (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7) |
233 | (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)) | |
234 | ||
235 | ) | |
236 | (define-hardware | |
237 | (name h-gr) | |
238 | (comment "general registers") | |
239 | (attrs PROFILE CACHE-ADDR) | |
240 | (type register HI (16)) | |
241 | (indices extern-keyword gr-names) | |
242 | ) | |
243 | ||
ab5f875d DE |
244 | ;; HACK: Various semantics refer to h-cr. |
245 | ;; This is here to keep things working. | |
246 | (define-hardware | |
247 | (name h-cr) | |
248 | (comment "cr registers") | |
249 | (attrs PROFILE CACHE-ADDR) | |
250 | (type register HI (16)) | |
251 | (indices extern-keyword gr-names) | |
252 | ) | |
253 | ||
98693b73 NC |
254 | (define-keyword |
255 | (name ext-names) | |
ab5f875d | 256 | (enum-prefix H-EXT-) |
98693b73 NC |
257 | (values (0x1 0) (0x2 1) (0x3 2) (0x4 3) |
258 | ("1" 0) ("2" 1) ("3" 2) ("4" 3)) | |
259 | ||
260 | ) | |
261 | ||
262 | (define-hardware | |
263 | (name h-ext) | |
264 | (comment "ext values") | |
265 | (attrs PROFILE CACHE-ADDR) | |
266 | (type register HI (8)) | |
267 | (indices extern-keyword ext-names) | |
268 | ) | |
269 | ||
270 | (define-keyword | |
271 | (name psw-names) | |
ab5f875d | 272 | (enum-prefix H-PSW-) |
98693b73 NC |
273 | (values ("IEN" 136) ("r0.11" 240) ("r1.11" 241) ("r2.11" 242) ("r3.11" 243) ("r4.11" 244) |
274 | ("r5.11" 245) ("r6.11" 246) ("r7.11" 247) ("r8.11" 248) | |
275 | ("r9.11" 249) ("r10.11" 250) ("r11.11" 251) ("r12.11" 252) | |
276 | ("r13.11" 253) ("r14.11" 254) ("r15.11" 255)) | |
277 | ) | |
278 | ||
279 | (define-hardware | |
280 | (name h-psw) | |
281 | (comment "ext values") | |
282 | (attrs PROFILE CACHE-ADDR) | |
283 | (type register HI (1)) | |
284 | (indices extern-keyword psw-names) | |
285 | ) | |
286 | ||
287 | (define-keyword | |
288 | (name grb-names) | |
ab5f875d | 289 | (enum-prefix H-GRB-) |
98693b73 NC |
290 | (values (rl0 0) (rh0 1) (rl1 2) (rh1 3) (rl2 4) (rh2 5) (rl3 6) (rh3 7) |
291 | (rl4 8) (rh4 9) (rl5 10) (rh5 11) (rl6 12) (rh6 13) (rl7 14) (rh7 15)) | |
292 | ) | |
293 | ||
294 | (define-hardware | |
295 | (name h-grb) | |
296 | (comment "general registers") | |
297 | (attrs PROFILE CACHE-ADDR) | |
298 | (type register QI (16)) | |
299 | (indices extern-keyword grb-names) | |
300 | ) | |
301 | ||
302 | (define-keyword | |
303 | (name conditioncode-names) | |
ab5f875d | 304 | (enum-prefix H-CC-) |
98693b73 NC |
305 | (values (cc_UC 0) (cc_NET 1) (cc_Z 2) (cc_EQ 2) (cc_NZ 3) (cc_NE 3) (cc_V 4) (cc_NV 5) (cc_N 6) (cc_NN 7) (cc_ULT 8) (cc_UGE 9) |
306 | (cc_C 8) (cc_NC 9) (cc_SGT 10) (cc_SLE 11) (cc_SLT 12) (cc_SGE 13) (cc_UGT 14) | |
307 | (cc_ULE 15)) | |
308 | ) | |
309 | (define-hardware | |
310 | (name h-cc) | |
311 | (comment "condition codes") | |
312 | (attrs PROFILE CACHE-ADDR) | |
313 | (type register QI (16)) | |
314 | (indices extern-keyword conditioncode-names) | |
315 | ) | |
316 | ||
317 | (define-keyword | |
318 | (name extconditioncode-names) | |
ab5f875d | 319 | (enum-prefix H-ECC-) |
98693b73 NC |
320 | (values(cc_UC 0) (cc_NET 2) (cc_Z 4) (cc_EQ 4) (cc_NZ 6) (cc_NE 6) (cc_V 8) (cc_NV 10) (cc_N 12) (cc_NN 14) (cc_ULT 16) (cc_UGE 18) (cc_C 16) (cc_NC 18) (cc_SGT 20) |
321 | (cc_SLE 22) (cc_SLT 24) (cc_SGE 26) (cc_UGT 28) (cc_ULE 30) (cc_nusr0 1) | |
322 | (cc_nusr1 3) (cc_usr0 5) (cc_usr1 7)) | |
323 | ) | |
324 | (define-hardware | |
325 | (name h-ecc) | |
326 | (comment "extended condition codes") | |
327 | (attrs PROFILE CACHE-ADDR) | |
328 | (type register QI (4)) | |
329 | (indices extern-keyword extconditioncode-names) | |
330 | ) | |
331 | ||
332 | (define-keyword | |
333 | (name grb8-names) | |
ab5f875d | 334 | (enum-prefix H-GRB8-) |
98693b73 NC |
335 | (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) |
336 | (psw 136) (cp 8) (mdl 7) (mdh 6) | |
337 | (mdc 135) (sp 9) (csp 4) (vecseg 137) | |
338 | (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) | |
339 | (zeros 142) (ones 143) (spseg 134) (tfr 214) | |
340 | (rl0 240) (rh0 241) (rl1 242) (rh1 243) (rl2 244) (rh2 245) (rl3 246) (rh3 247) | |
341 | (rl4 248) (rh4 249) (rl5 250) (rh5 251) (rl6 252) (rh6 253) (rl7 254) (rh7 255)) | |
342 | ) | |
343 | ||
344 | (define-hardware | |
345 | (name h-grb8) | |
346 | (comment "general byte registers") | |
347 | (attrs PROFILE CACHE-ADDR) | |
348 | (type register QI (36)) | |
349 | (indices extern-keyword grb8-names) | |
350 | ) | |
351 | ||
352 | (define-keyword | |
353 | (name r8-names) | |
ab5f875d | 354 | (enum-prefix H-R8-) |
98693b73 NC |
355 | (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) |
356 | (psw 136) (cp 8) (mdl 7) (mdh 6) | |
357 | (mdc 135) (sp 9) (csp 4) (vecseg 137) | |
358 | (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) | |
359 | (zeros 142) (ones 143) (spseg 134) (tfr 214) | |
360 | (r0 240) (r1 241) (r2 242) (r3 243) (r4 244) (r5 245) (r6 246) (r7 247) | |
361 | (r8 248) (r9 249) (r10 250) (r11 251) (r12 252) (r13 253) (r14 254) (r15 255)) | |
362 | ) | |
363 | ||
364 | (define-hardware | |
365 | (name h-r8) | |
366 | (comment "registers") | |
367 | (attrs PROFILE CACHE-ADDR) | |
368 | (type register HI (36)) | |
369 | (indices extern-keyword r8-names) | |
370 | ) | |
371 | ||
372 | (define-keyword | |
373 | (name regmem8-names) | |
ab5f875d | 374 | (enum-prefix H-REGMEM8-) |
98693b73 NC |
375 | (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) |
376 | (psw 136) (cp 8) (mdl 7) (mdh 6) | |
377 | (mdc 135) (sp 9) (csp 4) (vecseg 137) | |
378 | (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) | |
379 | (zeros 142) (ones 143) (spseg 134) (tfr 214) | |
380 | (r0 240) (r1 241) (r2 242) (r3 243) (r4 244) (r5 245) (r6 246) (r7 247) | |
381 | (r8 248) (r9 249) (r10 250) (r11 251) (r12 252) (r13 253) (r14 254) (r15 255)) | |
382 | ) | |
383 | ||
384 | (define-hardware | |
385 | (name h-regmem8) | |
386 | (comment "registers") | |
387 | (attrs ) | |
388 | (type register HI (16)) | |
389 | (indices extern-keyword regmem8-names) | |
390 | ) | |
391 | ||
392 | (define-keyword | |
393 | (name regdiv8-names) | |
ab5f875d | 394 | (enum-prefix H-REGDIV8-) |
98693b73 NC |
395 | (values (r0 0) (r1 17) (r2 34) (r3 51) (r4 68) (r5 85) (r6 102) (r7 119) |
396 | (r8 136) (r9 153) (r10 170) (r11 187) (r12 204) (r13 221) (r14 238) (r15 255)) | |
397 | ) | |
398 | ||
399 | (define-hardware | |
400 | (name h-regdiv8) | |
401 | (comment "division insn registers") | |
402 | (attrs PROFILE CACHE-ADDR) | |
403 | (type register HI (16)) | |
404 | (indices extern-keyword regdiv8-names) | |
405 | ) | |
406 | ||
407 | (define-keyword | |
408 | (name reg0-name) | |
ab5f875d | 409 | (enum-prefix H-REG0-) |
98693b73 NC |
410 | (values (0x1 1) (0x2 2) (0x3 3) (0x4 4) (0x5 5) (0x6 6) (0x7 7) (0x8 8) (0x9 9) (0xa 10) (0xb 11) |
411 | (0xc 12) (0xd 13) (0xe 14) (0xf 15) | |
412 | ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7) ("8" 8) ("9" 9) ("10" 10) ("11" 11) | |
413 | ("12" 12) ("13" 13) ("14" 14) ("15" 15)) | |
414 | ) | |
415 | ||
416 | (define-hardware | |
417 | (name h-r0) | |
418 | (comment "for 4-bit data excuding 0") | |
419 | (attrs PROFILE CACHE-ADDR) | |
420 | (type register HI (30)) | |
421 | (indices extern-keyword reg0-name) | |
422 | ) | |
423 | ||
424 | (define-keyword | |
425 | (name reg0-name1) | |
ab5f875d | 426 | (enum-prefix H-REG01-) |
98693b73 NC |
427 | (values (0x1 1) (0x2 2) (0x3 3) (0x4 4) (0x5 5) (0x6 6) (0x7 7) |
428 | ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7)) | |
429 | ) | |
430 | ||
431 | (define-hardware | |
432 | (name h-r01) | |
433 | (comment "for 4-bit data excuding 0") | |
434 | (attrs PROFILE CACHE-ADDR) | |
435 | (type register HI (14)) | |
436 | (indices extern-keyword reg0-name1) | |
437 | ) | |
438 | ||
439 | (define-keyword | |
440 | (name regbmem8-names) | |
ab5f875d | 441 | (enum-prefix H-REGBMEM8-) |
98693b73 NC |
442 | (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) |
443 | (psw 136) (cp 8) (mdl 7) (mdh 6) | |
444 | (mdc 135) (sp 9) (csp 4) (vecseg 137) | |
445 | (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) | |
446 | (zeros 142) (ones 143) (spseg 134) (tfr 214) | |
447 | (rl0 240) (rh0 241) (rl1 242) (rh1 243) (rl2 244) (rh2 245) (rl3 246) (rh3 247) | |
448 | (rl4 248) (rh4 249) (rl5 250) (rh5 251) (rl6 252) (rh6 253) (rl7 254) (rh7 255)) | |
449 | ) | |
450 | ||
451 | (define-hardware | |
452 | (name h-regbmem8) | |
453 | (comment "registers") | |
454 | (attrs PROFILE CACHE-ADDR) | |
455 | (type register HI (36)) | |
456 | (indices extern-keyword regbmem8-names) | |
457 | ) | |
458 | ||
459 | (define-keyword | |
460 | (name memgr8-names) | |
ab5f875d | 461 | (enum-prefix H-MEMGR8-) |
98693b73 NC |
462 | (values (dpp0 65024) (dpp1 65026) (dpp2 65028) (dpp3 65030) |
463 | (psw 65296) (cp 65040) (mdl 65038) (mdh 65036) | |
464 | (mdc 65294) (sp 65042) (csp 65032) (vecseg 65298) | |
465 | (stkov 65044) (stkun 65046) (cpucon1 65048) (cpucon2 65050) | |
466 | (zeros 65308) (ones 65310) (spseg 65292) (tfr 65452) ) | |
467 | ) | |
468 | ||
469 | (define-hardware | |
470 | (name h-memgr8) | |
471 | (comment "memory location of registers") | |
472 | (attrs ) | |
473 | (type register HI (20)) | |
474 | (indices extern-keyword memgr8-names) | |
475 | ) | |
476 | ||
477 | (dsh h-cond "condition bit" () (register BI)) ;any bit from PSW while comparison | |
478 | ; This bit is part of the PSW register | |
479 | (dsh h-cbit "carry bit" () (register BI)) | |
480 | ||
481 | (dsh h-sgtdis "segmentation enable bit" () (register BI)) ;0 means segmentation enabled | |
482 | ||
483 | ;Instruction operands | |
484 | ; -- layer between the assembler and the raw hardware description | |
485 | ; -- the main means of manipulating instruction fields in the semantic code | |
486 | ||
487 | ; XC16X specific operand attributes: | |
488 | ||
489 | (define-attr | |
490 | (for operand) | |
491 | (type boolean) | |
492 | (name HASH-PREFIX) | |
493 | (comment "immediates have an optional '#' prefix") | |
494 | ) | |
495 | ||
496 | (define-attr | |
497 | (for operand) | |
498 | (type boolean) | |
499 | (name DOT-PREFIX) | |
500 | (comment "bit addr have an optional '.' prefix") | |
501 | ) | |
502 | ||
503 | (define-attr | |
504 | (for operand) | |
505 | (type boolean) | |
506 | (name POF-PREFIX) | |
507 | (comment "page offset ") | |
508 | ) | |
509 | ||
510 | (define-attr | |
511 | (for operand) | |
512 | (type boolean) | |
513 | (name PAG-PREFIX) | |
514 | (comment "page ") | |
515 | ) | |
516 | ||
517 | (define-attr | |
518 | (for operand) | |
519 | (type boolean) | |
520 | (name SOF-PREFIX) | |
521 | (comment "segment offset selection") | |
522 | ) | |
523 | ||
524 | (define-attr | |
525 | (for operand) | |
526 | (type boolean) | |
527 | (name SEG-PREFIX) | |
528 | (comment "segment") | |
529 | ) | |
530 | ||
531 | (dnop sr "source register" () h-gr f-r2) | |
532 | (dnop dr "destination register" () h-gr f-r1) | |
533 | (dnop dri "destination register" () h-gr f-r4) | |
534 | (dnop srb "source register" () h-grb f-r2) | |
535 | (dnop drb "destination register" () h-grb f-r1) | |
536 | (dnop sr2 "2 bit source register" () h-gr f-r0) | |
537 | (dnop src1 "source register 1" () h-gr f-r1) | |
538 | (dnop src2 "source register 2" () h-gr f-r2) | |
539 | (dnop srdiv "source register 2" () h-regdiv8 f-reg8) | |
540 | (dnop RegNam "PSW bits" () h-psw f-reg8) | |
541 | (dnop uimm2 "2 bit unsigned number" (HASH-PREFIX) h-ext f-uimm2) | |
542 | (dnop uimm3 "3 bit unsigned number" (HASH-PREFIX) h-r01 f-uimm3) | |
543 | (dnop uimm4 "4 bit unsigned number" (HASH-PREFIX) h-uint f-uimm4) | |
544 | (dnop uimm7 "7 bit trap number" (HASH-PREFIX) h-uint f-uimm7) | |
545 | (dnop uimm8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm8) | |
546 | (dnop uimm16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm16) | |
547 | (dnop upof16 "16 bit unsigned immediate" (POF-PREFIX) h-addr f-memory) | |
548 | (dnop reg8 "8 bit word register number" () h-r8 f-reg8) | |
549 | (dnop regmem8 "8 bit word register number" () h-regmem8 f-regmem8) | |
550 | (dnop regbmem8 "8 bit byte register number" () h-regbmem8 f-regmem8) | |
551 | (dnop regoff8 "8 bit word register number" () h-r8 f-regoff8) | |
552 | (dnop reghi8 "8 bit word register number" () h-r8 f-reghi8) | |
553 | (dnop regb8 "8 bit byte register number" () h-grb8 f-regb8) | |
554 | (dnop genreg "8 bit word register number" () h-r8 f-regb8) | |
555 | (dnop seg "8 bit segment number" () h-uint f-seg8) | |
556 | (dnop seghi8 "8 bit hi segment number" () h-uint f-segnum8) | |
557 | (dnop caddr "16 bit address offset" () h-addr f-offset16) | |
558 | (dnop rel "8 bit signed relative offset" () h-sint f-rel8) | |
559 | (dnop relhi "hi 8 bit signed relative offset" () h-sint f-relhi8) | |
560 | (dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil) | |
561 | (dnop bit1 "gap of 1 bit" () h-uint f-op-bit1) | |
562 | (dnop bit2 "gap of 2 bits" () h-uint f-op-bit2) | |
563 | (dnop bit4 "gap of 4 bits" () h-uint f-op-bit4) | |
564 | (dnop lbit4 "gap of 4 bits" () h-uint f-op-lbit4) | |
565 | (dnop lbit2 "gap of 2 bits" () h-uint f-op-lbit2) | |
566 | (dnop bit8 "gap of 8 bits" () h-uint f-op-bit8) | |
567 | (dnop u4 "gap of 4 bits" () h-r0 f-uimm4) | |
568 | (dnop bitone "field of 1 bit" () h-uint f-op-onebit) | |
569 | (dnop bit01 "field of 1 bit" () h-uint f-op-1bit) | |
570 | (dnop cond "condition code" () h-cc f-condcode) | |
571 | (dnop icond "indirect condition code" () h-cc f-icondcode) | |
572 | (dnop extcond "extended condition code" () h-ecc f-extccode) | |
573 | (dnop memory "16 bit memory" () h-addr f-memory) | |
574 | (dnop memgr8 "16 bit memory" () h-memgr8 f-memgr8) | |
575 | (dnop cbit "carry bit" (SEM-ONLY) h-cbit f-nil) | |
576 | (dnop qbit "bit addr" (DOT-PREFIX) h-uint f-qbit) | |
577 | (dnop qlobit "bit addr" (DOT-PREFIX) h-uint f-qlobit) | |
578 | (dnop qhibit "bit addr" (DOT-PREFIX) h-uint f-qhibit) | |
579 | (dnop mask8 "8 bit mask" (HASH-PREFIX) h-uint f-mask8) | |
580 | (dnop masklo8 "8 bit mask" (HASH-PREFIX) h-uint f-datahi8) | |
581 | (dnop pagenum "10 bit page number" (HASH-PREFIX) h-uint f-pagenum) | |
582 | (dnop data8 "8 bit data" (HASH-PREFIX) h-uint f-data8) | |
583 | (dnop datahi8 "8 bit data" (HASH-PREFIX) h-uint f-datahi8) | |
584 | (dnop sgtdisbit "segmentation enable bit" (SEM-ONLY) h-sgtdis f-nil) | |
585 | (dnop upag16 "16 bit unsigned immediate" (PAG-PREFIX) h-uint f-uimm16) | |
586 | (dnop useg8 "8 bit segment " (SEG-PREFIX) h-uint f-seg8) | |
587 | (dnop useg16 "16 bit address offset" (SEG-PREFIX) h-uint f-offset16) | |
588 | (dnop usof16 "16 bit address offset" (SOF-PREFIX) h-uint f-offset16) | |
589 | ||
590 | ; define hash operator | |
591 | (define-operand (name hash) (comment "# prefix") (attrs) | |
592 | (type h-sint) | |
593 | (index f-nil) | |
594 | (handlers (parse "hash") (print "hash")) | |
595 | ) | |
596 | ||
597 | ; define dot operator | |
598 | (define-operand (name dot) (comment ". prefix") (attrs) | |
599 | (type h-sint) | |
600 | (index f-nil) | |
601 | (handlers (parse "dot") (print "dot")) | |
602 | ) | |
603 | ||
604 | ; define pof operator | |
605 | (define-operand (name pof) (comment "pof: prefix") (attrs) | |
606 | (type h-sint) | |
607 | (index f-nil) | |
608 | (handlers (parse "pof") (print "pof")) | |
609 | ) | |
610 | ||
611 | ; define pag operator | |
612 | (define-operand (name pag) (comment "pag: prefix") (attrs) | |
613 | (type h-sint) | |
614 | (index f-nil) | |
615 | (handlers (parse "pag") (print "pag")) | |
616 | ) | |
617 | ||
618 | ; define sof operator | |
619 | (define-operand (name sof) (comment "sof: prefix") (attrs) | |
620 | (type h-sint) | |
621 | (index f-nil) | |
622 | (handlers (parse "sof") (print "sof")) | |
623 | ) | |
624 | ||
625 | ; define seg operator | |
626 | (define-operand (name segm) (comment "seg: prefix") (attrs) | |
627 | (type h-sint) | |
628 | (index f-nil) | |
629 | (handlers (parse "seg") (print "seg")) | |
630 | ) | |
631 | ||
632 | ; IDOC attribute for instruction documentation. | |
633 | (define-attr | |
634 | (for insn) | |
635 | (type enum) | |
636 | (name IDOC) | |
637 | (comment "insn kind for documentation") | |
638 | (attrs META) | |
639 | (values | |
640 | (MOVE - () "Data Movement") | |
641 | (ALU - () "Arithmatic & logical") | |
642 | (CMP - () "Compare") | |
643 | (JMP - () "Jump & Call") | |
644 | (MISC - () "Miscellaneous") | |
645 | (SYSC - () "System control") | |
646 | ) | |
647 | ) | |
648 | ||
649 | ; Include the instruction set descriptions from their respective | |
650 | ; source files. | |
651 | ||
652 | ;Arithmatic insns | |
653 | ;****************************************************************** | |
654 | ||
655 | ;add/sub register and immediate | |
656 | (define-pmacro (arithmetic16 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
657 | (dni name | |
658 | (.str name "arithmetic" ) | |
659 | ((PIPE OS) (IDOC ALU)) | |
660 | (.str insn " $"op1 ",$"dir"$"op2) | |
661 | (+ opc1 opc2 op1 op2) | |
662 | (set mode op1 (insn1 mode op1 (mem HI op2))) | |
663 | () | |
664 | ) | |
665 | ) | |
666 | (arithmetic16 addrpof add add OP1_0 OP2_2 reg8 upof16 HI "pof") | |
667 | (arithmetic16 subrpof sub sub OP1_2 OP2_2 reg8 upof16 HI "pof") | |
668 | (arithmetic16 addbrpof addb add OP1_0 OP2_3 regb8 upof16 QI "pof") | |
669 | (arithmetic16 subbrpof subb sub OP1_2 OP2_3 regb8 upof16 QI "pof") | |
670 | (arithmetic16 addrpag add add OP1_0 OP2_2 reg8 upag16 HI "pag") | |
671 | (arithmetic16 subrpag sub sub OP1_2 OP2_2 reg8 upag16 HI "pag") | |
672 | (arithmetic16 addbrpag addb add OP1_0 OP2_3 regb8 upag16 QI "pag") | |
673 | (arithmetic16 subbrpag subb sub OP1_2 OP2_3 regb8 upag16 QI "pag") | |
674 | ||
675 | ;add/sub register and immediate | |
676 | (define-pmacro (arithmetic17 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
677 | (dni name | |
678 | (.str name "arithmetic" ) | |
679 | ((PIPE OS) (IDOC ALU)) | |
680 | (.str insn " $"op1 ",$"dir"$"op2) | |
681 | (+ opc1 opc2 op1 op2) | |
682 | (set mode op1 (insn1 mode op1 (mem HI op2) cbit)) | |
683 | () | |
684 | ) | |
685 | ) | |
686 | (arithmetic17 addcrpof addc addc OP1_1 OP2_2 reg8 upof16 HI "pof") | |
687 | (arithmetic17 subcrpof subc subc OP1_3 OP2_2 reg8 upof16 HI "pof") | |
688 | (arithmetic17 addcbrpof addcb addc OP1_1 OP2_3 regb8 upof16 QI "pof") | |
689 | (arithmetic17 subcbrpof subcb subc OP1_3 OP2_3 regb8 upof16 QI "pof") | |
690 | (arithmetic17 addcrpag addc addc OP1_1 OP2_2 reg8 upag16 HI "pag") | |
691 | (arithmetic17 subcrpag subc subc OP1_3 OP2_2 reg8 upag16 HI "pag") | |
692 | (arithmetic17 addcbrpag addcb addc OP1_1 OP2_3 regb8 upag16 QI "pag") | |
693 | (arithmetic17 subcbrpag subcb subc OP1_3 OP2_3 regb8 upag16 QI "pag") | |
694 | ||
695 | ;add/sub register and immediate | |
696 | (define-pmacro (arithmetic18 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
697 | (dni name | |
698 | (.str name "arithmetic" ) | |
699 | ((PIPE OS) (IDOC ALU)) | |
700 | (.str insn " $"dir"$"op1 ",$"op2) | |
701 | (+ opc1 opc2 op2 op1) | |
702 | (set (mem HI op1) (insn1 (mem HI op1) op2 )) | |
703 | () | |
704 | ) | |
705 | ) | |
706 | (arithmetic18 addrpofr add add OP1_0 OP2_4 upof16 reg8 HI "pof") | |
707 | (arithmetic18 subrpofr sub sub OP1_2 OP2_4 upof16 reg8 HI "pof") | |
708 | (arithmetic18 addbrpofr addb add OP1_0 OP2_5 upof16 regb8 QI "pof") | |
709 | (arithmetic18 subbrpofr subb sub OP1_2 OP2_5 upof16 regb8 QI "pof") | |
710 | ||
711 | ;add/sub register and immediate | |
712 | (define-pmacro (arithmetic19 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
713 | (dni name | |
714 | (.str name "arithmetic" ) | |
715 | ((PIPE OS) (IDOC ALU)) | |
716 | (.str insn " $"dir"$"op1 ",$"op2) | |
717 | (+ opc1 opc2 op2 op1) | |
718 | (set (mem HI op1) (insn1 mode (mem HI op1) op2 cbit)) | |
719 | () | |
720 | ) | |
721 | ) | |
722 | (arithmetic19 addcrpofr addc addc OP1_1 OP2_4 upof16 reg8 HI "pof") | |
723 | (arithmetic19 subcrpofr subc subc OP1_3 OP2_4 upof16 reg8 HI "pof") | |
724 | (arithmetic19 addcbrpofr addcb addc OP1_1 OP2_5 upof16 regb8 QI "pof") | |
725 | (arithmetic19 subcbrpofr subcb subc OP1_3 OP2_5 upof16 regb8 QI "pof") | |
726 | ||
727 | ;add/sub register and immediate | |
728 | (define-pmacro (arithmetic20 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
729 | (dni name | |
730 | (.str name "arithmetic" ) | |
731 | ((PIPE OS) (IDOC ALU)) | |
732 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
733 | (+ opc1 opc2 op1 op2) | |
734 | (set mode op1 (insn1 mode op1 op2)) | |
735 | () | |
736 | ) | |
737 | ) | |
738 | (arithmetic20 addrhpof add add OP1_0 OP2_6 reg8 uimm16 HI "pof") | |
739 | (arithmetic20 subrhpof sub sub OP1_2 OP2_6 reg8 uimm16 HI "pof") | |
740 | (arithmetic20 addbrhpof add add OP1_0 OP2_6 reg8 uimm16 HI "pag") | |
741 | (arithmetic20 subbrhpof sub sub OP1_2 OP2_6 reg8 uimm16 HI "pag") | |
742 | ||
743 | ;add/sub register and immediate | |
744 | (define-pmacro (arithmetic21 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
745 | (dni name | |
746 | (.str name "arithmetic" ) | |
747 | ((PIPE OS) (IDOC ALU)) | |
748 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
749 | (+ opc1 opc2 op1 (f-op-bit1 0) op2) | |
750 | (set mode op1 (insn1 mode op1 op2)) | |
751 | () | |
752 | ) | |
753 | ) | |
754 | (arithmetic21 addrhpof3 add add OP1_0 OP2_8 dr uimm3 HI "pof") | |
755 | (arithmetic21 subrhpof3 sub sub OP1_2 OP2_8 dr uimm3 HI "pof") | |
756 | (arithmetic21 addbrhpag3 addb add OP1_0 OP2_9 drb uimm3 QI "pag") | |
757 | (arithmetic21 subbrhpag3 subb sub OP1_2 OP2_9 drb uimm3 QI "pag") | |
758 | (arithmetic21 addrhpag3 add add OP1_0 OP2_8 dr uimm3 HI "pag") | |
759 | (arithmetic21 subrhpag3 sub sub OP1_2 OP2_8 dr uimm3 HI "pag") | |
760 | (arithmetic21 addbrhpof3 addb add OP1_0 OP2_9 drb uimm3 QI "pof") | |
761 | (arithmetic21 subbrhpof3 subb sub OP1_2 OP2_9 drb uimm3 QI "pof") | |
762 | ||
763 | ;add/sub register and immediate | |
764 | (define-pmacro (arithmetic22 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
765 | (dni name | |
766 | (.str name "arithmetic" ) | |
767 | ((PIPE OS) (IDOC ALU)) | |
768 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
769 | (+ opc1 opc2 op1 op2 (f-op-bit8 0)) | |
770 | (set mode op1 (insn1 mode op1 op2)) | |
771 | () | |
772 | ) | |
773 | ) | |
774 | (arithmetic22 addrbhpof addb add OP1_0 OP2_7 regb8 uimm8 QI "pof") | |
775 | (arithmetic22 subrbhpof subb sub OP1_2 OP2_7 regb8 uimm8 QI "pof") | |
776 | (arithmetic22 addbrhpag addb add OP1_0 OP2_7 regb8 uimm8 QI "pag") | |
777 | (arithmetic22 subbrhpag subb sub OP1_2 OP2_7 regb8 uimm8 QI "pag") | |
778 | ||
779 | ;add/sub register and immediate | |
780 | (define-pmacro (arithmetic23 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
781 | (dni name | |
782 | (.str name "arithmetic" ) | |
783 | ((PIPE OS) (IDOC ALU)) | |
784 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
785 | (+ opc1 opc2 op1 op2) | |
786 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
787 | () | |
788 | ) | |
789 | ) | |
790 | (arithmetic23 addcrhpof addc addc OP1_1 OP2_6 reg8 uimm16 HI "pof") | |
791 | (arithmetic23 subcrhpof subc subc OP1_3 OP2_6 reg8 uimm16 HI "pof") | |
792 | (arithmetic23 addcbrhpof addc addc OP1_1 OP2_6 reg8 uimm16 HI "pag") | |
793 | (arithmetic23 subcbrhpof subc subc OP1_3 OP2_6 reg8 uimm16 HI "pag") | |
794 | ||
795 | ;add/sub register and immediate | |
796 | (define-pmacro (arithmetic24 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
797 | (dni name | |
798 | (.str name "arithmetic" ) | |
799 | ((PIPE OS) (IDOC ALU)) | |
800 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
801 | (+ opc1 opc2 op1 (f-op-bit1 0) op2) | |
802 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
803 | () | |
804 | ) | |
805 | ) | |
806 | (arithmetic24 addcrhpof3 addc addc OP1_1 OP2_8 dr uimm3 HI "pof") | |
807 | (arithmetic24 subcrhpof3 subc subc OP1_3 OP2_8 dr uimm3 HI "pof") | |
808 | (arithmetic24 addcbrhpag3 addcb addc OP1_1 OP2_9 drb uimm3 QI "pag") | |
809 | (arithmetic24 subcbrhpag3 subcb subc OP1_3 OP2_9 drb uimm3 QI "pag") | |
810 | (arithmetic24 addcrhpag3 addc addc OP1_1 OP2_8 dr uimm3 HI "pag") | |
811 | (arithmetic24 subcrhpag3 subc subc OP1_3 OP2_8 dr uimm3 HI "pag") | |
812 | (arithmetic24 addcbrhpof3 addcb addc OP1_1 OP2_9 drb uimm3 QI "pof") | |
813 | (arithmetic24 subcbrhpof3 subcb subc OP1_3 OP2_9 drb uimm3 QI "pof") | |
814 | ||
815 | ;add/sub register and immediate | |
816 | (define-pmacro (arithmetic25 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
817 | (dni name | |
818 | (.str name "arithmetic" ) | |
819 | ((PIPE OS) (IDOC ALU)) | |
820 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
821 | (+ opc1 opc2 op1 op2 (f-op-bit8 0)) | |
822 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
823 | () | |
824 | ) | |
825 | ) | |
826 | (arithmetic25 addcrbhpof addcb addc OP1_1 OP2_7 regb8 uimm8 QI "pof") | |
827 | (arithmetic25 subcrbhpof subcb subc OP1_3 OP2_7 regb8 uimm8 QI "pof") | |
828 | (arithmetic25 addcbrhpag addcb addc OP1_1 OP2_7 regb8 uimm8 QI "pag") | |
829 | (arithmetic25 subcbrhpag subcb subc OP1_3 OP2_7 regb8 uimm8 QI "pag") | |
830 | ||
831 | ;add/sub register and immediate | |
832 | (define-pmacro (arithmetic10 name insn insn1 opc1 opc2 op1 op2 mode) | |
833 | (dni name | |
834 | (.str name "arithmetic" ) | |
835 | ((PIPE OS) (IDOC ALU)) | |
836 | (.str insn " $"op1 ",$hash$"op2) | |
837 | (+ opc1 opc2 op1 (f-op-bit1 0) op2) | |
838 | (set mode op1 (insn1 mode op1 op2)) | |
839 | () | |
840 | ) | |
841 | ) | |
842 | (arithmetic10 addri add add OP1_0 OP2_8 dr uimm3 HI) | |
843 | (arithmetic10 subri sub sub OP1_2 OP2_8 dr uimm3 HI) | |
844 | (arithmetic10 addbri addb add OP1_0 OP2_9 drb uimm3 QI) | |
845 | (arithmetic10 subbri subb sub OP1_2 OP2_9 drb uimm3 QI) | |
846 | ||
847 | ;add/sub register and immediate | |
848 | (define-pmacro (arithmetic11 name insn insn1 opc1 opc2 op1 op2 mode) | |
849 | (dni name | |
850 | (.str name "arithmetic" ) | |
851 | ((PIPE OS) (IDOC ALU)) | |
852 | (.str insn " $"op1 ",$hash$"op2) | |
853 | (+ opc1 opc2 op1 op2) | |
854 | (set mode op1 (insn1 mode op1 op2)) | |
855 | () | |
856 | ) | |
857 | ) | |
858 | (arithmetic11 addrim add add OP1_0 OP2_6 reg8 uimm16 HI) | |
859 | (arithmetic11 subrim sub sub OP1_2 OP2_6 reg8 uimm16 HI) | |
860 | ||
861 | ;add/sub register and immediate | |
862 | (define-pmacro (arithmetic12 name insn insn1 opc1 opc2 op1 op2 mode) | |
863 | (dni name | |
864 | (.str name "arithmetic" ) | |
865 | ((PIPE OS) (IDOC ALU)) | |
866 | (.str insn " $"op1 ",$hash$"op2) | |
867 | (+ opc1 opc2 op1 op2 (f-op-bit8 0)) | |
868 | (set mode op1 (insn1 mode op1 op2)) | |
869 | () | |
870 | ) | |
871 | ) | |
872 | (arithmetic12 addbrim addb add OP1_0 OP2_7 regb8 uimm8 QI) | |
873 | (arithmetic12 subbrim subb sub OP1_2 OP2_7 regb8 uimm8 QI) | |
874 | ||
875 | ;add/sub register and immediate with carry | |
876 | (define-pmacro (arithmetic13 name insn insn1 opc1 opc2 op1 op2 mode) | |
877 | (dni name | |
878 | (.str name "arithmetic" ) | |
879 | ((PIPE OS) (IDOC ALU)) | |
880 | (.str insn " $"op1 ",$hash$"op2) | |
881 | (+ opc1 opc2 op1 (f-op-bit1 0) op2) | |
882 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
883 | () | |
884 | ) | |
885 | ) | |
886 | (arithmetic13 addcri addc addc OP1_1 OP2_8 dr uimm3 HI) | |
887 | (arithmetic13 subcri subc subc OP1_3 OP2_8 dr uimm3 HI) | |
888 | (arithmetic13 addcbri addcb addc OP1_1 OP2_9 drb uimm3 QI) | |
889 | (arithmetic13 subcbri subcb subc OP1_3 OP2_9 drb uimm3 QI) | |
890 | ||
891 | ;add/sub register and immediate with carry | |
892 | (define-pmacro (arithmetic14 name insn insn1 opc1 opc2 op1 op2 mode) | |
893 | (dni name | |
894 | (.str name "arithmetic" ) | |
895 | ((PIPE OS) (IDOC ALU)) | |
896 | (.str insn " $"op1 ",$hash$"op2) | |
897 | (+ opc1 opc2 op1 op2) | |
898 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
899 | () | |
900 | ) | |
901 | ) | |
902 | (arithmetic14 addcrim addc addc OP1_1 OP2_6 reg8 uimm16 HI) | |
903 | (arithmetic14 subcrim subc subc OP1_3 OP2_6 reg8 uimm16 HI) | |
904 | ||
905 | ;add/sub register and immediate with carry | |
906 | (define-pmacro (arithmetic15 name insn insn1 opc1 opc2 op1 op2 mode) | |
907 | (dni name | |
908 | (.str name "arithmetic" ) | |
909 | ((PIPE OS) (IDOC ALU)) | |
910 | (.str insn " $"op1 ",$hash$"op2) | |
911 | (+ opc1 opc2 op1 op2 (f-op-bit8 0)) | |
912 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
913 | () | |
914 | ) | |
915 | ) | |
916 | (arithmetic15 addcbrim addcb addc OP1_1 OP2_7 regb8 uimm8 QI) | |
917 | (arithmetic15 subcbrim subcb subc OP1_3 OP2_7 regb8 uimm8 QI) | |
918 | ||
919 | ||
920 | ;add/sub registers | |
921 | (define-pmacro (arithmetic name insn insn1 opc1 opc2 op1 op2 mode) | |
922 | (dni name | |
923 | (.str name "arithmetic" ) | |
924 | ((PIPE OS) (IDOC ALU)) | |
925 | (.str insn " $"op1 ",$"op2) | |
926 | (+ opc1 opc2 op1 op2) | |
927 | (set mode op1 (insn1 mode op1 op2)) | |
928 | () | |
929 | ) | |
930 | ) | |
931 | (arithmetic addr add add OP1_0 OP2_0 dr sr HI) | |
932 | (arithmetic subr sub sub OP1_2 OP2_0 dr sr HI) | |
933 | (arithmetic addbr addb add OP1_0 OP2_1 drb srb QI) | |
934 | (arithmetic subbr subb sub OP1_2 OP2_1 drb srb QI) | |
935 | ||
936 | ;add/sub register and indirect memory | |
937 | (define-pmacro (arithmetic1 name insn insn1 opc1 opc2 op1 op2 mode) | |
938 | (dni name | |
939 | (.str name "arithmetic" ) | |
940 | ((PIPE OS) (IDOC ALU)) | |
941 | (.str insn " $"op1 ",[$"op2"]") | |
942 | (+ opc1 opc2 op1 (f-op-bit2 2) op2) | |
943 | (set mode op1 (insn1 mode op1 (mem HI op2))) | |
944 | () | |
945 | ) | |
946 | ) | |
947 | (arithmetic1 add2 add add OP1_0 OP2_8 dr sr2 HI) | |
948 | (arithmetic1 sub2 sub sub OP1_2 OP2_8 dr sr2 HI) | |
949 | (arithmetic1 addb2 addb add OP1_0 OP2_9 drb sr2 QI) | |
950 | (arithmetic1 subb2 subb sub OP1_2 OP2_9 drb sr2 QI) | |
951 | ||
952 | ;add/sub register and indirect memory post increment | |
953 | (define-pmacro (arithmetic2 name insn insn1 opc1 opc2 op1 op2 mode) | |
954 | (dni name | |
955 | (.str name "arithmetic" ) | |
956 | ((PIPE OS) (IDOC ALU)) | |
957 | (.str insn " $"op1 ",[$"op2"+]") | |
958 | (+ opc1 opc2 op1 (f-op-bit2 3) op2) | |
959 | (sequence () | |
960 | (set mode op1 (insn1 mode op1 (mem HI op2))) | |
961 | (set HI op2 (add HI op2 (const 2))) | |
962 | ) | |
963 | () | |
964 | ) | |
965 | ) | |
966 | (arithmetic2 add2i add add OP1_0 OP2_8 dr sr2 HI) | |
967 | (arithmetic2 sub2i sub sub OP1_2 OP2_8 dr sr2 HI) | |
968 | (arithmetic2 addb2i addb add OP1_0 OP2_9 drb sr2 QI) | |
969 | (arithmetic2 subb2i subb sub OP1_2 OP2_9 drb sr2 QI) | |
970 | ||
971 | ;add/sub registers with carry | |
972 | (define-pmacro (arithmetic3 name insn insn1 opc1 opc2 op1 op2 mode) | |
973 | (dni name | |
974 | (.str name "arithmetic" ) | |
975 | ((PIPE OS) (IDOC ALU)) | |
976 | (.str insn " $"op1 ",$"op2) | |
977 | (+ opc1 opc2 op1 op2) | |
978 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
979 | () | |
980 | ) | |
981 | ) | |
982 | (arithmetic3 addcr addc addc OP1_1 OP2_0 dr sr HI) | |
983 | (arithmetic3 subcr subc subc OP1_3 OP2_0 dr sr HI) | |
984 | (arithmetic3 addbcr addcb addc OP1_1 OP2_1 drb srb QI) | |
985 | (arithmetic3 subbcr subcb subc OP1_3 OP2_1 drb srb QI) | |
986 | ||
987 | ||
988 | ;add/sub register and indirect memory | |
989 | (define-pmacro (arithmetic4 name insn insn1 opc1 opc2 op1 op2 mode) | |
990 | (dni name | |
991 | (.str name "arithmetic" ) | |
992 | ((PIPE OS) (IDOC ALU)) | |
993 | (.str insn " $"op1 ",[$"op2"]") | |
994 | (+ opc1 opc2 op1 (f-op-bit2 2) op2) | |
995 | (set mode op1 (insn1 mode op1 (mem HI op2) cbit)) | |
996 | () | |
997 | ) | |
998 | ) | |
999 | (arithmetic4 addcr2 addc addc OP1_1 OP2_8 dr sr2 HI) | |
1000 | (arithmetic4 subcr2 subc subc OP1_3 OP2_8 dr sr2 HI) | |
1001 | (arithmetic4 addbcr2 addcb addc OP1_1 OP2_9 drb sr2 QI) | |
1002 | (arithmetic4 subbcr2 subcb subc OP1_3 OP2_9 drb sr2 QI) | |
1003 | ||
1004 | ;add/sub register and indirect memory post increment | |
1005 | (define-pmacro (arithmetic5 name insn insn1 opc1 opc2 op1 op2 mode) | |
1006 | (dni name | |
1007 | (.str name "arithmetic" ) | |
1008 | ((PIPE OS) (IDOC ALU)) | |
1009 | (.str insn " $"op1 ",[$"op2"+]") | |
1010 | (+ opc1 opc2 op1 (f-op-bit2 3) op2) | |
1011 | (sequence () | |
1012 | (set mode op1 (insn1 mode op1 (mem HI op2) cbit)) | |
1013 | (set HI op2 (add HI op2 (const 2))) | |
1014 | ) | |
1015 | () | |
1016 | ) | |
1017 | ) | |
1018 | (arithmetic5 addcr2i addc addc OP1_1 OP2_8 dr sr2 HI) | |
1019 | (arithmetic5 subcr2i subc subc OP1_3 OP2_8 dr sr2 HI) | |
1020 | (arithmetic5 addbcr2i addcb addc OP1_1 OP2_9 drb sr2 QI) | |
1021 | (arithmetic5 subbcr2i subcb subc OP1_3 OP2_9 drb sr2 QI) | |
1022 | ||
1023 | ;add/sub register and direct memory | |
1024 | (define-pmacro (arithmetic6 name insn insn1 opc1 opc2 op1 op2 mode) | |
1025 | (dni name | |
1026 | (.str name "arithmetic" ) | |
1027 | ((PIPE OS) (IDOC ALU)) | |
1028 | (.str insn " $"op1 ",$"op2) | |
1029 | (+ opc1 opc2 op1 op2) | |
1030 | (set mode op1 (insn1 mode op1 op2)) | |
1031 | () | |
1032 | ) | |
1033 | ) | |
1034 | ||
1035 | ;add/sub register and direct memory | |
1036 | (define-pmacro (arithmetic7 name insn insn1 opc1 opc2 op1 op2 mode) | |
1037 | (dni name | |
1038 | (.str name "arithmetic" ) | |
1039 | ((PIPE OS) (IDOC ALU)) | |
1040 | (.str insn " $"op1 ",$"op2) | |
1041 | (+ opc1 opc2 op2 op1) | |
1042 | (set (mem HI op1) (insn1 (mem HI op1) op2)) | |
1043 | () | |
1044 | ) | |
1045 | ) | |
1046 | (arithmetic6 addrm2 add add OP1_0 OP2_2 regmem8 memgr8 HI) | |
1047 | (arithmetic7 addrm3 add add OP1_0 OP2_4 memgr8 regmem8 HI) | |
1048 | (arithmetic6 addrm add add OP1_0 OP2_2 reg8 memory HI) | |
1049 | (arithmetic7 addrm1 add add OP1_0 OP2_4 memory reg8 HI) | |
1050 | (arithmetic6 subrm3 sub sub OP1_2 OP2_2 regmem8 memgr8 HI) | |
1051 | (arithmetic7 subrm2 sub sub OP1_2 OP2_4 memgr8 regmem8 HI) | |
1052 | (arithmetic6 subrm1 sub sub OP1_2 OP2_2 reg8 memory HI) | |
1053 | (arithmetic7 subrm sub sub OP1_2 OP2_4 memory reg8 HI) | |
1054 | (arithmetic6 addbrm2 addb add OP1_0 OP2_3 regbmem8 memgr8 QI) | |
1055 | (arithmetic7 addbrm3 addb add OP1_0 OP2_5 memgr8 regbmem8 QI) | |
1056 | (arithmetic6 addbrm addb add OP1_0 OP2_3 regb8 memory QI) | |
1057 | (arithmetic7 addbrm1 addb add OP1_0 OP2_5 memory regb8 QI) | |
1058 | (arithmetic6 subbrm3 subb sub OP1_2 OP2_3 regbmem8 memgr8 QI) | |
1059 | (arithmetic7 subbrm2 subb sub OP1_2 OP2_5 memgr8 regbmem8 QI) | |
1060 | (arithmetic6 subbrm1 subb sub OP1_2 OP2_3 regb8 memory QI) | |
1061 | (arithmetic7 subbrm subb sub OP1_2 OP2_5 memory regb8 QI) | |
1062 | ||
1063 | ;add/sub registers with carry | |
1064 | (define-pmacro (arithmetic8 name insn insn1 opc1 opc2 op1 op2 mode) | |
1065 | (dni name | |
1066 | (.str name "arithmetic" ) | |
1067 | ((PIPE OS) (IDOC ALU)) | |
1068 | (.str insn " $"op1 ",$"op2) | |
1069 | (+ opc1 opc2 op1 op2) | |
1070 | (set mode op1 (insn1 mode op1 op2 cbit)) | |
1071 | () | |
1072 | ) | |
1073 | ) | |
1074 | ||
1075 | ;add/sub registers with carry | |
1076 | (define-pmacro (arithmetic9 name insn insn1 opc1 opc2 op1 op2 mode) | |
1077 | (dni name | |
1078 | (.str name "arithmetic" ) | |
1079 | ((PIPE OS) (IDOC ALU)) | |
1080 | (.str insn " $"op1 ",$"op2) | |
1081 | (+ opc1 opc2 op2 op1) | |
1082 | (set (mem HI op1) (insn1 (mem HI op1) op2 cbit)) | |
1083 | () | |
1084 | ) | |
1085 | ) | |
1086 | (arithmetic8 addcrm2 addc addc OP1_1 OP2_2 regmem8 memgr8 HI) | |
1087 | (arithmetic9 addcrm3 addc addc OP1_1 OP2_4 memgr8 regmem8 HI) | |
1088 | (arithmetic8 addcrm addc addc OP1_1 OP2_2 reg8 memory HI) | |
1089 | (arithmetic9 addcrm1 addc addc OP1_1 OP2_4 memory reg8 HI) | |
1090 | (arithmetic8 subcrm3 subc subc OP1_3 OP2_2 regmem8 memgr8 HI) | |
1091 | (arithmetic9 subcrm2 subc subc OP1_3 OP2_4 memgr8 regmem8 HI) | |
1092 | (arithmetic8 subcrm1 subc subc OP1_3 OP2_2 reg8 memory HI) | |
1093 | (arithmetic9 subcrm subc subc OP1_3 OP2_4 memory reg8 HI) | |
1094 | (arithmetic8 addcbrm2 addcb addc OP1_1 OP2_3 regbmem8 memgr8 QI) | |
1095 | (arithmetic9 addcbrm3 addcb addc OP1_1 OP2_5 memgr8 regbmem8 QI) | |
1096 | (arithmetic8 addcbrm addcb addc OP1_1 OP2_3 regb8 memory QI) | |
1097 | (arithmetic9 addcbrm1 addcb addc OP1_1 OP2_5 memory regb8 QI) | |
1098 | (arithmetic8 subcbrm3 subcb subc OP1_3 OP2_3 regbmem8 memgr8 QI) | |
1099 | (arithmetic9 subcbrm2 subcb subc OP1_3 OP2_5 memgr8 regbmem8 QI) | |
1100 | (arithmetic8 subcbrm1 subcb subc OP1_3 OP2_3 regb8 memory QI) | |
1101 | (arithmetic9 subcbrm subcb subc OP1_3 OP2_5 memory regb8 QI) | |
1102 | ||
1103 | ; MUL Rwn,Rwm | |
1104 | (dni muls "signed multiplication" | |
1105 | ((PIPE OS) (IDOC ALU)) | |
1106 | "mul $src1,$src2" | |
1107 | (+ OP1_0 OP2_11 src1 src2) | |
ab5f875d | 1108 | (nop) ;; FIXME: (reg SI h-md 0) |
98693b73 NC |
1109 | () |
1110 | ) | |
1111 | ; MULU Rwn,Rwm | |
1112 | (dni mulu "unsigned multiplication" | |
1113 | ((PIPE OS) (IDOC ALU)) | |
1114 | "mulu $src1,$src2" | |
1115 | (+ OP1_1 OP2_11 src1 src2) | |
ab5f875d | 1116 | (nop) ;; FIXME: (reg SI h-md 0) |
98693b73 NC |
1117 | () |
1118 | ) | |
1119 | ; DIV Rwn | |
1120 | (dni div "16-by-16 signed division" | |
1121 | ((PIPE OS) (IDOC ALU)) | |
1122 | "div $srdiv" | |
1123 | (+ OP1_4 OP2_11 srdiv ) | |
1124 | (sequence () | |
1125 | (set HI (reg HI h-cr 6) (div HI (reg HI h-cr 6) srdiv)) | |
1126 | (set HI (reg HI h-cr 7) (mod HI (reg HI h-cr 6) srdiv)) | |
1127 | ) | |
1128 | () | |
1129 | ) | |
1130 | ; DIVL Rwn | |
1131 | (dni divl "32-by16 signed division" | |
1132 | ((PIPE OS) (IDOC ALU)) | |
1133 | "divl $srdiv" | |
1134 | (+ OP1_6 OP2_11 srdiv ) | |
1135 | (sequence () | |
ab5f875d DE |
1136 | (set HI (reg HI h-cr 6) 0) ;; FIXME: (div SI (reg SI h-md 0) srdiv)) |
1137 | (set HI (reg HI h-cr 7) 0) ;; FIXME: (mod SI (reg SI h-md 0) srdiv)) | |
98693b73 NC |
1138 | ) |
1139 | () | |
1140 | ) | |
1141 | ; DIVLU Rwn | |
1142 | (dni divlu "32-by16 unsigned division" | |
1143 | ((PIPE OS) (IDOC ALU)) | |
1144 | "divlu $srdiv" | |
1145 | (+ OP1_7 OP2_11 srdiv ) | |
1146 | (sequence () | |
ab5f875d DE |
1147 | (set HI (reg HI h-cr 6) 0) ;; FIXME: (udiv SI (reg SI h-md 0) srdiv)) |
1148 | (set HI (reg HI h-cr 7) 0) ;; FIXME: (umod SI (reg SI h-md 0) srdiv)) | |
98693b73 NC |
1149 | ) |
1150 | () | |
1151 | ) | |
1152 | ; DIVU Rwn | |
1153 | (dni divu "16-by-16 unsigned division" | |
1154 | ((PIPE OS) (IDOC ALU)) | |
1155 | "divu $srdiv" | |
1156 | (+ OP1_5 OP2_11 srdiv ) | |
1157 | (sequence () | |
1158 | (set HI (reg HI h-cr 6) (udiv HI (reg HI h-cr 6) srdiv)) | |
1159 | (set HI (reg HI h-cr 7) (umod HI (reg HI h-cr 6) srdiv)) | |
1160 | ) | |
1161 | () | |
1162 | ) | |
1163 | ||
1164 | ;Integer one's complement | |
1165 | ; CPL Rwn | |
1166 | (dni cpl "Integer Ones complement" | |
1167 | ((PIPE OS) (IDOC MISC)) | |
1168 | "cpl $dr" | |
1169 | (+ OP1_9 OP2_1 dr (f-op-bit4 0)) | |
1170 | (set dr (inv HI dr)) | |
1171 | () | |
1172 | ) | |
1173 | ||
1174 | ;Bytes one's complement | |
1175 | ; CPLB Rbn | |
1176 | (dni cplb "Byte Ones complement" | |
1177 | ((PIPE OS) (IDOC MISC)) | |
1178 | "cplb $drb" | |
1179 | (+ OP1_11 OP2_1 drb (f-op-bit4 0)) | |
1180 | (set drb (inv QI drb)) | |
1181 | () | |
1182 | ) | |
1183 | ;Integer two's complement | |
1184 | ; NEG Rwn | |
1185 | (dni neg "Integer two's complement" | |
1186 | ((PIPE OS) (IDOC MISC)) | |
1187 | "neg $dr" | |
1188 | (+ OP1_8 OP2_1 dr (f-op-bit4 0)) | |
1189 | (set dr (neg HI dr)) | |
1190 | () | |
1191 | ) | |
1192 | ;Bytes two's complement | |
1193 | ; NEGB Rbn | |
1194 | (dni negb "byte twos complement" | |
1195 | ((PIPE OS) (IDOC MISC)) | |
1196 | "negb $drb" | |
1197 | (+ OP1_10 OP2_1 drb (f-op-bit4 0)) | |
1198 | (set drb (neg QI drb)) | |
1199 | () | |
1200 | ) | |
1201 | ||
1202 | ;**************************************************************** | |
1203 | ;logical insn | |
1204 | ;**************************************************************** | |
1205 | ;and/or/xor registers | |
1206 | (define-pmacro (logical name insn insn1 opc1 opc2 op1 op2 mode) | |
1207 | (dni name | |
1208 | (.str name "logical" ) | |
1209 | ((PIPE OS) (IDOC ALU)) | |
1210 | (.str insn " $"op1 ",$"op2) | |
1211 | (+ opc1 opc2 op1 op2) | |
1212 | (set mode op1 (insn1 mode op1 op2)) | |
1213 | () | |
1214 | ) | |
1215 | ) | |
1216 | ||
1217 | (logical andr and and OP1_6 OP2_0 dr sr HI) | |
1218 | (logical orr or or OP1_7 OP2_0 dr sr HI) | |
1219 | (logical xorr xor xor OP1_5 OP2_0 dr sr HI) | |
1220 | (logical andbr andb and OP1_6 OP2_1 drb srb QI) | |
1221 | (logical orbr orb or OP1_7 OP2_1 drb srb QI) | |
1222 | (logical xorbr xorb xor OP1_5 OP2_1 drb srb QI) | |
1223 | ||
1224 | ;and/or/xor register and immediate | |
1225 | (define-pmacro (logical1 name insn insn1 opc1 opc2 op1 op2 mode) | |
1226 | (dni name | |
1227 | (.str name "logical" ) | |
1228 | ((PIPE OS) (IDOC ALU)) | |
1229 | (.str insn " $"op1 ",$hash$"op2) | |
1230 | (+ opc1 opc2 op1 (f-op-bit1 0) op2) | |
1231 | (set mode op1 (insn1 mode op1 op2)) | |
1232 | () | |
1233 | ) | |
1234 | ) | |
1235 | (logical1 andri and and OP1_6 OP2_8 dr uimm3 HI) | |
1236 | (logical1 orri or or OP1_7 OP2_8 dr uimm3 HI) | |
1237 | (logical1 xorri xor xor OP1_5 OP2_8 dr uimm3 HI) | |
1238 | (logical1 andbri andb and OP1_6 OP2_9 drb uimm3 QI) | |
1239 | (logical1 orbri orb or OP1_7 OP2_9 drb uimm3 QI) | |
1240 | (logical1 xorbri xorb xor OP1_5 OP2_9 drb uimm3 QI) | |
1241 | ||
1242 | ;and/or/xor register and immediate | |
1243 | (define-pmacro (logical2 name insn insn1 opc1 opc2 op1 op2 mode) | |
1244 | (dni name | |
1245 | (.str name "logical" ) | |
1246 | ((PIPE OS) (IDOC ALU)) | |
1247 | (.str insn " $"op1 ",$hash$"op2) | |
1248 | (+ opc1 opc2 op1 op2) | |
1249 | (set mode op1 (insn1 mode op1 op2)) | |
1250 | () | |
1251 | ) | |
1252 | ) | |
1253 | (logical2 andrim and and OP1_6 OP2_6 reg8 uimm16 HI) | |
1254 | (logical2 orrim or or OP1_7 OP2_6 reg8 uimm16 HI) | |
1255 | (logical2 xorrim xor xor OP1_5 OP2_6 reg8 uimm16 HI) | |
1256 | ||
1257 | ;and/or/xor register and immediate | |
1258 | (define-pmacro (logical3 name insn insn1 opc1 opc2 op1 op2 mode) | |
1259 | (dni name | |
1260 | (.str name "logical" ) | |
1261 | ((PIPE OS) (IDOC ALU)) | |
1262 | (.str insn " $"op1 ",$hash$"op2) | |
1263 | (+ opc1 opc2 op1 op2 (f-op-bit8 0)) | |
1264 | (set mode op1 (insn1 mode op1 op2)) | |
1265 | () | |
1266 | ) | |
1267 | ) | |
1268 | (logical3 andbrim andb and OP1_6 OP2_7 regb8 uimm8 QI) | |
1269 | (logical3 orbrim orb or OP1_7 OP2_7 regb8 uimm8 QI) | |
1270 | (logical3 xorbrim xorb xor OP1_5 OP2_7 regb8 uimm8 QI) | |
1271 | ||
1272 | ;and/or/xor register and indirect memory | |
1273 | (define-pmacro (logical4 name insn insn1 opc1 opc2 op1 op2 mode) | |
1274 | (dni name | |
1275 | (.str name "logical" ) | |
1276 | ((PIPE OS) (IDOC ALU)) | |
1277 | (.str insn " $"op1 ",[$"op2"]") | |
1278 | (+ opc1 opc2 op1 (f-op-bit2 2) op2) | |
1279 | (set mode op1 (insn1 mode op1 (mem HI op2))) | |
1280 | () | |
1281 | ) | |
1282 | ) | |
1283 | (logical4 and2 and and OP1_6 OP2_8 dr sr2 HI) | |
1284 | (logical4 or2 or or OP1_7 OP2_8 dr sr2 HI) | |
1285 | (logical4 xor2 xor xor OP1_5 OP2_8 dr sr2 HI) | |
1286 | (logical4 andb2 andb and OP1_6 OP2_9 drb sr2 QI) | |
1287 | (logical4 orb2 orb or OP1_7 OP2_9 drb sr2 QI) | |
1288 | (logical4 xorb2 xorb xor OP1_5 OP2_9 drb sr2 QI) | |
1289 | ||
1290 | ;and/or/xor register and indirect memory post increment | |
1291 | (define-pmacro (logical5 name insn insn1 opc1 opc2 op1 op2 mode) | |
1292 | (dni name | |
1293 | (.str name "logical" ) | |
1294 | ((PIPE OS) (IDOC ALU)) | |
1295 | (.str insn " $"op1 ",[$"op2"+]") | |
1296 | (+ opc1 opc2 op1 (f-op-bit2 3) op2) | |
1297 | (sequence () | |
1298 | (set mode op1 (insn1 mode op1 (mem HI op2))) | |
1299 | (set HI op2 (add HI op2 (const 2))) | |
1300 | ) | |
1301 | () | |
1302 | ) | |
1303 | ) | |
1304 | (logical5 and2i and and OP1_6 OP2_8 dr sr2 HI) | |
1305 | (logical5 or2i or or OP1_7 OP2_8 dr sr2 HI) | |
1306 | (logical5 xor2i xor xor OP1_5 OP2_8 dr sr2 HI) | |
1307 | (logical5 andb2i andb and OP1_6 OP2_9 drb sr2 QI) | |
1308 | (logical5 orb2i orb or OP1_7 OP2_9 drb sr2 QI) | |
1309 | (logical5 xorb2i xorb xor OP1_5 OP2_9 drb sr2 QI) | |
1310 | ||
1311 | ;add/sub register and immediate | |
1312 | (define-pmacro (logical7 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
1313 | (dni name | |
1314 | (.str name "arithmetic" ) | |
1315 | ((PIPE OS) (IDOC ALU)) | |
1316 | (.str insn " $"dir"$"op1 ",$"op2) | |
1317 | (+ opc1 opc2 op1 op2) | |
1318 | (set (mem HI op1) (insn1 (mem HI op1) op2 )) | |
1319 | () | |
1320 | ) | |
1321 | ) | |
1322 | (logical7 andpofr and and OP1_6 OP2_2 reg8 upof16 HI "pof") | |
1323 | (logical7 orpofr or or OP1_7 OP2_2 reg8 upof16 HI "pof") | |
1324 | (logical7 xorpofr xor xor OP1_5 OP2_2 reg8 upof16 HI "pof") | |
1325 | (logical7 andbpofr andb and OP1_6 OP2_3 regb8 upof16 QI "pof") | |
1326 | (logical7 orbpofr orb or OP1_7 OP2_3 regb8 upof16 QI "pof") | |
1327 | (logical7 xorbpofr xorb xor OP1_5 OP2_3 regb8 upof16 QI "pof") | |
1328 | ||
1329 | ;add/sub register and immediate | |
1330 | (define-pmacro (logical8 name insn insn1 opc1 opc2 op1 op2 mode dir) | |
1331 | (dni name | |
1332 | (.str name "arithmetic" ) | |
1333 | ((PIPE OS) (IDOC ALU)) | |
1334 | (.str insn " $"dir"$"op1 ",$"op2) | |
1335 | (+ opc1 opc2 op1 op2) | |
1336 | (set (mem HI op1) (insn1 (mem HI op1) op2 )) | |
1337 | () | |
1338 | ) | |
1339 | ) | |
1340 | (logical8 andrpofr and and OP1_6 OP2_4 upof16 reg8 HI "pof") | |
1341 | (logical8 orrpofr or or OP1_7 OP2_4 upof16 reg8 HI "pof") | |
1342 | (logical8 xorrpofr xor xor OP1_5 OP2_4 upof16 reg8 HI "pof") | |
1343 | (logical8 andbrpofr andb and OP1_6 OP2_5 upof16 regb8 QI "pof") | |
1344 | (logical8 orbrpofr orb or OP1_7 OP2_5 upof16 regb8 QI "pof") | |
1345 | (logical8 xorbrpofr xorb xor OP1_5 OP2_5 upof16 regb8 QI "pof") | |
1346 | ||
1347 | ;and/or/xor register and direct memory | |
1348 | (define-pmacro (logical6 name insn insn1 opc1 opc2 op1 op2 mode) | |
1349 | (dni name | |
1350 | (.str name "arithmetic" ) | |
1351 | ((PIPE OS) (IDOC ALU)) | |
1352 | (.str insn " $"op1 ",$"op2) | |
1353 | (+ opc1 opc2 op1 op2) | |
1354 | (set mode op1 (insn1 mode op1 op2)) | |
1355 | () | |
1356 | ) | |
1357 | ) | |
1358 | ||
1359 | ;and/or/xor register and direct memory | |
1360 | (define-pmacro (logical7 name insn insn1 opc1 opc2 op1 op2 mode) | |
1361 | (dni name | |
1362 | (.str name "arithmetic" ) | |
1363 | ((PIPE OS) (IDOC ALU)) | |
1364 | (.str insn " $"op1 ",$"op2) | |
1365 | (+ opc1 opc2 op2 op1) | |
1366 | (set (mem HI op1) (insn1 (mem HI op1) op2)) | |
1367 | () | |
1368 | ) | |
1369 | ) | |
1370 | (logical6 andrm2 and and OP1_6 OP2_2 regmem8 memgr8 HI) | |
1371 | (logical7 andrm3 and and OP1_6 OP2_4 memgr8 regmem8 HI) | |
1372 | (logical6 andrm and and OP1_6 OP2_2 reg8 memory HI) | |
1373 | (logical7 andrm1 and and OP1_6 OP2_4 memory reg8 HI) | |
1374 | (logical6 orrm3 or or OP1_7 OP2_2 regmem8 memgr8 HI) | |
1375 | (logical7 orrm2 or or OP1_7 OP2_4 memgr8 regmem8 HI) | |
1376 | (logical6 orrm1 or or OP1_7 OP2_2 reg8 memory HI) | |
1377 | (logical7 orrm or or OP1_7 OP2_4 memory reg8 HI) | |
1378 | (logical6 xorrm3 xor xor OP1_5 OP2_2 regmem8 memgr8 HI) | |
1379 | (logical7 xorrm2 xor xor OP1_5 OP2_4 memgr8 regmem8 HI) | |
1380 | (logical6 xorrm1 xor xor OP1_5 OP2_2 reg8 memory HI) | |
1381 | (logical7 xorrm xor xor OP1_5 OP2_4 memory reg8 HI) | |
1382 | (logical6 andbrm2 andb and OP1_6 OP2_3 regbmem8 memgr8 QI) | |
1383 | (logical7 andbrm3 andb and OP1_6 OP2_5 memgr8 regbmem8 QI) | |
1384 | (logical6 andbrm andb and OP1_6 OP2_3 regb8 memory QI) | |
1385 | (logical7 andbrm1 andb and OP1_6 OP2_5 memory regb8 QI) | |
1386 | (logical6 orbrm3 orb or OP1_7 OP2_3 regbmem8 memgr8 QI) | |
1387 | (logical7 orbrm2 orb or OP1_7 OP2_5 memgr8 regbmem8 QI) | |
1388 | (logical6 orbrm1 orb or OP1_7 OP2_3 regb8 memory QI) | |
1389 | (logical7 orbrm orb or OP1_7 OP2_5 memory regb8 QI) | |
1390 | (logical6 xorbrm3 xorb xor OP1_5 OP2_3 regbmem8 memgr8 QI) | |
1391 | (logical7 xorbrm2 xorb xor OP1_5 OP2_5 memgr8 regbmem8 QI) | |
1392 | (logical6 xorbrm1 xorb xor OP1_5 OP2_3 regb8 memory QI) | |
1393 | (logical7 xorbrm xorb xor OP1_5 OP2_5 memory regb8 QI) | |
1394 | ||
1395 | ;**************************************************************** | |
1396 | ;logical insn | |
1397 | ;**************************************************************** | |
1398 | ;mov registers | |
1399 | (define-pmacro (move name insn opc1 opc2 op1 op2 mode) | |
1400 | (dni name | |
1401 | (.str name "mov registers" ) | |
1402 | ((PIPE OS) (IDOC MOVE)) | |
1403 | (.str insn " $"op1 ",$"op2) | |
1404 | (+ opc1 opc2 op1 op2) | |
1405 | (set mode op1 op2) | |
1406 | () | |
1407 | ) | |
1408 | ) | |
1409 | (move movr mov OP1_15 OP2_0 dr sr HI) | |
1410 | (move movrb movb OP1_15 OP2_1 drb srb HI) | |
1411 | ||
1412 | ;mov register and immediate | |
1413 | (define-pmacro (move1 name insn opc1 opc2 op1 op2 mode) | |
1414 | (dni name | |
1415 | (.str name "move" ) | |
1416 | ((PIPE OS) (IDOC MOVE)) | |
1417 | (.str insn " $"op1 ",$hash$"op2) | |
1418 | (+ opc1 opc2 op2 op1) | |
1419 | (set mode op1 op2) | |
1420 | () | |
1421 | ) | |
1422 | ) | |
1423 | (move1 movri mov OP1_14 OP2_0 dri u4 HI) | |
1424 | (move1 movbri movb OP1_14 OP2_1 srb u4 QI) | |
1425 | ||
1426 | ; MOV Rwn,#data16 | |
1427 | (dni movi "move immediate to register" | |
1428 | ((PIPE OS) (IDOC MOVE)) | |
1429 | "mov $reg8,$hash$uimm16" | |
1430 | (+ OP1_14 OP2_6 reg8 uimm16) | |
1431 | (set HI reg8 uimm16) | |
1432 | () | |
1433 | ) | |
1434 | ||
1435 | ; MOVB reg,#data8 | |
1436 | (dni movbi "move immediate to register" | |
1437 | ((PIPE OS) (IDOC MOVE)) | |
1438 | "movb $regb8,$hash$uimm8" | |
1439 | (+ OP1_14 OP2_7 regb8 uimm8 (f-op-bit8 0)) | |
1440 | (set QI regb8 uimm8) | |
1441 | () | |
1442 | ) | |
1443 | ||
1444 | ;move and indirect memory | |
1445 | (define-pmacro (mov2 name insn opc1 opc2 op1 op2 mode) | |
1446 | (dni name | |
1447 | (.str name "move" ) | |
1448 | ((PIPE OS) (IDOC MOVE)) | |
1449 | (.str insn " $"op1 ",[$"op2"]") | |
1450 | (+ opc1 opc2 op1 op2) | |
1451 | (set mode op1 (mem HI op2)) | |
1452 | () | |
1453 | ) | |
1454 | ) | |
1455 | (mov2 movr2 mov OP1_10 OP2_8 dr sr HI) | |
1456 | (mov2 movbr2 movb OP1_10 OP2_9 drb sr QI) | |
1457 | ||
1458 | ;move and indirect memory | |
1459 | (define-pmacro (mov3 name insn opc1 opc2 op1 op2 mode) | |
1460 | (dni name | |
1461 | (.str name "move" ) | |
1462 | ((PIPE OS) (IDOC MOVE)) | |
1463 | (.str insn " [$"op2 "],$"op1) | |
1464 | (+ opc1 opc2 op1 op2) | |
1465 | (set mode op1 (mem HI op2)) | |
1466 | () | |
1467 | ) | |
1468 | ) | |
1469 | (mov3 movri2 mov OP1_11 OP2_8 dr sr HI) | |
1470 | (mov3 movbri2 movb OP1_11 OP2_9 drb sr QI) | |
1471 | ||
1472 | ;move and indirect memory | |
1473 | (define-pmacro (mov4 name insn opc1 opc2 op1 op2 mode) | |
1474 | (dni name | |
1475 | (.str name "move" ) | |
1476 | ((PIPE OS) (IDOC MOVE)) | |
1477 | (.str insn " [-$"op2 "],$"op1) | |
1478 | (+ opc1 opc2 op1 op2) | |
ec84cc2b | 1479 | (sequence () |
98693b73 NC |
1480 | (set op1 (sub op2 (const HI 2))) |
1481 | (set HI (mem HI op2) op1) | |
1482 | ) | |
1483 | () | |
1484 | ) | |
1485 | ) | |
1486 | (mov4 movri3 mov OP1_8 OP2_8 dr sr HI) | |
1487 | (mov4 movbri3 movb OP1_8 OP2_9 drb sr QI) | |
1488 | ||
1489 | ;mov register and indirect memory post increment | |
1490 | (define-pmacro (mov5 name insn opc1 opc2 op1 op2 mode) | |
1491 | (dni name | |
1492 | (.str name "move" ) | |
1493 | ((PIPE OS) (IDOC MOVE)) | |
1494 | (.str insn " $"op1 ",[$"op2"+]") | |
1495 | (+ opc1 opc2 op1 op2) | |
1496 | (sequence () | |
1497 | (set mode op1 (mem HI op2)) | |
1498 | (set HI op2 (add HI op2 (const 2))) | |
1499 | ) | |
1500 | () | |
1501 | ) | |
1502 | ) | |
1503 | (mov5 mov2i mov OP1_9 OP2_8 dr sr HI) | |
1504 | (mov5 movb2i movb OP1_9 OP2_9 drb sr HI) | |
1505 | ||
1506 | ;mov indirect memory | |
1507 | (define-pmacro (mov6 name insn opc1 opc2 op1 op2 mode) | |
1508 | (dni name | |
1509 | (.str name "move" ) | |
1510 | ((PIPE OS) (IDOC MOVE)) | |
1511 | (.str insn " [$"op1 "],[$"op2"]") | |
1512 | (+ opc1 opc2 op1 op2) | |
1513 | (set HI (mem HI op1) (mem HI op2)) | |
1514 | () | |
1515 | ) | |
1516 | ) | |
1517 | (mov6 mov6i mov OP1_12 OP2_8 dr sr HI) | |
1518 | (mov6 movb6i movb OP1_12 OP2_9 dr sr HI) | |
1519 | ||
1520 | ;mov indirect memory | |
1521 | (define-pmacro (mov7 name insn opc1 opc2 op1 op2 mode) | |
1522 | (dni name | |
1523 | (.str name "move" ) | |
1524 | ((PIPE OS) (IDOC MOVE)) | |
1525 | (.str insn " [$"op1 "+],[$"op2"]") | |
1526 | (+ opc1 opc2 op1 op2) | |
1527 | (sequence () | |
1528 | (set mode (mem mode op1) (mem mode op2)) | |
1529 | (set mode op1 (add mode op1 (const mode 2))) | |
1530 | ) | |
1531 | () | |
1532 | ) | |
1533 | ) | |
1534 | (mov7 mov7i mov OP1_13 OP2_8 dr sr HI) | |
1535 | (mov7 movb7i movb OP1_13 OP2_9 dr sr HI) | |
1536 | ||
1537 | ;mov indirect memory | |
1538 | (define-pmacro (mov8 name insn opc1 opc2 op1 op2 mode) | |
1539 | (dni name | |
1540 | (.str name "move" ) | |
1541 | ((PIPE OS) (IDOC MOVE)) | |
1542 | (.str insn " [$"op1 "],[$"op2"+]") | |
1543 | (+ opc1 opc2 op1 op2) | |
1544 | (sequence () | |
1545 | (set mode (mem mode op1) (mem mode op2)) | |
1546 | (set mode op2 (add mode op2 (const mode 2))) | |
1547 | ) | |
1548 | () | |
1549 | ) | |
1550 | ) | |
1551 | (mov8 mov8i mov OP1_14 OP2_8 dr sr HI) | |
1552 | (mov8 movb8i movb OP1_14 OP2_9 dr sr HI) | |
1553 | ||
1554 | ;mov indirect memory | |
1555 | (define-pmacro (mov9 name insn opc1 opc2 op1 op2 mode) | |
1556 | (dni name | |
1557 | (.str name "move" ) | |
1558 | ((PIPE OS) (IDOC MOVE)) | |
1559 | (.str insn " $"op1 ",[$"op2"+$hash$"uimm16"]") | |
1560 | (+ opc1 opc2 op1 op2 uimm16) | |
ec84cc2b | 1561 | (sequence ((mode tmp1)) |
98693b73 NC |
1562 | (set mode tmp1 (add HI op2 uimm16)) |
1563 | (set mode op1 (mem HI tmp1)) | |
1564 | ) | |
1565 | () | |
1566 | ) | |
1567 | ) | |
1568 | (mov9 mov9i mov OP1_13 OP2_4 dr sr HI) | |
1569 | (mov9 movb9i movb OP1_15 OP2_4 drb sr QI) | |
1570 | ||
1571 | ;mov indirect memory | |
1572 | (define-pmacro (mov10 name insn opc1 opc2 op1 op2 mode) | |
1573 | (dni name | |
1574 | (.str name "move" ) | |
1575 | ((PIPE OS) (IDOC MOVE)) | |
1576 | (.str insn " [$"op2"+$hash$"uimm16 "],$"op1) | |
1577 | (+ opc1 opc2 op1 op2 uimm16) | |
ec84cc2b | 1578 | (sequence ((mode tmp1)) |
98693b73 NC |
1579 | (set mode tmp1 (add HI op1 uimm16)) |
1580 | (set mode (mem HI tmp1) op1) | |
1581 | ) | |
1582 | () | |
1583 | ) | |
1584 | ) | |
1585 | (mov10 mov10i mov OP1_12 OP2_4 dr sr HI) | |
1586 | (mov10 movb10i movb OP1_14 OP2_4 drb sr QI) | |
1587 | ||
1588 | ;move and indirect memory | |
1589 | (define-pmacro (mov11 name insn opc1 opc2 op1 op2 mode) | |
1590 | (dni name | |
1591 | (.str name "move" ) | |
1592 | ((PIPE OS) (IDOC MOVE)) | |
1593 | (.str insn " [$"op1 "],$"op2) | |
1594 | (+ opc1 opc2 (f-op-lbit4 0) op1 op2) | |
1595 | (set (mem mode op1) (mem HI op2)) | |
1596 | () | |
1597 | ) | |
1598 | ) | |
1599 | (mov11 movri11 mov OP1_8 OP2_4 src2 memory HI) | |
1600 | (mov11 movbri11 movb OP1_10 OP2_4 src2 memory HI) | |
1601 | ||
1602 | ;move and indirect memory | |
1603 | (define-pmacro (mov12 name insn opc1 opc2 op1 op2 mode) | |
1604 | (dni name | |
1605 | (.str name "move" ) | |
1606 | ((PIPE OS) (IDOC MOVE)) | |
1607 | (.str insn " $"op2 ",[$"op1"]") | |
1608 | (+ opc1 opc2 (f-op-lbit4 0) op1 op2) | |
1609 | (set (mem HI op2) (mem mode op1)) | |
1610 | () | |
1611 | ) | |
1612 | ) | |
1613 | (mov12 movri12 mov OP1_9 OP2_4 src2 memory HI) | |
1614 | (mov12 movbri12 movb OP1_11 OP2_4 src2 memory HI) | |
1615 | ||
1616 | (define-pmacro (movemem3 name insn opc1 opc2 op1 op2 dir) | |
1617 | (dni name | |
1618 | (.str name "move" ) | |
1619 | ((PIPE OS) (IDOC MOVE)) | |
1620 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
1621 | (+ opc1 opc2 op1 op2) | |
1622 | (set HI op1 op2) | |
1623 | () | |
1624 | ) | |
1625 | ) | |
1626 | (movemem3 movehm5 mov OP1_14 OP2_6 regoff8 upof16 "pof") | |
1627 | (movemem3 movehm6 mov OP1_14 OP2_6 regoff8 upag16 "pag") | |
1628 | (movemem3 movehm7 mov OP1_14 OP2_6 regoff8 useg16 "segm") | |
1629 | (movemem3 movehm8 mov OP1_14 OP2_6 regoff8 usof16 "sof") | |
1630 | ||
1631 | (define-pmacro (movemem4 name insn opc1 opc2 op1 op2 dir) | |
1632 | (dni name | |
1633 | (.str name "move" ) | |
1634 | ((PIPE OS) (IDOC MOVE)) | |
1635 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
1636 | (+ opc1 opc2 op1 op2 (f-op-bit8 0)) | |
1637 | (set QI op1 op2) | |
1638 | () | |
1639 | ) | |
1640 | ) | |
1641 | (movemem4 movehm9 movb OP1_14 OP2_7 regb8 uimm8 "pof") | |
1642 | (movemem4 movehm10 movb OP1_14 OP2_7 regoff8 uimm8 "pag") | |
1643 | ||
1644 | (define-pmacro (movemem name insn opc1 opc2 op1 op2 mode dir) | |
1645 | (dni name | |
1646 | (.str name "move" ) | |
1647 | ((PIPE OS) (IDOC MOVE)) | |
1648 | (.str insn " $"op1 ",$"dir"$"op2) | |
1649 | (+ opc1 opc2 op1 op2) | |
1650 | (set mode op1 (mem HI op2)) | |
1651 | () | |
1652 | ) | |
1653 | ) | |
1654 | (movemem movrmp mov OP1_15 OP2_2 regoff8 upof16 HI "pof") | |
1655 | (movemem movrmp1 movb OP1_15 OP2_3 regb8 upof16 QI "pof") | |
1656 | (movemem movrmp2 mov OP1_15 OP2_2 regoff8 upag16 HI "pag") | |
1657 | (movemem movrmp3 movb OP1_15 OP2_3 regb8 upag16 QI "pag") | |
1658 | ||
1659 | (define-pmacro (movemem1 name insn opc1 opc2 op1 op2 dir) | |
1660 | (dni name | |
1661 | (.str name "move" ) | |
1662 | ((PIPE OS) (IDOC MOVE)) | |
1663 | (.str insn " $"dir"$"op1 ",$"op2) | |
1664 | (+ opc1 opc2 op2 op1) | |
1665 | (set (mem HI op1) op2 ) | |
1666 | () | |
1667 | ) | |
1668 | ) | |
1669 | (movemem1 movrmp4 mov OP1_15 OP2_6 upof16 regoff8 "pof") | |
1670 | (movemem1 movrmp5 movb OP1_15 OP2_7 upof16 regb8 "pof") | |
1671 | ||
1672 | (define-pmacro (movemem2 name insn opc1 opc2 op1 op2 mode dir) | |
1673 | (dni name | |
1674 | (.str name "move" ) | |
1675 | ((PIPE OS) (IDOC MOVE)) | |
1676 | (.str insn " $"op1 ",$hash$"dir"$"op2) | |
1677 | (+ opc1 opc2 op2 op1) | |
1678 | (set mode op1 op2) | |
1679 | () | |
1680 | ) | |
1681 | ) | |
1682 | (movemem2 movehm1 mov OP1_14 OP2_0 dri u4 HI "pof") | |
1683 | (movemem2 movehm2 movb OP1_14 OP2_1 srb u4 QI "pof") | |
1684 | (movemem2 movehm3 mov OP1_14 OP2_0 dri u4 HI "pag") | |
1685 | (movemem2 movehm4 movb OP1_14 OP2_1 srb u4 QI "pag") | |
1686 | ||
1687 | ;move register and direct memory | |
1688 | (define-pmacro (move12 name insn opc1 opc2 op1 op2 mode) | |
1689 | (dni name | |
1690 | (.str name "move" ) | |
1691 | ((PIPE OS) (IDOC MOVE)) | |
1692 | (.str insn " $"op1 ",$"op2) | |
1693 | (+ opc1 opc2 op1 op2) | |
1694 | (set mode op1 (mem HI op2)) | |
1695 | () | |
1696 | ) | |
1697 | ) | |
1698 | ||
1699 | ;move register and direct memory | |
1700 | (define-pmacro (move13 name insn opc1 opc2 op1 op2 mode) | |
1701 | (dni name | |
1702 | (.str name "move" ) | |
1703 | ((PIPE OS) (IDOC MOVE)) | |
1704 | (.str insn " $"op1 ",$"op2) | |
1705 | (+ opc1 opc2 op2 op1) | |
1706 | (set (mem HI op1) op2) | |
1707 | () | |
1708 | ) | |
1709 | ) | |
1710 | (move12 mve12 mov OP1_15 OP2_2 regmem8 memgr8 HI) | |
1711 | (move13 mve13 mov OP1_15 OP2_6 memgr8 regmem8 HI) | |
1712 | (move12 mover12 mov OP1_15 OP2_2 reg8 memory HI) | |
1713 | (move13 mvr13 mov OP1_15 OP2_6 memory reg8 HI) | |
1714 | (move12 mver12 movb OP1_15 OP2_3 regbmem8 memgr8 QI) | |
1715 | (move13 mver13 movb OP1_15 OP2_7 memgr8 regbmem8 QI) | |
1716 | (move12 movr12 movb OP1_15 OP2_3 regb8 memory QI) | |
1717 | (move13 movr13 movb OP1_15 OP2_7 memory regb8 QI) | |
1718 | ||
1719 | ; MOVBS Rw,Rb | |
1720 | (dni movbsrr "mov byte register with sign extension to word register" | |
1721 | ((PIPE OS) (IDOC MOVE)) | |
1722 | "movbs $sr,$drb" | |
1723 | (+ OP1_13 OP2_0 drb sr) | |
1724 | (sequence () | |
ec84cc2b DE |
1725 | (if (and QI drb (const 128)) |
1726 | (set HI sr (or HI (const HI 65280) drb))) | |
98693b73 NC |
1727 | (set HI sr (and HI (const HI 255) drb)) |
1728 | ) | |
1729 | () | |
1730 | ) | |
1731 | ||
1732 | ; MOVBZ Rw,Rb | |
1733 | (dni movbzrr "mov byte register with zero extension to word register" | |
1734 | ((PIPE OS) (IDOC MOVE)) | |
1735 | "movbz $sr,$drb" | |
1736 | (+ OP1_12 OP2_0 drb sr) | |
1737 | (set HI sr (and HI (const HI 255) drb)) | |
1738 | () | |
1739 | ) | |
1740 | ||
1741 | ; MOVBS reg,POF mem | |
1742 | (dni movbsrpofm "mov memory to byte register" | |
1743 | ((PIPE OS) (IDOC MOVE)) | |
1744 | "movbs $regmem8,$pof$upof16" | |
1745 | (+ OP1_13 OP2_2 regmem8 upof16) | |
1746 | (set QI regmem8 (mem HI upof16)) | |
1747 | () | |
1748 | ) | |
1749 | ||
1750 | ; MOVBS pof,reg | |
1751 | (dni movbspofmr "mov memory to byte register" | |
1752 | ((PIPE OS) (IDOC MOVE)) | |
1753 | "movbs $pof$upof16,$regbmem8" | |
1754 | (+ OP1_13 OP2_5 upof16 regbmem8 ) | |
1755 | (set QI (mem HI upof16) regbmem8) | |
1756 | () | |
1757 | ) | |
1758 | ||
1759 | ; MOVBZ reg,POF mem | |
1760 | (dni movbzrpofm "mov memory to byte register" | |
1761 | ((PIPE OS) (IDOC MOVE)) | |
1762 | "movbz $reg8,$pof$upof16" | |
1763 | (+ OP1_12 OP2_2 reg8 upof16) | |
1764 | (set QI reg8 (mem HI upof16)) | |
1765 | () | |
1766 | ) | |
1767 | ||
1768 | ; MOVBZ pof,reg | |
1769 | (dni movbzpofmr "mov memory to byte register" | |
1770 | ((PIPE OS) (IDOC MOVE)) | |
1771 | "movbz $pof$upof16,$regb8" | |
1772 | (+ OP1_12 OP2_5 upof16 regb8 ) | |
1773 | (set QI (mem HI upof16) regb8) | |
1774 | () | |
1775 | ) | |
1776 | ||
1777 | ;move register and direct memory | |
1778 | (define-pmacro (move14 name insn opc1 opc2 op1 op2 ) | |
1779 | (dni name | |
1780 | (.str name "move" ) | |
1781 | ((PIPE OS) (IDOC MOVE)) | |
1782 | (.str insn " $"op1 ",$"op2) | |
1783 | (+ opc1 opc2 op1 op2) | |
1784 | (set HI op1 (and HI (const HI 255) (mem QI op2))) | |
1785 | () | |
1786 | ) | |
1787 | ) | |
1788 | ||
1789 | ;move register and direct memory | |
1790 | (define-pmacro (move15 name insn opc1 opc2 op1 op2 ) | |
1791 | (dni name | |
1792 | (.str name "move" ) | |
1793 | ((PIPE OS) (IDOC MOVE)) | |
1794 | (.str insn " $"op1 ",$"op2) | |
1795 | (+ opc1 opc2 op2 op1) | |
1796 | (set HI (mem HI op1) (and HI (const HI 255) op2)) | |
1797 | () | |
1798 | ) | |
1799 | ) | |
1800 | (move14 movebs14 movbs OP1_13 OP2_2 regmem8 memgr8 ) | |
1801 | (move15 movebs15 movbs OP1_13 OP2_5 memgr8 regbmem8 ) | |
1802 | (move14 moverbs14 movbs OP1_13 OP2_2 reg8 memory ) | |
1803 | (move15 movrbs15 movbs OP1_13 OP2_5 memory regb8 ) | |
1804 | (move14 movebz14 movbz OP1_12 OP2_2 regmem8 memgr8 ) | |
1805 | (move15 movebz15 movbz OP1_12 OP2_5 memgr8 regbmem8 ) | |
1806 | (move14 moverbz14 movbz OP1_12 OP2_2 reg8 memory ) | |
1807 | (move15 movrbz15 movbz OP1_12 OP2_5 memory regb8 ) | |
1808 | ||
1809 | ||
1810 | ;mov registers | |
1811 | (define-pmacro (moveb1 name insn opc1 opc2 op1 op2) | |
1812 | (dni name | |
1813 | (.str name "move" ) | |
1814 | ((PIPE OS) (IDOC MOVE)) | |
1815 | (.str insn " $"op2 ",$"op1) | |
1816 | (+ opc1 opc2 op1 op2) | |
1817 | (sequence () | |
ec84cc2b DE |
1818 | (if (and QI op1 (const 128)) |
1819 | (set HI op2 (or HI (const HI 65280) op1))) | |
98693b73 NC |
1820 | (set HI op2 (and HI (const HI 255) op1)) |
1821 | ) | |
1822 | () | |
1823 | ) | |
1824 | ) | |
1825 | (moveb1 movrbs movbs OP1_13 OP2_0 drb sr ) | |
1826 | (moveb1 movrbz movbz OP1_12 OP2_0 drb sr ) | |
1827 | ||
1828 | ||
1829 | ||
1830 | ;jump and call insns | |
1831 | ;****************************************************************** | |
1832 | ;Absolute conditional jump | |
1833 | (define-pmacro (jmpabs name insn) | |
1834 | (dni name | |
1835 | (.str name "Absolute conditional jump" ) | |
1836 | ((PIPE OS) (IDOC JMP)) | |
1837 | (.str insn " $extcond,$caddr") | |
1838 | (+ OP1_14 OP2_10 extcond (f-op-bitone 0) bitone bit01 caddr) | |
1839 | (sequence ((HI tmp1) (HI tmp2)) | |
1840 | (set tmp1 (mem HI caddr)) | |
1841 | (set tmp2 (sub HI pc (mem HI caddr))) | |
ab5f875d | 1842 | (if (gt tmp2 (const 0)) ;; FIXME: (lt tmp2 (const 32)) (eq tmp2 (const 32)) |
98693b73 | 1843 | (set bitone (const 1))) |
ab5f875d | 1844 | (if (lt tmp2 (const 0)) ;; FIXME: (eq tmp2 (const 0)) (gt tmp2 (const 32)) |
98693b73 | 1845 | (set bitone (const 0))) |
ab5f875d | 1846 | (if (eq extcond (const 1)) ;; FIXME: (ne extcond cc_Z)) |
98693b73 NC |
1847 | (set bit01 (const 0)) |
1848 | (set HI pc (mem HI caddr))) | |
ab5f875d | 1849 | (if (ne extcond (const 1)) ;; FIXME: (eq extcond cc_Z)) |
98693b73 NC |
1850 | (set bit01 (const 1)) |
1851 | (set HI pc (add HI pc (const 2)))) | |
1852 | ) | |
1853 | () | |
1854 | ) | |
1855 | ) | |
1856 | ||
1857 | (jmpabs jmpa0 jmpa+) | |
1858 | (jmpabs jmpa1 jmpa) | |
1859 | ||
1860 | ; JMPA- cc,caddr | |
1861 | (dni jmpa- "Absolute conditional jump" | |
1862 | (COND-CTI (PIPE OS) (IDOC JMP)) | |
1863 | "jmpa- $extcond,$caddr" | |
1864 | (+ OP1_14 OP2_10 extcond (f-op-bitone 0) bitone (f-op-1bit 1) caddr) | |
1865 | (sequence ((HI tmp1) (HI tmp2)) | |
1866 | (set tmp1 (mem HI caddr)) | |
1867 | (set tmp2 (sub HI pc (mem HI caddr))) | |
ab5f875d | 1868 | (if (gt tmp2 (const 0)) ;; FIXME: (lt tmp2 (const 32)) (eq tmp2 (const 32)) |
98693b73 | 1869 | (set bitone (const 1))) |
ab5f875d | 1870 | (if (lt tmp2 (const 0)) ;; FIXME: (eq tmp2 (const 0)) (gt tmp2 (const 32)) |
98693b73 NC |
1871 | (set bitone (const 0))) |
1872 | (set HI pc (add HI pc (const 2))) | |
1873 | ) | |
1874 | () | |
1875 | ) | |
1876 | ||
1877 | ; JMPI cc,[Rwn] | |
1878 | (dni jmpi "Indirect conditional jump" | |
1879 | (COND-CTI (PIPE OS) (IDOC JMP)) | |
1880 | "jmpi $icond,[$sr]" | |
1881 | (+ OP1_9 OP2_12 icond sr) | |
1882 | (sequence () | |
1883 | (if (eq icond (const 1)) | |
1884 | (set HI pc (mem HI sr))) | |
1885 | (set HI pc (add HI pc (const 2))) | |
1886 | ) | |
1887 | () | |
1888 | ) | |
1889 | ||
1890 | (define-pmacro (jmprel name insn opc1) | |
1891 | (dni name | |
1892 | (.str name "conditional" ) | |
1893 | (COND-CTI (PIPE OS) (IDOC JMP)) | |
1894 | (.str insn " $cond,$rel") | |
1895 | (+ opc1 OP2_13 rel) | |
1896 | (sequence () | |
1897 | (if (eq cond (const 1)) | |
1898 | (sequence () | |
ec84cc2b DE |
1899 | (if (lt QI rel (const 0)) |
1900 | (sequence () | |
1901 | ;; FIXME: (neg QI rel) | |
1902 | ;; FIXME: (add QI rel (const 1)) | |
1903 | ;; FIXME: (mul QI rel (const 2)) | |
1904 | (set HI pc (sub HI pc rel)) | |
1905 | )) | |
98693b73 NC |
1906 | (set HI pc (add HI pc (mul QI rel (const 2)))) |
1907 | ) | |
1908 | ) | |
1909 | (set HI pc pc) | |
1910 | ) | |
1911 | () | |
1912 | ) | |
1913 | ) | |
1914 | ||
1915 | (jmprel jmpr_nenz jmpr COND_NE_NZ ) | |
1916 | (jmprel jmpr_sgt jmpr COND_SGT ) | |
1917 | (jmprel jmpr_z jmpr COND_Z ) | |
1918 | (jmprel jmpr_v jmpr COND_V ) | |
1919 | (jmprel jmpr_nv jmpr COND_NV ) | |
1920 | (jmprel jmpr_n jmpr COND_N ) | |
1921 | (jmprel jmpr_nn jmpr COND_NN ) | |
1922 | (jmprel jmpr_c jmpr COND_C ) | |
1923 | (jmprel jmpr_nc jmpr COND_NC ) | |
1924 | (jmprel jmpr_eq jmpr COND_EQ ) | |
1925 | (jmprel jmpr_ne jmpr COND_NE ) | |
1926 | (jmprel jmpr_ult jmpr COND_ULT ) | |
1927 | (jmprel jmpr_ule jmpr COND_ULE ) | |
1928 | (jmprel jmpr_uge jmpr COND_UGE ) | |
1929 | (jmprel jmpr_ugt jmpr COND_UGT ) | |
1930 | (jmprel jmpr_sle jmpr COND_SLE ) | |
1931 | (jmprel jmpr_sge jmpr COND_SGE ) | |
1932 | (jmprel jmpr_net jmpr COND_NET ) | |
1933 | (jmprel jmpr_uc jmpr COND_UC ) | |
1934 | (jmprel jmpr_slt jmpr COND_SLT ) | |
1935 | ||
1936 | ||
1937 | ||
1938 | ||
1939 | ; JMPS seg,caddr | |
1940 | (dni jmpseg "absolute inter-segment jump" | |
1941 | (UNCOND-CTI(PIPE OS) (IDOC JMP)) | |
1942 | "jmps $hash$segm$useg8,$hash$sof$usof16" | |
1943 | (+ OP1_15 OP2_10 seg usof16) | |
1944 | (sequence () | |
ec84cc2b DE |
1945 | (if (eq BI sgtdisbit (const BI 0)) |
1946 | (set QI (reg h-cr 10) useg8)) | |
1947 | ;; FIXME: previous indentation suggested this nop was the `else' | |
1948 | ;; clause of the previous `if'. | |
1949 | (nop) | |
98693b73 NC |
1950 | (set HI pc usof16) |
1951 | ) | |
1952 | () | |
1953 | ) | |
1954 | ||
1955 | ; JMPS seg,caddr | |
1956 | (dni jmps "absolute inter-segment jump" | |
1957 | (UNCOND-CTI(PIPE OS) (IDOC JMP)) | |
1958 | "jmps $seg,$caddr" | |
1959 | (+ OP1_15 OP2_10 seg caddr) | |
1960 | (sequence () | |
ec84cc2b DE |
1961 | (if (eq BI sgtdisbit (const BI 0)) |
1962 | (set QI (reg h-cr 10) seg)) | |
1963 | ;; FIXME: previous indentation suggested this nop was the `else' | |
1964 | ;; clause of the previous `if'. | |
1965 | (nop) | |
98693b73 NC |
1966 | (set HI pc caddr) |
1967 | ) | |
1968 | () | |
1969 | ) | |
1970 | ||
1971 | ||
1972 | ;relative jump if bit set | |
1973 | ;JB bitaddrQ.q,rel | |
1974 | (dni jb "relative jump if bit set" | |
1975 | ((PIPE OS) (IDOC JMP)) | |
1976 | "jb $genreg$dot$qlobit,$relhi" | |
1977 | (+ OP1_8 OP2_10 genreg relhi qlobit (f-qhibit 0)) | |
1978 | (sequence ((HI tmp1) (HI tmp2)) | |
1979 | (set HI tmp1 genreg) | |
1980 | (set HI tmp2 (const 1)) | |
ec84cc2b | 1981 | ;;(sll HI tmp2 qlobit) - FIXME: missing (set ...) |
98693b73 | 1982 | (set HI tmp2 (and tmp1 tmp2)) |
ec84cc2b | 1983 | (if (eq tmp2 (const 1)) ;; FIXME: (ne tmp2 0)? |
98693b73 | 1984 | (sequence () |
ec84cc2b DE |
1985 | (if (lt QI relhi (const 0)) |
1986 | (set HI pc (add HI pc (mul QI relhi (const 2))))) | |
98693b73 | 1987 | )) |
ec84cc2b | 1988 | (set HI pc (add HI pc (const 4))) ;; FIXME: Is this right? |
98693b73 NC |
1989 | ) |
1990 | () | |
1991 | ) | |
1992 | ||
1993 | ;relative jump if bit set and clear bit | |
1994 | ;JBC bitaddrQ.q,rel | |
1995 | (dni jbc "relative jump if bit set and clear bit" | |
1996 | ((PIPE OS) (IDOC JMP)) | |
1997 | "jbc $genreg$dot$qlobit,$relhi" | |
1998 | (+ OP1_10 OP2_10 genreg relhi qlobit (f-qhibit 0)) | |
1999 | (sequence ((HI tmp1) (HI tmp2)) | |
2000 | (set HI tmp1 genreg) | |
2001 | (set HI tmp2 (const 1)) | |
ec84cc2b | 2002 | ;;(sll HI tmp2 qlobit) - FIXME: missing (set ...) |
98693b73 | 2003 | (set HI tmp2 (and tmp1 tmp2)) |
ec84cc2b | 2004 | (if (eq tmp2 (const 1)) ;; FIXME: (ne tmp2 0)? |
98693b73 | 2005 | (sequence () |
ec84cc2b DE |
2006 | ;; FIXME: The `else' clause has several statements. |
2007 | (if (lt QI relhi (const 0)) | |
2008 | (set tmp2 (const 1)) | |
2009 | (set tmp1 genreg) | |
2010 | ;; FIXME: (sll tmp2 qlobit) | |
2011 | ;; FIXME: (inv tmp2) | |
2012 | (set HI tmp1 (and tmp1 tmp2)) | |
2013 | (set HI genreg tmp1) | |
2014 | (set HI pc (add HI pc (mul QI relhi (const 2))))) | |
98693b73 | 2015 | )) |
ec84cc2b | 2016 | (set HI pc (add HI pc (const 4))) ;; FIXME: Is this right? |
98693b73 NC |
2017 | ) |
2018 | () | |
2019 | ) | |
2020 | ||
2021 | ;relative jump if bit set | |
2022 | ;JNB bitaddrQ.q,rel | |
2023 | (dni jnb "relative jump if bit not set" | |
2024 | ((PIPE OS) (IDOC JMP)) | |
2025 | "jnb $genreg$dot$qlobit,$relhi" | |
2026 | (+ OP1_9 OP2_10 genreg relhi qlobit (f-qhibit 0)) | |
2027 | (sequence ((HI tmp1) (HI tmp2)) | |
2028 | (set HI tmp1 genreg) | |
2029 | (set HI tmp2 (const 1)) | |
ec84cc2b | 2030 | ;;(sll HI tmp2 qlobit) - FIXME: missing (set ...) |
98693b73 | 2031 | (set HI tmp2 (and tmp1 tmp2)) |
ec84cc2b | 2032 | (if (eq tmp2 (const 0)) ;; FIXME: (ne tmp2 0)? |
98693b73 | 2033 | (sequence () |
ec84cc2b DE |
2034 | (if (lt QI relhi (const 0)) |
2035 | (set HI pc (add HI pc (mul QI relhi (const 2))))) | |
98693b73 | 2036 | )) |
ec84cc2b | 2037 | (set HI pc (add HI pc (const 4))) ;; FIXME: Is this right? |
98693b73 NC |
2038 | ) |
2039 | () | |
2040 | ) | |
2041 | ||
2042 | ;relative jump if bit not set and set bit | |
2043 | ;JNBS bitaddrQ.q,rel | |
2044 | (dni jnbs "relative jump if bit not set and set bit" | |
2045 | ((PIPE OS) (IDOC JMP)) | |
2046 | "jnbs $genreg$dot$qlobit,$relhi" | |
2047 | (+ OP1_11 OP2_10 genreg relhi qlobit (f-qhibit 0)) | |
2048 | (sequence ((HI tmp1) (HI tmp2)) | |
2049 | (set HI tmp1 genreg) | |
2050 | (set HI tmp2 (const 1)) | |
ec84cc2b | 2051 | ;;(sll HI tmp2 qlobit) - FIXME: missing (set ...) |
98693b73 NC |
2052 | (set HI tmp2 (and tmp1 tmp2)) |
2053 | (if (eq tmp2 (const 0)) | |
2054 | (sequence () | |
ec84cc2b DE |
2055 | ;; FIXME: The `else' clause has several statements. |
2056 | (if (lt QI relhi (const 0)) | |
2057 | (set tmp2 (const 1)) | |
2058 | (set tmp1 reg8) | |
2059 | ;; FIXME: (sll tmp2 qbit) | |
2060 | (set BI tmp1(or tmp1 tmp2)) | |
2061 | (set HI reg8 tmp1) | |
2062 | (set HI pc (add HI pc (mul QI relhi (const 2))))) | |
98693b73 | 2063 | )) |
ec84cc2b | 2064 | (set HI pc (add HI pc (const 4))) ;; FIXME: Is this right? |
98693b73 NC |
2065 | ) |
2066 | () | |
2067 | ) | |
2068 | ||
2069 | ||
2070 | ;Absolute conditional call | |
2071 | (define-pmacro (callabs name insn) | |
2072 | (dni name | |
2073 | (.str name "Absolute conditional call" ) | |
2074 | ((PIPE OS) (IDOC JMP)) | |
2075 | (.str insn " $extcond,$caddr") | |
2076 | (+ OP1_12 OP2_10 extcond (f-op-2bit 0) bit01 caddr) | |
2077 | (sequence () | |
2078 | (if (eq extcond (const 1)) | |
2079 | (set bit01 (const 0)) | |
2080 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2081 | (set HI (mem HI (reg h-cr 9)) pc) | |
2082 | (set HI pc (mem HI caddr))) | |
2083 | (if (ne extcond (const 1)) | |
2084 | (set bit01 (const 1)) | |
2085 | (set HI pc (add HI pc (const 2)))) | |
2086 | ) | |
2087 | () | |
2088 | ) | |
2089 | ) | |
2090 | ||
2091 | (callabs calla0 calla+) | |
2092 | (callabs calla1 calla) | |
2093 | ||
2094 | ; CALLA- cc,caddr | |
2095 | (dni calla- "Absolute conditional call" | |
2096 | (COND-CTI (PIPE OS) (IDOC JMP)) | |
2097 | "calla- $extcond,$caddr" | |
2098 | (+ OP1_12 OP2_10 extcond (f-op-bit3 1) caddr) | |
2099 | (sequence () | |
2100 | (if (eq extcond (const 1)) | |
2101 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2102 | (set HI (mem HI (reg h-cr 9)) pc) | |
2103 | (set HI pc (mem HI caddr))) | |
2104 | (set HI pc (add HI pc (const 2))) | |
2105 | ) | |
2106 | () | |
2107 | ) | |
2108 | ||
2109 | ; CALLI cc,[Rwn] | |
2110 | (dni calli "indirect subroutine call" | |
2111 | (COND-CTI (PIPE OS) (IDOC JMP)) | |
2112 | "calli $icond,[$sr]" | |
2113 | (+ OP1_10 OP2_11 icond sr) | |
2114 | (sequence () | |
2115 | (if (eq icond (const 1)) | |
2116 | (sequence () | |
2117 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2118 | (set HI (mem HI (reg h-cr 9)) pc) | |
2119 | (set HI pc (mem HI sr)) | |
2120 | ) | |
2121 | ) | |
2122 | (set HI pc (add HI pc (const 2))) | |
2123 | ) | |
2124 | () | |
2125 | ) | |
2126 | ||
2127 | ; CALLR rel | |
2128 | (dni callr "Call subroutine with PC relative signed 8 bit offset" | |
2129 | ( COND-CTI (PIPE OS) (IDOC JMP)) | |
2130 | "callr $rel" | |
2131 | (+ OP1_11 OP2_11 rel) | |
2132 | (sequence () | |
2133 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2134 | (set HI (mem HI (reg h-cr 9)) pc) | |
2135 | (sequence () | |
ec84cc2b DE |
2136 | (if (lt QI rel (const 0)) |
2137 | (sequence () | |
2138 | ;; FIXME: (neg QI rel) | |
2139 | ;; FIXME: (add QI rel (const 1)) | |
2140 | ;; FIXME: (mul QI rel (const 2)) | |
2141 | (set HI pc (sub HI pc rel)) | |
2142 | )) | |
98693b73 NC |
2143 | (set HI pc (add HI pc (mul QI rel (const 2)))) |
2144 | ) | |
2145 | ) | |
2146 | () | |
2147 | ) | |
2148 | ||
2149 | ||
2150 | ; CALLS seg,caddr | |
2151 | (dni callseg "call inter-segment subroutine" | |
2152 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2153 | "calls $hash$segm$useg8,$hash$sof$usof16" | |
2154 | (+ OP1_13 OP2_10 useg8 usof16) | |
2155 | (sequence () | |
2156 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2157 | (set HI (mem HI (reg h-cr 9)) (reg h-cr 10)) | |
2158 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2159 | (set HI (mem HI (reg h-cr 9)) pc) | |
ec84cc2b DE |
2160 | (if (eq BI sgtdisbit (const BI 0)) |
2161 | (set QI (reg h-cr 10) useg8)) | |
2162 | ;; FIXME: previous indentation suggested this nop was the `else' | |
2163 | ;; clause of the previous `if'. | |
2164 | (nop) | |
98693b73 NC |
2165 | (set HI pc usof16) |
2166 | ) | |
2167 | () | |
2168 | ) | |
2169 | ||
2170 | ; CALLS seg,caddr | |
2171 | (dni calls "call inter-segment subroutine" | |
2172 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2173 | "calls $seg,$caddr" | |
2174 | (+ OP1_13 OP2_10 seg caddr) | |
2175 | (sequence () | |
2176 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2177 | (set HI (mem HI (reg h-cr 9)) (reg h-cr 10)) | |
2178 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2179 | (set HI (mem HI (reg h-cr 9)) pc) | |
ec84cc2b DE |
2180 | (if (eq BI sgtdisbit (const BI 0)) |
2181 | (set QI (reg h-cr 10) seg)) | |
2182 | ;; FIXME: previous indentation suggested this nop was the `else' | |
2183 | ;; clause of the previous `if'. | |
2184 | (nop) | |
98693b73 NC |
2185 | (set HI pc caddr) |
2186 | ) | |
2187 | () | |
2188 | ) | |
2189 | ||
2190 | ; PCALL reg,caddr | |
2191 | (dni pcall "push word and call absolute subroutine" | |
2192 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2193 | "pcall $reg8,$caddr" | |
2194 | (+ OP1_14 OP2_2 reg8 caddr) | |
2195 | (sequence ((HI tmp1)) | |
2196 | (set HI tmp1 reg8) | |
2197 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2198 | (set HI (mem HI (reg h-cr 9)) tmp1) | |
2199 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2200 | (set HI (mem HI (reg h-cr 9)) pc) | |
2201 | (set HI pc caddr) | |
2202 | ) | |
2203 | () | |
2204 | ) | |
2205 | ||
2206 | ; TRAP #uimm7 | |
2207 | (dni trap "software trap" | |
2208 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2209 | "trap $hash$uimm7" | |
2210 | (+ OP1_9 OP2_11 uimm7 (f-op-1bit 0)) | |
2211 | (sequence () | |
2212 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2213 | (set HI (mem HI (reg h-cr 9)) (reg h-cr 4)) | |
ec84cc2b DE |
2214 | (if (eq BI sgtdisbit (const BI 0)) |
2215 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2216 | (set HI (mem HI (reg h-cr 9)) (reg h-cr 10) ) | |
2217 | ) | |
2218 | (nop) | |
98693b73 NC |
2219 | (set HI (reg h-cr 10) (reg h-cr 11)) |
2220 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2221 | (set HI (mem HI (reg h-cr 9)) pc) | |
2222 | (set HI pc (mul QI uimm7 (const 4))) | |
2223 | ) | |
2224 | () | |
2225 | ) | |
2226 | ||
2227 | ;Return insns | |
2228 | ; RET | |
2229 | (dni ret "return from subroutine" | |
2230 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2231 | "ret" | |
2232 | (+ OP1_12 OP2_11 (f-op-bit8 0)) | |
2233 | (sequence () | |
2234 | (set HI pc (mem HI (reg h-cr 9))) | |
2235 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
2236 | ) | |
2237 | () | |
2238 | ) | |
2239 | ||
2240 | ; RETS | |
2241 | (dni rets "return from inter-segment sunroutine" | |
2242 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2243 | "rets" | |
2244 | (+ OP1_13 OP2_11 (f-op-bit8 0)) | |
2245 | (sequence () | |
2246 | (set HI pc (mem HI (reg h-cr 9))) | |
2247 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
ec84cc2b DE |
2248 | (if (eq BI sgtdisbit (const BI 0)) |
2249 | (set HI (reg h-cr 10) (mem HI (reg h-cr 9))) | |
2250 | ) | |
2251 | (nop) | |
98693b73 NC |
2252 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) |
2253 | ) | |
2254 | () | |
2255 | ) | |
2256 | ||
2257 | ; RETP reg | |
2258 | (dni retp "return from subroutine and pop word register" | |
2259 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2260 | "retp $reg8" | |
2261 | (+ OP1_14 OP2_11 reg8) | |
2262 | (sequence ((HI tmp1)) | |
2263 | (set HI pc (mem HI (reg h-cr 9))) | |
2264 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
2265 | (set HI tmp1 (mem HI (reg h-cr 9))) | |
2266 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
2267 | (set HI reg8 tmp1) | |
2268 | ) | |
2269 | () | |
2270 | ) | |
2271 | ||
2272 | ; RETI | |
2273 | (dni reti "return from ISR" | |
2274 | (UNCOND-CTI (PIPE OS) (IDOC JMP)) | |
2275 | "reti" | |
2276 | (+ OP1_15 OP2_11 (f-op-lbit4 8) (f-op-bit4 8)) | |
2277 | (sequence () | |
2278 | (set HI pc (mem HI (reg h-cr 9))) | |
2279 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
ec84cc2b DE |
2280 | (if (eq BI sgtdisbit (const BI 0)) |
2281 | (sequence () | |
2282 | (set HI (reg h-cr 10) (mem HI (reg h-cr 9))) | |
2283 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
2284 | ) | |
2285 | ) | |
2286 | (nop) | |
98693b73 NC |
2287 | (set HI (reg h-cr 4) (mem HI (reg h-cr 9))) |
2288 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
2289 | ) | |
2290 | () | |
2291 | ) | |
2292 | ||
2293 | ;stack operation insn | |
2294 | ;****************************************************************** | |
2295 | ; POP reg | |
2296 | (dni pop "restore register from system stack" | |
2297 | ((PIPE OS) (IDOC MISC)) | |
2298 | "pop $reg8" | |
2299 | (+ OP1_15 OP2_12 reg8) | |
2300 | (sequence ((HI tmp1)) | |
2301 | (set HI tmp1 (mem HI (reg h-cr 9))) | |
2302 | (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) | |
2303 | (set HI reg8 tmp1) | |
2304 | ) | |
2305 | () | |
2306 | ) | |
2307 | ||
2308 | ; PUSH reg | |
2309 | (dni push "save register on system stack" | |
2310 | ((PIPE OS) (IDOC MISC)) | |
2311 | "push $reg8" | |
2312 | (+ OP1_14 OP2_12 reg8) | |
2313 | (sequence ((HI tmp1)) | |
2314 | (set HI tmp1 reg8) | |
2315 | (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) | |
2316 | (set HI (mem HI (reg h-cr 9)) tmp1) | |
2317 | ) | |
2318 | () | |
2319 | ) | |
2320 | ||
2321 | ;context switching insns | |
2322 | ; SCXT reg,#data16 | |
2323 | (dni scxti "Push word register on stack and update same with immediate data" | |
2324 | ((PIPE OS) (IDOC MISC)) | |
2325 | "scxt $reg8,$hash$uimm16" | |
2326 | (+ OP1_12 OP2_6 reg8 uimm16) | |
2327 | (sequence ((HI tmp1) (HI tmp2)) | |
2328 | (set HI tmp1 reg8) | |
2329 | (set HI tmp2 uimm16) | |
ab5f875d | 2330 | ;; FIXME: (sub HI (reg HI h-cr 9) (const 2)) |
98693b73 NC |
2331 | (set HI (reg HI h-cr 9) tmp1) |
2332 | (set HI reg8 tmp2) | |
2333 | ) | |
2334 | () | |
2335 | ) | |
2336 | ||
2337 | ; SCXT reg,POF mem | |
2338 | (dni scxtrpofm "mov memory to byte register" | |
2339 | ((PIPE OS) (IDOC MOVE)) | |
2340 | "scxt $reg8,$pof$upof16" | |
2341 | (+ OP1_13 OP2_6 reg8 upof16) | |
2342 | (set QI reg8 (mem HI upof16)) | |
2343 | () | |
2344 | ) | |
2345 | ||
2346 | ; SCXT regmem8,memgr8 | |
2347 | (dni scxtmg "Push word register on stack and update same with direct memory" | |
2348 | ((PIPE OS) (IDOC MISC)) | |
2349 | "scxt $regmem8,$memgr8" | |
2350 | (+ OP1_13 OP2_6 regmem8 memgr8) | |
2351 | (sequence ((HI tmp1) (HI tmp2)) | |
2352 | (set HI tmp1 regmem8) | |
2353 | (set HI tmp2 memgr8) | |
ab5f875d | 2354 | ;; FIXME: (sub HI (reg HI h-cr 9) (const 2)) |
98693b73 NC |
2355 | (set HI (reg HI h-cr 9) tmp1) |
2356 | (set HI regmem8 tmp2) | |
2357 | ) | |
2358 | () | |
2359 | ) | |
2360 | ||
2361 | ; SCXT reg,mem | |
2362 | (dni scxtm "Push word register on stack and update same with direct memory" | |
2363 | ((PIPE OS) (IDOC MISC)) | |
2364 | "scxt $reg8,$memory" | |
2365 | (+ OP1_13 OP2_6 reg8 memory) | |
2366 | (sequence ((HI tmp1) (HI tmp2)) | |
2367 | (set HI tmp1 reg8) | |
2368 | (set HI tmp2 memory) | |
ab5f875d | 2369 | ;; FIXME: (sub HI (reg HI h-cr 9) (const 2)) |
98693b73 NC |
2370 | (set HI (reg HI h-cr 9) tmp1) |
2371 | (set HI reg8 tmp2) | |
2372 | ) | |
2373 | () | |
2374 | ) | |
2375 | ||
2376 | ;No operation | |
2377 | ; NOP | |
2378 | (dni nop "nop" | |
2379 | ((PIPE OS) (IDOC MISC)) | |
2380 | "nop" | |
2381 | (+ OP1_12 OP2_12 (f-op-bit8 0)) | |
2382 | () | |
2383 | () | |
2384 | ) | |
2385 | ||
2386 | ;*********system control instructions *********************/ | |
2387 | ||
2388 | (define-pmacro (sysctrl name insn opc1 opc2 op1 op2 op3) | |
2389 | (dni name | |
2390 | (.str name "miscellaneous" ) | |
2391 | ((PIPE OS) (IDOC MISC)) | |
2392 | (.str insn ) | |
2393 | (+ opc1 opc2 (f-op-lbit4 op1) (f-op-bit4 op2) (f-data8 op3) (f-op-bit8 op3)) | |
2394 | () | |
2395 | () | |
2396 | ) | |
2397 | ) | |
2398 | (sysctrl srstm srst OP1_11 OP2_7 4 8 183 ) | |
2399 | (sysctrl idlem idle OP1_8 OP2_7 7 8 135) | |
2400 | (sysctrl pwrdnm pwrdn OP1_9 OP2_7 6 8 151) | |
2401 | (sysctrl diswdtm diswdt OP1_10 OP2_5 5 10 165) | |
2402 | (sysctrl enwdtm enwdt OP1_8 OP2_5 7 10 133) | |
2403 | (sysctrl einitm einit OP1_11 OP2_5 4 10 181) | |
2404 | (sysctrl srvwdtm srvwdt OP1_10 OP2_7 5 8 167 ) | |
2405 | ||
2406 | ;s/w brk | |
2407 | ; SBRK | |
2408 | (dni sbrk "sbrk" | |
2409 | ((PIPE OS) (IDOC MISC)) | |
2410 | "sbrk" | |
2411 | (+ OP1_8 OP2_12 (f-op-bit8 0)) | |
2412 | () | |
2413 | () | |
2414 | ) | |
2415 | ||
2416 | ; atomic sequence | |
2417 | ; ATOMIC #irang2 | |
2418 | (dni atomic "begin atomic sequence" | |
2419 | ((PIPE OS) (IDOC SYSC)) | |
2420 | "atomic $hash$uimm2" | |
2421 | (+ OP1_13 OP2_1 (f-op-lbit2 0) uimm2 (f-op-bit4 0)) | |
2422 | (sequence ((HI count)) | |
2423 | (set HI count uimm2) | |
ec84cc2b | 2424 | (cond |
98693b73 NC |
2425 | ((ne HI count (const 0)) |
2426 | (sequence () | |
2427 | (set HI pc (add HI pc (const 2))) | |
2428 | (set HI count (sub HI count (const 1))) | |
2429 | )) | |
2430 | ) | |
2431 | (set HI count (const 0)) | |
2432 | ) | |
2433 | () | |
2434 | ) | |
2435 | ||
2436 | ;extended register sequence | |
2437 | ; EXTR #irang2 | |
2438 | (dni extr "begin extended register sequence" | |
2439 | ((PIPE OS) (IDOC SYSC)) | |
2440 | "extr $hash$uimm2" | |
2441 | (+ OP1_13 OP2_1 (f-op-lbit2 2) uimm2 (f-op-bit4 0)) | |
2442 | (sequence ((HI count)) | |
2443 | (set HI count uimm2) | |
ec84cc2b | 2444 | (cond |
98693b73 NC |
2445 | ((ne HI count (const 0)) |
2446 | (sequence () | |
2447 | (set HI pc (add HI pc (const 2))) | |
2448 | (set HI count (sub HI count (const 1))) | |
2449 | )) | |
2450 | ) | |
2451 | (set HI count (const 0)) | |
2452 | ) | |
2453 | () | |
2454 | ) | |
2455 | ||
2456 | ;extended page sequence | |
2457 | ; EXTP Rw,#irang2 | |
2458 | (dni extp "begin extended page sequence" | |
2459 | ((PIPE OS) (IDOC SYSC)) | |
2460 | "extp $sr,$hash$uimm2" | |
2461 | (+ OP1_13 OP2_12 (f-op-lbit2 1) uimm2 sr) | |
2462 | (sequence ((HI count)) | |
2463 | (set HI count uimm2) | |
ec84cc2b | 2464 | (cond |
98693b73 NC |
2465 | ((ne HI count (const 0)) |
2466 | (sequence () | |
2467 | (set HI pc (add HI pc (const 2))) | |
2468 | (set HI count (sub HI count (const 1))) | |
2469 | )) | |
2470 | ) | |
2471 | (set HI count (const 0)) | |
2472 | ) | |
2473 | () | |
2474 | ) | |
2475 | ||
2476 | ;extended page sequence | |
2477 | ; EXTP #pag10,#irang2 | |
2478 | (dni extp1 "begin extended page sequence" | |
2479 | ((PIPE OS) (IDOC SYSC)) | |
2480 | "extp $hash$pagenum,$hash$uimm2" | |
2481 | (+ OP1_13 OP2_7 (f-op-lbit2 1) uimm2 (f-op-bit4 0) pagenum (f-qlobit 0) (f-qlobit2 0)) | |
2482 | (sequence ((HI count)) | |
2483 | (set HI count uimm2) | |
ec84cc2b | 2484 | (cond |
98693b73 NC |
2485 | ((ne HI count (const 0)) |
2486 | (sequence () | |
2487 | (set HI pc (add HI pc (const 2))) | |
2488 | (set HI count (sub HI count (const 1))) | |
2489 | )) | |
2490 | ) | |
2491 | (set HI count (const 0)) | |
2492 | ) | |
2493 | () | |
2494 | ) | |
2495 | ||
2496 | ; EXTP #pag10,#irang2 | |
2497 | (dni extpg1 "begin extended page sequence" | |
2498 | ((PIPE OS) (IDOC SYSC)) | |
2499 | "extp $hash$pag$upag16,$hash$uimm2" | |
2500 | (+ OP1_13 OP2_7 (f-op-lbit2 1) uimm2 (f-op-bit4 0) upag16 ) | |
2501 | (sequence ((HI count)) | |
2502 | (set HI count uimm2) | |
ec84cc2b | 2503 | (cond |
98693b73 NC |
2504 | ((ne HI count (const 0)) |
2505 | (sequence () | |
2506 | (set HI pc (add HI pc (const 2))) | |
2507 | (set HI count (sub HI count (const 1))) | |
2508 | )) | |
2509 | ) | |
2510 | (set HI count (const 0)) | |
2511 | ) | |
2512 | () | |
2513 | ) | |
2514 | ||
2515 | ;extended page and register sequence | |
2516 | ; EXTPR Rw,#irang2 | |
2517 | (dni extpr "begin extended page and register sequence" | |
2518 | ((PIPE OS) (IDOC SYSC)) | |
2519 | "extpr $sr,$hash$uimm2" | |
2520 | (+ OP1_13 OP2_12 (f-op-lbit2 3) uimm2 sr) | |
2521 | (sequence ((HI count)) | |
2522 | (set HI count uimm2) | |
ec84cc2b | 2523 | (cond |
98693b73 NC |
2524 | ((ne HI count (const 0)) |
2525 | (sequence () | |
2526 | (set HI pc (add HI pc (const 2))) | |
2527 | (set HI count (sub HI count (const 1))) | |
2528 | )) | |
2529 | ) | |
2530 | (set HI count (const 0)) | |
2531 | ) | |
2532 | () | |
2533 | ) | |
2534 | ||
2535 | ;extended page and register sequence | |
2536 | ; EXTPR #pag10,#irang2 | |
2537 | (dni extpr1 "begin extended page sequence" | |
2538 | ((PIPE OS) (IDOC SYSC)) | |
2539 | "extpr $hash$pagenum,$hash$uimm2" | |
2540 | (+ OP1_13 OP2_7 (f-op-lbit2 3) uimm2 (f-op-bit4 0) pagenum (f-qlobit 0) (f-qlobit2 0)) | |
2541 | (sequence ((HI count)) | |
2542 | (set HI count uimm2) | |
ec84cc2b | 2543 | (cond |
98693b73 NC |
2544 | ((ne HI count (const 0)) |
2545 | (sequence () | |
2546 | (set HI pc (add HI pc (const 2))) | |
2547 | (set HI count (sub HI count (const 1))) | |
2548 | )) | |
2549 | ) | |
2550 | (set HI count (const 0)) | |
2551 | ) | |
2552 | () | |
2553 | ) | |
2554 | ||
2555 | ;extended segment sequence | |
2556 | ; EXTS Rw,#irang2 | |
2557 | (dni exts "begin extended segment sequence" | |
2558 | ((PIPE OS) (IDOC SYSC)) | |
2559 | "exts $sr,$hash$uimm2" | |
2560 | (+ OP1_13 OP2_12 (f-op-lbit2 0) uimm2 sr) | |
2561 | (sequence ((HI count)) | |
2562 | (set HI count uimm2) | |
ec84cc2b | 2563 | (cond |
98693b73 NC |
2564 | ((ne HI count (const 0)) |
2565 | (sequence () | |
2566 | (set HI pc (add HI pc (const 2))) | |
2567 | (set HI count (sub HI count (const 1))) | |
2568 | )) | |
2569 | ) | |
2570 | (set HI count (const 0)) | |
2571 | ) | |
2572 | () | |
2573 | ) | |
2574 | ||
2575 | ;extended segment sequence | |
2576 | ; EXTS #seg8,#irang2 | |
2577 | (dni exts1 "begin extended segment sequence" | |
2578 | ((PIPE OS) (IDOC SYSC)) | |
2579 | "exts $hash$seghi8,$hash$uimm2" | |
2580 | (+ OP1_13 OP2_7 (f-op-lbit2 0) uimm2 (f-op-bit4 0) seghi8 (f-op-bit8 0)) | |
2581 | (sequence ((HI count)) | |
2582 | (set HI count uimm2) | |
ec84cc2b | 2583 | (cond |
98693b73 NC |
2584 | ((ne HI count (const 0)) |
2585 | (sequence () | |
2586 | (set HI pc (add HI pc (const 2))) | |
2587 | (set HI count (sub HI count (const 1))) | |
2588 | )) | |
2589 | ) | |
2590 | (set HI count (const 0)) | |
2591 | ) | |
2592 | () | |
2593 | ) | |
2594 | ||
2595 | ;extended segment register sequence | |
2596 | ; EXTSR Rwm,#irang2 | |
2597 | (dni extsr "begin extended segment and register sequence" | |
2598 | ((PIPE OS) (IDOC SYSC)) | |
2599 | "extsr $sr,$hash$uimm2" | |
2600 | (+ OP1_13 OP2_12 (f-op-lbit2 2) uimm2 sr) | |
2601 | (sequence ((HI count)) | |
2602 | (set HI count uimm2) | |
ec84cc2b | 2603 | (cond |
98693b73 NC |
2604 | ((ne HI count (const 0)) |
2605 | (sequence () | |
2606 | (set HI pc (add HI pc (const 2))) | |
2607 | (set HI count (sub HI count (const 1))) | |
2608 | )) | |
2609 | ) | |
2610 | (set HI count (const 0)) | |
2611 | ) | |
2612 | () | |
2613 | ) | |
2614 | ||
2615 | ;extended segment register sequence | |
2616 | ; EXTSR #pag10,#irang2 | |
2617 | (dni extsr1 "begin extended segment and register sequence" | |
2618 | ((PIPE OS) (IDOC SYSC)) | |
2619 | "extsr $hash$seghi8,$hash$uimm2" | |
2620 | (+ OP1_13 OP2_7 (f-op-lbit2 2) uimm2 (f-op-bit4 0) seghi8 (f-op-bit8 0)) | |
2621 | (sequence ((HI count)) | |
2622 | (set HI count uimm2) | |
ec84cc2b | 2623 | (cond |
98693b73 NC |
2624 | ((ne HI count (const 0)) |
2625 | (sequence () | |
2626 | (set HI pc (add HI pc (const 2))) | |
2627 | (set HI count (sub HI count (const 1))) | |
2628 | )) | |
2629 | ) | |
2630 | (set HI count (const 0)) | |
2631 | ) | |
2632 | () | |
2633 | ) | |
2634 | ||
2635 | ;prioritize register | |
2636 | ;PRIOR Rwn,Rwm | |
2637 | (dni prior "add registers" | |
2638 | ((PIPE OS) (IDOC ALU)) | |
2639 | "prior $dr,$sr" | |
2640 | (+ OP1_2 OP2_11 dr sr) | |
2641 | (sequence ((HI count) (HI tmp1) (HI tmp2)) | |
2642 | (set HI count (const 0)) | |
2643 | (set HI tmp1 sr) | |
2644 | (set HI tmp2 (and tmp1 (const 32768))) | |
ec84cc2b DE |
2645 | (cond |
2646 | ((ne HI tmp2 (const 1)) ;;(ne HI sr (const 0)) - FIXME: and? or? | |
2647 | ;;(sll HI tmp1 (const 1)) - FIXME: missing (set ...) | |
98693b73 NC |
2648 | (set HI tmp2 (and tmp1 (const 32768))) |
2649 | (set HI count (add HI count (const 1))) | |
2650 | ) | |
2651 | ) | |
2652 | (set HI dr count) | |
2653 | ) | |
2654 | () | |
2655 | ) | |
2656 | ||
2657 | ||
2658 | ;bit instructions | |
2659 | ;****************************************************************** | |
2660 | ;bit clear | |
2661 | (define-pmacro (bclear name insn opc1) | |
2662 | (dni name | |
2663 | (.str name "bit clear" ) | |
2664 | ((PIPE OS) (IDOC ALU)) | |
2665 | (.str insn " $reg8$dot$qbit") | |
2666 | (+ opc1 OP2_14 reg8) | |
2667 | (sequence ((HI tmp1) (HI tmp2)) | |
2668 | (set tmp2 (const 1)) | |
2669 | (set tmp1 reg8) | |
ab5f875d DE |
2670 | ;; FIXME: (sll tmp2 qbit) |
2671 | ;; FIXME: (inv tmp2) | |
98693b73 NC |
2672 | (set BI tmp1(and tmp1 tmp2)) |
2673 | (set HI reg8 tmp1)) | |
2674 | () | |
2675 | ) | |
2676 | ) | |
2677 | ||
2678 | ;clear direct bit | |
2679 | (dni bclr18 "bit logical MOVN" | |
2680 | ((PIPE OS) (IDOC ALU)) | |
2681 | "bclr $RegNam" | |
2682 | (+ OP1_11 OP2_14 RegNam) | |
2683 | (sequence ((HI tmp1) (HI tmp2)) | |
2684 | (set tmp2 (const 1)) | |
2685 | (set tmp1 reg8) | |
ab5f875d DE |
2686 | ;; FIXME: (sll tmp2 qbit) |
2687 | ;; FIXME: (inv tmp2) | |
98693b73 NC |
2688 | (set BI tmp1(and tmp1 tmp2)) |
2689 | (set HI reg8 tmp1)) | |
2690 | () | |
2691 | ) | |
2692 | ||
2693 | ||
2694 | (bclear bclr0 bclr QBIT_0 ) | |
2695 | (bclear bclr1 bclr QBIT_1 ) | |
2696 | (bclear bclr2 bclr QBIT_2 ) | |
2697 | (bclear bclr3 bclr QBIT_3 ) | |
2698 | (bclear bclr4 bclr QBIT_4 ) | |
2699 | (bclear bclr5 bclr QBIT_5 ) | |
2700 | (bclear bclr6 bclr QBIT_6 ) | |
2701 | (bclear bclr7 bclr QBIT_7 ) | |
2702 | (bclear bclr8 bclr QBIT_8 ) | |
2703 | (bclear bclr9 bclr QBIT_9 ) | |
2704 | (bclear bclr10 bclr QBIT_10 ) | |
2705 | (bclear bclr11 bclr QBIT_11 ) | |
2706 | (bclear bclr12 bclr QBIT_12 ) | |
2707 | (bclear bclr13 bclr QBIT_13 ) | |
2708 | (bclear bclr14 bclr QBIT_14 ) | |
2709 | (bclear bclr15 bclr QBIT_15 ) | |
2710 | ||
2711 | ;set direct bit | |
2712 | (dni bset19 "bit logical MOVN" | |
2713 | ((PIPE OS) (IDOC ALU)) | |
2714 | "bset $RegNam" | |
2715 | (+ OP1_11 OP2_15 RegNam) | |
2716 | (sequence ((HI tmp1) (HI tmp2)) | |
2717 | (set tmp2 (const 1)) | |
2718 | (set tmp1 reg8) | |
ab5f875d | 2719 | ;; FIXME: (sll tmp2 qbit) |
98693b73 NC |
2720 | (set BI tmp1(or tmp1 tmp2)) |
2721 | (set HI reg8 tmp1)) | |
2722 | () | |
2723 | ) | |
2724 | ||
2725 | ;bit set | |
2726 | (define-pmacro (bitset name insn opc1) | |
2727 | (dni name | |
2728 | (.str name "bit set" ) | |
2729 | ((PIPE OS) (IDOC ALU)) | |
2730 | (.str insn " $reg8$dot$qbit") | |
2731 | (+ opc1 OP2_15 reg8) | |
2732 | (sequence ((HI tmp1) (HI tmp2)) | |
2733 | (set tmp2 (const 1)) | |
2734 | (set tmp1 reg8) | |
ab5f875d | 2735 | ;; FIXME: (sll tmp2 qbit) |
98693b73 NC |
2736 | (set BI tmp1(or tmp1 tmp2)) |
2737 | (set HI reg8 tmp1)) | |
2738 | () | |
2739 | ) | |
2740 | ) | |
2741 | ||
2742 | ||
2743 | (bitset bset0 bset QBIT_0 ) | |
2744 | (bitset bset1 bset QBIT_1 ) | |
2745 | (bitset bset2 bset QBIT_2 ) | |
2746 | (bitset bset3 bset QBIT_3 ) | |
2747 | (bitset bset4 bset QBIT_4 ) | |
2748 | (bitset bset5 bset QBIT_5 ) | |
2749 | (bitset bset6 bset QBIT_6 ) | |
2750 | (bitset bset7 bset QBIT_7 ) | |
2751 | (bitset bset8 bset QBIT_8 ) | |
2752 | (bitset bset9 bset QBIT_9 ) | |
2753 | (bitset bset10 bset QBIT_10 ) | |
2754 | (bitset bset11 bset QBIT_11 ) | |
2755 | (bitset bset12 bset QBIT_12 ) | |
2756 | (bitset bset13 bset QBIT_13 ) | |
2757 | (bitset bset14 bset QBIT_14 ) | |
2758 | (bitset bset15 bset QBIT_15 ) | |
2759 | ||
2760 | ;mov direct bit | |
2761 | ;BMOV bitaddrZ.z,bitaddrQ.q | |
2762 | (dni bmov "bit logical MOV" | |
2763 | ((PIPE OS) (IDOC ALU)) | |
2764 | "bmov $reghi8$dot$qhibit,$reg8$dot$qlobit" | |
2765 | (+ OP1_4 OP2_10 reg8 reghi8 qhibit qlobit) | |
2766 | (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) | |
2767 | (set HI tmp1 reghi8) | |
2768 | (set HI tmp2 reg8) | |
2769 | (set tmp3 (const 1)) | |
2770 | (set tmp4 (const 1)) | |
ab5f875d DE |
2771 | ;; FIXME: (sll tmp3 qlobit) |
2772 | ;; FIXME: (sll tmp4 qhibit) | |
2773 | ;; FIXME: (and tmp1 tmp3) | |
2774 | ;; FIXME: (and tmp2 tmp4) | |
98693b73 NC |
2775 | (set BI tmp1 tmp2) |
2776 | (set HI reghi8 tmp1) | |
2777 | (set HI reg8 tmp2)) | |
2778 | () | |
2779 | ) | |
2780 | ||
2781 | ;movn direct bit | |
2782 | ;BMOVN bitaddrZ.z,bitaddrQ.q | |
2783 | (dni bmovn "bit logical MOVN" | |
2784 | ((PIPE OS) (IDOC ALU)) | |
2785 | "bmovn $reghi8$dot$qhibit,$reg8$dot$qlobit" | |
2786 | (+ OP1_3 OP2_10 reg8 reghi8 qhibit qlobit) | |
2787 | (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) | |
2788 | (set HI tmp1 reghi8) | |
2789 | (set HI tmp2 reg8) | |
2790 | (set tmp3 (const 1)) | |
2791 | (set tmp4 (const 1)) | |
ab5f875d DE |
2792 | ;; FIXME: (sll tmp3 qlobit) |
2793 | ;; FIXME: (sll tmp4 qhibit) | |
2794 | ;; FIXME: (and tmp1 tmp3) | |
2795 | ;; FIXME: (and tmp2 tmp4) | |
2796 | ;; FIXME: (inv HI tmp2) | |
98693b73 NC |
2797 | (set BI tmp1 tmp2) |
2798 | (set HI reghi8 tmp1) | |
2799 | (set HI reg8 tmp2)) | |
2800 | () | |
2801 | ) | |
2802 | ||
2803 | ;and direct bit | |
2804 | ;BAND bitaddrZ.z,bitaddrQ.q | |
2805 | (dni band "bit logical AND" | |
2806 | ((PIPE OS) (IDOC ALU)) | |
2807 | "band $reghi8$dot$qhibit,$reg8$dot$qlobit" | |
2808 | (+ OP1_6 OP2_10 reg8 reghi8 qhibit qlobit) | |
2809 | (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) | |
2810 | (set HI tmp1 reghi8) | |
2811 | (set HI tmp2 reg8) | |
2812 | (set tmp3 (const 1)) | |
2813 | (set tmp4 (const 1)) | |
ab5f875d DE |
2814 | ;; FIXME: (sll tmp3 qlobit) |
2815 | ;; FIXME: (sll tmp4 qhibit) | |
2816 | ;; FIXME: (and tmp1 tmp3) | |
2817 | ;; FIXME: (and tmp2 tmp4) | |
98693b73 NC |
2818 | (set BI tmp1(and tmp1 tmp2)) |
2819 | (set HI reghi8 tmp1) | |
2820 | (set HI reg8 tmp2)) | |
2821 | () | |
2822 | ) | |
2823 | ||
2824 | ;or direct bit | |
2825 | ;BOR bitaddrZ.z,bitaddrQ.q | |
2826 | (dni bor "bit logical OR" | |
2827 | ((PIPE OS) (IDOC ALU)) | |
2828 | "bor $reghi8$dot$qhibit,$reg8$dot$qlobit" | |
2829 | (+ OP1_5 OP2_10 reg8 reghi8 qhibit qlobit) | |
2830 | (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) | |
2831 | (set HI tmp1 reghi8) | |
2832 | (set HI tmp2 reg8) | |
2833 | (set tmp3 (const 1)) | |
2834 | (set tmp4 (const 1)) | |
ab5f875d DE |
2835 | ;; FIXME: (sll tmp3 qlobit) |
2836 | ;; FIXME: (sll tmp4 qhibit) | |
2837 | ;; FIXME: (and tmp1 tmp3) | |
2838 | ;; FIXME: (and tmp2 tmp4) | |
98693b73 NC |
2839 | (set BI tmp1(or tmp1 tmp2)) |
2840 | (set HI reghi8 tmp1) | |
2841 | (set HI reg8 tmp2)) | |
2842 | () | |
2843 | ) | |
2844 | ||
2845 | ;xor direct bit | |
2846 | ;BXOR bitaddrZ.z,bitaddrQ.q | |
2847 | (dni bxor "bit logical XOR" | |
2848 | ((PIPE OS) (IDOC ALU)) | |
2849 | "bxor $reghi8$dot$qhibit,$reg8$dot$qlobit" | |
2850 | (+ OP1_7 OP2_10 reg8 reghi8 qhibit qlobit) | |
2851 | (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) | |
2852 | (set HI tmp1 reghi8) | |
2853 | (set HI tmp2 reg8) | |
2854 | (set tmp3 (const 1)) | |
2855 | (set tmp4 (const 1)) | |
ab5f875d DE |
2856 | ;; FIXME: (sll tmp3 qlobit) |
2857 | ;; FIXME: (sll tmp4 qhibit) | |
2858 | ;; FIXME: (and tmp1 tmp3) | |
2859 | ;; FIXME: (and tmp2 tmp4) | |
98693b73 NC |
2860 | (set BI tmp1(xor tmp1 tmp2)) |
2861 | (set HI reghi8 tmp1) | |
2862 | (set HI reg8 tmp2)) | |
2863 | () | |
2864 | ) | |
2865 | ||
2866 | ;cmp direct bit to bit | |
2867 | ;BCMP bitaddrZ.z,bitaddrQ.q | |
2868 | (dni bcmp "bit to bit compare" | |
2869 | ((PIPE OS) (IDOC ALU)) | |
2870 | "bcmp $reghi8$dot$qhibit,$reg8$dot$qlobit" | |
2871 | (+ OP1_2 OP2_10 reg8 reghi8 qhibit qlobit) | |
2872 | (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) | |
2873 | (set HI tmp1 reghi8) | |
2874 | (set HI tmp2 reg8) | |
2875 | (set tmp3 (const 1)) | |
2876 | (set tmp4 (const 1)) | |
ab5f875d DE |
2877 | ;; FIXME: (sll tmp3 qlobit) |
2878 | ;; FIXME: (sll tmp4 qhibit) | |
2879 | ;; FIXME: (and tmp1 tmp3) | |
2880 | ;; FIXME: (and tmp2 tmp4) | |
98693b73 NC |
2881 | (set BI tmp1(xor tmp1 tmp2)) |
2882 | (set HI reghi8 tmp1) | |
2883 | (set HI reg8 tmp2)) | |
2884 | () | |
2885 | ) | |
2886 | ||
2887 | ;bit field low byte | |
2888 | ;BFLDL op1,op2,op3 | |
2889 | (dni bfldl "bit field low byte" | |
2890 | ((PIPE OS) (IDOC MOVE)) | |
2891 | "bfldl $reg8,$hash$mask8,$hash$datahi8" | |
2892 | (+ OP1_0 OP2_10 reg8 mask8 datahi8) | |
2893 | (sequence ((HI tmp1) (QI tmp2) (QI tmp3)) | |
2894 | (set HI tmp1 reg8) | |
2895 | (set QI tmp2 mask8) | |
2896 | (set QI tmp3 datahi8) | |
ab5f875d | 2897 | ;; FIXME: (inv QI tmp2) |
98693b73 NC |
2898 | (set HI tmp1 (and tmp1 tmp2)) |
2899 | (set HI tmp1 (or tmp1 tmp3)) | |
2900 | (set HI reg8 tmp1) | |
2901 | ) | |
2902 | () | |
2903 | ) | |
2904 | ||
2905 | ;bit field high byte | |
2906 | ;BFLDH op1,op2,op3 | |
2907 | (dni bfldh "bit field high byte" | |
2908 | ((PIPE OS) (IDOC MOVE)) | |
2909 | "bfldh $reg8,$hash$masklo8,$hash$data8" | |
2910 | (+ OP1_1 OP2_10 reg8 masklo8 data8) | |
2911 | (sequence ((HI tmp1) (HI tmp2) (HI tmp3)) | |
2912 | (set HI tmp1 reg8) | |
2913 | (set QI tmp2 masklo8) | |
2914 | (set HI tmp3 data8) | |
ab5f875d DE |
2915 | ;; FIXME: (sll tmp2 (const 8)) |
2916 | ;; FIXME: (inv HI tmp2) | |
2917 | ;; FIXME: (sll tmp3 (const 8)) | |
98693b73 NC |
2918 | (set HI tmp1 (and tmp1 tmp2)) |
2919 | (set HI tmp1 (or tmp1 tmp3)) | |
2920 | (set HI reg8 tmp1) | |
2921 | ) | |
2922 | () | |
2923 | ) | |
2924 | ||
2925 | ;/**********compare instructions****************** | |
2926 | ||
2927 | ;Compare register | |
2928 | ;CMP Rwn,Rwm | |
2929 | (dni cmpr "compare two registers" | |
2930 | ((PIPE OS) (IDOC CMP)) | |
2931 | "cmp $src1,$src2" | |
2932 | (+ OP1_4 OP2_0 src1 src2) | |
2933 | (set condbit (lt HI src1 src2)) | |
2934 | () | |
2935 | ) | |
2936 | ||
2937 | ;Compare byte register | |
2938 | ;CMPB Rbn,Rbm | |
2939 | (dni cmpbr "compare two byte registers" | |
2940 | ((PIPE OS) (IDOC CMP)) | |
2941 | "cmpb $drb,$srb" | |
2942 | (+ OP1_4 OP2_1 drb srb) | |
2943 | (set condbit (lt QI drb srb)) | |
2944 | () | |
2945 | ) | |
2946 | ||
2947 | (define-pmacro (cmp1 name insn opc1 opc2 op1 op2 mode) | |
2948 | (dni name | |
2949 | (.str name "compare" ) | |
2950 | ((PIPE OS) (IDOC CMP)) | |
2951 | (.str insn " $"op1 ",$hash$"op2) | |
2952 | (+ opc1 opc2 op1 (f-op-bit1 0) op2) | |
2953 | (set condbit (lt mode op1 op2)) | |
2954 | () | |
2955 | ) | |
2956 | ) | |
2957 | (cmp1 cmpri cmp OP1_4 OP2_8 src1 uimm3 HI) | |
2958 | (cmp1 cmpbri cmpb OP1_4 OP2_9 drb uimm3 QI) | |
2959 | ||
2960 | ; CMP Rwn,#data16 | |
2961 | (dni cmpi "compare" | |
2962 | ((PIPE OS) (IDOC CMP)) | |
2963 | "cmp $reg8,$hash$uimm16" | |
2964 | (+ OP1_4 OP2_6 reg8 uimm16) | |
2965 | (set condbit (lt HI reg8 uimm16)) | |
2966 | () | |
2967 | ) | |
2968 | ||
2969 | ; CMPB reg,#data8 | |
2970 | (dni cmpbi "compare" | |
2971 | ((PIPE OS) (IDOC CMP)) | |
2972 | "cmpb $regb8,$hash$uimm8" | |
2973 | (+ OP1_4 OP2_7 regb8 uimm8 (f-op-bit8 0)) | |
2974 | (set condbit (lt QI regb8 uimm8)) | |
2975 | () | |
2976 | ) | |
2977 | ||
2978 | ;compare reg and indirect memory | |
2979 | (define-pmacro (cmp2 name insn opc1 opc2 op1 op2 mode) | |
2980 | (dni name | |
2981 | (.str name "compare" ) | |
2982 | ((PIPE OS) (IDOC CMP)) | |
2983 | (.str insn " $"op1 ",[$"op2"]") | |
2984 | (+ opc1 opc2 op1 (f-op-bit2 2) op2) | |
2985 | (set condbit (lt mode op1 op2)) | |
2986 | () | |
2987 | ) | |
2988 | ) | |
2989 | (cmp2 cmpr2 cmp OP1_4 OP2_8 dr sr2 HI) | |
2990 | (cmp2 cmpbr2 cmpb OP1_4 OP2_9 drb sr2 QI) | |
2991 | ||
2992 | ;compare register and indirect memory post increment | |
2993 | (define-pmacro (cmp3 name insn opc1 opc2 op1 op2 mode) | |
2994 | (dni name | |
2995 | (.str name "compare" ) | |
2996 | ((PIPE OS) (IDOC CMP)) | |
2997 | (.str insn " $"op1 ",[$"op2"+]") | |
2998 | (+ opc1 opc2 op1 (f-op-bit2 3) op2) | |
2999 | (sequence () | |
3000 | (set condbit (lt mode op1 op2)) | |
3001 | (set HI op2 (add HI op2 (const 2))) | |
3002 | ) | |
3003 | () | |
3004 | ) | |
3005 | ) | |
3006 | (cmp3 cmp2i cmp OP1_4 OP2_8 dr sr2 HI) | |
3007 | (cmp3 cmpb2i cmpb OP1_4 OP2_9 drb sr2 QI) | |
3008 | ||
3009 | ;compare register and direct memory | |
3010 | (define-pmacro (cmp4 name insn opc1 opc2 op1 op2 mode) | |
3011 | (dni name | |
3012 | (.str name "compare" ) | |
3013 | ((PIPE OS) (IDOC CMP)) | |
3014 | (.str insn " $"op1 ",$pof$"op2) | |
3015 | (+ opc1 opc2 op1 op2) | |
3016 | (set condbit (lt HI op1 (mem HI op2))) | |
3017 | () | |
3018 | ) | |
3019 | ) | |
3020 | (cmp4 cmp04 cmp OP1_4 OP2_2 reg8 upof16 HI) | |
3021 | (cmp4 cmpb4 cmpb OP1_4 OP2_3 regb8 upof16 QI) | |
3022 | ||
3023 | ;compare register and direct memory | |
3024 | (define-pmacro (cmp4 name insn opc1 opc2 op1 op2 mode) | |
3025 | (dni name | |
3026 | (.str name "compare" ) | |
3027 | ((PIPE OS) (IDOC CMP)) | |
3028 | (.str insn " $"op1 ",$"op2) | |
3029 | (+ opc1 opc2 op1 op2) | |
3030 | (set condbit (lt HI op1 (mem HI op2))) | |
3031 | () | |
3032 | ) | |
3033 | ) | |
3034 | (cmp4 cmp004 cmp OP1_4 OP2_2 regmem8 memgr8 HI) | |
3035 | (cmp4 cmp0004 cmp OP1_4 OP2_2 reg8 memory HI) | |
3036 | (cmp4 cmpb04 cmpb OP1_4 OP2_3 regbmem8 memgr8 QI) | |
3037 | (cmp4 cmpb004 cmpb OP1_4 OP2_3 regb8 memory QI) | |
3038 | ||
3039 | ;compare register and immediate | |
3040 | (define-pmacro (cmp5 name insn opc1 opc2 op1 op2 mode) | |
3041 | (dni name | |
3042 | (.str name "compare" ) | |
3043 | ((PIPE OS) (IDOC CMP)) | |
3044 | (.str insn " $"op1 ",$hash$"op2) | |
3045 | (+ opc1 opc2 op2 op1) | |
3046 | (sequence () | |
3047 | (set condbit (lt HI op1 op2)) | |
3048 | (set mode op1 (sub HI op1 (const 1))) | |
3049 | ) | |
3050 | () | |
3051 | ) | |
3052 | ) | |
3053 | (cmp5 cmpd1ri cmpd1 OP1_10 OP2_0 sr uimm4 HI) | |
3054 | (cmp5 cmpd2ri cmpd2 OP1_11 OP2_0 sr uimm4 HI) | |
3055 | (cmp5 cmpi1ri cmpi1 OP1_8 OP2_0 sr uimm4 HI) | |
3056 | (cmp5 cmpi2ri cmpi2 OP1_9 OP2_0 sr uimm4 HI) | |
3057 | (cmp5 cmpd1rim cmpd1 OP1_10 OP2_6 reg8 uimm16 HI) | |
3058 | (cmp5 cmpd2rim cmpd2 OP1_11 OP2_6 reg8 uimm16 HI) | |
3059 | (cmp5 cmpi1rim cmpi1 OP1_8 OP2_6 reg8 uimm16 HI) | |
3060 | (cmp5 cmpi2rim cmpi2 OP1_9 OP2_6 reg8 uimm16 HI) | |
3061 | ||
3062 | ;compare register and direct memory | |
3063 | (define-pmacro (cmp6 name insn opc1 opc2 op1 op2 mode ) | |
3064 | (dni name | |
3065 | (.str name "compare" ) | |
3066 | ((PIPE OS) (IDOC CMP)) | |
3067 | (.str insn " $"op1 ",$pof$"op2) | |
3068 | (+ opc1 opc2 op1 op2) | |
3069 | (sequence () | |
3070 | (set condbit (lt HI op1 (mem HI op2))) | |
3071 | (set mode op1 (sub HI op1 (const 1))) | |
3072 | ) | |
3073 | () | |
3074 | ) | |
3075 | ) | |
3076 | (cmp6 cmpd1rp cmpd1 OP1_10 OP2_2 reg8 upof16 HI ) | |
3077 | (cmp6 cmpd2rp cmpd2 OP1_11 OP2_2 reg8 upof16 HI ) | |
3078 | (cmp6 cmpi1rp cmpi1 OP1_8 OP2_2 reg8 upof16 HI ) | |
3079 | (cmp6 cmpi2rp cmpi2 OP1_9 OP2_2 reg8 upof16 HI ) | |
3080 | ||
3081 | ;compare register and direct memory | |
3082 | (define-pmacro (cmp7 name insn opc1 opc2 op1 op2 mode) | |
3083 | (dni name | |
3084 | (.str name "compare" ) | |
3085 | ((PIPE OS) (IDOC CMP)) | |
3086 | (.str insn " $"op1 ",$"op2) | |
3087 | (+ opc1 opc2 op1 op2) | |
3088 | (sequence () | |
3089 | (set condbit (lt HI op1 (mem HI op2))) | |
3090 | (set mode op1 (sub HI op1 (const 1))) | |
3091 | ) | |
3092 | () | |
3093 | ) | |
3094 | ) | |
3095 | (cmp7 cmpd1rm cmpd1 OP1_10 OP2_2 regmem8 memgr8 HI) | |
3096 | (cmp7 cmpd2rm cmpd2 OP1_11 OP2_2 regmem8 memgr8 HI) | |
3097 | (cmp7 cmpi1rm cmpi1 OP1_8 OP2_2 regmem8 memgr8 HI) | |
3098 | (cmp7 cmpi2rm cmpi2 OP1_9 OP2_2 regmem8 memgr8 HI) | |
3099 | (cmp7 cmpd1rmi cmpd1 OP1_10 OP2_2 reg8 memory HI) | |
3100 | (cmp7 cmpd2rmi cmpd2 OP1_11 OP2_2 reg8 memory HI) | |
3101 | (cmp7 cmpi1rmi cmpi1 OP1_8 OP2_2 reg8 memory HI) | |
3102 | (cmp7 cmpi2rmi cmpi2 OP1_9 OP2_2 reg8 memory HI) | |
3103 | ||
3104 | ||
3105 | ;Shift and rotate insns | |
3106 | ;**************************************************************** | |
3107 | (define-pmacro (shift name insn insn1 opc1 opc2 op1 op2 mode) | |
3108 | (dni name | |
3109 | (.str name "shift" ) | |
3110 | ((PIPE OS) (IDOC ALU)) | |
3111 | (.str insn " $"op1 ",$"op2) | |
3112 | (+ opc1 opc2 op1 op2) | |
3113 | (set mode op1 (insn1 mode op1 op2)) | |
3114 | () | |
3115 | ) | |
3116 | ) | |
3117 | (shift shlr shl sll OP1_4 OP2_12 dr sr HI) | |
3118 | (shift shrr shr srl OP1_6 OP2_12 dr sr HI) | |
3119 | (shift rolr rol rol OP1_0 OP2_12 dr sr HI) | |
3120 | (shift rorr ror ror OP1_2 OP2_12 dr sr HI) | |
3121 | (shift ashrr ashr sra OP1_10 OP2_12 dr sr HI) | |
3122 | ||
3123 | (define-pmacro (shift1 name insn insn1 opc1 opc2 op1 op2 mode) | |
3124 | (dni name | |
3125 | (.str name "shift" ) | |
3126 | ((PIPE OS) (IDOC ALU)) | |
3127 | (.str insn " $"op1 ",$hash$"op2) | |
3128 | (+ opc1 opc2 op2 op1) | |
3129 | (set mode op1 (insn1 mode op1 op2)) | |
3130 | () | |
3131 | ) | |
3132 | ) | |
3133 | (shift1 shlri shl sll OP1_5 OP2_12 sr uimm4 HI) | |
3134 | (shift1 shrri shr srl OP1_7 OP2_12 sr uimm4 HI) | |
3135 | (shift1 rolri rol rol OP1_1 OP2_12 sr uimm4 HI) | |
3136 | (shift1 rorri ror ror OP1_3 OP2_12 sr uimm4 HI) | |
3137 | (shift1 ashrri ashr sra OP1_11 OP2_12 sr uimm4 HI) |