[CRYPTO] xcbc: Fix crash when ipsec uses xcbc-mac with big data chunk
[deliverable/linux.git] / crypto / async_tx / async_memcpy.c
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1/*
2 * copy offload engine support
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/highmem.h>
28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
30#include <linux/async_tx.h>
31
32/**
33 * async_memcpy - attempt to copy memory with a dma engine.
34 * @dest: destination page
35 * @src: src page
36 * @offset: offset in pages to start transaction
37 * @len: length in bytes
d909b347 38 * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK,
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39 * @depend_tx: memcpy depends on the result of this transaction
40 * @cb_fn: function to call when the memcpy completes
41 * @cb_param: parameter to pass to the callback routine
42 */
43struct dma_async_tx_descriptor *
44async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
45 unsigned int src_offset, size_t len, enum async_tx_flags flags,
46 struct dma_async_tx_descriptor *depend_tx,
47 dma_async_tx_callback cb_fn, void *cb_param)
48{
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49 struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_MEMCPY,
50 &dest, 1, &src, 1, len);
9bc89cd8 51 struct dma_device *device = chan ? chan->device : NULL;
0036731c 52 struct dma_async_tx_descriptor *tx = NULL;
9bc89cd8 53
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54 if (device) {
55 dma_addr_t dma_dest, dma_src;
d4c56f97 56 unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0;
9bc89cd8 57
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58 dma_dest = dma_map_page(device->dev, dest, dest_offset, len,
59 DMA_FROM_DEVICE);
9bc89cd8 60
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61 dma_src = dma_map_page(device->dev, src, src_offset, len,
62 DMA_TO_DEVICE);
9bc89cd8 63
0036731c 64 tx = device->device_prep_dma_memcpy(chan, dma_dest, dma_src,
d4c56f97 65 len, dma_prep_flags);
0036731c 66 }
9bc89cd8 67
0036731c 68 if (tx) {
3280ab3e 69 pr_debug("%s: (async) len: %zu\n", __func__, len);
9bc89cd8 70 async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
0036731c 71 } else {
9bc89cd8 72 void *dest_buf, *src_buf;
3280ab3e 73 pr_debug("%s: (sync) len: %zu\n", __func__, len);
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74
75 /* wait for any prerequisite operations */
76 if (depend_tx) {
77 /* if ack is already set then we cannot be sure
78 * we are referring to the correct operation
79 */
80 BUG_ON(depend_tx->ack);
81 if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
82 panic("%s: DMA_ERROR waiting for depend_tx\n",
3280ab3e 83 __func__);
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84 }
85
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86 dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset;
87 src_buf = kmap_atomic(src, KM_USER1) + src_offset;
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88
89 memcpy(dest_buf, src_buf, len);
90
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91 kunmap_atomic(dest_buf, KM_USER0);
92 kunmap_atomic(src_buf, KM_USER1);
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93
94 async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param);
95 }
96
97 return tx;
98}
99EXPORT_SYMBOL_GPL(async_memcpy);
100
101static int __init async_memcpy_init(void)
102{
103 return 0;
104}
105
106static void __exit async_memcpy_exit(void)
107{
108 do { } while (0);
109}
110
111module_init(async_memcpy_init);
112module_exit(async_memcpy_exit);
113
114MODULE_AUTHOR("Intel Corporation");
115MODULE_DESCRIPTION("asynchronous memcpy api");
116MODULE_LICENSE("GPL");
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