projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9bc89cd8 DW |
1 | /* |
| 2 | * memory fill offload engine support | |
| 3 | * | |
| 4 | * Copyright © 2006, Intel Corporation. | |
| 5 | * | |
| 6 | * Dan Williams <dan.j.williams@intel.com> | |
| 7 | * | |
| 8 | * with architecture considerations by: | |
| 9 | * Neil Brown <neilb@suse.de> | |
| 10 | * Jeff Garzik <jeff@garzik.org> | |
| 11 | * | |
| 12 | * This program is free software; you can redistribute it and/or modify it | |
| 13 | * under the terms and conditions of the GNU General Public License, | |
| 14 | * version 2, as published by the Free Software Foundation. | |
| 15 | * | |
| 16 | * This program is distributed in the hope it will be useful, but WITHOUT | |
| 17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 19 | * more details. | |
| 20 | * | |
| 21 | * You should have received a copy of the GNU General Public License along with | |
| 22 | * this program; if not, write to the Free Software Foundation, Inc., | |
| 23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
| 24 | * | |
| 25 | */ | |
| 26 | #include <linux/kernel.h> | |
| 27 | #include <linux/interrupt.h> | |
| 28 | #include <linux/mm.h> | |
| 29 | #include <linux/dma-mapping.h> | |
| 30 | #include <linux/async_tx.h> | |
| 31 | ||
| 32 | /** | |
| 33 | * async_memset - attempt to fill memory with a dma engine. | |
| 34 | * @dest: destination page | |
| 35 | * @val: fill value | |
| 36 | * @offset: offset in pages to start transaction | |
| 37 | * @len: length in bytes | |
| d909b347 | 38 | * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK |
| 9bc89cd8 DW |
39 | * @depend_tx: memset depends on the result of this transaction |
| 40 | * @cb_fn: function to call when the memcpy completes | |
| 41 | * @cb_param: parameter to pass to the callback routine | |
| 42 | */ | |
| 43 | struct dma_async_tx_descriptor * | |
| 44 | async_memset(struct page *dest, int val, unsigned int offset, | |
| 45 | size_t len, enum async_tx_flags flags, | |
| 46 | struct dma_async_tx_descriptor *depend_tx, | |
| 47 | dma_async_tx_callback cb_fn, void *cb_param) | |
| 48 | { | |
| 47437b2c DW |
49 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_MEMSET, |
| 50 | &dest, 1, NULL, 0, len); | |
| 9bc89cd8 | 51 | struct dma_device *device = chan ? chan->device : NULL; |
| 0036731c | 52 | struct dma_async_tx_descriptor *tx = NULL; |
| 9bc89cd8 | 53 | |
| 0036731c DW |
54 | if (device) { |
| 55 | dma_addr_t dma_dest; | |
| d4c56f97 | 56 | unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; |
| 9bc89cd8 | 57 | |
| 0036731c | 58 | dma_dest = dma_map_page(device->dev, dest, offset, len, |
| d909b347 | 59 | DMA_FROM_DEVICE); |
| 9bc89cd8 | 60 | |
| 0036731c | 61 | tx = device->device_prep_dma_memset(chan, dma_dest, val, len, |
| d4c56f97 | 62 | dma_prep_flags); |
| 0036731c DW |
63 | } |
| 64 | ||
| 65 | if (tx) { | |
| 3280ab3e | 66 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
| 9bc89cd8 DW |
67 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); |
| 68 | } else { /* run the memset synchronously */ | |
| 69 | void *dest_buf; | |
| 3280ab3e | 70 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
| 9bc89cd8 DW |
71 | |
| 72 | dest_buf = (void *) (((char *) page_address(dest)) + offset); | |
| 73 | ||
| 74 | /* wait for any prerequisite operations */ | |
| 75 | if (depend_tx) { | |
| 76 | /* if ack is already set then we cannot be sure | |
| 77 | * we are referring to the correct operation | |
| 78 | */ | |
| 79 | BUG_ON(depend_tx->ack); | |
| 80 | if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR) | |
| 81 | panic("%s: DMA_ERROR waiting for depend_tx\n", | |
| 3280ab3e | 82 | __func__); |
| 9bc89cd8 DW |
83 | } |
| 84 | ||
| 85 | memset(dest_buf, val, len); | |
| 86 | ||
| 87 | async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param); | |
| 88 | } | |
| 89 | ||
| 90 | return tx; | |
| 91 | } | |
| 92 | EXPORT_SYMBOL_GPL(async_memset); | |
| 93 | ||
| 94 | static int __init async_memset_init(void) | |
| 95 | { | |
| 96 | return 0; | |
| 97 | } | |
| 98 | ||
| 99 | static void __exit async_memset_exit(void) | |
| 100 | { | |
| 101 | do { } while (0); | |
| 102 | } | |
| 103 | ||
| 104 | module_init(async_memset_init); | |
| 105 | module_exit(async_memset_exit); | |
| 106 | ||
| 107 | MODULE_AUTHOR("Intel Corporation"); | |
| 108 | MODULE_DESCRIPTION("asynchronous memset api"); | |
| 109 | MODULE_LICENSE("GPL"); |