Commit | Line | Data |
---|---|---|
9bc89cd8 DW |
1 | /* |
2 | * xor offload engine api | |
3 | * | |
4 | * Copyright © 2006, Intel Corporation. | |
5 | * | |
6 | * Dan Williams <dan.j.williams@intel.com> | |
7 | * | |
8 | * with architecture considerations by: | |
9 | * Neil Brown <neilb@suse.de> | |
10 | * Jeff Garzik <jeff@garzik.org> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms and conditions of the GNU General Public License, | |
14 | * version 2, as published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope it will be useful, but WITHOUT | |
17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
19 | * more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along with | |
22 | * this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
24 | * | |
25 | */ | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/mm.h> | |
29 | #include <linux/dma-mapping.h> | |
30 | #include <linux/raid/xor.h> | |
31 | #include <linux/async_tx.h> | |
32 | ||
1367a3d3 DW |
33 | /* do_async_xor - dma map the pages and perform the xor with an engine. |
34 | * This routine is marked __always_inline so it can be compiled away | |
35 | * when CONFIG_DMA_ENGINE=n | |
36 | */ | |
0036731c | 37 | static __always_inline struct dma_async_tx_descriptor * |
1e55db2d DW |
38 | do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, |
39 | unsigned int offset, int src_cnt, size_t len, | |
40 | enum async_tx_flags flags, | |
41 | struct dma_async_tx_descriptor *depend_tx, | |
42 | dma_async_tx_callback cb_fn, void *cb_param) | |
9bc89cd8 | 43 | { |
1e55db2d | 44 | struct dma_device *dma = chan->device; |
0036731c | 45 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
1e55db2d DW |
46 | struct dma_async_tx_descriptor *tx = NULL; |
47 | int src_off = 0; | |
9bc89cd8 | 48 | int i; |
1e55db2d DW |
49 | dma_async_tx_callback _cb_fn; |
50 | void *_cb_param; | |
51 | enum async_tx_flags async_flags; | |
52 | enum dma_ctrl_flags dma_flags; | |
53 | int xor_src_cnt; | |
54 | dma_addr_t dma_dest; | |
9bc89cd8 | 55 | |
a06d568f DW |
56 | /* map the dest bidrectional in case it is re-used as a source */ |
57 | dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL); | |
58 | for (i = 0; i < src_cnt; i++) { | |
59 | /* only map the dest once */ | |
60 | if (unlikely(src_list[i] == dest)) { | |
61 | dma_src[i] = dma_dest; | |
62 | continue; | |
63 | } | |
1e55db2d | 64 | dma_src[i] = dma_map_page(dma->dev, src_list[i], offset, |
0036731c | 65 | len, DMA_TO_DEVICE); |
a06d568f | 66 | } |
0036731c | 67 | |
1e55db2d DW |
68 | while (src_cnt) { |
69 | async_flags = flags; | |
70 | dma_flags = 0; | |
71 | xor_src_cnt = min(src_cnt, dma->max_xor); | |
72 | /* if we are submitting additional xors, leave the chain open, | |
73 | * clear the callback parameters, and leave the destination | |
74 | * buffer mapped | |
75 | */ | |
76 | if (src_cnt > xor_src_cnt) { | |
77 | async_flags &= ~ASYNC_TX_ACK; | |
78 | dma_flags = DMA_COMPL_SKIP_DEST_UNMAP; | |
79 | _cb_fn = NULL; | |
80 | _cb_param = NULL; | |
81 | } else { | |
82 | _cb_fn = cb_fn; | |
83 | _cb_param = cb_param; | |
84 | } | |
85 | if (_cb_fn) | |
86 | dma_flags |= DMA_PREP_INTERRUPT; | |
87 | ||
88 | /* Since we have clobbered the src_list we are committed | |
89 | * to doing this asynchronously. Drivers force forward progress | |
90 | * in case they can not provide a descriptor | |
91 | */ | |
92 | tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off], | |
93 | xor_src_cnt, len, dma_flags); | |
94 | ||
669ab0b2 DW |
95 | if (unlikely(!tx)) |
96 | async_tx_quiesce(&depend_tx); | |
0036731c | 97 | |
1e55db2d | 98 | /* spin wait for the preceeding transactions to complete */ |
669ab0b2 DW |
99 | while (unlikely(!tx)) { |
100 | dma_async_issue_pending(chan); | |
1e55db2d DW |
101 | tx = dma->device_prep_dma_xor(chan, dma_dest, |
102 | &dma_src[src_off], | |
103 | xor_src_cnt, len, | |
104 | dma_flags); | |
669ab0b2 | 105 | } |
9bc89cd8 | 106 | |
1e55db2d DW |
107 | async_tx_submit(chan, tx, async_flags, depend_tx, _cb_fn, |
108 | _cb_param); | |
109 | ||
110 | depend_tx = tx; | |
111 | flags |= ASYNC_TX_DEP_ACK; | |
112 | ||
113 | if (src_cnt > xor_src_cnt) { | |
114 | /* drop completed sources */ | |
115 | src_cnt -= xor_src_cnt; | |
116 | src_off += xor_src_cnt; | |
117 | ||
118 | /* use the intermediate result a source */ | |
119 | dma_src[--src_off] = dma_dest; | |
120 | src_cnt++; | |
121 | } else | |
122 | break; | |
123 | } | |
0036731c DW |
124 | |
125 | return tx; | |
9bc89cd8 DW |
126 | } |
127 | ||
128 | static void | |
129 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
1e55db2d | 130 | int src_cnt, size_t len, enum async_tx_flags flags, |
1e55db2d | 131 | dma_async_tx_callback cb_fn, void *cb_param) |
9bc89cd8 | 132 | { |
9bc89cd8 | 133 | int i; |
1e55db2d DW |
134 | int xor_src_cnt; |
135 | int src_off = 0; | |
136 | void *dest_buf; | |
137 | void **srcs = (void **) src_list; | |
9bc89cd8 DW |
138 | |
139 | /* reuse the 'src_list' array to convert to buffer pointers */ | |
140 | for (i = 0; i < src_cnt; i++) | |
1e55db2d | 141 | srcs[i] = page_address(src_list[i]) + offset; |
9bc89cd8 DW |
142 | |
143 | /* set destination address */ | |
1e55db2d | 144 | dest_buf = page_address(dest) + offset; |
9bc89cd8 DW |
145 | |
146 | if (flags & ASYNC_TX_XOR_ZERO_DST) | |
1e55db2d | 147 | memset(dest_buf, 0, len); |
9bc89cd8 | 148 | |
1e55db2d DW |
149 | while (src_cnt > 0) { |
150 | /* process up to 'MAX_XOR_BLOCKS' sources */ | |
151 | xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS); | |
152 | xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]); | |
153 | ||
154 | /* drop completed sources */ | |
155 | src_cnt -= xor_src_cnt; | |
156 | src_off += xor_src_cnt; | |
157 | } | |
9bc89cd8 | 158 | |
3dce0171 | 159 | async_tx_sync_epilog(cb_fn, cb_param); |
9bc89cd8 DW |
160 | } |
161 | ||
162 | /** | |
163 | * async_xor - attempt to xor a set of blocks with a dma engine. | |
164 | * xor_blocks always uses the dest as a source so the ASYNC_TX_XOR_ZERO_DST | |
165 | * flag must be set to not include dest data in the calculation. The | |
166 | * assumption with dma eninges is that they only use the destination | |
167 | * buffer as a source when it is explicity specified in the source list. | |
168 | * @dest: destination page | |
169 | * @src_list: array of source pages (if the dest is also a source it must be | |
170 | * at index zero). The contents of this array may be overwritten. | |
171 | * @offset: offset in pages to start transaction | |
172 | * @src_cnt: number of source pages | |
173 | * @len: length in bytes | |
174 | * @flags: ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DEST, | |
d909b347 | 175 | * ASYNC_TX_ACK, ASYNC_TX_DEP_ACK |
9bc89cd8 DW |
176 | * @depend_tx: xor depends on the result of this transaction. |
177 | * @cb_fn: function to call when the xor completes | |
178 | * @cb_param: parameter to pass to the callback routine | |
179 | */ | |
180 | struct dma_async_tx_descriptor * | |
181 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
182 | int src_cnt, size_t len, enum async_tx_flags flags, | |
183 | struct dma_async_tx_descriptor *depend_tx, | |
184 | dma_async_tx_callback cb_fn, void *cb_param) | |
185 | { | |
47437b2c DW |
186 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_XOR, |
187 | &dest, 1, src_list, | |
188 | src_cnt, len); | |
9bc89cd8 DW |
189 | BUG_ON(src_cnt <= 1); |
190 | ||
1e55db2d DW |
191 | if (chan) { |
192 | /* run the xor asynchronously */ | |
193 | pr_debug("%s (async): len: %zu\n", __func__, len); | |
9bc89cd8 | 194 | |
1e55db2d DW |
195 | return do_async_xor(chan, dest, src_list, offset, src_cnt, len, |
196 | flags, depend_tx, cb_fn, cb_param); | |
197 | } else { | |
198 | /* run the xor synchronously */ | |
199 | pr_debug("%s (sync): len: %zu\n", __func__, len); | |
9bc89cd8 | 200 | |
1e55db2d DW |
201 | /* in the sync case the dest is an implied source |
202 | * (assumes the dest is the first source) | |
9bc89cd8 | 203 | */ |
1e55db2d DW |
204 | if (flags & ASYNC_TX_XOR_DROP_DST) { |
205 | src_cnt--; | |
206 | src_list++; | |
207 | } | |
9bc89cd8 | 208 | |
1e55db2d | 209 | /* wait for any prerequisite operations */ |
d2c52b79 | 210 | async_tx_quiesce(&depend_tx); |
9bc89cd8 | 211 | |
1e55db2d | 212 | do_sync_xor(dest, src_list, offset, src_cnt, len, |
3dce0171 | 213 | flags, cb_fn, cb_param); |
9bc89cd8 | 214 | |
1e55db2d | 215 | return NULL; |
9bc89cd8 | 216 | } |
9bc89cd8 DW |
217 | } |
218 | EXPORT_SYMBOL_GPL(async_xor); | |
219 | ||
220 | static int page_is_zero(struct page *p, unsigned int offset, size_t len) | |
221 | { | |
222 | char *a = page_address(p) + offset; | |
223 | return ((*(u32 *) a) == 0 && | |
224 | memcmp(a, a + 4, len - 4) == 0); | |
225 | } | |
226 | ||
227 | /** | |
228 | * async_xor_zero_sum - attempt a xor parity check with a dma engine. | |
229 | * @dest: destination page used if the xor is performed synchronously | |
230 | * @src_list: array of source pages. The dest page must be listed as a source | |
231 | * at index zero. The contents of this array may be overwritten. | |
232 | * @offset: offset in pages to start transaction | |
233 | * @src_cnt: number of source pages | |
234 | * @len: length in bytes | |
235 | * @result: 0 if sum == 0 else non-zero | |
d909b347 | 236 | * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK |
9bc89cd8 DW |
237 | * @depend_tx: xor depends on the result of this transaction. |
238 | * @cb_fn: function to call when the xor completes | |
239 | * @cb_param: parameter to pass to the callback routine | |
240 | */ | |
241 | struct dma_async_tx_descriptor * | |
242 | async_xor_zero_sum(struct page *dest, struct page **src_list, | |
243 | unsigned int offset, int src_cnt, size_t len, | |
244 | u32 *result, enum async_tx_flags flags, | |
245 | struct dma_async_tx_descriptor *depend_tx, | |
246 | dma_async_tx_callback cb_fn, void *cb_param) | |
247 | { | |
47437b2c DW |
248 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_ZERO_SUM, |
249 | &dest, 1, src_list, | |
250 | src_cnt, len); | |
9bc89cd8 | 251 | struct dma_device *device = chan ? chan->device : NULL; |
0036731c | 252 | struct dma_async_tx_descriptor *tx = NULL; |
9bc89cd8 DW |
253 | |
254 | BUG_ON(src_cnt <= 1); | |
255 | ||
8d8002f6 | 256 | if (device && src_cnt <= device->max_xor) { |
0036731c | 257 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
d4c56f97 | 258 | unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; |
0036731c | 259 | int i; |
9bc89cd8 | 260 | |
3280ab3e | 261 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
9bc89cd8 | 262 | |
0036731c DW |
263 | for (i = 0; i < src_cnt; i++) |
264 | dma_src[i] = dma_map_page(device->dev, src_list[i], | |
265 | offset, len, DMA_TO_DEVICE); | |
266 | ||
267 | tx = device->device_prep_dma_zero_sum(chan, dma_src, src_cnt, | |
268 | len, result, | |
d4c56f97 | 269 | dma_prep_flags); |
669ab0b2 DW |
270 | if (unlikely(!tx)) { |
271 | async_tx_quiesce(&depend_tx); | |
0036731c | 272 | |
e34a8ae7 | 273 | while (!tx) { |
669ab0b2 | 274 | dma_async_issue_pending(chan); |
0036731c DW |
275 | tx = device->device_prep_dma_zero_sum(chan, |
276 | dma_src, src_cnt, len, result, | |
d4c56f97 | 277 | dma_prep_flags); |
e34a8ae7 | 278 | } |
9bc89cd8 DW |
279 | } |
280 | ||
281 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); | |
282 | } else { | |
283 | unsigned long xor_flags = flags; | |
284 | ||
3280ab3e | 285 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
9bc89cd8 DW |
286 | |
287 | xor_flags |= ASYNC_TX_XOR_DROP_DST; | |
288 | xor_flags &= ~ASYNC_TX_ACK; | |
289 | ||
290 | tx = async_xor(dest, src_list, offset, src_cnt, len, xor_flags, | |
291 | depend_tx, NULL, NULL); | |
292 | ||
d2c52b79 | 293 | async_tx_quiesce(&tx); |
9bc89cd8 DW |
294 | |
295 | *result = page_is_zero(dest, offset, len) ? 0 : 1; | |
296 | ||
3dce0171 | 297 | async_tx_sync_epilog(cb_fn, cb_param); |
9bc89cd8 DW |
298 | } |
299 | ||
300 | return tx; | |
301 | } | |
302 | EXPORT_SYMBOL_GPL(async_xor_zero_sum); | |
303 | ||
304 | static int __init async_xor_init(void) | |
305 | { | |
0036731c DW |
306 | #ifdef CONFIG_DMA_ENGINE |
307 | /* To conserve stack space the input src_list (array of page pointers) | |
308 | * is reused to hold the array of dma addresses passed to the driver. | |
309 | * This conversion is only possible when dma_addr_t is less than the | |
310 | * the size of a pointer. HIGHMEM64G is known to violate this | |
311 | * assumption. | |
312 | */ | |
313 | BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(struct page *)); | |
314 | #endif | |
315 | ||
9bc89cd8 DW |
316 | return 0; |
317 | } | |
318 | ||
319 | static void __exit async_xor_exit(void) | |
320 | { | |
321 | do { } while (0); | |
322 | } | |
323 | ||
324 | module_init(async_xor_init); | |
325 | module_exit(async_xor_exit); | |
326 | ||
327 | MODULE_AUTHOR("Intel Corporation"); | |
328 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); | |
329 | MODULE_LICENSE("GPL"); |