Commit | Line | Data |
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9bc89cd8 DW |
1 | /* |
2 | * xor offload engine api | |
3 | * | |
4 | * Copyright © 2006, Intel Corporation. | |
5 | * | |
6 | * Dan Williams <dan.j.williams@intel.com> | |
7 | * | |
8 | * with architecture considerations by: | |
9 | * Neil Brown <neilb@suse.de> | |
10 | * Jeff Garzik <jeff@garzik.org> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms and conditions of the GNU General Public License, | |
14 | * version 2, as published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope it will be useful, but WITHOUT | |
17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
19 | * more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along with | |
22 | * this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
24 | * | |
25 | */ | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/mm.h> | |
29 | #include <linux/dma-mapping.h> | |
30 | #include <linux/raid/xor.h> | |
31 | #include <linux/async_tx.h> | |
32 | ||
06164f31 DW |
33 | /* do_async_xor - dma map the pages and perform the xor with an engine */ |
34 | static __async_inline struct dma_async_tx_descriptor * | |
1e55db2d DW |
35 | do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, |
36 | unsigned int offset, int src_cnt, size_t len, | |
a08abd8c | 37 | struct async_submit_ctl *submit) |
9bc89cd8 | 38 | { |
1e55db2d | 39 | struct dma_device *dma = chan->device; |
0036731c | 40 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
1e55db2d DW |
41 | struct dma_async_tx_descriptor *tx = NULL; |
42 | int src_off = 0; | |
9bc89cd8 | 43 | int i; |
a08abd8c DW |
44 | dma_async_tx_callback cb_fn_orig = submit->cb_fn; |
45 | void *cb_param_orig = submit->cb_param; | |
46 | enum async_tx_flags flags_orig = submit->flags; | |
1e55db2d DW |
47 | enum dma_ctrl_flags dma_flags; |
48 | int xor_src_cnt; | |
49 | dma_addr_t dma_dest; | |
9bc89cd8 | 50 | |
a06d568f DW |
51 | /* map the dest bidrectional in case it is re-used as a source */ |
52 | dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL); | |
53 | for (i = 0; i < src_cnt; i++) { | |
54 | /* only map the dest once */ | |
55 | if (unlikely(src_list[i] == dest)) { | |
56 | dma_src[i] = dma_dest; | |
57 | continue; | |
58 | } | |
1e55db2d | 59 | dma_src[i] = dma_map_page(dma->dev, src_list[i], offset, |
0036731c | 60 | len, DMA_TO_DEVICE); |
a06d568f | 61 | } |
0036731c | 62 | |
1e55db2d | 63 | while (src_cnt) { |
a08abd8c | 64 | submit->flags = flags_orig; |
1e55db2d DW |
65 | dma_flags = 0; |
66 | xor_src_cnt = min(src_cnt, dma->max_xor); | |
67 | /* if we are submitting additional xors, leave the chain open, | |
68 | * clear the callback parameters, and leave the destination | |
69 | * buffer mapped | |
70 | */ | |
71 | if (src_cnt > xor_src_cnt) { | |
a08abd8c | 72 | submit->flags &= ~ASYNC_TX_ACK; |
1e55db2d | 73 | dma_flags = DMA_COMPL_SKIP_DEST_UNMAP; |
a08abd8c DW |
74 | submit->cb_fn = NULL; |
75 | submit->cb_param = NULL; | |
1e55db2d | 76 | } else { |
a08abd8c DW |
77 | submit->cb_fn = cb_fn_orig; |
78 | submit->cb_param = cb_param_orig; | |
1e55db2d | 79 | } |
a08abd8c | 80 | if (submit->cb_fn) |
1e55db2d DW |
81 | dma_flags |= DMA_PREP_INTERRUPT; |
82 | ||
83 | /* Since we have clobbered the src_list we are committed | |
84 | * to doing this asynchronously. Drivers force forward progress | |
85 | * in case they can not provide a descriptor | |
86 | */ | |
87 | tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off], | |
88 | xor_src_cnt, len, dma_flags); | |
89 | ||
669ab0b2 | 90 | if (unlikely(!tx)) |
a08abd8c | 91 | async_tx_quiesce(&submit->depend_tx); |
0036731c | 92 | |
1e55db2d | 93 | /* spin wait for the preceeding transactions to complete */ |
669ab0b2 DW |
94 | while (unlikely(!tx)) { |
95 | dma_async_issue_pending(chan); | |
1e55db2d DW |
96 | tx = dma->device_prep_dma_xor(chan, dma_dest, |
97 | &dma_src[src_off], | |
98 | xor_src_cnt, len, | |
99 | dma_flags); | |
669ab0b2 | 100 | } |
9bc89cd8 | 101 | |
a08abd8c DW |
102 | async_tx_submit(chan, tx, submit); |
103 | submit->depend_tx = tx; | |
1e55db2d DW |
104 | |
105 | if (src_cnt > xor_src_cnt) { | |
106 | /* drop completed sources */ | |
107 | src_cnt -= xor_src_cnt; | |
108 | src_off += xor_src_cnt; | |
109 | ||
110 | /* use the intermediate result a source */ | |
111 | dma_src[--src_off] = dma_dest; | |
112 | src_cnt++; | |
113 | } else | |
114 | break; | |
115 | } | |
0036731c DW |
116 | |
117 | return tx; | |
9bc89cd8 DW |
118 | } |
119 | ||
120 | static void | |
121 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
a08abd8c | 122 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
9bc89cd8 | 123 | { |
9bc89cd8 | 124 | int i; |
1e55db2d DW |
125 | int xor_src_cnt; |
126 | int src_off = 0; | |
127 | void *dest_buf; | |
128 | void **srcs = (void **) src_list; | |
9bc89cd8 DW |
129 | |
130 | /* reuse the 'src_list' array to convert to buffer pointers */ | |
131 | for (i = 0; i < src_cnt; i++) | |
1e55db2d | 132 | srcs[i] = page_address(src_list[i]) + offset; |
9bc89cd8 DW |
133 | |
134 | /* set destination address */ | |
1e55db2d | 135 | dest_buf = page_address(dest) + offset; |
9bc89cd8 | 136 | |
a08abd8c | 137 | if (submit->flags & ASYNC_TX_XOR_ZERO_DST) |
1e55db2d | 138 | memset(dest_buf, 0, len); |
9bc89cd8 | 139 | |
1e55db2d DW |
140 | while (src_cnt > 0) { |
141 | /* process up to 'MAX_XOR_BLOCKS' sources */ | |
142 | xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS); | |
143 | xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]); | |
144 | ||
145 | /* drop completed sources */ | |
146 | src_cnt -= xor_src_cnt; | |
147 | src_off += xor_src_cnt; | |
148 | } | |
9bc89cd8 | 149 | |
a08abd8c | 150 | async_tx_sync_epilog(submit); |
9bc89cd8 DW |
151 | } |
152 | ||
153 | /** | |
154 | * async_xor - attempt to xor a set of blocks with a dma engine. | |
9bc89cd8 | 155 | * @dest: destination page |
a08abd8c DW |
156 | * @src_list: array of source pages |
157 | * @offset: common src/dst offset to start transaction | |
9bc89cd8 DW |
158 | * @src_cnt: number of source pages |
159 | * @len: length in bytes | |
a08abd8c DW |
160 | * @submit: submission / completion modifiers |
161 | * | |
162 | * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST | |
163 | * | |
164 | * xor_blocks always uses the dest as a source so the | |
165 | * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in | |
166 | * the calculation. The assumption with dma eninges is that they only | |
167 | * use the destination buffer as a source when it is explicity specified | |
168 | * in the source list. | |
169 | * | |
170 | * src_list note: if the dest is also a source it must be at index zero. | |
171 | * The contents of this array will be overwritten if a scribble region | |
172 | * is not specified. | |
9bc89cd8 DW |
173 | */ |
174 | struct dma_async_tx_descriptor * | |
175 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
a08abd8c | 176 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
9bc89cd8 | 177 | { |
a08abd8c | 178 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR, |
47437b2c DW |
179 | &dest, 1, src_list, |
180 | src_cnt, len); | |
9bc89cd8 DW |
181 | BUG_ON(src_cnt <= 1); |
182 | ||
1e55db2d DW |
183 | if (chan) { |
184 | /* run the xor asynchronously */ | |
185 | pr_debug("%s (async): len: %zu\n", __func__, len); | |
9bc89cd8 | 186 | |
1e55db2d | 187 | return do_async_xor(chan, dest, src_list, offset, src_cnt, len, |
a08abd8c | 188 | submit); |
1e55db2d DW |
189 | } else { |
190 | /* run the xor synchronously */ | |
191 | pr_debug("%s (sync): len: %zu\n", __func__, len); | |
9bc89cd8 | 192 | |
1e55db2d DW |
193 | /* in the sync case the dest is an implied source |
194 | * (assumes the dest is the first source) | |
9bc89cd8 | 195 | */ |
a08abd8c | 196 | if (submit->flags & ASYNC_TX_XOR_DROP_DST) { |
1e55db2d DW |
197 | src_cnt--; |
198 | src_list++; | |
199 | } | |
9bc89cd8 | 200 | |
1e55db2d | 201 | /* wait for any prerequisite operations */ |
a08abd8c | 202 | async_tx_quiesce(&submit->depend_tx); |
9bc89cd8 | 203 | |
a08abd8c | 204 | do_sync_xor(dest, src_list, offset, src_cnt, len, submit); |
9bc89cd8 | 205 | |
1e55db2d | 206 | return NULL; |
9bc89cd8 | 207 | } |
9bc89cd8 DW |
208 | } |
209 | EXPORT_SYMBOL_GPL(async_xor); | |
210 | ||
211 | static int page_is_zero(struct page *p, unsigned int offset, size_t len) | |
212 | { | |
213 | char *a = page_address(p) + offset; | |
214 | return ((*(u32 *) a) == 0 && | |
215 | memcmp(a, a + 4, len - 4) == 0); | |
216 | } | |
217 | ||
218 | /** | |
099f53cb | 219 | * async_xor_val - attempt a xor parity check with a dma engine. |
9bc89cd8 | 220 | * @dest: destination page used if the xor is performed synchronously |
a08abd8c | 221 | * @src_list: array of source pages |
9bc89cd8 DW |
222 | * @offset: offset in pages to start transaction |
223 | * @src_cnt: number of source pages | |
224 | * @len: length in bytes | |
225 | * @result: 0 if sum == 0 else non-zero | |
a08abd8c DW |
226 | * @submit: submission / completion modifiers |
227 | * | |
228 | * honored flags: ASYNC_TX_ACK | |
229 | * | |
230 | * src_list note: if the dest is also a source it must be at index zero. | |
231 | * The contents of this array will be overwritten if a scribble region | |
232 | * is not specified. | |
9bc89cd8 DW |
233 | */ |
234 | struct dma_async_tx_descriptor * | |
a08abd8c DW |
235 | async_xor_val(struct page *dest, struct page **src_list, unsigned int offset, |
236 | int src_cnt, size_t len, u32 *result, | |
237 | struct async_submit_ctl *submit) | |
9bc89cd8 | 238 | { |
a08abd8c | 239 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR_VAL, |
47437b2c DW |
240 | &dest, 1, src_list, |
241 | src_cnt, len); | |
9bc89cd8 | 242 | struct dma_device *device = chan ? chan->device : NULL; |
0036731c | 243 | struct dma_async_tx_descriptor *tx = NULL; |
9bc89cd8 DW |
244 | |
245 | BUG_ON(src_cnt <= 1); | |
246 | ||
8d8002f6 | 247 | if (device && src_cnt <= device->max_xor) { |
0036731c | 248 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
a08abd8c | 249 | unsigned long dma_prep_flags; |
0036731c | 250 | int i; |
9bc89cd8 | 251 | |
3280ab3e | 252 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
9bc89cd8 | 253 | |
a08abd8c | 254 | dma_prep_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0; |
0036731c DW |
255 | for (i = 0; i < src_cnt; i++) |
256 | dma_src[i] = dma_map_page(device->dev, src_list[i], | |
257 | offset, len, DMA_TO_DEVICE); | |
258 | ||
099f53cb DW |
259 | tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt, |
260 | len, result, | |
261 | dma_prep_flags); | |
669ab0b2 | 262 | if (unlikely(!tx)) { |
a08abd8c | 263 | async_tx_quiesce(&submit->depend_tx); |
0036731c | 264 | |
e34a8ae7 | 265 | while (!tx) { |
669ab0b2 | 266 | dma_async_issue_pending(chan); |
099f53cb | 267 | tx = device->device_prep_dma_xor_val(chan, |
0036731c | 268 | dma_src, src_cnt, len, result, |
d4c56f97 | 269 | dma_prep_flags); |
e34a8ae7 | 270 | } |
9bc89cd8 DW |
271 | } |
272 | ||
a08abd8c | 273 | async_tx_submit(chan, tx, submit); |
9bc89cd8 | 274 | } else { |
a08abd8c | 275 | enum async_tx_flags flags_orig = submit->flags; |
9bc89cd8 | 276 | |
3280ab3e | 277 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
9bc89cd8 | 278 | |
a08abd8c DW |
279 | submit->flags |= ASYNC_TX_XOR_DROP_DST; |
280 | submit->flags &= ~ASYNC_TX_ACK; | |
9bc89cd8 | 281 | |
a08abd8c | 282 | tx = async_xor(dest, src_list, offset, src_cnt, len, submit); |
9bc89cd8 | 283 | |
d2c52b79 | 284 | async_tx_quiesce(&tx); |
9bc89cd8 DW |
285 | |
286 | *result = page_is_zero(dest, offset, len) ? 0 : 1; | |
287 | ||
a08abd8c DW |
288 | async_tx_sync_epilog(submit); |
289 | submit->flags = flags_orig; | |
9bc89cd8 DW |
290 | } |
291 | ||
292 | return tx; | |
293 | } | |
099f53cb | 294 | EXPORT_SYMBOL_GPL(async_xor_val); |
9bc89cd8 DW |
295 | |
296 | static int __init async_xor_init(void) | |
297 | { | |
0036731c DW |
298 | #ifdef CONFIG_DMA_ENGINE |
299 | /* To conserve stack space the input src_list (array of page pointers) | |
300 | * is reused to hold the array of dma addresses passed to the driver. | |
301 | * This conversion is only possible when dma_addr_t is less than the | |
302 | * the size of a pointer. HIGHMEM64G is known to violate this | |
303 | * assumption. | |
304 | */ | |
305 | BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(struct page *)); | |
306 | #endif | |
307 | ||
9bc89cd8 DW |
308 | return 0; |
309 | } | |
310 | ||
311 | static void __exit async_xor_exit(void) | |
312 | { | |
313 | do { } while (0); | |
314 | } | |
315 | ||
316 | module_init(async_xor_init); | |
317 | module_exit(async_xor_exit); | |
318 | ||
319 | MODULE_AUTHOR("Intel Corporation"); | |
320 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); | |
321 | MODULE_LICENSE("GPL"); |