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1da177e4 LT |
1 | /******************************************************************************* |
2 | * | |
3 | * Module Name: hwregs - Read/write access functions for the various ACPI | |
4 | * control and status registers. | |
5 | * | |
6 | ******************************************************************************/ | |
7 | ||
8 | /* | |
c8100dc4 | 9 | * Copyright (C) 2000 - 2016, Intel Corp. |
1da177e4 LT |
10 | * All rights reserved. |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or without | |
13 | * modification, are permitted provided that the following conditions | |
14 | * are met: | |
15 | * 1. Redistributions of source code must retain the above copyright | |
16 | * notice, this list of conditions, and the following disclaimer, | |
17 | * without modification. | |
18 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer | |
19 | * substantially similar to the "NO WARRANTY" disclaimer below | |
20 | * ("Disclaimer") and any redistribution must be conditioned upon | |
21 | * including a substantially similar Disclaimer requirement for further | |
22 | * binary redistribution. | |
23 | * 3. Neither the names of the above-listed copyright holders nor the names | |
24 | * of any contributors may be used to endorse or promote products derived | |
25 | * from this software without specific prior written permission. | |
26 | * | |
27 | * Alternatively, this software may be distributed under the terms of the | |
28 | * GNU General Public License ("GPL") version 2 as published by the Free | |
29 | * Software Foundation. | |
30 | * | |
31 | * NO WARRANTY | |
32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
33 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
34 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | |
35 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
36 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
37 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
38 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
39 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
40 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | |
41 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
42 | * POSSIBILITY OF SUCH DAMAGES. | |
43 | */ | |
44 | ||
1da177e4 | 45 | #include <acpi/acpi.h> |
e2f7a777 | 46 | #include "accommon.h" |
e2f7a777 | 47 | #include "acevents.h" |
1da177e4 LT |
48 | |
49 | #define _COMPONENT ACPI_HARDWARE | |
4be44fcd | 50 | ACPI_MODULE_NAME("hwregs") |
1da177e4 | 51 | |
33620c54 | 52 | #if (!ACPI_REDUCED_HARDWARE) |
c520abad | 53 | /* Local Prototypes */ |
b314a172 LZ |
54 | static u8 |
55 | acpi_hw_get_access_bit_width(struct acpi_generic_address *reg, | |
56 | u8 max_bit_width); | |
57 | ||
c520abad BM |
58 | static acpi_status |
59 | acpi_hw_read_multiple(u32 *value, | |
60 | struct acpi_generic_address *register_a, | |
61 | struct acpi_generic_address *register_b); | |
62 | ||
63 | static acpi_status | |
64 | acpi_hw_write_multiple(u32 value, | |
65 | struct acpi_generic_address *register_a, | |
66 | struct acpi_generic_address *register_b); | |
67 | ||
33620c54 BM |
68 | #endif /* !ACPI_REDUCED_HARDWARE */ |
69 | ||
b314a172 LZ |
70 | /****************************************************************************** |
71 | * | |
72 | * FUNCTION: acpi_hw_get_access_bit_width | |
73 | * | |
74 | * PARAMETERS: reg - GAS register structure | |
75 | * max_bit_width - Max bit_width supported (32 or 64) | |
76 | * | |
77 | * RETURN: Status | |
78 | * | |
79 | * DESCRIPTION: Obtain optimal access bit width | |
80 | * | |
81 | ******************************************************************************/ | |
82 | ||
83 | static u8 | |
84 | acpi_hw_get_access_bit_width(struct acpi_generic_address *reg, u8 max_bit_width) | |
85 | { | |
b314a172 | 86 | if (!reg->access_width) { |
7f9bef9d LZ |
87 | if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { |
88 | max_bit_width = 32; | |
89 | } | |
90 | ||
b314a172 LZ |
91 | /* |
92 | * Detect old register descriptors where only the bit_width field | |
7f9bef9d | 93 | * makes senses. |
b314a172 | 94 | */ |
7f9bef9d LZ |
95 | if (reg->bit_width < max_bit_width && |
96 | !reg->bit_offset && reg->bit_width && | |
b314a172 | 97 | ACPI_IS_POWER_OF_TWO(reg->bit_width) && |
7f9bef9d | 98 | ACPI_IS_ALIGNED(reg->bit_width, 8)) { |
b314a172 | 99 | return (reg->bit_width); |
b314a172 | 100 | } |
7f9bef9d | 101 | return (max_bit_width); |
b314a172 LZ |
102 | } else { |
103 | return (1 << (reg->access_width + 2)); | |
104 | } | |
105 | } | |
106 | ||
c6b5774c BM |
107 | /****************************************************************************** |
108 | * | |
109 | * FUNCTION: acpi_hw_validate_register | |
110 | * | |
ba494bee | 111 | * PARAMETERS: reg - GAS register structure |
c6b5774c | 112 | * max_bit_width - Max bit_width supported (32 or 64) |
ba494bee | 113 | * address - Pointer to where the gas->address |
c6b5774c BM |
114 | * is returned |
115 | * | |
116 | * RETURN: Status | |
117 | * | |
118 | * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS | |
119 | * pointer, Address, space_id, bit_width, and bit_offset. | |
120 | * | |
121 | ******************************************************************************/ | |
122 | ||
123 | acpi_status | |
124 | acpi_hw_validate_register(struct acpi_generic_address *reg, | |
125 | u8 max_bit_width, u64 *address) | |
126 | { | |
920de6eb LZ |
127 | u8 bit_width; |
128 | u8 access_width; | |
c6b5774c BM |
129 | |
130 | /* Must have a valid pointer to a GAS structure */ | |
131 | ||
132 | if (!reg) { | |
133 | return (AE_BAD_PARAMETER); | |
134 | } | |
135 | ||
136 | /* | |
137 | * Copy the target address. This handles possible alignment issues. | |
138 | * Address must not be null. A null address also indicates an optional | |
139 | * ACPI register that is not supported, so no error message. | |
140 | */ | |
141 | ACPI_MOVE_64_TO_64(address, ®->address); | |
142 | if (!(*address)) { | |
143 | return (AE_BAD_ADDRESS); | |
144 | } | |
145 | ||
ba494bee | 146 | /* Validate the space_ID */ |
c6b5774c BM |
147 | |
148 | if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) && | |
149 | (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) { | |
150 | ACPI_ERROR((AE_INFO, | |
151 | "Unsupported address space: 0x%X", reg->space_id)); | |
152 | return (AE_SUPPORT); | |
153 | } | |
154 | ||
920de6eb | 155 | /* Validate the access_width */ |
c6b5774c | 156 | |
920de6eb | 157 | if (reg->access_width > 4) { |
c6b5774c | 158 | ACPI_ERROR((AE_INFO, |
920de6eb LZ |
159 | "Unsupported register access width: 0x%X", |
160 | reg->access_width)); | |
c6b5774c BM |
161 | return (AE_SUPPORT); |
162 | } | |
163 | ||
920de6eb | 164 | /* Validate the bit_width, convert access_width into number of bits */ |
c6b5774c | 165 | |
b314a172 | 166 | access_width = acpi_hw_get_access_bit_width(reg, max_bit_width); |
920de6eb LZ |
167 | bit_width = |
168 | ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width); | |
169 | if (max_bit_width < bit_width) { | |
c6b5774c | 170 | ACPI_WARNING((AE_INFO, |
920de6eb LZ |
171 | "Requested bit width 0x%X is smaller than register bit width 0x%X", |
172 | max_bit_width, bit_width)); | |
173 | return (AE_SUPPORT); | |
c6b5774c BM |
174 | } |
175 | ||
176 | return (AE_OK); | |
177 | } | |
178 | ||
179 | /****************************************************************************** | |
180 | * | |
181 | * FUNCTION: acpi_hw_read | |
182 | * | |
ba494bee BM |
183 | * PARAMETERS: value - Where the value is returned |
184 | * reg - GAS register structure | |
c6b5774c BM |
185 | * |
186 | * RETURN: Status | |
187 | * | |
188 | * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max | |
189 | * version of acpi_read, used internally since the overhead of | |
190 | * 64-bit values is not needed. | |
191 | * | |
192 | * LIMITATIONS: <These limitations also apply to acpi_hw_write> | |
ba494bee | 193 | * space_ID must be system_memory or system_IO. |
c6b5774c BM |
194 | * |
195 | ******************************************************************************/ | |
196 | ||
197 | acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg) | |
198 | { | |
199 | u64 address; | |
c3bc26d4 LZ |
200 | u8 access_width; |
201 | u32 bit_width; | |
202 | u8 bit_offset; | |
653f4b53 | 203 | u64 value64; |
c3bc26d4 LZ |
204 | u32 value32; |
205 | u8 index; | |
c6b5774c BM |
206 | acpi_status status; |
207 | ||
208 | ACPI_FUNCTION_NAME(hw_read); | |
209 | ||
210 | /* Validate contents of the GAS register */ | |
211 | ||
212 | status = acpi_hw_validate_register(reg, 32, &address); | |
213 | if (ACPI_FAILURE(status)) { | |
214 | return (status); | |
215 | } | |
216 | ||
c3bc26d4 LZ |
217 | /* |
218 | * Initialize entire 32-bit return value to zero, convert access_width | |
219 | * into number of bits based | |
220 | */ | |
c6b5774c | 221 | *value = 0; |
c3bc26d4 LZ |
222 | access_width = acpi_hw_get_access_bit_width(reg, 32); |
223 | bit_width = reg->bit_offset + reg->bit_width; | |
224 | bit_offset = reg->bit_offset; | |
c6b5774c BM |
225 | |
226 | /* | |
227 | * Two address spaces supported: Memory or IO. PCI_Config is | |
228 | * not supported here because the GAS structure is insufficient | |
229 | */ | |
c3bc26d4 LZ |
230 | index = 0; |
231 | while (bit_width) { | |
232 | if (bit_offset >= access_width) { | |
233 | value32 = 0; | |
234 | bit_offset -= access_width; | |
235 | } else { | |
236 | if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { | |
237 | status = | |
238 | acpi_os_read_memory((acpi_physical_address) | |
239 | address + | |
240 | index * | |
241 | ACPI_DIV_8 | |
242 | (access_width), | |
243 | &value64, access_width); | |
244 | value32 = (u32)value64; | |
245 | } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ | |
246 | ||
247 | status = acpi_hw_read_port((acpi_io_address) | |
248 | address + | |
249 | index * | |
250 | ACPI_DIV_8 | |
251 | (access_width), | |
252 | &value32, | |
253 | access_width); | |
254 | } | |
653f4b53 | 255 | |
c3bc26d4 LZ |
256 | /* |
257 | * Use offset style bit masks because: | |
258 | * bit_offset < access_width/bit_width < access_width, and | |
259 | * access_width is ensured to be less than 32-bits by | |
260 | * acpi_hw_validate_register(). | |
261 | */ | |
262 | if (bit_offset) { | |
263 | value32 &= ACPI_MASK_BITS_BELOW(bit_offset); | |
264 | bit_offset = 0; | |
265 | } | |
266 | if (bit_width < access_width) { | |
267 | value32 &= ACPI_MASK_BITS_ABOVE(bit_width); | |
268 | } | |
269 | } | |
270 | ||
271 | /* | |
272 | * Use offset style bit writes because "Index * AccessWidth" is | |
273 | * ensured to be less than 32-bits by acpi_hw_validate_register(). | |
274 | */ | |
275 | ACPI_SET_BITS(value, index * access_width, | |
276 | ACPI_MASK_BITS_ABOVE_32(access_width), value32); | |
c6b5774c | 277 | |
c3bc26d4 LZ |
278 | bit_width -= |
279 | bit_width > access_width ? access_width : bit_width; | |
280 | index++; | |
c6b5774c BM |
281 | } |
282 | ||
283 | ACPI_DEBUG_PRINT((ACPI_DB_IO, | |
284 | "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n", | |
c3bc26d4 | 285 | *value, access_width, ACPI_FORMAT_UINT64(address), |
c6b5774c BM |
286 | acpi_ut_get_region_name(reg->space_id))); |
287 | ||
288 | return (status); | |
289 | } | |
290 | ||
291 | /****************************************************************************** | |
292 | * | |
293 | * FUNCTION: acpi_hw_write | |
294 | * | |
ba494bee BM |
295 | * PARAMETERS: value - Value to be written |
296 | * reg - GAS register structure | |
c6b5774c BM |
297 | * |
298 | * RETURN: Status | |
299 | * | |
300 | * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max | |
301 | * version of acpi_write, used internally since the overhead of | |
302 | * 64-bit values is not needed. | |
303 | * | |
304 | ******************************************************************************/ | |
305 | ||
306 | acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg) | |
307 | { | |
308 | u64 address; | |
309 | acpi_status status; | |
310 | ||
311 | ACPI_FUNCTION_NAME(hw_write); | |
312 | ||
313 | /* Validate contents of the GAS register */ | |
314 | ||
315 | status = acpi_hw_validate_register(reg, 32, &address); | |
316 | if (ACPI_FAILURE(status)) { | |
317 | return (status); | |
318 | } | |
319 | ||
320 | /* | |
321 | * Two address spaces supported: Memory or IO. PCI_Config is | |
322 | * not supported here because the GAS structure is insufficient | |
323 | */ | |
da4e7925 RW |
324 | if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { |
325 | status = acpi_os_write_memory((acpi_physical_address) | |
326 | address, (u64)value, | |
327 | reg->bit_width); | |
328 | } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ | |
329 | ||
330 | status = acpi_hw_write_port((acpi_io_address) | |
331 | address, value, reg->bit_width); | |
c6b5774c BM |
332 | } |
333 | ||
334 | ACPI_DEBUG_PRINT((ACPI_DB_IO, | |
335 | "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n", | |
da4e7925 | 336 | value, reg->bit_width, ACPI_FORMAT_UINT64(address), |
c6b5774c BM |
337 | acpi_ut_get_region_name(reg->space_id))); |
338 | ||
339 | return (status); | |
340 | } | |
341 | ||
33620c54 | 342 | #if (!ACPI_REDUCED_HARDWARE) |
1da177e4 LT |
343 | /******************************************************************************* |
344 | * | |
345 | * FUNCTION: acpi_hw_clear_acpi_status | |
346 | * | |
d8c71b6d | 347 | * PARAMETERS: None |
1da177e4 | 348 | * |
7db5d82d | 349 | * RETURN: Status |
1da177e4 LT |
350 | * |
351 | * DESCRIPTION: Clears all fixed and general purpose status bits | |
1da177e4 LT |
352 | * |
353 | ******************************************************************************/ | |
c520abad | 354 | |
d8c71b6d | 355 | acpi_status acpi_hw_clear_acpi_status(void) |
1da177e4 | 356 | { |
4be44fcd | 357 | acpi_status status; |
4c90ece2 | 358 | acpi_cpu_flags lock_flags = 0; |
1da177e4 | 359 | |
b229cf92 | 360 | ACPI_FUNCTION_TRACE(hw_clear_acpi_status); |
1da177e4 | 361 | |
8eb7b247 | 362 | ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n", |
4be44fcd | 363 | ACPI_BITMASK_ALL_FIXED_STATUS, |
8eb7b247 | 364 | ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address))); |
1da177e4 | 365 | |
4c90ece2 | 366 | lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock); |
1da177e4 | 367 | |
227243a0 | 368 | /* Clear the fixed events in PM1 A/B */ |
531c633d | 369 | |
d30dc9ab | 370 | status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS, |
4be44fcd | 371 | ACPI_BITMASK_ALL_FIXED_STATUS); |
f7f71cfb RM |
372 | |
373 | acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags); | |
374 | ||
7d3e83bd | 375 | if (ACPI_FAILURE(status)) { |
f7f71cfb | 376 | goto exit; |
7d3e83bd | 377 | } |
1da177e4 | 378 | |
1da177e4 LT |
379 | /* Clear the GPE Bits in all GPE registers in all GPE blocks */ |
380 | ||
e97d6bf1 | 381 | status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL); |
1da177e4 | 382 | |
f7f71cfb | 383 | exit: |
4be44fcd | 384 | return_ACPI_STATUS(status); |
1da177e4 LT |
385 | } |
386 | ||
1da177e4 LT |
387 | /******************************************************************************* |
388 | * | |
33620c54 | 389 | * FUNCTION: acpi_hw_get_bit_register_info |
1da177e4 LT |
390 | * |
391 | * PARAMETERS: register_id - Index of ACPI Register to access | |
392 | * | |
44f6c012 | 393 | * RETURN: The bitmask to be used when accessing the register |
1da177e4 | 394 | * |
44f6c012 | 395 | * DESCRIPTION: Map register_id into a register bitmask. |
1da177e4 LT |
396 | * |
397 | ******************************************************************************/ | |
7db5d82d | 398 | |
4be44fcd | 399 | struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id) |
1da177e4 | 400 | { |
4a90c7e8 | 401 | ACPI_FUNCTION_ENTRY(); |
1da177e4 LT |
402 | |
403 | if (register_id > ACPI_BITREG_MAX) { | |
f6a22b0b | 404 | ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X", |
b8e4d893 | 405 | register_id)); |
1da177e4 LT |
406 | return (NULL); |
407 | } | |
408 | ||
409 | return (&acpi_gbl_bit_register_info[register_id]); | |
410 | } | |
411 | ||
32c9ef99 BM |
412 | /****************************************************************************** |
413 | * | |
414 | * FUNCTION: acpi_hw_write_pm1_control | |
415 | * | |
416 | * PARAMETERS: pm1a_control - Value to be written to PM1A control | |
417 | * pm1b_control - Value to be written to PM1B control | |
418 | * | |
419 | * RETURN: Status | |
420 | * | |
421 | * DESCRIPTION: Write the PM1 A/B control registers. These registers are | |
422 | * different than than the PM1 A/B status and enable registers | |
423 | * in that different values can be written to the A/B registers. | |
424 | * Most notably, the SLP_TYP bits can be different, as per the | |
425 | * values returned from the _Sx predefined methods. | |
426 | * | |
427 | ******************************************************************************/ | |
428 | ||
429 | acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control) | |
430 | { | |
431 | acpi_status status; | |
432 | ||
433 | ACPI_FUNCTION_TRACE(hw_write_pm1_control); | |
434 | ||
c6b5774c BM |
435 | status = |
436 | acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block); | |
32c9ef99 BM |
437 | if (ACPI_FAILURE(status)) { |
438 | return_ACPI_STATUS(status); | |
439 | } | |
440 | ||
441 | if (acpi_gbl_FADT.xpm1b_control_block.address) { | |
442 | status = | |
c6b5774c BM |
443 | acpi_hw_write(pm1b_control, |
444 | &acpi_gbl_FADT.xpm1b_control_block); | |
32c9ef99 BM |
445 | } |
446 | return_ACPI_STATUS(status); | |
447 | } | |
448 | ||
1da177e4 LT |
449 | /****************************************************************************** |
450 | * | |
451 | * FUNCTION: acpi_hw_register_read | |
452 | * | |
d30dc9ab | 453 | * PARAMETERS: register_id - ACPI Register ID |
44f6c012 | 454 | * return_value - Where the register value is returned |
1da177e4 LT |
455 | * |
456 | * RETURN: Status and the value read. | |
457 | * | |
967440e3 | 458 | * DESCRIPTION: Read from the specified ACPI register |
1da177e4 LT |
459 | * |
460 | ******************************************************************************/ | |
3e8214e5 | 461 | acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value) |
1da177e4 | 462 | { |
c520abad | 463 | u32 value = 0; |
4be44fcd | 464 | acpi_status status; |
1da177e4 | 465 | |
b229cf92 | 466 | ACPI_FUNCTION_TRACE(hw_register_read); |
1da177e4 | 467 | |
1da177e4 | 468 | switch (register_id) { |
c520abad | 469 | case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ |
1da177e4 | 470 | |
c520abad BM |
471 | status = acpi_hw_read_multiple(&value, |
472 | &acpi_gbl_xpm1a_status, | |
473 | &acpi_gbl_xpm1b_status); | |
1da177e4 LT |
474 | break; |
475 | ||
c520abad | 476 | case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ |
1da177e4 | 477 | |
c520abad BM |
478 | status = acpi_hw_read_multiple(&value, |
479 | &acpi_gbl_xpm1a_enable, | |
480 | &acpi_gbl_xpm1b_enable); | |
1da177e4 LT |
481 | break; |
482 | ||
c520abad | 483 | case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ |
1da177e4 | 484 | |
c520abad BM |
485 | status = acpi_hw_read_multiple(&value, |
486 | &acpi_gbl_FADT. | |
487 | xpm1a_control_block, | |
488 | &acpi_gbl_FADT. | |
489 | xpm1b_control_block); | |
c3dd25f4 LM |
490 | |
491 | /* | |
492 | * Zero the write-only bits. From the ACPI specification, "Hardware | |
493 | * Write-Only Bits": "Upon reads to registers with write-only bits, | |
494 | * software masks out all write-only bits." | |
495 | */ | |
496 | value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS; | |
1da177e4 LT |
497 | break; |
498 | ||
4be44fcd | 499 | case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ |
1da177e4 | 500 | |
c6b5774c BM |
501 | status = |
502 | acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block); | |
1da177e4 LT |
503 | break; |
504 | ||
4be44fcd | 505 | case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ |
1da177e4 | 506 | |
c6b5774c | 507 | status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block); |
1da177e4 LT |
508 | break; |
509 | ||
4be44fcd | 510 | case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ |
1da177e4 | 511 | |
f3d2e786 | 512 | status = |
7f071903 | 513 | acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8); |
1da177e4 LT |
514 | break; |
515 | ||
516 | default: | |
1d1ea1b7 | 517 | |
f6a22b0b | 518 | ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id)); |
1da177e4 LT |
519 | status = AE_BAD_PARAMETER; |
520 | break; | |
521 | } | |
522 | ||
4be44fcd | 523 | if (ACPI_SUCCESS(status)) { |
c520abad | 524 | *return_value = value; |
1da177e4 LT |
525 | } |
526 | ||
4be44fcd | 527 | return_ACPI_STATUS(status); |
1da177e4 LT |
528 | } |
529 | ||
1da177e4 LT |
530 | /****************************************************************************** |
531 | * | |
532 | * FUNCTION: acpi_hw_register_write | |
533 | * | |
d30dc9ab | 534 | * PARAMETERS: register_id - ACPI Register ID |
ba494bee | 535 | * value - The value to write |
1da177e4 LT |
536 | * |
537 | * RETURN: Status | |
538 | * | |
967440e3 BM |
539 | * DESCRIPTION: Write to the specified ACPI register |
540 | * | |
541 | * NOTE: In accordance with the ACPI specification, this function automatically | |
542 | * preserves the value of the following bits, meaning that these bits cannot be | |
543 | * changed via this interface: | |
544 | * | |
545 | * PM1_CONTROL[0] = SCI_EN | |
546 | * PM1_CONTROL[9] | |
547 | * PM1_STATUS[11] | |
548 | * | |
549 | * ACPI References: | |
550 | * 1) Hardware Ignored Bits: When software writes to a register with ignored | |
551 | * bit fields, it preserves the ignored bit fields | |
552 | * 2) SCI_EN: OSPM always preserves this bit position | |
1da177e4 LT |
553 | * |
554 | ******************************************************************************/ | |
555 | ||
d30dc9ab | 556 | acpi_status acpi_hw_register_write(u32 register_id, u32 value) |
1da177e4 | 557 | { |
4be44fcd | 558 | acpi_status status; |
967440e3 | 559 | u32 read_value; |
1da177e4 | 560 | |
b229cf92 | 561 | ACPI_FUNCTION_TRACE(hw_register_write); |
1da177e4 | 562 | |
1da177e4 | 563 | switch (register_id) { |
c520abad | 564 | case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ |
8636f8d2 BM |
565 | /* |
566 | * Handle the "ignored" bit in PM1 Status. According to the ACPI | |
567 | * specification, ignored bits are to be preserved when writing. | |
568 | * Normally, this would mean a read/modify/write sequence. However, | |
569 | * preserving a bit in the status register is different. Writing a | |
570 | * one clears the status, and writing a zero preserves the status. | |
571 | * Therefore, we must always write zero to the ignored bit. | |
572 | * | |
573 | * This behavior is clarified in the ACPI 4.0 specification. | |
574 | */ | |
575 | value &= ~ACPI_PM1_STATUS_PRESERVED_BITS; | |
967440e3 | 576 | |
c520abad BM |
577 | status = acpi_hw_write_multiple(value, |
578 | &acpi_gbl_xpm1a_status, | |
579 | &acpi_gbl_xpm1b_status); | |
1da177e4 LT |
580 | break; |
581 | ||
75c8044f | 582 | case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ |
1da177e4 | 583 | |
c520abad BM |
584 | status = acpi_hw_write_multiple(value, |
585 | &acpi_gbl_xpm1a_enable, | |
586 | &acpi_gbl_xpm1b_enable); | |
1da177e4 LT |
587 | break; |
588 | ||
c520abad | 589 | case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ |
967440e3 BM |
590 | /* |
591 | * Perform a read first to preserve certain bits (per ACPI spec) | |
c520abad | 592 | * Note: This includes SCI_EN, we never want to change this bit |
967440e3 | 593 | */ |
c520abad BM |
594 | status = acpi_hw_read_multiple(&read_value, |
595 | &acpi_gbl_FADT. | |
596 | xpm1a_control_block, | |
597 | &acpi_gbl_FADT. | |
598 | xpm1b_control_block); | |
967440e3 | 599 | if (ACPI_FAILURE(status)) { |
d30dc9ab | 600 | goto exit; |
967440e3 BM |
601 | } |
602 | ||
603 | /* Insert the bits to be preserved */ | |
604 | ||
605 | ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS, | |
606 | read_value); | |
607 | ||
608 | /* Now we can write the data */ | |
609 | ||
c520abad BM |
610 | status = acpi_hw_write_multiple(value, |
611 | &acpi_gbl_FADT. | |
612 | xpm1a_control_block, | |
613 | &acpi_gbl_FADT. | |
614 | xpm1b_control_block); | |
1da177e4 LT |
615 | break; |
616 | ||
4be44fcd | 617 | case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ |
20869dcf BM |
618 | /* |
619 | * For control registers, all reserved bits must be preserved, | |
620 | * as per the ACPI spec. | |
621 | */ | |
622 | status = | |
c6b5774c BM |
623 | acpi_hw_read(&read_value, |
624 | &acpi_gbl_FADT.xpm2_control_block); | |
20869dcf BM |
625 | if (ACPI_FAILURE(status)) { |
626 | goto exit; | |
627 | } | |
628 | ||
629 | /* Insert the bits to be preserved */ | |
630 | ||
631 | ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS, | |
632 | read_value); | |
633 | ||
c6b5774c BM |
634 | status = |
635 | acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block); | |
1da177e4 LT |
636 | break; |
637 | ||
4be44fcd | 638 | case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ |
1da177e4 | 639 | |
c6b5774c | 640 | status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block); |
1da177e4 LT |
641 | break; |
642 | ||
4be44fcd | 643 | case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ |
1da177e4 LT |
644 | |
645 | /* SMI_CMD is currently always in IO space */ | |
646 | ||
f3d2e786 | 647 | status = |
7f071903 | 648 | acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8); |
1da177e4 LT |
649 | break; |
650 | ||
1da177e4 | 651 | default: |
1d1ea1b7 | 652 | |
f6a22b0b | 653 | ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id)); |
1da177e4 LT |
654 | status = AE_BAD_PARAMETER; |
655 | break; | |
656 | } | |
657 | ||
10622bf8 | 658 | exit: |
4be44fcd | 659 | return_ACPI_STATUS(status); |
1da177e4 | 660 | } |
c520abad BM |
661 | |
662 | /****************************************************************************** | |
663 | * | |
664 | * FUNCTION: acpi_hw_read_multiple | |
665 | * | |
ba494bee | 666 | * PARAMETERS: value - Where the register value is returned |
c520abad BM |
667 | * register_a - First ACPI register (required) |
668 | * register_b - Second ACPI register (optional) | |
669 | * | |
670 | * RETURN: Status | |
671 | * | |
672 | * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B) | |
673 | * | |
674 | ******************************************************************************/ | |
675 | ||
676 | static acpi_status | |
677 | acpi_hw_read_multiple(u32 *value, | |
678 | struct acpi_generic_address *register_a, | |
679 | struct acpi_generic_address *register_b) | |
680 | { | |
681 | u32 value_a = 0; | |
682 | u32 value_b = 0; | |
683 | acpi_status status; | |
684 | ||
685 | /* The first register is always required */ | |
686 | ||
c6b5774c | 687 | status = acpi_hw_read(&value_a, register_a); |
c520abad BM |
688 | if (ACPI_FAILURE(status)) { |
689 | return (status); | |
690 | } | |
691 | ||
692 | /* Second register is optional */ | |
693 | ||
694 | if (register_b->address) { | |
c6b5774c | 695 | status = acpi_hw_read(&value_b, register_b); |
c520abad BM |
696 | if (ACPI_FAILURE(status)) { |
697 | return (status); | |
698 | } | |
699 | } | |
700 | ||
aefc7f9a BM |
701 | /* |
702 | * OR the two return values together. No shifting or masking is necessary, | |
703 | * because of how the PM1 registers are defined in the ACPI specification: | |
704 | * | |
705 | * "Although the bits can be split between the two register blocks (each | |
706 | * register block has a unique pointer within the FADT), the bit positions | |
707 | * are maintained. The register block with unimplemented bits (that is, | |
708 | * those implemented in the other register block) always returns zeros, | |
709 | * and writes have no side effects" | |
710 | */ | |
711 | *value = (value_a | value_b); | |
c520abad BM |
712 | return (AE_OK); |
713 | } | |
714 | ||
715 | /****************************************************************************** | |
716 | * | |
717 | * FUNCTION: acpi_hw_write_multiple | |
718 | * | |
ba494bee | 719 | * PARAMETERS: value - The value to write |
c520abad BM |
720 | * register_a - First ACPI register (required) |
721 | * register_b - Second ACPI register (optional) | |
722 | * | |
723 | * RETURN: Status | |
724 | * | |
725 | * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B) | |
726 | * | |
727 | ******************************************************************************/ | |
728 | ||
729 | static acpi_status | |
730 | acpi_hw_write_multiple(u32 value, | |
731 | struct acpi_generic_address *register_a, | |
732 | struct acpi_generic_address *register_b) | |
733 | { | |
734 | acpi_status status; | |
735 | ||
736 | /* The first register is always required */ | |
737 | ||
c6b5774c | 738 | status = acpi_hw_write(value, register_a); |
c520abad BM |
739 | if (ACPI_FAILURE(status)) { |
740 | return (status); | |
741 | } | |
742 | ||
aefc7f9a BM |
743 | /* |
744 | * Second register is optional | |
745 | * | |
746 | * No bit shifting or clearing is necessary, because of how the PM1 | |
747 | * registers are defined in the ACPI specification: | |
748 | * | |
749 | * "Although the bits can be split between the two register blocks (each | |
750 | * register block has a unique pointer within the FADT), the bit positions | |
751 | * are maintained. The register block with unimplemented bits (that is, | |
752 | * those implemented in the other register block) always returns zeros, | |
753 | * and writes have no side effects" | |
754 | */ | |
c520abad | 755 | if (register_b->address) { |
c6b5774c | 756 | status = acpi_hw_write(value, register_b); |
c520abad BM |
757 | } |
758 | ||
759 | return (status); | |
760 | } | |
33620c54 BM |
761 | |
762 | #endif /* !ACPI_REDUCED_HARDWARE */ |