projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux into drm...
[deliverable/linux.git] / drivers / acpi / nfit.c
CommitLineData
b94d5230
DW		 1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#include <linux/list_sort.h>
14#include <linux/libnvdimm.h>
15#include <linux/module.h>
047fc8a1 16#include <linux/mutex.h>
62232e45 17#include <linux/ndctl.h>
0caeef63 18#include <linux/delay.h>
b94d5230
DW		 19#include <linux/list.h>
20#include <linux/acpi.h>
eaf96153 21#include <linux/sort.h>
c2ad2954 22#include <linux/pmem.h>
047fc8a1 23#include <linux/io.h>
1cf03c00 24#include <linux/nd.h>
96601adb 25#include <asm/cacheflush.h>
b94d5230
DW		 26#include "nfit.h"
27
047fc8a1
RZ		 28/*
29 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
30 * irrelevant.
31 */
2f8e2c87 32#include <linux/io-64-nonatomic-hi-lo.h>
047fc8a1 33
4d88a97a
DW		 34static bool force_enable_dimms;
35module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
36MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
37
1cf03c00
DW		 38static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT;
39module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR);
40MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds");
41
42/* after three payloads of overflow, it's dead jim */
43static unsigned int scrub_overflow_abort = 3;
44module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR);
45MODULE_PARM_DESC(scrub_overflow_abort,
46 "Number of times we overflow ARS results before abort");
47
87554098
DW		 48static bool disable_vendor_specific;
49module_param(disable_vendor_specific, bool, S_IRUGO);
50MODULE_PARM_DESC(disable_vendor_specific,
51 "Limit commands to the publicly specified set\n");
52
7ae0fa43
DW		 53static struct workqueue_struct *nfit_wq;
54
20985164
VV		 55struct nfit_table_prev {
56 struct list_head spas;
57 struct list_head memdevs;
58 struct list_head dcrs;
59 struct list_head bdws;
60 struct list_head idts;
61 struct list_head flushes;
62};
63
b94d5230
DW		 64static u8 nfit_uuid[NFIT_UUID_MAX][16];
65
6bc75619 66const u8 *to_nfit_uuid(enum nfit_uuids id)
b94d5230
DW		 67{
68 return nfit_uuid[id];
69}
6bc75619 70EXPORT_SYMBOL(to_nfit_uuid);
b94d5230 71
62232e45
DW		 72static struct acpi_nfit_desc *to_acpi_nfit_desc(
73 struct nvdimm_bus_descriptor *nd_desc)
74{
75 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
76}
77
78static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
79{
80 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
81
82 /*
83 * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
84 * acpi_device.
85 */
86 if (!nd_desc->provider_name
87 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
88 return NULL;
89
90 return to_acpi_device(acpi_desc->dev);
91}
92
aef25338
DW		 93static int xlat_status(void *buf, unsigned int cmd)
94{
d4f32367 95 struct nd_cmd_clear_error *clear_err;
aef25338
DW		 96 struct nd_cmd_ars_status *ars_status;
97 struct nd_cmd_ars_start *ars_start;
98 struct nd_cmd_ars_cap *ars_cap;
99 u16 flags;
100
101 switch (cmd) {
102 case ND_CMD_ARS_CAP:
103 ars_cap = buf;
104 if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE)
105 return -ENOTTY;
106
107 /* Command failed */
108 if (ars_cap->status & 0xffff)
109 return -EIO;
110
111 /* No supported scan types for this range */
112 flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
113 if ((ars_cap->status >> 16 & flags) == 0)
114 return -ENOTTY;
115 break;
116 case ND_CMD_ARS_START:
117 ars_start = buf;
118 /* ARS is in progress */
119 if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY)
120 return -EBUSY;
121
122 /* Command failed */
123 if (ars_start->status & 0xffff)
124 return -EIO;
125 break;
126 case ND_CMD_ARS_STATUS:
127 ars_status = buf;
128 /* Command failed */
129 if (ars_status->status & 0xffff)
130 return -EIO;
131 /* Check extended status (Upper two bytes) */
132 if (ars_status->status == NFIT_ARS_STATUS_DONE)
133 return 0;
134
135 /* ARS is in progress */
136 if (ars_status->status == NFIT_ARS_STATUS_BUSY)
137 return -EBUSY;
138
139 /* No ARS performed for the current boot */
140 if (ars_status->status == NFIT_ARS_STATUS_NONE)
141 return -EAGAIN;
142
143 /*
144 * ARS interrupted, either we overflowed or some other
145 * agent wants the scan to stop. If we didn't overflow
146 * then just continue with the returned results.
147 */
148 if (ars_status->status == NFIT_ARS_STATUS_INTR) {
149 if (ars_status->flags & NFIT_ARS_F_OVERFLOW)
150 return -ENOSPC;
151 return 0;
152 }
153
154 /* Unknown status */
155 if (ars_status->status >> 16)
156 return -EIO;
157 break;
d4f32367
DW		 158 case ND_CMD_CLEAR_ERROR:
159 clear_err = buf;
160 if (clear_err->status & 0xffff)
161 return -EIO;
162 if (!clear_err->cleared)
163 return -EIO;
164 if (clear_err->length > clear_err->cleared)
165 return clear_err->cleared;
166 break;
aef25338
DW		 167 default:
168 break;
169 }
170
171 return 0;
172}
173
b94d5230
DW		 174static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
175 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
aef25338 176 unsigned int buf_len, int *cmd_rc)
b94d5230 177{
62232e45 178 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
62232e45 179 union acpi_object in_obj, in_buf, *out_obj;
31eca76b 180 const struct nd_cmd_desc *desc = NULL;
62232e45 181 struct device *dev = acpi_desc->dev;
31eca76b 182 struct nd_cmd_pkg *call_pkg = NULL;
62232e45 183 const char *cmd_name, *dimm_name;
31eca76b 184 unsigned long cmd_mask, dsm_mask;
62232e45 185 acpi_handle handle;
31eca76b 186 unsigned int func;
62232e45
DW		 187 const u8 *uuid;
188 u32 offset;
189 int rc, i;
190
31eca76b
DW		 191 func = cmd;
192 if (cmd == ND_CMD_CALL) {
193 call_pkg = buf;
194 func = call_pkg->nd_command;
195 }
196
62232e45
DW		 197 if (nvdimm) {
198 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
199 struct acpi_device *adev = nfit_mem->adev;
200
201 if (!adev)
202 return -ENOTTY;
31eca76b
DW		 203 if (call_pkg && nfit_mem->family != call_pkg->nd_family)
204 return -ENOTTY;
205
047fc8a1 206 dimm_name = nvdimm_name(nvdimm);
62232e45 207 cmd_name = nvdimm_cmd_name(cmd);
e3654eca 208 cmd_mask = nvdimm_cmd_mask(nvdimm);
62232e45
DW		 209 dsm_mask = nfit_mem->dsm_mask;
210 desc = nd_cmd_dimm_desc(cmd);
31eca76b 211 uuid = to_nfit_uuid(nfit_mem->family);
62232e45
DW		 212 handle = adev->handle;
213 } else {
214 struct acpi_device *adev = to_acpi_dev(acpi_desc);
215
216 cmd_name = nvdimm_bus_cmd_name(cmd);
e3654eca 217 cmd_mask = nd_desc->cmd_mask;
31eca76b 218 dsm_mask = cmd_mask;
62232e45
DW		 219 desc = nd_cmd_bus_desc(cmd);
220 uuid = to_nfit_uuid(NFIT_DEV_BUS);
221 handle = adev->handle;
222 dimm_name = "bus";
223 }
224
225 if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
226 return -ENOTTY;
227
31eca76b 228 if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask))
62232e45
DW		 229 return -ENOTTY;
230
231 in_obj.type = ACPI_TYPE_PACKAGE;
232 in_obj.package.count = 1;
233 in_obj.package.elements = &in_buf;
234 in_buf.type = ACPI_TYPE_BUFFER;
235 in_buf.buffer.pointer = buf;
236 in_buf.buffer.length = 0;
237
238 /* libnvdimm has already validated the input envelope */
239 for (i = 0; i < desc->in_num; i++)
240 in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
241 i, buf);
242
31eca76b
DW		 243 if (call_pkg) {
244 /* skip over package wrapper */
245 in_buf.buffer.pointer = (void *) &call_pkg->nd_payload;
246 in_buf.buffer.length = call_pkg->nd_size_in;
247 }
248
62232e45 249 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
31eca76b
DW		 250 dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n",
251 __func__, dimm_name, cmd, func,
252 in_buf.buffer.length);
253 print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4,
254 in_buf.buffer.pointer,
255 min_t(u32, 256, in_buf.buffer.length), true);
62232e45
DW		 256 }
257
31eca76b 258 out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj);
62232e45
DW		 259 if (!out_obj) {
260 dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
261 cmd_name);
262 return -EINVAL;
263 }
264
31eca76b
DW		 265 if (call_pkg) {
266 call_pkg->nd_fw_size = out_obj->buffer.length;
267 memcpy(call_pkg->nd_payload + call_pkg->nd_size_in,
268 out_obj->buffer.pointer,
269 min(call_pkg->nd_fw_size, call_pkg->nd_size_out));
270
271 ACPI_FREE(out_obj);
272 /*
273 * Need to support FW function w/o known size in advance.
274 * Caller can determine required size based upon nd_fw_size.
275 * If we return an error (like elsewhere) then caller wouldn't
276 * be able to rely upon data returned to make calculation.
277 */
278 return 0;
279 }
280
62232e45
DW		 281 if (out_obj->package.type != ACPI_TYPE_BUFFER) {
282 dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
283 __func__, dimm_name, cmd_name, out_obj->type);
284 rc = -EINVAL;
285 goto out;
286 }
287
288 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
289 dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
290 dimm_name, cmd_name, out_obj->buffer.length);
291 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
292 4, out_obj->buffer.pointer, min_t(u32, 128,
293 out_obj->buffer.length), true);
294 }
295
296 for (i = 0, offset = 0; i < desc->out_num; i++) {
297 u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
298 (u32 *) out_obj->buffer.pointer);
299
300 if (offset + out_size > out_obj->buffer.length) {
301 dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
302 __func__, dimm_name, cmd_name, i);
303 break;
304 }
305
306 if (in_buf.buffer.length + offset + out_size > buf_len) {
307 dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
308 __func__, dimm_name, cmd_name, i);
309 rc = -ENXIO;
310 goto out;
311 }
312 memcpy(buf + in_buf.buffer.length + offset,
313 out_obj->buffer.pointer + offset, out_size);
314 offset += out_size;
315 }
316 if (offset + in_buf.buffer.length < buf_len) {
317 if (i >= 1) {
318 /*
319 * status valid, return the number of bytes left
320 * unfilled in the output buffer
321 */
322 rc = buf_len - offset - in_buf.buffer.length;
aef25338
DW		 323 if (cmd_rc)
324 *cmd_rc = xlat_status(buf, cmd);
62232e45
DW		 325 } else {
326 dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
327 __func__, dimm_name, cmd_name, buf_len,
328 offset);
329 rc = -ENXIO;
330 }
2eea6582 331 } else {
62232e45 332 rc = 0;
2eea6582
DW		 333 if (cmd_rc)
334 *cmd_rc = xlat_status(buf, cmd);
335 }
62232e45
DW		 336
337 out:
338 ACPI_FREE(out_obj);
339
340 return rc;
b94d5230
DW		 341}
342
343static const char *spa_type_name(u16 type)
344{
345 static const char *to_name[] = {
346 [NFIT_SPA_VOLATILE] = "volatile",
347 [NFIT_SPA_PM] = "pmem",
348 [NFIT_SPA_DCR] = "dimm-control-region",
349 [NFIT_SPA_BDW] = "block-data-window",
350 [NFIT_SPA_VDISK] = "volatile-disk",
351 [NFIT_SPA_VCD] = "volatile-cd",
352 [NFIT_SPA_PDISK] = "persistent-disk",
353 [NFIT_SPA_PCD] = "persistent-cd",
354
355 };
356
357 if (type > NFIT_SPA_PCD)
358 return "unknown";
359
360 return to_name[type];
361}
362
363static int nfit_spa_type(struct acpi_nfit_system_address *spa)
364{
365 int i;
366
367 for (i = 0; i < NFIT_UUID_MAX; i++)
368 if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
369 return i;
370 return -1;
371}
372
373static bool add_spa(struct acpi_nfit_desc *acpi_desc,
20985164 374 struct nfit_table_prev *prev,
b94d5230
DW		 375 struct acpi_nfit_system_address *spa)
376{
826c416f 377 size_t length = min_t(size_t, sizeof(*spa), spa->header.length);
b94d5230 378 struct device *dev = acpi_desc->dev;
20985164
VV		 379 struct nfit_spa *nfit_spa;
380
381 list_for_each_entry(nfit_spa, &prev->spas, list) {
826c416f 382 if (memcmp(nfit_spa->spa, spa, length) == 0) {
20985164
VV		 383 list_move_tail(&nfit_spa->list, &acpi_desc->spas);
384 return true;
385 }
386 }
b94d5230 387
20985164 388 nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL);
b94d5230
DW		 389 if (!nfit_spa)
390 return false;
391 INIT_LIST_HEAD(&nfit_spa->list);
392 nfit_spa->spa = spa;
393 list_add_tail(&nfit_spa->list, &acpi_desc->spas);
394 dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
395 spa->range_index,
396 spa_type_name(nfit_spa_type(spa)));
397 return true;
398}
399
400static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
20985164 401 struct nfit_table_prev *prev,
b94d5230
DW		 402 struct acpi_nfit_memory_map *memdev)
403{
826c416f 404 size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length);
b94d5230 405 struct device *dev = acpi_desc->dev;
20985164 406 struct nfit_memdev *nfit_memdev;
b94d5230 407
20985164 408 list_for_each_entry(nfit_memdev, &prev->memdevs, list)
826c416f 409 if (memcmp(nfit_memdev->memdev, memdev, length) == 0) {
20985164
VV		 410 list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
411 return true;
412 }
413
414 nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL);
b94d5230
DW		 415 if (!nfit_memdev)
416 return false;
417 INIT_LIST_HEAD(&nfit_memdev->list);
418 nfit_memdev->memdev = memdev;
419 list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
420 dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
421 __func__, memdev->device_handle, memdev->range_index,
422 memdev->region_index);
423 return true;
424}
425
426static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
20985164 427 struct nfit_table_prev *prev,
b94d5230
DW		 428 struct acpi_nfit_control_region *dcr)
429{
826c416f 430 size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length);
b94d5230 431 struct device *dev = acpi_desc->dev;
20985164
VV		 432 struct nfit_dcr *nfit_dcr;
433
434 list_for_each_entry(nfit_dcr, &prev->dcrs, list)
826c416f 435 if (memcmp(nfit_dcr->dcr, dcr, length) == 0) {
20985164
VV		 436 list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
437 return true;
438 }
b94d5230 439
20985164 440 nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL);
b94d5230
DW		 441 if (!nfit_dcr)
442 return false;
443 INIT_LIST_HEAD(&nfit_dcr->list);
444 nfit_dcr->dcr = dcr;
445 list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
446 dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
447 dcr->region_index, dcr->windows);
448 return true;
449}
450
451static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
20985164 452 struct nfit_table_prev *prev,
b94d5230
DW		 453 struct acpi_nfit_data_region *bdw)
454{
826c416f 455 size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length);
b94d5230 456 struct device *dev = acpi_desc->dev;
20985164
VV		 457 struct nfit_bdw *nfit_bdw;
458
459 list_for_each_entry(nfit_bdw, &prev->bdws, list)
826c416f 460 if (memcmp(nfit_bdw->bdw, bdw, length) == 0) {
20985164
VV		 461 list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
462 return true;
463 }
b94d5230 464
20985164 465 nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL);
b94d5230
DW		 466 if (!nfit_bdw)
467 return false;
468 INIT_LIST_HEAD(&nfit_bdw->list);
469 nfit_bdw->bdw = bdw;
470 list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
471 dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
472 bdw->region_index, bdw->windows);
473 return true;
474}
475
047fc8a1 476static bool add_idt(struct acpi_nfit_desc *acpi_desc,
20985164 477 struct nfit_table_prev *prev,
047fc8a1
RZ		 478 struct acpi_nfit_interleave *idt)
479{
826c416f 480 size_t length = min_t(size_t, sizeof(*idt), idt->header.length);
047fc8a1 481 struct device *dev = acpi_desc->dev;
20985164
VV		 482 struct nfit_idt *nfit_idt;
483
484 list_for_each_entry(nfit_idt, &prev->idts, list)
826c416f 485 if (memcmp(nfit_idt->idt, idt, length) == 0) {
20985164
VV		 486 list_move_tail(&nfit_idt->list, &acpi_desc->idts);
487 return true;
488 }
047fc8a1 489
20985164 490 nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL);
047fc8a1
RZ		 491 if (!nfit_idt)
492 return false;
493 INIT_LIST_HEAD(&nfit_idt->list);
494 nfit_idt->idt = idt;
495 list_add_tail(&nfit_idt->list, &acpi_desc->idts);
496 dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
497 idt->interleave_index, idt->line_count);
498 return true;
499}
500
c2ad2954 501static bool add_flush(struct acpi_nfit_desc *acpi_desc,
20985164 502 struct nfit_table_prev *prev,
c2ad2954
RZ		 503 struct acpi_nfit_flush_address *flush)
504{
826c416f 505 size_t length = min_t(size_t, sizeof(*flush), flush->header.length);
c2ad2954 506 struct device *dev = acpi_desc->dev;
20985164 507 struct nfit_flush *nfit_flush;
c2ad2954 508
20985164 509 list_for_each_entry(nfit_flush, &prev->flushes, list)
826c416f 510 if (memcmp(nfit_flush->flush, flush, length) == 0) {
20985164
VV		 511 list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
512 return true;
513 }
514
515 nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL);
c2ad2954
RZ		 516 if (!nfit_flush)
517 return false;
518 INIT_LIST_HEAD(&nfit_flush->list);
519 nfit_flush->flush = flush;
520 list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
521 dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__,
522 flush->device_handle, flush->hint_count);
523 return true;
524}
525
20985164
VV		 526static void *add_table(struct acpi_nfit_desc *acpi_desc,
527 struct nfit_table_prev *prev, void *table, const void *end)
b94d5230
DW		 528{
529 struct device *dev = acpi_desc->dev;
530 struct acpi_nfit_header *hdr;
531 void *err = ERR_PTR(-ENOMEM);
532
533 if (table >= end)
534 return NULL;
535
536 hdr = table;
564d5011
VV		 537 if (!hdr->length) {
538 dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
539 hdr->type);
540 return NULL;
541 }
542
b94d5230
DW		 543 switch (hdr->type) {
544 case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
20985164 545 if (!add_spa(acpi_desc, prev, table))
b94d5230
DW		 546 return err;
547 break;
548 case ACPI_NFIT_TYPE_MEMORY_MAP:
20985164 549 if (!add_memdev(acpi_desc, prev, table))
b94d5230
DW		 550 return err;
551 break;
552 case ACPI_NFIT_TYPE_CONTROL_REGION:
20985164 553 if (!add_dcr(acpi_desc, prev, table))
b94d5230
DW		 554 return err;
555 break;
556 case ACPI_NFIT_TYPE_DATA_REGION:
20985164 557 if (!add_bdw(acpi_desc, prev, table))
b94d5230
DW		 558 return err;
559 break;
b94d5230 560 case ACPI_NFIT_TYPE_INTERLEAVE:
20985164 561 if (!add_idt(acpi_desc, prev, table))
047fc8a1 562 return err;
b94d5230
DW		 563 break;
564 case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
20985164 565 if (!add_flush(acpi_desc, prev, table))
c2ad2954 566 return err;
b94d5230
DW		 567 break;
568 case ACPI_NFIT_TYPE_SMBIOS:
569 dev_dbg(dev, "%s: smbios\n", __func__);
570 break;
571 default:
572 dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
573 break;
574 }
575
576 return table + hdr->length;
577}
578
579static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
580 struct nfit_mem *nfit_mem)
581{
582 u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
583 u16 dcr = nfit_mem->dcr->region_index;
584 struct nfit_spa *nfit_spa;
585
586 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
587 u16 range_index = nfit_spa->spa->range_index;
588 int type = nfit_spa_type(nfit_spa->spa);
589 struct nfit_memdev *nfit_memdev;
590
591 if (type != NFIT_SPA_BDW)
592 continue;
593
594 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
595 if (nfit_memdev->memdev->range_index != range_index)
596 continue;
597 if (nfit_memdev->memdev->device_handle != device_handle)
598 continue;
599 if (nfit_memdev->memdev->region_index != dcr)
600 continue;
601
602 nfit_mem->spa_bdw = nfit_spa->spa;
603 return;
604 }
605 }
606
607 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
608 nfit_mem->spa_dcr->range_index);
609 nfit_mem->bdw = NULL;
610}
611
6697b2cf 612static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
b94d5230
DW		 613 struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
614{
615 u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
047fc8a1 616 struct nfit_memdev *nfit_memdev;
c2ad2954 617 struct nfit_flush *nfit_flush;
b94d5230 618 struct nfit_bdw *nfit_bdw;
047fc8a1
RZ		 619 struct nfit_idt *nfit_idt;
620 u16 idt_idx, range_index;
b94d5230 621
b94d5230
DW		 622 list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
623 if (nfit_bdw->bdw->region_index != dcr)
624 continue;
625 nfit_mem->bdw = nfit_bdw->bdw;
626 break;
627 }
628
629 if (!nfit_mem->bdw)
6697b2cf 630 return;
b94d5230
DW		 631
632 nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
047fc8a1
RZ		 633
634 if (!nfit_mem->spa_bdw)
6697b2cf 635 return;
047fc8a1
RZ		 636
637 range_index = nfit_mem->spa_bdw->range_index;
638 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
639 if (nfit_memdev->memdev->range_index != range_index ||
640 nfit_memdev->memdev->region_index != dcr)
641 continue;
642 nfit_mem->memdev_bdw = nfit_memdev->memdev;
643 idt_idx = nfit_memdev->memdev->interleave_index;
644 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
645 if (nfit_idt->idt->interleave_index != idt_idx)
646 continue;
647 nfit_mem->idt_bdw = nfit_idt->idt;
648 break;
649 }
c2ad2954
RZ		 650
651 list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
652 if (nfit_flush->flush->device_handle !=
653 nfit_memdev->memdev->device_handle)
654 continue;
655 nfit_mem->nfit_flush = nfit_flush;
656 break;
657 }
047fc8a1
RZ		 658 break;
659 }
b94d5230
DW		 660}
661
662static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
663 struct acpi_nfit_system_address *spa)
664{
665 struct nfit_mem *nfit_mem, *found;
666 struct nfit_memdev *nfit_memdev;
667 int type = nfit_spa_type(spa);
b94d5230
DW		 668
669 switch (type) {
670 case NFIT_SPA_DCR:
671 case NFIT_SPA_PM:
672 break;
673 default:
674 return 0;
675 }
676
677 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
6697b2cf
DW		 678 struct nfit_dcr *nfit_dcr;
679 u32 device_handle;
680 u16 dcr;
b94d5230
DW		 681
682 if (nfit_memdev->memdev->range_index != spa->range_index)
683 continue;
684 found = NULL;
685 dcr = nfit_memdev->memdev->region_index;
6697b2cf 686 device_handle = nfit_memdev->memdev->device_handle;
b94d5230 687 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
6697b2cf
DW		 688 if (__to_nfit_memdev(nfit_mem)->device_handle
689 == device_handle) {
b94d5230
DW		 690 found = nfit_mem;
691 break;
692 }
693
694 if (found)
695 nfit_mem = found;
696 else {
697 nfit_mem = devm_kzalloc(acpi_desc->dev,
698 sizeof(*nfit_mem), GFP_KERNEL);
699 if (!nfit_mem)
700 return -ENOMEM;
701 INIT_LIST_HEAD(&nfit_mem->list);
8cc6ddfc 702 nfit_mem->acpi_desc = acpi_desc;
6697b2cf
DW		 703 list_add(&nfit_mem->list, &acpi_desc->dimms);
704 }
705
706 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
707 if (nfit_dcr->dcr->region_index != dcr)
708 continue;
709 /*
710 * Record the control region for the dimm. For
711 * the ACPI 6.1 case, where there are separate
712 * control regions for the pmem vs blk
713 * interfaces, be sure to record the extended
714 * blk details.
715 */
716 if (!nfit_mem->dcr)
717 nfit_mem->dcr = nfit_dcr->dcr;
718 else if (nfit_mem->dcr->windows == 0
719 && nfit_dcr->dcr->windows)
720 nfit_mem->dcr = nfit_dcr->dcr;
721 break;
722 }
723
724 if (dcr && !nfit_mem->dcr) {
725 dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
726 spa->range_index, dcr);
727 return -ENODEV;
b94d5230
DW		 728 }
729
730 if (type == NFIT_SPA_DCR) {
047fc8a1
RZ		 731 struct nfit_idt *nfit_idt;
732 u16 idt_idx;
733
b94d5230
DW		 734 /* multiple dimms may share a SPA when interleaved */
735 nfit_mem->spa_dcr = spa;
736 nfit_mem->memdev_dcr = nfit_memdev->memdev;
047fc8a1
RZ		 737 idt_idx = nfit_memdev->memdev->interleave_index;
738 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
739 if (nfit_idt->idt->interleave_index != idt_idx)
740 continue;
741 nfit_mem->idt_dcr = nfit_idt->idt;
742 break;
743 }
6697b2cf 744 nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
b94d5230
DW		 745 } else {
746 /*
747 * A single dimm may belong to multiple SPA-PM
748 * ranges, record at least one in addition to
749 * any SPA-DCR range.
750 */
751 nfit_mem->memdev_pmem = nfit_memdev->memdev;
752 }
b94d5230
DW		 753 }
754
755 return 0;
756}
757
758static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
759{
760 struct nfit_mem *a = container_of(_a, typeof(*a), list);
761 struct nfit_mem *b = container_of(_b, typeof(*b), list);
762 u32 handleA, handleB;
763
764 handleA = __to_nfit_memdev(a)->device_handle;
765 handleB = __to_nfit_memdev(b)->device_handle;
766 if (handleA < handleB)
767 return -1;
768 else if (handleA > handleB)
769 return 1;
770 return 0;
771}
772
773static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
774{
775 struct nfit_spa *nfit_spa;
776
777 /*
778 * For each SPA-DCR or SPA-PMEM address range find its
779 * corresponding MEMDEV(s). From each MEMDEV find the
780 * corresponding DCR. Then, if we're operating on a SPA-DCR,
781 * try to find a SPA-BDW and a corresponding BDW that references
782 * the DCR. Throw it all into an nfit_mem object. Note, that
783 * BDWs are optional.
784 */
785 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
786 int rc;
787
788 rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
789 if (rc)
790 return rc;
791 }
792
793 list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
794
795 return 0;
796}
797
45def22c
DW		 798static ssize_t revision_show(struct device *dev,
799 struct device_attribute *attr, char *buf)
800{
801 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
802 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
803 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
804
6b577c9d 805 return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
45def22c
DW		 806}
807static DEVICE_ATTR_RO(revision);
808
809static struct attribute *acpi_nfit_attributes[] = {
810 &dev_attr_revision.attr,
811 NULL,
812};
813
814static struct attribute_group acpi_nfit_attribute_group = {
815 .name = "nfit",
816 .attrs = acpi_nfit_attributes,
817};
818
a61fe6f7 819static const struct attribute_group *acpi_nfit_attribute_groups[] = {
45def22c
DW		 820 &nvdimm_bus_attribute_group,
821 &acpi_nfit_attribute_group,
822 NULL,
823};
824
e6dfb2de
DW		 825static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
826{
827 struct nvdimm *nvdimm = to_nvdimm(dev);
828 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
829
830 return __to_nfit_memdev(nfit_mem);
831}
832
833static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
834{
835 struct nvdimm *nvdimm = to_nvdimm(dev);
836 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
837
838 return nfit_mem->dcr;
839}
840
841static ssize_t handle_show(struct device *dev,
842 struct device_attribute *attr, char *buf)
843{
844 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
845
846 return sprintf(buf, "%#x\n", memdev->device_handle);
847}
848static DEVICE_ATTR_RO(handle);
849
850static ssize_t phys_id_show(struct device *dev,
851 struct device_attribute *attr, char *buf)
852{
853 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
854
855 return sprintf(buf, "%#x\n", memdev->physical_id);
856}
857static DEVICE_ATTR_RO(phys_id);
858
859static ssize_t vendor_show(struct device *dev,
860 struct device_attribute *attr, char *buf)
861{
862 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
863
5ad9a7fd 864 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id));
e6dfb2de
DW		 865}
866static DEVICE_ATTR_RO(vendor);
867
868static ssize_t rev_id_show(struct device *dev,
869 struct device_attribute *attr, char *buf)
870{
871 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
872
5ad9a7fd 873 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id));
e6dfb2de
DW		 874}
875static DEVICE_ATTR_RO(rev_id);
876
877static ssize_t device_show(struct device *dev,
878 struct device_attribute *attr, char *buf)
879{
880 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
881
5ad9a7fd 882 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id));
e6dfb2de
DW		 883}
884static DEVICE_ATTR_RO(device);
885
6ca72085
DW		 886static ssize_t subsystem_vendor_show(struct device *dev,
887 struct device_attribute *attr, char *buf)
888{
889 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
890
891 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id));
892}
893static DEVICE_ATTR_RO(subsystem_vendor);
894
895static ssize_t subsystem_rev_id_show(struct device *dev,
896 struct device_attribute *attr, char *buf)
897{
898 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
899
900 return sprintf(buf, "0x%04x\n",
901 be16_to_cpu(dcr->subsystem_revision_id));
902}
903static DEVICE_ATTR_RO(subsystem_rev_id);
904
905static ssize_t subsystem_device_show(struct device *dev,
906 struct device_attribute *attr, char *buf)
907{
908 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
909
910 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id));
911}
912static DEVICE_ATTR_RO(subsystem_device);
913
8cc6ddfc
DW		 914static int num_nvdimm_formats(struct nvdimm *nvdimm)
915{
916 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
917 int formats = 0;
918
919 if (nfit_mem->memdev_pmem)
920 formats++;
921 if (nfit_mem->memdev_bdw)
922 formats++;
923 return formats;
924}
925
e6dfb2de
DW		 926static ssize_t format_show(struct device *dev,
927 struct device_attribute *attr, char *buf)
928{
929 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
930
1b982baf 931 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->code));
e6dfb2de
DW		 932}
933static DEVICE_ATTR_RO(format);
934
8cc6ddfc
DW		 935static ssize_t format1_show(struct device *dev,
936 struct device_attribute *attr, char *buf)
937{
938 u32 handle;
939 ssize_t rc = -ENXIO;
940 struct nfit_mem *nfit_mem;
941 struct nfit_memdev *nfit_memdev;
942 struct acpi_nfit_desc *acpi_desc;
943 struct nvdimm *nvdimm = to_nvdimm(dev);
944 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
945
946 nfit_mem = nvdimm_provider_data(nvdimm);
947 acpi_desc = nfit_mem->acpi_desc;
948 handle = to_nfit_memdev(dev)->device_handle;
949
950 /* assumes DIMMs have at most 2 published interface codes */
951 mutex_lock(&acpi_desc->init_mutex);
952 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
953 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
954 struct nfit_dcr *nfit_dcr;
955
956 if (memdev->device_handle != handle)
957 continue;
958
959 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
960 if (nfit_dcr->dcr->region_index != memdev->region_index)
961 continue;
962 if (nfit_dcr->dcr->code == dcr->code)
963 continue;
1b982baf
DW		 964 rc = sprintf(buf, "%#x\n",
965 be16_to_cpu(nfit_dcr->dcr->code));
8cc6ddfc
DW		 966 break;
967 }
968 if (rc != ENXIO)
969 break;
970 }
971 mutex_unlock(&acpi_desc->init_mutex);
972 return rc;
973}
974static DEVICE_ATTR_RO(format1);
975
976static ssize_t formats_show(struct device *dev,
977 struct device_attribute *attr, char *buf)
978{
979 struct nvdimm *nvdimm = to_nvdimm(dev);
980
981 return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
982}
983static DEVICE_ATTR_RO(formats);
984
e6dfb2de
DW		 985static ssize_t serial_show(struct device *dev,
986 struct device_attribute *attr, char *buf)
987{
988 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
989
5ad9a7fd 990 return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number));
e6dfb2de
DW		 991}
992static DEVICE_ATTR_RO(serial);
993
a94e3fbe
DW		 994static ssize_t family_show(struct device *dev,
995 struct device_attribute *attr, char *buf)
996{
997 struct nvdimm *nvdimm = to_nvdimm(dev);
998 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
999
1000 if (nfit_mem->family < 0)
1001 return -ENXIO;
1002 return sprintf(buf, "%d\n", nfit_mem->family);
1003}
1004static DEVICE_ATTR_RO(family);
1005
1006static ssize_t dsm_mask_show(struct device *dev,
1007 struct device_attribute *attr, char *buf)
1008{
1009 struct nvdimm *nvdimm = to_nvdimm(dev);
1010 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1011
1012 if (nfit_mem->family < 0)
1013 return -ENXIO;
1014 return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask);
1015}
1016static DEVICE_ATTR_RO(dsm_mask);
1017
58138820
DW		 1018static ssize_t flags_show(struct device *dev,
1019 struct device_attribute *attr, char *buf)
1020{
1021 u16 flags = to_nfit_memdev(dev)->flags;
1022
1023 return sprintf(buf, "%s%s%s%s%s\n",
402bae59
TK		 1024 flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
1025 flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
1026 flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
ca321d1c 1027 flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
402bae59 1028 flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "");
58138820
DW		 1029}
1030static DEVICE_ATTR_RO(flags);
1031
38a879ba
TK		 1032static ssize_t id_show(struct device *dev,
1033 struct device_attribute *attr, char *buf)
1034{
1035 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1036
1037 if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID)
1038 return sprintf(buf, "%04x-%02x-%04x-%08x\n",
1039 be16_to_cpu(dcr->vendor_id),
1040 dcr->manufacturing_location,
1041 be16_to_cpu(dcr->manufacturing_date),
1042 be32_to_cpu(dcr->serial_number));
1043 else
1044 return sprintf(buf, "%04x-%08x\n",
1045 be16_to_cpu(dcr->vendor_id),
1046 be32_to_cpu(dcr->serial_number));
1047}
1048static DEVICE_ATTR_RO(id);
1049
e6dfb2de
DW		 1050static struct attribute *acpi_nfit_dimm_attributes[] = {
1051 &dev_attr_handle.attr,
1052 &dev_attr_phys_id.attr,
1053 &dev_attr_vendor.attr,
1054 &dev_attr_device.attr,
6ca72085
DW		 1055 &dev_attr_rev_id.attr,
1056 &dev_attr_subsystem_vendor.attr,
1057 &dev_attr_subsystem_device.attr,
1058 &dev_attr_subsystem_rev_id.attr,
e6dfb2de 1059 &dev_attr_format.attr,
8cc6ddfc
DW		 1060 &dev_attr_formats.attr,
1061 &dev_attr_format1.attr,
e6dfb2de 1062 &dev_attr_serial.attr,
58138820 1063 &dev_attr_flags.attr,
38a879ba 1064 &dev_attr_id.attr,
a94e3fbe
DW		 1065 &dev_attr_family.attr,
1066 &dev_attr_dsm_mask.attr,
e6dfb2de
DW		 1067 NULL,
1068};
1069
1070static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
1071 struct attribute *a, int n)
1072{
1073 struct device *dev = container_of(kobj, struct device, kobj);
8cc6ddfc 1074 struct nvdimm *nvdimm = to_nvdimm(dev);
e6dfb2de 1075
8cc6ddfc
DW		 1076 if (!to_nfit_dcr(dev))
1077 return 0;
1078 if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
e6dfb2de 1079 return 0;
8cc6ddfc 1080 return a->mode;
e6dfb2de
DW		 1081}
1082
1083static struct attribute_group acpi_nfit_dimm_attribute_group = {
1084 .name = "nfit",
1085 .attrs = acpi_nfit_dimm_attributes,
1086 .is_visible = acpi_nfit_dimm_attr_visible,
1087};
1088
1089static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
62232e45 1090 &nvdimm_attribute_group,
4d88a97a 1091 &nd_device_attribute_group,
e6dfb2de
DW		 1092 &acpi_nfit_dimm_attribute_group,
1093 NULL,
1094};
1095
1096static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
1097 u32 device_handle)
1098{
1099 struct nfit_mem *nfit_mem;
1100
1101 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
1102 if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
1103 return nfit_mem->nvdimm;
1104
1105 return NULL;
1106}
1107
62232e45
DW		 1108static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
1109 struct nfit_mem *nfit_mem, u32 device_handle)
1110{
1111 struct acpi_device *adev, *adev_dimm;
1112 struct device *dev = acpi_desc->dev;
31eca76b
DW		 1113 unsigned long dsm_mask;
1114 const u8 *uuid;
60e95f43 1115 int i;
62232e45 1116
e3654eca
DW		 1117 /* nfit test assumes 1:1 relationship between commands and dsms */
1118 nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en;
31eca76b 1119 nfit_mem->family = NVDIMM_FAMILY_INTEL;
62232e45
DW		 1120 adev = to_acpi_dev(acpi_desc);
1121 if (!adev)
1122 return 0;
1123
1124 adev_dimm = acpi_find_child_device(adev, device_handle, false);
1125 nfit_mem->adev = adev_dimm;
1126 if (!adev_dimm) {
1127 dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
1128 device_handle);
4d88a97a 1129 return force_enable_dimms ? 0 : -ENODEV;
62232e45
DW		 1130 }
1131
31eca76b
DW		 1132 /*
1133 * Until standardization materializes we need to consider up to 3
1134 * different command sets. Note, that checking for function0 (bit0)
1135 * tells us if any commands are reachable through this uuid.
1136 */
1137 for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_HPE2; i++)
1138 if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
1139 break;
1140
1141 /* limit the supported commands to those that are publicly documented */
1142 nfit_mem->family = i;
87554098 1143 if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
31eca76b 1144 dsm_mask = 0x3fe;
87554098
DW		 1145 if (disable_vendor_specific)
1146 dsm_mask &= ~(1 << ND_CMD_VENDOR);
1147 } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1)
31eca76b 1148 dsm_mask = 0x1c3c76;
87554098 1149 else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) {
31eca76b 1150 dsm_mask = 0x1fe;
87554098
DW		 1151 if (disable_vendor_specific)
1152 dsm_mask &= ~(1 << 8);
1153 } else {
31eca76b
DW		 1154 dev_err(dev, "unknown dimm command family\n");
1155 nfit_mem->family = -1;
1156 return force_enable_dimms ? 0 : -ENODEV;
1157 }
1158
1159 uuid = to_nfit_uuid(nfit_mem->family);
1160 for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
62232e45
DW		 1161 if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
1162 set_bit(i, &nfit_mem->dsm_mask);
1163
60e95f43 1164 return 0;
62232e45
DW		 1165}
1166
e6dfb2de
DW		 1167static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
1168{
1169 struct nfit_mem *nfit_mem;
4d88a97a 1170 int dimm_count = 0;
e6dfb2de
DW		 1171
1172 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
31eca76b 1173 unsigned long flags = 0, cmd_mask;
e6dfb2de 1174 struct nvdimm *nvdimm;
e6dfb2de 1175 u32 device_handle;
58138820 1176 u16 mem_flags;
62232e45 1177 int rc;
e6dfb2de
DW		 1178
1179 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
1180 nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
1181 if (nvdimm) {
20985164 1182 dimm_count++;
e6dfb2de
DW		 1183 continue;
1184 }
1185
1186 if (nfit_mem->bdw && nfit_mem->memdev_pmem)
1187 flags |= NDD_ALIASING;
1188
58138820 1189 mem_flags = __to_nfit_memdev(nfit_mem)->flags;
ca321d1c 1190 if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
58138820
DW		 1191 flags |= NDD_UNARMED;
1192
62232e45
DW		 1193 rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
1194 if (rc)
1195 continue;
1196
e3654eca 1197 /*
31eca76b
DW		 1198 * TODO: provide translation for non-NVDIMM_FAMILY_INTEL
1199 * devices (i.e. from nd_cmd to acpi_dsm) to standardize the
1200 * userspace interface.
e3654eca 1201 */
31eca76b
DW		 1202 cmd_mask = 1UL << ND_CMD_CALL;
1203 if (nfit_mem->family == NVDIMM_FAMILY_INTEL)
1204 cmd_mask |= nfit_mem->dsm_mask;
1205
e6dfb2de 1206 nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
62232e45 1207 acpi_nfit_dimm_attribute_groups,
31eca76b 1208 flags, cmd_mask);
e6dfb2de
DW		 1209 if (!nvdimm)
1210 return -ENOMEM;
1211
1212 nfit_mem->nvdimm = nvdimm;
4d88a97a 1213 dimm_count++;
58138820
DW		 1214
1215 if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
1216 continue;
1217
402bae59 1218 dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n",
58138820 1219 nvdimm_name(nvdimm),
402bae59
TK		 1220 mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
1221 mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
1222 mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
ca321d1c 1223 mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "");
58138820 1224
e6dfb2de
DW		 1225 }
1226
4d88a97a 1227 return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
e6dfb2de
DW		 1228}
1229
62232e45
DW		 1230static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
1231{
1232 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1233 const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
1234 struct acpi_device *adev;
1235 int i;
1236
e3654eca 1237 nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en;
62232e45
DW		 1238 adev = to_acpi_dev(acpi_desc);
1239 if (!adev)
1240 return;
1241
d4f32367 1242 for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
62232e45 1243 if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
e3654eca 1244 set_bit(i, &nd_desc->cmd_mask);
62232e45
DW		 1245}
1246
1f7df6f8
DW		 1247static ssize_t range_index_show(struct device *dev,
1248 struct device_attribute *attr, char *buf)
1249{
1250 struct nd_region *nd_region = to_nd_region(dev);
1251 struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
1252
1253 return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
1254}
1255static DEVICE_ATTR_RO(range_index);
1256
1257static struct attribute *acpi_nfit_region_attributes[] = {
1258 &dev_attr_range_index.attr,
1259 NULL,
1260};
1261
1262static struct attribute_group acpi_nfit_region_attribute_group = {
1263 .name = "nfit",
1264 .attrs = acpi_nfit_region_attributes,
1265};
1266
1267static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
1268 &nd_region_attribute_group,
1269 &nd_mapping_attribute_group,
3d88002e 1270 &nd_device_attribute_group,
74ae66c3 1271 &nd_numa_attribute_group,
1f7df6f8
DW		 1272 &acpi_nfit_region_attribute_group,
1273 NULL,
1274};
1275
eaf96153
DW		 1276/* enough info to uniquely specify an interleave set */
1277struct nfit_set_info {
1278 struct nfit_set_info_map {
1279 u64 region_offset;
1280 u32 serial_number;
1281 u32 pad;
1282 } mapping[0];
1283};
1284
1285static size_t sizeof_nfit_set_info(int num_mappings)
1286{
1287 return sizeof(struct nfit_set_info)
1288 + num_mappings * sizeof(struct nfit_set_info_map);
1289}
1290
1291static int cmp_map(const void *m0, const void *m1)
1292{
1293 const struct nfit_set_info_map *map0 = m0;
1294 const struct nfit_set_info_map *map1 = m1;
1295
1296 return memcmp(&map0->region_offset, &map1->region_offset,
1297 sizeof(u64));
1298}
1299
1300/* Retrieve the nth entry referencing this spa */
1301static struct acpi_nfit_memory_map *memdev_from_spa(
1302 struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
1303{
1304 struct nfit_memdev *nfit_memdev;
1305
1306 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
1307 if (nfit_memdev->memdev->range_index == range_index)
1308 if (n-- == 0)
1309 return nfit_memdev->memdev;
1310 return NULL;
1311}
1312
1313static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
1314 struct nd_region_desc *ndr_desc,
1315 struct acpi_nfit_system_address *spa)
1316{
1317 int i, spa_type = nfit_spa_type(spa);
1318 struct device *dev = acpi_desc->dev;
1319 struct nd_interleave_set *nd_set;
1320 u16 nr = ndr_desc->num_mappings;
1321 struct nfit_set_info *info;
1322
1323 if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
1324 /* pass */;
1325 else
1326 return 0;
1327
1328 nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
1329 if (!nd_set)
1330 return -ENOMEM;
1331
1332 info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
1333 if (!info)
1334 return -ENOMEM;
1335 for (i = 0; i < nr; i++) {
1336 struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
1337 struct nfit_set_info_map *map = &info->mapping[i];
1338 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1339 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1340 struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
1341 spa->range_index, i);
1342
1343 if (!memdev || !nfit_mem->dcr) {
1344 dev_err(dev, "%s: failed to find DCR\n", __func__);
1345 return -ENODEV;
1346 }
1347
1348 map->region_offset = memdev->region_offset;
1349 map->serial_number = nfit_mem->dcr->serial_number;
1350 }
1351
1352 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
1353 cmp_map, NULL);
1354 nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
1355 ndr_desc->nd_set = nd_set;
1356 devm_kfree(dev, info);
1357
1358 return 0;
1359}
1360
047fc8a1
RZ		 1361static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
1362{
1363 struct acpi_nfit_interleave *idt = mmio->idt;
1364 u32 sub_line_offset, line_index, line_offset;
1365 u64 line_no, table_skip_count, table_offset;
1366
1367 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
1368 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
1369 line_offset = idt->line_offset[line_index]
1370 * mmio->line_size;
1371 table_offset = table_skip_count * mmio->table_size;
1372
1373 return mmio->base_offset + line_offset + table_offset + sub_line_offset;
1374}
1375
c2ad2954
RZ		 1376static void wmb_blk(struct nfit_blk *nfit_blk)
1377{
1378
1379 if (nfit_blk->nvdimm_flush) {
1380 /*
1381 * The first wmb() is needed to 'sfence' all previous writes
1382 * such that they are architecturally visible for the platform
1383 * buffer flush. Note that we've already arranged for pmem
1384 * writes to avoid the cache via arch_memcpy_to_pmem(). The
1385 * final wmb() ensures ordering for the NVDIMM flush write.
1386 */
1387 wmb();
1388 writeq(1, nfit_blk->nvdimm_flush);
1389 wmb();
1390 } else
1391 wmb_pmem();
1392}
1393
de4a196c 1394static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
047fc8a1
RZ		 1395{
1396 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1397 u64 offset = nfit_blk->stat_offset + mmio->size * bw;
1398
1399 if (mmio->num_lines)
1400 offset = to_interleave_offset(offset, mmio);
1401
12f03ee6 1402 return readl(mmio->addr.base + offset);
047fc8a1
RZ		 1403}
1404
1405static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
1406 resource_size_t dpa, unsigned int len, unsigned int write)
1407{
1408 u64 cmd, offset;
1409 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1410
1411 enum {
1412 BCW_OFFSET_MASK = (1ULL << 48)-1,
1413 BCW_LEN_SHIFT = 48,
1414 BCW_LEN_MASK = (1ULL << 8) - 1,
1415 BCW_CMD_SHIFT = 56,
1416 };
1417
1418 cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
1419 len = len >> L1_CACHE_SHIFT;
1420 cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
1421 cmd |= ((u64) write) << BCW_CMD_SHIFT;
1422
1423 offset = nfit_blk->cmd_offset + mmio->size * bw;
1424 if (mmio->num_lines)
1425 offset = to_interleave_offset(offset, mmio);
1426
67a3e8fe 1427 writeq(cmd, mmio->addr.base + offset);
c2ad2954 1428 wmb_blk(nfit_blk);
f0f2c072 1429
aef25338 1430 if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
67a3e8fe 1431 readq(mmio->addr.base + offset);
047fc8a1
RZ		 1432}
1433
1434static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
1435 resource_size_t dpa, void *iobuf, size_t len, int rw,
1436 unsigned int lane)
1437{
1438 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1439 unsigned int copied = 0;
1440 u64 base_offset;
1441 int rc;
1442
1443 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
1444 + lane * mmio->size;
047fc8a1
RZ		 1445 write_blk_ctl(nfit_blk, lane, dpa, len, rw);
1446 while (len) {
1447 unsigned int c;
1448 u64 offset;
1449
1450 if (mmio->num_lines) {
1451 u32 line_offset;
1452
1453 offset = to_interleave_offset(base_offset + copied,
1454 mmio);
1455 div_u64_rem(offset, mmio->line_size, &line_offset);
1456 c = min_t(size_t, len, mmio->line_size - line_offset);
1457 } else {
1458 offset = base_offset + nfit_blk->bdw_offset;
1459 c = len;
1460 }
1461
1462 if (rw)
67a3e8fe 1463 memcpy_to_pmem(mmio->addr.aperture + offset,
c2ad2954 1464 iobuf + copied, c);
67a3e8fe 1465 else {
aef25338 1466 if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
67a3e8fe
RZ		 1467 mmio_flush_range((void __force *)
1468 mmio->addr.aperture + offset, c);
1469
c2ad2954 1470 memcpy_from_pmem(iobuf + copied,
67a3e8fe
RZ		 1471 mmio->addr.aperture + offset, c);
1472 }
047fc8a1
RZ		 1473
1474 copied += c;
1475 len -= c;
1476 }
c2ad2954
RZ		 1477
1478 if (rw)
1479 wmb_blk(nfit_blk);
1480
047fc8a1
RZ		 1481 rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
1482 return rc;
1483}
1484
1485static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
1486 resource_size_t dpa, void *iobuf, u64 len, int rw)
1487{
1488 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1489 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1490 struct nd_region *nd_region = nfit_blk->nd_region;
1491 unsigned int lane, copied = 0;
1492 int rc = 0;
1493
1494 lane = nd_region_acquire_lane(nd_region);
1495 while (len) {
1496 u64 c = min(len, mmio->size);
1497
1498 rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
1499 iobuf + copied, c, rw, lane);
1500 if (rc)
1501 break;
1502
1503 copied += c;
1504 len -= c;
1505 }
1506 nd_region_release_lane(nd_region, lane);
1507
1508 return rc;
1509}
1510
1511static void nfit_spa_mapping_release(struct kref *kref)
1512{
1513 struct nfit_spa_mapping *spa_map = to_spa_map(kref);
1514 struct acpi_nfit_system_address *spa = spa_map->spa;
1515 struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc;
1516
1517 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1518 dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index);
67a3e8fe
RZ		 1519 if (spa_map->type == SPA_MAP_APERTURE)
1520 memunmap((void __force *)spa_map->addr.aperture);
1521 else
1522 iounmap(spa_map->addr.base);
047fc8a1
RZ		 1523 release_mem_region(spa->address, spa->length);
1524 list_del(&spa_map->list);
1525 kfree(spa_map);
1526}
1527
1528static struct nfit_spa_mapping *find_spa_mapping(
1529 struct acpi_nfit_desc *acpi_desc,
1530 struct acpi_nfit_system_address *spa)
1531{
1532 struct nfit_spa_mapping *spa_map;
1533
1534 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1535 list_for_each_entry(spa_map, &acpi_desc->spa_maps, list)
1536 if (spa_map->spa == spa)
1537 return spa_map;
1538
1539 return NULL;
1540}
1541
1542static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc,
1543 struct acpi_nfit_system_address *spa)
1544{
1545 struct nfit_spa_mapping *spa_map;
1546
1547 mutex_lock(&acpi_desc->spa_map_mutex);
1548 spa_map = find_spa_mapping(acpi_desc, spa);
1549
1550 if (spa_map)
1551 kref_put(&spa_map->kref, nfit_spa_mapping_release);
1552 mutex_unlock(&acpi_desc->spa_map_mutex);
1553}
1554
1555static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1556 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1557{
1558 resource_size_t start = spa->address;
1559 resource_size_t n = spa->length;
1560 struct nfit_spa_mapping *spa_map;
1561 struct resource *res;
1562
1563 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1564
1565 spa_map = find_spa_mapping(acpi_desc, spa);
1566 if (spa_map) {
1567 kref_get(&spa_map->kref);
67a3e8fe 1568 return spa_map->addr.base;
047fc8a1
RZ		 1569 }
1570
1571 spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL);
1572 if (!spa_map)
1573 return NULL;
1574
1575 INIT_LIST_HEAD(&spa_map->list);
1576 spa_map->spa = spa;
1577 kref_init(&spa_map->kref);
1578 spa_map->acpi_desc = acpi_desc;
1579
1580 res = request_mem_region(start, n, dev_name(acpi_desc->dev));
1581 if (!res)
1582 goto err_mem;
1583
67a3e8fe
RZ		 1584 spa_map->type = type;
1585 if (type == SPA_MAP_APERTURE)
1586 spa_map->addr.aperture = (void __pmem *)memremap(start, n,
1587 ARCH_MEMREMAP_PMEM);
1588 else
1589 spa_map->addr.base = ioremap_nocache(start, n);
1590
c2ad2954 1591
67a3e8fe 1592 if (!spa_map->addr.base)
047fc8a1
RZ		 1593 goto err_map;
1594
1595 list_add_tail(&spa_map->list, &acpi_desc->spa_maps);
67a3e8fe 1596 return spa_map->addr.base;
047fc8a1
RZ		 1597
1598 err_map:
1599 release_mem_region(start, n);
1600 err_mem:
1601 kfree(spa_map);
1602 return NULL;
1603}
1604
1605/**
1606 * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges
1607 * @nvdimm_bus: NFIT-bus that provided the spa table entry
1608 * @nfit_spa: spa table to map
c2ad2954 1609 * @type: aperture or control region
047fc8a1
RZ		 1610 *
1611 * In the case where block-data-window apertures and
1612 * dimm-control-regions are interleaved they will end up sharing a
1613 * single request_mem_region() + ioremap() for the address range. In
1614 * the style of devm nfit_spa_map() mappings are automatically dropped
1615 * when all region devices referencing the same mapping are disabled /
1616 * unbound.
1617 */
1618static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1619 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1620{
1621 void __iomem *iomem;
1622
1623 mutex_lock(&acpi_desc->spa_map_mutex);
c2ad2954 1624 iomem = __nfit_spa_map(acpi_desc, spa, type);
047fc8a1
RZ		 1625 mutex_unlock(&acpi_desc->spa_map_mutex);
1626
1627 return iomem;
1628}
1629
1630static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
1631 struct acpi_nfit_interleave *idt, u16 interleave_ways)
1632{
1633 if (idt) {
1634 mmio->num_lines = idt->line_count;
1635 mmio->line_size = idt->line_size;
1636 if (interleave_ways == 0)
1637 return -ENXIO;
1638 mmio->table_size = mmio->num_lines * interleave_ways
1639 * mmio->line_size;
1640 }
1641
1642 return 0;
1643}
1644
f0f2c072
RZ		 1645static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
1646 struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
1647{
1648 struct nd_cmd_dimm_flags flags;
1649 int rc;
1650
1651 memset(&flags, 0, sizeof(flags));
1652 rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
aef25338 1653 sizeof(flags), NULL);
f0f2c072
RZ		 1654
1655 if (rc >= 0 && flags.status == 0)
1656 nfit_blk->dimm_flags = flags.flags;
1657 else if (rc == -ENOTTY) {
1658 /* fall back to a conservative default */
aef25338 1659 nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
f0f2c072
RZ		 1660 rc = 0;
1661 } else
1662 rc = -ENXIO;
1663
1664 return rc;
1665}
1666
047fc8a1
RZ		 1667static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
1668 struct device *dev)
1669{
1670 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1671 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1672 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
c2ad2954 1673 struct nfit_flush *nfit_flush;
047fc8a1
RZ		 1674 struct nfit_blk_mmio *mmio;
1675 struct nfit_blk *nfit_blk;
1676 struct nfit_mem *nfit_mem;
1677 struct nvdimm *nvdimm;
1678 int rc;
1679
1680 nvdimm = nd_blk_region_to_dimm(ndbr);
1681 nfit_mem = nvdimm_provider_data(nvdimm);
1682 if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
1683 dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
1684 nfit_mem ? "" : " nfit_mem",
193ccca4
DW		 1685 (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
1686 (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
047fc8a1
RZ		 1687 return -ENXIO;
1688 }
1689
1690 nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
1691 if (!nfit_blk)
1692 return -ENOMEM;
1693 nd_blk_region_set_provider_data(ndbr, nfit_blk);
1694 nfit_blk->nd_region = to_nd_region(dev);
1695
1696 /* map block aperture memory */
1697 nfit_blk->bdw_offset = nfit_mem->bdw->offset;
1698 mmio = &nfit_blk->mmio[BDW];
67a3e8fe 1699 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw,
c2ad2954 1700 SPA_MAP_APERTURE);
67a3e8fe 1701 if (!mmio->addr.base) {
047fc8a1
RZ		 1702 dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
1703 nvdimm_name(nvdimm));
1704 return -ENOMEM;
1705 }
1706 mmio->size = nfit_mem->bdw->size;
1707 mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
1708 mmio->idt = nfit_mem->idt_bdw;
1709 mmio->spa = nfit_mem->spa_bdw;
1710 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
1711 nfit_mem->memdev_bdw->interleave_ways);
1712 if (rc) {
1713 dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
1714 __func__, nvdimm_name(nvdimm));
1715 return rc;
1716 }
1717
1718 /* map block control memory */
1719 nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
1720 nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
1721 mmio = &nfit_blk->mmio[DCR];
67a3e8fe 1722 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr,
c2ad2954 1723 SPA_MAP_CONTROL);
67a3e8fe 1724 if (!mmio->addr.base) {
047fc8a1
RZ		 1725 dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
1726 nvdimm_name(nvdimm));
1727 return -ENOMEM;
1728 }
1729 mmio->size = nfit_mem->dcr->window_size;
1730 mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
1731 mmio->idt = nfit_mem->idt_dcr;
1732 mmio->spa = nfit_mem->spa_dcr;
1733 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
1734 nfit_mem->memdev_dcr->interleave_ways);
1735 if (rc) {
1736 dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
1737 __func__, nvdimm_name(nvdimm));
1738 return rc;
1739 }
1740
f0f2c072
RZ		 1741 rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
1742 if (rc < 0) {
1743 dev_dbg(dev, "%s: %s failed get DIMM flags\n",
1744 __func__, nvdimm_name(nvdimm));
1745 return rc;
1746 }
1747
c2ad2954
RZ		 1748 nfit_flush = nfit_mem->nfit_flush;
1749 if (nfit_flush && nfit_flush->flush->hint_count != 0) {
1750 nfit_blk->nvdimm_flush = devm_ioremap_nocache(dev,
1751 nfit_flush->flush->hint_address[0], 8);
1752 if (!nfit_blk->nvdimm_flush)
1753 return -ENOMEM;
1754 }
1755
96601adb 1756 if (!arch_has_wmb_pmem() && !nfit_blk->nvdimm_flush)
c2ad2954
RZ		 1757 dev_warn(dev, "unable to guarantee persistence of writes\n");
1758
047fc8a1
RZ		 1759 if (mmio->line_size == 0)
1760 return 0;
1761
1762 if ((u32) nfit_blk->cmd_offset % mmio->line_size
1763 + 8 > mmio->line_size) {
1764 dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
1765 return -ENXIO;
1766 } else if ((u32) nfit_blk->stat_offset % mmio->line_size
1767 + 8 > mmio->line_size) {
1768 dev_dbg(dev, "stat_offset crosses interleave boundary\n");
1769 return -ENXIO;
1770 }
1771
1772 return 0;
1773}
1774
1775static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus,
1776 struct device *dev)
1777{
1778 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1779 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1780 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
1781 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1782 int i;
1783
1784 if (!nfit_blk)
1785 return; /* never enabled */
1786
1787 /* auto-free BLK spa mappings */
1788 for (i = 0; i < 2; i++) {
1789 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i];
1790
67a3e8fe 1791 if (mmio->addr.base)
047fc8a1
RZ		 1792 nfit_spa_unmap(acpi_desc, mmio->spa);
1793 }
1794 nd_blk_region_set_provider_data(ndbr, NULL);
1795 /* devm will free nfit_blk */
1796}
1797
aef25338 1798static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
1cf03c00 1799 struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
0caeef63 1800{
aef25338 1801 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1cf03c00 1802 struct acpi_nfit_system_address *spa = nfit_spa->spa;
aef25338
DW		 1803 int cmd_rc, rc;
1804
1cf03c00
DW		 1805 cmd->address = spa->address;
1806 cmd->length = spa->length;
aef25338
DW		 1807 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
1808 sizeof(*cmd), &cmd_rc);
1809 if (rc < 0)
1810 return rc;
1cf03c00 1811 return cmd_rc;
0caeef63
VV		 1812}
1813
1cf03c00 1814static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
0caeef63
VV		 1815{
1816 int rc;
1cf03c00
DW		 1817 int cmd_rc;
1818 struct nd_cmd_ars_start ars_start;
1819 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1820 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
0caeef63 1821
1cf03c00
DW		 1822 memset(&ars_start, 0, sizeof(ars_start));
1823 ars_start.address = spa->address;
1824 ars_start.length = spa->length;
1825 if (nfit_spa_type(spa) == NFIT_SPA_PM)
1826 ars_start.type = ND_ARS_PERSISTENT;
1827 else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
1828 ars_start.type = ND_ARS_VOLATILE;
1829 else
1830 return -ENOTTY;
aef25338 1831
1cf03c00
DW		 1832 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1833 sizeof(ars_start), &cmd_rc);
aef25338 1834
1cf03c00
DW		 1835 if (rc < 0)
1836 return rc;
1837 return cmd_rc;
0caeef63
VV		 1838}
1839
1cf03c00 1840static int ars_continue(struct acpi_nfit_desc *acpi_desc)
0caeef63 1841{
aef25338 1842 int rc, cmd_rc;
1cf03c00
DW		 1843 struct nd_cmd_ars_start ars_start;
1844 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1845 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1846
1847 memset(&ars_start, 0, sizeof(ars_start));
1848 ars_start.address = ars_status->restart_address;
1849 ars_start.length = ars_status->restart_length;
1850 ars_start.type = ars_status->type;
1851 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1852 sizeof(ars_start), &cmd_rc);
1853 if (rc < 0)
1854 return rc;
1855 return cmd_rc;
1856}
0caeef63 1857
1cf03c00
DW		 1858static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
1859{
1860 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1861 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1862 int rc, cmd_rc;
aef25338 1863
1cf03c00
DW		 1864 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
1865 acpi_desc->ars_status_size, &cmd_rc);
1866 if (rc < 0)
1867 return rc;
1868 return cmd_rc;
0caeef63
VV		 1869}
1870
1871static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus,
1cf03c00 1872 struct nd_cmd_ars_status *ars_status)
0caeef63
VV		 1873{
1874 int rc;
1875 u32 i;
1876
0caeef63
VV		 1877 for (i = 0; i < ars_status->num_records; i++) {
1878 rc = nvdimm_bus_add_poison(nvdimm_bus,
1879 ars_status->records[i].err_address,
1880 ars_status->records[i].length);
1881 if (rc)
1882 return rc;
1883 }
1884
1885 return 0;
1886}
1887
af1996ef
TK		 1888static void acpi_nfit_remove_resource(void *data)
1889{
1890 struct resource *res = data;
1891
1892 remove_resource(res);
1893}
1894
1895static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
1896 struct nd_region_desc *ndr_desc)
1897{
1898 struct resource *res, *nd_res = ndr_desc->res;
1899 int is_pmem, ret;
1900
1901 /* No operation if the region is already registered as PMEM */
1902 is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
1903 IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
1904 if (is_pmem == REGION_INTERSECTS)
1905 return 0;
1906
1907 res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
1908 if (!res)
1909 return -ENOMEM;
1910
1911 res->name = "Persistent Memory";
1912 res->start = nd_res->start;
1913 res->end = nd_res->end;
1914 res->flags = IORESOURCE_MEM;
1915 res->desc = IORES_DESC_PERSISTENT_MEMORY;
1916
1917 ret = insert_resource(&iomem_resource, res);
1918 if (ret)
1919 return ret;
1920
1921 ret = devm_add_action(acpi_desc->dev, acpi_nfit_remove_resource, res);
1922 if (ret) {
1923 remove_resource(res);
1924 return ret;
1925 }
1926
1927 return 0;
1928}
1929
1f7df6f8
DW		 1930static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
1931 struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
1932 struct acpi_nfit_memory_map *memdev,
1cf03c00 1933 struct nfit_spa *nfit_spa)
1f7df6f8
DW		 1934{
1935 struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
1936 memdev->device_handle);
1cf03c00 1937 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1 1938 struct nd_blk_region_desc *ndbr_desc;
1f7df6f8
DW		 1939 struct nfit_mem *nfit_mem;
1940 int blk_valid = 0;
1941
1942 if (!nvdimm) {
1943 dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
1944 spa->range_index, memdev->device_handle);
1945 return -ENODEV;
1946 }
1947
1948 nd_mapping->nvdimm = nvdimm;
1949 switch (nfit_spa_type(spa)) {
1950 case NFIT_SPA_PM:
1951 case NFIT_SPA_VOLATILE:
1952 nd_mapping->start = memdev->address;
1953 nd_mapping->size = memdev->region_size;
1954 break;
1955 case NFIT_SPA_DCR:
1956 nfit_mem = nvdimm_provider_data(nvdimm);
1957 if (!nfit_mem || !nfit_mem->bdw) {
1958 dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
1959 spa->range_index, nvdimm_name(nvdimm));
1960 } else {
1961 nd_mapping->size = nfit_mem->bdw->capacity;
1962 nd_mapping->start = nfit_mem->bdw->start_address;
5212e11f 1963 ndr_desc->num_lanes = nfit_mem->bdw->windows;
1f7df6f8
DW		 1964 blk_valid = 1;
1965 }
1966
1967 ndr_desc->nd_mapping = nd_mapping;
1968 ndr_desc->num_mappings = blk_valid;
047fc8a1
RZ		 1969 ndbr_desc = to_blk_region_desc(ndr_desc);
1970 ndbr_desc->enable = acpi_nfit_blk_region_enable;
1971 ndbr_desc->disable = acpi_nfit_blk_region_disable;
6bc75619 1972 ndbr_desc->do_io = acpi_desc->blk_do_io;
1cf03c00
DW		 1973 nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
1974 ndr_desc);
1975 if (!nfit_spa->nd_region)
1f7df6f8
DW		 1976 return -ENOMEM;
1977 break;
1978 }
1979
1980 return 0;
1981}
1982
1983static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
1984 struct nfit_spa *nfit_spa)
1985{
1986 static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
1987 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1
RZ		 1988 struct nd_blk_region_desc ndbr_desc;
1989 struct nd_region_desc *ndr_desc;
1f7df6f8 1990 struct nfit_memdev *nfit_memdev;
1f7df6f8
DW		 1991 struct nvdimm_bus *nvdimm_bus;
1992 struct resource res;
eaf96153 1993 int count = 0, rc;
1f7df6f8 1994
1cf03c00 1995 if (nfit_spa->nd_region)
20985164
VV		 1996 return 0;
1997
1f7df6f8
DW		 1998 if (spa->range_index == 0) {
1999 dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
2000 __func__);
2001 return 0;
2002 }
2003
2004 memset(&res, 0, sizeof(res));
2005 memset(&nd_mappings, 0, sizeof(nd_mappings));
047fc8a1 2006 memset(&ndbr_desc, 0, sizeof(ndbr_desc));
1f7df6f8
DW		 2007 res.start = spa->address;
2008 res.end = res.start + spa->length - 1;
047fc8a1
RZ		 2009 ndr_desc = &ndbr_desc.ndr_desc;
2010 ndr_desc->res = &res;
2011 ndr_desc->provider_data = nfit_spa;
2012 ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
41d7a6d6
TK		 2013 if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
2014 ndr_desc->numa_node = acpi_map_pxm_to_online_node(
2015 spa->proximity_domain);
2016 else
2017 ndr_desc->numa_node = NUMA_NO_NODE;
2018
1f7df6f8
DW		 2019 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
2020 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
2021 struct nd_mapping *nd_mapping;
1f7df6f8
DW		 2022
2023 if (memdev->range_index != spa->range_index)
2024 continue;
2025 if (count >= ND_MAX_MAPPINGS) {
2026 dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
2027 spa->range_index, ND_MAX_MAPPINGS);
2028 return -ENXIO;
2029 }
2030 nd_mapping = &nd_mappings[count++];
047fc8a1 2031 rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
1cf03c00 2032 memdev, nfit_spa);
1f7df6f8 2033 if (rc)
1cf03c00 2034 goto out;
1f7df6f8
DW		 2035 }
2036
047fc8a1
RZ		 2037 ndr_desc->nd_mapping = nd_mappings;
2038 ndr_desc->num_mappings = count;
2039 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
eaf96153 2040 if (rc)
1cf03c00 2041 goto out;
eaf96153 2042
1f7df6f8
DW		 2043 nvdimm_bus = acpi_desc->nvdimm_bus;
2044 if (nfit_spa_type(spa) == NFIT_SPA_PM) {
af1996ef 2045 rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
48901165 2046 if (rc) {
af1996ef
TK		 2047 dev_warn(acpi_desc->dev,
2048 "failed to insert pmem resource to iomem: %d\n",
2049 rc);
48901165 2050 goto out;
0caeef63 2051 }
48901165 2052
1cf03c00
DW		 2053 nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
2054 ndr_desc);
2055 if (!nfit_spa->nd_region)
2056 rc = -ENOMEM;
1f7df6f8 2057 } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
1cf03c00
DW		 2058 nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
2059 ndr_desc);
2060 if (!nfit_spa->nd_region)
2061 rc = -ENOMEM;
1f7df6f8 2062 }
20985164 2063
1cf03c00
DW		 2064 out:
2065 if (rc)
2066 dev_err(acpi_desc->dev, "failed to register spa range %d\n",
2067 nfit_spa->spa->range_index);
2068 return rc;
2069}
2070
2071static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc,
2072 u32 max_ars)
2073{
2074 struct device *dev = acpi_desc->dev;
2075 struct nd_cmd_ars_status *ars_status;
2076
2077 if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) {
2078 memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size);
2079 return 0;
2080 }
2081
2082 if (acpi_desc->ars_status)
2083 devm_kfree(dev, acpi_desc->ars_status);
2084 acpi_desc->ars_status = NULL;
2085 ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL);
2086 if (!ars_status)
2087 return -ENOMEM;
2088 acpi_desc->ars_status = ars_status;
2089 acpi_desc->ars_status_size = max_ars;
1f7df6f8
DW		 2090 return 0;
2091}
2092
1cf03c00
DW		 2093static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc,
2094 struct nfit_spa *nfit_spa)
2095{
2096 struct acpi_nfit_system_address *spa = nfit_spa->spa;
2097 int rc;
2098
2099 if (!nfit_spa->max_ars) {
2100 struct nd_cmd_ars_cap ars_cap;
2101
2102 memset(&ars_cap, 0, sizeof(ars_cap));
2103 rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
2104 if (rc < 0)
2105 return rc;
2106 nfit_spa->max_ars = ars_cap.max_ars_out;
2107 nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
2108 /* check that the supported scrub types match the spa type */
2109 if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE &&
2110 ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0)
2111 return -ENOTTY;
2112 else if (nfit_spa_type(spa) == NFIT_SPA_PM &&
2113 ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0)
2114 return -ENOTTY;
2115 }
2116
2117 if (ars_status_alloc(acpi_desc, nfit_spa->max_ars))
2118 return -ENOMEM;
2119
2120 rc = ars_get_status(acpi_desc);
2121 if (rc < 0 && rc != -ENOSPC)
2122 return rc;
2123
2124 if (ars_status_process_records(acpi_desc->nvdimm_bus,
2125 acpi_desc->ars_status))
2126 return -ENOMEM;
2127
2128 return 0;
2129}
2130
2131static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc,
2132 struct nfit_spa *nfit_spa)
2133{
2134 struct acpi_nfit_system_address *spa = nfit_spa->spa;
2135 unsigned int overflow_retry = scrub_overflow_abort;
2136 u64 init_ars_start = 0, init_ars_len = 0;
2137 struct device *dev = acpi_desc->dev;
2138 unsigned int tmo = scrub_timeout;
2139 int rc;
2140
2141 if (nfit_spa->ars_done || !nfit_spa->nd_region)
2142 return;
2143
2144 rc = ars_start(acpi_desc, nfit_spa);
2145 /*
2146 * If we timed out the initial scan we'll still be busy here,
2147 * and will wait another timeout before giving up permanently.
2148 */
2149 if (rc < 0 && rc != -EBUSY)
2150 return;
2151
2152 do {
2153 u64 ars_start, ars_len;
2154
2155 if (acpi_desc->cancel)
2156 break;
2157 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
2158 if (rc == -ENOTTY)
2159 break;
2160 if (rc == -EBUSY && !tmo) {
2161 dev_warn(dev, "range %d ars timeout, aborting\n",
2162 spa->range_index);
2163 break;
2164 }
2165
2166 if (rc == -EBUSY) {
2167 /*
2168 * Note, entries may be appended to the list
2169 * while the lock is dropped, but the workqueue
2170 * being active prevents entries being deleted /
2171 * freed.
2172 */
2173 mutex_unlock(&acpi_desc->init_mutex);
2174 ssleep(1);
2175 tmo--;
2176 mutex_lock(&acpi_desc->init_mutex);
2177 continue;
2178 }
2179
2180 /* we got some results, but there are more pending... */
2181 if (rc == -ENOSPC && overflow_retry--) {
2182 if (!init_ars_len) {
2183 init_ars_len = acpi_desc->ars_status->length;
2184 init_ars_start = acpi_desc->ars_status->address;
2185 }
2186 rc = ars_continue(acpi_desc);
2187 }
2188
2189 if (rc < 0) {
2190 dev_warn(dev, "range %d ars continuation failed\n",
2191 spa->range_index);
2192 break;
2193 }
2194
2195 if (init_ars_len) {
2196 ars_start = init_ars_start;
2197 ars_len = init_ars_len;
2198 } else {
2199 ars_start = acpi_desc->ars_status->address;
2200 ars_len = acpi_desc->ars_status->length;
2201 }
2202 dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n",
2203 spa->range_index, ars_start, ars_len);
2204 /* notify the region about new poison entries */
2205 nvdimm_region_notify(nfit_spa->nd_region,
2206 NVDIMM_REVALIDATE_POISON);
2207 break;
2208 } while (1);
2209}
2210
2211static void acpi_nfit_scrub(struct work_struct *work)
1f7df6f8 2212{
1cf03c00
DW		 2213 struct device *dev;
2214 u64 init_scrub_length = 0;
1f7df6f8 2215 struct nfit_spa *nfit_spa;
1cf03c00
DW		 2216 u64 init_scrub_address = 0;
2217 bool init_ars_done = false;
2218 struct acpi_nfit_desc *acpi_desc;
2219 unsigned int tmo = scrub_timeout;
2220 unsigned int overflow_retry = scrub_overflow_abort;
2221
2222 acpi_desc = container_of(work, typeof(*acpi_desc), work);
2223 dev = acpi_desc->dev;
1f7df6f8 2224
1cf03c00
DW		 2225 /*
2226 * We scrub in 2 phases. The first phase waits for any platform
2227 * firmware initiated scrubs to complete and then we go search for the
2228 * affected spa regions to mark them scanned. In the second phase we
2229 * initiate a directed scrub for every range that was not scrubbed in
2230 * phase 1.
2231 */
2232
2233 /* process platform firmware initiated scrubs */
2234 retry:
2235 mutex_lock(&acpi_desc->init_mutex);
1f7df6f8 2236 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
1cf03c00
DW		 2237 struct nd_cmd_ars_status *ars_status;
2238 struct acpi_nfit_system_address *spa;
2239 u64 ars_start, ars_len;
2240 int rc;
1f7df6f8 2241
1cf03c00
DW		 2242 if (acpi_desc->cancel)
2243 break;
2244
2245 if (nfit_spa->nd_region)
2246 continue;
2247
2248 if (init_ars_done) {
2249 /*
2250 * No need to re-query, we're now just
2251 * reconciling all the ranges covered by the
2252 * initial scrub
2253 */
2254 rc = 0;
2255 } else
2256 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
2257
2258 if (rc == -ENOTTY) {
2259 /* no ars capability, just register spa and move on */
2260 acpi_nfit_register_region(acpi_desc, nfit_spa);
2261 continue;
2262 }
2263
2264 if (rc == -EBUSY && !tmo) {
2265 /* fallthrough to directed scrub in phase 2 */
2266 dev_warn(dev, "timeout awaiting ars results, continuing...\n");
2267 break;
2268 } else if (rc == -EBUSY) {
2269 mutex_unlock(&acpi_desc->init_mutex);
2270 ssleep(1);
2271 tmo--;
2272 goto retry;
2273 }
2274
2275 /* we got some results, but there are more pending... */
2276 if (rc == -ENOSPC && overflow_retry--) {
2277 ars_status = acpi_desc->ars_status;
2278 /*
2279 * Record the original scrub range, so that we
2280 * can recall all the ranges impacted by the
2281 * initial scrub.
2282 */
2283 if (!init_scrub_length) {
2284 init_scrub_length = ars_status->length;
2285 init_scrub_address = ars_status->address;
2286 }
2287 rc = ars_continue(acpi_desc);
2288 if (rc == 0) {
2289 mutex_unlock(&acpi_desc->init_mutex);
2290 goto retry;
2291 }
2292 }
2293
2294 if (rc < 0) {
2295 /*
2296 * Initial scrub failed, we'll give it one more
2297 * try below...
2298 */
2299 break;
2300 }
2301
2302 /* We got some final results, record completed ranges */
2303 ars_status = acpi_desc->ars_status;
2304 if (init_scrub_length) {
2305 ars_start = init_scrub_address;
2306 ars_len = ars_start + init_scrub_length;
2307 } else {
2308 ars_start = ars_status->address;
2309 ars_len = ars_status->length;
2310 }
2311 spa = nfit_spa->spa;
2312
2313 if (!init_ars_done) {
2314 init_ars_done = true;
2315 dev_dbg(dev, "init scrub %#llx + %#llx complete\n",
2316 ars_start, ars_len);
2317 }
2318 if (ars_start <= spa->address && ars_start + ars_len
2319 >= spa->address + spa->length)
2320 acpi_nfit_register_region(acpi_desc, nfit_spa);
1f7df6f8 2321 }
1cf03c00
DW		 2322
2323 /*
2324 * For all the ranges not covered by an initial scrub we still
2325 * want to see if there are errors, but it's ok to discover them
2326 * asynchronously.
2327 */
2328 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
2329 /*
2330 * Flag all the ranges that still need scrubbing, but
2331 * register them now to make data available.
2332 */
2333 if (nfit_spa->nd_region)
2334 nfit_spa->ars_done = 1;
2335 else
2336 acpi_nfit_register_region(acpi_desc, nfit_spa);
2337 }
2338
2339 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2340 acpi_nfit_async_scrub(acpi_desc, nfit_spa);
2341 mutex_unlock(&acpi_desc->init_mutex);
2342}
2343
2344static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
2345{
2346 struct nfit_spa *nfit_spa;
2347 int rc;
2348
2349 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2350 if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) {
2351 /* BLK regions don't need to wait for ars results */
2352 rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
2353 if (rc)
2354 return rc;
2355 }
2356
2357 queue_work(nfit_wq, &acpi_desc->work);
1f7df6f8
DW		 2358 return 0;
2359}
2360
20985164
VV		 2361static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
2362 struct nfit_table_prev *prev)
2363{
2364 struct device *dev = acpi_desc->dev;
2365
2366 if (!list_empty(&prev->spas) ||
2367 !list_empty(&prev->memdevs) ||
2368 !list_empty(&prev->dcrs) ||
2369 !list_empty(&prev->bdws) ||
2370 !list_empty(&prev->idts) ||
2371 !list_empty(&prev->flushes)) {
2372 dev_err(dev, "new nfit deletes entries (unsupported)\n");
2373 return -ENXIO;
2374 }
2375 return 0;
2376}
2377
6bc75619 2378int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz)
b94d5230
DW		 2379{
2380 struct device *dev = acpi_desc->dev;
20985164 2381 struct nfit_table_prev prev;
b94d5230
DW		 2382 const void *end;
2383 u8 *data;
1f7df6f8 2384 int rc;
b94d5230 2385
20985164
VV		 2386 mutex_lock(&acpi_desc->init_mutex);
2387
2388 INIT_LIST_HEAD(&prev.spas);
2389 INIT_LIST_HEAD(&prev.memdevs);
2390 INIT_LIST_HEAD(&prev.dcrs);
2391 INIT_LIST_HEAD(&prev.bdws);
2392 INIT_LIST_HEAD(&prev.idts);
2393 INIT_LIST_HEAD(&prev.flushes);
2394
2395 list_cut_position(&prev.spas, &acpi_desc->spas,
2396 acpi_desc->spas.prev);
2397 list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
2398 acpi_desc->memdevs.prev);
2399 list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
2400 acpi_desc->dcrs.prev);
2401 list_cut_position(&prev.bdws, &acpi_desc->bdws,
2402 acpi_desc->bdws.prev);
2403 list_cut_position(&prev.idts, &acpi_desc->idts,
2404 acpi_desc->idts.prev);
2405 list_cut_position(&prev.flushes, &acpi_desc->flushes,
2406 acpi_desc->flushes.prev);
b94d5230
DW		 2407
2408 data = (u8 *) acpi_desc->nfit;
2409 end = data + sz;
b94d5230 2410 while (!IS_ERR_OR_NULL(data))
20985164 2411 data = add_table(acpi_desc, &prev, data, end);
b94d5230
DW		 2412
2413 if (IS_ERR(data)) {
2414 dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
2415 PTR_ERR(data));
20985164
VV		 2416 rc = PTR_ERR(data);
2417 goto out_unlock;
b94d5230
DW		 2418 }
2419
20985164
VV		 2420 rc = acpi_nfit_check_deletions(acpi_desc, &prev);
2421 if (rc)
2422 goto out_unlock;
2423
2424 if (nfit_mem_init(acpi_desc) != 0) {
2425 rc = -ENOMEM;
2426 goto out_unlock;
2427 }
b94d5230 2428
62232e45
DW		 2429 acpi_nfit_init_dsms(acpi_desc);
2430
1f7df6f8
DW		 2431 rc = acpi_nfit_register_dimms(acpi_desc);
2432 if (rc)
20985164
VV		 2433 goto out_unlock;
2434
2435 rc = acpi_nfit_register_regions(acpi_desc);
1f7df6f8 2436
20985164
VV		 2437 out_unlock:
2438 mutex_unlock(&acpi_desc->init_mutex);
2439 return rc;
b94d5230 2440}
6bc75619 2441EXPORT_SYMBOL_GPL(acpi_nfit_init);
b94d5230 2442
7ae0fa43
DW		 2443struct acpi_nfit_flush_work {
2444 struct work_struct work;
2445 struct completion cmp;
2446};
2447
2448static void flush_probe(struct work_struct *work)
2449{
2450 struct acpi_nfit_flush_work *flush;
2451
2452 flush = container_of(work, typeof(*flush), work);
2453 complete(&flush->cmp);
2454}
2455
2456static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
2457{
2458 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2459 struct device *dev = acpi_desc->dev;
2460 struct acpi_nfit_flush_work flush;
2461
2462 /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
2463 device_lock(dev);
2464 device_unlock(dev);
2465
2466 /*
2467 * Scrub work could take 10s of seconds, userspace may give up so we
2468 * need to be interruptible while waiting.
2469 */
2470 INIT_WORK_ONSTACK(&flush.work, flush_probe);
2471 COMPLETION_INITIALIZER_ONSTACK(flush.cmp);
2472 queue_work(nfit_wq, &flush.work);
2473 return wait_for_completion_interruptible(&flush.cmp);
2474}
2475
87bf572e
DW		 2476static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
2477 struct nvdimm *nvdimm, unsigned int cmd)
2478{
2479 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2480
2481 if (nvdimm)
2482 return 0;
2483 if (cmd != ND_CMD_ARS_START)
2484 return 0;
2485
2486 /*
2487 * The kernel and userspace may race to initiate a scrub, but
2488 * the scrub thread is prepared to lose that initial race. It
2489 * just needs guarantees that any ars it initiates are not
2490 * interrupted by any intervening start reqeusts from userspace.
2491 */
2492 if (work_busy(&acpi_desc->work))
2493 return -EBUSY;
2494
2495 return 0;
2496}
2497
a61fe6f7 2498void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
b94d5230
DW		 2499{
2500 struct nvdimm_bus_descriptor *nd_desc;
b94d5230
DW		 2501
2502 dev_set_drvdata(dev, acpi_desc);
2503 acpi_desc->dev = dev;
6bc75619 2504 acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
b94d5230
DW		 2505 nd_desc = &acpi_desc->nd_desc;
2506 nd_desc->provider_name = "ACPI.NFIT";
2507 nd_desc->ndctl = acpi_nfit_ctl;
7ae0fa43 2508 nd_desc->flush_probe = acpi_nfit_flush_probe;
87bf572e 2509 nd_desc->clear_to_send = acpi_nfit_clear_to_send;
45def22c 2510 nd_desc->attr_groups = acpi_nfit_attribute_groups;
b94d5230 2511
20985164
VV		 2512 INIT_LIST_HEAD(&acpi_desc->spa_maps);
2513 INIT_LIST_HEAD(&acpi_desc->spas);
2514 INIT_LIST_HEAD(&acpi_desc->dcrs);
2515 INIT_LIST_HEAD(&acpi_desc->bdws);
2516 INIT_LIST_HEAD(&acpi_desc->idts);
2517 INIT_LIST_HEAD(&acpi_desc->flushes);
2518 INIT_LIST_HEAD(&acpi_desc->memdevs);
2519 INIT_LIST_HEAD(&acpi_desc->dimms);
2520 mutex_init(&acpi_desc->spa_map_mutex);
2521 mutex_init(&acpi_desc->init_mutex);
1cf03c00 2522 INIT_WORK(&acpi_desc->work, acpi_nfit_scrub);
20985164 2523}
a61fe6f7 2524EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
20985164
VV		 2525
2526static int acpi_nfit_add(struct acpi_device *adev)
2527{
2528 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
2529 struct acpi_nfit_desc *acpi_desc;
2530 struct device *dev = &adev->dev;
2531 struct acpi_table_header *tbl;
2532 acpi_status status = AE_OK;
2533 acpi_size sz;
2534 int rc;
2535
82595423 2536 status = acpi_get_table_with_size(ACPI_SIG_NFIT, 0, &tbl, &sz);
20985164
VV		 2537 if (ACPI_FAILURE(status)) {
2538 /* This is ok, we could have an nvdimm hotplugged later */
2539 dev_dbg(dev, "failed to find NFIT at startup\n");
2540 return 0;
2541 }
2542
a61fe6f7
DW		 2543 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2544 if (!acpi_desc)
2545 return -ENOMEM;
2546 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2547 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2548 if (!acpi_desc->nvdimm_bus)
2549 return -ENOMEM;
20985164 2550
6b577c9d
LK		 2551 /*
2552 * Save the acpi header for later and then skip it,
2553 * making nfit point to the first nfit table header.
2554 */
2555 acpi_desc->acpi_header = *tbl;
2556 acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit);
2557 sz -= sizeof(struct acpi_table_nfit);
20985164
VV		 2558
2559 /* Evaluate _FIT and override with that if present */
2560 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2561 if (ACPI_SUCCESS(status) && buf.length > 0) {
6b577c9d
LK		 2562 union acpi_object *obj;
2563 /*
2564 * Adjust for the acpi_object header of the _FIT
2565 */
2566 obj = buf.pointer;
2567 if (obj->type == ACPI_TYPE_BUFFER) {
2568 acpi_desc->nfit =
2569 (struct acpi_nfit_header *)obj->buffer.pointer;
2570 sz = obj->buffer.length;
2571 } else
2572 dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n",
2573 __func__, (int) obj->type);
20985164 2574 }
b94d5230
DW		 2575
2576 rc = acpi_nfit_init(acpi_desc, sz);
2577 if (rc) {
2578 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2579 return rc;
2580 }
2581 return 0;
2582}
2583
2584static int acpi_nfit_remove(struct acpi_device *adev)
2585{
2586 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2587
7ae0fa43
DW		 2588 acpi_desc->cancel = 1;
2589 flush_workqueue(nfit_wq);
b94d5230
DW		 2590 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2591 return 0;
2592}
2593
20985164
VV		 2594static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
2595{
2596 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2597 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
6b577c9d
LK		 2598 struct acpi_nfit_header *nfit_saved;
2599 union acpi_object *obj;
20985164
VV		 2600 struct device *dev = &adev->dev;
2601 acpi_status status;
2602 int ret;
2603
2604 dev_dbg(dev, "%s: event: %d\n", __func__, event);
2605
2606 device_lock(dev);
2607 if (!dev->driver) {
2608 /* dev->driver may be null if we're being removed */
2609 dev_dbg(dev, "%s: no driver found for dev\n", __func__);
d91e8928 2610 goto out_unlock;
20985164
VV		 2611 }
2612
2613 if (!acpi_desc) {
a61fe6f7
DW		 2614 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2615 if (!acpi_desc)
2616 goto out_unlock;
2617 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2618 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2619 if (!acpi_desc->nvdimm_bus)
20985164 2620 goto out_unlock;
7ae0fa43
DW		 2621 } else {
2622 /*
2623 * Finish previous registration before considering new
2624 * regions.
2625 */
2626 flush_workqueue(nfit_wq);
20985164
VV		 2627 }
2628
2629 /* Evaluate _FIT */
2630 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2631 if (ACPI_FAILURE(status)) {
2632 dev_err(dev, "failed to evaluate _FIT\n");
2633 goto out_unlock;
2634 }
2635
2636 nfit_saved = acpi_desc->nfit;
6b577c9d
LK		 2637 obj = buf.pointer;
2638 if (obj->type == ACPI_TYPE_BUFFER) {
2639 acpi_desc->nfit =
2640 (struct acpi_nfit_header *)obj->buffer.pointer;
2641 ret = acpi_nfit_init(acpi_desc, obj->buffer.length);
2642 if (ret) {
2643 /* Merge failed, restore old nfit, and exit */
2644 acpi_desc->nfit = nfit_saved;
2645 dev_err(dev, "failed to merge updated NFIT\n");
2646 }
2647 } else {
2648 /* Bad _FIT, restore old nfit */
2649 dev_err(dev, "Invalid _FIT\n");
20985164
VV		 2650 }
2651 kfree(buf.pointer);
2652
2653 out_unlock:
2654 device_unlock(dev);
2655}
2656
b94d5230
DW		 2657static const struct acpi_device_id acpi_nfit_ids[] = {
2658 { "ACPI0012", 0 },
2659 { "", 0 },
2660};
2661MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
2662
2663static struct acpi_driver acpi_nfit_driver = {
2664 .name = KBUILD_MODNAME,
2665 .ids = acpi_nfit_ids,
2666 .ops = {
2667 .add = acpi_nfit_add,
2668 .remove = acpi_nfit_remove,
20985164 2669 .notify = acpi_nfit_notify,
b94d5230
DW		 2670 },
2671};
2672
2673static __init int nfit_init(void)
2674{
2675 BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
2676 BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
2677 BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
2678 BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
2679 BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
2680 BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
2681 BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
2682
2683 acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
2684 acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
2685 acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
2686 acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
2687 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
2688 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
2689 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
2690 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
2691 acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
2692 acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
31eca76b
DW		 2693 acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]);
2694 acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]);
b94d5230 2695
7ae0fa43
DW		 2696 nfit_wq = create_singlethread_workqueue("nfit");
2697 if (!nfit_wq)
2698 return -ENOMEM;
2699
b94d5230
DW		 2700 return acpi_bus_register_driver(&acpi_nfit_driver);
2701}
2702
2703static __exit void nfit_exit(void)
2704{
2705 acpi_bus_unregister_driver(&acpi_nfit_driver);
7ae0fa43 2706 destroy_workqueue(nfit_wq);
b94d5230
DW		 2707}
2708
2709module_init(nfit_init);
2710module_exit(nfit_exit);
2711MODULE_LICENSE("GPL v2");
2712MODULE_AUTHOR("Intel Corporation");
Linux kernel - Deliverables
This page took 0.31012 seconds and 5 git commands to generate.