projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
libnvdimm, test: add mock SMART data payload
[deliverable/linux.git] / drivers / acpi / nfit.c
CommitLineData
b94d5230
DW		 1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#include <linux/list_sort.h>
14#include <linux/libnvdimm.h>
15#include <linux/module.h>
047fc8a1 16#include <linux/mutex.h>
62232e45 17#include <linux/ndctl.h>
0caeef63 18#include <linux/delay.h>
b94d5230
DW		 19#include <linux/list.h>
20#include <linux/acpi.h>
eaf96153 21#include <linux/sort.h>
c2ad2954 22#include <linux/pmem.h>
047fc8a1 23#include <linux/io.h>
1cf03c00 24#include <linux/nd.h>
96601adb 25#include <asm/cacheflush.h>
b94d5230
DW		 26#include "nfit.h"
27
047fc8a1
RZ		 28/*
29 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
30 * irrelevant.
31 */
2f8e2c87 32#include <linux/io-64-nonatomic-hi-lo.h>
047fc8a1 33
4d88a97a
DW		 34static bool force_enable_dimms;
35module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
36MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
37
1cf03c00
DW		 38static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT;
39module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR);
40MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds");
41
42/* after three payloads of overflow, it's dead jim */
43static unsigned int scrub_overflow_abort = 3;
44module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR);
45MODULE_PARM_DESC(scrub_overflow_abort,
46 "Number of times we overflow ARS results before abort");
47
7ae0fa43
DW		 48static struct workqueue_struct *nfit_wq;
49
20985164
VV		 50struct nfit_table_prev {
51 struct list_head spas;
52 struct list_head memdevs;
53 struct list_head dcrs;
54 struct list_head bdws;
55 struct list_head idts;
56 struct list_head flushes;
57};
58
b94d5230
DW		 59static u8 nfit_uuid[NFIT_UUID_MAX][16];
60
6bc75619 61const u8 *to_nfit_uuid(enum nfit_uuids id)
b94d5230
DW		 62{
63 return nfit_uuid[id];
64}
6bc75619 65EXPORT_SYMBOL(to_nfit_uuid);
b94d5230 66
62232e45
DW		 67static struct acpi_nfit_desc *to_acpi_nfit_desc(
68 struct nvdimm_bus_descriptor *nd_desc)
69{
70 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
71}
72
73static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
74{
75 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
76
77 /*
78 * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
79 * acpi_device.
80 */
81 if (!nd_desc->provider_name
82 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
83 return NULL;
84
85 return to_acpi_device(acpi_desc->dev);
86}
87
aef25338
DW		 88static int xlat_status(void *buf, unsigned int cmd)
89{
d4f32367 90 struct nd_cmd_clear_error *clear_err;
aef25338
DW		 91 struct nd_cmd_ars_status *ars_status;
92 struct nd_cmd_ars_start *ars_start;
93 struct nd_cmd_ars_cap *ars_cap;
94 u16 flags;
95
96 switch (cmd) {
97 case ND_CMD_ARS_CAP:
98 ars_cap = buf;
99 if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE)
100 return -ENOTTY;
101
102 /* Command failed */
103 if (ars_cap->status & 0xffff)
104 return -EIO;
105
106 /* No supported scan types for this range */
107 flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
108 if ((ars_cap->status >> 16 & flags) == 0)
109 return -ENOTTY;
110 break;
111 case ND_CMD_ARS_START:
112 ars_start = buf;
113 /* ARS is in progress */
114 if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY)
115 return -EBUSY;
116
117 /* Command failed */
118 if (ars_start->status & 0xffff)
119 return -EIO;
120 break;
121 case ND_CMD_ARS_STATUS:
122 ars_status = buf;
123 /* Command failed */
124 if (ars_status->status & 0xffff)
125 return -EIO;
126 /* Check extended status (Upper two bytes) */
127 if (ars_status->status == NFIT_ARS_STATUS_DONE)
128 return 0;
129
130 /* ARS is in progress */
131 if (ars_status->status == NFIT_ARS_STATUS_BUSY)
132 return -EBUSY;
133
134 /* No ARS performed for the current boot */
135 if (ars_status->status == NFIT_ARS_STATUS_NONE)
136 return -EAGAIN;
137
138 /*
139 * ARS interrupted, either we overflowed or some other
140 * agent wants the scan to stop. If we didn't overflow
141 * then just continue with the returned results.
142 */
143 if (ars_status->status == NFIT_ARS_STATUS_INTR) {
144 if (ars_status->flags & NFIT_ARS_F_OVERFLOW)
145 return -ENOSPC;
146 return 0;
147 }
148
149 /* Unknown status */
150 if (ars_status->status >> 16)
151 return -EIO;
152 break;
d4f32367
DW		 153 case ND_CMD_CLEAR_ERROR:
154 clear_err = buf;
155 if (clear_err->status & 0xffff)
156 return -EIO;
157 if (!clear_err->cleared)
158 return -EIO;
159 if (clear_err->length > clear_err->cleared)
160 return clear_err->cleared;
161 break;
aef25338
DW		 162 default:
163 break;
164 }
165
166 return 0;
167}
168
b94d5230
DW		 169static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
170 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
aef25338 171 unsigned int buf_len, int *cmd_rc)
b94d5230 172{
62232e45
DW		 173 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
174 const struct nd_cmd_desc *desc = NULL;
175 union acpi_object in_obj, in_buf, *out_obj;
176 struct device *dev = acpi_desc->dev;
177 const char *cmd_name, *dimm_name;
178 unsigned long dsm_mask;
179 acpi_handle handle;
180 const u8 *uuid;
181 u32 offset;
182 int rc, i;
183
184 if (nvdimm) {
185 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
186 struct acpi_device *adev = nfit_mem->adev;
187
188 if (!adev)
189 return -ENOTTY;
047fc8a1 190 dimm_name = nvdimm_name(nvdimm);
62232e45
DW		 191 cmd_name = nvdimm_cmd_name(cmd);
192 dsm_mask = nfit_mem->dsm_mask;
193 desc = nd_cmd_dimm_desc(cmd);
194 uuid = to_nfit_uuid(NFIT_DEV_DIMM);
195 handle = adev->handle;
196 } else {
197 struct acpi_device *adev = to_acpi_dev(acpi_desc);
198
199 cmd_name = nvdimm_bus_cmd_name(cmd);
200 dsm_mask = nd_desc->dsm_mask;
201 desc = nd_cmd_bus_desc(cmd);
202 uuid = to_nfit_uuid(NFIT_DEV_BUS);
203 handle = adev->handle;
204 dimm_name = "bus";
205 }
206
207 if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
208 return -ENOTTY;
209
210 if (!test_bit(cmd, &dsm_mask))
211 return -ENOTTY;
212
213 in_obj.type = ACPI_TYPE_PACKAGE;
214 in_obj.package.count = 1;
215 in_obj.package.elements = &in_buf;
216 in_buf.type = ACPI_TYPE_BUFFER;
217 in_buf.buffer.pointer = buf;
218 in_buf.buffer.length = 0;
219
220 /* libnvdimm has already validated the input envelope */
221 for (i = 0; i < desc->in_num; i++)
222 in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
223 i, buf);
224
225 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
226 dev_dbg(dev, "%s:%s cmd: %s input length: %d\n", __func__,
227 dimm_name, cmd_name, in_buf.buffer.length);
228 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
229 4, in_buf.buffer.pointer, min_t(u32, 128,
230 in_buf.buffer.length), true);
231 }
232
233 out_obj = acpi_evaluate_dsm(handle, uuid, 1, cmd, &in_obj);
234 if (!out_obj) {
235 dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
236 cmd_name);
237 return -EINVAL;
238 }
239
240 if (out_obj->package.type != ACPI_TYPE_BUFFER) {
241 dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
242 __func__, dimm_name, cmd_name, out_obj->type);
243 rc = -EINVAL;
244 goto out;
245 }
246
247 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
248 dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
249 dimm_name, cmd_name, out_obj->buffer.length);
250 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
251 4, out_obj->buffer.pointer, min_t(u32, 128,
252 out_obj->buffer.length), true);
253 }
254
255 for (i = 0, offset = 0; i < desc->out_num; i++) {
256 u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
257 (u32 *) out_obj->buffer.pointer);
258
259 if (offset + out_size > out_obj->buffer.length) {
260 dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
261 __func__, dimm_name, cmd_name, i);
262 break;
263 }
264
265 if (in_buf.buffer.length + offset + out_size > buf_len) {
266 dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
267 __func__, dimm_name, cmd_name, i);
268 rc = -ENXIO;
269 goto out;
270 }
271 memcpy(buf + in_buf.buffer.length + offset,
272 out_obj->buffer.pointer + offset, out_size);
273 offset += out_size;
274 }
275 if (offset + in_buf.buffer.length < buf_len) {
276 if (i >= 1) {
277 /*
278 * status valid, return the number of bytes left
279 * unfilled in the output buffer
280 */
281 rc = buf_len - offset - in_buf.buffer.length;
aef25338
DW		 282 if (cmd_rc)
283 *cmd_rc = xlat_status(buf, cmd);
62232e45
DW		 284 } else {
285 dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
286 __func__, dimm_name, cmd_name, buf_len,
287 offset);
288 rc = -ENXIO;
289 }
290 } else
291 rc = 0;
292
293 out:
294 ACPI_FREE(out_obj);
295
296 return rc;
b94d5230
DW		 297}
298
299static const char *spa_type_name(u16 type)
300{
301 static const char *to_name[] = {
302 [NFIT_SPA_VOLATILE] = "volatile",
303 [NFIT_SPA_PM] = "pmem",
304 [NFIT_SPA_DCR] = "dimm-control-region",
305 [NFIT_SPA_BDW] = "block-data-window",
306 [NFIT_SPA_VDISK] = "volatile-disk",
307 [NFIT_SPA_VCD] = "volatile-cd",
308 [NFIT_SPA_PDISK] = "persistent-disk",
309 [NFIT_SPA_PCD] = "persistent-cd",
310
311 };
312
313 if (type > NFIT_SPA_PCD)
314 return "unknown";
315
316 return to_name[type];
317}
318
319static int nfit_spa_type(struct acpi_nfit_system_address *spa)
320{
321 int i;
322
323 for (i = 0; i < NFIT_UUID_MAX; i++)
324 if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
325 return i;
326 return -1;
327}
328
329static bool add_spa(struct acpi_nfit_desc *acpi_desc,
20985164 330 struct nfit_table_prev *prev,
b94d5230
DW		 331 struct acpi_nfit_system_address *spa)
332{
826c416f 333 size_t length = min_t(size_t, sizeof(*spa), spa->header.length);
b94d5230 334 struct device *dev = acpi_desc->dev;
20985164
VV		 335 struct nfit_spa *nfit_spa;
336
337 list_for_each_entry(nfit_spa, &prev->spas, list) {
826c416f 338 if (memcmp(nfit_spa->spa, spa, length) == 0) {
20985164
VV		 339 list_move_tail(&nfit_spa->list, &acpi_desc->spas);
340 return true;
341 }
342 }
b94d5230 343
20985164 344 nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL);
b94d5230
DW		 345 if (!nfit_spa)
346 return false;
347 INIT_LIST_HEAD(&nfit_spa->list);
348 nfit_spa->spa = spa;
349 list_add_tail(&nfit_spa->list, &acpi_desc->spas);
350 dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
351 spa->range_index,
352 spa_type_name(nfit_spa_type(spa)));
353 return true;
354}
355
356static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
20985164 357 struct nfit_table_prev *prev,
b94d5230
DW		 358 struct acpi_nfit_memory_map *memdev)
359{
826c416f 360 size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length);
b94d5230 361 struct device *dev = acpi_desc->dev;
20985164 362 struct nfit_memdev *nfit_memdev;
b94d5230 363
20985164 364 list_for_each_entry(nfit_memdev, &prev->memdevs, list)
826c416f 365 if (memcmp(nfit_memdev->memdev, memdev, length) == 0) {
20985164
VV		 366 list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
367 return true;
368 }
369
370 nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL);
b94d5230
DW		 371 if (!nfit_memdev)
372 return false;
373 INIT_LIST_HEAD(&nfit_memdev->list);
374 nfit_memdev->memdev = memdev;
375 list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
376 dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
377 __func__, memdev->device_handle, memdev->range_index,
378 memdev->region_index);
379 return true;
380}
381
382static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
20985164 383 struct nfit_table_prev *prev,
b94d5230
DW		 384 struct acpi_nfit_control_region *dcr)
385{
826c416f 386 size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length);
b94d5230 387 struct device *dev = acpi_desc->dev;
20985164
VV		 388 struct nfit_dcr *nfit_dcr;
389
390 list_for_each_entry(nfit_dcr, &prev->dcrs, list)
826c416f 391 if (memcmp(nfit_dcr->dcr, dcr, length) == 0) {
20985164
VV		 392 list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
393 return true;
394 }
b94d5230 395
20985164 396 nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL);
b94d5230
DW		 397 if (!nfit_dcr)
398 return false;
399 INIT_LIST_HEAD(&nfit_dcr->list);
400 nfit_dcr->dcr = dcr;
401 list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
402 dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
403 dcr->region_index, dcr->windows);
404 return true;
405}
406
407static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
20985164 408 struct nfit_table_prev *prev,
b94d5230
DW		 409 struct acpi_nfit_data_region *bdw)
410{
826c416f 411 size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length);
b94d5230 412 struct device *dev = acpi_desc->dev;
20985164
VV		 413 struct nfit_bdw *nfit_bdw;
414
415 list_for_each_entry(nfit_bdw, &prev->bdws, list)
826c416f 416 if (memcmp(nfit_bdw->bdw, bdw, length) == 0) {
20985164
VV		 417 list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
418 return true;
419 }
b94d5230 420
20985164 421 nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL);
b94d5230
DW		 422 if (!nfit_bdw)
423 return false;
424 INIT_LIST_HEAD(&nfit_bdw->list);
425 nfit_bdw->bdw = bdw;
426 list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
427 dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
428 bdw->region_index, bdw->windows);
429 return true;
430}
431
047fc8a1 432static bool add_idt(struct acpi_nfit_desc *acpi_desc,
20985164 433 struct nfit_table_prev *prev,
047fc8a1
RZ		 434 struct acpi_nfit_interleave *idt)
435{
826c416f 436 size_t length = min_t(size_t, sizeof(*idt), idt->header.length);
047fc8a1 437 struct device *dev = acpi_desc->dev;
20985164
VV		 438 struct nfit_idt *nfit_idt;
439
440 list_for_each_entry(nfit_idt, &prev->idts, list)
826c416f 441 if (memcmp(nfit_idt->idt, idt, length) == 0) {
20985164
VV		 442 list_move_tail(&nfit_idt->list, &acpi_desc->idts);
443 return true;
444 }
047fc8a1 445
20985164 446 nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL);
047fc8a1
RZ		 447 if (!nfit_idt)
448 return false;
449 INIT_LIST_HEAD(&nfit_idt->list);
450 nfit_idt->idt = idt;
451 list_add_tail(&nfit_idt->list, &acpi_desc->idts);
452 dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
453 idt->interleave_index, idt->line_count);
454 return true;
455}
456
c2ad2954 457static bool add_flush(struct acpi_nfit_desc *acpi_desc,
20985164 458 struct nfit_table_prev *prev,
c2ad2954
RZ		 459 struct acpi_nfit_flush_address *flush)
460{
826c416f 461 size_t length = min_t(size_t, sizeof(*flush), flush->header.length);
c2ad2954 462 struct device *dev = acpi_desc->dev;
20985164 463 struct nfit_flush *nfit_flush;
c2ad2954 464
20985164 465 list_for_each_entry(nfit_flush, &prev->flushes, list)
826c416f 466 if (memcmp(nfit_flush->flush, flush, length) == 0) {
20985164
VV		 467 list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
468 return true;
469 }
470
471 nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL);
c2ad2954
RZ		 472 if (!nfit_flush)
473 return false;
474 INIT_LIST_HEAD(&nfit_flush->list);
475 nfit_flush->flush = flush;
476 list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
477 dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__,
478 flush->device_handle, flush->hint_count);
479 return true;
480}
481
20985164
VV		 482static void *add_table(struct acpi_nfit_desc *acpi_desc,
483 struct nfit_table_prev *prev, void *table, const void *end)
b94d5230
DW		 484{
485 struct device *dev = acpi_desc->dev;
486 struct acpi_nfit_header *hdr;
487 void *err = ERR_PTR(-ENOMEM);
488
489 if (table >= end)
490 return NULL;
491
492 hdr = table;
564d5011
VV		 493 if (!hdr->length) {
494 dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
495 hdr->type);
496 return NULL;
497 }
498
b94d5230
DW		 499 switch (hdr->type) {
500 case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
20985164 501 if (!add_spa(acpi_desc, prev, table))
b94d5230
DW		 502 return err;
503 break;
504 case ACPI_NFIT_TYPE_MEMORY_MAP:
20985164 505 if (!add_memdev(acpi_desc, prev, table))
b94d5230
DW		 506 return err;
507 break;
508 case ACPI_NFIT_TYPE_CONTROL_REGION:
20985164 509 if (!add_dcr(acpi_desc, prev, table))
b94d5230
DW		 510 return err;
511 break;
512 case ACPI_NFIT_TYPE_DATA_REGION:
20985164 513 if (!add_bdw(acpi_desc, prev, table))
b94d5230
DW		 514 return err;
515 break;
b94d5230 516 case ACPI_NFIT_TYPE_INTERLEAVE:
20985164 517 if (!add_idt(acpi_desc, prev, table))
047fc8a1 518 return err;
b94d5230
DW		 519 break;
520 case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
20985164 521 if (!add_flush(acpi_desc, prev, table))
c2ad2954 522 return err;
b94d5230
DW		 523 break;
524 case ACPI_NFIT_TYPE_SMBIOS:
525 dev_dbg(dev, "%s: smbios\n", __func__);
526 break;
527 default:
528 dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
529 break;
530 }
531
532 return table + hdr->length;
533}
534
535static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
536 struct nfit_mem *nfit_mem)
537{
538 u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
539 u16 dcr = nfit_mem->dcr->region_index;
540 struct nfit_spa *nfit_spa;
541
542 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
543 u16 range_index = nfit_spa->spa->range_index;
544 int type = nfit_spa_type(nfit_spa->spa);
545 struct nfit_memdev *nfit_memdev;
546
547 if (type != NFIT_SPA_BDW)
548 continue;
549
550 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
551 if (nfit_memdev->memdev->range_index != range_index)
552 continue;
553 if (nfit_memdev->memdev->device_handle != device_handle)
554 continue;
555 if (nfit_memdev->memdev->region_index != dcr)
556 continue;
557
558 nfit_mem->spa_bdw = nfit_spa->spa;
559 return;
560 }
561 }
562
563 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
564 nfit_mem->spa_dcr->range_index);
565 nfit_mem->bdw = NULL;
566}
567
6697b2cf 568static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
b94d5230
DW		 569 struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
570{
571 u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
047fc8a1 572 struct nfit_memdev *nfit_memdev;
c2ad2954 573 struct nfit_flush *nfit_flush;
b94d5230 574 struct nfit_bdw *nfit_bdw;
047fc8a1
RZ		 575 struct nfit_idt *nfit_idt;
576 u16 idt_idx, range_index;
b94d5230 577
b94d5230
DW		 578 list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
579 if (nfit_bdw->bdw->region_index != dcr)
580 continue;
581 nfit_mem->bdw = nfit_bdw->bdw;
582 break;
583 }
584
585 if (!nfit_mem->bdw)
6697b2cf 586 return;
b94d5230
DW		 587
588 nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
047fc8a1
RZ		 589
590 if (!nfit_mem->spa_bdw)
6697b2cf 591 return;
047fc8a1
RZ		 592
593 range_index = nfit_mem->spa_bdw->range_index;
594 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
595 if (nfit_memdev->memdev->range_index != range_index ||
596 nfit_memdev->memdev->region_index != dcr)
597 continue;
598 nfit_mem->memdev_bdw = nfit_memdev->memdev;
599 idt_idx = nfit_memdev->memdev->interleave_index;
600 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
601 if (nfit_idt->idt->interleave_index != idt_idx)
602 continue;
603 nfit_mem->idt_bdw = nfit_idt->idt;
604 break;
605 }
c2ad2954
RZ		 606
607 list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
608 if (nfit_flush->flush->device_handle !=
609 nfit_memdev->memdev->device_handle)
610 continue;
611 nfit_mem->nfit_flush = nfit_flush;
612 break;
613 }
047fc8a1
RZ		 614 break;
615 }
b94d5230
DW		 616}
617
618static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
619 struct acpi_nfit_system_address *spa)
620{
621 struct nfit_mem *nfit_mem, *found;
622 struct nfit_memdev *nfit_memdev;
623 int type = nfit_spa_type(spa);
b94d5230
DW		 624
625 switch (type) {
626 case NFIT_SPA_DCR:
627 case NFIT_SPA_PM:
628 break;
629 default:
630 return 0;
631 }
632
633 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
6697b2cf
DW		 634 struct nfit_dcr *nfit_dcr;
635 u32 device_handle;
636 u16 dcr;
b94d5230
DW		 637
638 if (nfit_memdev->memdev->range_index != spa->range_index)
639 continue;
640 found = NULL;
641 dcr = nfit_memdev->memdev->region_index;
6697b2cf 642 device_handle = nfit_memdev->memdev->device_handle;
b94d5230 643 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
6697b2cf
DW		 644 if (__to_nfit_memdev(nfit_mem)->device_handle
645 == device_handle) {
b94d5230
DW		 646 found = nfit_mem;
647 break;
648 }
649
650 if (found)
651 nfit_mem = found;
652 else {
653 nfit_mem = devm_kzalloc(acpi_desc->dev,
654 sizeof(*nfit_mem), GFP_KERNEL);
655 if (!nfit_mem)
656 return -ENOMEM;
657 INIT_LIST_HEAD(&nfit_mem->list);
8cc6ddfc 658 nfit_mem->acpi_desc = acpi_desc;
6697b2cf
DW		 659 list_add(&nfit_mem->list, &acpi_desc->dimms);
660 }
661
662 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
663 if (nfit_dcr->dcr->region_index != dcr)
664 continue;
665 /*
666 * Record the control region for the dimm. For
667 * the ACPI 6.1 case, where there are separate
668 * control regions for the pmem vs blk
669 * interfaces, be sure to record the extended
670 * blk details.
671 */
672 if (!nfit_mem->dcr)
673 nfit_mem->dcr = nfit_dcr->dcr;
674 else if (nfit_mem->dcr->windows == 0
675 && nfit_dcr->dcr->windows)
676 nfit_mem->dcr = nfit_dcr->dcr;
677 break;
678 }
679
680 if (dcr && !nfit_mem->dcr) {
681 dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
682 spa->range_index, dcr);
683 return -ENODEV;
b94d5230
DW		 684 }
685
686 if (type == NFIT_SPA_DCR) {
047fc8a1
RZ		 687 struct nfit_idt *nfit_idt;
688 u16 idt_idx;
689
b94d5230
DW		 690 /* multiple dimms may share a SPA when interleaved */
691 nfit_mem->spa_dcr = spa;
692 nfit_mem->memdev_dcr = nfit_memdev->memdev;
047fc8a1
RZ		 693 idt_idx = nfit_memdev->memdev->interleave_index;
694 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
695 if (nfit_idt->idt->interleave_index != idt_idx)
696 continue;
697 nfit_mem->idt_dcr = nfit_idt->idt;
698 break;
699 }
6697b2cf 700 nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
b94d5230
DW		 701 } else {
702 /*
703 * A single dimm may belong to multiple SPA-PM
704 * ranges, record at least one in addition to
705 * any SPA-DCR range.
706 */
707 nfit_mem->memdev_pmem = nfit_memdev->memdev;
708 }
b94d5230
DW		 709 }
710
711 return 0;
712}
713
714static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
715{
716 struct nfit_mem *a = container_of(_a, typeof(*a), list);
717 struct nfit_mem *b = container_of(_b, typeof(*b), list);
718 u32 handleA, handleB;
719
720 handleA = __to_nfit_memdev(a)->device_handle;
721 handleB = __to_nfit_memdev(b)->device_handle;
722 if (handleA < handleB)
723 return -1;
724 else if (handleA > handleB)
725 return 1;
726 return 0;
727}
728
729static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
730{
731 struct nfit_spa *nfit_spa;
732
733 /*
734 * For each SPA-DCR or SPA-PMEM address range find its
735 * corresponding MEMDEV(s). From each MEMDEV find the
736 * corresponding DCR. Then, if we're operating on a SPA-DCR,
737 * try to find a SPA-BDW and a corresponding BDW that references
738 * the DCR. Throw it all into an nfit_mem object. Note, that
739 * BDWs are optional.
740 */
741 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
742 int rc;
743
744 rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
745 if (rc)
746 return rc;
747 }
748
749 list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
750
751 return 0;
752}
753
45def22c
DW		 754static ssize_t revision_show(struct device *dev,
755 struct device_attribute *attr, char *buf)
756{
757 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
758 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
759 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
760
6b577c9d 761 return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
45def22c
DW		 762}
763static DEVICE_ATTR_RO(revision);
764
765static struct attribute *acpi_nfit_attributes[] = {
766 &dev_attr_revision.attr,
767 NULL,
768};
769
770static struct attribute_group acpi_nfit_attribute_group = {
771 .name = "nfit",
772 .attrs = acpi_nfit_attributes,
773};
774
a61fe6f7 775static const struct attribute_group *acpi_nfit_attribute_groups[] = {
45def22c
DW		 776 &nvdimm_bus_attribute_group,
777 &acpi_nfit_attribute_group,
778 NULL,
779};
780
e6dfb2de
DW		 781static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
782{
783 struct nvdimm *nvdimm = to_nvdimm(dev);
784 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
785
786 return __to_nfit_memdev(nfit_mem);
787}
788
789static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
790{
791 struct nvdimm *nvdimm = to_nvdimm(dev);
792 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
793
794 return nfit_mem->dcr;
795}
796
797static ssize_t handle_show(struct device *dev,
798 struct device_attribute *attr, char *buf)
799{
800 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
801
802 return sprintf(buf, "%#x\n", memdev->device_handle);
803}
804static DEVICE_ATTR_RO(handle);
805
806static ssize_t phys_id_show(struct device *dev,
807 struct device_attribute *attr, char *buf)
808{
809 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
810
811 return sprintf(buf, "%#x\n", memdev->physical_id);
812}
813static DEVICE_ATTR_RO(phys_id);
814
815static ssize_t vendor_show(struct device *dev,
816 struct device_attribute *attr, char *buf)
817{
818 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
819
820 return sprintf(buf, "%#x\n", dcr->vendor_id);
821}
822static DEVICE_ATTR_RO(vendor);
823
824static ssize_t rev_id_show(struct device *dev,
825 struct device_attribute *attr, char *buf)
826{
827 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
828
829 return sprintf(buf, "%#x\n", dcr->revision_id);
830}
831static DEVICE_ATTR_RO(rev_id);
832
833static ssize_t device_show(struct device *dev,
834 struct device_attribute *attr, char *buf)
835{
836 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
837
838 return sprintf(buf, "%#x\n", dcr->device_id);
839}
840static DEVICE_ATTR_RO(device);
841
8cc6ddfc
DW		 842static int num_nvdimm_formats(struct nvdimm *nvdimm)
843{
844 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
845 int formats = 0;
846
847 if (nfit_mem->memdev_pmem)
848 formats++;
849 if (nfit_mem->memdev_bdw)
850 formats++;
851 return formats;
852}
853
e6dfb2de
DW		 854static ssize_t format_show(struct device *dev,
855 struct device_attribute *attr, char *buf)
856{
857 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
858
859 return sprintf(buf, "%#x\n", dcr->code);
860}
861static DEVICE_ATTR_RO(format);
862
8cc6ddfc
DW		 863static ssize_t format1_show(struct device *dev,
864 struct device_attribute *attr, char *buf)
865{
866 u32 handle;
867 ssize_t rc = -ENXIO;
868 struct nfit_mem *nfit_mem;
869 struct nfit_memdev *nfit_memdev;
870 struct acpi_nfit_desc *acpi_desc;
871 struct nvdimm *nvdimm = to_nvdimm(dev);
872 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
873
874 nfit_mem = nvdimm_provider_data(nvdimm);
875 acpi_desc = nfit_mem->acpi_desc;
876 handle = to_nfit_memdev(dev)->device_handle;
877
878 /* assumes DIMMs have at most 2 published interface codes */
879 mutex_lock(&acpi_desc->init_mutex);
880 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
881 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
882 struct nfit_dcr *nfit_dcr;
883
884 if (memdev->device_handle != handle)
885 continue;
886
887 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
888 if (nfit_dcr->dcr->region_index != memdev->region_index)
889 continue;
890 if (nfit_dcr->dcr->code == dcr->code)
891 continue;
892 rc = sprintf(buf, "%#x\n", nfit_dcr->dcr->code);
893 break;
894 }
895 if (rc != ENXIO)
896 break;
897 }
898 mutex_unlock(&acpi_desc->init_mutex);
899 return rc;
900}
901static DEVICE_ATTR_RO(format1);
902
903static ssize_t formats_show(struct device *dev,
904 struct device_attribute *attr, char *buf)
905{
906 struct nvdimm *nvdimm = to_nvdimm(dev);
907
908 return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
909}
910static DEVICE_ATTR_RO(formats);
911
e6dfb2de
DW		 912static ssize_t serial_show(struct device *dev,
913 struct device_attribute *attr, char *buf)
914{
915 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
916
917 return sprintf(buf, "%#x\n", dcr->serial_number);
918}
919static DEVICE_ATTR_RO(serial);
920
58138820
DW		 921static ssize_t flags_show(struct device *dev,
922 struct device_attribute *attr, char *buf)
923{
924 u16 flags = to_nfit_memdev(dev)->flags;
925
926 return sprintf(buf, "%s%s%s%s%s\n",
402bae59
TK		 927 flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
928 flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
929 flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
ca321d1c 930 flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
402bae59 931 flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "");
58138820
DW		 932}
933static DEVICE_ATTR_RO(flags);
934
e6dfb2de
DW		 935static struct attribute *acpi_nfit_dimm_attributes[] = {
936 &dev_attr_handle.attr,
937 &dev_attr_phys_id.attr,
938 &dev_attr_vendor.attr,
939 &dev_attr_device.attr,
940 &dev_attr_format.attr,
8cc6ddfc
DW		 941 &dev_attr_formats.attr,
942 &dev_attr_format1.attr,
e6dfb2de
DW		 943 &dev_attr_serial.attr,
944 &dev_attr_rev_id.attr,
58138820 945 &dev_attr_flags.attr,
e6dfb2de
DW		 946 NULL,
947};
948
949static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
950 struct attribute *a, int n)
951{
952 struct device *dev = container_of(kobj, struct device, kobj);
8cc6ddfc 953 struct nvdimm *nvdimm = to_nvdimm(dev);
e6dfb2de 954
8cc6ddfc
DW		 955 if (!to_nfit_dcr(dev))
956 return 0;
957 if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
e6dfb2de 958 return 0;
8cc6ddfc 959 return a->mode;
e6dfb2de
DW		 960}
961
962static struct attribute_group acpi_nfit_dimm_attribute_group = {
963 .name = "nfit",
964 .attrs = acpi_nfit_dimm_attributes,
965 .is_visible = acpi_nfit_dimm_attr_visible,
966};
967
968static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
62232e45 969 &nvdimm_attribute_group,
4d88a97a 970 &nd_device_attribute_group,
e6dfb2de
DW		 971 &acpi_nfit_dimm_attribute_group,
972 NULL,
973};
974
975static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
976 u32 device_handle)
977{
978 struct nfit_mem *nfit_mem;
979
980 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
981 if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
982 return nfit_mem->nvdimm;
983
984 return NULL;
985}
986
62232e45
DW		 987static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
988 struct nfit_mem *nfit_mem, u32 device_handle)
989{
990 struct acpi_device *adev, *adev_dimm;
991 struct device *dev = acpi_desc->dev;
992 const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM);
60e95f43 993 int i;
62232e45
DW		 994
995 nfit_mem->dsm_mask = acpi_desc->dimm_dsm_force_en;
996 adev = to_acpi_dev(acpi_desc);
997 if (!adev)
998 return 0;
999
1000 adev_dimm = acpi_find_child_device(adev, device_handle, false);
1001 nfit_mem->adev = adev_dimm;
1002 if (!adev_dimm) {
1003 dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
1004 device_handle);
4d88a97a 1005 return force_enable_dimms ? 0 : -ENODEV;
62232e45
DW		 1006 }
1007
62232e45
DW		 1008 for (i = ND_CMD_SMART; i <= ND_CMD_VENDOR; i++)
1009 if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
1010 set_bit(i, &nfit_mem->dsm_mask);
1011
60e95f43 1012 return 0;
62232e45
DW		 1013}
1014
e6dfb2de
DW		 1015static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
1016{
1017 struct nfit_mem *nfit_mem;
4d88a97a 1018 int dimm_count = 0;
e6dfb2de
DW		 1019
1020 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
1021 struct nvdimm *nvdimm;
1022 unsigned long flags = 0;
1023 u32 device_handle;
58138820 1024 u16 mem_flags;
62232e45 1025 int rc;
e6dfb2de
DW		 1026
1027 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
1028 nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
1029 if (nvdimm) {
20985164 1030 dimm_count++;
e6dfb2de
DW		 1031 continue;
1032 }
1033
1034 if (nfit_mem->bdw && nfit_mem->memdev_pmem)
1035 flags |= NDD_ALIASING;
1036
58138820 1037 mem_flags = __to_nfit_memdev(nfit_mem)->flags;
ca321d1c 1038 if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
58138820
DW		 1039 flags |= NDD_UNARMED;
1040
62232e45
DW		 1041 rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
1042 if (rc)
1043 continue;
1044
e6dfb2de 1045 nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
62232e45
DW		 1046 acpi_nfit_dimm_attribute_groups,
1047 flags, &nfit_mem->dsm_mask);
e6dfb2de
DW		 1048 if (!nvdimm)
1049 return -ENOMEM;
1050
1051 nfit_mem->nvdimm = nvdimm;
4d88a97a 1052 dimm_count++;
58138820
DW		 1053
1054 if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
1055 continue;
1056
402bae59 1057 dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n",
58138820 1058 nvdimm_name(nvdimm),
402bae59
TK		 1059 mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
1060 mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
1061 mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
ca321d1c 1062 mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "");
58138820 1063
e6dfb2de
DW		 1064 }
1065
4d88a97a 1066 return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
e6dfb2de
DW		 1067}
1068
62232e45
DW		 1069static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
1070{
1071 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1072 const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
1073 struct acpi_device *adev;
1074 int i;
1075
39c686b8 1076 nd_desc->dsm_mask = acpi_desc->bus_dsm_force_en;
62232e45
DW		 1077 adev = to_acpi_dev(acpi_desc);
1078 if (!adev)
1079 return;
1080
d4f32367 1081 for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
62232e45
DW		 1082 if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
1083 set_bit(i, &nd_desc->dsm_mask);
1084}
1085
1f7df6f8
DW		 1086static ssize_t range_index_show(struct device *dev,
1087 struct device_attribute *attr, char *buf)
1088{
1089 struct nd_region *nd_region = to_nd_region(dev);
1090 struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
1091
1092 return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
1093}
1094static DEVICE_ATTR_RO(range_index);
1095
1096static struct attribute *acpi_nfit_region_attributes[] = {
1097 &dev_attr_range_index.attr,
1098 NULL,
1099};
1100
1101static struct attribute_group acpi_nfit_region_attribute_group = {
1102 .name = "nfit",
1103 .attrs = acpi_nfit_region_attributes,
1104};
1105
1106static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
1107 &nd_region_attribute_group,
1108 &nd_mapping_attribute_group,
3d88002e 1109 &nd_device_attribute_group,
74ae66c3 1110 &nd_numa_attribute_group,
1f7df6f8
DW		 1111 &acpi_nfit_region_attribute_group,
1112 NULL,
1113};
1114
eaf96153
DW		 1115/* enough info to uniquely specify an interleave set */
1116struct nfit_set_info {
1117 struct nfit_set_info_map {
1118 u64 region_offset;
1119 u32 serial_number;
1120 u32 pad;
1121 } mapping[0];
1122};
1123
1124static size_t sizeof_nfit_set_info(int num_mappings)
1125{
1126 return sizeof(struct nfit_set_info)
1127 + num_mappings * sizeof(struct nfit_set_info_map);
1128}
1129
1130static int cmp_map(const void *m0, const void *m1)
1131{
1132 const struct nfit_set_info_map *map0 = m0;
1133 const struct nfit_set_info_map *map1 = m1;
1134
1135 return memcmp(&map0->region_offset, &map1->region_offset,
1136 sizeof(u64));
1137}
1138
1139/* Retrieve the nth entry referencing this spa */
1140static struct acpi_nfit_memory_map *memdev_from_spa(
1141 struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
1142{
1143 struct nfit_memdev *nfit_memdev;
1144
1145 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
1146 if (nfit_memdev->memdev->range_index == range_index)
1147 if (n-- == 0)
1148 return nfit_memdev->memdev;
1149 return NULL;
1150}
1151
1152static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
1153 struct nd_region_desc *ndr_desc,
1154 struct acpi_nfit_system_address *spa)
1155{
1156 int i, spa_type = nfit_spa_type(spa);
1157 struct device *dev = acpi_desc->dev;
1158 struct nd_interleave_set *nd_set;
1159 u16 nr = ndr_desc->num_mappings;
1160 struct nfit_set_info *info;
1161
1162 if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
1163 /* pass */;
1164 else
1165 return 0;
1166
1167 nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
1168 if (!nd_set)
1169 return -ENOMEM;
1170
1171 info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
1172 if (!info)
1173 return -ENOMEM;
1174 for (i = 0; i < nr; i++) {
1175 struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
1176 struct nfit_set_info_map *map = &info->mapping[i];
1177 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1178 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1179 struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
1180 spa->range_index, i);
1181
1182 if (!memdev || !nfit_mem->dcr) {
1183 dev_err(dev, "%s: failed to find DCR\n", __func__);
1184 return -ENODEV;
1185 }
1186
1187 map->region_offset = memdev->region_offset;
1188 map->serial_number = nfit_mem->dcr->serial_number;
1189 }
1190
1191 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
1192 cmp_map, NULL);
1193 nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
1194 ndr_desc->nd_set = nd_set;
1195 devm_kfree(dev, info);
1196
1197 return 0;
1198}
1199
047fc8a1
RZ		 1200static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
1201{
1202 struct acpi_nfit_interleave *idt = mmio->idt;
1203 u32 sub_line_offset, line_index, line_offset;
1204 u64 line_no, table_skip_count, table_offset;
1205
1206 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
1207 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
1208 line_offset = idt->line_offset[line_index]
1209 * mmio->line_size;
1210 table_offset = table_skip_count * mmio->table_size;
1211
1212 return mmio->base_offset + line_offset + table_offset + sub_line_offset;
1213}
1214
c2ad2954
RZ		 1215static void wmb_blk(struct nfit_blk *nfit_blk)
1216{
1217
1218 if (nfit_blk->nvdimm_flush) {
1219 /*
1220 * The first wmb() is needed to 'sfence' all previous writes
1221 * such that they are architecturally visible for the platform
1222 * buffer flush. Note that we've already arranged for pmem
1223 * writes to avoid the cache via arch_memcpy_to_pmem(). The
1224 * final wmb() ensures ordering for the NVDIMM flush write.
1225 */
1226 wmb();
1227 writeq(1, nfit_blk->nvdimm_flush);
1228 wmb();
1229 } else
1230 wmb_pmem();
1231}
1232
de4a196c 1233static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
047fc8a1
RZ		 1234{
1235 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1236 u64 offset = nfit_blk->stat_offset + mmio->size * bw;
1237
1238 if (mmio->num_lines)
1239 offset = to_interleave_offset(offset, mmio);
1240
12f03ee6 1241 return readl(mmio->addr.base + offset);
047fc8a1
RZ		 1242}
1243
1244static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
1245 resource_size_t dpa, unsigned int len, unsigned int write)
1246{
1247 u64 cmd, offset;
1248 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1249
1250 enum {
1251 BCW_OFFSET_MASK = (1ULL << 48)-1,
1252 BCW_LEN_SHIFT = 48,
1253 BCW_LEN_MASK = (1ULL << 8) - 1,
1254 BCW_CMD_SHIFT = 56,
1255 };
1256
1257 cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
1258 len = len >> L1_CACHE_SHIFT;
1259 cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
1260 cmd |= ((u64) write) << BCW_CMD_SHIFT;
1261
1262 offset = nfit_blk->cmd_offset + mmio->size * bw;
1263 if (mmio->num_lines)
1264 offset = to_interleave_offset(offset, mmio);
1265
67a3e8fe 1266 writeq(cmd, mmio->addr.base + offset);
c2ad2954 1267 wmb_blk(nfit_blk);
f0f2c072 1268
aef25338 1269 if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
67a3e8fe 1270 readq(mmio->addr.base + offset);
047fc8a1
RZ		 1271}
1272
1273static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
1274 resource_size_t dpa, void *iobuf, size_t len, int rw,
1275 unsigned int lane)
1276{
1277 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1278 unsigned int copied = 0;
1279 u64 base_offset;
1280 int rc;
1281
1282 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
1283 + lane * mmio->size;
047fc8a1
RZ		 1284 write_blk_ctl(nfit_blk, lane, dpa, len, rw);
1285 while (len) {
1286 unsigned int c;
1287 u64 offset;
1288
1289 if (mmio->num_lines) {
1290 u32 line_offset;
1291
1292 offset = to_interleave_offset(base_offset + copied,
1293 mmio);
1294 div_u64_rem(offset, mmio->line_size, &line_offset);
1295 c = min_t(size_t, len, mmio->line_size - line_offset);
1296 } else {
1297 offset = base_offset + nfit_blk->bdw_offset;
1298 c = len;
1299 }
1300
1301 if (rw)
67a3e8fe 1302 memcpy_to_pmem(mmio->addr.aperture + offset,
c2ad2954 1303 iobuf + copied, c);
67a3e8fe 1304 else {
aef25338 1305 if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
67a3e8fe
RZ		 1306 mmio_flush_range((void __force *)
1307 mmio->addr.aperture + offset, c);
1308
c2ad2954 1309 memcpy_from_pmem(iobuf + copied,
67a3e8fe
RZ		 1310 mmio->addr.aperture + offset, c);
1311 }
047fc8a1
RZ		 1312
1313 copied += c;
1314 len -= c;
1315 }
c2ad2954
RZ		 1316
1317 if (rw)
1318 wmb_blk(nfit_blk);
1319
047fc8a1
RZ		 1320 rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
1321 return rc;
1322}
1323
1324static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
1325 resource_size_t dpa, void *iobuf, u64 len, int rw)
1326{
1327 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1328 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1329 struct nd_region *nd_region = nfit_blk->nd_region;
1330 unsigned int lane, copied = 0;
1331 int rc = 0;
1332
1333 lane = nd_region_acquire_lane(nd_region);
1334 while (len) {
1335 u64 c = min(len, mmio->size);
1336
1337 rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
1338 iobuf + copied, c, rw, lane);
1339 if (rc)
1340 break;
1341
1342 copied += c;
1343 len -= c;
1344 }
1345 nd_region_release_lane(nd_region, lane);
1346
1347 return rc;
1348}
1349
1350static void nfit_spa_mapping_release(struct kref *kref)
1351{
1352 struct nfit_spa_mapping *spa_map = to_spa_map(kref);
1353 struct acpi_nfit_system_address *spa = spa_map->spa;
1354 struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc;
1355
1356 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1357 dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index);
67a3e8fe
RZ		 1358 if (spa_map->type == SPA_MAP_APERTURE)
1359 memunmap((void __force *)spa_map->addr.aperture);
1360 else
1361 iounmap(spa_map->addr.base);
047fc8a1
RZ		 1362 release_mem_region(spa->address, spa->length);
1363 list_del(&spa_map->list);
1364 kfree(spa_map);
1365}
1366
1367static struct nfit_spa_mapping *find_spa_mapping(
1368 struct acpi_nfit_desc *acpi_desc,
1369 struct acpi_nfit_system_address *spa)
1370{
1371 struct nfit_spa_mapping *spa_map;
1372
1373 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1374 list_for_each_entry(spa_map, &acpi_desc->spa_maps, list)
1375 if (spa_map->spa == spa)
1376 return spa_map;
1377
1378 return NULL;
1379}
1380
1381static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc,
1382 struct acpi_nfit_system_address *spa)
1383{
1384 struct nfit_spa_mapping *spa_map;
1385
1386 mutex_lock(&acpi_desc->spa_map_mutex);
1387 spa_map = find_spa_mapping(acpi_desc, spa);
1388
1389 if (spa_map)
1390 kref_put(&spa_map->kref, nfit_spa_mapping_release);
1391 mutex_unlock(&acpi_desc->spa_map_mutex);
1392}
1393
1394static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1395 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1396{
1397 resource_size_t start = spa->address;
1398 resource_size_t n = spa->length;
1399 struct nfit_spa_mapping *spa_map;
1400 struct resource *res;
1401
1402 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1403
1404 spa_map = find_spa_mapping(acpi_desc, spa);
1405 if (spa_map) {
1406 kref_get(&spa_map->kref);
67a3e8fe 1407 return spa_map->addr.base;
047fc8a1
RZ		 1408 }
1409
1410 spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL);
1411 if (!spa_map)
1412 return NULL;
1413
1414 INIT_LIST_HEAD(&spa_map->list);
1415 spa_map->spa = spa;
1416 kref_init(&spa_map->kref);
1417 spa_map->acpi_desc = acpi_desc;
1418
1419 res = request_mem_region(start, n, dev_name(acpi_desc->dev));
1420 if (!res)
1421 goto err_mem;
1422
67a3e8fe
RZ		 1423 spa_map->type = type;
1424 if (type == SPA_MAP_APERTURE)
1425 spa_map->addr.aperture = (void __pmem *)memremap(start, n,
1426 ARCH_MEMREMAP_PMEM);
1427 else
1428 spa_map->addr.base = ioremap_nocache(start, n);
1429
c2ad2954 1430
67a3e8fe 1431 if (!spa_map->addr.base)
047fc8a1
RZ		 1432 goto err_map;
1433
1434 list_add_tail(&spa_map->list, &acpi_desc->spa_maps);
67a3e8fe 1435 return spa_map->addr.base;
047fc8a1
RZ		 1436
1437 err_map:
1438 release_mem_region(start, n);
1439 err_mem:
1440 kfree(spa_map);
1441 return NULL;
1442}
1443
1444/**
1445 * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges
1446 * @nvdimm_bus: NFIT-bus that provided the spa table entry
1447 * @nfit_spa: spa table to map
c2ad2954 1448 * @type: aperture or control region
047fc8a1
RZ		 1449 *
1450 * In the case where block-data-window apertures and
1451 * dimm-control-regions are interleaved they will end up sharing a
1452 * single request_mem_region() + ioremap() for the address range. In
1453 * the style of devm nfit_spa_map() mappings are automatically dropped
1454 * when all region devices referencing the same mapping are disabled /
1455 * unbound.
1456 */
1457static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1458 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1459{
1460 void __iomem *iomem;
1461
1462 mutex_lock(&acpi_desc->spa_map_mutex);
c2ad2954 1463 iomem = __nfit_spa_map(acpi_desc, spa, type);
047fc8a1
RZ		 1464 mutex_unlock(&acpi_desc->spa_map_mutex);
1465
1466 return iomem;
1467}
1468
1469static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
1470 struct acpi_nfit_interleave *idt, u16 interleave_ways)
1471{
1472 if (idt) {
1473 mmio->num_lines = idt->line_count;
1474 mmio->line_size = idt->line_size;
1475 if (interleave_ways == 0)
1476 return -ENXIO;
1477 mmio->table_size = mmio->num_lines * interleave_ways
1478 * mmio->line_size;
1479 }
1480
1481 return 0;
1482}
1483
f0f2c072
RZ		 1484static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
1485 struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
1486{
1487 struct nd_cmd_dimm_flags flags;
1488 int rc;
1489
1490 memset(&flags, 0, sizeof(flags));
1491 rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
aef25338 1492 sizeof(flags), NULL);
f0f2c072
RZ		 1493
1494 if (rc >= 0 && flags.status == 0)
1495 nfit_blk->dimm_flags = flags.flags;
1496 else if (rc == -ENOTTY) {
1497 /* fall back to a conservative default */
aef25338 1498 nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
f0f2c072
RZ		 1499 rc = 0;
1500 } else
1501 rc = -ENXIO;
1502
1503 return rc;
1504}
1505
047fc8a1
RZ		 1506static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
1507 struct device *dev)
1508{
1509 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1510 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1511 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
c2ad2954 1512 struct nfit_flush *nfit_flush;
047fc8a1
RZ		 1513 struct nfit_blk_mmio *mmio;
1514 struct nfit_blk *nfit_blk;
1515 struct nfit_mem *nfit_mem;
1516 struct nvdimm *nvdimm;
1517 int rc;
1518
1519 nvdimm = nd_blk_region_to_dimm(ndbr);
1520 nfit_mem = nvdimm_provider_data(nvdimm);
1521 if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
1522 dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
1523 nfit_mem ? "" : " nfit_mem",
193ccca4
DW		 1524 (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
1525 (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
047fc8a1
RZ		 1526 return -ENXIO;
1527 }
1528
1529 nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
1530 if (!nfit_blk)
1531 return -ENOMEM;
1532 nd_blk_region_set_provider_data(ndbr, nfit_blk);
1533 nfit_blk->nd_region = to_nd_region(dev);
1534
1535 /* map block aperture memory */
1536 nfit_blk->bdw_offset = nfit_mem->bdw->offset;
1537 mmio = &nfit_blk->mmio[BDW];
67a3e8fe 1538 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw,
c2ad2954 1539 SPA_MAP_APERTURE);
67a3e8fe 1540 if (!mmio->addr.base) {
047fc8a1
RZ		 1541 dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
1542 nvdimm_name(nvdimm));
1543 return -ENOMEM;
1544 }
1545 mmio->size = nfit_mem->bdw->size;
1546 mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
1547 mmio->idt = nfit_mem->idt_bdw;
1548 mmio->spa = nfit_mem->spa_bdw;
1549 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
1550 nfit_mem->memdev_bdw->interleave_ways);
1551 if (rc) {
1552 dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
1553 __func__, nvdimm_name(nvdimm));
1554 return rc;
1555 }
1556
1557 /* map block control memory */
1558 nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
1559 nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
1560 mmio = &nfit_blk->mmio[DCR];
67a3e8fe 1561 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr,
c2ad2954 1562 SPA_MAP_CONTROL);
67a3e8fe 1563 if (!mmio->addr.base) {
047fc8a1
RZ		 1564 dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
1565 nvdimm_name(nvdimm));
1566 return -ENOMEM;
1567 }
1568 mmio->size = nfit_mem->dcr->window_size;
1569 mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
1570 mmio->idt = nfit_mem->idt_dcr;
1571 mmio->spa = nfit_mem->spa_dcr;
1572 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
1573 nfit_mem->memdev_dcr->interleave_ways);
1574 if (rc) {
1575 dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
1576 __func__, nvdimm_name(nvdimm));
1577 return rc;
1578 }
1579
f0f2c072
RZ		 1580 rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
1581 if (rc < 0) {
1582 dev_dbg(dev, "%s: %s failed get DIMM flags\n",
1583 __func__, nvdimm_name(nvdimm));
1584 return rc;
1585 }
1586
c2ad2954
RZ		 1587 nfit_flush = nfit_mem->nfit_flush;
1588 if (nfit_flush && nfit_flush->flush->hint_count != 0) {
1589 nfit_blk->nvdimm_flush = devm_ioremap_nocache(dev,
1590 nfit_flush->flush->hint_address[0], 8);
1591 if (!nfit_blk->nvdimm_flush)
1592 return -ENOMEM;
1593 }
1594
96601adb 1595 if (!arch_has_wmb_pmem() && !nfit_blk->nvdimm_flush)
c2ad2954
RZ		 1596 dev_warn(dev, "unable to guarantee persistence of writes\n");
1597
047fc8a1
RZ		 1598 if (mmio->line_size == 0)
1599 return 0;
1600
1601 if ((u32) nfit_blk->cmd_offset % mmio->line_size
1602 + 8 > mmio->line_size) {
1603 dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
1604 return -ENXIO;
1605 } else if ((u32) nfit_blk->stat_offset % mmio->line_size
1606 + 8 > mmio->line_size) {
1607 dev_dbg(dev, "stat_offset crosses interleave boundary\n");
1608 return -ENXIO;
1609 }
1610
1611 return 0;
1612}
1613
1614static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus,
1615 struct device *dev)
1616{
1617 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1618 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1619 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
1620 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1621 int i;
1622
1623 if (!nfit_blk)
1624 return; /* never enabled */
1625
1626 /* auto-free BLK spa mappings */
1627 for (i = 0; i < 2; i++) {
1628 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i];
1629
67a3e8fe 1630 if (mmio->addr.base)
047fc8a1
RZ		 1631 nfit_spa_unmap(acpi_desc, mmio->spa);
1632 }
1633 nd_blk_region_set_provider_data(ndbr, NULL);
1634 /* devm will free nfit_blk */
1635}
1636
aef25338 1637static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
1cf03c00 1638 struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
0caeef63 1639{
aef25338 1640 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1cf03c00 1641 struct acpi_nfit_system_address *spa = nfit_spa->spa;
aef25338
DW		 1642 int cmd_rc, rc;
1643
1cf03c00
DW		 1644 cmd->address = spa->address;
1645 cmd->length = spa->length;
aef25338
DW		 1646 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
1647 sizeof(*cmd), &cmd_rc);
1648 if (rc < 0)
1649 return rc;
1cf03c00 1650 return cmd_rc;
0caeef63
VV		 1651}
1652
1cf03c00 1653static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
0caeef63
VV		 1654{
1655 int rc;
1cf03c00
DW		 1656 int cmd_rc;
1657 struct nd_cmd_ars_start ars_start;
1658 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1659 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
0caeef63 1660
1cf03c00
DW		 1661 memset(&ars_start, 0, sizeof(ars_start));
1662 ars_start.address = spa->address;
1663 ars_start.length = spa->length;
1664 if (nfit_spa_type(spa) == NFIT_SPA_PM)
1665 ars_start.type = ND_ARS_PERSISTENT;
1666 else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
1667 ars_start.type = ND_ARS_VOLATILE;
1668 else
1669 return -ENOTTY;
aef25338 1670
1cf03c00
DW		 1671 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1672 sizeof(ars_start), &cmd_rc);
aef25338 1673
1cf03c00
DW		 1674 if (rc < 0)
1675 return rc;
1676 return cmd_rc;
0caeef63
VV		 1677}
1678
1cf03c00 1679static int ars_continue(struct acpi_nfit_desc *acpi_desc)
0caeef63 1680{
aef25338 1681 int rc, cmd_rc;
1cf03c00
DW		 1682 struct nd_cmd_ars_start ars_start;
1683 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1684 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1685
1686 memset(&ars_start, 0, sizeof(ars_start));
1687 ars_start.address = ars_status->restart_address;
1688 ars_start.length = ars_status->restart_length;
1689 ars_start.type = ars_status->type;
1690 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1691 sizeof(ars_start), &cmd_rc);
1692 if (rc < 0)
1693 return rc;
1694 return cmd_rc;
1695}
0caeef63 1696
1cf03c00
DW		 1697static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
1698{
1699 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1700 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1701 int rc, cmd_rc;
aef25338 1702
1cf03c00
DW		 1703 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
1704 acpi_desc->ars_status_size, &cmd_rc);
1705 if (rc < 0)
1706 return rc;
1707 return cmd_rc;
0caeef63
VV		 1708}
1709
1710static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus,
1cf03c00 1711 struct nd_cmd_ars_status *ars_status)
0caeef63
VV		 1712{
1713 int rc;
1714 u32 i;
1715
0caeef63
VV		 1716 for (i = 0; i < ars_status->num_records; i++) {
1717 rc = nvdimm_bus_add_poison(nvdimm_bus,
1718 ars_status->records[i].err_address,
1719 ars_status->records[i].length);
1720 if (rc)
1721 return rc;
1722 }
1723
1724 return 0;
1725}
1726
af1996ef
TK		 1727static void acpi_nfit_remove_resource(void *data)
1728{
1729 struct resource *res = data;
1730
1731 remove_resource(res);
1732}
1733
1734static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
1735 struct nd_region_desc *ndr_desc)
1736{
1737 struct resource *res, *nd_res = ndr_desc->res;
1738 int is_pmem, ret;
1739
1740 /* No operation if the region is already registered as PMEM */
1741 is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
1742 IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
1743 if (is_pmem == REGION_INTERSECTS)
1744 return 0;
1745
1746 res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
1747 if (!res)
1748 return -ENOMEM;
1749
1750 res->name = "Persistent Memory";
1751 res->start = nd_res->start;
1752 res->end = nd_res->end;
1753 res->flags = IORESOURCE_MEM;
1754 res->desc = IORES_DESC_PERSISTENT_MEMORY;
1755
1756 ret = insert_resource(&iomem_resource, res);
1757 if (ret)
1758 return ret;
1759
1760 ret = devm_add_action(acpi_desc->dev, acpi_nfit_remove_resource, res);
1761 if (ret) {
1762 remove_resource(res);
1763 return ret;
1764 }
1765
1766 return 0;
1767}
1768
1f7df6f8
DW		 1769static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
1770 struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
1771 struct acpi_nfit_memory_map *memdev,
1cf03c00 1772 struct nfit_spa *nfit_spa)
1f7df6f8
DW		 1773{
1774 struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
1775 memdev->device_handle);
1cf03c00 1776 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1 1777 struct nd_blk_region_desc *ndbr_desc;
1f7df6f8
DW		 1778 struct nfit_mem *nfit_mem;
1779 int blk_valid = 0;
1780
1781 if (!nvdimm) {
1782 dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
1783 spa->range_index, memdev->device_handle);
1784 return -ENODEV;
1785 }
1786
1787 nd_mapping->nvdimm = nvdimm;
1788 switch (nfit_spa_type(spa)) {
1789 case NFIT_SPA_PM:
1790 case NFIT_SPA_VOLATILE:
1791 nd_mapping->start = memdev->address;
1792 nd_mapping->size = memdev->region_size;
1793 break;
1794 case NFIT_SPA_DCR:
1795 nfit_mem = nvdimm_provider_data(nvdimm);
1796 if (!nfit_mem || !nfit_mem->bdw) {
1797 dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
1798 spa->range_index, nvdimm_name(nvdimm));
1799 } else {
1800 nd_mapping->size = nfit_mem->bdw->capacity;
1801 nd_mapping->start = nfit_mem->bdw->start_address;
5212e11f 1802 ndr_desc->num_lanes = nfit_mem->bdw->windows;
1f7df6f8
DW		 1803 blk_valid = 1;
1804 }
1805
1806 ndr_desc->nd_mapping = nd_mapping;
1807 ndr_desc->num_mappings = blk_valid;
047fc8a1
RZ		 1808 ndbr_desc = to_blk_region_desc(ndr_desc);
1809 ndbr_desc->enable = acpi_nfit_blk_region_enable;
1810 ndbr_desc->disable = acpi_nfit_blk_region_disable;
6bc75619 1811 ndbr_desc->do_io = acpi_desc->blk_do_io;
1cf03c00
DW		 1812 nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
1813 ndr_desc);
1814 if (!nfit_spa->nd_region)
1f7df6f8
DW		 1815 return -ENOMEM;
1816 break;
1817 }
1818
1819 return 0;
1820}
1821
1822static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
1823 struct nfit_spa *nfit_spa)
1824{
1825 static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
1826 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1
RZ		 1827 struct nd_blk_region_desc ndbr_desc;
1828 struct nd_region_desc *ndr_desc;
1f7df6f8 1829 struct nfit_memdev *nfit_memdev;
1f7df6f8
DW		 1830 struct nvdimm_bus *nvdimm_bus;
1831 struct resource res;
eaf96153 1832 int count = 0, rc;
1f7df6f8 1833
1cf03c00 1834 if (nfit_spa->nd_region)
20985164
VV		 1835 return 0;
1836
1f7df6f8
DW		 1837 if (spa->range_index == 0) {
1838 dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
1839 __func__);
1840 return 0;
1841 }
1842
1843 memset(&res, 0, sizeof(res));
1844 memset(&nd_mappings, 0, sizeof(nd_mappings));
047fc8a1 1845 memset(&ndbr_desc, 0, sizeof(ndbr_desc));
1f7df6f8
DW		 1846 res.start = spa->address;
1847 res.end = res.start + spa->length - 1;
047fc8a1
RZ		 1848 ndr_desc = &ndbr_desc.ndr_desc;
1849 ndr_desc->res = &res;
1850 ndr_desc->provider_data = nfit_spa;
1851 ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
41d7a6d6
TK		 1852 if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
1853 ndr_desc->numa_node = acpi_map_pxm_to_online_node(
1854 spa->proximity_domain);
1855 else
1856 ndr_desc->numa_node = NUMA_NO_NODE;
1857
1f7df6f8
DW		 1858 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
1859 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
1860 struct nd_mapping *nd_mapping;
1f7df6f8
DW		 1861
1862 if (memdev->range_index != spa->range_index)
1863 continue;
1864 if (count >= ND_MAX_MAPPINGS) {
1865 dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
1866 spa->range_index, ND_MAX_MAPPINGS);
1867 return -ENXIO;
1868 }
1869 nd_mapping = &nd_mappings[count++];
047fc8a1 1870 rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
1cf03c00 1871 memdev, nfit_spa);
1f7df6f8 1872 if (rc)
1cf03c00 1873 goto out;
1f7df6f8
DW		 1874 }
1875
047fc8a1
RZ		 1876 ndr_desc->nd_mapping = nd_mappings;
1877 ndr_desc->num_mappings = count;
1878 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
eaf96153 1879 if (rc)
1cf03c00 1880 goto out;
eaf96153 1881
1f7df6f8
DW		 1882 nvdimm_bus = acpi_desc->nvdimm_bus;
1883 if (nfit_spa_type(spa) == NFIT_SPA_PM) {
af1996ef 1884 rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
48901165 1885 if (rc) {
af1996ef
TK		 1886 dev_warn(acpi_desc->dev,
1887 "failed to insert pmem resource to iomem: %d\n",
1888 rc);
48901165 1889 goto out;
0caeef63 1890 }
48901165 1891
1cf03c00
DW		 1892 nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
1893 ndr_desc);
1894 if (!nfit_spa->nd_region)
1895 rc = -ENOMEM;
1f7df6f8 1896 } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
1cf03c00
DW		 1897 nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
1898 ndr_desc);
1899 if (!nfit_spa->nd_region)
1900 rc = -ENOMEM;
1f7df6f8 1901 }
20985164 1902
1cf03c00
DW		 1903 out:
1904 if (rc)
1905 dev_err(acpi_desc->dev, "failed to register spa range %d\n",
1906 nfit_spa->spa->range_index);
1907 return rc;
1908}
1909
1910static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc,
1911 u32 max_ars)
1912{
1913 struct device *dev = acpi_desc->dev;
1914 struct nd_cmd_ars_status *ars_status;
1915
1916 if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) {
1917 memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size);
1918 return 0;
1919 }
1920
1921 if (acpi_desc->ars_status)
1922 devm_kfree(dev, acpi_desc->ars_status);
1923 acpi_desc->ars_status = NULL;
1924 ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL);
1925 if (!ars_status)
1926 return -ENOMEM;
1927 acpi_desc->ars_status = ars_status;
1928 acpi_desc->ars_status_size = max_ars;
1f7df6f8
DW		 1929 return 0;
1930}
1931
1cf03c00
DW		 1932static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc,
1933 struct nfit_spa *nfit_spa)
1934{
1935 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1936 int rc;
1937
1938 if (!nfit_spa->max_ars) {
1939 struct nd_cmd_ars_cap ars_cap;
1940
1941 memset(&ars_cap, 0, sizeof(ars_cap));
1942 rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
1943 if (rc < 0)
1944 return rc;
1945 nfit_spa->max_ars = ars_cap.max_ars_out;
1946 nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
1947 /* check that the supported scrub types match the spa type */
1948 if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE &&
1949 ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0)
1950 return -ENOTTY;
1951 else if (nfit_spa_type(spa) == NFIT_SPA_PM &&
1952 ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0)
1953 return -ENOTTY;
1954 }
1955
1956 if (ars_status_alloc(acpi_desc, nfit_spa->max_ars))
1957 return -ENOMEM;
1958
1959 rc = ars_get_status(acpi_desc);
1960 if (rc < 0 && rc != -ENOSPC)
1961 return rc;
1962
1963 if (ars_status_process_records(acpi_desc->nvdimm_bus,
1964 acpi_desc->ars_status))
1965 return -ENOMEM;
1966
1967 return 0;
1968}
1969
1970static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc,
1971 struct nfit_spa *nfit_spa)
1972{
1973 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1974 unsigned int overflow_retry = scrub_overflow_abort;
1975 u64 init_ars_start = 0, init_ars_len = 0;
1976 struct device *dev = acpi_desc->dev;
1977 unsigned int tmo = scrub_timeout;
1978 int rc;
1979
1980 if (nfit_spa->ars_done || !nfit_spa->nd_region)
1981 return;
1982
1983 rc = ars_start(acpi_desc, nfit_spa);
1984 /*
1985 * If we timed out the initial scan we'll still be busy here,
1986 * and will wait another timeout before giving up permanently.
1987 */
1988 if (rc < 0 && rc != -EBUSY)
1989 return;
1990
1991 do {
1992 u64 ars_start, ars_len;
1993
1994 if (acpi_desc->cancel)
1995 break;
1996 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
1997 if (rc == -ENOTTY)
1998 break;
1999 if (rc == -EBUSY && !tmo) {
2000 dev_warn(dev, "range %d ars timeout, aborting\n",
2001 spa->range_index);
2002 break;
2003 }
2004
2005 if (rc == -EBUSY) {
2006 /*
2007 * Note, entries may be appended to the list
2008 * while the lock is dropped, but the workqueue
2009 * being active prevents entries being deleted /
2010 * freed.
2011 */
2012 mutex_unlock(&acpi_desc->init_mutex);
2013 ssleep(1);
2014 tmo--;
2015 mutex_lock(&acpi_desc->init_mutex);
2016 continue;
2017 }
2018
2019 /* we got some results, but there are more pending... */
2020 if (rc == -ENOSPC && overflow_retry--) {
2021 if (!init_ars_len) {
2022 init_ars_len = acpi_desc->ars_status->length;
2023 init_ars_start = acpi_desc->ars_status->address;
2024 }
2025 rc = ars_continue(acpi_desc);
2026 }
2027
2028 if (rc < 0) {
2029 dev_warn(dev, "range %d ars continuation failed\n",
2030 spa->range_index);
2031 break;
2032 }
2033
2034 if (init_ars_len) {
2035 ars_start = init_ars_start;
2036 ars_len = init_ars_len;
2037 } else {
2038 ars_start = acpi_desc->ars_status->address;
2039 ars_len = acpi_desc->ars_status->length;
2040 }
2041 dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n",
2042 spa->range_index, ars_start, ars_len);
2043 /* notify the region about new poison entries */
2044 nvdimm_region_notify(nfit_spa->nd_region,
2045 NVDIMM_REVALIDATE_POISON);
2046 break;
2047 } while (1);
2048}
2049
2050static void acpi_nfit_scrub(struct work_struct *work)
1f7df6f8 2051{
1cf03c00
DW		 2052 struct device *dev;
2053 u64 init_scrub_length = 0;
1f7df6f8 2054 struct nfit_spa *nfit_spa;
1cf03c00
DW		 2055 u64 init_scrub_address = 0;
2056 bool init_ars_done = false;
2057 struct acpi_nfit_desc *acpi_desc;
2058 unsigned int tmo = scrub_timeout;
2059 unsigned int overflow_retry = scrub_overflow_abort;
2060
2061 acpi_desc = container_of(work, typeof(*acpi_desc), work);
2062 dev = acpi_desc->dev;
1f7df6f8 2063
1cf03c00
DW		 2064 /*
2065 * We scrub in 2 phases. The first phase waits for any platform
2066 * firmware initiated scrubs to complete and then we go search for the
2067 * affected spa regions to mark them scanned. In the second phase we
2068 * initiate a directed scrub for every range that was not scrubbed in
2069 * phase 1.
2070 */
2071
2072 /* process platform firmware initiated scrubs */
2073 retry:
2074 mutex_lock(&acpi_desc->init_mutex);
1f7df6f8 2075 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
1cf03c00
DW		 2076 struct nd_cmd_ars_status *ars_status;
2077 struct acpi_nfit_system_address *spa;
2078 u64 ars_start, ars_len;
2079 int rc;
1f7df6f8 2080
1cf03c00
DW		 2081 if (acpi_desc->cancel)
2082 break;
2083
2084 if (nfit_spa->nd_region)
2085 continue;
2086
2087 if (init_ars_done) {
2088 /*
2089 * No need to re-query, we're now just
2090 * reconciling all the ranges covered by the
2091 * initial scrub
2092 */
2093 rc = 0;
2094 } else
2095 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
2096
2097 if (rc == -ENOTTY) {
2098 /* no ars capability, just register spa and move on */
2099 acpi_nfit_register_region(acpi_desc, nfit_spa);
2100 continue;
2101 }
2102
2103 if (rc == -EBUSY && !tmo) {
2104 /* fallthrough to directed scrub in phase 2 */
2105 dev_warn(dev, "timeout awaiting ars results, continuing...\n");
2106 break;
2107 } else if (rc == -EBUSY) {
2108 mutex_unlock(&acpi_desc->init_mutex);
2109 ssleep(1);
2110 tmo--;
2111 goto retry;
2112 }
2113
2114 /* we got some results, but there are more pending... */
2115 if (rc == -ENOSPC && overflow_retry--) {
2116 ars_status = acpi_desc->ars_status;
2117 /*
2118 * Record the original scrub range, so that we
2119 * can recall all the ranges impacted by the
2120 * initial scrub.
2121 */
2122 if (!init_scrub_length) {
2123 init_scrub_length = ars_status->length;
2124 init_scrub_address = ars_status->address;
2125 }
2126 rc = ars_continue(acpi_desc);
2127 if (rc == 0) {
2128 mutex_unlock(&acpi_desc->init_mutex);
2129 goto retry;
2130 }
2131 }
2132
2133 if (rc < 0) {
2134 /*
2135 * Initial scrub failed, we'll give it one more
2136 * try below...
2137 */
2138 break;
2139 }
2140
2141 /* We got some final results, record completed ranges */
2142 ars_status = acpi_desc->ars_status;
2143 if (init_scrub_length) {
2144 ars_start = init_scrub_address;
2145 ars_len = ars_start + init_scrub_length;
2146 } else {
2147 ars_start = ars_status->address;
2148 ars_len = ars_status->length;
2149 }
2150 spa = nfit_spa->spa;
2151
2152 if (!init_ars_done) {
2153 init_ars_done = true;
2154 dev_dbg(dev, "init scrub %#llx + %#llx complete\n",
2155 ars_start, ars_len);
2156 }
2157 if (ars_start <= spa->address && ars_start + ars_len
2158 >= spa->address + spa->length)
2159 acpi_nfit_register_region(acpi_desc, nfit_spa);
1f7df6f8 2160 }
1cf03c00
DW		 2161
2162 /*
2163 * For all the ranges not covered by an initial scrub we still
2164 * want to see if there are errors, but it's ok to discover them
2165 * asynchronously.
2166 */
2167 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
2168 /*
2169 * Flag all the ranges that still need scrubbing, but
2170 * register them now to make data available.
2171 */
2172 if (nfit_spa->nd_region)
2173 nfit_spa->ars_done = 1;
2174 else
2175 acpi_nfit_register_region(acpi_desc, nfit_spa);
2176 }
2177
2178 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2179 acpi_nfit_async_scrub(acpi_desc, nfit_spa);
2180 mutex_unlock(&acpi_desc->init_mutex);
2181}
2182
2183static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
2184{
2185 struct nfit_spa *nfit_spa;
2186 int rc;
2187
2188 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2189 if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) {
2190 /* BLK regions don't need to wait for ars results */
2191 rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
2192 if (rc)
2193 return rc;
2194 }
2195
2196 queue_work(nfit_wq, &acpi_desc->work);
1f7df6f8
DW		 2197 return 0;
2198}
2199
20985164
VV		 2200static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
2201 struct nfit_table_prev *prev)
2202{
2203 struct device *dev = acpi_desc->dev;
2204
2205 if (!list_empty(&prev->spas) ||
2206 !list_empty(&prev->memdevs) ||
2207 !list_empty(&prev->dcrs) ||
2208 !list_empty(&prev->bdws) ||
2209 !list_empty(&prev->idts) ||
2210 !list_empty(&prev->flushes)) {
2211 dev_err(dev, "new nfit deletes entries (unsupported)\n");
2212 return -ENXIO;
2213 }
2214 return 0;
2215}
2216
6bc75619 2217int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz)
b94d5230
DW		 2218{
2219 struct device *dev = acpi_desc->dev;
20985164 2220 struct nfit_table_prev prev;
b94d5230
DW		 2221 const void *end;
2222 u8 *data;
1f7df6f8 2223 int rc;
b94d5230 2224
20985164
VV		 2225 mutex_lock(&acpi_desc->init_mutex);
2226
2227 INIT_LIST_HEAD(&prev.spas);
2228 INIT_LIST_HEAD(&prev.memdevs);
2229 INIT_LIST_HEAD(&prev.dcrs);
2230 INIT_LIST_HEAD(&prev.bdws);
2231 INIT_LIST_HEAD(&prev.idts);
2232 INIT_LIST_HEAD(&prev.flushes);
2233
2234 list_cut_position(&prev.spas, &acpi_desc->spas,
2235 acpi_desc->spas.prev);
2236 list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
2237 acpi_desc->memdevs.prev);
2238 list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
2239 acpi_desc->dcrs.prev);
2240 list_cut_position(&prev.bdws, &acpi_desc->bdws,
2241 acpi_desc->bdws.prev);
2242 list_cut_position(&prev.idts, &acpi_desc->idts,
2243 acpi_desc->idts.prev);
2244 list_cut_position(&prev.flushes, &acpi_desc->flushes,
2245 acpi_desc->flushes.prev);
b94d5230
DW		 2246
2247 data = (u8 *) acpi_desc->nfit;
2248 end = data + sz;
b94d5230 2249 while (!IS_ERR_OR_NULL(data))
20985164 2250 data = add_table(acpi_desc, &prev, data, end);
b94d5230
DW		 2251
2252 if (IS_ERR(data)) {
2253 dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
2254 PTR_ERR(data));
20985164
VV		 2255 rc = PTR_ERR(data);
2256 goto out_unlock;
b94d5230
DW		 2257 }
2258
20985164
VV		 2259 rc = acpi_nfit_check_deletions(acpi_desc, &prev);
2260 if (rc)
2261 goto out_unlock;
2262
2263 if (nfit_mem_init(acpi_desc) != 0) {
2264 rc = -ENOMEM;
2265 goto out_unlock;
2266 }
b94d5230 2267
62232e45
DW		 2268 acpi_nfit_init_dsms(acpi_desc);
2269
1f7df6f8
DW		 2270 rc = acpi_nfit_register_dimms(acpi_desc);
2271 if (rc)
20985164
VV		 2272 goto out_unlock;
2273
2274 rc = acpi_nfit_register_regions(acpi_desc);
1f7df6f8 2275
20985164
VV		 2276 out_unlock:
2277 mutex_unlock(&acpi_desc->init_mutex);
2278 return rc;
b94d5230 2279}
6bc75619 2280EXPORT_SYMBOL_GPL(acpi_nfit_init);
b94d5230 2281
7ae0fa43
DW		 2282struct acpi_nfit_flush_work {
2283 struct work_struct work;
2284 struct completion cmp;
2285};
2286
2287static void flush_probe(struct work_struct *work)
2288{
2289 struct acpi_nfit_flush_work *flush;
2290
2291 flush = container_of(work, typeof(*flush), work);
2292 complete(&flush->cmp);
2293}
2294
2295static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
2296{
2297 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2298 struct device *dev = acpi_desc->dev;
2299 struct acpi_nfit_flush_work flush;
2300
2301 /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
2302 device_lock(dev);
2303 device_unlock(dev);
2304
2305 /*
2306 * Scrub work could take 10s of seconds, userspace may give up so we
2307 * need to be interruptible while waiting.
2308 */
2309 INIT_WORK_ONSTACK(&flush.work, flush_probe);
2310 COMPLETION_INITIALIZER_ONSTACK(flush.cmp);
2311 queue_work(nfit_wq, &flush.work);
2312 return wait_for_completion_interruptible(&flush.cmp);
2313}
2314
87bf572e
DW		 2315static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
2316 struct nvdimm *nvdimm, unsigned int cmd)
2317{
2318 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2319
2320 if (nvdimm)
2321 return 0;
2322 if (cmd != ND_CMD_ARS_START)
2323 return 0;
2324
2325 /*
2326 * The kernel and userspace may race to initiate a scrub, but
2327 * the scrub thread is prepared to lose that initial race. It
2328 * just needs guarantees that any ars it initiates are not
2329 * interrupted by any intervening start reqeusts from userspace.
2330 */
2331 if (work_busy(&acpi_desc->work))
2332 return -EBUSY;
2333
2334 return 0;
2335}
2336
a61fe6f7 2337void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
b94d5230
DW		 2338{
2339 struct nvdimm_bus_descriptor *nd_desc;
b94d5230
DW		 2340
2341 dev_set_drvdata(dev, acpi_desc);
2342 acpi_desc->dev = dev;
6bc75619 2343 acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
b94d5230
DW		 2344 nd_desc = &acpi_desc->nd_desc;
2345 nd_desc->provider_name = "ACPI.NFIT";
2346 nd_desc->ndctl = acpi_nfit_ctl;
7ae0fa43 2347 nd_desc->flush_probe = acpi_nfit_flush_probe;
87bf572e 2348 nd_desc->clear_to_send = acpi_nfit_clear_to_send;
45def22c 2349 nd_desc->attr_groups = acpi_nfit_attribute_groups;
b94d5230 2350
20985164
VV		 2351 INIT_LIST_HEAD(&acpi_desc->spa_maps);
2352 INIT_LIST_HEAD(&acpi_desc->spas);
2353 INIT_LIST_HEAD(&acpi_desc->dcrs);
2354 INIT_LIST_HEAD(&acpi_desc->bdws);
2355 INIT_LIST_HEAD(&acpi_desc->idts);
2356 INIT_LIST_HEAD(&acpi_desc->flushes);
2357 INIT_LIST_HEAD(&acpi_desc->memdevs);
2358 INIT_LIST_HEAD(&acpi_desc->dimms);
2359 mutex_init(&acpi_desc->spa_map_mutex);
2360 mutex_init(&acpi_desc->init_mutex);
1cf03c00 2361 INIT_WORK(&acpi_desc->work, acpi_nfit_scrub);
20985164 2362}
a61fe6f7 2363EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
20985164
VV		 2364
2365static int acpi_nfit_add(struct acpi_device *adev)
2366{
2367 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
2368 struct acpi_nfit_desc *acpi_desc;
2369 struct device *dev = &adev->dev;
2370 struct acpi_table_header *tbl;
2371 acpi_status status = AE_OK;
2372 acpi_size sz;
2373 int rc;
2374
2375 status = acpi_get_table_with_size("NFIT", 0, &tbl, &sz);
2376 if (ACPI_FAILURE(status)) {
2377 /* This is ok, we could have an nvdimm hotplugged later */
2378 dev_dbg(dev, "failed to find NFIT at startup\n");
2379 return 0;
2380 }
2381
a61fe6f7
DW		 2382 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2383 if (!acpi_desc)
2384 return -ENOMEM;
2385 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2386 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2387 if (!acpi_desc->nvdimm_bus)
2388 return -ENOMEM;
20985164 2389
6b577c9d
LK		 2390 /*
2391 * Save the acpi header for later and then skip it,
2392 * making nfit point to the first nfit table header.
2393 */
2394 acpi_desc->acpi_header = *tbl;
2395 acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit);
2396 sz -= sizeof(struct acpi_table_nfit);
20985164
VV		 2397
2398 /* Evaluate _FIT and override with that if present */
2399 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2400 if (ACPI_SUCCESS(status) && buf.length > 0) {
6b577c9d
LK		 2401 union acpi_object *obj;
2402 /*
2403 * Adjust for the acpi_object header of the _FIT
2404 */
2405 obj = buf.pointer;
2406 if (obj->type == ACPI_TYPE_BUFFER) {
2407 acpi_desc->nfit =
2408 (struct acpi_nfit_header *)obj->buffer.pointer;
2409 sz = obj->buffer.length;
2410 } else
2411 dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n",
2412 __func__, (int) obj->type);
20985164 2413 }
b94d5230
DW		 2414
2415 rc = acpi_nfit_init(acpi_desc, sz);
2416 if (rc) {
2417 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2418 return rc;
2419 }
2420 return 0;
2421}
2422
2423static int acpi_nfit_remove(struct acpi_device *adev)
2424{
2425 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2426
7ae0fa43
DW		 2427 acpi_desc->cancel = 1;
2428 flush_workqueue(nfit_wq);
b94d5230
DW		 2429 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2430 return 0;
2431}
2432
20985164
VV		 2433static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
2434{
2435 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2436 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
6b577c9d
LK		 2437 struct acpi_nfit_header *nfit_saved;
2438 union acpi_object *obj;
20985164
VV		 2439 struct device *dev = &adev->dev;
2440 acpi_status status;
2441 int ret;
2442
2443 dev_dbg(dev, "%s: event: %d\n", __func__, event);
2444
2445 device_lock(dev);
2446 if (!dev->driver) {
2447 /* dev->driver may be null if we're being removed */
2448 dev_dbg(dev, "%s: no driver found for dev\n", __func__);
d91e8928 2449 goto out_unlock;
20985164
VV		 2450 }
2451
2452 if (!acpi_desc) {
a61fe6f7
DW		 2453 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2454 if (!acpi_desc)
2455 goto out_unlock;
2456 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2457 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2458 if (!acpi_desc->nvdimm_bus)
20985164 2459 goto out_unlock;
7ae0fa43
DW		 2460 } else {
2461 /*
2462 * Finish previous registration before considering new
2463 * regions.
2464 */
2465 flush_workqueue(nfit_wq);
20985164
VV		 2466 }
2467
2468 /* Evaluate _FIT */
2469 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2470 if (ACPI_FAILURE(status)) {
2471 dev_err(dev, "failed to evaluate _FIT\n");
2472 goto out_unlock;
2473 }
2474
2475 nfit_saved = acpi_desc->nfit;
6b577c9d
LK		 2476 obj = buf.pointer;
2477 if (obj->type == ACPI_TYPE_BUFFER) {
2478 acpi_desc->nfit =
2479 (struct acpi_nfit_header *)obj->buffer.pointer;
2480 ret = acpi_nfit_init(acpi_desc, obj->buffer.length);
2481 if (ret) {
2482 /* Merge failed, restore old nfit, and exit */
2483 acpi_desc->nfit = nfit_saved;
2484 dev_err(dev, "failed to merge updated NFIT\n");
2485 }
2486 } else {
2487 /* Bad _FIT, restore old nfit */
2488 dev_err(dev, "Invalid _FIT\n");
20985164
VV		 2489 }
2490 kfree(buf.pointer);
2491
2492 out_unlock:
2493 device_unlock(dev);
2494}
2495
b94d5230
DW		 2496static const struct acpi_device_id acpi_nfit_ids[] = {
2497 { "ACPI0012", 0 },
2498 { "", 0 },
2499};
2500MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
2501
2502static struct acpi_driver acpi_nfit_driver = {
2503 .name = KBUILD_MODNAME,
2504 .ids = acpi_nfit_ids,
2505 .ops = {
2506 .add = acpi_nfit_add,
2507 .remove = acpi_nfit_remove,
20985164 2508 .notify = acpi_nfit_notify,
b94d5230
DW		 2509 },
2510};
2511
2512static __init int nfit_init(void)
2513{
2514 BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
2515 BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
2516 BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
2517 BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
2518 BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
2519 BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
2520 BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
2521
2522 acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
2523 acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
2524 acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
2525 acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
2526 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
2527 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
2528 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
2529 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
2530 acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
2531 acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
2532
7ae0fa43
DW		 2533 nfit_wq = create_singlethread_workqueue("nfit");
2534 if (!nfit_wq)
2535 return -ENOMEM;
2536
b94d5230
DW		 2537 return acpi_bus_register_driver(&acpi_nfit_driver);
2538}
2539
2540static __exit void nfit_exit(void)
2541{
2542 acpi_bus_unregister_driver(&acpi_nfit_driver);
7ae0fa43 2543 destroy_workqueue(nfit_wq);
b94d5230
DW		 2544}
2545
2546module_init(nfit_init);
2547module_exit(nfit_exit);
2548MODULE_LICENSE("GPL v2");
2549MODULE_AUTHOR("Intel Corporation");
Linux kernel - Deliverables
This page took 0.176589 seconds and 5 git commands to generate.