Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
35 | #include <linux/proc_fs.h> | |
36 | #include <linux/seq_file.h> | |
37 | #include <linux/acpi.h> | |
38 | #include <linux/dmi.h> | |
39 | #include <linux/moduleparam.h> | |
4e57b681 | 40 | #include <linux/sched.h> /* need_resched() */ |
5c87579e | 41 | #include <linux/latency.h> |
1da177e4 LT |
42 | |
43 | #include <asm/io.h> | |
44 | #include <asm/uaccess.h> | |
45 | ||
46 | #include <acpi/acpi_bus.h> | |
47 | #include <acpi/processor.h> | |
48 | ||
49 | #define ACPI_PROCESSOR_COMPONENT 0x01000000 | |
50 | #define ACPI_PROCESSOR_CLASS "processor" | |
51 | #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver" | |
52 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT | |
4be44fcd | 53 | ACPI_MODULE_NAME("acpi_processor") |
1da177e4 | 54 | #define ACPI_PROCESSOR_FILE_POWER "power" |
1da177e4 LT |
55 | #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000) |
56 | #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
57 | #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
b6835052 | 58 | static void (*pm_idle_save) (void) __read_mostly; |
1da177e4 LT |
59 | module_param(max_cstate, uint, 0644); |
60 | ||
b6835052 | 61 | static unsigned int nocst __read_mostly; |
1da177e4 LT |
62 | module_param(nocst, uint, 0000); |
63 | ||
64 | /* | |
65 | * bm_history -- bit-mask with a bit per jiffy of bus-master activity | |
66 | * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms | |
67 | * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms | |
68 | * 100 HZ: 0x0000000F: 4 jiffies = 40ms | |
69 | * reduce history for more aggressive entry into C3 | |
70 | */ | |
b6835052 | 71 | static unsigned int bm_history __read_mostly = |
4be44fcd | 72 | (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1)); |
1da177e4 LT |
73 | module_param(bm_history, uint, 0644); |
74 | /* -------------------------------------------------------------------------- | |
75 | Power Management | |
76 | -------------------------------------------------------------------------- */ | |
77 | ||
78 | /* | |
79 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
80 | * For now disable this. Probably a bug somewhere else. | |
81 | * | |
82 | * To skip this limit, boot/load with a large max_cstate limit. | |
83 | */ | |
335f16be | 84 | static int set_max_cstate(struct dmi_system_id *id) |
1da177e4 LT |
85 | { |
86 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
87 | return 0; | |
88 | ||
3d35600a | 89 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
90 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
91 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 92 | |
3d35600a | 93 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
94 | |
95 | return 0; | |
96 | } | |
97 | ||
7ded5689 AR |
98 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
99 | callers to only run once -AK */ | |
100 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
f831335d BS |
101 | { set_max_cstate, "IBM ThinkPad R40e", { |
102 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
103 | DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1}, | |
876c184b TR |
104 | { set_max_cstate, "IBM ThinkPad R40e", { |
105 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
106 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1}, | |
107 | { set_max_cstate, "IBM ThinkPad R40e", { | |
108 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
109 | DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1}, | |
110 | { set_max_cstate, "IBM ThinkPad R40e", { | |
111 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
112 | DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1}, | |
113 | { set_max_cstate, "IBM ThinkPad R40e", { | |
114 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
115 | DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1}, | |
116 | { set_max_cstate, "IBM ThinkPad R40e", { | |
117 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
118 | DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1}, | |
119 | { set_max_cstate, "IBM ThinkPad R40e", { | |
120 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
121 | DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1}, | |
122 | { set_max_cstate, "IBM ThinkPad R40e", { | |
123 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
124 | DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1}, | |
125 | { set_max_cstate, "IBM ThinkPad R40e", { | |
126 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
127 | DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1}, | |
128 | { set_max_cstate, "IBM ThinkPad R40e", { | |
129 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
130 | DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1}, | |
131 | { set_max_cstate, "IBM ThinkPad R40e", { | |
132 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
133 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1}, | |
134 | { set_max_cstate, "IBM ThinkPad R40e", { | |
135 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
136 | DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1}, | |
137 | { set_max_cstate, "IBM ThinkPad R40e", { | |
138 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
139 | DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1}, | |
140 | { set_max_cstate, "IBM ThinkPad R40e", { | |
141 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
142 | DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1}, | |
143 | { set_max_cstate, "IBM ThinkPad R40e", { | |
144 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
145 | DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1}, | |
146 | { set_max_cstate, "IBM ThinkPad R40e", { | |
147 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
148 | DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1}, | |
149 | { set_max_cstate, "Medion 41700", { | |
150 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
151 | DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, | |
152 | { set_max_cstate, "Clevo 5600D", { | |
153 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
154 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 155 | (void *)2}, |
1da177e4 LT |
156 | {}, |
157 | }; | |
158 | ||
4be44fcd | 159 | static inline u32 ticks_elapsed(u32 t1, u32 t2) |
1da177e4 LT |
160 | { |
161 | if (t2 >= t1) | |
162 | return (t2 - t1); | |
163 | else if (!acpi_fadt.tmr_val_ext) | |
164 | return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF); | |
165 | else | |
166 | return ((0xFFFFFFFF - t1) + t2); | |
167 | } | |
168 | ||
1da177e4 | 169 | static void |
4be44fcd LB |
170 | acpi_processor_power_activate(struct acpi_processor *pr, |
171 | struct acpi_processor_cx *new) | |
1da177e4 | 172 | { |
4be44fcd | 173 | struct acpi_processor_cx *old; |
1da177e4 LT |
174 | |
175 | if (!pr || !new) | |
176 | return; | |
177 | ||
178 | old = pr->power.state; | |
179 | ||
180 | if (old) | |
181 | old->promotion.count = 0; | |
4be44fcd | 182 | new->demotion.count = 0; |
1da177e4 LT |
183 | |
184 | /* Cleanup from old state. */ | |
185 | if (old) { | |
186 | switch (old->type) { | |
187 | case ACPI_STATE_C3: | |
188 | /* Disable bus master reload */ | |
02df8b93 | 189 | if (new->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
190 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, |
191 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
192 | break; |
193 | } | |
194 | } | |
195 | ||
196 | /* Prepare to use new state. */ | |
197 | switch (new->type) { | |
198 | case ACPI_STATE_C3: | |
199 | /* Enable bus master reload */ | |
02df8b93 | 200 | if (old->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
201 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1, |
202 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
203 | break; |
204 | } | |
205 | ||
206 | pr->power.state = new; | |
207 | ||
208 | return; | |
209 | } | |
210 | ||
64c7c8f8 NP |
211 | static void acpi_safe_halt(void) |
212 | { | |
495ab9c0 | 213 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 | 214 | smp_mb__after_clear_bit(); |
64c7c8f8 NP |
215 | if (!need_resched()) |
216 | safe_halt(); | |
495ab9c0 | 217 | current_thread_info()->status |= TS_POLLING; |
64c7c8f8 NP |
218 | } |
219 | ||
4be44fcd | 220 | static atomic_t c3_cpu_count; |
1da177e4 | 221 | |
991528d7 VP |
222 | /* Common C-state entry for C2, C3, .. */ |
223 | static void acpi_cstate_enter(struct acpi_processor_cx *cstate) | |
224 | { | |
225 | if (cstate->space_id == ACPI_CSTATE_FFH) { | |
226 | /* Call into architectural FFH based C-state */ | |
227 | acpi_processor_ffh_cstate_enter(cstate); | |
228 | } else { | |
229 | int unused; | |
230 | /* IO port based C-state */ | |
231 | inb(cstate->address); | |
232 | /* Dummy wait op - must do something useless after P_LVL2 read | |
233 | because chipsets cannot guarantee that STPCLK# signal | |
234 | gets asserted in time to freeze execution properly. */ | |
235 | unused = inl(acpi_fadt.xpm_tmr_blk.address); | |
236 | } | |
237 | } | |
238 | ||
4be44fcd | 239 | static void acpi_processor_idle(void) |
1da177e4 | 240 | { |
4be44fcd | 241 | struct acpi_processor *pr = NULL; |
1da177e4 LT |
242 | struct acpi_processor_cx *cx = NULL; |
243 | struct acpi_processor_cx *next_state = NULL; | |
4be44fcd LB |
244 | int sleep_ticks = 0; |
245 | u32 t1, t2 = 0; | |
1da177e4 | 246 | |
64c7c8f8 | 247 | pr = processors[smp_processor_id()]; |
1da177e4 LT |
248 | if (!pr) |
249 | return; | |
250 | ||
251 | /* | |
252 | * Interrupts must be disabled during bus mastering calculations and | |
253 | * for C2/C3 transitions. | |
254 | */ | |
255 | local_irq_disable(); | |
256 | ||
257 | /* | |
258 | * Check whether we truly need to go idle, or should | |
259 | * reschedule: | |
260 | */ | |
261 | if (unlikely(need_resched())) { | |
262 | local_irq_enable(); | |
263 | return; | |
264 | } | |
265 | ||
266 | cx = pr->power.state; | |
64c7c8f8 NP |
267 | if (!cx) { |
268 | if (pm_idle_save) | |
269 | pm_idle_save(); | |
270 | else | |
271 | acpi_safe_halt(); | |
272 | return; | |
273 | } | |
1da177e4 LT |
274 | |
275 | /* | |
276 | * Check BM Activity | |
277 | * ----------------- | |
278 | * Check for bus mastering activity (if required), record, and check | |
279 | * for demotion. | |
280 | */ | |
281 | if (pr->flags.bm_check) { | |
4be44fcd LB |
282 | u32 bm_status = 0; |
283 | unsigned long diff = jiffies - pr->power.bm_check_timestamp; | |
1da177e4 | 284 | |
c5ab81ca DB |
285 | if (diff > 31) |
286 | diff = 31; | |
1da177e4 | 287 | |
c5ab81ca | 288 | pr->power.bm_activity <<= diff; |
1da177e4 LT |
289 | |
290 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, | |
4be44fcd | 291 | &bm_status, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 | 292 | if (bm_status) { |
c5ab81ca | 293 | pr->power.bm_activity |= 0x1; |
1da177e4 | 294 | acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, |
4be44fcd | 295 | 1, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 LT |
296 | } |
297 | /* | |
298 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
299 | * the true state of bus mastering activity; forcing us to | |
300 | * manually check the BMIDEA bit of each IDE channel. | |
301 | */ | |
302 | else if (errata.piix4.bmisx) { | |
303 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
4be44fcd | 304 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) |
c5ab81ca | 305 | pr->power.bm_activity |= 0x1; |
1da177e4 LT |
306 | } |
307 | ||
308 | pr->power.bm_check_timestamp = jiffies; | |
309 | ||
310 | /* | |
c4a001b1 | 311 | * If bus mastering is or was active this jiffy, demote |
1da177e4 LT |
312 | * to avoid a faulty transition. Note that the processor |
313 | * won't enter a low-power state during this call (to this | |
c4a001b1 | 314 | * function) but should upon the next. |
1da177e4 LT |
315 | * |
316 | * TBD: A better policy might be to fallback to the demotion | |
317 | * state (use it for this quantum only) istead of | |
318 | * demoting -- and rely on duration as our sole demotion | |
319 | * qualification. This may, however, introduce DMA | |
320 | * issues (e.g. floppy DMA transfer overrun/underrun). | |
321 | */ | |
c4a001b1 DB |
322 | if ((pr->power.bm_activity & 0x1) && |
323 | cx->demotion.threshold.bm) { | |
1da177e4 LT |
324 | local_irq_enable(); |
325 | next_state = cx->demotion.state; | |
326 | goto end; | |
327 | } | |
328 | } | |
329 | ||
4c033552 VP |
330 | #ifdef CONFIG_HOTPLUG_CPU |
331 | /* | |
332 | * Check for P_LVL2_UP flag before entering C2 and above on | |
333 | * an SMP system. We do it here instead of doing it at _CST/P_LVL | |
334 | * detection phase, to work cleanly with logical CPU hotplug. | |
335 | */ | |
336 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1e483969 DSL |
337 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) |
338 | cx = &pr->power.states[ACPI_STATE_C1]; | |
4c033552 | 339 | #endif |
1e483969 | 340 | |
1da177e4 LT |
341 | /* |
342 | * Sleep: | |
343 | * ------ | |
344 | * Invoke the current Cx state to put the processor to sleep. | |
345 | */ | |
2a298a35 | 346 | if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) { |
495ab9c0 | 347 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 NP |
348 | smp_mb__after_clear_bit(); |
349 | if (need_resched()) { | |
495ab9c0 | 350 | current_thread_info()->status |= TS_POLLING; |
af2eb17b | 351 | local_irq_enable(); |
2a298a35 NP |
352 | return; |
353 | } | |
354 | } | |
355 | ||
1da177e4 LT |
356 | switch (cx->type) { |
357 | ||
358 | case ACPI_STATE_C1: | |
359 | /* | |
360 | * Invoke C1. | |
361 | * Use the appropriate idle routine, the one that would | |
362 | * be used without acpi C-states. | |
363 | */ | |
364 | if (pm_idle_save) | |
365 | pm_idle_save(); | |
366 | else | |
64c7c8f8 NP |
367 | acpi_safe_halt(); |
368 | ||
1da177e4 | 369 | /* |
4be44fcd | 370 | * TBD: Can't get time duration while in C1, as resumes |
1da177e4 LT |
371 | * go to an ISR rather than here. Need to instrument |
372 | * base interrupt handler. | |
373 | */ | |
374 | sleep_ticks = 0xFFFFFFFF; | |
375 | break; | |
376 | ||
377 | case ACPI_STATE_C2: | |
378 | /* Get start time (ticks) */ | |
379 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
380 | /* Invoke C2 */ | |
991528d7 | 381 | acpi_cstate_enter(cx); |
1da177e4 LT |
382 | /* Get end time (ticks) */ |
383 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
539eb11e | 384 | |
385 | #ifdef CONFIG_GENERIC_TIME | |
386 | /* TSC halts in C2, so notify users */ | |
387 | mark_tsc_unstable(); | |
388 | #endif | |
1da177e4 LT |
389 | /* Re-enable interrupts */ |
390 | local_irq_enable(); | |
495ab9c0 | 391 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 392 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
393 | sleep_ticks = |
394 | ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD; | |
1da177e4 LT |
395 | break; |
396 | ||
397 | case ACPI_STATE_C3: | |
4be44fcd | 398 | |
02df8b93 VP |
399 | if (pr->flags.bm_check) { |
400 | if (atomic_inc_return(&c3_cpu_count) == | |
4be44fcd | 401 | num_online_cpus()) { |
02df8b93 VP |
402 | /* |
403 | * All CPUs are trying to go to C3 | |
404 | * Disable bus master arbitration | |
405 | */ | |
406 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, | |
4be44fcd | 407 | ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
408 | } |
409 | } else { | |
410 | /* SMP with no shared cache... Invalidate cache */ | |
411 | ACPI_FLUSH_CPU_CACHE(); | |
412 | } | |
4be44fcd | 413 | |
1da177e4 LT |
414 | /* Get start time (ticks) */ |
415 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
416 | /* Invoke C3 */ | |
991528d7 | 417 | acpi_cstate_enter(cx); |
1da177e4 LT |
418 | /* Get end time (ticks) */ |
419 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
02df8b93 VP |
420 | if (pr->flags.bm_check) { |
421 | /* Enable bus master arbitration */ | |
422 | atomic_dec(&c3_cpu_count); | |
4be44fcd LB |
423 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, |
424 | ACPI_MTX_DO_NOT_LOCK); | |
02df8b93 VP |
425 | } |
426 | ||
539eb11e | 427 | #ifdef CONFIG_GENERIC_TIME |
428 | /* TSC halts in C3, so notify users */ | |
429 | mark_tsc_unstable(); | |
430 | #endif | |
1da177e4 LT |
431 | /* Re-enable interrupts */ |
432 | local_irq_enable(); | |
495ab9c0 | 433 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 434 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
435 | sleep_ticks = |
436 | ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD; | |
1da177e4 LT |
437 | break; |
438 | ||
439 | default: | |
440 | local_irq_enable(); | |
441 | return; | |
442 | } | |
a3c6598f DB |
443 | cx->usage++; |
444 | if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0)) | |
445 | cx->time += sleep_ticks; | |
1da177e4 LT |
446 | |
447 | next_state = pr->power.state; | |
448 | ||
1e483969 DSL |
449 | #ifdef CONFIG_HOTPLUG_CPU |
450 | /* Don't do promotion/demotion */ | |
451 | if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
452 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) { | |
453 | next_state = cx; | |
454 | goto end; | |
455 | } | |
456 | #endif | |
457 | ||
1da177e4 LT |
458 | /* |
459 | * Promotion? | |
460 | * ---------- | |
461 | * Track the number of longs (time asleep is greater than threshold) | |
462 | * and promote when the count threshold is reached. Note that bus | |
463 | * mastering activity may prevent promotions. | |
464 | * Do not promote above max_cstate. | |
465 | */ | |
466 | if (cx->promotion.state && | |
467 | ((cx->promotion.state - pr->power.states) <= max_cstate)) { | |
5c87579e AV |
468 | if (sleep_ticks > cx->promotion.threshold.ticks && |
469 | cx->promotion.state->latency <= system_latency_constraint()) { | |
1da177e4 | 470 | cx->promotion.count++; |
4be44fcd LB |
471 | cx->demotion.count = 0; |
472 | if (cx->promotion.count >= | |
473 | cx->promotion.threshold.count) { | |
1da177e4 | 474 | if (pr->flags.bm_check) { |
4be44fcd LB |
475 | if (! |
476 | (pr->power.bm_activity & cx-> | |
477 | promotion.threshold.bm)) { | |
478 | next_state = | |
479 | cx->promotion.state; | |
1da177e4 LT |
480 | goto end; |
481 | } | |
4be44fcd | 482 | } else { |
1da177e4 LT |
483 | next_state = cx->promotion.state; |
484 | goto end; | |
485 | } | |
486 | } | |
487 | } | |
488 | } | |
489 | ||
490 | /* | |
491 | * Demotion? | |
492 | * --------- | |
493 | * Track the number of shorts (time asleep is less than time threshold) | |
494 | * and demote when the usage threshold is reached. | |
495 | */ | |
496 | if (cx->demotion.state) { | |
497 | if (sleep_ticks < cx->demotion.threshold.ticks) { | |
498 | cx->demotion.count++; | |
499 | cx->promotion.count = 0; | |
500 | if (cx->demotion.count >= cx->demotion.threshold.count) { | |
501 | next_state = cx->demotion.state; | |
502 | goto end; | |
503 | } | |
504 | } | |
505 | } | |
506 | ||
4be44fcd | 507 | end: |
1da177e4 LT |
508 | /* |
509 | * Demote if current state exceeds max_cstate | |
5c87579e | 510 | * or if the latency of the current state is unacceptable |
1da177e4 | 511 | */ |
5c87579e AV |
512 | if ((pr->power.state - pr->power.states) > max_cstate || |
513 | pr->power.state->latency > system_latency_constraint()) { | |
1da177e4 LT |
514 | if (cx->demotion.state) |
515 | next_state = cx->demotion.state; | |
516 | } | |
517 | ||
518 | /* | |
519 | * New Cx State? | |
520 | * ------------- | |
521 | * If we're going to start using a new Cx state we must clean up | |
522 | * from the previous and prepare to use the new. | |
523 | */ | |
524 | if (next_state != pr->power.state) | |
525 | acpi_processor_power_activate(pr, next_state); | |
1da177e4 LT |
526 | } |
527 | ||
4be44fcd | 528 | static int acpi_processor_set_power_policy(struct acpi_processor *pr) |
1da177e4 LT |
529 | { |
530 | unsigned int i; | |
531 | unsigned int state_is_set = 0; | |
532 | struct acpi_processor_cx *lower = NULL; | |
533 | struct acpi_processor_cx *higher = NULL; | |
534 | struct acpi_processor_cx *cx; | |
535 | ||
1da177e4 LT |
536 | |
537 | if (!pr) | |
d550d98d | 538 | return -EINVAL; |
1da177e4 LT |
539 | |
540 | /* | |
541 | * This function sets the default Cx state policy (OS idle handler). | |
542 | * Our scheme is to promote quickly to C2 but more conservatively | |
543 | * to C3. We're favoring C2 for its characteristics of low latency | |
544 | * (quick response), good power savings, and ability to allow bus | |
545 | * mastering activity. Note that the Cx state policy is completely | |
546 | * customizable and can be altered dynamically. | |
547 | */ | |
548 | ||
549 | /* startup state */ | |
4be44fcd | 550 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
551 | cx = &pr->power.states[i]; |
552 | if (!cx->valid) | |
553 | continue; | |
554 | ||
555 | if (!state_is_set) | |
556 | pr->power.state = cx; | |
557 | state_is_set++; | |
558 | break; | |
4be44fcd | 559 | } |
1da177e4 LT |
560 | |
561 | if (!state_is_set) | |
d550d98d | 562 | return -ENODEV; |
1da177e4 LT |
563 | |
564 | /* demotion */ | |
4be44fcd | 565 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
566 | cx = &pr->power.states[i]; |
567 | if (!cx->valid) | |
568 | continue; | |
569 | ||
570 | if (lower) { | |
571 | cx->demotion.state = lower; | |
572 | cx->demotion.threshold.ticks = cx->latency_ticks; | |
573 | cx->demotion.threshold.count = 1; | |
574 | if (cx->type == ACPI_STATE_C3) | |
575 | cx->demotion.threshold.bm = bm_history; | |
576 | } | |
577 | ||
578 | lower = cx; | |
579 | } | |
580 | ||
581 | /* promotion */ | |
582 | for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) { | |
583 | cx = &pr->power.states[i]; | |
584 | if (!cx->valid) | |
585 | continue; | |
586 | ||
587 | if (higher) { | |
4be44fcd | 588 | cx->promotion.state = higher; |
1da177e4 LT |
589 | cx->promotion.threshold.ticks = cx->latency_ticks; |
590 | if (cx->type >= ACPI_STATE_C2) | |
591 | cx->promotion.threshold.count = 4; | |
592 | else | |
593 | cx->promotion.threshold.count = 10; | |
594 | if (higher->type == ACPI_STATE_C3) | |
595 | cx->promotion.threshold.bm = bm_history; | |
596 | } | |
597 | ||
598 | higher = cx; | |
599 | } | |
600 | ||
d550d98d | 601 | return 0; |
1da177e4 LT |
602 | } |
603 | ||
4be44fcd | 604 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 605 | { |
1da177e4 LT |
606 | |
607 | if (!pr) | |
d550d98d | 608 | return -EINVAL; |
1da177e4 LT |
609 | |
610 | if (!pr->pblk) | |
d550d98d | 611 | return -ENODEV; |
1da177e4 | 612 | |
1da177e4 | 613 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
614 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
615 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
616 | ||
4c033552 VP |
617 | #ifndef CONFIG_HOTPLUG_CPU |
618 | /* | |
619 | * Check for P_LVL2_UP flag before entering C2 and above on | |
620 | * an SMP system. | |
621 | */ | |
1e483969 | 622 | if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up) |
d550d98d | 623 | return -ENODEV; |
4c033552 VP |
624 | #endif |
625 | ||
1da177e4 LT |
626 | /* determine C2 and C3 address from pblk */ |
627 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
628 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
629 | ||
630 | /* determine latencies from FADT */ | |
631 | pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat; | |
632 | pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat; | |
633 | ||
634 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
635 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
636 | pr->power.states[ACPI_STATE_C2].address, | |
637 | pr->power.states[ACPI_STATE_C3].address)); | |
638 | ||
d550d98d | 639 | return 0; |
1da177e4 LT |
640 | } |
641 | ||
991528d7 | 642 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 643 | { |
991528d7 VP |
644 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
645 | /* set the first C-State to C1 */ | |
646 | /* all processors need to support C1 */ | |
647 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
648 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
649 | } | |
650 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 651 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 652 | return 0; |
acf05f4b VP |
653 | } |
654 | ||
4be44fcd | 655 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 656 | { |
4be44fcd LB |
657 | acpi_status status = 0; |
658 | acpi_integer count; | |
cf824788 | 659 | int current_count; |
4be44fcd LB |
660 | int i; |
661 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
662 | union acpi_object *cst; | |
1da177e4 | 663 | |
1da177e4 | 664 | |
1da177e4 | 665 | if (nocst) |
d550d98d | 666 | return -ENODEV; |
1da177e4 | 667 | |
991528d7 | 668 | current_count = 0; |
1da177e4 LT |
669 | |
670 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
671 | if (ACPI_FAILURE(status)) { | |
672 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 673 | return -ENODEV; |
4be44fcd | 674 | } |
1da177e4 | 675 | |
4be44fcd | 676 | cst = (union acpi_object *)buffer.pointer; |
1da177e4 LT |
677 | |
678 | /* There must be at least 2 elements */ | |
679 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 680 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
681 | status = -EFAULT; |
682 | goto end; | |
683 | } | |
684 | ||
685 | count = cst->package.elements[0].integer.value; | |
686 | ||
687 | /* Validate number of power states. */ | |
688 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 689 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
690 | status = -EFAULT; |
691 | goto end; | |
692 | } | |
693 | ||
1da177e4 LT |
694 | /* Tell driver that at least _CST is supported. */ |
695 | pr->flags.has_cst = 1; | |
696 | ||
697 | for (i = 1; i <= count; i++) { | |
698 | union acpi_object *element; | |
699 | union acpi_object *obj; | |
700 | struct acpi_power_register *reg; | |
701 | struct acpi_processor_cx cx; | |
702 | ||
703 | memset(&cx, 0, sizeof(cx)); | |
704 | ||
4be44fcd | 705 | element = (union acpi_object *)&(cst->package.elements[i]); |
1da177e4 LT |
706 | if (element->type != ACPI_TYPE_PACKAGE) |
707 | continue; | |
708 | ||
709 | if (element->package.count != 4) | |
710 | continue; | |
711 | ||
4be44fcd | 712 | obj = (union acpi_object *)&(element->package.elements[0]); |
1da177e4 LT |
713 | |
714 | if (obj->type != ACPI_TYPE_BUFFER) | |
715 | continue; | |
716 | ||
4be44fcd | 717 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
718 | |
719 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 720 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
721 | continue; |
722 | ||
1da177e4 | 723 | /* There should be an easy way to extract an integer... */ |
4be44fcd | 724 | obj = (union acpi_object *)&(element->package.elements[1]); |
1da177e4 LT |
725 | if (obj->type != ACPI_TYPE_INTEGER) |
726 | continue; | |
727 | ||
728 | cx.type = obj->integer.value; | |
991528d7 VP |
729 | /* |
730 | * Some buggy BIOSes won't list C1 in _CST - | |
731 | * Let acpi_processor_get_power_info_default() handle them later | |
732 | */ | |
733 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
734 | current_count++; | |
735 | ||
736 | cx.address = reg->address; | |
737 | cx.index = current_count + 1; | |
738 | ||
739 | cx.space_id = ACPI_CSTATE_SYSTEMIO; | |
740 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { | |
741 | if (acpi_processor_ffh_cstate_probe | |
742 | (pr->id, &cx, reg) == 0) { | |
743 | cx.space_id = ACPI_CSTATE_FFH; | |
744 | } else if (cx.type != ACPI_STATE_C1) { | |
745 | /* | |
746 | * C1 is a special case where FIXED_HARDWARE | |
747 | * can be handled in non-MWAIT way as well. | |
748 | * In that case, save this _CST entry info. | |
749 | * That is, we retain space_id of SYSTEM_IO for | |
750 | * halt based C1. | |
751 | * Otherwise, ignore this info and continue. | |
752 | */ | |
753 | continue; | |
754 | } | |
755 | } | |
1da177e4 | 756 | |
4be44fcd | 757 | obj = (union acpi_object *)&(element->package.elements[2]); |
1da177e4 LT |
758 | if (obj->type != ACPI_TYPE_INTEGER) |
759 | continue; | |
760 | ||
761 | cx.latency = obj->integer.value; | |
762 | ||
4be44fcd | 763 | obj = (union acpi_object *)&(element->package.elements[3]); |
1da177e4 LT |
764 | if (obj->type != ACPI_TYPE_INTEGER) |
765 | continue; | |
766 | ||
767 | cx.power = obj->integer.value; | |
768 | ||
cf824788 JM |
769 | current_count++; |
770 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
771 | ||
772 | /* | |
773 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
774 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
775 | */ | |
776 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
777 | printk(KERN_WARNING | |
778 | "Limiting number of power states to max (%d)\n", | |
779 | ACPI_PROCESSOR_MAX_POWER); | |
780 | printk(KERN_WARNING | |
781 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
782 | break; | |
783 | } | |
1da177e4 LT |
784 | } |
785 | ||
4be44fcd | 786 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 787 | current_count)); |
1da177e4 LT |
788 | |
789 | /* Validate number of power states discovered */ | |
cf824788 | 790 | if (current_count < 2) |
6d93c648 | 791 | status = -EFAULT; |
1da177e4 | 792 | |
4be44fcd | 793 | end: |
02438d87 | 794 | kfree(buffer.pointer); |
1da177e4 | 795 | |
d550d98d | 796 | return status; |
1da177e4 LT |
797 | } |
798 | ||
1da177e4 LT |
799 | static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx) |
800 | { | |
1da177e4 LT |
801 | |
802 | if (!cx->address) | |
d550d98d | 803 | return; |
1da177e4 LT |
804 | |
805 | /* | |
806 | * C2 latency must be less than or equal to 100 | |
807 | * microseconds. | |
808 | */ | |
809 | else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { | |
810 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 811 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 812 | return; |
1da177e4 LT |
813 | } |
814 | ||
1da177e4 LT |
815 | /* |
816 | * Otherwise we've met all of our C2 requirements. | |
817 | * Normalize the C2 latency to expidite policy | |
818 | */ | |
819 | cx->valid = 1; | |
820 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
821 | ||
d550d98d | 822 | return; |
1da177e4 LT |
823 | } |
824 | ||
4be44fcd LB |
825 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
826 | struct acpi_processor_cx *cx) | |
1da177e4 | 827 | { |
02df8b93 VP |
828 | static int bm_check_flag; |
829 | ||
1da177e4 LT |
830 | |
831 | if (!cx->address) | |
d550d98d | 832 | return; |
1da177e4 LT |
833 | |
834 | /* | |
835 | * C3 latency must be less than or equal to 1000 | |
836 | * microseconds. | |
837 | */ | |
838 | else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { | |
839 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 840 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 841 | return; |
1da177e4 LT |
842 | } |
843 | ||
1da177e4 LT |
844 | /* |
845 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
846 | * DMA transfers are used by any ISA device to avoid livelock. | |
847 | * Note that we could disable Type-F DMA (as recommended by | |
848 | * the erratum), but this is known to disrupt certain ISA | |
849 | * devices thus we take the conservative approach. | |
850 | */ | |
851 | else if (errata.piix4.fdma) { | |
852 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 853 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 854 | return; |
1da177e4 LT |
855 | } |
856 | ||
02df8b93 VP |
857 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
858 | if (!bm_check_flag) { | |
859 | /* Determine whether bm_check is needed based on CPU */ | |
860 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
861 | bm_check_flag = pr->flags.bm_check; | |
862 | } else { | |
863 | pr->flags.bm_check = bm_check_flag; | |
864 | } | |
865 | ||
866 | if (pr->flags.bm_check) { | |
02df8b93 VP |
867 | /* bus mastering control is necessary */ |
868 | if (!pr->flags.bm_control) { | |
869 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 870 | "C3 support requires bus mastering control\n")); |
d550d98d | 871 | return; |
02df8b93 VP |
872 | } |
873 | } else { | |
02df8b93 VP |
874 | /* |
875 | * WBINVD should be set in fadt, for C3 state to be | |
876 | * supported on when bm_check is not required. | |
877 | */ | |
878 | if (acpi_fadt.wb_invd != 1) { | |
879 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd LB |
880 | "Cache invalidation should work properly" |
881 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 882 | return; |
02df8b93 VP |
883 | } |
884 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, | |
4be44fcd | 885 | 0, ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
886 | } |
887 | ||
1da177e4 LT |
888 | /* |
889 | * Otherwise we've met all of our C3 requirements. | |
890 | * Normalize the C3 latency to expidite policy. Enable | |
891 | * checking of bus mastering status (bm_check) so we can | |
892 | * use this in our C3 policy | |
893 | */ | |
894 | cx->valid = 1; | |
895 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
1da177e4 | 896 | |
d550d98d | 897 | return; |
1da177e4 LT |
898 | } |
899 | ||
1da177e4 LT |
900 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
901 | { | |
902 | unsigned int i; | |
903 | unsigned int working = 0; | |
6eb0a0fd | 904 | |
bd663347 | 905 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
0b5c59a1 AK |
906 | int timer_broadcast = 0; |
907 | cpumask_t mask = cpumask_of_cpu(pr->id); | |
bd663347 | 908 | on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1); |
6eb0a0fd VP |
909 | #endif |
910 | ||
4be44fcd | 911 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
912 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
913 | ||
914 | switch (cx->type) { | |
915 | case ACPI_STATE_C1: | |
916 | cx->valid = 1; | |
917 | break; | |
918 | ||
919 | case ACPI_STATE_C2: | |
920 | acpi_processor_power_verify_c2(cx); | |
bd663347 AK |
921 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
922 | /* Some AMD systems fake C3 as C2, but still | |
923 | have timer troubles */ | |
924 | if (cx->valid && | |
925 | boot_cpu_data.x86_vendor == X86_VENDOR_AMD) | |
926 | timer_broadcast++; | |
927 | #endif | |
1da177e4 LT |
928 | break; |
929 | ||
930 | case ACPI_STATE_C3: | |
931 | acpi_processor_power_verify_c3(pr, cx); | |
6eb0a0fd | 932 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
933 | if (cx->valid) |
934 | timer_broadcast++; | |
6eb0a0fd | 935 | #endif |
1da177e4 LT |
936 | break; |
937 | } | |
938 | ||
939 | if (cx->valid) | |
940 | working++; | |
941 | } | |
bd663347 | 942 | |
0b5c59a1 | 943 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
944 | if (timer_broadcast) |
945 | on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1); | |
0b5c59a1 | 946 | #endif |
1da177e4 LT |
947 | |
948 | return (working); | |
949 | } | |
950 | ||
4be44fcd | 951 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
952 | { |
953 | unsigned int i; | |
954 | int result; | |
955 | ||
1da177e4 LT |
956 | |
957 | /* NOTE: the idle thread may not be running while calling | |
958 | * this function */ | |
959 | ||
991528d7 VP |
960 | /* Zero initialize all the C-states info. */ |
961 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
962 | ||
1da177e4 | 963 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 964 | if (result == -ENODEV) |
cf824788 | 965 | acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 966 | |
991528d7 VP |
967 | if (result) |
968 | return result; | |
969 | ||
970 | acpi_processor_get_power_info_default(pr); | |
971 | ||
cf824788 | 972 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 LT |
973 | |
974 | /* | |
975 | * Set Default Policy | |
976 | * ------------------ | |
977 | * Now that we know which states are supported, set the default | |
978 | * policy. Note that this policy can be changed dynamically | |
979 | * (e.g. encourage deeper sleeps to conserve battery life when | |
980 | * not on AC). | |
981 | */ | |
982 | result = acpi_processor_set_power_policy(pr); | |
983 | if (result) | |
d550d98d | 984 | return result; |
1da177e4 LT |
985 | |
986 | /* | |
987 | * if one state of type C2 or C3 is available, mark this | |
988 | * CPU as being "idle manageable" | |
989 | */ | |
990 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 991 | if (pr->power.states[i].valid) { |
1da177e4 | 992 | pr->power.count = i; |
2203d6ed LT |
993 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
994 | pr->flags.power = 1; | |
acf05f4b | 995 | } |
1da177e4 LT |
996 | } |
997 | ||
d550d98d | 998 | return 0; |
1da177e4 LT |
999 | } |
1000 | ||
4be44fcd | 1001 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1da177e4 | 1002 | { |
4be44fcd | 1003 | int result = 0; |
1da177e4 | 1004 | |
1da177e4 LT |
1005 | |
1006 | if (!pr) | |
d550d98d | 1007 | return -EINVAL; |
1da177e4 | 1008 | |
4be44fcd | 1009 | if (nocst) { |
d550d98d | 1010 | return -ENODEV; |
1da177e4 LT |
1011 | } |
1012 | ||
1013 | if (!pr->flags.power_setup_done) | |
d550d98d | 1014 | return -ENODEV; |
1da177e4 LT |
1015 | |
1016 | /* Fall back to the default idle loop */ | |
1017 | pm_idle = pm_idle_save; | |
4be44fcd | 1018 | synchronize_sched(); /* Relies on interrupts forcing exit from idle. */ |
1da177e4 LT |
1019 | |
1020 | pr->flags.power = 0; | |
1021 | result = acpi_processor_get_power_info(pr); | |
1022 | if ((pr->flags.power == 1) && (pr->flags.power_setup_done)) | |
1023 | pm_idle = acpi_processor_idle; | |
1024 | ||
d550d98d | 1025 | return result; |
1da177e4 LT |
1026 | } |
1027 | ||
1028 | /* proc interface */ | |
1029 | ||
1030 | static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset) | |
1031 | { | |
4be44fcd LB |
1032 | struct acpi_processor *pr = (struct acpi_processor *)seq->private; |
1033 | unsigned int i; | |
1da177e4 | 1034 | |
1da177e4 LT |
1035 | |
1036 | if (!pr) | |
1037 | goto end; | |
1038 | ||
1039 | seq_printf(seq, "active state: C%zd\n" | |
4be44fcd | 1040 | "max_cstate: C%d\n" |
5c87579e AV |
1041 | "bus master activity: %08x\n" |
1042 | "maximum allowed latency: %d usec\n", | |
4be44fcd | 1043 | pr->power.state ? pr->power.state - pr->power.states : 0, |
5c87579e AV |
1044 | max_cstate, (unsigned)pr->power.bm_activity, |
1045 | system_latency_constraint()); | |
1da177e4 LT |
1046 | |
1047 | seq_puts(seq, "states:\n"); | |
1048 | ||
1049 | for (i = 1; i <= pr->power.count; i++) { | |
1050 | seq_printf(seq, " %cC%d: ", | |
4be44fcd LB |
1051 | (&pr->power.states[i] == |
1052 | pr->power.state ? '*' : ' '), i); | |
1da177e4 LT |
1053 | |
1054 | if (!pr->power.states[i].valid) { | |
1055 | seq_puts(seq, "<not supported>\n"); | |
1056 | continue; | |
1057 | } | |
1058 | ||
1059 | switch (pr->power.states[i].type) { | |
1060 | case ACPI_STATE_C1: | |
1061 | seq_printf(seq, "type[C1] "); | |
1062 | break; | |
1063 | case ACPI_STATE_C2: | |
1064 | seq_printf(seq, "type[C2] "); | |
1065 | break; | |
1066 | case ACPI_STATE_C3: | |
1067 | seq_printf(seq, "type[C3] "); | |
1068 | break; | |
1069 | default: | |
1070 | seq_printf(seq, "type[--] "); | |
1071 | break; | |
1072 | } | |
1073 | ||
1074 | if (pr->power.states[i].promotion.state) | |
1075 | seq_printf(seq, "promotion[C%zd] ", | |
4be44fcd LB |
1076 | (pr->power.states[i].promotion.state - |
1077 | pr->power.states)); | |
1da177e4 LT |
1078 | else |
1079 | seq_puts(seq, "promotion[--] "); | |
1080 | ||
1081 | if (pr->power.states[i].demotion.state) | |
1082 | seq_printf(seq, "demotion[C%zd] ", | |
4be44fcd LB |
1083 | (pr->power.states[i].demotion.state - |
1084 | pr->power.states)); | |
1da177e4 LT |
1085 | else |
1086 | seq_puts(seq, "demotion[--] "); | |
1087 | ||
a3c6598f | 1088 | seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n", |
4be44fcd | 1089 | pr->power.states[i].latency, |
a3c6598f DB |
1090 | pr->power.states[i].usage, |
1091 | pr->power.states[i].time); | |
1da177e4 LT |
1092 | } |
1093 | ||
4be44fcd | 1094 | end: |
d550d98d | 1095 | return 0; |
1da177e4 LT |
1096 | } |
1097 | ||
1098 | static int acpi_processor_power_open_fs(struct inode *inode, struct file *file) | |
1099 | { | |
1100 | return single_open(file, acpi_processor_power_seq_show, | |
4be44fcd | 1101 | PDE(inode)->data); |
1da177e4 LT |
1102 | } |
1103 | ||
d7508032 | 1104 | static const struct file_operations acpi_processor_power_fops = { |
4be44fcd LB |
1105 | .open = acpi_processor_power_open_fs, |
1106 | .read = seq_read, | |
1107 | .llseek = seq_lseek, | |
1108 | .release = single_release, | |
1da177e4 LT |
1109 | }; |
1110 | ||
5c87579e AV |
1111 | static void smp_callback(void *v) |
1112 | { | |
1113 | /* we already woke the CPU up, nothing more to do */ | |
1114 | } | |
1115 | ||
1116 | /* | |
1117 | * This function gets called when a part of the kernel has a new latency | |
1118 | * requirement. This means we need to get all processors out of their C-state, | |
1119 | * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that | |
1120 | * wakes them all right up. | |
1121 | */ | |
1122 | static int acpi_processor_latency_notify(struct notifier_block *b, | |
1123 | unsigned long l, void *v) | |
1124 | { | |
1125 | smp_call_function(smp_callback, NULL, 0, 1); | |
1126 | return NOTIFY_OK; | |
1127 | } | |
1128 | ||
1129 | static struct notifier_block acpi_processor_latency_notifier = { | |
1130 | .notifier_call = acpi_processor_latency_notify, | |
1131 | }; | |
1132 | ||
7af8b660 | 1133 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr, |
4be44fcd | 1134 | struct acpi_device *device) |
1da177e4 | 1135 | { |
4be44fcd | 1136 | acpi_status status = 0; |
b6835052 | 1137 | static int first_run; |
4be44fcd | 1138 | struct proc_dir_entry *entry = NULL; |
1da177e4 LT |
1139 | unsigned int i; |
1140 | ||
1da177e4 LT |
1141 | |
1142 | if (!first_run) { | |
1143 | dmi_check_system(processor_power_dmi_table); | |
1144 | if (max_cstate < ACPI_C_STATES_MAX) | |
4be44fcd LB |
1145 | printk(KERN_NOTICE |
1146 | "ACPI: processor limited to max C-state %d\n", | |
1147 | max_cstate); | |
1da177e4 | 1148 | first_run++; |
5c87579e | 1149 | register_latency_notifier(&acpi_processor_latency_notifier); |
1da177e4 LT |
1150 | } |
1151 | ||
02df8b93 | 1152 | if (!pr) |
d550d98d | 1153 | return -EINVAL; |
02df8b93 VP |
1154 | |
1155 | if (acpi_fadt.cst_cnt && !nocst) { | |
4be44fcd LB |
1156 | status = |
1157 | acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8); | |
1da177e4 | 1158 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1159 | ACPI_EXCEPTION((AE_INFO, status, |
1160 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1161 | } |
1162 | } | |
1163 | ||
1164 | acpi_processor_get_power_info(pr); | |
1165 | ||
1166 | /* | |
1167 | * Install the idle handler if processor power management is supported. | |
1168 | * Note that we use previously set idle handler will be used on | |
1169 | * platforms that only support C1. | |
1170 | */ | |
1171 | if ((pr->flags.power) && (!boot_option_idle_override)) { | |
1172 | printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id); | |
1173 | for (i = 1; i <= pr->power.count; i++) | |
1174 | if (pr->power.states[i].valid) | |
4be44fcd LB |
1175 | printk(" C%d[C%d]", i, |
1176 | pr->power.states[i].type); | |
1da177e4 LT |
1177 | printk(")\n"); |
1178 | ||
1179 | if (pr->id == 0) { | |
1180 | pm_idle_save = pm_idle; | |
1181 | pm_idle = acpi_processor_idle; | |
1182 | } | |
1183 | } | |
1184 | ||
1185 | /* 'power' [R] */ | |
1186 | entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER, | |
4be44fcd | 1187 | S_IRUGO, acpi_device_dir(device)); |
1da177e4 | 1188 | if (!entry) |
a6fc6720 | 1189 | return -EIO; |
1da177e4 LT |
1190 | else { |
1191 | entry->proc_fops = &acpi_processor_power_fops; | |
1192 | entry->data = acpi_driver_data(device); | |
1193 | entry->owner = THIS_MODULE; | |
1194 | } | |
1195 | ||
1196 | pr->flags.power_setup_done = 1; | |
1197 | ||
d550d98d | 1198 | return 0; |
1da177e4 LT |
1199 | } |
1200 | ||
4be44fcd LB |
1201 | int acpi_processor_power_exit(struct acpi_processor *pr, |
1202 | struct acpi_device *device) | |
1da177e4 | 1203 | { |
1da177e4 LT |
1204 | |
1205 | pr->flags.power_setup_done = 0; | |
1206 | ||
1207 | if (acpi_device_dir(device)) | |
4be44fcd LB |
1208 | remove_proc_entry(ACPI_PROCESSOR_FILE_POWER, |
1209 | acpi_device_dir(device)); | |
1da177e4 LT |
1210 | |
1211 | /* Unregister the idle handler when processor #0 is removed. */ | |
1212 | if (pr->id == 0) { | |
1213 | pm_idle = pm_idle_save; | |
1214 | ||
1215 | /* | |
1216 | * We are about to unload the current idle thread pm callback | |
1217 | * (pm_idle), Wait for all processors to update cached/local | |
1218 | * copies of pm_idle before proceeding. | |
1219 | */ | |
1220 | cpu_idle_wait(); | |
5c87579e | 1221 | unregister_latency_notifier(&acpi_processor_latency_notifier); |
1da177e4 LT |
1222 | } |
1223 | ||
d550d98d | 1224 | return 0; |
1da177e4 | 1225 | } |