cpuidle / ACPI: remove usage from acpi_processor_cx structure
[deliverable/linux.git] / drivers / acpi / processor_idle.c
CommitLineData
1da177e4
LT
1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
c5ab81ca 6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
1da177e4
LT
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
02df8b93
VP
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
1da177e4
LT
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
5a0e3ad6 35#include <linux/slab.h>
1da177e4
LT
36#include <linux/acpi.h>
37#include <linux/dmi.h>
38#include <linux/moduleparam.h>
4e57b681 39#include <linux/sched.h> /* need_resched() */
e8db0be1 40#include <linux/pm_qos.h>
e9e2cdb4 41#include <linux/clockchips.h>
4f86d3a8 42#include <linux/cpuidle.h>
ba84be23 43#include <linux/irqflags.h>
1da177e4 44
3434933b
TG
45/*
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50 */
51#ifdef CONFIG_X86
52#include <asm/apic.h>
53#endif
54
1da177e4
LT
55#include <asm/io.h>
56#include <asm/uaccess.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/processor.h>
c1e3b377 60#include <asm/processor.h>
1da177e4 61
a192a958
LB
62#define PREFIX "ACPI: "
63
1da177e4 64#define ACPI_PROCESSOR_CLASS "processor"
1da177e4 65#define _COMPONENT ACPI_PROCESSOR_COMPONENT
f52fd66d 66ACPI_MODULE_NAME("processor_idle");
2aa44d05 67#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
4f86d3a8
LB
68#define C2_OVERHEAD 1 /* 1us */
69#define C3_OVERHEAD 1 /* 1us */
4f86d3a8 70#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
1da177e4 71
4f86d3a8
LB
72static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73module_param(max_cstate, uint, 0000);
b6835052 74static unsigned int nocst __read_mostly;
1da177e4 75module_param(nocst, uint, 0000);
d3e7e99f
LB
76static int bm_check_disable __read_mostly;
77module_param(bm_check_disable, uint, 0000);
1da177e4 78
25de5718 79static unsigned int latency_factor __read_mostly = 2;
4963f620 80module_param(latency_factor, uint, 0644);
1da177e4 81
d1896049
TR
82static int disabled_by_idle_boot_param(void)
83{
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
87}
88
1da177e4
LT
89/*
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
92 *
93 * To skip this limit, boot/load with a large max_cstate limit.
94 */
1855256c 95static int set_max_cstate(const struct dmi_system_id *id)
1da177e4
LT
96{
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0;
99
3d35600a 100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
4be44fcd
LB
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
1da177e4 103
3d35600a 104 max_cstate = (long)id->driver_data;
1da177e4
LT
105
106 return 0;
107}
108
7ded5689
AR
109/* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
876c184b
TR
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
4be44fcd 115 (void *)2},
370d5cd8
AV
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119 (void *)1},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123 (void *)1},
1da177e4
LT
124 {},
125};
126
4f86d3a8 127
2e906655 128/*
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
131 */
ddc081a1
VP
132static void acpi_safe_halt(void)
133{
134 current_thread_info()->status &= ~TS_POLLING;
135 /*
136 * TS_POLLING-cleared state must be visible before we
137 * test NEED_RESCHED:
138 */
139 smp_mb();
71e93d15 140 if (!need_resched()) {
ddc081a1 141 safe_halt();
71e93d15
VP
142 local_irq_disable();
143 }
ddc081a1
VP
144 current_thread_info()->status |= TS_POLLING;
145}
146
169a0abb
TG
147#ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149/*
150 * Some BIOS implementations switch to C3 in the published C2 state.
296d93cd
LT
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
169a0abb 154 */
7e275cc4 155static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb
TG
156 struct acpi_processor_cx *cx)
157{
158 struct acpi_processor_power *pwr = &pr->power;
e585bef8 159 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
169a0abb 160
db954b58
VP
161 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162 return;
163
02c68a02 164 if (amd_e400_c1e_detected)
87ad57ba
SL
165 type = ACPI_STATE_C1;
166
169a0abb
TG
167 /*
168 * Check, if one of the previous states already marked the lapic
169 * unstable
170 */
171 if (pwr->timer_broadcast_on_state < state)
172 return;
173
e585bef8 174 if (cx->type >= type)
296d93cd 175 pr->power.timer_broadcast_on_state = state;
169a0abb
TG
176}
177
918aae42 178static void __lapic_timer_propagate_broadcast(void *arg)
169a0abb 179{
f833bab8 180 struct acpi_processor *pr = (struct acpi_processor *) arg;
e9e2cdb4
TG
181 unsigned long reason;
182
183 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186 clockevents_notify(reason, &pr->id);
e9e2cdb4
TG
187}
188
918aae42
HS
189static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190{
191 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192 (void *)pr, 1);
193}
194
e9e2cdb4 195/* Power(C) State timer broadcast control */
7e275cc4 196static void lapic_timer_state_broadcast(struct acpi_processor *pr,
e9e2cdb4
TG
197 struct acpi_processor_cx *cx,
198 int broadcast)
199{
e9e2cdb4
TG
200 int state = cx - pr->power.states;
201
202 if (state >= pr->power.timer_broadcast_on_state) {
203 unsigned long reason;
204
205 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207 clockevents_notify(reason, &pr->id);
208 }
169a0abb
TG
209}
210
211#else
212
7e275cc4 213static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb 214 struct acpi_processor_cx *cstate) { }
7e275cc4
LB
215static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216static void lapic_timer_state_broadcast(struct acpi_processor *pr,
e9e2cdb4
TG
217 struct acpi_processor_cx *cx,
218 int broadcast)
219{
220}
169a0abb
TG
221
222#endif
223
815ab0fd
LB
224static u32 saved_bm_rld;
225
226static void acpi_idle_bm_rld_save(void)
227{
228 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
229}
230static void acpi_idle_bm_rld_restore(void)
231{
232 u32 resumed_bm_rld;
233
234 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
235
236 if (resumed_bm_rld != saved_bm_rld)
237 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
238}
b04e7bdb
TG
239
240int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
241{
815ab0fd 242 acpi_idle_bm_rld_save();
b04e7bdb
TG
243 return 0;
244}
245
246int acpi_processor_resume(struct acpi_device * device)
247{
815ab0fd 248 acpi_idle_bm_rld_restore();
b04e7bdb
TG
249 return 0;
250}
251
592913ec 252#if defined(CONFIG_X86)
520daf72 253static void tsc_check_state(int state)
ddb25f9a
AK
254{
255 switch (boot_cpu_data.x86_vendor) {
256 case X86_VENDOR_AMD:
40fb1715 257 case X86_VENDOR_INTEL:
ddb25f9a
AK
258 /*
259 * AMD Fam10h TSC will tick in all
260 * C/P/S0/S1 states when this bit is set.
261 */
40fb1715 262 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
520daf72 263 return;
40fb1715 264
ddb25f9a 265 /*FALL THROUGH*/
ddb25f9a 266 default:
520daf72
LB
267 /* TSC could halt in idle, so notify users */
268 if (state > ACPI_STATE_C1)
269 mark_tsc_unstable("TSC halts in idle");
ddb25f9a
AK
270 }
271}
520daf72
LB
272#else
273static void tsc_check_state(int state) { return; }
ddb25f9a
AK
274#endif
275
4be44fcd 276static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
1da177e4 277{
1da177e4
LT
278
279 if (!pr)
d550d98d 280 return -EINVAL;
1da177e4
LT
281
282 if (!pr->pblk)
d550d98d 283 return -ENODEV;
1da177e4 284
1da177e4 285 /* if info is obtained from pblk/fadt, type equals state */
1da177e4
LT
286 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
287 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
288
4c033552
VP
289#ifndef CONFIG_HOTPLUG_CPU
290 /*
291 * Check for P_LVL2_UP flag before entering C2 and above on
4f86d3a8 292 * an SMP system.
4c033552 293 */
ad71860a 294 if ((num_online_cpus() > 1) &&
cee324b1 295 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
d550d98d 296 return -ENODEV;
4c033552
VP
297#endif
298
1da177e4
LT
299 /* determine C2 and C3 address from pblk */
300 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
301 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
302
303 /* determine latencies from FADT */
cee324b1
AS
304 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
305 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
1da177e4 306
5d76b6f6
LB
307 /*
308 * FADT specified C2 latency must be less than or equal to
309 * 100 microseconds.
310 */
311 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
312 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
313 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
314 /* invalidate C2 */
315 pr->power.states[ACPI_STATE_C2].address = 0;
316 }
317
a6d72c18
LB
318 /*
319 * FADT supplied C3 latency must be less than or equal to
320 * 1000 microseconds.
321 */
322 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
323 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
324 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
325 /* invalidate C3 */
326 pr->power.states[ACPI_STATE_C3].address = 0;
327 }
328
1da177e4
LT
329 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
330 "lvl2[0x%08x] lvl3[0x%08x]\n",
331 pr->power.states[ACPI_STATE_C2].address,
332 pr->power.states[ACPI_STATE_C3].address));
333
d550d98d 334 return 0;
1da177e4
LT
335}
336
991528d7 337static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
acf05f4b 338{
991528d7
VP
339 if (!pr->power.states[ACPI_STATE_C1].valid) {
340 /* set the first C-State to C1 */
341 /* all processors need to support C1 */
342 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
343 pr->power.states[ACPI_STATE_C1].valid = 1;
0fda6b40 344 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
991528d7
VP
345 }
346 /* the C0 state only exists as a filler in our array */
acf05f4b 347 pr->power.states[ACPI_STATE_C0].valid = 1;
d550d98d 348 return 0;
acf05f4b
VP
349}
350
4be44fcd 351static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
1da177e4 352{
4be44fcd 353 acpi_status status = 0;
439913ff 354 u64 count;
cf824788 355 int current_count;
4be44fcd
LB
356 int i;
357 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
358 union acpi_object *cst;
1da177e4 359
1da177e4 360
1da177e4 361 if (nocst)
d550d98d 362 return -ENODEV;
1da177e4 363
991528d7 364 current_count = 0;
1da177e4
LT
365
366 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
367 if (ACPI_FAILURE(status)) {
368 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
d550d98d 369 return -ENODEV;
4be44fcd 370 }
1da177e4 371
50dd0969 372 cst = buffer.pointer;
1da177e4
LT
373
374 /* There must be at least 2 elements */
375 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
6468463a 376 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
1da177e4
LT
377 status = -EFAULT;
378 goto end;
379 }
380
381 count = cst->package.elements[0].integer.value;
382
383 /* Validate number of power states. */
384 if (count < 1 || count != cst->package.count - 1) {
6468463a 385 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
1da177e4
LT
386 status = -EFAULT;
387 goto end;
388 }
389
1da177e4
LT
390 /* Tell driver that at least _CST is supported. */
391 pr->flags.has_cst = 1;
392
393 for (i = 1; i <= count; i++) {
394 union acpi_object *element;
395 union acpi_object *obj;
396 struct acpi_power_register *reg;
397 struct acpi_processor_cx cx;
398
399 memset(&cx, 0, sizeof(cx));
400
50dd0969 401 element = &(cst->package.elements[i]);
1da177e4
LT
402 if (element->type != ACPI_TYPE_PACKAGE)
403 continue;
404
405 if (element->package.count != 4)
406 continue;
407
50dd0969 408 obj = &(element->package.elements[0]);
1da177e4
LT
409
410 if (obj->type != ACPI_TYPE_BUFFER)
411 continue;
412
4be44fcd 413 reg = (struct acpi_power_register *)obj->buffer.pointer;
1da177e4
LT
414
415 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
4be44fcd 416 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
1da177e4
LT
417 continue;
418
1da177e4 419 /* There should be an easy way to extract an integer... */
50dd0969 420 obj = &(element->package.elements[1]);
1da177e4
LT
421 if (obj->type != ACPI_TYPE_INTEGER)
422 continue;
423
424 cx.type = obj->integer.value;
991528d7
VP
425 /*
426 * Some buggy BIOSes won't list C1 in _CST -
427 * Let acpi_processor_get_power_info_default() handle them later
428 */
429 if (i == 1 && cx.type != ACPI_STATE_C1)
430 current_count++;
431
432 cx.address = reg->address;
433 cx.index = current_count + 1;
434
bc71bec9 435 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
991528d7
VP
436 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
437 if (acpi_processor_ffh_cstate_probe
438 (pr->id, &cx, reg) == 0) {
bc71bec9 439 cx.entry_method = ACPI_CSTATE_FFH;
440 } else if (cx.type == ACPI_STATE_C1) {
991528d7
VP
441 /*
442 * C1 is a special case where FIXED_HARDWARE
443 * can be handled in non-MWAIT way as well.
444 * In that case, save this _CST entry info.
991528d7
VP
445 * Otherwise, ignore this info and continue.
446 */
bc71bec9 447 cx.entry_method = ACPI_CSTATE_HALT;
4fcb2fcd 448 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
bc71bec9 449 } else {
991528d7
VP
450 continue;
451 }
da5e09a1 452 if (cx.type == ACPI_STATE_C1 &&
d1896049 453 (boot_option_idle_override == IDLE_NOMWAIT)) {
c1e3b377
ZY
454 /*
455 * In most cases the C1 space_id obtained from
456 * _CST object is FIXED_HARDWARE access mode.
457 * But when the option of idle=halt is added,
458 * the entry_method type should be changed from
459 * CSTATE_FFH to CSTATE_HALT.
da5e09a1
ZY
460 * When the option of idle=nomwait is added,
461 * the C1 entry_method type should be
462 * CSTATE_HALT.
c1e3b377
ZY
463 */
464 cx.entry_method = ACPI_CSTATE_HALT;
465 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
466 }
4fcb2fcd
VP
467 } else {
468 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
469 cx.address);
991528d7 470 }
1da177e4 471
0fda6b40
VP
472 if (cx.type == ACPI_STATE_C1) {
473 cx.valid = 1;
474 }
4fcb2fcd 475
50dd0969 476 obj = &(element->package.elements[2]);
1da177e4
LT
477 if (obj->type != ACPI_TYPE_INTEGER)
478 continue;
479
480 cx.latency = obj->integer.value;
481
50dd0969 482 obj = &(element->package.elements[3]);
1da177e4
LT
483 if (obj->type != ACPI_TYPE_INTEGER)
484 continue;
485
486 cx.power = obj->integer.value;
487
cf824788
JM
488 current_count++;
489 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
490
491 /*
492 * We support total ACPI_PROCESSOR_MAX_POWER - 1
493 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
494 */
495 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
496 printk(KERN_WARNING
497 "Limiting number of power states to max (%d)\n",
498 ACPI_PROCESSOR_MAX_POWER);
499 printk(KERN_WARNING
500 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
501 break;
502 }
1da177e4
LT
503 }
504
4be44fcd 505 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
cf824788 506 current_count));
1da177e4
LT
507
508 /* Validate number of power states discovered */
cf824788 509 if (current_count < 2)
6d93c648 510 status = -EFAULT;
1da177e4 511
4be44fcd 512 end:
02438d87 513 kfree(buffer.pointer);
1da177e4 514
d550d98d 515 return status;
1da177e4
LT
516}
517
4be44fcd
LB
518static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
519 struct acpi_processor_cx *cx)
1da177e4 520{
ee1ca48f
PV
521 static int bm_check_flag = -1;
522 static int bm_control_flag = -1;
02df8b93 523
1da177e4
LT
524
525 if (!cx->address)
d550d98d 526 return;
1da177e4 527
1da177e4
LT
528 /*
529 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
530 * DMA transfers are used by any ISA device to avoid livelock.
531 * Note that we could disable Type-F DMA (as recommended by
532 * the erratum), but this is known to disrupt certain ISA
533 * devices thus we take the conservative approach.
534 */
535 else if (errata.piix4.fdma) {
536 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
4be44fcd 537 "C3 not supported on PIIX4 with Type-F DMA\n"));
d550d98d 538 return;
1da177e4
LT
539 }
540
02df8b93 541 /* All the logic here assumes flags.bm_check is same across all CPUs */
ee1ca48f 542 if (bm_check_flag == -1) {
02df8b93
VP
543 /* Determine whether bm_check is needed based on CPU */
544 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
545 bm_check_flag = pr->flags.bm_check;
ee1ca48f 546 bm_control_flag = pr->flags.bm_control;
02df8b93
VP
547 } else {
548 pr->flags.bm_check = bm_check_flag;
ee1ca48f 549 pr->flags.bm_control = bm_control_flag;
02df8b93
VP
550 }
551
552 if (pr->flags.bm_check) {
02df8b93 553 if (!pr->flags.bm_control) {
ed3110ef
VP
554 if (pr->flags.has_cst != 1) {
555 /* bus mastering control is necessary */
556 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
557 "C3 support requires BM control\n"));
558 return;
559 } else {
560 /* Here we enter C3 without bus mastering */
561 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
562 "C3 support without BM control\n"));
563 }
02df8b93
VP
564 }
565 } else {
02df8b93
VP
566 /*
567 * WBINVD should be set in fadt, for C3 state to be
568 * supported on when bm_check is not required.
569 */
cee324b1 570 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
02df8b93 571 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
4be44fcd
LB
572 "Cache invalidation should work properly"
573 " for C3 to be enabled on SMP systems\n"));
d550d98d 574 return;
02df8b93 575 }
02df8b93
VP
576 }
577
1da177e4
LT
578 /*
579 * Otherwise we've met all of our C3 requirements.
580 * Normalize the C3 latency to expidite policy. Enable
581 * checking of bus mastering status (bm_check) so we can
582 * use this in our C3 policy
583 */
584 cx->valid = 1;
4f86d3a8 585
31878dd8
LB
586 /*
587 * On older chipsets, BM_RLD needs to be set
588 * in order for Bus Master activity to wake the
589 * system from C3. Newer chipsets handle DMA
590 * during C3 automatically and BM_RLD is a NOP.
591 * In either case, the proper way to
592 * handle BM_RLD is to set it and leave it set.
593 */
50ffba1b 594 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
1da177e4 595
d550d98d 596 return;
1da177e4
LT
597}
598
1da177e4
LT
599static int acpi_processor_power_verify(struct acpi_processor *pr)
600{
601 unsigned int i;
602 unsigned int working = 0;
6eb0a0fd 603
169a0abb 604 pr->power.timer_broadcast_on_state = INT_MAX;
6eb0a0fd 605
a0bf284b 606 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1da177e4
LT
607 struct acpi_processor_cx *cx = &pr->power.states[i];
608
609 switch (cx->type) {
610 case ACPI_STATE_C1:
611 cx->valid = 1;
612 break;
613
614 case ACPI_STATE_C2:
d22edd29
LB
615 if (!cx->address)
616 break;
617 cx->valid = 1;
1da177e4
LT
618 break;
619
620 case ACPI_STATE_C3:
621 acpi_processor_power_verify_c3(pr, cx);
622 break;
623 }
7e275cc4
LB
624 if (!cx->valid)
625 continue;
1da177e4 626
7e275cc4
LB
627 lapic_timer_check_state(i, pr, cx);
628 tsc_check_state(cx->type);
629 working++;
1da177e4 630 }
bd663347 631
918aae42 632 lapic_timer_propagate_broadcast(pr);
1da177e4
LT
633
634 return (working);
635}
636
4be44fcd 637static int acpi_processor_get_power_info(struct acpi_processor *pr)
1da177e4
LT
638{
639 unsigned int i;
640 int result;
641
1da177e4
LT
642
643 /* NOTE: the idle thread may not be running while calling
644 * this function */
645
991528d7
VP
646 /* Zero initialize all the C-states info. */
647 memset(pr->power.states, 0, sizeof(pr->power.states));
648
1da177e4 649 result = acpi_processor_get_power_info_cst(pr);
6d93c648 650 if (result == -ENODEV)
c5a114f1 651 result = acpi_processor_get_power_info_fadt(pr);
6d93c648 652
991528d7
VP
653 if (result)
654 return result;
655
656 acpi_processor_get_power_info_default(pr);
657
cf824788 658 pr->power.count = acpi_processor_power_verify(pr);
1da177e4 659
1da177e4
LT
660 /*
661 * if one state of type C2 or C3 is available, mark this
662 * CPU as being "idle manageable"
663 */
664 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
acf05f4b 665 if (pr->power.states[i].valid) {
1da177e4 666 pr->power.count = i;
2203d6ed
LT
667 if (pr->power.states[i].type >= ACPI_STATE_C2)
668 pr->flags.power = 1;
acf05f4b 669 }
1da177e4
LT
670 }
671
d550d98d 672 return 0;
1da177e4
LT
673}
674
4f86d3a8
LB
675/**
676 * acpi_idle_bm_check - checks if bus master activity was detected
677 */
678static int acpi_idle_bm_check(void)
679{
680 u32 bm_status = 0;
681
d3e7e99f
LB
682 if (bm_check_disable)
683 return 0;
684
50ffba1b 685 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
4f86d3a8 686 if (bm_status)
50ffba1b 687 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
4f86d3a8
LB
688 /*
689 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
690 * the true state of bus mastering activity; forcing us to
691 * manually check the BMIDEA bit of each IDE channel.
692 */
693 else if (errata.piix4.bmisx) {
694 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
695 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
696 bm_status = 1;
697 }
698 return bm_status;
699}
700
4f86d3a8
LB
701/**
702 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
703 * @cx: cstate data
bc71bec9 704 *
705 * Caller disables interrupt before call and enables interrupt after return.
4f86d3a8
LB
706 */
707static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
708{
dcf30997
SR
709 /* Don't trace irqs off for idle */
710 stop_critical_timings();
bc71bec9 711 if (cx->entry_method == ACPI_CSTATE_FFH) {
4f86d3a8
LB
712 /* Call into architectural FFH based C-state */
713 acpi_processor_ffh_cstate_enter(cx);
bc71bec9 714 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
715 acpi_safe_halt();
4f86d3a8 716 } else {
4f86d3a8
LB
717 /* IO port based C-state */
718 inb(cx->address);
719 /* Dummy wait op - must do something useless after P_LVL2 read
720 because chipsets cannot guarantee that STPCLK# signal
721 gets asserted in time to freeze execution properly. */
cfa806f0 722 inl(acpi_gbl_FADT.xpm_timer_block.address);
4f86d3a8 723 }
dcf30997 724 start_critical_timings();
4f86d3a8
LB
725}
726
727/**
728 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
729 * @dev: the target CPU
46bcfad7 730 * @drv: cpuidle driver containing cpuidle state info
e978aa7d 731 * @index: index of target state
4f86d3a8
LB
732 *
733 * This is equivalent to the HALT instruction.
734 */
735static int acpi_idle_enter_c1(struct cpuidle_device *dev,
46bcfad7 736 struct cpuidle_driver *drv, int index)
4f86d3a8 737{
ff69f2bb 738 ktime_t kt1, kt2;
739 s64 idle_time;
4f86d3a8 740 struct acpi_processor *pr;
4202735e
DD
741 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
742 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
9b12e18c 743
4a6f4fe8 744 pr = __this_cpu_read(processors);
e978aa7d 745 dev->last_residency = 0;
4f86d3a8
LB
746
747 if (unlikely(!pr))
e978aa7d 748 return -EINVAL;
4f86d3a8 749
2e906655 750 local_irq_disable();
b077fbad 751
75cc5235 752
7e275cc4 753 lapic_timer_state_broadcast(pr, cx, 1);
ff69f2bb 754 kt1 = ktime_get_real();
bc71bec9 755 acpi_idle_do_entry(cx);
ff69f2bb 756 kt2 = ktime_get_real();
757 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
4f86d3a8 758
e978aa7d
DD
759 /* Update device last_residency*/
760 dev->last_residency = (int)idle_time;
761
2e906655 762 local_irq_enable();
7e275cc4 763 lapic_timer_state_broadcast(pr, cx, 0);
4f86d3a8 764
e978aa7d 765 return index;
4f86d3a8
LB
766}
767
1a022e3f
BO
768
769/**
770 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
771 * @dev: the target CPU
772 * @index: the index of suggested state
773 */
774static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
775{
776 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
777 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
778
779 ACPI_FLUSH_CPU_CACHE();
780
781 while (1) {
782
783 if (cx->entry_method == ACPI_CSTATE_HALT)
54f70077 784 safe_halt();
1a022e3f
BO
785 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
786 inb(cx->address);
787 /* See comment in acpi_idle_do_entry() */
788 inl(acpi_gbl_FADT.xpm_timer_block.address);
789 } else
790 return -ENODEV;
791 }
792
793 /* Never reached */
794 return 0;
795}
796
4f86d3a8
LB
797/**
798 * acpi_idle_enter_simple - enters an ACPI state without BM handling
799 * @dev: the target CPU
46bcfad7 800 * @drv: cpuidle driver with cpuidle state information
e978aa7d 801 * @index: the index of suggested state
4f86d3a8
LB
802 */
803static int acpi_idle_enter_simple(struct cpuidle_device *dev,
46bcfad7 804 struct cpuidle_driver *drv, int index)
4f86d3a8
LB
805{
806 struct acpi_processor *pr;
4202735e
DD
807 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
808 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
ff69f2bb 809 ktime_t kt1, kt2;
2da513f5 810 s64 idle_time_ns;
ff69f2bb 811 s64 idle_time;
50629118 812
4a6f4fe8 813 pr = __this_cpu_read(processors);
e978aa7d 814 dev->last_residency = 0;
4f86d3a8
LB
815
816 if (unlikely(!pr))
e978aa7d 817 return -EINVAL;
e196441b 818
4f86d3a8 819 local_irq_disable();
02cf4f98 820
75cc5235 821
d306ebc2
PV
822 if (cx->entry_method != ACPI_CSTATE_FFH) {
823 current_thread_info()->status &= ~TS_POLLING;
824 /*
825 * TS_POLLING-cleared state must be visible before we test
826 * NEED_RESCHED:
827 */
828 smp_mb();
4f86d3a8 829
02cf4f98
LB
830 if (unlikely(need_resched())) {
831 current_thread_info()->status |= TS_POLLING;
832 local_irq_enable();
e978aa7d 833 return -EINVAL;
02cf4f98 834 }
4f86d3a8
LB
835 }
836
e17bcb43
TG
837 /*
838 * Must be done before busmaster disable as we might need to
839 * access HPET !
840 */
7e275cc4 841 lapic_timer_state_broadcast(pr, cx, 1);
e17bcb43 842
4f86d3a8
LB
843 if (cx->type == ACPI_STATE_C3)
844 ACPI_FLUSH_CPU_CACHE();
845
ff69f2bb 846 kt1 = ktime_get_real();
50629118
VP
847 /* Tell the scheduler that we are going deep-idle: */
848 sched_clock_idle_sleep_event();
4f86d3a8 849 acpi_idle_do_entry(cx);
ff69f2bb 850 kt2 = ktime_get_real();
2da513f5
VP
851 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
852 idle_time = idle_time_ns;
853 do_div(idle_time, NSEC_PER_USEC);
4f86d3a8 854
e978aa7d
DD
855 /* Update device last_residency*/
856 dev->last_residency = (int)idle_time;
857
50629118 858 /* Tell the scheduler how much we idled: */
2da513f5 859 sched_clock_idle_wakeup_event(idle_time_ns);
4f86d3a8
LB
860
861 local_irq_enable();
02cf4f98
LB
862 if (cx->entry_method != ACPI_CSTATE_FFH)
863 current_thread_info()->status |= TS_POLLING;
4f86d3a8 864
7e275cc4 865 lapic_timer_state_broadcast(pr, cx, 0);
bceefad5 866 cx->time += idle_time;
e978aa7d 867 return index;
4f86d3a8
LB
868}
869
870static int c3_cpu_count;
e12f65f7 871static DEFINE_RAW_SPINLOCK(c3_lock);
4f86d3a8
LB
872
873/**
874 * acpi_idle_enter_bm - enters C3 with proper BM handling
875 * @dev: the target CPU
46bcfad7 876 * @drv: cpuidle driver containing state data
e978aa7d 877 * @index: the index of suggested state
4f86d3a8
LB
878 *
879 * If BM is detected, the deepest non-C3 idle state is entered instead.
880 */
881static int acpi_idle_enter_bm(struct cpuidle_device *dev,
46bcfad7 882 struct cpuidle_driver *drv, int index)
4f86d3a8
LB
883{
884 struct acpi_processor *pr;
4202735e
DD
885 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
886 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
ff69f2bb 887 ktime_t kt1, kt2;
2da513f5 888 s64 idle_time_ns;
ff69f2bb 889 s64 idle_time;
ff69f2bb 890
50629118 891
4a6f4fe8 892 pr = __this_cpu_read(processors);
e978aa7d 893 dev->last_residency = 0;
4f86d3a8
LB
894
895 if (unlikely(!pr))
e978aa7d 896 return -EINVAL;
4f86d3a8 897
718be4aa 898 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
46bcfad7
DD
899 if (drv->safe_state_index >= 0) {
900 return drv->states[drv->safe_state_index].enter(dev,
901 drv, drv->safe_state_index);
ddc081a1 902 } else {
2e906655 903 local_irq_disable();
8651f97b 904 acpi_safe_halt();
2e906655 905 local_irq_enable();
75cc5235 906 return -EBUSY;
ddc081a1
VP
907 }
908 }
909
4f86d3a8 910 local_irq_disable();
02cf4f98 911
75cc5235 912
d306ebc2
PV
913 if (cx->entry_method != ACPI_CSTATE_FFH) {
914 current_thread_info()->status &= ~TS_POLLING;
915 /*
916 * TS_POLLING-cleared state must be visible before we test
917 * NEED_RESCHED:
918 */
919 smp_mb();
4f86d3a8 920
02cf4f98
LB
921 if (unlikely(need_resched())) {
922 current_thread_info()->status |= TS_POLLING;
923 local_irq_enable();
e978aa7d 924 return -EINVAL;
02cf4f98 925 }
4f86d3a8
LB
926 }
927
996520c1
VP
928 acpi_unlazy_tlb(smp_processor_id());
929
50629118
VP
930 /* Tell the scheduler that we are going deep-idle: */
931 sched_clock_idle_sleep_event();
4f86d3a8
LB
932 /*
933 * Must be done before busmaster disable as we might need to
934 * access HPET !
935 */
7e275cc4 936 lapic_timer_state_broadcast(pr, cx, 1);
4f86d3a8 937
f461ddea 938 kt1 = ktime_get_real();
ddc081a1
VP
939 /*
940 * disable bus master
941 * bm_check implies we need ARB_DIS
942 * !bm_check implies we need cache flush
943 * bm_control implies whether we can do ARB_DIS
944 *
945 * That leaves a case where bm_check is set and bm_control is
946 * not set. In that case we cannot do much, we enter C3
947 * without doing anything.
948 */
949 if (pr->flags.bm_check && pr->flags.bm_control) {
e12f65f7 950 raw_spin_lock(&c3_lock);
4f86d3a8
LB
951 c3_cpu_count++;
952 /* Disable bus master arbitration when all CPUs are in C3 */
953 if (c3_cpu_count == num_online_cpus())
50ffba1b 954 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
e12f65f7 955 raw_spin_unlock(&c3_lock);
ddc081a1
VP
956 } else if (!pr->flags.bm_check) {
957 ACPI_FLUSH_CPU_CACHE();
958 }
4f86d3a8 959
ddc081a1 960 acpi_idle_do_entry(cx);
4f86d3a8 961
ddc081a1
VP
962 /* Re-enable bus master arbitration */
963 if (pr->flags.bm_check && pr->flags.bm_control) {
e12f65f7 964 raw_spin_lock(&c3_lock);
50ffba1b 965 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
4f86d3a8 966 c3_cpu_count--;
e12f65f7 967 raw_spin_unlock(&c3_lock);
4f86d3a8 968 }
f461ddea 969 kt2 = ktime_get_real();
157317ba 970 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
2da513f5
VP
971 idle_time = idle_time_ns;
972 do_div(idle_time, NSEC_PER_USEC);
4f86d3a8 973
e978aa7d
DD
974 /* Update device last_residency*/
975 dev->last_residency = (int)idle_time;
976
50629118 977 /* Tell the scheduler how much we idled: */
2da513f5 978 sched_clock_idle_wakeup_event(idle_time_ns);
4f86d3a8
LB
979
980 local_irq_enable();
02cf4f98
LB
981 if (cx->entry_method != ACPI_CSTATE_FFH)
982 current_thread_info()->status |= TS_POLLING;
4f86d3a8 983
7e275cc4 984 lapic_timer_state_broadcast(pr, cx, 0);
bceefad5 985 cx->time += idle_time;
e978aa7d 986 return index;
4f86d3a8
LB
987}
988
989struct cpuidle_driver acpi_idle_driver = {
990 .name = "acpi_idle",
991 .owner = THIS_MODULE,
992};
993
994/**
46bcfad7
DD
995 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
996 * device i.e. per-cpu data
997 *
4f86d3a8
LB
998 * @pr: the ACPI processor
999 */
46bcfad7 1000static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr)
4f86d3a8 1001{
9a0b8415 1002 int i, count = CPUIDLE_DRIVER_STATE_START;
4f86d3a8 1003 struct acpi_processor_cx *cx;
4202735e 1004 struct cpuidle_state_usage *state_usage;
4f86d3a8
LB
1005 struct cpuidle_device *dev = &pr->power.dev;
1006
1007 if (!pr->flags.power_setup_done)
1008 return -EINVAL;
1009
1010 if (pr->flags.power == 0) {
1011 return -EINVAL;
1012 }
1013
dcb84f33 1014 dev->cpu = pr->id;
4fcb2fcd 1015
615dfd93
LB
1016 if (max_cstate == 0)
1017 max_cstate = 1;
1018
4f86d3a8
LB
1019 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1020 cx = &pr->power.states[i];
4202735e 1021 state_usage = &dev->states_usage[count];
4f86d3a8
LB
1022
1023 if (!cx->valid)
1024 continue;
1025
1026#ifdef CONFIG_HOTPLUG_CPU
1027 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1028 !pr->flags.has_cst &&
1029 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1030 continue;
1fec74a9 1031#endif
46bcfad7 1032
4202735e 1033 cpuidle_set_statedata(state_usage, cx);
4f86d3a8 1034
46bcfad7
DD
1035 count++;
1036 if (count == CPUIDLE_STATE_MAX)
1037 break;
1038 }
1039
1040 dev->state_count = count;
1041
1042 if (!count)
1043 return -EINVAL;
1044
1045 return 0;
1046}
1047
1048/**
1049 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
1050 * global state data i.e. idle routines
1051 *
1052 * @pr: the ACPI processor
1053 */
1054static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1055{
1056 int i, count = CPUIDLE_DRIVER_STATE_START;
1057 struct acpi_processor_cx *cx;
1058 struct cpuidle_state *state;
1059 struct cpuidle_driver *drv = &acpi_idle_driver;
1060
1061 if (!pr->flags.power_setup_done)
1062 return -EINVAL;
1063
1064 if (pr->flags.power == 0)
1065 return -EINVAL;
1066
1067 drv->safe_state_index = -1;
4fcb2fcd 1068 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
46bcfad7
DD
1069 drv->states[i].name[0] = '\0';
1070 drv->states[i].desc[0] = '\0';
4fcb2fcd
VP
1071 }
1072
615dfd93
LB
1073 if (max_cstate == 0)
1074 max_cstate = 1;
1075
4f86d3a8
LB
1076 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1077 cx = &pr->power.states[i];
4f86d3a8
LB
1078
1079 if (!cx->valid)
1080 continue;
1081
1082#ifdef CONFIG_HOTPLUG_CPU
1083 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1084 !pr->flags.has_cst &&
1085 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1086 continue;
1fec74a9 1087#endif
4f86d3a8 1088
46bcfad7 1089 state = &drv->states[count];
4f86d3a8 1090 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
4fcb2fcd 1091 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
4f86d3a8 1092 state->exit_latency = cx->latency;
4963f620 1093 state->target_residency = cx->latency * latency_factor;
4f86d3a8
LB
1094
1095 state->flags = 0;
1096 switch (cx->type) {
1097 case ACPI_STATE_C1:
8e92b660
VP
1098 if (cx->entry_method == ACPI_CSTATE_FFH)
1099 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1100
4f86d3a8 1101 state->enter = acpi_idle_enter_c1;
1a022e3f 1102 state->enter_dead = acpi_idle_play_dead;
46bcfad7 1103 drv->safe_state_index = count;
4f86d3a8
LB
1104 break;
1105
1106 case ACPI_STATE_C2:
4f86d3a8
LB
1107 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1108 state->enter = acpi_idle_enter_simple;
1a022e3f 1109 state->enter_dead = acpi_idle_play_dead;
46bcfad7 1110 drv->safe_state_index = count;
4f86d3a8
LB
1111 break;
1112
1113 case ACPI_STATE_C3:
4f86d3a8 1114 state->flags |= CPUIDLE_FLAG_TIME_VALID;
4f86d3a8
LB
1115 state->enter = pr->flags.bm_check ?
1116 acpi_idle_enter_bm :
1117 acpi_idle_enter_simple;
1118 break;
1119 }
1120
1121 count++;
9a0b8415 1122 if (count == CPUIDLE_STATE_MAX)
1123 break;
4f86d3a8
LB
1124 }
1125
46bcfad7 1126 drv->state_count = count;
4f86d3a8
LB
1127
1128 if (!count)
1129 return -EINVAL;
1130
4f86d3a8
LB
1131 return 0;
1132}
1133
46bcfad7 1134int acpi_processor_hotplug(struct acpi_processor *pr)
4f86d3a8 1135{
dcb84f33 1136 int ret = 0;
4f86d3a8 1137
d1896049 1138 if (disabled_by_idle_boot_param())
36a91358
VP
1139 return 0;
1140
4f86d3a8
LB
1141 if (!pr)
1142 return -EINVAL;
1143
1144 if (nocst) {
1145 return -ENODEV;
1146 }
1147
1148 if (!pr->flags.power_setup_done)
1149 return -ENODEV;
1150
1151 cpuidle_pause_and_lock();
1152 cpuidle_disable_device(&pr->power.dev);
1153 acpi_processor_get_power_info(pr);
dcb84f33 1154 if (pr->flags.power) {
46bcfad7 1155 acpi_processor_setup_cpuidle_cx(pr);
dcb84f33
VP
1156 ret = cpuidle_enable_device(&pr->power.dev);
1157 }
4f86d3a8
LB
1158 cpuidle_resume_and_unlock();
1159
1160 return ret;
1161}
1162
46bcfad7
DD
1163int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1164{
1165 int cpu;
1166 struct acpi_processor *_pr;
1167
1168 if (disabled_by_idle_boot_param())
1169 return 0;
1170
1171 if (!pr)
1172 return -EINVAL;
1173
1174 if (nocst)
1175 return -ENODEV;
1176
1177 if (!pr->flags.power_setup_done)
1178 return -ENODEV;
1179
1180 /*
1181 * FIXME: Design the ACPI notification to make it once per
1182 * system instead of once per-cpu. This condition is a hack
1183 * to make the code that updates C-States be called once.
1184 */
1185
9505626d 1186 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
46bcfad7
DD
1187
1188 cpuidle_pause_and_lock();
1189 /* Protect against cpu-hotplug */
1190 get_online_cpus();
1191
1192 /* Disable all cpuidle devices */
1193 for_each_online_cpu(cpu) {
1194 _pr = per_cpu(processors, cpu);
1195 if (!_pr || !_pr->flags.power_setup_done)
1196 continue;
1197 cpuidle_disable_device(&_pr->power.dev);
1198 }
1199
1200 /* Populate Updated C-state information */
1201 acpi_processor_setup_cpuidle_states(pr);
1202
1203 /* Enable all cpuidle devices */
1204 for_each_online_cpu(cpu) {
1205 _pr = per_cpu(processors, cpu);
1206 if (!_pr || !_pr->flags.power_setup_done)
1207 continue;
1208 acpi_processor_get_power_info(_pr);
1209 if (_pr->flags.power) {
1210 acpi_processor_setup_cpuidle_cx(_pr);
1211 cpuidle_enable_device(&_pr->power.dev);
1212 }
1213 }
1214 put_online_cpus();
1215 cpuidle_resume_and_unlock();
1216 }
1217
1218 return 0;
1219}
1220
1221static int acpi_processor_registered;
1222
7af8b660 1223int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
4be44fcd 1224 struct acpi_device *device)
1da177e4 1225{
4be44fcd 1226 acpi_status status = 0;
46bcfad7 1227 int retval;
b6835052 1228 static int first_run;
1da177e4 1229
d1896049 1230 if (disabled_by_idle_boot_param())
36a91358 1231 return 0;
1da177e4
LT
1232
1233 if (!first_run) {
1234 dmi_check_system(processor_power_dmi_table);
c1c30634 1235 max_cstate = acpi_processor_cstate_check(max_cstate);
1da177e4 1236 if (max_cstate < ACPI_C_STATES_MAX)
4be44fcd
LB
1237 printk(KERN_NOTICE
1238 "ACPI: processor limited to max C-state %d\n",
1239 max_cstate);
1da177e4
LT
1240 first_run++;
1241 }
1242
02df8b93 1243 if (!pr)
d550d98d 1244 return -EINVAL;
02df8b93 1245
cee324b1 1246 if (acpi_gbl_FADT.cst_control && !nocst) {
4be44fcd 1247 status =
cee324b1 1248 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1da177e4 1249 if (ACPI_FAILURE(status)) {
a6fc6720
TR
1250 ACPI_EXCEPTION((AE_INFO, status,
1251 "Notifying BIOS of _CST ability failed"));
1da177e4
LT
1252 }
1253 }
1254
1255 acpi_processor_get_power_info(pr);
4f86d3a8 1256 pr->flags.power_setup_done = 1;
1da177e4
LT
1257
1258 /*
1259 * Install the idle handler if processor power management is supported.
1260 * Note that we use previously set idle handler will be used on
1261 * platforms that only support C1.
1262 */
36a91358 1263 if (pr->flags.power) {
46bcfad7
DD
1264 /* Register acpi_idle_driver if not already registered */
1265 if (!acpi_processor_registered) {
1266 acpi_processor_setup_cpuidle_states(pr);
1267 retval = cpuidle_register_driver(&acpi_idle_driver);
1268 if (retval)
1269 return retval;
1270 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1271 acpi_idle_driver.name);
1272 }
1273 /* Register per-cpu cpuidle_device. Cpuidle driver
1274 * must already be registered before registering device
1275 */
1276 acpi_processor_setup_cpuidle_cx(pr);
1277 retval = cpuidle_register_device(&pr->power.dev);
1278 if (retval) {
1279 if (acpi_processor_registered == 0)
1280 cpuidle_unregister_driver(&acpi_idle_driver);
1281 return retval;
1282 }
1283 acpi_processor_registered++;
1da177e4 1284 }
d550d98d 1285 return 0;
1da177e4
LT
1286}
1287
4be44fcd
LB
1288int acpi_processor_power_exit(struct acpi_processor *pr,
1289 struct acpi_device *device)
1da177e4 1290{
d1896049 1291 if (disabled_by_idle_boot_param())
36a91358
VP
1292 return 0;
1293
46bcfad7
DD
1294 if (pr->flags.power) {
1295 cpuidle_unregister_device(&pr->power.dev);
1296 acpi_processor_registered--;
1297 if (acpi_processor_registered == 0)
1298 cpuidle_unregister_driver(&acpi_idle_driver);
1299 }
1da177e4 1300
46bcfad7 1301 pr->flags.power_setup_done = 0;
d550d98d 1302 return 0;
1da177e4 1303}
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