Commit | Line | Data |
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a2127e40 AM |
1 | /* |
2 | * SATA glue for Cavium Octeon III SOCs. | |
3 | * | |
4 | * | |
5 | * This file is subject to the terms and conditions of the GNU General Public | |
6 | * License. See the file "COPYING" in the main directory of this archive | |
7 | * for more details. | |
8 | * | |
9 | * Copyright (C) 2010-2015 Cavium Networks | |
10 | * | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/dma-mapping.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/of_platform.h> | |
17 | ||
18 | #include <asm/octeon/octeon.h> | |
19 | #include <asm/bitfield.h> | |
20 | ||
21 | #define CVMX_SATA_UCTL_SHIM_CFG 0xE8 | |
22 | ||
23 | #define SATA_UCTL_ENDIAN_MODE_BIG 1 | |
24 | #define SATA_UCTL_ENDIAN_MODE_LITTLE 0 | |
25 | #define SATA_UCTL_ENDIAN_MODE_MASK 3 | |
26 | ||
27 | #define SATA_UCTL_DMA_ENDIAN_MODE_SHIFT 8 | |
28 | #define SATA_UCTL_CSR_ENDIAN_MODE_SHIFT 0 | |
29 | #define SATA_UCTL_DMA_READ_CMD_SHIFT 12 | |
30 | ||
31 | static int ahci_octeon_probe(struct platform_device *pdev) | |
32 | { | |
33 | struct device *dev = &pdev->dev; | |
34 | struct device_node *node = dev->of_node; | |
35 | struct resource *res; | |
36 | void __iomem *base; | |
37 | u64 cfg; | |
38 | int ret; | |
39 | ||
40 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
41 | if (!res) { | |
42 | dev_err(&pdev->dev, "Platform resource[0] is missing\n"); | |
43 | return -ENODEV; | |
44 | } | |
45 | ||
46 | base = devm_ioremap_resource(&pdev->dev, res); | |
47 | if (IS_ERR(base)) | |
48 | return PTR_ERR(base); | |
49 | ||
50 | cfg = cvmx_readq_csr(base + CVMX_SATA_UCTL_SHIM_CFG); | |
51 | ||
52 | cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT); | |
53 | cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT); | |
54 | ||
55 | #ifdef __BIG_ENDIAN | |
56 | cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT; | |
57 | cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT; | |
58 | #else | |
59 | cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT; | |
60 | cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT; | |
61 | #endif | |
62 | ||
63 | cfg |= 1 << SATA_UCTL_DMA_READ_CMD_SHIFT; | |
64 | ||
65 | cvmx_writeq_csr(base + CVMX_SATA_UCTL_SHIM_CFG, cfg); | |
66 | ||
67 | if (!node) { | |
68 | dev_err(dev, "no device node, failed to add octeon sata\n"); | |
69 | return -ENODEV; | |
70 | } | |
71 | ||
72 | ret = of_platform_populate(node, NULL, NULL, dev); | |
73 | if (ret) { | |
74 | dev_err(dev, "failed to add ahci-platform core\n"); | |
75 | return ret; | |
76 | } | |
77 | ||
78 | return 0; | |
79 | } | |
80 | ||
81 | static int ahci_octeon_remove(struct platform_device *pdev) | |
82 | { | |
83 | return 0; | |
84 | } | |
85 | ||
86 | static const struct of_device_id octeon_ahci_match[] = { | |
87 | { .compatible = "cavium,octeon-7130-sata-uctl", }, | |
88 | {}, | |
89 | }; | |
90 | MODULE_DEVICE_TABLE(of, octeon_ahci_match); | |
91 | ||
92 | static struct platform_driver ahci_octeon_driver = { | |
93 | .probe = ahci_octeon_probe, | |
94 | .remove = ahci_octeon_remove, | |
95 | .driver = { | |
96 | .name = "octeon-ahci", | |
97 | .of_match_table = octeon_ahci_match, | |
98 | }, | |
99 | }; | |
100 | ||
101 | module_platform_driver(ahci_octeon_driver); | |
102 | ||
103 | MODULE_LICENSE("GPL"); | |
104 | MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>"); | |
105 | MODULE_DESCRIPTION("Cavium Inc. sata config."); |