[deliverable/linux.git] / drivers / ata / ahci_platform.c

/*
 * AHCI SATA platform driver
 *
 * Copyright 2004-2005  Red Hat, Inc.
 *   Jeff Garzik <jgarzik@pobox.com>
 * Copyright 2010  MontaVista Software, LLC.
 *   Anton Vorontsov <avorontsov@ru.mvista.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 */

#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/libata.h>
#include <linux/ahci_platform.h>
#include "ahci.h"

static void ahci_host_stop(struct ata_host *host);

enum ahci_type {
	AHCI,		/* standard platform ahci */
	IMX53_AHCI,	/* ahci on i.mx53 */
	STRICT_AHCI,	/* delayed DMA engine start */
};

static struct platform_device_id ahci_devtype[] = {
	{
		.name = "ahci",
		.driver_data = AHCI,
	}, {
		.name = "imx53-ahci",
		.driver_data = IMX53_AHCI,
	}, {
		.name = "strict-ahci",
		.driver_data = STRICT_AHCI,
	}, {
		/* sentinel */
	}
};
MODULE_DEVICE_TABLE(platform, ahci_devtype);

struct ata_port_operations ahci_platform_ops = {
	.inherits	= &ahci_ops,
	.host_stop	= ahci_host_stop,
};
EXPORT_SYMBOL_GPL(ahci_platform_ops);

static struct ata_port_operations ahci_platform_retry_srst_ops = {
	.inherits	= &ahci_pmp_retry_srst_ops,
	.host_stop	= ahci_host_stop,
};

static const struct ata_port_info ahci_port_info[] = {
	/* by features */
	[AHCI] = {
		.flags		= AHCI_FLAG_COMMON,
		.pio_mask	= ATA_PIO4,
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &ahci_platform_ops,
	},
	[IMX53_AHCI] = {
		.flags		= AHCI_FLAG_COMMON,
		.pio_mask	= ATA_PIO4,
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &ahci_platform_retry_srst_ops,
	},
	[STRICT_AHCI] = {
		AHCI_HFLAGS	(AHCI_HFLAG_DELAY_ENGINE),
		.flags		= AHCI_FLAG_COMMON,
		.pio_mask	= ATA_PIO4,
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &ahci_platform_ops,
	},
};

static struct scsi_host_template ahci_platform_sht = {
	AHCI_SHT("ahci_platform"),
};

static int ahci_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	const struct platform_device_id *id = platform_get_device_id(pdev);
	struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
	const struct ata_port_info *ppi[] = { &pi, NULL };
	struct ahci_host_priv *hpriv;
	struct ata_host *host;
	struct resource *mem;
	int irq;
	int n_ports;
	int i;
	int rc;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!mem) {
		dev_err(dev, "no mmio space\n");
		return -EINVAL;
	}

	irq = platform_get_irq(pdev, 0);
	if (irq <= 0) {
		dev_err(dev, "no irq\n");
		return -EINVAL;
	}

	if (pdata && pdata->ata_port_info)
		pi = *pdata->ata_port_info;

	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
	if (!hpriv) {
		dev_err(dev, "can't alloc ahci_host_priv\n");
		return -ENOMEM;
	}

	hpriv->flags |= (unsigned long)pi.private_data;

	hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
	if (!hpriv->mmio) {
		dev_err(dev, "can't map %pR\n", mem);
		return -ENOMEM;
	}

	hpriv->clk = clk_get(dev, NULL);
	if (IS_ERR(hpriv->clk)) {
		dev_err(dev, "can't get clock\n");
	} else {
		rc = clk_prepare_enable(hpriv->clk);
		if (rc) {
			dev_err(dev, "clock prepare enable failed");
			goto free_clk;
		}
	}

	/*
	 * Some platforms might need to prepare for mmio region access,
	 * which could be done in the following init call. So, the mmio
	 * region shouldn't be accessed before init (if provided) has
	 * returned successfully.
	 */
	if (pdata && pdata->init) {
		rc = pdata->init(dev, hpriv->mmio);
		if (rc)
			goto disable_unprepare_clk;
	}

	ahci_save_initial_config(dev, hpriv,
		pdata ? pdata->force_port_map : 0,
		pdata ? pdata->mask_port_map  : 0);

	/* prepare host */
	if (hpriv->cap & HOST_CAP_NCQ)
		pi.flags |= ATA_FLAG_NCQ;

	if (hpriv->cap & HOST_CAP_PMP)
		pi.flags |= ATA_FLAG_PMP;

	ahci_set_em_messages(hpriv, &pi);

	/* CAP.NP sometimes indicate the index of the last enabled
	 * port, at other times, that of the last possible port, so
	 * determining the maximum port number requires looking at
	 * both CAP.NP and port_map.
	 */
	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));

	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
	if (!host) {
		rc = -ENOMEM;
		goto pdata_exit;
	}

	host->private_data = hpriv;

	if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
		host->flags |= ATA_HOST_PARALLEL_SCAN;
	else
		dev_info(dev, "SSS flag set, parallel bus scan disabled\n");

	if (pi.flags & ATA_FLAG_EM)
		ahci_reset_em(host);

	for (i = 0; i < host->n_ports; i++) {
		struct ata_port *ap = host->ports[i];

		ata_port_desc(ap, "mmio %pR", mem);
		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);

		/* set enclosure management message type */
		if (ap->flags & ATA_FLAG_EM)
			ap->em_message_type = hpriv->em_msg_type;

		/* disabled/not-implemented port */
		if (!(hpriv->port_map & (1 << i)))
			ap->ops = &ata_dummy_port_ops;
	}

	rc = ahci_reset_controller(host);
	if (rc)
		goto pdata_exit;

	ahci_init_controller(host);
	ahci_print_info(host, "platform");

	rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
			       &ahci_platform_sht);
	if (rc)
		goto pdata_exit;

	return 0;
pdata_exit:
	if (pdata && pdata->exit)
		pdata->exit(dev);
disable_unprepare_clk:
	if (!IS_ERR(hpriv->clk))
		clk_disable_unprepare(hpriv->clk);
free_clk:
	if (!IS_ERR(hpriv->clk))
		clk_put(hpriv->clk);
	return rc;
}

static void ahci_host_stop(struct ata_host *host)
{
	struct device *dev = host->dev;
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	struct ahci_host_priv *hpriv = host->private_data;

	if (pdata && pdata->exit)
		pdata->exit(dev);

	if (!IS_ERR(hpriv->clk)) {
		clk_disable_unprepare(hpriv->clk);
		clk_put(hpriv->clk);
	}
}

#ifdef CONFIG_PM_SLEEP
static int ahci_suspend(struct device *dev)
{
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	struct ata_host *host = dev_get_drvdata(dev);
	struct ahci_host_priv *hpriv = host->private_data;
	void __iomem *mmio = hpriv->mmio;
	u32 ctl;
	int rc;

	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
		dev_err(dev, "firmware update required for suspend/resume\n");
		return -EIO;
	}

	/*
	 * AHCI spec rev1.1 section 8.3.3:
	 * Software must disable interrupts prior to requesting a
	 * transition of the HBA to D3 state.
	 */
	ctl = readl(mmio + HOST_CTL);
	ctl &= ~HOST_IRQ_EN;
	writel(ctl, mmio + HOST_CTL);
	readl(mmio + HOST_CTL); /* flush */

	rc = ata_host_suspend(host, PMSG_SUSPEND);
	if (rc)
		return rc;

	if (pdata && pdata->suspend)
		return pdata->suspend(dev);

	if (!IS_ERR(hpriv->clk))
		clk_disable_unprepare(hpriv->clk);

	return 0;
}

static int ahci_resume(struct device *dev)
{
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	struct ata_host *host = dev_get_drvdata(dev);
	struct ahci_host_priv *hpriv = host->private_data;
	int rc;

	if (!IS_ERR(hpriv->clk)) {
		rc = clk_prepare_enable(hpriv->clk);
		if (rc) {
			dev_err(dev, "clock prepare enable failed");
			return rc;
		}
	}

	if (pdata && pdata->resume) {
		rc = pdata->resume(dev);
		if (rc)
			goto disable_unprepare_clk;
	}

	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
		rc = ahci_reset_controller(host);
		if (rc)
			goto disable_unprepare_clk;

		ahci_init_controller(host);
	}

	ata_host_resume(host);

	return 0;

disable_unprepare_clk:
	if (!IS_ERR(hpriv->clk))
		clk_disable_unprepare(hpriv->clk);

	return rc;
}
#endif

static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);

static const struct of_device_id ahci_of_match[] = {
	{ .compatible = "snps,spear-ahci", },
	{ .compatible = "snps,exynos5440-ahci", },
	{ .compatible = "ibm,476gtr-ahci", },
	{},
};
MODULE_DEVICE_TABLE(of, ahci_of_match);

static struct platform_driver ahci_driver = {
	.probe = ahci_probe,
	.remove = ata_platform_remove_one,
	.driver = {
		.name = "ahci",
		.owner = THIS_MODULE,
		.of_match_table = ahci_of_match,
		.pm = &ahci_pm_ops,
	},
	.id_table	= ahci_devtype,
};
module_platform_driver(ahci_driver);

MODULE_DESCRIPTION("AHCI SATA platform driver");
MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:ahci");
Commit	Line	Data
1c2a49f6 AV	1	/*
	2	* AHCI SATA platform driver
	3	*
	4	* Copyright 2004-2005 Red Hat, Inc.
	5	* Jeff Garzik <jgarzik@pobox.com>
	6	* Copyright 2010 MontaVista Software, LLC.
	7	* Anton Vorontsov <avorontsov@ru.mvista.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2, or (at your option)
	12	* any later version.
	13	*/
	14
f1e70c2c	15	#include <linux/clk.h>
1c2a49f6	16	#include <linux/kernel.h>
fbaf666b	17	#include <linux/gfp.h>
1c2a49f6	18	#include <linux/module.h>
18c25ff4	19	#include <linux/pm.h>
1c2a49f6 AV	20	#include <linux/init.h>
	21	#include <linux/interrupt.h>
	22	#include <linux/device.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/libata.h>
	25	#include <linux/ahci_platform.h>
	26	#include "ahci.h"
	27
1896b15e BN	28	static void ahci_host_stop(struct ata_host *host);
1896b15e BN	29
904c04fe RZ	30	enum ahci_type {
	31	AHCI, /* standard platform ahci */
	32	IMX53_AHCI, /* ahci on i.mx53 */
d408e2b1	33	STRICT_AHCI, /* delayed DMA engine start */
904c04fe RZ	34	};
	35
	36	static struct platform_device_id ahci_devtype[] = {
	37	{
	38	.name = "ahci",
	39	.driver_data = AHCI,
	40	}, {
	41	.name = "imx53-ahci",
	42	.driver_data = IMX53_AHCI,
d408e2b1 BN	43	}, {
	44	.name = "strict-ahci",
	45	.driver_data = STRICT_AHCI,
904c04fe RZ	46	}, {
	47	/* sentinel */
	48	}
	49	};
	50	MODULE_DEVICE_TABLE(platform, ahci_devtype);
	51
8b789d89	52	struct ata_port_operations ahci_platform_ops = {
1896b15e BN	53	.inherits = &ahci_ops,
	54	.host_stop = ahci_host_stop,
	55	};
8b789d89	56	EXPORT_SYMBOL_GPL(ahci_platform_ops);
1896b15e	57
071d3ad3	58	static struct ata_port_operations ahci_platform_retry_srst_ops = {
1896b15e BN	59	.inherits = &ahci_pmp_retry_srst_ops,
	60	.host_stop = ahci_host_stop,
	61	};
904c04fe RZ	62
	63	static const struct ata_port_info ahci_port_info[] = {
	64	/* by features */
	65	[AHCI] = {
	66	.flags = AHCI_FLAG_COMMON,
	67	.pio_mask = ATA_PIO4,
	68	.udma_mask = ATA_UDMA6,
1896b15e	69	.port_ops = &ahci_platform_ops,
904c04fe RZ	70	},
	71	[IMX53_AHCI] = {
	72	.flags = AHCI_FLAG_COMMON,
	73	.pio_mask = ATA_PIO4,
	74	.udma_mask = ATA_UDMA6,
1896b15e	75	.port_ops = &ahci_platform_retry_srst_ops,
904c04fe	76	},
d408e2b1 BN	77	[STRICT_AHCI] = {
	78	AHCI_HFLAGS (AHCI_HFLAG_DELAY_ENGINE),
	79	.flags = AHCI_FLAG_COMMON,
	80	.pio_mask = ATA_PIO4,
	81	.udma_mask = ATA_UDMA6,
1896b15e	82	.port_ops = &ahci_platform_ops,
d408e2b1	83	},
904c04fe RZ	84	};
904c04fe RZ	85
fad16e7a TH	86	static struct scsi_host_template ahci_platform_sht = {
	87	AHCI_SHT("ahci_platform"),
	88	};
	89
0ec24914	90	static int ahci_probe(struct platform_device *pdev)
1c2a49f6 AV	91	{
1c2a49f6 AV	92	struct device *dev = &pdev->dev;
00345614	93	struct ahci_platform_data *pdata = dev_get_platdata(dev);
904c04fe	94	const struct platform_device_id *id = platform_get_device_id(pdev);
ff956135	95	struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
1c2a49f6 AV	96	const struct ata_port_info *ppi[] = { &pi, NULL };
	97	struct ahci_host_priv *hpriv;
	98	struct ata_host *host;
	99	struct resource *mem;
	100	int irq;
	101	int n_ports;
	102	int i;
	103	int rc;
	104
	105	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	106	if (!mem) {
	107	dev_err(dev, "no mmio space\n");
	108	return -EINVAL;
	109	}
	110
	111	irq = platform_get_irq(pdev, 0);
	112	if (irq <= 0) {
	113	dev_err(dev, "no irq\n");
	114	return -EINVAL;
	115	}
	116
1c2a49f6 AV	117	if (pdata && pdata->ata_port_info)
	118	pi = *pdata->ata_port_info;
	119
	120	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
	121	if (!hpriv) {
08354809 JB	122	dev_err(dev, "can't alloc ahci_host_priv\n");
08354809 JB	123	return -ENOMEM;
1c2a49f6 AV	124	}
	125
	126	hpriv->flags \|= (unsigned long)pi.private_data;
	127
	128	hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
	129	if (!hpriv->mmio) {
	130	dev_err(dev, "can't map %pR\n", mem);
08354809 JB	131	return -ENOMEM;
	132	}
	133
f1e70c2c VK	134	hpriv->clk = clk_get(dev, NULL);
	135	if (IS_ERR(hpriv->clk)) {
	136	dev_err(dev, "can't get clock\n");
	137	} else {
	138	rc = clk_prepare_enable(hpriv->clk);
	139	if (rc) {
	140	dev_err(dev, "clock prepare enable failed");
	141	goto free_clk;
	142	}
	143	}
	144
08354809 JB	145	/*
	146	* Some platforms might need to prepare for mmio region access,
	147	* which could be done in the following init call. So, the mmio
	148	* region shouldn't be accessed before init (if provided) has
	149	* returned successfully.
	150	*/
	151	if (pdata && pdata->init) {
	152	rc = pdata->init(dev, hpriv->mmio);
	153	if (rc)
f1e70c2c	154	goto disable_unprepare_clk;
1c2a49f6 AV	155	}
	156
	157	ahci_save_initial_config(dev, hpriv,
	158	pdata ? pdata->force_port_map : 0,
	159	pdata ? pdata->mask_port_map : 0);
	160
	161	/* prepare host */
	162	if (hpriv->cap & HOST_CAP_NCQ)
	163	pi.flags \|= ATA_FLAG_NCQ;
	164
	165	if (hpriv->cap & HOST_CAP_PMP)
	166	pi.flags \|= ATA_FLAG_PMP;
	167
	168	ahci_set_em_messages(hpriv, &pi);
	169
	170	/* CAP.NP sometimes indicate the index of the last enabled
	171	* port, at other times, that of the last possible port, so
	172	* determining the maximum port number requires looking at
	173	* both CAP.NP and port_map.
	174	*/
	175	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
	176
	177	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
	178	if (!host) {
	179	rc = -ENOMEM;
f1e70c2c	180	goto pdata_exit;
1c2a49f6 AV	181	}
	182
	183	host->private_data = hpriv;
	184
	185	if (!(hpriv->cap & HOST_CAP_SSS) \|\| ahci_ignore_sss)
	186	host->flags \|= ATA_HOST_PARALLEL_SCAN;
	187	else
0fed4c09	188	dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
1c2a49f6 AV	189
	190	if (pi.flags & ATA_FLAG_EM)
	191	ahci_reset_em(host);
	192
	193	for (i = 0; i < host->n_ports; i++) {
	194	struct ata_port *ap = host->ports[i];
	195
	196	ata_port_desc(ap, "mmio %pR", mem);
	197	ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
	198
1c2a49f6 AV	199	/* set enclosure management message type */
1c2a49f6 AV	200	if (ap->flags & ATA_FLAG_EM)
55787183	201	ap->em_message_type = hpriv->em_msg_type;
1c2a49f6 AV	202
	203	/* disabled/not-implemented port */
	204	if (!(hpriv->port_map & (1 << i)))
	205	ap->ops = &ata_dummy_port_ops;
	206	}
	207
	208	rc = ahci_reset_controller(host);
	209	if (rc)
f1e70c2c	210	goto pdata_exit;
1c2a49f6 AV	211
	212	ahci_init_controller(host);
	213	ahci_print_info(host, "platform");
	214
	215	rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
fad16e7a	216	&ahci_platform_sht);
1c2a49f6	217	if (rc)
f1e70c2c	218	goto pdata_exit;
1c2a49f6 AV	219
1c2a49f6 AV	220	return 0;
f1e70c2c	221	pdata_exit:
1c2a49f6 AV	222	if (pdata && pdata->exit)
1c2a49f6 AV	223	pdata->exit(dev);
f1e70c2c VK	224	disable_unprepare_clk:
	225	if (!IS_ERR(hpriv->clk))
	226	clk_disable_unprepare(hpriv->clk);
	227	free_clk:
	228	if (!IS_ERR(hpriv->clk))
	229	clk_put(hpriv->clk);
1c2a49f6 AV	230	return rc;
	231	}
	232
1896b15e BN	233	static void ahci_host_stop(struct ata_host *host)
	234	{
	235	struct device *dev = host->dev;
	236	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	237	struct ahci_host_priv *hpriv = host->private_data;
	238
1c2a49f6 AV	239	if (pdata && pdata->exit)
	240	pdata->exit(dev);
	241
f1e70c2c VK	242	if (!IS_ERR(hpriv->clk)) {
	243	clk_disable_unprepare(hpriv->clk);
	244	clk_put(hpriv->clk);
	245	}
1c2a49f6 AV	246	}
1c2a49f6 AV	247
29448ec1	248	#ifdef CONFIG_PM_SLEEP
17ab594f BN	249	static int ahci_suspend(struct device *dev)
	250	{
	251	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	252	struct ata_host *host = dev_get_drvdata(dev);
	253	struct ahci_host_priv *hpriv = host->private_data;
	254	void __iomem *mmio = hpriv->mmio;
	255	u32 ctl;
	256	int rc;
	257
	258	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
	259	dev_err(dev, "firmware update required for suspend/resume\n");
	260	return -EIO;
	261	}
	262
	263	/*
	264	* AHCI spec rev1.1 section 8.3.3:
	265	* Software must disable interrupts prior to requesting a
	266	* transition of the HBA to D3 state.
	267	*/
	268	ctl = readl(mmio + HOST_CTL);
	269	ctl &= ~HOST_IRQ_EN;
	270	writel(ctl, mmio + HOST_CTL);
	271	readl(mmio + HOST_CTL); /* flush */
	272
	273	rc = ata_host_suspend(host, PMSG_SUSPEND);
	274	if (rc)
	275	return rc;
	276
	277	if (pdata && pdata->suspend)
	278	return pdata->suspend(dev);
f1e70c2c VK	279
	280	if (!IS_ERR(hpriv->clk))
	281	clk_disable_unprepare(hpriv->clk);
	282
17ab594f BN	283	return 0;
	284	}
	285
	286	static int ahci_resume(struct device *dev)
	287	{
	288	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	289	struct ata_host *host = dev_get_drvdata(dev);
f1e70c2c	290	struct ahci_host_priv *hpriv = host->private_data;
17ab594f BN	291	int rc;
17ab594f BN	292
f1e70c2c VK	293	if (!IS_ERR(hpriv->clk)) {
	294	rc = clk_prepare_enable(hpriv->clk);
	295	if (rc) {
	296	dev_err(dev, "clock prepare enable failed");
	297	return rc;
	298	}
	299	}
	300
17ab594f BN	301	if (pdata && pdata->resume) {
	302	rc = pdata->resume(dev);
	303	if (rc)
f1e70c2c	304	goto disable_unprepare_clk;
17ab594f BN	305	}
	306
	307	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
	308	rc = ahci_reset_controller(host);
	309	if (rc)
f1e70c2c	310	goto disable_unprepare_clk;
17ab594f BN	311
	312	ahci_init_controller(host);
	313	}
	314
	315	ata_host_resume(host);
	316
	317	return 0;
f1e70c2c VK	318
	319	disable_unprepare_clk:
	320	if (!IS_ERR(hpriv->clk))
	321	clk_disable_unprepare(hpriv->clk);
	322
	323	return rc;
17ab594f	324	}
17ab594f BN	325	#endif
17ab594f BN	326
071d3ad3	327	static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
18c25ff4	328
02aac316	329	static const struct of_device_id ahci_of_match[] = {
5f098a3e	330	{ .compatible = "snps,spear-ahci", },
1e8f5f76	331	{ .compatible = "snps,exynos5440-ahci", },
2435dcb9	332	{ .compatible = "ibm,476gtr-ahci", },
02aac316 RH	333	{},
	334	};
	335	MODULE_DEVICE_TABLE(of, ahci_of_match);
	336
1c2a49f6	337	static struct platform_driver ahci_driver = {
941c77fd	338	.probe = ahci_probe,
83291d65	339	.remove = ata_platform_remove_one,
1c2a49f6 AV	340	.driver = {
	341	.name = "ahci",
	342	.owner = THIS_MODULE,
02aac316	343	.of_match_table = ahci_of_match,
17ab594f	344	.pm = &ahci_pm_ops,
1c2a49f6	345	},
904c04fe	346	.id_table = ahci_devtype,
1c2a49f6	347	};
9a99e476	348	module_platform_driver(ahci_driver);
1c2a49f6 AV	349
	350	MODULE_DESCRIPTION("AHCI SATA platform driver");
	351	MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
	352	MODULE_LICENSE("GPL");
	353	MODULE_ALIAS("platform:ahci");