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669a5db4 JG |
1 | /* |
2 | * pata_artop.c - ARTOP ATA controller driver | |
3 | * | |
4 | * (C) 2006 Red Hat <alan@redhat.com> | |
5 | * | |
6 | * Based in part on drivers/ide/pci/aec62xx.c | |
7 | * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> | |
8 | * 865/865R fixes for Macintosh card version from a patch to the old | |
9 | * driver by Thibaut VARENE <varenet@parisc-linux.org> | |
10 | * When setting the PCI latency we must set 0x80 or higher for burst | |
11 | * performance Alessandro Zummo <alessandro.zummo@towertech.it> | |
12 | * | |
13 | * TODO | |
14 | * 850 serialization once the core supports it | |
15 | * Investigate no_dsc on 850R | |
16 | * Clock detect | |
17 | */ | |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/blkdev.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/device.h> | |
26 | #include <scsi/scsi_host.h> | |
27 | #include <linux/libata.h> | |
28 | #include <linux/ata.h> | |
29 | ||
30 | #define DRV_NAME "pata_artop" | |
c961922b | 31 | #define DRV_VERSION "0.4.2" |
669a5db4 JG |
32 | |
33 | /* | |
34 | * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we | |
35 | * get PCI bus speed functionality we leave this as 0. Its a variable | |
36 | * for when we get the functionality and also for folks wanting to | |
37 | * test stuff. | |
38 | */ | |
39 | ||
40 | static int clock = 0; | |
41 | ||
d4b2bab4 | 42 | static int artop6210_pre_reset(struct ata_port *ap, unsigned long deadline) |
669a5db4 JG |
43 | { |
44 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
45 | const struct pci_bits artop_enable_bits[] = { | |
46 | { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */ | |
47 | { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */ | |
48 | }; | |
49 | ||
c961922b AC |
50 | if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) |
51 | return -ENOENT; | |
d4b2bab4 TH |
52 | |
53 | return ata_std_prereset(ap, deadline); | |
669a5db4 JG |
54 | } |
55 | ||
56 | /** | |
57 | * artop6210_error_handler - Probe specified port on PATA host controller | |
58 | * @ap: Port to probe | |
59 | * | |
60 | * LOCKING: | |
61 | * None (inherited from caller). | |
62 | */ | |
63 | ||
64 | static void artop6210_error_handler(struct ata_port *ap) | |
65 | { | |
66 | ata_bmdma_drive_eh(ap, artop6210_pre_reset, | |
67 | ata_std_softreset, NULL, | |
68 | ata_std_postreset); | |
69 | } | |
70 | ||
71 | /** | |
72 | * artop6260_pre_reset - check for 40/80 pin | |
73 | * @ap: Port | |
d4b2bab4 | 74 | * @deadline: deadline jiffies for the operation |
669a5db4 JG |
75 | * |
76 | * The ARTOP hardware reports the cable detect bits in register 0x49. | |
77 | * Nothing complicated needed here. | |
78 | */ | |
79 | ||
d4b2bab4 | 80 | static int artop6260_pre_reset(struct ata_port *ap, unsigned long deadline) |
669a5db4 JG |
81 | { |
82 | static const struct pci_bits artop_enable_bits[] = { | |
83 | { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */ | |
84 | { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */ | |
85 | }; | |
86 | ||
87 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
669a5db4 JG |
88 | |
89 | /* Odd numbered device ids are the units with enable bits (the -R cards) */ | |
c961922b AC |
90 | if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) |
91 | return -ENOENT; | |
a73984a0 JG |
92 | return ata_std_prereset(ap); |
93 | } | |
c961922b | 94 | |
a73984a0 JG |
95 | /** |
96 | * artop6260_cable_detect - identify cable type | |
97 | * @ap: Port | |
98 | * | |
99 | * Identify the cable type for the ARTOp interface in question | |
100 | */ | |
101 | ||
102 | static int artop6260_cable_detect(struct ata_port *ap) | |
103 | { | |
104 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
105 | u8 tmp; | |
669a5db4 | 106 | pci_read_config_byte(pdev, 0x49, &tmp); |
3f9dd27a | 107 | if (tmp & (1 << ap->port_no)) |
a73984a0 JG |
108 | return ATA_CBL_PATA40; |
109 | return ATA_CBL_PATA80; | |
669a5db4 JG |
110 | } |
111 | ||
112 | /** | |
113 | * artop6260_error_handler - Probe specified port on PATA host controller | |
114 | * @ap: Port to probe | |
115 | * | |
116 | * LOCKING: | |
117 | * None (inherited from caller). | |
118 | */ | |
119 | ||
120 | static void artop6260_error_handler(struct ata_port *ap) | |
121 | { | |
122 | ata_bmdma_drive_eh(ap, artop6260_pre_reset, | |
123 | ata_std_softreset, NULL, | |
124 | ata_std_postreset); | |
125 | } | |
126 | ||
127 | /** | |
128 | * artop6210_load_piomode - Load a set of PATA PIO timings | |
129 | * @ap: Port whose timings we are configuring | |
130 | * @adev: Device | |
131 | * @pio: PIO mode | |
132 | * | |
133 | * Set PIO mode for device, in host controller PCI config space. This | |
134 | * is used both to set PIO timings in PIO mode and also to set the | |
135 | * matching PIO clocking for UDMA, as well as the MWDMA timings. | |
136 | * | |
137 | * LOCKING: | |
138 | * None (inherited from caller). | |
139 | */ | |
140 | ||
141 | static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio) | |
142 | { | |
143 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
144 | int dn = adev->devno + 2 * ap->port_no; | |
145 | const u16 timing[2][5] = { | |
146 | { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 }, | |
147 | { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 } | |
148 | ||
149 | }; | |
150 | /* Load the PIO timing active/recovery bits */ | |
151 | pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]); | |
152 | } | |
153 | ||
154 | /** | |
155 | * artop6210_set_piomode - Initialize host controller PATA PIO timings | |
156 | * @ap: Port whose timings we are configuring | |
157 | * @adev: Device we are configuring | |
158 | * | |
159 | * Set PIO mode for device, in host controller PCI config space. For | |
160 | * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In | |
161 | * the event UDMA is used the later call to set_dmamode will set the | |
162 | * bits as required. | |
163 | * | |
164 | * LOCKING: | |
165 | * None (inherited from caller). | |
166 | */ | |
167 | ||
168 | static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
169 | { | |
170 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
171 | int dn = adev->devno + 2 * ap->port_no; | |
172 | u8 ultra; | |
173 | ||
174 | artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); | |
175 | ||
176 | /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ | |
177 | pci_read_config_byte(pdev, 0x54, &ultra); | |
178 | ultra &= ~(3 << (2 * dn)); | |
179 | pci_write_config_byte(pdev, 0x54, ultra); | |
180 | } | |
181 | ||
182 | /** | |
183 | * artop6260_load_piomode - Initialize host controller PATA PIO timings | |
184 | * @ap: Port whose timings we are configuring | |
185 | * @adev: Device we are configuring | |
186 | * @pio: PIO mode | |
187 | * | |
188 | * Set PIO mode for device, in host controller PCI config space. The | |
189 | * ARTOP6260 and relatives store the timing data differently. | |
190 | * | |
191 | * LOCKING: | |
192 | * None (inherited from caller). | |
193 | */ | |
194 | ||
195 | static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio) | |
196 | { | |
197 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
198 | int dn = adev->devno + 2 * ap->port_no; | |
199 | const u8 timing[2][5] = { | |
200 | { 0x00, 0x0A, 0x08, 0x33, 0x31 }, | |
201 | { 0x70, 0x7A, 0x78, 0x43, 0x41 } | |
202 | ||
203 | }; | |
204 | /* Load the PIO timing active/recovery bits */ | |
205 | pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]); | |
206 | } | |
207 | ||
208 | /** | |
209 | * artop6260_set_piomode - Initialize host controller PATA PIO timings | |
210 | * @ap: Port whose timings we are configuring | |
211 | * @adev: Device we are configuring | |
212 | * | |
213 | * Set PIO mode for device, in host controller PCI config space. For | |
214 | * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In | |
215 | * the event UDMA is used the later call to set_dmamode will set the | |
216 | * bits as required. | |
217 | * | |
218 | * LOCKING: | |
219 | * None (inherited from caller). | |
220 | */ | |
221 | ||
222 | static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
223 | { | |
224 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
225 | u8 ultra; | |
226 | ||
227 | artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); | |
228 | ||
229 | /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ | |
230 | pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra); | |
231 | ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */ | |
232 | pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra); | |
233 | } | |
234 | ||
235 | /** | |
236 | * artop6210_set_dmamode - Initialize host controller PATA PIO timings | |
237 | * @ap: Port whose timings we are configuring | |
a73984a0 | 238 | * @adev: Device whose timings we are configuring |
669a5db4 JG |
239 | * |
240 | * Set DMA mode for device, in host controller PCI config space. | |
241 | * | |
242 | * LOCKING: | |
243 | * None (inherited from caller). | |
244 | */ | |
245 | ||
246 | static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |
247 | { | |
248 | unsigned int pio; | |
249 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
250 | int dn = adev->devno + 2 * ap->port_no; | |
251 | u8 ultra; | |
252 | ||
253 | if (adev->dma_mode == XFER_MW_DMA_0) | |
254 | pio = 1; | |
255 | else | |
256 | pio = 4; | |
257 | ||
258 | /* Load the PIO timing active/recovery bits */ | |
259 | artop6210_load_piomode(ap, adev, pio); | |
260 | ||
261 | pci_read_config_byte(pdev, 0x54, &ultra); | |
262 | ultra &= ~(3 << (2 * dn)); | |
263 | ||
264 | /* Add ultra DMA bits if in UDMA mode */ | |
265 | if (adev->dma_mode >= XFER_UDMA_0) { | |
266 | u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock; | |
267 | if (mode == 0) | |
268 | mode = 1; | |
269 | ultra |= (mode << (2 * dn)); | |
270 | } | |
271 | pci_write_config_byte(pdev, 0x54, ultra); | |
272 | } | |
273 | ||
274 | /** | |
275 | * artop6260_set_dmamode - Initialize host controller PATA PIO timings | |
276 | * @ap: Port whose timings we are configuring | |
277 | * @adev: Device we are configuring | |
278 | * | |
279 | * Set DMA mode for device, in host controller PCI config space. The | |
280 | * ARTOP6260 and relatives store the timing data differently. | |
281 | * | |
282 | * LOCKING: | |
283 | * None (inherited from caller). | |
284 | */ | |
285 | ||
286 | static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |
287 | { | |
288 | unsigned int pio = adev->pio_mode - XFER_PIO_0; | |
289 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
290 | u8 ultra; | |
291 | ||
292 | if (adev->dma_mode == XFER_MW_DMA_0) | |
293 | pio = 1; | |
294 | else | |
295 | pio = 4; | |
296 | ||
297 | /* Load the PIO timing active/recovery bits */ | |
298 | artop6260_load_piomode(ap, adev, pio); | |
299 | ||
300 | /* Add ultra DMA bits if in UDMA mode */ | |
301 | pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra); | |
302 | ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */ | |
303 | if (adev->dma_mode >= XFER_UDMA_0) { | |
304 | u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock; | |
305 | if (mode == 0) | |
306 | mode = 1; | |
307 | ultra |= (mode << (4 * adev->devno)); | |
308 | } | |
309 | pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra); | |
310 | } | |
311 | ||
312 | static struct scsi_host_template artop_sht = { | |
313 | .module = THIS_MODULE, | |
314 | .name = DRV_NAME, | |
315 | .ioctl = ata_scsi_ioctl, | |
316 | .queuecommand = ata_scsi_queuecmd, | |
317 | .can_queue = ATA_DEF_QUEUE, | |
318 | .this_id = ATA_SHT_THIS_ID, | |
319 | .sg_tablesize = LIBATA_MAX_PRD, | |
669a5db4 JG |
320 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
321 | .emulated = ATA_SHT_EMULATED, | |
322 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
323 | .proc_name = DRV_NAME, | |
324 | .dma_boundary = ATA_DMA_BOUNDARY, | |
325 | .slave_configure = ata_scsi_slave_config, | |
afdfe899 | 326 | .slave_destroy = ata_scsi_slave_destroy, |
669a5db4 JG |
327 | .bios_param = ata_std_bios_param, |
328 | }; | |
329 | ||
330 | static const struct ata_port_operations artop6210_ops = { | |
331 | .port_disable = ata_port_disable, | |
332 | .set_piomode = artop6210_set_piomode, | |
333 | .set_dmamode = artop6210_set_dmamode, | |
334 | .mode_filter = ata_pci_default_filter, | |
335 | ||
336 | .tf_load = ata_tf_load, | |
337 | .tf_read = ata_tf_read, | |
338 | .check_status = ata_check_status, | |
339 | .exec_command = ata_exec_command, | |
340 | .dev_select = ata_std_dev_select, | |
341 | ||
342 | .freeze = ata_bmdma_freeze, | |
343 | .thaw = ata_bmdma_thaw, | |
344 | .error_handler = artop6210_error_handler, | |
345 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
a73984a0 | 346 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
347 | |
348 | .bmdma_setup = ata_bmdma_setup, | |
349 | .bmdma_start = ata_bmdma_start, | |
350 | .bmdma_stop = ata_bmdma_stop, | |
351 | .bmdma_status = ata_bmdma_status, | |
352 | .qc_prep = ata_qc_prep, | |
353 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 354 | |
0d5ff566 | 355 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
356 | |
357 | .irq_handler = ata_interrupt, | |
358 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
359 | .irq_on = ata_irq_on, |
360 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
361 | |
362 | .port_start = ata_port_start, | |
669a5db4 JG |
363 | }; |
364 | ||
365 | static const struct ata_port_operations artop6260_ops = { | |
366 | .port_disable = ata_port_disable, | |
367 | .set_piomode = artop6260_set_piomode, | |
368 | .set_dmamode = artop6260_set_dmamode, | |
369 | ||
370 | .tf_load = ata_tf_load, | |
371 | .tf_read = ata_tf_read, | |
372 | .check_status = ata_check_status, | |
373 | .exec_command = ata_exec_command, | |
374 | .dev_select = ata_std_dev_select, | |
375 | ||
376 | .freeze = ata_bmdma_freeze, | |
377 | .thaw = ata_bmdma_thaw, | |
378 | .error_handler = artop6260_error_handler, | |
379 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
a73984a0 | 380 | .cable_detect = artop6260_cable_detect, |
669a5db4 JG |
381 | |
382 | .bmdma_setup = ata_bmdma_setup, | |
383 | .bmdma_start = ata_bmdma_start, | |
384 | .bmdma_stop = ata_bmdma_stop, | |
385 | .bmdma_status = ata_bmdma_status, | |
386 | .qc_prep = ata_qc_prep, | |
387 | .qc_issue = ata_qc_issue_prot, | |
0d5ff566 | 388 | .data_xfer = ata_data_xfer, |
669a5db4 | 389 | |
669a5db4 JG |
390 | .irq_handler = ata_interrupt, |
391 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
392 | .irq_on = ata_irq_on, |
393 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
394 | |
395 | .port_start = ata_port_start, | |
669a5db4 JG |
396 | }; |
397 | ||
398 | ||
399 | /** | |
400 | * artop_init_one - Register ARTOP ATA PCI device with kernel services | |
401 | * @pdev: PCI device to register | |
402 | * @ent: Entry in artop_pci_tbl matching with @pdev | |
403 | * | |
404 | * Called from kernel PCI layer. | |
405 | * | |
406 | * LOCKING: | |
407 | * Inherited from PCI layer (may sleep). | |
408 | * | |
409 | * RETURNS: | |
410 | * Zero on success, or -ERRNO value. | |
411 | */ | |
412 | ||
413 | static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) | |
414 | { | |
415 | static int printed_version; | |
416 | static struct ata_port_info info_6210 = { | |
417 | .sht = &artop_sht, | |
418 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
419 | .pio_mask = 0x1f, /* pio0-4 */ | |
420 | .mwdma_mask = 0x07, /* mwdma0-2 */ | |
421 | .udma_mask = ATA_UDMA2, | |
422 | .port_ops = &artop6210_ops, | |
423 | }; | |
424 | static struct ata_port_info info_626x = { | |
425 | .sht = &artop_sht, | |
426 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
427 | .pio_mask = 0x1f, /* pio0-4 */ | |
428 | .mwdma_mask = 0x07, /* mwdma0-2 */ | |
429 | .udma_mask = ATA_UDMA4, | |
430 | .port_ops = &artop6260_ops, | |
431 | }; | |
432 | static struct ata_port_info info_626x_fast = { | |
433 | .sht = &artop_sht, | |
434 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
435 | .pio_mask = 0x1f, /* pio0-4 */ | |
436 | .mwdma_mask = 0x07, /* mwdma0-2 */ | |
437 | .udma_mask = ATA_UDMA5, | |
438 | .port_ops = &artop6260_ops, | |
439 | }; | |
440 | struct ata_port_info *port_info[2]; | |
15a7c3bb | 441 | struct ata_port_info *info = NULL; |
669a5db4 JG |
442 | int ports = 2; |
443 | ||
444 | if (!printed_version++) | |
445 | dev_printk(KERN_DEBUG, &pdev->dev, | |
446 | "version " DRV_VERSION "\n"); | |
447 | ||
448 | if (id->driver_data == 0) { /* 6210 variant */ | |
449 | info = &info_6210; | |
450 | /* BIOS may have left us in UDMA, clear it before libata probe */ | |
451 | pci_write_config_byte(pdev, 0x54, 0); | |
452 | /* For the moment (also lacks dsc) */ | |
453 | printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n"); | |
454 | printk(KERN_WARNING "Secondary ATA ports will not be activated.\n"); | |
455 | ports = 1; | |
456 | } | |
457 | else if (id->driver_data == 1) /* 6260 */ | |
458 | info = &info_626x; | |
459 | else if (id->driver_data == 2) { /* 6260 or 6260 + fast */ | |
460 | unsigned long io = pci_resource_start(pdev, 4); | |
461 | u8 reg; | |
462 | ||
463 | info = &info_626x; | |
464 | if (inb(io) & 0x10) | |
465 | info = &info_626x_fast; | |
466 | /* Mac systems come up with some registers not set as we | |
467 | will need them */ | |
468 | ||
469 | /* Clear reset & test bits */ | |
470 | pci_read_config_byte(pdev, 0x49, ®); | |
471 | pci_write_config_byte(pdev, 0x49, reg & ~ 0x30); | |
472 | ||
473 | /* PCI latency must be > 0x80 for burst mode, tweak it | |
474 | * if required. | |
475 | */ | |
476 | pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®); | |
477 | if (reg <= 0x80) | |
478 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90); | |
479 | ||
480 | /* Enable IRQ output and burst mode */ | |
481 | pci_read_config_byte(pdev, 0x4a, ®); | |
482 | pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80); | |
483 | ||
484 | } | |
15a7c3bb JG |
485 | |
486 | BUG_ON(info == NULL); | |
487 | ||
669a5db4 JG |
488 | port_info[0] = port_info[1] = info; |
489 | return ata_pci_init_one(pdev, port_info, ports); | |
490 | } | |
491 | ||
492 | static const struct pci_device_id artop_pci_tbl[] = { | |
2d2744fc JG |
493 | { PCI_VDEVICE(ARTOP, 0x0005), 0 }, |
494 | { PCI_VDEVICE(ARTOP, 0x0006), 1 }, | |
495 | { PCI_VDEVICE(ARTOP, 0x0007), 1 }, | |
496 | { PCI_VDEVICE(ARTOP, 0x0008), 2 }, | |
497 | { PCI_VDEVICE(ARTOP, 0x0009), 2 }, | |
498 | ||
669a5db4 JG |
499 | { } /* terminate list */ |
500 | }; | |
501 | ||
502 | static struct pci_driver artop_pci_driver = { | |
503 | .name = DRV_NAME, | |
504 | .id_table = artop_pci_tbl, | |
505 | .probe = artop_init_one, | |
506 | .remove = ata_pci_remove_one, | |
507 | }; | |
508 | ||
509 | static int __init artop_init(void) | |
510 | { | |
511 | return pci_register_driver(&artop_pci_driver); | |
512 | } | |
513 | ||
514 | static void __exit artop_exit(void) | |
515 | { | |
516 | pci_unregister_driver(&artop_pci_driver); | |
517 | } | |
518 | ||
669a5db4 JG |
519 | module_init(artop_init); |
520 | module_exit(artop_exit); | |
521 | ||
522 | MODULE_AUTHOR("Alan Cox"); | |
523 | MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA"); | |
524 | MODULE_LICENSE("GPL"); | |
525 | MODULE_DEVICE_TABLE(pci, artop_pci_tbl); | |
526 | MODULE_VERSION(DRV_VERSION); | |
527 |