Commit | Line | Data |
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b2248dac AC |
1 | /* |
2 | * pata_cmd640.c - CMD640 PCI PATA for new ATA layer | |
3 | * (C) 2007 Red Hat Inc | |
4 | * Alan Cox <alan@redhat.com> | |
5 | * | |
6 | * Based upon | |
7 | * linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996 | |
8 | * | |
9 | * Copyright (C) 1995-1996 Linus Torvalds & authors (see driver) | |
10 | * | |
11 | * This drives only the PCI version of the controller. If you have a | |
12 | * VLB one then we have enough docs to support it but you can write | |
13 | * your own code. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/blkdev.h> | |
21 | #include <linux/delay.h> | |
22 | #include <scsi/scsi_host.h> | |
23 | #include <linux/libata.h> | |
24 | ||
25 | #define DRV_NAME "pata_cmd640" | |
7938a72d | 26 | #define DRV_VERSION "0.0.5" |
b2248dac AC |
27 | |
28 | struct cmd640_reg { | |
29 | int last; | |
30 | u8 reg58[ATA_MAX_DEVICES]; | |
31 | }; | |
32 | ||
33 | enum { | |
34 | CFR = 0x50, | |
35 | CNTRL = 0x51, | |
36 | CMDTIM = 0x52, | |
37 | ARTIM0 = 0x53, | |
38 | DRWTIM0 = 0x54, | |
39 | ARTIM23 = 0x57, | |
40 | DRWTIM23 = 0x58, | |
41 | BRST = 0x59 | |
42 | }; | |
43 | ||
44 | /** | |
45 | * cmd640_set_piomode - set initial PIO mode data | |
7938a72d | 46 | * @ap: ATA port |
b2248dac AC |
47 | * @adev: ATA device |
48 | * | |
49 | * Called to do the PIO mode setup. | |
50 | */ | |
51 | ||
52 | static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
53 | { | |
54 | struct cmd640_reg *timing = ap->private_data; | |
55 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
56 | struct ata_timing t; | |
57 | const unsigned long T = 1000000 / 33; | |
58 | const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 }; | |
59 | u8 reg; | |
60 | int arttim = ARTIM0 + 2 * adev->devno; | |
61 | struct ata_device *pair = ata_dev_pair(adev); | |
62 | ||
63 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) { | |
64 | printk(KERN_ERR DRV_NAME ": mode computation failed.\n"); | |
65 | return; | |
66 | } | |
67 | ||
68 | /* The second channel has shared timings and the setup timing is | |
69 | messy to switch to merge it for worst case */ | |
70 | if (ap->port_no && pair) { | |
71 | struct ata_timing p; | |
72 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
73 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP); | |
74 | } | |
75 | ||
76 | /* Make the timings fit */ | |
77 | if (t.recover > 16) { | |
78 | t.active += t.recover - 16; | |
79 | t.recover = 16; | |
80 | } | |
81 | if (t.active > 16) | |
82 | t.active = 16; | |
83 | ||
84 | /* Now convert the clocks into values we can actually stuff into | |
85 | the chip */ | |
86 | ||
87 | if (t.recover > 1) | |
88 | t.recover--; /* 640B only */ | |
89 | else | |
90 | t.recover = 15; | |
91 | ||
92 | if (t.setup > 4) | |
93 | t.setup = 0xC0; | |
94 | else | |
95 | t.setup = setup_data[t.setup]; | |
96 | ||
97 | if (ap->port_no == 0) { | |
98 | t.active &= 0x0F; /* 0 = 16 */ | |
99 | ||
100 | /* Load setup timing */ | |
101 | pci_read_config_byte(pdev, arttim, ®); | |
102 | reg &= 0x3F; | |
103 | reg |= t.setup; | |
104 | pci_write_config_byte(pdev, arttim, reg); | |
105 | ||
106 | /* Load active/recovery */ | |
107 | pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover); | |
108 | } else { | |
109 | /* Save the shared timings for channel, they will be loaded | |
9363c382 TH |
110 | by qc_issue. Reloading the setup time is expensive so we |
111 | keep a merged one loaded */ | |
b2248dac AC |
112 | pci_read_config_byte(pdev, ARTIM23, ®); |
113 | reg &= 0x3F; | |
114 | reg |= t.setup; | |
115 | pci_write_config_byte(pdev, ARTIM23, reg); | |
116 | timing->reg58[adev->devno] = (t.active << 4) | t.recover; | |
117 | } | |
118 | } | |
119 | ||
120 | ||
121 | /** | |
9363c382 | 122 | * cmd640_qc_issue - command preparation hook |
b2248dac AC |
123 | * @qc: Command to be issued |
124 | * | |
125 | * Channel 1 has shared timings. We must reprogram the | |
126 | * clock each drive 2/3 switch we do. | |
127 | */ | |
128 | ||
9363c382 | 129 | static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc) |
b2248dac AC |
130 | { |
131 | struct ata_port *ap = qc->ap; | |
132 | struct ata_device *adev = qc->dev; | |
133 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
134 | struct cmd640_reg *timing = ap->private_data; | |
135 | ||
136 | if (ap->port_no != 0 && adev->devno != timing->last) { | |
137 | pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]); | |
138 | timing->last = adev->devno; | |
139 | } | |
9363c382 | 140 | return ata_sff_qc_issue(qc); |
b2248dac AC |
141 | } |
142 | ||
143 | /** | |
144 | * cmd640_port_start - port setup | |
145 | * @ap: ATA port being set up | |
146 | * | |
147 | * The CMD640 needs to maintain private data structures so we | |
148 | * allocate space here. | |
149 | */ | |
150 | ||
151 | static int cmd640_port_start(struct ata_port *ap) | |
152 | { | |
153 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
154 | struct cmd640_reg *timing; | |
155 | ||
81ad1837 | 156 | int ret = ata_sff_port_start(ap); |
b2248dac AC |
157 | if (ret < 0) |
158 | return ret; | |
159 | ||
160 | timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL); | |
161 | if (timing == NULL) | |
162 | return -ENOMEM; | |
163 | timing->last = -1; /* Force a load */ | |
164 | ap->private_data = timing; | |
165 | return ret; | |
166 | } | |
167 | ||
168 | static struct scsi_host_template cmd640_sht = { | |
68d1d07b | 169 | ATA_BMDMA_SHT(DRV_NAME), |
b2248dac AC |
170 | }; |
171 | ||
172 | static struct ata_port_operations cmd640_port_ops = { | |
029cfd6b TH |
173 | .inherits = &ata_bmdma_port_ops, |
174 | /* In theory xfer_noirq is not needed once we kill the prefetcher */ | |
5682ed33 | 175 | .sff_data_xfer = ata_sff_data_xfer_noirq, |
9363c382 | 176 | .qc_issue = cmd640_qc_issue, |
029cfd6b TH |
177 | .cable_detect = ata_cable_40wire, |
178 | .set_piomode = cmd640_set_piomode, | |
b2248dac AC |
179 | .port_start = cmd640_port_start, |
180 | }; | |
181 | ||
7938a72d | 182 | static void cmd640_hardware_init(struct pci_dev *pdev) |
b2248dac AC |
183 | { |
184 | u8 r; | |
185 | u8 ctrl; | |
186 | ||
b2248dac | 187 | /* CMD640 detected, commiserations */ |
7938a72d | 188 | pci_write_config_byte(pdev, 0x5B, 0x00); |
b2248dac AC |
189 | /* Get version info */ |
190 | pci_read_config_byte(pdev, CFR, &r); | |
191 | /* PIO0 command cycles */ | |
192 | pci_write_config_byte(pdev, CMDTIM, 0); | |
193 | /* 512 byte bursts (sector) */ | |
194 | pci_write_config_byte(pdev, BRST, 0x40); | |
a617c09f | 195 | /* |
b2248dac AC |
196 | * A reporter a long time ago |
197 | * Had problems with the data fifo | |
198 | * So don't run the risk | |
199 | * Of putting crap on the disk | |
200 | * For its better just to go slow | |
201 | */ | |
202 | /* Do channel 0 */ | |
203 | pci_read_config_byte(pdev, CNTRL, &ctrl); | |
204 | pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0); | |
205 | /* Ditto for channel 1 */ | |
206 | pci_read_config_byte(pdev, ARTIM23, &ctrl); | |
207 | ctrl |= 0x0C; | |
208 | pci_write_config_byte(pdev, ARTIM23, ctrl); | |
7938a72d AC |
209 | } |
210 | ||
211 | static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
212 | { | |
1626aeb8 | 213 | static const struct ata_port_info info = { |
1d2808fd | 214 | .flags = ATA_FLAG_SLAVE_POSS, |
7938a72d AC |
215 | .pio_mask = 0x1f, |
216 | .port_ops = &cmd640_port_ops | |
217 | }; | |
1626aeb8 | 218 | const struct ata_port_info *ppi[] = { &info, NULL }; |
f08048e9 TH |
219 | int rc; |
220 | ||
221 | rc = pcim_enable_device(pdev); | |
222 | if (rc) | |
223 | return rc; | |
b2248dac | 224 | |
7938a72d | 225 | cmd640_hardware_init(pdev); |
f08048e9 | 226 | |
9363c382 | 227 | return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL); |
b2248dac AC |
228 | } |
229 | ||
f08048e9 | 230 | #ifdef CONFIG_PM |
b2248dac AC |
231 | static int cmd640_reinit_one(struct pci_dev *pdev) |
232 | { | |
f08048e9 TH |
233 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
234 | int rc; | |
235 | ||
236 | rc = ata_pci_device_do_resume(pdev); | |
237 | if (rc) | |
238 | return rc; | |
7938a72d | 239 | cmd640_hardware_init(pdev); |
f08048e9 | 240 | ata_host_resume(host); |
4b22afd7 | 241 | return 0; |
b2248dac | 242 | } |
f08048e9 | 243 | #endif |
b2248dac AC |
244 | |
245 | static const struct pci_device_id cmd640[] = { | |
246 | { PCI_VDEVICE(CMD, 0x640), 0 }, | |
247 | { }, | |
248 | }; | |
249 | ||
250 | static struct pci_driver cmd640_pci_driver = { | |
251 | .name = DRV_NAME, | |
252 | .id_table = cmd640, | |
253 | .probe = cmd640_init_one, | |
254 | .remove = ata_pci_remove_one, | |
4b22afd7 | 255 | #ifdef CONFIG_PM |
b2248dac AC |
256 | .suspend = ata_pci_device_suspend, |
257 | .resume = cmd640_reinit_one, | |
f08048e9 | 258 | #endif |
b2248dac AC |
259 | }; |
260 | ||
261 | static int __init cmd640_init(void) | |
262 | { | |
263 | return pci_register_driver(&cmd640_pci_driver); | |
264 | } | |
265 | ||
266 | static void __exit cmd640_exit(void) | |
267 | { | |
268 | pci_unregister_driver(&cmd640_pci_driver); | |
269 | } | |
270 | ||
271 | MODULE_AUTHOR("Alan Cox"); | |
272 | MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers"); | |
273 | MODULE_LICENSE("GPL"); | |
274 | MODULE_DEVICE_TABLE(pci, cmd640); | |
275 | MODULE_VERSION(DRV_VERSION); | |
276 | ||
277 | module_init(cmd640_init); | |
278 | module_exit(cmd640_exit); |