[deliverable/linux.git] / drivers / ata / pata_cmd640.c

/*
 * pata_cmd640.c 	- CMD640 PCI PATA for new ATA layer
 *			  (C) 2007 Red Hat Inc
 *			  Alan Cox <alan@redhat.com>
 *
 * Based upon
 *  linux/drivers/ide/pci/cmd640.c		Version 1.02  Sep 01, 1996
 *
 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see driver)
 *
 *	This drives only the PCI version of the controller. If you have a
 *	VLB one then we have enough docs to support it but you can write
 *	your own code.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME "pata_cmd640"
#define DRV_VERSION "0.0.5"

struct cmd640_reg {
	int last;
	u8 reg58[ATA_MAX_DEVICES];
};

enum {
	CFR = 0x50,
	CNTRL = 0x51,
	CMDTIM = 0x52,
	ARTIM0 = 0x53,
	DRWTIM0 = 0x54,
	ARTIM23 = 0x57,
	DRWTIM23 = 0x58,
	BRST = 0x59
};

/**
 *	cmd640_set_piomode	-	set initial PIO mode data
 *	@ap: ATA port
 *	@adev: ATA device
 *
 *	Called to do the PIO mode setup.
 */

static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct cmd640_reg *timing = ap->private_data;
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct ata_timing t;
	const unsigned long T = 1000000 / 33;
	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
	u8 reg;
	int arttim = ARTIM0 + 2 * adev->devno;
	struct ata_device *pair = ata_dev_pair(adev);

	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
		printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
		return;
	}

	/* The second channel has shared timings and the setup timing is
	   messy to switch to merge it for worst case */
	if (ap->port_no && pair) {
		struct ata_timing p;
		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
	}

	/* Make the timings fit */
	if (t.recover > 16) {
		t.active += t.recover - 16;
		t.recover = 16;
	}
	if (t.active > 16)
		t.active = 16;

	/* Now convert the clocks into values we can actually stuff into
	   the chip */

	if (t.recover > 1)
		t.recover--;	/* 640B only */
	else
		t.recover = 15;

	if (t.setup > 4)
		t.setup = 0xC0;
	else
		t.setup = setup_data[t.setup];

	if (ap->port_no == 0) {
		t.active &= 0x0F;	/* 0 = 16 */

		/* Load setup timing */
		pci_read_config_byte(pdev, arttim, &reg);
		reg &= 0x3F;
		reg |= t.setup;
		pci_write_config_byte(pdev, arttim, reg);

		/* Load active/recovery */
		pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
	} else {
		/* Save the shared timings for channel, they will be loaded
		   by qc_issue_prot. Reloading the setup time is expensive 
		   so we keep a merged one loaded */
		pci_read_config_byte(pdev, ARTIM23, &reg);
		reg &= 0x3F;
		reg |= t.setup;
		pci_write_config_byte(pdev, ARTIM23, reg);
		timing->reg58[adev->devno] = (t.active << 4) | t.recover;
	}
}


/**
 *	cmd640_qc_issue_prot	-	command preparation hook
 *	@qc: Command to be issued
 *
 *	Channel 1 has shared timings. We must reprogram the
 *	clock each drive 2/3 switch we do.
 */

static unsigned int cmd640_qc_issue_prot(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct cmd640_reg *timing = ap->private_data;

	if (ap->port_no != 0 && adev->devno != timing->last) {
		pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
		timing->last = adev->devno;
	}
	return ata_qc_issue_prot(qc);
}

/**
 *	cmd640_port_start	-	port setup
 *	@ap: ATA port being set up
 *
 *	The CMD640 needs to maintain private data structures so we
 *	allocate space here.
 */

static int cmd640_port_start(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct cmd640_reg *timing;

	int ret = ata_port_start(ap);
	if (ret < 0)
		return ret;

	timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
	if (timing == NULL)
		return -ENOMEM;
	timing->last = -1;	/* Force a load */
	ap->private_data = timing;
	return ret;
}

static struct scsi_host_template cmd640_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
	.resume			= ata_scsi_device_resume,
	.suspend		= ata_scsi_device_suspend,
};

static struct ata_port_operations cmd640_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= cmd640_set_piomode,
	.mode_filter	= ata_pci_default_filter,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= cmd640_qc_issue_prot,

	/* In theory this is not needed once we kill the prefetcher */
	.data_xfer	= ata_data_xfer_noirq,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,
	.irq_ack	= ata_irq_ack,

	.port_start	= cmd640_port_start,
};

static void cmd640_hardware_init(struct pci_dev *pdev)
{
	u8 r;
	u8 ctrl;

	/* CMD640 detected, commiserations */
	pci_write_config_byte(pdev, 0x5B, 0x00);
	/* Get version info */
	pci_read_config_byte(pdev, CFR, &r);
	/* PIO0 command cycles */
	pci_write_config_byte(pdev, CMDTIM, 0);
	/* 512 byte bursts (sector) */
	pci_write_config_byte(pdev, BRST, 0x40);
	/* 
	 * A reporter a long time ago
	 * Had problems with the data fifo
	 * So don't run the risk
	 * Of putting crap on the disk
	 * For its better just to go slow
	 */
	/* Do channel 0 */
	pci_read_config_byte(pdev, CNTRL, &ctrl);
	pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
	/* Ditto for channel 1 */
	pci_read_config_byte(pdev, ARTIM23, &ctrl);
	ctrl |= 0x0C;
	pci_write_config_byte(pdev, ARTIM23, ctrl);
}

static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
	static struct ata_port_info info = {
		.sht = &cmd640_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
		.pio_mask = 0x1f,
		.port_ops = &cmd640_port_ops
	};

	static struct ata_port_info *port_info[2] = { &info, &info };

	cmd640_hardware_init(pdev);
	return ata_pci_init_one(pdev, port_info, 2);
}

static int cmd640_reinit_one(struct pci_dev *pdev)
{
	cmd640_hardware_init(pdev);
	return ata_pci_device_resume(pdev);
}

static const struct pci_device_id cmd640[] = {
	{ PCI_VDEVICE(CMD, 0x640), 0 },
	{ },
};

static struct pci_driver cmd640_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= cmd640,
	.probe 		= cmd640_init_one,
	.remove		= ata_pci_remove_one,
	.suspend	= ata_pci_device_suspend,
	.resume		= cmd640_reinit_one,
};

static int __init cmd640_init(void)
{
	return pci_register_driver(&cmd640_pci_driver);
}

static void __exit cmd640_exit(void)
{
	pci_unregister_driver(&cmd640_pci_driver);
}

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, cmd640);
MODULE_VERSION(DRV_VERSION);

module_init(cmd640_init);
module_exit(cmd640_exit);
Commit	Line	Data
b2248dac AC	1	/*
	2	* pata_cmd640.c - CMD640 PCI PATA for new ATA layer
	3	* (C) 2007 Red Hat Inc
	4	* Alan Cox <alan@redhat.com>
	5	*
	6	* Based upon
	7	* linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996
	8	*
	9	* Copyright (C) 1995-1996 Linus Torvalds & authors (see driver)
	10	*
	11	* This drives only the PCI version of the controller. If you have a
	12	* VLB one then we have enough docs to support it but you can write
	13	* your own code.
	14	*/
	15
	16	#include <linux/kernel.h>
	17	#include <linux/module.h>
	18	#include <linux/pci.h>
	19	#include <linux/init.h>
	20	#include <linux/blkdev.h>
	21	#include <linux/delay.h>
	22	#include <scsi/scsi_host.h>
	23	#include <linux/libata.h>
	24
	25	#define DRV_NAME "pata_cmd640"
7938a72d	26	#define DRV_VERSION "0.0.5"
b2248dac AC	27
	28	struct cmd640_reg {
	29	int last;
	30	u8 reg58[ATA_MAX_DEVICES];
	31	};
	32
	33	enum {
	34	CFR = 0x50,
	35	CNTRL = 0x51,
	36	CMDTIM = 0x52,
	37	ARTIM0 = 0x53,
	38	DRWTIM0 = 0x54,
	39	ARTIM23 = 0x57,
	40	DRWTIM23 = 0x58,
	41	BRST = 0x59
	42	};
	43
	44	/**
	45	* cmd640_set_piomode - set initial PIO mode data
7938a72d	46	* @ap: ATA port
b2248dac AC	47	* @adev: ATA device
	48	*
	49	* Called to do the PIO mode setup.
	50	*/
	51
	52	static void cmd640_set_piomode(struct ata_port ap, struct ata_device adev)
	53	{
	54	struct cmd640_reg *timing = ap->private_data;
	55	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	56	struct ata_timing t;
	57	const unsigned long T = 1000000 / 33;
	58	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
	59	u8 reg;
	60	int arttim = ARTIM0 + 2 * adev->devno;
	61	struct ata_device *pair = ata_dev_pair(adev);
	62
	63	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
	64	printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
	65	return;
	66	}
	67
	68	/* The second channel has shared timings and the setup timing is
	69	messy to switch to merge it for worst case */
	70	if (ap->port_no && pair) {
	71	struct ata_timing p;
	72	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
	73	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
	74	}
	75
	76	/* Make the timings fit */
	77	if (t.recover > 16) {
	78	t.active += t.recover - 16;
	79	t.recover = 16;
	80	}
	81	if (t.active > 16)
	82	t.active = 16;
	83
	84	/* Now convert the clocks into values we can actually stuff into
	85	the chip */
	86
	87	if (t.recover > 1)
	88	t.recover--; /* 640B only */
	89	else
	90	t.recover = 15;
	91
	92	if (t.setup > 4)
	93	t.setup = 0xC0;
	94	else
	95	t.setup = setup_data[t.setup];
	96
	97	if (ap->port_no == 0) {
	98	t.active &= 0x0F; /* 0 = 16 */
	99
	100	/* Load setup timing */
	101	pci_read_config_byte(pdev, arttim, &reg);
	102	reg &= 0x3F;
	103	reg \|= t.setup;
	104	pci_write_config_byte(pdev, arttim, reg);
	105
	106	/* Load active/recovery */
	107	pci_write_config_byte(pdev, arttim + 1, (t.active << 4) \| t.recover);
	108	} else {
	109	/* Save the shared timings for channel, they will be loaded
7938a72d	110	by qc_issue_prot. Reloading the setup time is expensive
b2248dac AC	111	so we keep a merged one loaded */
	112	pci_read_config_byte(pdev, ARTIM23, &reg);
	113	reg &= 0x3F;
	114	reg \|= t.setup;
	115	pci_write_config_byte(pdev, ARTIM23, reg);
	116	timing->reg58[adev->devno] = (t.active << 4) \| t.recover;
	117	}
	118	}
	119
	120
	121	/**
	122	* cmd640_qc_issue_prot - command preparation hook
	123	* @qc: Command to be issued
	124	*
	125	* Channel 1 has shared timings. We must reprogram the
	126	* clock each drive 2/3 switch we do.
	127	*/
	128
	129	static unsigned int cmd640_qc_issue_prot(struct ata_queued_cmd *qc)
	130	{
	131	struct ata_port *ap = qc->ap;
	132	struct ata_device *adev = qc->dev;
	133	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	134	struct cmd640_reg *timing = ap->private_data;
	135
	136	if (ap->port_no != 0 && adev->devno != timing->last) {
	137	pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
	138	timing->last = adev->devno;
	139	}
	140	return ata_qc_issue_prot(qc);
	141	}
	142
	143	/**
	144	* cmd640_port_start - port setup
	145	* @ap: ATA port being set up
	146	*
	147	* The CMD640 needs to maintain private data structures so we
	148	* allocate space here.
	149	*/
	150
	151	static int cmd640_port_start(struct ata_port *ap)
	152	{
	153	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	154	struct cmd640_reg *timing;
	155
	156	int ret = ata_port_start(ap);
	157	if (ret < 0)
	158	return ret;
	159
	160	timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
	161	if (timing == NULL)
	162	return -ENOMEM;
	163	timing->last = -1; /* Force a load */
	164	ap->private_data = timing;
	165	return ret;
	166	}
	167
	168	static struct scsi_host_template cmd640_sht = {
	169	.module = THIS_MODULE,
	170	.name = DRV_NAME,
	171	.ioctl = ata_scsi_ioctl,
	172	.queuecommand = ata_scsi_queuecmd,
	173	.can_queue = ATA_DEF_QUEUE,
	174	.this_id = ATA_SHT_THIS_ID,
175	.sg_tablesize = LIBATA_MAX_PRD,
176	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
177	.emulated = ATA_SHT_EMULATED,
178	.use_clustering = ATA_SHT_USE_CLUSTERING,
179	.proc_name = DRV_NAME,
180	.dma_boundary = ATA_DMA_BOUNDARY,
181	.slave_configure = ata_scsi_slave_config,
182	.slave_destroy = ata_scsi_slave_destroy,
183	.bios_param = ata_std_bios_param,
184	.resume = ata_scsi_device_resume,
185	.suspend = ata_scsi_device_suspend,
186	};
187
188	static struct ata_port_operations cmd640_port_ops = {
189	.port_disable = ata_port_disable,
190	.set_piomode = cmd640_set_piomode,
191	.mode_filter = ata_pci_default_filter,
192	.tf_load = ata_tf_load,
193	.tf_read = ata_tf_read,
194	.check_status = ata_check_status,
195	.exec_command = ata_exec_command,
196	.dev_select = ata_std_dev_select,
197
198	.freeze = ata_bmdma_freeze,
199	.thaw = ata_bmdma_thaw,
200	.error_handler = ata_bmdma_error_handler,
201	.post_internal_cmd = ata_bmdma_post_internal_cmd,
202	.cable_detect = ata_cable_40wire,
203
204	.bmdma_setup = ata_bmdma_setup,
205	.bmdma_start = ata_bmdma_start,
206	.bmdma_stop = ata_bmdma_stop,
207	.bmdma_status = ata_bmdma_status,
208
209	.qc_prep = ata_qc_prep,
210	.qc_issue = cmd640_qc_issue_prot,
211
212	/* In theory this is not needed once we kill the prefetcher */
213	.data_xfer = ata_data_xfer_noirq,
214
215	.irq_handler = ata_interrupt,
216	.irq_clear = ata_bmdma_irq_clear,
217	.irq_on = ata_irq_on,
218	.irq_ack = ata_irq_ack,
219
220	.port_start = cmd640_port_start,
221	};
222
7938a72d	223	static void cmd640_hardware_init(struct pci_dev *pdev)
b2248dac AC	224	{
	225	u8 r;
	226	u8 ctrl;
	227
b2248dac	228	/* CMD640 detected, commiserations */
7938a72d	229	pci_write_config_byte(pdev, 0x5B, 0x00);
b2248dac AC	230	/* Get version info */
	231	pci_read_config_byte(pdev, CFR, &r);
	232	/* PIO0 command cycles */
	233	pci_write_config_byte(pdev, CMDTIM, 0);
	234	/* 512 byte bursts (sector) */
	235	pci_write_config_byte(pdev, BRST, 0x40);
7938a72d	236	/*
b2248dac AC	237	* A reporter a long time ago
	238	* Had problems with the data fifo
	239	* So don't run the risk
	240	* Of putting crap on the disk
	241	* For its better just to go slow
	242	*/
	243	/* Do channel 0 */
	244	pci_read_config_byte(pdev, CNTRL, &ctrl);
	245	pci_write_config_byte(pdev, CNTRL, ctrl \| 0xC0);
	246	/* Ditto for channel 1 */
	247	pci_read_config_byte(pdev, ARTIM23, &ctrl);
	248	ctrl \|= 0x0C;
	249	pci_write_config_byte(pdev, ARTIM23, ctrl);
7938a72d AC	250	}
	251
	252	static int cmd640_init_one(struct pci_dev pdev, const struct pci_device_id id)
	253	{
	254	static struct ata_port_info info = {
	255	.sht = &cmd640_sht,
	256	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST,
	257	.pio_mask = 0x1f,
	258	.port_ops = &cmd640_port_ops
	259	};
	260
	261	static struct ata_port_info *port_info[2] = { &info, &info };
b2248dac	262
7938a72d	263	cmd640_hardware_init(pdev);
b2248dac AC	264	return ata_pci_init_one(pdev, port_info, 2);
	265	}
	266
	267	static int cmd640_reinit_one(struct pci_dev *pdev)
	268	{
7938a72d	269	cmd640_hardware_init(pdev);
b2248dac AC	270	return ata_pci_device_resume(pdev);
	271	}
	272
	273	static const struct pci_device_id cmd640[] = {
	274	{ PCI_VDEVICE(CMD, 0x640), 0 },
	275	{ },
	276	};
	277
	278	static struct pci_driver cmd640_pci_driver = {
	279	.name = DRV_NAME,
	280	.id_table = cmd640,
	281	.probe = cmd640_init_one,
	282	.remove = ata_pci_remove_one,
	283	.suspend = ata_pci_device_suspend,
	284	.resume = cmd640_reinit_one,
	285	};
	286
	287	static int __init cmd640_init(void)
	288	{
	289	return pci_register_driver(&cmd640_pci_driver);
	290	}
	291
	292	static void __exit cmd640_exit(void)
	293	{
	294	pci_unregister_driver(&cmd640_pci_driver);
	295	}
	296
	297	MODULE_AUTHOR("Alan Cox");
	298	MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
	299	MODULE_LICENSE("GPL");
	300	MODULE_DEVICE_TABLE(pci, cmd640);
	301	MODULE_VERSION(DRV_VERSION);
	302
	303	module_init(cmd640_init);
	304	module_exit(cmd640_exit);