[deliverable/linux.git] / drivers / ata / pata_jmicron.c

/*
 *    pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
 *			PATA port of the controller. The SATA ports are
 *			driven by AHCI in the usual configuration although
 *			this driver can handle other setups if we need it.
 *
 *	(c) 2006 Red Hat  <alan@redhat.com>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/ata.h>

#define DRV_NAME	"pata_jmicron"
#define DRV_VERSION	"0.1.5"

typedef enum {
	PORT_PATA0 = 0,
	PORT_PATA1 = 1,
	PORT_SATA = 2,
} port_type;

/**
 *	jmicron_pre_reset	-	check for 40/80 pin
 *	@link: ATA link
 *	@deadline: deadline jiffies for the operation
 *
 *	Perform the PATA port setup we need.
 *
 *	On the Jmicron 361/363 there is a single PATA port that can be mapped
 *	either as primary or secondary (or neither). We don't do any policy
 *	and setup here. We assume that has been done by init_one and the
 *	BIOS.
 */
static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
{
	struct ata_port *ap = link->ap;
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u32 control;
	u32 control5;
	int port_mask = 1<< (4 * ap->port_no);
	int port = ap->port_no;
	port_type port_map[2];

	/* Check if our port is enabled */
	pci_read_config_dword(pdev, 0x40, &control);
	if ((control & port_mask) == 0)
		return -ENOENT;

	/* There are two basic mappings. One has the two SATA ports merged
	   as master/slave and the secondary as PATA, the other has only the
	   SATA port mapped */
	if (control & (1 << 23)) {
		port_map[0] = PORT_SATA;
		port_map[1] = PORT_PATA0;
	} else {
		port_map[0] = PORT_SATA;
		port_map[1] = PORT_SATA;
	}

	/* The 365/366 may have this bit set to map the second PATA port
	   as the internal primary channel */
	pci_read_config_dword(pdev, 0x80, &control5);
	if (control5 & (1<<24))
		port_map[0] = PORT_PATA1;

	/* The two ports may then be logically swapped by the firmware */
	if (control & (1 << 22))
		port = port ^ 1;

	/*
	 *	Now we know which physical port we are talking about we can
	 *	actually do our cable checking etc. Thankfully we don't need
	 *	to do the plumbing for other cases.
	 */
	switch (port_map[port]) {
	case PORT_PATA0:
		if ((control & (1 << 5)) == 0)
			return -ENOENT;
		if (control & (1 << 3))	/* 40/80 pin primary */
			ap->cbl = ATA_CBL_PATA40;
		else
			ap->cbl = ATA_CBL_PATA80;
		break;
	case PORT_PATA1:
		/* Bit 21 is set if the port is enabled */
		if ((control5 & (1 << 21)) == 0)
			return -ENOENT;
		if (control5 & (1 << 19))	/* 40/80 pin secondary */
			ap->cbl = ATA_CBL_PATA40;
		else
			ap->cbl = ATA_CBL_PATA80;
		break;
	case PORT_SATA:
		ap->cbl = ATA_CBL_SATA;
		break;
	}
	return ata_std_prereset(link, deadline);
}

/**
 *	jmicron_error_handler - Setup and error handler
 *	@ap: Port to handle
 *
 *	LOCKING:
 *	None (inherited from caller).
 */

static void jmicron_error_handler(struct ata_port *ap)
{
	ata_bmdma_drive_eh(ap, jmicron_pre_reset, ata_std_softreset, NULL,
			   ata_std_postreset);
}

/* No PIO or DMA methods needed for this device */

static struct scsi_host_template jmicron_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	/* Use standard CHS mapping rules */
	.bios_param		= ata_std_bios_param,
};

static const struct ata_port_operations jmicron_ops = {
	/* Task file is PCI ATA format, use helpers */
	.tf_load		= ata_tf_load,
	.tf_read		= ata_tf_read,
	.check_status		= ata_check_status,
	.exec_command		= ata_exec_command,
	.dev_select		= ata_std_dev_select,

	.mode_filter		= ata_pci_default_filter,
	.freeze			= ata_bmdma_freeze,
	.thaw			= ata_bmdma_thaw,
	.error_handler		= jmicron_error_handler,
	.post_internal_cmd	= ata_bmdma_post_internal_cmd,

	/* BMDMA handling is PCI ATA format, use helpers */
	.bmdma_setup		= ata_bmdma_setup,
	.bmdma_start		= ata_bmdma_start,
	.bmdma_stop		= ata_bmdma_stop,
	.bmdma_status		= ata_bmdma_status,
	.qc_prep		= ata_qc_prep,
	.qc_issue		= ata_qc_issue_prot,
	.data_xfer		= ata_data_xfer,

	/* IRQ-related hooks */
	.irq_handler		= ata_interrupt,
	.irq_clear		= ata_bmdma_irq_clear,
	.irq_on			= ata_irq_on,

	/* Generic PATA PCI ATA helpers */
	.port_start		= ata_sff_port_start,
};


/**
 *	jmicron_init_one - Register Jmicron ATA PCI device with kernel services
 *	@pdev: PCI device to register
 *	@ent: Entry in jmicron_pci_tbl matching with @pdev
 *
 *	Called from kernel PCI layer.
 *
 *	LOCKING:
 *	Inherited from PCI layer (may sleep).
 *
 *	RETURNS:
 *	Zero on success, or -ERRNO value.
 */

static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
{
	static const struct ata_port_info info = {
		.sht		= &jmicron_sht,
		.flags	= ATA_FLAG_SLAVE_POSS,

		.pio_mask	= 0x1f,
		.mwdma_mask	= 0x07,
		.udma_mask 	= ATA_UDMA5,

		.port_ops	= &jmicron_ops,
	};
	const struct ata_port_info *ppi[] = { &info, NULL };

	return ata_pci_init_one(pdev, ppi);
}

static const struct pci_device_id jmicron_pci_tbl[] = {
	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
	  PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
	{ }	/* terminate list */
};

static struct pci_driver jmicron_pci_driver = {
	.name			= DRV_NAME,
	.id_table		= jmicron_pci_tbl,
	.probe			= jmicron_init_one,
	.remove			= ata_pci_remove_one,
#ifdef CONFIG_PM
	.suspend		= ata_pci_device_suspend,
	.resume			= ata_pci_device_resume,
#endif
};

static int __init jmicron_init(void)
{
	return pci_register_driver(&jmicron_pci_driver);
}

static void __exit jmicron_exit(void)
{
	pci_unregister_driver(&jmicron_pci_driver);
}

module_init(jmicron_init);
module_exit(jmicron_exit);

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
	3	* PATA port of the controller. The SATA ports are
	4	* driven by AHCI in the usual configuration although
	5	* this driver can handle other setups if we need it.
	6	*
	7	* (c) 2006 Red Hat <alan@redhat.com>
	8	*/
	9
	10	#include <linux/kernel.h>
	11	#include <linux/module.h>
	12	#include <linux/pci.h>
	13	#include <linux/init.h>
	14	#include <linux/blkdev.h>
	15	#include <linux/delay.h>
	16	#include <linux/device.h>
	17	#include <scsi/scsi_host.h>
	18	#include <linux/libata.h>
	19	#include <linux/ata.h>
	20
	21	#define DRV_NAME "pata_jmicron"
8bc3fc47	22	#define DRV_VERSION "0.1.5"
669a5db4 JG	23
	24	typedef enum {
	25	PORT_PATA0 = 0,
	26	PORT_PATA1 = 1,
	27	PORT_SATA = 2,
	28	} port_type;
	29
	30	/**
	31	* jmicron_pre_reset - check for 40/80 pin
cc0680a5	32	* @link: ATA link
d4b2bab4	33	* @deadline: deadline jiffies for the operation
669a5db4 JG	34	*
669a5db4 JG	35	* Perform the PATA port setup we need.
d4b2bab4	36	*
669a5db4 JG	37	* On the Jmicron 361/363 there is a single PATA port that can be mapped
	38	* either as primary or secondary (or neither). We don't do any policy
	39	* and setup here. We assume that has been done by init_one and the
	40	* BIOS.
	41	*/
cc0680a5	42	static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
669a5db4	43	{
cc0680a5	44	struct ata_port *ap = link->ap;
669a5db4 JG	45	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	46	u32 control;
	47	u32 control5;
	48	int port_mask = 1<< (4 * ap->port_no);
	49	int port = ap->port_no;
	50	port_type port_map[2];
	51
	52	/* Check if our port is enabled */
	53	pci_read_config_dword(pdev, 0x40, &control);
	54	if ((control & port_mask) == 0)
c961922b	55	return -ENOENT;
669a5db4 JG	56
	57	/* There are two basic mappings. One has the two SATA ports merged
	58	as master/slave and the secondary as PATA, the other has only the
	59	SATA port mapped */
	60	if (control & (1 << 23)) {
	61	port_map[0] = PORT_SATA;
	62	port_map[1] = PORT_PATA0;
	63	} else {
	64	port_map[0] = PORT_SATA;
	65	port_map[1] = PORT_SATA;
	66	}
	67
	68	/* The 365/366 may have this bit set to map the second PATA port
	69	as the internal primary channel */
	70	pci_read_config_dword(pdev, 0x80, &control5);
	71	if (control5 & (1<<24))
	72	port_map[0] = PORT_PATA1;
	73
	74	/* The two ports may then be logically swapped by the firmware */
	75	if (control & (1 << 22))
	76	port = port ^ 1;
	77
	78	/*
	79	* Now we know which physical port we are talking about we can
	80	* actually do our cable checking etc. Thankfully we don't need
	81	* to do the plumbing for other cases.
	82	*/
0706efd6	83	switch (port_map[port]) {
669a5db4	84	case PORT_PATA0:
0706efd6 TH	85	if ((control & (1 << 5)) == 0)
0706efd6 TH	86	return -ENOENT;
669a5db4 JG	87	if (control & (1 << 3)) /* 40/80 pin primary */
	88	ap->cbl = ATA_CBL_PATA40;
	89	else
	90	ap->cbl = ATA_CBL_PATA80;
	91	break;
	92	case PORT_PATA1:
	93	/* Bit 21 is set if the port is enabled */
	94	if ((control5 & (1 << 21)) == 0)
0706efd6	95	return -ENOENT;
669a5db4 JG	96	if (control5 & (1 << 19)) /* 40/80 pin secondary */
	97	ap->cbl = ATA_CBL_PATA40;
	98	else
	99	ap->cbl = ATA_CBL_PATA80;
	100	break;
	101	case PORT_SATA:
	102	ap->cbl = ATA_CBL_SATA;
	103	break;
	104	}
cc0680a5	105	return ata_std_prereset(link, deadline);
669a5db4 JG	106	}
	107
	108	/**
	109	* jmicron_error_handler - Setup and error handler
	110	* @ap: Port to handle
	111	*
	112	* LOCKING:
	113	* None (inherited from caller).
	114	*/
	115
	116	static void jmicron_error_handler(struct ata_port *ap)
	117	{
ef2f2e49 HH	118	ata_bmdma_drive_eh(ap, jmicron_pre_reset, ata_std_softreset, NULL,
ef2f2e49 HH	119	ata_std_postreset);
669a5db4 JG	120	}
	121
	122	/* No PIO or DMA methods needed for this device */
	123
	124	static struct scsi_host_template jmicron_sht = {
	125	.module = THIS_MODULE,
	126	.name = DRV_NAME,
	127	.ioctl = ata_scsi_ioctl,
	128	.queuecommand = ata_scsi_queuecmd,
	129	.can_queue = ATA_DEF_QUEUE,
	130	.this_id = ATA_SHT_THIS_ID,
	131	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	132	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	133	.emulated = ATA_SHT_EMULATED,
	134	.use_clustering = ATA_SHT_USE_CLUSTERING,
	135	.proc_name = DRV_NAME,
	136	.dma_boundary = ATA_DMA_BOUNDARY,
	137	.slave_configure = ata_scsi_slave_config,
afdfe899	138	.slave_destroy = ata_scsi_slave_destroy,
669a5db4 JG	139	/* Use standard CHS mapping rules */
	140	.bios_param = ata_std_bios_param,
	141	};
	142
	143	static const struct ata_port_operations jmicron_ops = {
669a5db4 JG	144	/* Task file is PCI ATA format, use helpers */
	145	.tf_load = ata_tf_load,
	146	.tf_read = ata_tf_read,
	147	.check_status = ata_check_status,
	148	.exec_command = ata_exec_command,
	149	.dev_select = ata_std_dev_select,
	150
6bd99b4e	151	.mode_filter = ata_pci_default_filter,
669a5db4 JG	152	.freeze = ata_bmdma_freeze,
	153	.thaw = ata_bmdma_thaw,
	154	.error_handler = jmicron_error_handler,
	155	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	156
	157	/* BMDMA handling is PCI ATA format, use helpers */
	158	.bmdma_setup = ata_bmdma_setup,
	159	.bmdma_start = ata_bmdma_start,
	160	.bmdma_stop = ata_bmdma_stop,
	161	.bmdma_status = ata_bmdma_status,
	162	.qc_prep = ata_qc_prep,
	163	.qc_issue = ata_qc_issue_prot,
0d5ff566	164	.data_xfer = ata_data_xfer,
669a5db4	165
bda30288	166	/* IRQ-related hooks */
669a5db4 JG	167	.irq_handler = ata_interrupt,
669a5db4 JG	168	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	169	.irq_on = ata_irq_on,
669a5db4 JG	170
669a5db4 JG	171	/* Generic PATA PCI ATA helpers */
6bd99b4e	172	.port_start = ata_sff_port_start,
669a5db4 JG	173	};
	174
	175
	176	/**
	177	* jmicron_init_one - Register Jmicron ATA PCI device with kernel services
	178	* @pdev: PCI device to register
	179	* @ent: Entry in jmicron_pci_tbl matching with @pdev
	180	*
	181	* Called from kernel PCI layer.
	182	*
	183	* LOCKING:
	184	* Inherited from PCI layer (may sleep).
	185	*
	186	* RETURNS:
	187	* Zero on success, or -ERRNO value.
	188	*/
	189
	190	static int jmicron_init_one (struct pci_dev pdev, const struct pci_device_id id)
	191	{
1626aeb8	192	static const struct ata_port_info info = {
669a5db4	193	.sht = &jmicron_sht,
1d2808fd	194	.flags = ATA_FLAG_SLAVE_POSS,
669a5db4 JG	195
	196	.pio_mask = 0x1f,
	197	.mwdma_mask = 0x07,
bf6263a8	198	.udma_mask = ATA_UDMA5,
669a5db4 JG	199
	200	.port_ops = &jmicron_ops,
	201	};
1626aeb8	202	const struct ata_port_info *ppi[] = { &info, NULL };
669a5db4	203
1626aeb8	204	return ata_pci_init_one(pdev, ppi);
669a5db4 JG	205	}
	206
	207	static const struct pci_device_id jmicron_pci_tbl[] = {
a01f48b8 TH	208	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
a01f48b8 TH	209	PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
669a5db4 JG	210	{ } /* terminate list */
	211	};
	212
	213	static struct pci_driver jmicron_pci_driver = {
	214	.name = DRV_NAME,
	215	.id_table = jmicron_pci_tbl,
	216	.probe = jmicron_init_one,
	217	.remove = ata_pci_remove_one,
438ac6d5	218	#ifdef CONFIG_PM
d39ca896	219	.suspend = ata_pci_device_suspend,
960627b7	220	.resume = ata_pci_device_resume,
438ac6d5	221	#endif
669a5db4 JG	222	};
	223
	224	static int __init jmicron_init(void)
	225	{
	226	return pci_register_driver(&jmicron_pci_driver);
	227	}
	228
	229	static void __exit jmicron_exit(void)
	230	{
	231	pci_unregister_driver(&jmicron_pci_driver);
	232	}
	233
	234	module_init(jmicron_init);
	235	module_exit(jmicron_exit);
	236
	237	MODULE_AUTHOR("Alan Cox");
	238	MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
	239	MODULE_LICENSE("GPL");
	240	MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
	241	MODULE_VERSION(DRV_VERSION);
	242