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a20c9e82 PM |
1 | /* |
2 | * Generic platform device PATA driver | |
3 | * | |
4 | * Copyright (C) 2006 Paul Mundt | |
5 | * | |
6 | * Based on pata_pcmcia: | |
7 | * | |
8 | * Copyright 2005-2006 Red Hat Inc <alan@redhat.com>, all rights reserved. | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file "COPYING" in the main directory of this archive | |
12 | * for more details. | |
13 | */ | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/blkdev.h> | |
18 | #include <scsi/scsi_host.h> | |
19 | #include <linux/ata.h> | |
20 | #include <linux/libata.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/pata_platform.h> | |
23 | ||
24 | #define DRV_NAME "pata_platform" | |
2a3103ce | 25 | #define DRV_VERSION "1.1" |
a20c9e82 PM |
26 | |
27 | static int pio_mask = 1; | |
28 | ||
29 | /* | |
30 | * Provide our own set_mode() as we don't want to change anything that has | |
31 | * already been configured.. | |
32 | */ | |
0260731f | 33 | static int pata_platform_set_mode(struct ata_link *link, struct ata_device **unused) |
a20c9e82 | 34 | { |
f58229f8 | 35 | struct ata_device *dev; |
a20c9e82 | 36 | |
0260731f | 37 | ata_link_for_each_dev(dev, link) { |
a20c9e82 PM |
38 | if (ata_dev_enabled(dev)) { |
39 | /* We don't really care */ | |
40 | dev->pio_mode = dev->xfer_mode = XFER_PIO_0; | |
41 | dev->xfer_shift = ATA_SHIFT_PIO; | |
42 | dev->flags |= ATA_DFLAG_PIO; | |
e852f705 | 43 | ata_dev_printk(dev, KERN_INFO, "configured for PIO\n"); |
a20c9e82 PM |
44 | } |
45 | } | |
161c888b | 46 | return 0; |
a20c9e82 PM |
47 | } |
48 | ||
b9a3b4d1 OJ |
49 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } |
50 | ||
a20c9e82 PM |
51 | static struct scsi_host_template pata_platform_sht = { |
52 | .module = THIS_MODULE, | |
53 | .name = DRV_NAME, | |
54 | .ioctl = ata_scsi_ioctl, | |
55 | .queuecommand = ata_scsi_queuecmd, | |
56 | .can_queue = ATA_DEF_QUEUE, | |
57 | .this_id = ATA_SHT_THIS_ID, | |
58 | .sg_tablesize = LIBATA_MAX_PRD, | |
a20c9e82 PM |
59 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
60 | .emulated = ATA_SHT_EMULATED, | |
61 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
62 | .proc_name = DRV_NAME, | |
63 | .dma_boundary = ATA_DMA_BOUNDARY, | |
64 | .slave_configure = ata_scsi_slave_config, | |
c972b60b | 65 | .slave_destroy = ata_scsi_slave_destroy, |
a20c9e82 PM |
66 | .bios_param = ata_std_bios_param, |
67 | }; | |
68 | ||
69 | static struct ata_port_operations pata_platform_port_ops = { | |
70 | .set_mode = pata_platform_set_mode, | |
71 | ||
a20c9e82 PM |
72 | .tf_load = ata_tf_load, |
73 | .tf_read = ata_tf_read, | |
74 | .check_status = ata_check_status, | |
75 | .exec_command = ata_exec_command, | |
76 | .dev_select = ata_std_dev_select, | |
77 | ||
78 | .freeze = ata_bmdma_freeze, | |
79 | .thaw = ata_bmdma_thaw, | |
80 | .error_handler = ata_bmdma_error_handler, | |
81 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
570cb62d | 82 | .cable_detect = ata_cable_unknown, |
a20c9e82 PM |
83 | |
84 | .qc_prep = ata_qc_prep, | |
85 | .qc_issue = ata_qc_issue_prot, | |
86 | ||
0d5ff566 | 87 | .data_xfer = ata_data_xfer_noirq, |
a20c9e82 | 88 | |
a20c9e82 | 89 | .irq_clear = ata_bmdma_irq_clear, |
246ce3b6 | 90 | .irq_on = ata_irq_on, |
a20c9e82 | 91 | |
b9a3b4d1 | 92 | .port_start = ata_dummy_ret0, |
a20c9e82 PM |
93 | }; |
94 | ||
95 | static void pata_platform_setup_port(struct ata_ioports *ioaddr, | |
96 | struct pata_platform_info *info) | |
97 | { | |
98 | unsigned int shift = 0; | |
99 | ||
100 | /* Fixup the port shift for platforms that need it */ | |
101 | if (info && info->ioport_shift) | |
102 | shift = info->ioport_shift; | |
103 | ||
104 | ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift); | |
105 | ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift); | |
106 | ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift); | |
107 | ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << shift); | |
108 | ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << shift); | |
109 | ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << shift); | |
110 | ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << shift); | |
111 | ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << shift); | |
112 | ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << shift); | |
113 | ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << shift); | |
114 | } | |
115 | ||
116 | /** | |
117 | * pata_platform_probe - attach a platform interface | |
118 | * @pdev: platform device | |
119 | * | |
120 | * Register a platform bus IDE interface. Such interfaces are PIO and we | |
121 | * assume do not support IRQ sharing. | |
122 | * | |
123 | * Platform devices are expected to contain 3 resources per port: | |
124 | * | |
125 | * - I/O Base (IORESOURCE_IO or IORESOURCE_MEM) | |
126 | * - CTL Base (IORESOURCE_IO or IORESOURCE_MEM) | |
127 | * - IRQ (IORESOURCE_IRQ) | |
128 | * | |
129 | * If the base resources are both mem types, the ioremap() is handled | |
130 | * here. For IORESOURCE_IO, it's assumed that there's no remapping | |
131 | * necessary. | |
132 | */ | |
133 | static int __devinit pata_platform_probe(struct platform_device *pdev) | |
134 | { | |
135 | struct resource *io_res, *ctl_res; | |
5d728824 TH |
136 | struct ata_host *host; |
137 | struct ata_port *ap; | |
5f45bc50 | 138 | struct pata_platform_info *pp_info; |
a20c9e82 | 139 | unsigned int mmio; |
a20c9e82 PM |
140 | |
141 | /* | |
142 | * Simple resource validation .. | |
143 | */ | |
144 | if (unlikely(pdev->num_resources != 3)) { | |
145 | dev_err(&pdev->dev, "invalid number of resources\n"); | |
146 | return -EINVAL; | |
147 | } | |
148 | ||
149 | /* | |
150 | * Get the I/O base first | |
151 | */ | |
152 | io_res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
153 | if (io_res == NULL) { | |
154 | io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
155 | if (unlikely(io_res == NULL)) | |
156 | return -EINVAL; | |
157 | } | |
158 | ||
159 | /* | |
160 | * Then the CTL base | |
161 | */ | |
162 | ctl_res = platform_get_resource(pdev, IORESOURCE_IO, 1); | |
163 | if (ctl_res == NULL) { | |
164 | ctl_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
165 | if (unlikely(ctl_res == NULL)) | |
166 | return -EINVAL; | |
167 | } | |
168 | ||
169 | /* | |
170 | * Check for MMIO | |
171 | */ | |
172 | mmio = (( io_res->flags == IORESOURCE_MEM) && | |
173 | (ctl_res->flags == IORESOURCE_MEM)); | |
174 | ||
175 | /* | |
176 | * Now that that's out of the way, wire up the port.. | |
177 | */ | |
5d728824 TH |
178 | host = ata_host_alloc(&pdev->dev, 1); |
179 | if (!host) | |
180 | return -ENOMEM; | |
181 | ap = host->ports[0]; | |
182 | ||
183 | ap->ops = &pata_platform_port_ops; | |
184 | ap->pio_mask = pio_mask; | |
185 | ap->flags |= ATA_FLAG_SLAVE_POSS; | |
a20c9e82 PM |
186 | |
187 | /* | |
188 | * Handle the MMIO case | |
189 | */ | |
190 | if (mmio) { | |
5d728824 | 191 | ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, io_res->start, |
0d5ff566 | 192 | io_res->end - io_res->start + 1); |
5d728824 | 193 | ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start, |
0d5ff566 | 194 | ctl_res->end - ctl_res->start + 1); |
a20c9e82 | 195 | } else { |
5d728824 | 196 | ap->ioaddr.cmd_addr = devm_ioport_map(&pdev->dev, io_res->start, |
0d5ff566 | 197 | io_res->end - io_res->start + 1); |
5d728824 | 198 | ap->ioaddr.ctl_addr = devm_ioport_map(&pdev->dev, ctl_res->start, |
0d5ff566 TH |
199 | ctl_res->end - ctl_res->start + 1); |
200 | } | |
5d728824 | 201 | if (!ap->ioaddr.cmd_addr || !ap->ioaddr.ctl_addr) { |
0d5ff566 TH |
202 | dev_err(&pdev->dev, "failed to map IO/CTL base\n"); |
203 | return -ENOMEM; | |
a20c9e82 PM |
204 | } |
205 | ||
5d728824 | 206 | ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr; |
a20c9e82 | 207 | |
b8773531 | 208 | pp_info = pdev->dev.platform_data; |
5f45bc50 | 209 | pata_platform_setup_port(&ap->ioaddr, pp_info); |
a20c9e82 | 210 | |
cbcdd875 TH |
211 | ata_port_desc(ap, "%s cmd 0x%llx ctl 0x%llx", mmio ? "mmio" : "ioport", |
212 | (unsigned long long)io_res->start, | |
213 | (unsigned long long)ctl_res->start); | |
214 | ||
5d728824 | 215 | /* activate */ |
83b6839e MD |
216 | return ata_host_activate(host, platform_get_irq(pdev, 0), |
217 | ata_interrupt, pp_info ? pp_info->irq_flags | |
218 | : 0, &pata_platform_sht); | |
a20c9e82 PM |
219 | } |
220 | ||
221 | /** | |
222 | * pata_platform_remove - unplug a platform interface | |
223 | * @pdev: platform device | |
224 | * | |
225 | * A platform bus ATA device has been unplugged. Perform the needed | |
226 | * cleanup. Also called on module unload for any active devices. | |
227 | */ | |
228 | static int __devexit pata_platform_remove(struct platform_device *pdev) | |
229 | { | |
230 | struct device *dev = &pdev->dev; | |
231 | struct ata_host *host = dev_get_drvdata(dev); | |
232 | ||
1a68ff13 | 233 | ata_host_detach(host); |
a20c9e82 PM |
234 | |
235 | return 0; | |
236 | } | |
237 | ||
238 | static struct platform_driver pata_platform_driver = { | |
239 | .probe = pata_platform_probe, | |
240 | .remove = __devexit_p(pata_platform_remove), | |
241 | .driver = { | |
242 | .name = DRV_NAME, | |
243 | .owner = THIS_MODULE, | |
244 | }, | |
245 | }; | |
246 | ||
247 | static int __init pata_platform_init(void) | |
248 | { | |
249 | return platform_driver_register(&pata_platform_driver); | |
250 | } | |
251 | ||
252 | static void __exit pata_platform_exit(void) | |
253 | { | |
254 | platform_driver_unregister(&pata_platform_driver); | |
255 | } | |
256 | module_init(pata_platform_init); | |
257 | module_exit(pata_platform_exit); | |
258 | ||
259 | module_param(pio_mask, int, 0); | |
260 | ||
261 | MODULE_AUTHOR("Paul Mundt"); | |
262 | MODULE_DESCRIPTION("low-level driver for platform device ATA"); | |
263 | MODULE_LICENSE("GPL"); | |
264 | MODULE_VERSION(DRV_VERSION); |