convert ill defined log2() to ilog2()
[deliverable/linux.git] / drivers / ata / pata_qdi.c
CommitLineData
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1/*
2 * pata_qdi.c - QDI VLB ATA controllers
3 * (C) 2006 Red Hat <alan@redhat.com>
4 *
5 * This driver mostly exists as a proof of concept for non PCI devices under
6 * libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly
7 * useful.
8 *
9 * Tuning code written from the documentation at
10 * http://www.ryston.cz/petr/vlb/qd6500.html
11 * http://www.ryston.cz/petr/vlb/qd6580.html
12 *
13 * Probe code based on drivers/ide/legacy/qd65xx.c
14 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
15 * Samuel Thibault <samuel.thibault@fnac.net>
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/pci.h>
21#include <linux/init.h>
22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <scsi/scsi_host.h>
25#include <linux/libata.h>
26#include <linux/platform_device.h>
27
28#define DRV_NAME "pata_qdi"
8bc3fc47 29#define DRV_VERSION "0.3.1"
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30
31#define NR_HOST 4 /* Two 6580s */
32
33struct qdi_data {
34 unsigned long timing;
35 u8 clock[2];
36 u8 last;
37 int fast;
38 struct platform_device *platform_dev;
85cd7251 39
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40};
41
42static struct ata_host *qdi_host[NR_HOST];
43static struct qdi_data qdi_data[NR_HOST];
44static int nr_qdi_host;
45
46#ifdef MODULE
47static int probe_qdi = 1;
48#else
49static int probe_qdi;
50#endif
51
52static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
53{
54 struct ata_timing t;
55 struct qdi_data *qdi = ap->host->private_data;
56 int active, recovery;
57 u8 timing;
58
59 /* Get the timing data in cycles */
60 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251 61
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62 if (qdi->fast) {
63 active = 8 - FIT(t.active, 1, 8);
64 recovery = 18 - FIT(t.recover, 3, 18);
65 } else {
66 active = 9 - FIT(t.active, 2, 9);
67 recovery = 15 - FIT(t.recover, 0, 15);
68 }
69 timing = (recovery << 4) | active | 0x08;
85cd7251 70
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71 qdi->clock[adev->devno] = timing;
72
85cd7251 73 outb(timing, qdi->timing);
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74}
75
76static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
77{
78 struct ata_timing t;
79 struct qdi_data *qdi = ap->host->private_data;
80 int active, recovery;
81 u8 timing;
82
83 /* Get the timing data in cycles */
84 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251 85
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86 if (qdi->fast) {
87 active = 8 - FIT(t.active, 1, 8);
88 recovery = 18 - FIT(t.recover, 3, 18);
89 } else {
90 active = 9 - FIT(t.active, 2, 9);
91 recovery = 15 - FIT(t.recover, 0, 15);
92 }
93 timing = (recovery << 4) | active | 0x08;
85cd7251 94
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95 qdi->clock[adev->devno] = timing;
96
97 outb(timing, qdi->timing);
85cd7251 98
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99 /* Clear the FIFO */
100 if (adev->class != ATA_DEV_ATA)
101 outb(0x5F, (qdi->timing & 0xFFF0) + 3);
102}
103
104/**
105 * qdi_qc_issue_prot - command issue
106 * @qc: command pending
107 *
108 * Called when the libata layer is about to issue a command. We wrap
109 * this interface so that we can load the correct ATA timings.
110 */
111
112static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc)
113{
114 struct ata_port *ap = qc->ap;
115 struct ata_device *adev = qc->dev;
116 struct qdi_data *qdi = ap->host->private_data;
117
118 if (qdi->clock[adev->devno] != qdi->last) {
119 if (adev->pio_mode) {
120 qdi->last = qdi->clock[adev->devno];
121 outb(qdi->clock[adev->devno], qdi->timing);
122 }
123 }
124 return ata_qc_issue_prot(qc);
125}
126
127static void qdi_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data)
128{
9af5c9c9 129 struct ata_port *ap = adev->link->ap;
669a5db4 130 int slop = buflen & 3;
85cd7251 131
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132 if (ata_id_has_dword_io(adev->id)) {
133 if (write_data)
0d5ff566 134 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
669a5db4 135 else
0d5ff566 136 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
85cd7251 137
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138 if (unlikely(slop)) {
139 u32 pad;
140 if (write_data) {
141 memcpy(&pad, buf + buflen - slop, slop);
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142 pad = le32_to_cpu(pad);
143 iowrite32(pad, ap->ioaddr.data_addr);
669a5db4 144 } else {
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145 pad = ioread32(ap->ioaddr.data_addr);
146 pad = cpu_to_le32(pad);
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147 memcpy(buf + buflen - slop, &pad, slop);
148 }
149 }
150 } else
0d5ff566 151 ata_data_xfer(adev, buf, buflen, write_data);
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152}
153
154static struct scsi_host_template qdi_sht = {
155 .module = THIS_MODULE,
156 .name = DRV_NAME,
157 .ioctl = ata_scsi_ioctl,
158 .queuecommand = ata_scsi_queuecmd,
159 .can_queue = ATA_DEF_QUEUE,
160 .this_id = ATA_SHT_THIS_ID,
161 .sg_tablesize = LIBATA_MAX_PRD,
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162 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
163 .emulated = ATA_SHT_EMULATED,
164 .use_clustering = ATA_SHT_USE_CLUSTERING,
165 .proc_name = DRV_NAME,
166 .dma_boundary = ATA_DMA_BOUNDARY,
167 .slave_configure = ata_scsi_slave_config,
afdfe899 168 .slave_destroy = ata_scsi_slave_destroy,
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169 .bios_param = ata_std_bios_param,
170};
171
172static struct ata_port_operations qdi6500_port_ops = {
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173 .set_piomode = qdi6500_set_piomode,
174
175 .tf_load = ata_tf_load,
176 .tf_read = ata_tf_read,
177 .check_status = ata_check_status,
178 .exec_command = ata_exec_command,
179 .dev_select = ata_std_dev_select,
180
181 .freeze = ata_bmdma_freeze,
182 .thaw = ata_bmdma_thaw,
183 .error_handler = ata_bmdma_error_handler,
184 .post_internal_cmd = ata_bmdma_post_internal_cmd,
3be40d76 185 .cable_detect = ata_cable_40wire,
85cd7251 186
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187 .qc_prep = ata_qc_prep,
188 .qc_issue = qdi_qc_issue_prot,
bda30288 189
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190 .data_xfer = qdi_data_xfer,
191
669a5db4 192 .irq_clear = ata_bmdma_irq_clear,
246ce3b6 193 .irq_on = ata_irq_on,
85cd7251 194
81ad1837 195 .port_start = ata_sff_port_start,
85cd7251 196};
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197
198static struct ata_port_operations qdi6580_port_ops = {
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199 .set_piomode = qdi6580_set_piomode,
200
201 .tf_load = ata_tf_load,
202 .tf_read = ata_tf_read,
203 .check_status = ata_check_status,
204 .exec_command = ata_exec_command,
205 .dev_select = ata_std_dev_select,
206
207 .freeze = ata_bmdma_freeze,
208 .thaw = ata_bmdma_thaw,
209 .error_handler = ata_bmdma_error_handler,
210 .post_internal_cmd = ata_bmdma_post_internal_cmd,
3be40d76 211 .cable_detect = ata_cable_40wire,
85cd7251 212
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213 .qc_prep = ata_qc_prep,
214 .qc_issue = qdi_qc_issue_prot,
bda30288 215
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216 .data_xfer = qdi_data_xfer,
217
669a5db4 218 .irq_clear = ata_bmdma_irq_clear,
246ce3b6 219 .irq_on = ata_irq_on,
85cd7251 220
81ad1837 221 .port_start = ata_sff_port_start,
85cd7251 222};
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223
224/**
225 * qdi_init_one - attach a qdi interface
226 * @type: Type to display
227 * @io: I/O port start
228 * @irq: interrupt line
229 * @fast: True if on a > 33Mhz VLB
230 *
231 * Register an ISA bus IDE interface. Such interfaces are PIO and we
232 * assume do not support IRQ sharing.
233 */
85cd7251 234
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235static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast)
236{
cbcdd875 237 unsigned long ctl = io + 0x206;
669a5db4 238 struct platform_device *pdev;
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239 struct ata_host *host;
240 struct ata_port *ap;
0d5ff566 241 void __iomem *io_addr, *ctl_addr;
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242 int ret;
243
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244 /*
245 * Fill in a probe structure first of all
246 */
247
248 pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0);
9825d73c
AM
249 if (IS_ERR(pdev))
250 return PTR_ERR(pdev);
85cd7251 251
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252 ret = -ENOMEM;
253 io_addr = devm_ioport_map(&pdev->dev, io, 8);
cbcdd875 254 ctl_addr = devm_ioport_map(&pdev->dev, ctl, 1);
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255 if (!io_addr || !ctl_addr)
256 goto fail;
257
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258 ret = -ENOMEM;
259 host = ata_host_alloc(&pdev->dev, 1);
260 if (!host)
261 goto fail;
262 ap = host->ports[0];
85cd7251 263
669a5db4 264 if (type == 6580) {
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265 ap->ops = &qdi6580_port_ops;
266 ap->pio_mask = 0x1F;
267 ap->flags |= ATA_FLAG_SLAVE_POSS;
669a5db4 268 } else {
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269 ap->ops = &qdi6500_port_ops;
270 ap->pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */
271 ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
669a5db4 272 }
85cd7251 273
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274 ap->ioaddr.cmd_addr = io_addr;
275 ap->ioaddr.altstatus_addr = ctl_addr;
276 ap->ioaddr.ctl_addr = ctl_addr;
277 ata_std_ports(&ap->ioaddr);
669a5db4 278
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279 ata_port_desc(ap, "cmd %lx ctl %lx", io, ctl);
280
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281 /*
282 * Hook in a private data structure per channel
283 */
5d728824 284 ap->private_data = &qdi_data[nr_qdi_host];
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285
286 qdi_data[nr_qdi_host].timing = port;
287 qdi_data[nr_qdi_host].fast = fast;
288 qdi_data[nr_qdi_host].platform_dev = pdev;
289
290 printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io);
0d5ff566 291
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292 /* activate */
293 ret = ata_host_activate(host, irq, ata_interrupt, 0, &qdi_sht);
294 if (ret)
0d5ff566 295 goto fail;
85cd7251 296
669a5db4 297 qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev);
85cd7251 298 return 0;
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299
300 fail:
301 platform_device_unregister(pdev);
302 return ret;
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303}
304
305/**
306 * qdi_init - attach qdi interfaces
307 *
308 * Attach qdi IDE interfaces by scanning the ports it may occupy.
309 */
85cd7251 310
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311static __init int qdi_init(void)
312{
313 unsigned long flags;
314 static const unsigned long qd_port[2] = { 0x30, 0xB0 };
315 static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
316 static const int ide_irq[2] = { 14, 15 };
85cd7251 317
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318 int ct = 0;
319 int i;
85cd7251 320
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321 if (probe_qdi == 0)
322 return -ENODEV;
85cd7251 323
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324 /*
325 * Check each possible QD65xx base address
326 */
85cd7251 327
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328 for (i = 0; i < 2; i++) {
329 unsigned long port = qd_port[i];
330 u8 r, res;
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331
332
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333 if (request_region(port, 2, "pata_qdi")) {
334 /* Check for a card */
335 local_irq_save(flags);
336 r = inb_p(port);
337 outb_p(0x19, port);
338 res = inb_p(port);
339 outb_p(r, port);
340 local_irq_restore(flags);
85cd7251 341
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342 /* Fail */
343 if (res == 0x19)
344 {
345 release_region(port, 2);
346 continue;
347 }
85cd7251 348
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349 /* Passes the presence test */
350 r = inb_p(port + 1); /* Check port agrees with port set */
351 if ((r & 2) >> 1 != i) {
352 release_region(port, 2);
353 continue;
354 }
355
85cd7251 356 /* Check card type */
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357 if ((r & 0xF0) == 0xC0) {
358 /* QD6500: single channel */
359 if (r & 8) {
360 /* Disabled ? */
361 release_region(port, 2);
362 continue;
363 }
cc7c15ec
AC
364 if (qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
365 ct++;
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366 }
367 if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
368 /* QD6580: dual channel */
369 if (!request_region(port + 2 , 2, "pata_qdi"))
370 {
371 release_region(port, 2);
372 continue;
373 }
374 res = inb(port + 3);
375 if (res & 1) {
376 /* Single channel mode */
6878cce5 377 if (qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
cc7c15ec 378 ct++;
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379 } else {
380 /* Dual channel mode */
cc7c15ec
AC
381 if (qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04) == 0)
382 ct++;
383 if (qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04) == 0)
384 ct++;
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385 }
386 }
387 }
388 }
389 if (ct != 0)
390 return 0;
391 return -ENODEV;
392}
393
394static __exit void qdi_exit(void)
395{
396 int i;
397
398 for (i = 0; i < nr_qdi_host; i++) {
24dc5f33 399 ata_host_detach(qdi_host[i]);
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400 /* Free the control resource. The 6580 dual channel has the resources
401 * claimed as a pair of 2 byte resources so we need no special cases...
402 */
403 release_region(qdi_data[i].timing, 2);
404 platform_device_unregister(qdi_data[i].platform_dev);
85cd7251 405 }
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406}
407
408MODULE_AUTHOR("Alan Cox");
409MODULE_DESCRIPTION("low-level driver for qdi ATA");
410MODULE_LICENSE("GPL");
411MODULE_VERSION(DRV_VERSION);
412
413module_init(qdi_init);
414module_exit(qdi_exit);
415
416module_param(probe_qdi, int, 0);
417
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