[deliverable/linux.git] / drivers / ata / pata_qdi.c

/*
 *    pata_qdi.c - QDI VLB ATA controllers
 *	(C) 2006 Red Hat <alan@redhat.com>
 *
 * This driver mostly exists as a proof of concept for non PCI devices under
 * libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly
 * useful.
 *
 * Tuning code written from the documentation at
 * http://www.ryston.cz/petr/vlb/qd6500.html
 * http://www.ryston.cz/petr/vlb/qd6580.html
 *
 * Probe code based on drivers/ide/legacy/qd65xx.c
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@fnac.net>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/platform_device.h>

#define DRV_NAME "pata_qdi"
#define DRV_VERSION "0.3.1"

#define NR_HOST 4	/* Two 6580s */

struct qdi_data {
	unsigned long timing;
	u8 clock[2];
	u8 last;
	int fast;
	struct platform_device *platform_dev;

};

static struct ata_host *qdi_host[NR_HOST];
static struct qdi_data qdi_data[NR_HOST];
static int nr_qdi_host;

#ifdef MODULE
static int probe_qdi = 1;
#else
static int probe_qdi;
#endif

static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_timing t;
	struct qdi_data *qdi = ap->host->private_data;
	int active, recovery;
	u8 timing;

	/* Get the timing data in cycles */
	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);

	if (qdi->fast) {
		active = 8 - FIT(t.active, 1, 8);
		recovery = 18 - FIT(t.recover, 3, 18);
	} else {
		active = 9 - FIT(t.active, 2, 9);
		recovery = 15 - FIT(t.recover, 0, 15);
	}
	timing = (recovery << 4) | active | 0x08;

	qdi->clock[adev->devno] = timing;

	outb(timing, qdi->timing);
}

static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_timing t;
	struct qdi_data *qdi = ap->host->private_data;
	int active, recovery;
	u8 timing;

	/* Get the timing data in cycles */
	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);

	if (qdi->fast) {
		active = 8 - FIT(t.active, 1, 8);
		recovery = 18 - FIT(t.recover, 3, 18);
	} else {
		active = 9 - FIT(t.active, 2, 9);
		recovery = 15 - FIT(t.recover, 0, 15);
	}
	timing = (recovery << 4) | active | 0x08;

	qdi->clock[adev->devno] = timing;

	outb(timing, qdi->timing);

	/* Clear the FIFO */
	if (adev->class != ATA_DEV_ATA)
		outb(0x5F, (qdi->timing & 0xFFF0) + 3);
}

/**
 *	qdi_qc_issue_prot	-	command issue
 *	@qc: command pending
 *
 *	Called when the libata layer is about to issue a command. We wrap
 *	this interface so that we can load the correct ATA timings.
 */

static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;
	struct qdi_data *qdi = ap->host->private_data;

	if (qdi->clock[adev->devno] != qdi->last) {
		if (adev->pio_mode) {
			qdi->last = qdi->clock[adev->devno];
			outb(qdi->clock[adev->devno], qdi->timing);
		}
	}
	return ata_qc_issue_prot(qc);
}

static unsigned int qdi_data_xfer(struct ata_device *dev, unsigned char *buf,
				  unsigned int buflen, int rw)
{
	if (ata_id_has_dword_io(dev->id)) {
		struct ata_port *ap = dev->link->ap;
		int slop = buflen & 3;

		if (rw == READ)
			ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
		else
			iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);

		if (unlikely(slop)) {
			u32 pad;
			if (rw == READ) {
				pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
				memcpy(buf + buflen - slop, &pad, slop);
			} else {
				memcpy(&pad, buf + buflen - slop, slop);
				iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
			}
			buflen += 4 - slop;
		}
	} else
		buflen = ata_data_xfer(dev, buf, buflen, rw);

	return buflen;
}

static struct scsi_host_template qdi_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
};

static struct ata_port_operations qdi6500_port_ops = {
	.set_piomode	= qdi6500_set_piomode,

	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= qdi_qc_issue_prot,

	.data_xfer	= qdi_data_xfer,

	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,

	.port_start	= ata_sff_port_start,
};

static struct ata_port_operations qdi6580_port_ops = {
	.set_piomode	= qdi6580_set_piomode,

	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= qdi_qc_issue_prot,

	.data_xfer	= qdi_data_xfer,

	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,

	.port_start	= ata_sff_port_start,
};

/**
 *	qdi_init_one		-	attach a qdi interface
 *	@type: Type to display
 *	@io: I/O port start
 *	@irq: interrupt line
 *	@fast: True if on a > 33Mhz VLB
 *
 *	Register an ISA bus IDE interface. Such interfaces are PIO and we
 *	assume do not support IRQ sharing.
 */

static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast)
{
	unsigned long ctl = io + 0x206;
	struct platform_device *pdev;
	struct ata_host *host;
	struct ata_port *ap;
	void __iomem *io_addr, *ctl_addr;
	int ret;

	/*
	 *	Fill in a probe structure first of all
	 */

	pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0);
	if (IS_ERR(pdev))
		return PTR_ERR(pdev);

	ret = -ENOMEM;
	io_addr = devm_ioport_map(&pdev->dev, io, 8);
	ctl_addr = devm_ioport_map(&pdev->dev, ctl, 1);
	if (!io_addr || !ctl_addr)
		goto fail;

	ret = -ENOMEM;
	host = ata_host_alloc(&pdev->dev, 1);
	if (!host)
		goto fail;
	ap = host->ports[0];

	if (type == 6580) {
		ap->ops = &qdi6580_port_ops;
		ap->pio_mask = 0x1F;
		ap->flags |= ATA_FLAG_SLAVE_POSS;
	} else {
		ap->ops = &qdi6500_port_ops;
		ap->pio_mask = 0x07;	/* Actually PIO3 !IORDY is possible */
		ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
	}

	ap->ioaddr.cmd_addr = io_addr;
	ap->ioaddr.altstatus_addr = ctl_addr;
	ap->ioaddr.ctl_addr = ctl_addr;
	ata_std_ports(&ap->ioaddr);

	ata_port_desc(ap, "cmd %lx ctl %lx", io, ctl);

	/*
	 *	Hook in a private data structure per channel
	 */
	ap->private_data = &qdi_data[nr_qdi_host];

	qdi_data[nr_qdi_host].timing = port;
	qdi_data[nr_qdi_host].fast = fast;
	qdi_data[nr_qdi_host].platform_dev = pdev;

	printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io);

	/* activate */
	ret = ata_host_activate(host, irq, ata_interrupt, 0, &qdi_sht);
	if (ret)
		goto fail;

	qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev);
	return 0;

 fail:
	platform_device_unregister(pdev);
	return ret;
}

/**
 *	qdi_init		-	attach qdi interfaces
 *
 *	Attach qdi IDE interfaces by scanning the ports it may occupy.
 */

static __init int qdi_init(void)
{
	unsigned long flags;
	static const unsigned long qd_port[2] = { 0x30, 0xB0 };
	static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
	static const int ide_irq[2] = { 14, 15 };

	int ct = 0;
	int i;

	if (probe_qdi == 0)
		return -ENODEV;

	/*
 	 *	Check each possible QD65xx base address
	 */

	for (i = 0; i < 2; i++) {
		unsigned long port = qd_port[i];
		u8 r, res;


		if (request_region(port, 2, "pata_qdi")) {
			/* Check for a card */
			local_irq_save(flags);
			r = inb_p(port);
			outb_p(0x19, port);
			res = inb_p(port);
			outb_p(r, port);
			local_irq_restore(flags);

			/* Fail */
			if (res == 0x19)
			{
				release_region(port, 2);
				continue;
			}

			/* Passes the presence test */
			r = inb_p(port + 1);	/* Check port agrees with port set */
			if ((r & 2) >> 1 != i) {
				release_region(port, 2);
				continue;
			}

			/* Check card type */
			if ((r & 0xF0) == 0xC0) {
				/* QD6500: single channel */
				if (r & 8) {
					/* Disabled ? */
					release_region(port, 2);
					continue;
				}
				if (qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
					ct++;
			}
			if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
				/* QD6580: dual channel */
				if (!request_region(port + 2 , 2, "pata_qdi"))
				{
					release_region(port, 2);
					continue;
				}
				res = inb(port + 3);
				if (res & 1) {
					/* Single channel mode */
					if (qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
						ct++;
				} else {
					/* Dual channel mode */
					if (qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04) == 0)
						ct++;
					if (qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04) == 0)
						ct++;
				}
			}
		}
	}
	if (ct != 0)
		return 0;
	return -ENODEV;
}

static __exit void qdi_exit(void)
{
	int i;

	for (i = 0; i < nr_qdi_host; i++) {
		ata_host_detach(qdi_host[i]);
		/* Free the control resource. The 6580 dual channel has the resources
		 * claimed as a pair of 2 byte resources so we need no special cases...
		 */
		release_region(qdi_data[i].timing, 2);
		platform_device_unregister(qdi_data[i].platform_dev);
	}
}

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for qdi ATA");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);

module_init(qdi_init);
module_exit(qdi_exit);

module_param(probe_qdi, int, 0);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_qdi.c - QDI VLB ATA controllers
	3	* (C) 2006 Red Hat <alan@redhat.com>
	4	*
	5	* This driver mostly exists as a proof of concept for non PCI devices under
	6	* libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly
	7	* useful.
	8	*
	9	* Tuning code written from the documentation at
	10	* http://www.ryston.cz/petr/vlb/qd6500.html
	11	* http://www.ryston.cz/petr/vlb/qd6580.html
	12	*
	13	* Probe code based on drivers/ide/legacy/qd65xx.c
	14	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
	15	* Samuel Thibault <samuel.thibault@fnac.net>
	16	*/
	17
	18	#include <linux/kernel.h>
	19	#include <linux/module.h>
	20	#include <linux/pci.h>
	21	#include <linux/init.h>
	22	#include <linux/blkdev.h>
	23	#include <linux/delay.h>
	24	#include <scsi/scsi_host.h>
	25	#include <linux/libata.h>
	26	#include <linux/platform_device.h>
	27
	28	#define DRV_NAME "pata_qdi"
8bc3fc47	29	#define DRV_VERSION "0.3.1"
669a5db4 JG	30
	31	#define NR_HOST 4 /* Two 6580s */
	32
	33	struct qdi_data {
	34	unsigned long timing;
	35	u8 clock[2];
	36	u8 last;
	37	int fast;
	38	struct platform_device *platform_dev;
85cd7251	39
669a5db4 JG	40	};
	41
	42	static struct ata_host *qdi_host[NR_HOST];
	43	static struct qdi_data qdi_data[NR_HOST];
	44	static int nr_qdi_host;
	45
	46	#ifdef MODULE
	47	static int probe_qdi = 1;
	48	#else
	49	static int probe_qdi;
	50	#endif
	51
	52	static void qdi6500_set_piomode(struct ata_port ap, struct ata_device adev)
	53	{
	54	struct ata_timing t;
	55	struct qdi_data *qdi = ap->host->private_data;
	56	int active, recovery;
	57	u8 timing;
	58
	59	/* Get the timing data in cycles */
	60	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251	61
669a5db4 JG	62	if (qdi->fast) {
	63	active = 8 - FIT(t.active, 1, 8);
	64	recovery = 18 - FIT(t.recover, 3, 18);
	65	} else {
	66	active = 9 - FIT(t.active, 2, 9);
	67	recovery = 15 - FIT(t.recover, 0, 15);
	68	}
	69	timing = (recovery << 4) \| active \| 0x08;
85cd7251	70
669a5db4 JG	71	qdi->clock[adev->devno] = timing;
669a5db4 JG	72
85cd7251	73	outb(timing, qdi->timing);
669a5db4 JG	74	}
	75
	76	static void qdi6580_set_piomode(struct ata_port ap, struct ata_device adev)
	77	{
	78	struct ata_timing t;
	79	struct qdi_data *qdi = ap->host->private_data;
	80	int active, recovery;
	81	u8 timing;
	82
	83	/* Get the timing data in cycles */
	84	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251	85
669a5db4 JG	86	if (qdi->fast) {
	87	active = 8 - FIT(t.active, 1, 8);
	88	recovery = 18 - FIT(t.recover, 3, 18);
	89	} else {
	90	active = 9 - FIT(t.active, 2, 9);
	91	recovery = 15 - FIT(t.recover, 0, 15);
	92	}
	93	timing = (recovery << 4) \| active \| 0x08;
85cd7251	94
669a5db4 JG	95	qdi->clock[adev->devno] = timing;
	96
	97	outb(timing, qdi->timing);
85cd7251	98
669a5db4 JG	99	/* Clear the FIFO */
	100	if (adev->class != ATA_DEV_ATA)
	101	outb(0x5F, (qdi->timing & 0xFFF0) + 3);
	102	}
	103
	104	/**
	105	* qdi_qc_issue_prot - command issue
	106	* @qc: command pending
	107	*
	108	* Called when the libata layer is about to issue a command. We wrap
	109	* this interface so that we can load the correct ATA timings.
	110	*/
	111
	112	static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc)
	113	{
	114	struct ata_port *ap = qc->ap;
	115	struct ata_device *adev = qc->dev;
	116	struct qdi_data *qdi = ap->host->private_data;
	117
	118	if (qdi->clock[adev->devno] != qdi->last) {
	119	if (adev->pio_mode) {
	120	qdi->last = qdi->clock[adev->devno];
	121	outb(qdi->clock[adev->devno], qdi->timing);
	122	}
	123	}
	124	return ata_qc_issue_prot(qc);
	125	}
	126
55dba312 TH	127	static unsigned int qdi_data_xfer(struct ata_device dev, unsigned char buf,
55dba312 TH	128	unsigned int buflen, int rw)
669a5db4	129	{
55dba312 TH	130	if (ata_id_has_dword_io(dev->id)) {
	131	struct ata_port *ap = dev->link->ap;
	132	int slop = buflen & 3;
85cd7251	133
55dba312	134	if (rw == READ)
0d5ff566	135	ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
55dba312 TH	136	else
55dba312 TH	137	iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
85cd7251	138
669a5db4	139	if (unlikely(slop)) {
55dba312 TH	140	u32 pad;
55dba312 TH	141	if (rw == READ) {
b50e56d8	142	pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
669a5db4	143	memcpy(buf + buflen - slop, &pad, slop);
55dba312 TH	144	} else {
	145	memcpy(&pad, buf + buflen - slop, slop);
	146	iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
669a5db4	147	}
55dba312	148	buflen += 4 - slop;
669a5db4 JG	149	}
669a5db4 JG	150	} else
55dba312 TH	151	buflen = ata_data_xfer(dev, buf, buflen, rw);
	152
	153	return buflen;
669a5db4 JG	154	}
	155
	156	static struct scsi_host_template qdi_sht = {
	157	.module = THIS_MODULE,
	158	.name = DRV_NAME,
	159	.ioctl = ata_scsi_ioctl,
	160	.queuecommand = ata_scsi_queuecmd,
	161	.can_queue = ATA_DEF_QUEUE,
	162	.this_id = ATA_SHT_THIS_ID,
	163	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	164	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	165	.emulated = ATA_SHT_EMULATED,
	166	.use_clustering = ATA_SHT_USE_CLUSTERING,
	167	.proc_name = DRV_NAME,
	168	.dma_boundary = ATA_DMA_BOUNDARY,
	169	.slave_configure = ata_scsi_slave_config,
afdfe899	170	.slave_destroy = ata_scsi_slave_destroy,
669a5db4 JG	171	.bios_param = ata_std_bios_param,
	172	};
	173
	174	static struct ata_port_operations qdi6500_port_ops = {
669a5db4 JG	175	.set_piomode = qdi6500_set_piomode,
	176
	177	.tf_load = ata_tf_load,
	178	.tf_read = ata_tf_read,
	179	.check_status = ata_check_status,
	180	.exec_command = ata_exec_command,
	181	.dev_select = ata_std_dev_select,
	182
	183	.freeze = ata_bmdma_freeze,
	184	.thaw = ata_bmdma_thaw,
	185	.error_handler = ata_bmdma_error_handler,
	186	.post_internal_cmd = ata_bmdma_post_internal_cmd,
3be40d76	187	.cable_detect = ata_cable_40wire,
85cd7251	188
669a5db4 JG	189	.qc_prep = ata_qc_prep,
669a5db4 JG	190	.qc_issue = qdi_qc_issue_prot,
bda30288	191
669a5db4 JG	192	.data_xfer = qdi_data_xfer,
669a5db4 JG	193
669a5db4	194	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	195	.irq_on = ata_irq_on,
85cd7251	196
81ad1837	197	.port_start = ata_sff_port_start,
85cd7251	198	};
669a5db4 JG	199
669a5db4 JG	200	static struct ata_port_operations qdi6580_port_ops = {
669a5db4 JG	201	.set_piomode = qdi6580_set_piomode,
	202
	203	.tf_load = ata_tf_load,
	204	.tf_read = ata_tf_read,
	205	.check_status = ata_check_status,
	206	.exec_command = ata_exec_command,
	207	.dev_select = ata_std_dev_select,
	208
	209	.freeze = ata_bmdma_freeze,
	210	.thaw = ata_bmdma_thaw,
	211	.error_handler = ata_bmdma_error_handler,
	212	.post_internal_cmd = ata_bmdma_post_internal_cmd,
3be40d76	213	.cable_detect = ata_cable_40wire,
85cd7251	214
669a5db4 JG	215	.qc_prep = ata_qc_prep,
669a5db4 JG	216	.qc_issue = qdi_qc_issue_prot,
bda30288	217
669a5db4 JG	218	.data_xfer = qdi_data_xfer,
669a5db4 JG	219
669a5db4	220	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	221	.irq_on = ata_irq_on,
85cd7251	222
81ad1837	223	.port_start = ata_sff_port_start,
85cd7251	224	};
669a5db4 JG	225
	226	/**
	227	* qdi_init_one - attach a qdi interface
	228	* @type: Type to display
	229	* @io: I/O port start
	230	* @irq: interrupt line
	231	* @fast: True if on a > 33Mhz VLB
	232	*
	233	* Register an ISA bus IDE interface. Such interfaces are PIO and we
	234	* assume do not support IRQ sharing.
	235	*/
85cd7251	236
669a5db4 JG	237	static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast)
669a5db4 JG	238	{
cbcdd875	239	unsigned long ctl = io + 0x206;
669a5db4	240	struct platform_device *pdev;
5d728824 TH	241	struct ata_host *host;
5d728824 TH	242	struct ata_port *ap;
0d5ff566	243	void __iomem io_addr, ctl_addr;
669a5db4 JG	244	int ret;
669a5db4 JG	245
669a5db4 JG	246	/*
	247	* Fill in a probe structure first of all
	248	*/
	249
	250	pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0);
9825d73c AM	251	if (IS_ERR(pdev))
9825d73c AM	252	return PTR_ERR(pdev);
85cd7251	253
0d5ff566 TH	254	ret = -ENOMEM;
0d5ff566 TH	255	io_addr = devm_ioport_map(&pdev->dev, io, 8);
cbcdd875	256	ctl_addr = devm_ioport_map(&pdev->dev, ctl, 1);
0d5ff566 TH	257	if (!io_addr \|\| !ctl_addr)
	258	goto fail;
	259
5d728824 TH	260	ret = -ENOMEM;
	261	host = ata_host_alloc(&pdev->dev, 1);
	262	if (!host)
	263	goto fail;
	264	ap = host->ports[0];
85cd7251	265
669a5db4	266	if (type == 6580) {
5d728824 TH	267	ap->ops = &qdi6580_port_ops;
	268	ap->pio_mask = 0x1F;
	269	ap->flags \|= ATA_FLAG_SLAVE_POSS;
669a5db4	270	} else {
5d728824 TH	271	ap->ops = &qdi6500_port_ops;
	272	ap->pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */
	273	ap->flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_NO_IORDY;
669a5db4	274	}
85cd7251	275
5d728824 TH	276	ap->ioaddr.cmd_addr = io_addr;
	277	ap->ioaddr.altstatus_addr = ctl_addr;
	278	ap->ioaddr.ctl_addr = ctl_addr;
	279	ata_std_ports(&ap->ioaddr);
669a5db4	280
cbcdd875 TH	281	ata_port_desc(ap, "cmd %lx ctl %lx", io, ctl);
cbcdd875 TH	282
669a5db4 JG	283	/*
	284	* Hook in a private data structure per channel
	285	*/
5d728824	286	ap->private_data = &qdi_data[nr_qdi_host];
669a5db4 JG	287
	288	qdi_data[nr_qdi_host].timing = port;
	289	qdi_data[nr_qdi_host].fast = fast;
	290	qdi_data[nr_qdi_host].platform_dev = pdev;
	291
	292	printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io);
0d5ff566	293
5d728824 TH	294	/* activate */
	295	ret = ata_host_activate(host, irq, ata_interrupt, 0, &qdi_sht);
	296	if (ret)
0d5ff566	297	goto fail;
85cd7251	298
669a5db4	299	qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev);
85cd7251	300	return 0;
0d5ff566 TH	301
	302	fail:
	303	platform_device_unregister(pdev);
	304	return ret;
669a5db4 JG	305	}
	306
	307	/**
	308	* qdi_init - attach qdi interfaces
	309	*
	310	* Attach qdi IDE interfaces by scanning the ports it may occupy.
	311	*/
85cd7251	312
669a5db4 JG	313	static __init int qdi_init(void)
	314	{
	315	unsigned long flags;
	316	static const unsigned long qd_port[2] = { 0x30, 0xB0 };
	317	static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
	318	static const int ide_irq[2] = { 14, 15 };
85cd7251	319
669a5db4 JG	320	int ct = 0;
669a5db4 JG	321	int i;
85cd7251	322
669a5db4 JG	323	if (probe_qdi == 0)
669a5db4 JG	324	return -ENODEV;
85cd7251	325
669a5db4 JG	326	/*
	327	* Check each possible QD65xx base address
	328	*/
85cd7251	329
669a5db4 JG	330	for (i = 0; i < 2; i++) {
	331	unsigned long port = qd_port[i];
	332	u8 r, res;
85cd7251 JG	333
85cd7251 JG	334
669a5db4 JG	335	if (request_region(port, 2, "pata_qdi")) {
	336	/* Check for a card */
	337	local_irq_save(flags);
	338	r = inb_p(port);
	339	outb_p(0x19, port);
	340	res = inb_p(port);
	341	outb_p(r, port);
	342	local_irq_restore(flags);
85cd7251	343
669a5db4 JG	344	/* Fail */
	345	if (res == 0x19)
	346	{
	347	release_region(port, 2);
	348	continue;
	349	}
85cd7251	350
669a5db4 JG	351	/* Passes the presence test */
	352	r = inb_p(port + 1); /* Check port agrees with port set */
	353	if ((r & 2) >> 1 != i) {
	354	release_region(port, 2);
	355	continue;
	356	}
	357
85cd7251	358	/* Check card type */
669a5db4 JG	359	if ((r & 0xF0) == 0xC0) {
	360	/* QD6500: single channel */
	361	if (r & 8) {
	362	/* Disabled ? */
	363	release_region(port, 2);
	364	continue;
	365	}
cc7c15ec AC	366	if (qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
cc7c15ec AC	367	ct++;
669a5db4 JG	368	}
	369	if (((r & 0xF0) == 0xA0) \|\| (r & 0xF0) == 0x50) {
	370	/* QD6580: dual channel */
	371	if (!request_region(port + 2 , 2, "pata_qdi"))
	372	{
	373	release_region(port, 2);
	374	continue;
	375	}
	376	res = inb(port + 3);
	377	if (res & 1) {
	378	/* Single channel mode */
6878cce5	379	if (qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
cc7c15ec	380	ct++;
669a5db4 JG	381	} else {
669a5db4 JG	382	/* Dual channel mode */
cc7c15ec AC	383	if (qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04) == 0)
	384	ct++;
	385	if (qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04) == 0)
	386	ct++;
669a5db4 JG	387	}
	388	}
	389	}
	390	}
	391	if (ct != 0)
	392	return 0;
	393	return -ENODEV;
	394	}
	395
	396	static __exit void qdi_exit(void)
	397	{
	398	int i;
	399
	400	for (i = 0; i < nr_qdi_host; i++) {
24dc5f33	401	ata_host_detach(qdi_host[i]);
669a5db4 JG	402	/* Free the control resource. The 6580 dual channel has the resources
	403	* claimed as a pair of 2 byte resources so we need no special cases...
	404	*/
	405	release_region(qdi_data[i].timing, 2);
	406	platform_device_unregister(qdi_data[i].platform_dev);
85cd7251	407	}
669a5db4 JG	408	}
	409
	410	MODULE_AUTHOR("Alan Cox");
	411	MODULE_DESCRIPTION("low-level driver for qdi ATA");
	412	MODULE_LICENSE("GPL");
	413	MODULE_VERSION(DRV_VERSION);
	414
	415	module_init(qdi_init);
	416	module_exit(qdi_exit);
	417
	418	module_param(probe_qdi, int, 0);
	419