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[deliverable/linux.git] / drivers / ata / pata_via.c
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669a5db4
JG		 1/*
2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Documentation
7 * Most chipset documentation available under NDA only
8 *
9 * VIA version guide
10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66
17 * VIA VT82C686 - Nonfunctional UDMA66
18 * VIA VT82C686a - Working UDMA66
19 * VIA VT82C686b - Updated to UDMA100
20 * VIA VT8231 - UDMA100
21 * VIA VT8233 - UDMA100
22 * VIA VT8233a - UDMA133
23 * VIA VT8233c - UDMA100
24 * VIA VT8235 - UDMA133
25 * VIA VT8237 - UDMA133
05c39e50 26 * VIA VT8237S - UDMA133
75f609d2 27 * VIA VT8251 - UDMA133
669a5db4
JG		 28 *
29 * Most registers remain compatible across chips. Others start reserved
30 * and acquire sensible semantics if set to 1 (eg cable detect). A few
31 * exceptions exist, notably around the FIFO settings.
32 *
33 * One additional quirk of the VIA design is that like ALi they use few
34 * PCI IDs for a lot of chips.
35 *
36 * Based heavily on:
37 *
38 * Version 3.38
39 *
40 * VIA IDE driver for Linux. Supported southbridges:
41 *
42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
44 * vt8235, vt8237
45 *
46 * Copyright (c) 2000-2002 Vojtech Pavlik
47 *
48 * Based on the work of:
49 * Michel Aubry
50 * Jeff Garzik
51 * Andre Hedrick
52
53 */
54
55#include <linux/kernel.h>
56#include <linux/module.h>
57#include <linux/pci.h>
58#include <linux/init.h>
59#include <linux/blkdev.h>
60#include <linux/delay.h>
61#include <scsi/scsi_host.h>
62#include <linux/libata.h>
cf5792d2 63#include <linux/dmi.h>
669a5db4
JG		 64
65#define DRV_NAME "pata_via"
9edbdbea 66#define DRV_VERSION "0.3.2"
669a5db4
JG		 67
68/*
69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
70 * driver.
71 */
72
73enum {
74 VIA_UDMA = 0x007,
75 VIA_UDMA_NONE = 0x000,
76 VIA_UDMA_33 = 0x001,
77 VIA_UDMA_66 = 0x002,
78 VIA_UDMA_100 = 0x003,
79 VIA_UDMA_133 = 0x004,
80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
87};
88
89/*
90 * VIA SouthBridge chips.
91 */
92
93static const struct via_isa_bridge {
94 const char *name;
95 u16 id;
96 u8 rev_min;
97 u8 rev_max;
98 u16 flags;
99} via_isa_bridges[] = {
b311ec4a 100 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
e0b874df 101 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
75f609d2 102 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
669a5db4
JG		 103 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
104 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
105 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
106 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
107 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
109 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
110 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
111 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
112 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
113 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
114 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
115 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
116 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
117 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
120 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
121 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
122 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
123 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
124 { NULL }
125};
126
cf5792d2
AC		 127
128/*
129 * Cable special cases
130 */
131
1855256c 132static const struct dmi_system_id cable_dmi_table[] = {
cf5792d2
AC		 133 {
134 .ident = "Acer Ferrari 3400",
135 .matches = {
136 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
137 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
138 },
139 },
140 { }
141};
142
143static int via_cable_override(struct pci_dev *pdev)
144{
145 /* Systems by DMI */
146 if (dmi_check_system(cable_dmi_table))
147 return 1;
9edbdbea
AC		 148 /* Arima W730-K8/Targa Visionary 811/... */
149 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
150 return 1;
cf5792d2
AC		 151 return 0;
152}
153
154
669a5db4
JG		 155/**
156 * via_cable_detect - cable detection
157 * @ap: ATA port
158 *
159 * Perform cable detection. Actually for the VIA case the BIOS
160 * already did this for us. We read the values provided by the
161 * BIOS. If you are using an 8235 in a non-PC configuration you
162 * may need to update this code.
163 *
164 * Hotplug also impacts on this.
165 */
166
167static int via_cable_detect(struct ata_port *ap) {
97cb81c3 168 const struct via_isa_bridge *config = ap->host->private_data;
669a5db4
JG		 169 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
170 u32 ata66;
171
cf5792d2
AC		 172 if (via_cable_override(pdev))
173 return ATA_CBL_PATA40_SHORT;
174
97cb81c3
AC		 175 /* Early chips are 40 wire */
176 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
177 return ATA_CBL_PATA40;
178 /* UDMA 66 chips have only drive side logic */
179 else if((config->flags & VIA_UDMA) < VIA_UDMA_100)
180 return ATA_CBL_PATA_UNK;
181 /* UDMA 100 or later */
669a5db4
JG		 182 pci_read_config_dword(pdev, 0x50, &ata66);
183 /* Check both the drive cable reporting bits, we might not have
184 two drives */
185 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
186 return ATA_CBL_PATA80;
97cb81c3 187 return ATA_CBL_PATA40;
669a5db4
JG		 188}
189
cc0680a5 190static int via_pre_reset(struct ata_link *link, unsigned long deadline)
669a5db4 191{
cc0680a5 192 struct ata_port *ap = link->ap;
669a5db4
JG		 193 const struct via_isa_bridge *config = ap->host->private_data;
194
195 if (!(config->flags & VIA_NO_ENABLES)) {
196 static const struct pci_bits via_enable_bits[] = {
197 { 0x40, 1, 0x02, 0x02 },
198 { 0x40, 1, 0x01, 0x01 }
199 };
669a5db4 200 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
c961922b
AC		 201 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
202 return -ENOENT;
669a5db4 203 }
d4b2bab4 204
cc0680a5 205 return ata_std_prereset(link, deadline);
669a5db4
JG		 206}
207
208
209/**
210 * via_error_handler - reset for VIA chips
211 * @ap: ATA port
212 *
213 * Handle the reset callback for the later chips with cable detect
214 */
215
216static void via_error_handler(struct ata_port *ap)
217{
218 ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
219}
220
221/**
222 * via_do_set_mode - set initial PIO mode data
223 * @ap: ATA interface
224 * @adev: ATA device
225 * @mode: ATA mode being programmed
226 * @tdiv: Clocks per PCI clock
227 * @set_ast: Set to program address setup
228 * @udma_type: UDMA mode/format of registers
229 *
230 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
231 * support in order to compute modes.
232 *
233 * FIXME: Hotplug will require we serialize multiple mode changes
234 * on the two channels.
235 */
236
237static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
238{
239 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
240 struct ata_device *peer = ata_dev_pair(adev);
241 struct ata_timing t, p;
242 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
243 unsigned long T = 1000000000 / via_clock;
244 unsigned long UT = T/tdiv;
245 int ut;
246 int offset = 3 - (2*ap->port_no) - adev->devno;
247
669a5db4
JG		 248 /* Calculate the timing values we require */
249 ata_timing_compute(adev, mode, &t, T, UT);
250
251 /* We share 8bit timing so we must merge the constraints */
252 if (peer) {
253 if (peer->pio_mode) {
254 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
255 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
256 }
257 }
258
259 /* Address setup is programmable but breaks on UDMA133 setups */
260 if (set_ast) {
261 u8 setup; /* 2 bits per drive */
262 int shift = 2 * offset;
263
264 pci_read_config_byte(pdev, 0x4C, &setup);
265 setup &= ~(3 << shift);
266 setup |= FIT(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
267 pci_write_config_byte(pdev, 0x4C, setup);
268 }
269
270 /* Load the PIO mode bits */
271 pci_write_config_byte(pdev, 0x4F - ap->port_no,
272 ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
273 pci_write_config_byte(pdev, 0x48 + offset,
274 ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
275
276 /* Load the UDMA bits according to type */
277 switch(udma_type) {
278 default:
279 /* BUG() ? */
280 /* fall through */
281 case 33:
282 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
283 break;
284 case 66:
285 ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
286 break;
287 case 100:
288 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
289 break;
290 case 133:
291 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
292 break;
293 }
08ebd43d 294
669a5db4 295 /* Set UDMA unless device is not UDMA capable */
08ebd43d
LR		 296 if (udma_type) {
297 u8 cable80_status;
298
299 /* Get 80-wire cable detection bit */
300 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
301 cable80_status &= 0x10;
302
303 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
304 }
669a5db4
JG		 305}
306
307static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
308{
309 const struct via_isa_bridge *config = ap->host->private_data;
310 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
311 int mode = config->flags & VIA_UDMA;
312 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
313 static u8 udma[5] = { 0, 33, 66, 100, 133 };
314
315 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
316}
317
318static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
319{
320 const struct via_isa_bridge *config = ap->host->private_data;
321 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
322 int mode = config->flags & VIA_UDMA;
323 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
324 static u8 udma[5] = { 0, 33, 66, 100, 133 };
325
326 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
327}
328
329static struct scsi_host_template via_sht = {
330 .module = THIS_MODULE,
331 .name = DRV_NAME,
332 .ioctl = ata_scsi_ioctl,
333 .queuecommand = ata_scsi_queuecmd,
334 .can_queue = ATA_DEF_QUEUE,
335 .this_id = ATA_SHT_THIS_ID,
336 .sg_tablesize = LIBATA_MAX_PRD,
669a5db4
JG		 337 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
338 .emulated = ATA_SHT_EMULATED,
339 .use_clustering = ATA_SHT_USE_CLUSTERING,
340 .proc_name = DRV_NAME,
341 .dma_boundary = ATA_DMA_BOUNDARY,
342 .slave_configure = ata_scsi_slave_config,
afdfe899 343 .slave_destroy = ata_scsi_slave_destroy,
669a5db4
JG		 344 .bios_param = ata_std_bios_param,
345};
346
347static struct ata_port_operations via_port_ops = {
348 .port_disable = ata_port_disable,
349 .set_piomode = via_set_piomode,
350 .set_dmamode = via_set_dmamode,
351 .mode_filter = ata_pci_default_filter,
352
353 .tf_load = ata_tf_load,
354 .tf_read = ata_tf_read,
355 .check_status = ata_check_status,
356 .exec_command = ata_exec_command,
357 .dev_select = ata_std_dev_select,
358
359 .freeze = ata_bmdma_freeze,
360 .thaw = ata_bmdma_thaw,
361 .error_handler = via_error_handler,
362 .post_internal_cmd = ata_bmdma_post_internal_cmd,
97cb81c3 363 .cable_detect = via_cable_detect,
669a5db4
JG		 364
365 .bmdma_setup = ata_bmdma_setup,
366 .bmdma_start = ata_bmdma_start,
367 .bmdma_stop = ata_bmdma_stop,
368 .bmdma_status = ata_bmdma_status,
369
370 .qc_prep = ata_qc_prep,
371 .qc_issue = ata_qc_issue_prot,
bda30288 372
0d5ff566 373 .data_xfer = ata_data_xfer,
669a5db4
JG		 374
375 .irq_handler = ata_interrupt,
376 .irq_clear = ata_bmdma_irq_clear,
246ce3b6
AI		 377 .irq_on = ata_irq_on,
378 .irq_ack = ata_irq_ack,
669a5db4
JG		 379
380 .port_start = ata_port_start,
669a5db4
JG		 381};
382
383static struct ata_port_operations via_port_ops_noirq = {
384 .port_disable = ata_port_disable,
385 .set_piomode = via_set_piomode,
386 .set_dmamode = via_set_dmamode,
387 .mode_filter = ata_pci_default_filter,
388
389 .tf_load = ata_tf_load,
390 .tf_read = ata_tf_read,
391 .check_status = ata_check_status,
392 .exec_command = ata_exec_command,
393 .dev_select = ata_std_dev_select,
394
395 .freeze = ata_bmdma_freeze,
396 .thaw = ata_bmdma_thaw,
397 .error_handler = via_error_handler,
398 .post_internal_cmd = ata_bmdma_post_internal_cmd,
97cb81c3 399 .cable_detect = via_cable_detect,
669a5db4
JG		 400
401 .bmdma_setup = ata_bmdma_setup,
402 .bmdma_start = ata_bmdma_start,
403 .bmdma_stop = ata_bmdma_stop,
404 .bmdma_status = ata_bmdma_status,
405
406 .qc_prep = ata_qc_prep,
407 .qc_issue = ata_qc_issue_prot,
bda30288 408
0d5ff566 409 .data_xfer = ata_data_xfer_noirq,
669a5db4
JG		 410
411 .irq_handler = ata_interrupt,
412 .irq_clear = ata_bmdma_irq_clear,
246ce3b6
AI		 413 .irq_on = ata_irq_on,
414 .irq_ack = ata_irq_ack,
669a5db4
JG		 415
416 .port_start = ata_port_start,
669a5db4
JG		 417};
418
627d2d32
A		 419/**
420 * via_config_fifo - set up the FIFO
421 * @pdev: PCI device
422 * @flags: configuration flags
423 *
424 * Set the FIFO properties for this device if neccessary. Used both on
425 * set up and on and the resume path
426 */
427
428static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
429{
430 u8 enable;
f20b16ff 431
627d2d32
A		 432 /* 0x40 low bits indicate enabled channels */
433 pci_read_config_byte(pdev, 0x40 , &enable);
434 enable &= 3;
f20b16ff 435
627d2d32 436 if (flags & VIA_SET_FIFO) {
73720861 437 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
627d2d32
A		 438 u8 fifo;
439
440 pci_read_config_byte(pdev, 0x43, &fifo);
441
442 /* Clear PREQ# until DDACK# for errata */
443 if (flags & VIA_BAD_PREQ)
444 fifo &= 0x7F;
445 else
446 fifo &= 0x9f;
447 /* Turn on FIFO for enabled channels */
448 fifo |= fifo_setting[enable];
449 pci_write_config_byte(pdev, 0x43, fifo);
450 }
451}
452
669a5db4
JG		 453/**
454 * via_init_one - discovery callback
627d2d32 455 * @pdev: PCI device
669a5db4
JG		 456 * @id: PCI table info
457 *
458 * A VIA IDE interface has been discovered. Figure out what revision
459 * and perform configuration work before handing it to the ATA layer
460 */
461
462static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
463{
464 /* Early VIA without UDMA support */
1626aeb8 465 static const struct ata_port_info via_mwdma_info = {
669a5db4 466 .sht = &via_sht,
464cf177 467 .flags = ATA_FLAG_SLAVE_POSS,
669a5db4
JG		 468 .pio_mask = 0x1f,
469 .mwdma_mask = 0x07,
470 .port_ops = &via_port_ops
471 };
472 /* Ditto with IRQ masking required */
1626aeb8 473 static const struct ata_port_info via_mwdma_info_borked = {
669a5db4 474 .sht = &via_sht,
464cf177 475 .flags = ATA_FLAG_SLAVE_POSS,
669a5db4
JG		 476 .pio_mask = 0x1f,
477 .mwdma_mask = 0x07,
478 .port_ops = &via_port_ops_noirq,
479 };
480 /* VIA UDMA 33 devices (and borked 66) */
1626aeb8 481 static const struct ata_port_info via_udma33_info = {
669a5db4 482 .sht = &via_sht,
464cf177 483 .flags = ATA_FLAG_SLAVE_POSS,
669a5db4
JG		 484 .pio_mask = 0x1f,
485 .mwdma_mask = 0x07,
bf6263a8 486 .udma_mask = ATA_UDMA2,
669a5db4
JG		 487 .port_ops = &via_port_ops
488 };
489 /* VIA UDMA 66 devices */
1626aeb8 490 static const struct ata_port_info via_udma66_info = {
669a5db4 491 .sht = &via_sht,
464cf177 492 .flags = ATA_FLAG_SLAVE_POSS,
669a5db4
JG		 493 .pio_mask = 0x1f,
494 .mwdma_mask = 0x07,
bf6263a8 495 .udma_mask = ATA_UDMA4,
669a5db4
JG		 496 .port_ops = &via_port_ops
497 };
498 /* VIA UDMA 100 devices */
1626aeb8 499 static const struct ata_port_info via_udma100_info = {
669a5db4 500 .sht = &via_sht,
464cf177 501 .flags = ATA_FLAG_SLAVE_POSS,
669a5db4
JG		 502 .pio_mask = 0x1f,
503 .mwdma_mask = 0x07,
bf6263a8 504 .udma_mask = ATA_UDMA5,
669a5db4
JG		 505 .port_ops = &via_port_ops
506 };
507 /* UDMA133 with bad AST (All current 133) */
1626aeb8 508 static const struct ata_port_info via_udma133_info = {
669a5db4 509 .sht = &via_sht,
464cf177 510 .flags = ATA_FLAG_SLAVE_POSS,
669a5db4
JG		 511 .pio_mask = 0x1f,
512 .mwdma_mask = 0x07,
bf6263a8 513 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
669a5db4
JG		 514 .port_ops = &via_port_ops
515 };
1626aeb8
TH		 516 struct ata_port_info type;
517 const struct ata_port_info *ppi[] = { &type, NULL };
669a5db4
JG		 518 struct pci_dev *isa = NULL;
519 const struct via_isa_bridge *config;
520 static int printed_version;
669a5db4
JG		 521 u8 enable;
522 u32 timing;
523
524 if (!printed_version++)
525 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
526
527 /* To find out how the IDE will behave and what features we
528 actually have to look at the bridge not the IDE controller */
529 for (config = via_isa_bridges; config->id; config++)
530 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
531 !!(config->flags & VIA_BAD_ID),
532 config->id, NULL))) {
533
44c10138
AK		 534 if (isa->revision >= config->rev_min &&
535 isa->revision <= config->rev_max)
669a5db4
JG		 536 break;
537 pci_dev_put(isa);
538 }
539
540 if (!config->id) {
541 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
542 return -ENODEV;
543 }
544 pci_dev_put(isa);
545
546 /* 0x40 low bits indicate enabled channels */
547 pci_read_config_byte(pdev, 0x40 , &enable);
548 enable &= 3;
549 if (enable == 0) {
550 return -ENODEV;
551 }
552
553 /* Initialise the FIFO for the enabled channels. */
627d2d32 554 via_config_fifo(pdev, config->flags);
f20b16ff 555
669a5db4
JG		 556 /* Clock set up */
557 switch(config->flags & VIA_UDMA) {
558 case VIA_UDMA_NONE:
559 if (config->flags & VIA_NO_UNMASK)
1626aeb8 560 type = via_mwdma_info_borked;
669a5db4 561 else
1626aeb8 562 type = via_mwdma_info;
669a5db4
JG		 563 break;
564 case VIA_UDMA_33:
1626aeb8 565 type = via_udma33_info;
669a5db4
JG		 566 break;
567 case VIA_UDMA_66:
1626aeb8 568 type = via_udma66_info;
669a5db4
JG		 569 /* The 66 MHz devices require we enable the clock */
570 pci_read_config_dword(pdev, 0x50, &timing);
571 timing |= 0x80008;
572 pci_write_config_dword(pdev, 0x50, timing);
573 break;
574 case VIA_UDMA_100:
1626aeb8 575 type = via_udma100_info;
669a5db4
JG		 576 break;
577 case VIA_UDMA_133:
1626aeb8 578 type = via_udma133_info;
669a5db4
JG		 579 break;
580 default:
581 WARN_ON(1);
582 return -ENODEV;
583 }
584
585 if (config->flags & VIA_BAD_CLK66) {
586 /* Disable the 66MHz clock on problem devices */
587 pci_read_config_dword(pdev, 0x50, &timing);
588 timing &= ~0x80008;
589 pci_write_config_dword(pdev, 0x50, timing);
590 }
591
592 /* We have established the device type, now fire it up */
1626aeb8 593 type.private_data = (void *)config;
669a5db4 594
1626aeb8 595 return ata_pci_init_one(pdev, ppi);
669a5db4
JG		 596}
597
438ac6d5 598#ifdef CONFIG_PM
627d2d32
A		 599/**
600 * via_reinit_one - reinit after resume
601 * @pdev; PCI device
602 *
603 * Called when the VIA PATA device is resumed. We must then
604 * reconfigure the fifo and other setup we may have altered. In
605 * addition the kernel needs to have the resume methods on PCI
606 * quirk supported.
607 */
608
609static int via_reinit_one(struct pci_dev *pdev)
610{
611 u32 timing;
612 struct ata_host *host = dev_get_drvdata(&pdev->dev);
613 const struct via_isa_bridge *config = host->private_data;
f20b16ff 614
627d2d32
A		 615 via_config_fifo(pdev, config->flags);
616
617 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
618 /* The 66 MHz devices require we enable the clock */
619 pci_read_config_dword(pdev, 0x50, &timing);
620 timing |= 0x80008;
621 pci_write_config_dword(pdev, 0x50, timing);
622 }
623 if (config->flags & VIA_BAD_CLK66) {
624 /* Disable the 66MHz clock on problem devices */
625 pci_read_config_dword(pdev, 0x50, &timing);
626 timing &= ~0x80008;
627 pci_write_config_dword(pdev, 0x50, timing);
628 }
f20b16ff 629 return ata_pci_device_resume(pdev);
627d2d32 630}
438ac6d5 631#endif
627d2d32 632
669a5db4 633static const struct pci_device_id via[] = {
52df0ee0
JG		 634 { PCI_VDEVICE(VIA, 0x0571), },
635 { PCI_VDEVICE(VIA, 0x0581), },
636 { PCI_VDEVICE(VIA, 0x1571), },
637 { PCI_VDEVICE(VIA, 0x3164), },
638 { PCI_VDEVICE(VIA, 0x5324), },
2d2744fc
JG		 639
640 { },
669a5db4
JG		 641};
642
643static struct pci_driver via_pci_driver = {
2d2744fc 644 .name = DRV_NAME,
669a5db4
JG		 645 .id_table = via,
646 .probe = via_init_one,
627d2d32 647 .remove = ata_pci_remove_one,
438ac6d5 648#ifdef CONFIG_PM
627d2d32
A		 649 .suspend = ata_pci_device_suspend,
650 .resume = via_reinit_one,
438ac6d5 651#endif
669a5db4
JG		 652};
653
654static int __init via_init(void)
655{
656 return pci_register_driver(&via_pci_driver);
657}
658
669a5db4
JG		 659static void __exit via_exit(void)
660{
661 pci_unregister_driver(&via_pci_driver);
662}
663
669a5db4
JG		 664MODULE_AUTHOR("Alan Cox");
665MODULE_DESCRIPTION("low-level driver for VIA PATA");
666MODULE_LICENSE("GPL");
667MODULE_DEVICE_TABLE(pci, via);
668MODULE_VERSION(DRV_VERSION);
669
670module_init(via_init);
671module_exit(via_exit);
Linux kernel - Deliverables
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