[deliverable/linux.git] / drivers / ata / sata_uli.c

/*
 *  sata_uli.c - ULi Electronics SATA
 *
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *
 *  libata documentation is available via 'make {ps|pdf}docs',
 *  as Documentation/DocBook/libata.*
 *
 *  Hardware documentation available under NDA.
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME	"sata_uli"
#define DRV_VERSION	"1.3"

enum {
	uli_5289		= 0,
	uli_5287		= 1,
	uli_5281		= 2,

	uli_max_ports		= 4,

	/* PCI configuration registers */
	ULI5287_BASE		= 0x90, /* sata0 phy SCR registers */
	ULI5287_OFFS		= 0x10, /* offset from sata0->sata1 phy regs */
	ULI5281_BASE		= 0x60, /* sata0 phy SCR  registers */
	ULI5281_OFFS		= 0x60, /* offset from sata0->sata1 phy regs */
};

struct uli_priv {
	unsigned int		scr_cfg_addr[uli_max_ports];
};

static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);

static const struct pci_device_id uli_pci_tbl[] = {
	{ PCI_VDEVICE(AL, 0x5289), uli_5289 },
	{ PCI_VDEVICE(AL, 0x5287), uli_5287 },
	{ PCI_VDEVICE(AL, 0x5281), uli_5281 },

	{ }	/* terminate list */
};

static struct pci_driver uli_pci_driver = {
	.name			= DRV_NAME,
	.id_table		= uli_pci_tbl,
	.probe			= uli_init_one,
	.remove			= ata_pci_remove_one,
};

static struct scsi_host_template uli_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
};

static const struct ata_port_operations uli_ops = {
	.tf_load		= ata_tf_load,
	.tf_read		= ata_tf_read,
	.check_status		= ata_check_status,
	.exec_command		= ata_exec_command,
	.dev_select		= ata_std_dev_select,

	.bmdma_setup            = ata_bmdma_setup,
	.bmdma_start            = ata_bmdma_start,
	.bmdma_stop		= ata_bmdma_stop,
	.bmdma_status		= ata_bmdma_status,
	.qc_prep		= ata_qc_prep,
	.qc_issue		= ata_qc_issue_prot,
	.data_xfer		= ata_data_xfer,

	.freeze			= ata_bmdma_freeze,
	.thaw			= ata_bmdma_thaw,
	.error_handler		= ata_bmdma_error_handler,
	.post_internal_cmd	= ata_bmdma_post_internal_cmd,

	.irq_clear		= ata_bmdma_irq_clear,
	.irq_on			= ata_irq_on,

	.scr_read		= uli_scr_read,
	.scr_write		= uli_scr_write,

	.port_start		= ata_port_start,
};

static const struct ata_port_info uli_port_info = {
	.flags		= ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
			  ATA_FLAG_IGN_SIMPLEX,
	.pio_mask       = 0x1f,		/* pio0-4 */
	.udma_mask      = ATA_UDMA6,
	.port_ops       = &uli_ops,
};


MODULE_AUTHOR("Peer Chen");
MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
MODULE_VERSION(DRV_VERSION);

static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
{
	struct uli_priv *hpriv = ap->host->private_data;
	return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
}

static u32 uli_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
	u32 val;

	pci_read_config_dword(pdev, cfg_addr, &val);
	return val;
}

static void uli_scr_cfg_write(struct ata_port *ap, unsigned int scr, u32 val)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);

	pci_write_config_dword(pdev, cfg_addr, val);
}

static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
{
	if (sc_reg > SCR_CONTROL)
		return -EINVAL;

	*val = uli_scr_cfg_read(ap, sc_reg);
	return 0;
}

static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
{
	if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
		return -EINVAL;

	uli_scr_cfg_write(ap, sc_reg, val);
	return 0;
}

static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	static int printed_version;
	const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
	unsigned int board_idx = (unsigned int) ent->driver_data;
	struct ata_host *host;
	struct uli_priv *hpriv;
	void __iomem * const *iomap;
	struct ata_ioports *ioaddr;
	int n_ports, rc;

	if (!printed_version++)
		dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");

	rc = pcim_enable_device(pdev);
	if (rc)
		return rc;

	n_ports = 2;
	if (board_idx == uli_5287)
		n_ports = 4;

	/* allocate the host */
	host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
	if (!host)
		return -ENOMEM;

	hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
	if (!hpriv)
		return -ENOMEM;
	host->private_data = hpriv;

	/* the first two ports are standard SFF */
	rc = ata_pci_init_sff_host(host);
	if (rc)
		return rc;

	rc = ata_pci_init_bmdma(host);
	if (rc)
		return rc;

	iomap = host->iomap;

	switch (board_idx) {
	case uli_5287:
		/* If there are four, the last two live right after
		 * the standard SFF ports.
		 */
		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;

		ioaddr = &host->ports[2]->ioaddr;
		ioaddr->cmd_addr = iomap[0] + 8;
		ioaddr->altstatus_addr =
		ioaddr->ctl_addr = (void __iomem *)
			((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
		ioaddr->bmdma_addr = iomap[4] + 16;
		hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
		ata_std_ports(ioaddr);

		ata_port_desc(host->ports[2],
			"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
			(unsigned long long)pci_resource_start(pdev, 0) + 8,
			((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
			(unsigned long long)pci_resource_start(pdev, 4) + 16);

		ioaddr = &host->ports[3]->ioaddr;
		ioaddr->cmd_addr = iomap[2] + 8;
		ioaddr->altstatus_addr =
		ioaddr->ctl_addr = (void __iomem *)
			((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
		ioaddr->bmdma_addr = iomap[4] + 24;
		hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
		ata_std_ports(ioaddr);

		ata_port_desc(host->ports[2],
			"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
			(unsigned long long)pci_resource_start(pdev, 2) + 9,
			((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
			(unsigned long long)pci_resource_start(pdev, 4) + 24);

		break;

	case uli_5289:
		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
		break;

	case uli_5281:
		hpriv->scr_cfg_addr[0] = ULI5281_BASE;
		hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
		break;

	default:
		BUG();
		break;
	}

	pci_set_master(pdev);
	pci_intx(pdev, 1);
	return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
				 &uli_sht);
}

static int __init uli_init(void)
{
	return pci_register_driver(&uli_pci_driver);
}

static void __exit uli_exit(void)
{
	pci_unregister_driver(&uli_pci_driver);
}


module_init(uli_init);
module_exit(uli_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* sata_uli.c - ULi Electronics SATA
	3	*
af36d7f0 JG	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2, or (at your option)
	8	* any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; see the file COPYING. If not, write to
	17	* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
	18	*
	19	*
	20	* libata documentation is available via 'make {ps\|pdf}docs',
	21	* as Documentation/DocBook/libata.*
	22	*
	23	* Hardware documentation available under NDA.
1da177e4 LT	24	*
	25	*/
	26
1da177e4 LT	27	#include <linux/kernel.h>
	28	#include <linux/module.h>
	29	#include <linux/pci.h>
	30	#include <linux/init.h>
	31	#include <linux/blkdev.h>
	32	#include <linux/delay.h>
	33	#include <linux/interrupt.h>
a9524a76	34	#include <linux/device.h>
1da177e4 LT	35	#include <scsi/scsi_host.h>
	36	#include <linux/libata.h>
	37
	38	#define DRV_NAME "sata_uli"
2a3103ce	39	#define DRV_VERSION "1.3"
1da177e4 LT	40
	41	enum {
	42	uli_5289 = 0,
	43	uli_5287 = 1,
	44	uli_5281 = 2,
	45
50106c5a JG	46	uli_max_ports = 4,
50106c5a JG	47
1da177e4 LT	48	/* PCI configuration registers */
	49	ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
	50	ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
	51	ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
	52	ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
	53	};
	54
50106c5a JG	55	struct uli_priv {
	56	unsigned int scr_cfg_addr[uli_max_ports];
	57	};
	58
5796d1c4 JG	59	static int uli_init_one(struct pci_dev pdev, const struct pci_device_id ent);
	60	static int uli_scr_read(struct ata_port ap, unsigned int sc_reg, u32 val);
	61	static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
1da177e4	62
3b7d697d	63	static const struct pci_device_id uli_pci_tbl[] = {
54bb3a94 JG	64	{ PCI_VDEVICE(AL, 0x5289), uli_5289 },
	65	{ PCI_VDEVICE(AL, 0x5287), uli_5287 },
	66	{ PCI_VDEVICE(AL, 0x5281), uli_5281 },
	67
1da177e4 LT	68	{ } /* terminate list */
	69	};
	70
1da177e4 LT	71	static struct pci_driver uli_pci_driver = {
	72	.name = DRV_NAME,
	73	.id_table = uli_pci_tbl,
	74	.probe = uli_init_one,
	75	.remove = ata_pci_remove_one,
	76	};
	77
193515d5	78	static struct scsi_host_template uli_sht = {
1da177e4 LT	79	.module = THIS_MODULE,
	80	.name = DRV_NAME,
	81	.ioctl = ata_scsi_ioctl,
	82	.queuecommand = ata_scsi_queuecmd,
1da177e4 LT	83	.can_queue = ATA_DEF_QUEUE,
	84	.this_id = ATA_SHT_THIS_ID,
	85	.sg_tablesize = LIBATA_MAX_PRD,
1da177e4 LT	86	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	87	.emulated = ATA_SHT_EMULATED,
	88	.use_clustering = ATA_SHT_USE_CLUSTERING,
	89	.proc_name = DRV_NAME,
	90	.dma_boundary = ATA_DMA_BOUNDARY,
	91	.slave_configure = ata_scsi_slave_config,
ccf68c34	92	.slave_destroy = ata_scsi_slave_destroy,
1da177e4	93	.bios_param = ata_std_bios_param,
1da177e4 LT	94	};
1da177e4 LT	95
057ace5e	96	static const struct ata_port_operations uli_ops = {
1da177e4 LT	97	.tf_load = ata_tf_load,
	98	.tf_read = ata_tf_read,
	99	.check_status = ata_check_status,
	100	.exec_command = ata_exec_command,
	101	.dev_select = ata_std_dev_select,
	102
1da177e4 LT	103	.bmdma_setup = ata_bmdma_setup,
	104	.bmdma_start = ata_bmdma_start,
	105	.bmdma_stop = ata_bmdma_stop,
	106	.bmdma_status = ata_bmdma_status,
	107	.qc_prep = ata_qc_prep,
	108	.qc_issue = ata_qc_issue_prot,
0d5ff566	109	.data_xfer = ata_data_xfer,
1da177e4	110
d7a80dad TH	111	.freeze = ata_bmdma_freeze,
	112	.thaw = ata_bmdma_thaw,
	113	.error_handler = ata_bmdma_error_handler,
	114	.post_internal_cmd = ata_bmdma_post_internal_cmd,
1da177e4	115
1da177e4	116	.irq_clear = ata_bmdma_irq_clear,
246ce3b6	117	.irq_on = ata_irq_on,
1da177e4 LT	118
	119	.scr_read = uli_scr_read,
	120	.scr_write = uli_scr_write,
	121
	122	.port_start = ata_port_start,
1da177e4 LT	123	};
1da177e4 LT	124
1626aeb8	125	static const struct ata_port_info uli_port_info = {
b2a8bbe6 TH	126	.flags = ATA_FLAG_SATA \| ATA_FLAG_NO_LEGACY \|
b2a8bbe6 TH	127	ATA_FLAG_IGN_SIMPLEX,
7da79312	128	.pio_mask = 0x1f, /* pio0-4 */
bf6263a8	129	.udma_mask = ATA_UDMA6,
1da177e4 LT	130	.port_ops = &uli_ops,
	131	};
	132
	133
	134	MODULE_AUTHOR("Peer Chen");
	135	MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
	136	MODULE_LICENSE("GPL");
	137	MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
	138	MODULE_VERSION(DRV_VERSION);
	139
	140	static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
	141	{
cca3974e	142	struct uli_priv *hpriv = ap->host->private_data;
50106c5a	143	return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
1da177e4 LT	144	}
1da177e4 LT	145
5796d1c4	146	static u32 uli_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg)
1da177e4	147	{
cca3974e	148	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
1da177e4 LT	149	unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
	150	u32 val;
	151
	152	pci_read_config_dword(pdev, cfg_addr, &val);
	153	return val;
	154	}
	155
5796d1c4	156	static void uli_scr_cfg_write(struct ata_port *ap, unsigned int scr, u32 val)
1da177e4	157	{
cca3974e	158	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
1da177e4 LT	159	unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);
	160
	161	pci_write_config_dword(pdev, cfg_addr, val);
	162	}
	163
5796d1c4	164	static int uli_scr_read(struct ata_port ap, unsigned int sc_reg, u32 val)
1da177e4 LT	165	{
1da177e4 LT	166	if (sc_reg > SCR_CONTROL)
da3dbb17	167	return -EINVAL;
1da177e4	168
da3dbb17 TH	169	*val = uli_scr_cfg_read(ap, sc_reg);
da3dbb17 TH	170	return 0;
1da177e4 LT	171	}
1da177e4 LT	172
5796d1c4	173	static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
1da177e4	174	{
5796d1c4	175	if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
da3dbb17	176	return -EINVAL;
1da177e4 LT	177
1da177e4 LT	178	uli_scr_cfg_write(ap, sc_reg, val);
da3dbb17	179	return 0;
1da177e4 LT	180	}
1da177e4 LT	181
5796d1c4	182	static int uli_init_one(struct pci_dev pdev, const struct pci_device_id ent)
1da177e4	183	{
a9524a76	184	static int printed_version;
9a829ccf	185	const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
1da177e4	186	unsigned int board_idx = (unsigned int) ent->driver_data;
9a829ccf	187	struct ata_host *host;
50106c5a	188	struct uli_priv *hpriv;
0d5ff566	189	void __iomem * const *iomap;
9a829ccf TH	190	struct ata_ioports *ioaddr;
9a829ccf TH	191	int n_ports, rc;
1da177e4	192
a9524a76 JG	193	if (!printed_version++)
	194	dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
	195
24dc5f33	196	rc = pcim_enable_device(pdev);
1da177e4 LT	197	if (rc)
	198	return rc;
	199
9a829ccf TH	200	n_ports = 2;
	201	if (board_idx == uli_5287)
	202	n_ports = 4;
1626aeb8 TH	203
	204	/* allocate the host */
	205	host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
	206	if (!host)
	207	return -ENOMEM;
1da177e4	208
24dc5f33 TH	209	hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
	210	if (!hpriv)
	211	return -ENOMEM;
9a829ccf	212	host->private_data = hpriv;
50106c5a	213
1626aeb8	214	/* the first two ports are standard SFF */
d583bc18	215	rc = ata_pci_init_sff_host(host);
1626aeb8 TH	216	if (rc)
	217	return rc;
	218
	219	rc = ata_pci_init_bmdma(host);
	220	if (rc)
	221	return rc;
	222
9a829ccf	223	iomap = host->iomap;
0d5ff566	224
1da177e4 LT	225	switch (board_idx) {
1da177e4 LT	226	case uli_5287:
1626aeb8 TH	227	/* If there are four, the last two live right after
	228	* the standard SFF ports.
	229	*/
50106c5a JG	230	hpriv->scr_cfg_addr[0] = ULI5287_BASE;
50106c5a JG	231	hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4	232
9a829ccf TH	233	ioaddr = &host->ports[2]->ioaddr;
	234	ioaddr->cmd_addr = iomap[0] + 8;
	235	ioaddr->altstatus_addr =
	236	ioaddr->ctl_addr = (void __iomem *)
0d5ff566	237	((unsigned long)iomap[1] \| ATA_PCI_CTL_OFS) + 4;
9a829ccf	238	ioaddr->bmdma_addr = iomap[4] + 16;
50106c5a	239	hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
9a829ccf	240	ata_std_ports(ioaddr);
1da177e4	241
cbcdd875 TH	242	ata_port_desc(host->ports[2],
	243	"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
	244	(unsigned long long)pci_resource_start(pdev, 0) + 8,
	245	((unsigned long long)pci_resource_start(pdev, 1) \| ATA_PCI_CTL_OFS) + 4,
	246	(unsigned long long)pci_resource_start(pdev, 4) + 16);
	247
9a829ccf TH	248	ioaddr = &host->ports[3]->ioaddr;
	249	ioaddr->cmd_addr = iomap[2] + 8;
	250	ioaddr->altstatus_addr =
	251	ioaddr->ctl_addr = (void __iomem *)
0d5ff566	252	((unsigned long)iomap[3] \| ATA_PCI_CTL_OFS) + 4;
9a829ccf	253	ioaddr->bmdma_addr = iomap[4] + 24;
50106c5a	254	hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
9a829ccf	255	ata_std_ports(ioaddr);
cbcdd875 TH	256
	257	ata_port_desc(host->ports[2],
	258	"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
	259	(unsigned long long)pci_resource_start(pdev, 2) + 9,
	260	((unsigned long long)pci_resource_start(pdev, 3) \| ATA_PCI_CTL_OFS) + 4,
	261	(unsigned long long)pci_resource_start(pdev, 4) + 24);
	262
1da177e4 LT	263	break;
	264
	265	case uli_5289:
50106c5a JG	266	hpriv->scr_cfg_addr[0] = ULI5287_BASE;
50106c5a JG	267	hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4 LT	268	break;
	269
	270	case uli_5281:
50106c5a JG	271	hpriv->scr_cfg_addr[0] = ULI5281_BASE;
50106c5a JG	272	hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
1da177e4 LT	273	break;
	274
	275	default:
	276	BUG();
	277	break;
	278	}
	279
	280	pci_set_master(pdev);
a04ce0ff	281	pci_intx(pdev, 1);
9a829ccf TH	282	return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
9a829ccf TH	283	&uli_sht);
1da177e4 LT	284	}
	285
	286	static int __init uli_init(void)
	287	{
b7887196	288	return pci_register_driver(&uli_pci_driver);
1da177e4 LT	289	}
	290
	291	static void __exit uli_exit(void)
	292	{
	293	pci_unregister_driver(&uli_pci_driver);
	294	}
	295
	296
	297	module_init(uli_init);
	298	module_exit(uli_exit);