Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * sata_via.c - VIA Serial ATA controllers |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
1da177e4 | 6 | on emails. |
af36d7f0 JG |
7 | * |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available under NDA. | |
31 | * | |
32 | * | |
33 | * To-do list: | |
34 | * - VT6421 PATA support | |
35 | * | |
1da177e4 LT |
36 | */ |
37 | ||
38 | #include <linux/kernel.h> | |
39 | #include <linux/module.h> | |
40 | #include <linux/pci.h> | |
41 | #include <linux/init.h> | |
42 | #include <linux/blkdev.h> | |
43 | #include <linux/delay.h> | |
a9524a76 | 44 | #include <linux/device.h> |
1da177e4 LT |
45 | #include <scsi/scsi_host.h> |
46 | #include <linux/libata.h> | |
47 | #include <asm/io.h> | |
48 | ||
49 | #define DRV_NAME "sata_via" | |
8676ce07 | 50 | #define DRV_VERSION "2.0" |
1da177e4 LT |
51 | |
52 | enum board_ids_enum { | |
53 | vt6420, | |
54 | vt6421, | |
55 | }; | |
56 | ||
57 | enum { | |
58 | SATA_CHAN_ENAB = 0x40, /* SATA channel enable */ | |
59 | SATA_INT_GATE = 0x41, /* SATA interrupt gating */ | |
60 | SATA_NATIVE_MODE = 0x42, /* Native mode enable */ | |
61 | SATA_PATA_SHARING = 0x49, /* PATA/SATA sharing func ctrl */ | |
62 | ||
63 | PORT0 = (1 << 1), | |
64 | PORT1 = (1 << 0), | |
65 | ALL_PORTS = PORT0 | PORT1, | |
66 | N_PORTS = 2, | |
67 | ||
68 | NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4), | |
69 | ||
70 | SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ | |
71 | SATA_2DEV = (1 << 5), /* SATA is master/slave */ | |
72 | }; | |
73 | ||
74 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | |
75 | static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg); | |
76 | static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | |
ac2164d5 | 77 | static void vt6420_error_handler(struct ata_port *ap); |
1da177e4 | 78 | |
3b7d697d | 79 | static const struct pci_device_id svia_pci_tbl[] = { |
96bc103f | 80 | { PCI_VDEVICE(VIA, 0x5337), vt6420 }, |
2d2744fc JG |
81 | { PCI_VDEVICE(VIA, 0x0591), vt6420 }, |
82 | { PCI_VDEVICE(VIA, 0x3149), vt6420 }, | |
83 | { PCI_VDEVICE(VIA, 0x3249), vt6421 }, | |
1da177e4 LT |
84 | |
85 | { } /* terminate list */ | |
86 | }; | |
87 | ||
88 | static struct pci_driver svia_pci_driver = { | |
89 | .name = DRV_NAME, | |
90 | .id_table = svia_pci_tbl, | |
91 | .probe = svia_init_one, | |
92 | .remove = ata_pci_remove_one, | |
93 | }; | |
94 | ||
193515d5 | 95 | static struct scsi_host_template svia_sht = { |
1da177e4 LT |
96 | .module = THIS_MODULE, |
97 | .name = DRV_NAME, | |
98 | .ioctl = ata_scsi_ioctl, | |
99 | .queuecommand = ata_scsi_queuecmd, | |
1da177e4 LT |
100 | .can_queue = ATA_DEF_QUEUE, |
101 | .this_id = ATA_SHT_THIS_ID, | |
102 | .sg_tablesize = LIBATA_MAX_PRD, | |
1da177e4 LT |
103 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
104 | .emulated = ATA_SHT_EMULATED, | |
105 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
106 | .proc_name = DRV_NAME, | |
107 | .dma_boundary = ATA_DMA_BOUNDARY, | |
108 | .slave_configure = ata_scsi_slave_config, | |
ccf68c34 | 109 | .slave_destroy = ata_scsi_slave_destroy, |
1da177e4 | 110 | .bios_param = ata_std_bios_param, |
1da177e4 LT |
111 | }; |
112 | ||
ac2164d5 TH |
113 | static const struct ata_port_operations vt6420_sata_ops = { |
114 | .port_disable = ata_port_disable, | |
115 | ||
116 | .tf_load = ata_tf_load, | |
117 | .tf_read = ata_tf_read, | |
118 | .check_status = ata_check_status, | |
119 | .exec_command = ata_exec_command, | |
120 | .dev_select = ata_std_dev_select, | |
121 | ||
122 | .bmdma_setup = ata_bmdma_setup, | |
123 | .bmdma_start = ata_bmdma_start, | |
124 | .bmdma_stop = ata_bmdma_stop, | |
125 | .bmdma_status = ata_bmdma_status, | |
126 | ||
127 | .qc_prep = ata_qc_prep, | |
128 | .qc_issue = ata_qc_issue_prot, | |
129 | .data_xfer = ata_pio_data_xfer, | |
130 | ||
131 | .freeze = ata_bmdma_freeze, | |
132 | .thaw = ata_bmdma_thaw, | |
133 | .error_handler = vt6420_error_handler, | |
134 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
135 | ||
136 | .irq_handler = ata_interrupt, | |
137 | .irq_clear = ata_bmdma_irq_clear, | |
138 | ||
139 | .port_start = ata_port_start, | |
140 | .port_stop = ata_port_stop, | |
141 | .host_stop = ata_host_stop, | |
142 | }; | |
143 | ||
144 | static const struct ata_port_operations vt6421_sata_ops = { | |
1da177e4 LT |
145 | .port_disable = ata_port_disable, |
146 | ||
147 | .tf_load = ata_tf_load, | |
148 | .tf_read = ata_tf_read, | |
149 | .check_status = ata_check_status, | |
150 | .exec_command = ata_exec_command, | |
151 | .dev_select = ata_std_dev_select, | |
152 | ||
1da177e4 LT |
153 | .bmdma_setup = ata_bmdma_setup, |
154 | .bmdma_start = ata_bmdma_start, | |
155 | .bmdma_stop = ata_bmdma_stop, | |
156 | .bmdma_status = ata_bmdma_status, | |
157 | ||
158 | .qc_prep = ata_qc_prep, | |
159 | .qc_issue = ata_qc_issue_prot, | |
a6b2c5d4 | 160 | .data_xfer = ata_pio_data_xfer, |
1da177e4 | 161 | |
40ef1d8d TH |
162 | .freeze = ata_bmdma_freeze, |
163 | .thaw = ata_bmdma_thaw, | |
164 | .error_handler = ata_bmdma_error_handler, | |
165 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
1da177e4 LT |
166 | |
167 | .irq_handler = ata_interrupt, | |
168 | .irq_clear = ata_bmdma_irq_clear, | |
169 | ||
170 | .scr_read = svia_scr_read, | |
171 | .scr_write = svia_scr_write, | |
172 | ||
173 | .port_start = ata_port_start, | |
174 | .port_stop = ata_port_stop, | |
aa8f0dc6 | 175 | .host_stop = ata_host_stop, |
1da177e4 LT |
176 | }; |
177 | ||
ac2164d5 | 178 | static struct ata_port_info vt6420_port_info = { |
1da177e4 | 179 | .sht = &svia_sht, |
cca3974e | 180 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, |
1da177e4 LT |
181 | .pio_mask = 0x1f, |
182 | .mwdma_mask = 0x07, | |
183 | .udma_mask = 0x7f, | |
ac2164d5 | 184 | .port_ops = &vt6420_sata_ops, |
1da177e4 LT |
185 | }; |
186 | ||
187 | MODULE_AUTHOR("Jeff Garzik"); | |
188 | MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers"); | |
189 | MODULE_LICENSE("GPL"); | |
190 | MODULE_DEVICE_TABLE(pci, svia_pci_tbl); | |
191 | MODULE_VERSION(DRV_VERSION); | |
192 | ||
193 | static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg) | |
194 | { | |
195 | if (sc_reg > SCR_CONTROL) | |
196 | return 0xffffffffU; | |
197 | return inl(ap->ioaddr.scr_addr + (4 * sc_reg)); | |
198 | } | |
199 | ||
200 | static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | |
201 | { | |
202 | if (sc_reg > SCR_CONTROL) | |
203 | return; | |
204 | outl(val, ap->ioaddr.scr_addr + (4 * sc_reg)); | |
205 | } | |
206 | ||
ac2164d5 TH |
207 | /** |
208 | * vt6420_prereset - prereset for vt6420 | |
209 | * @ap: target ATA port | |
210 | * | |
211 | * SCR registers on vt6420 are pieces of shit and may hang the | |
212 | * whole machine completely if accessed with the wrong timing. | |
213 | * To avoid such catastrophe, vt6420 doesn't provide generic SCR | |
214 | * access operations, but uses SStatus and SControl only during | |
215 | * boot probing in controlled way. | |
216 | * | |
217 | * As the old (pre EH update) probing code is proven to work, we | |
218 | * strictly follow the access pattern. | |
219 | * | |
220 | * LOCKING: | |
221 | * Kernel thread context (may sleep) | |
222 | * | |
223 | * RETURNS: | |
224 | * 0 on success, -errno otherwise. | |
225 | */ | |
226 | static int vt6420_prereset(struct ata_port *ap) | |
227 | { | |
228 | struct ata_eh_context *ehc = &ap->eh_context; | |
229 | unsigned long timeout = jiffies + (HZ * 5); | |
230 | u32 sstatus, scontrol; | |
231 | int online; | |
232 | ||
233 | /* don't do any SCR stuff if we're not loading */ | |
68ff6e8e | 234 | if (!(ap->pflags & ATA_PFLAG_LOADING)) |
ac2164d5 TH |
235 | goto skip_scr; |
236 | ||
237 | /* Resume phy. This is the old resume sequence from | |
238 | * __sata_phy_reset(). | |
239 | */ | |
240 | svia_scr_write(ap, SCR_CONTROL, 0x300); | |
241 | svia_scr_read(ap, SCR_CONTROL); /* flush */ | |
242 | ||
243 | /* wait for phy to become ready, if necessary */ | |
244 | do { | |
245 | msleep(200); | |
246 | if ((svia_scr_read(ap, SCR_STATUS) & 0xf) != 1) | |
247 | break; | |
248 | } while (time_before(jiffies, timeout)); | |
249 | ||
250 | /* open code sata_print_link_status() */ | |
251 | sstatus = svia_scr_read(ap, SCR_STATUS); | |
252 | scontrol = svia_scr_read(ap, SCR_CONTROL); | |
253 | ||
254 | online = (sstatus & 0xf) == 0x3; | |
255 | ||
256 | ata_port_printk(ap, KERN_INFO, | |
257 | "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n", | |
258 | online ? "up" : "down", sstatus, scontrol); | |
259 | ||
260 | /* SStatus is read one more time */ | |
261 | svia_scr_read(ap, SCR_STATUS); | |
262 | ||
263 | if (!online) { | |
264 | /* tell EH to bail */ | |
265 | ehc->i.action &= ~ATA_EH_RESET_MASK; | |
266 | return 0; | |
267 | } | |
268 | ||
269 | skip_scr: | |
270 | /* wait for !BSY */ | |
271 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
272 | ||
273 | return 0; | |
274 | } | |
275 | ||
276 | static void vt6420_error_handler(struct ata_port *ap) | |
277 | { | |
278 | return ata_bmdma_drive_eh(ap, vt6420_prereset, ata_std_softreset, | |
279 | NULL, ata_std_postreset); | |
280 | } | |
281 | ||
1da177e4 LT |
282 | static const unsigned int svia_bar_sizes[] = { |
283 | 8, 4, 8, 4, 16, 256 | |
284 | }; | |
285 | ||
286 | static const unsigned int vt6421_bar_sizes[] = { | |
287 | 16, 16, 16, 16, 32, 128 | |
288 | }; | |
289 | ||
290 | static unsigned long svia_scr_addr(unsigned long addr, unsigned int port) | |
291 | { | |
292 | return addr + (port * 128); | |
293 | } | |
294 | ||
295 | static unsigned long vt6421_scr_addr(unsigned long addr, unsigned int port) | |
296 | { | |
297 | return addr + (port * 64); | |
298 | } | |
299 | ||
300 | static void vt6421_init_addrs(struct ata_probe_ent *probe_ent, | |
301 | struct pci_dev *pdev, | |
302 | unsigned int port) | |
303 | { | |
304 | unsigned long reg_addr = pci_resource_start(pdev, port); | |
305 | unsigned long bmdma_addr = pci_resource_start(pdev, 4) + (port * 8); | |
306 | unsigned long scr_addr; | |
307 | ||
308 | probe_ent->port[port].cmd_addr = reg_addr; | |
309 | probe_ent->port[port].altstatus_addr = | |
310 | probe_ent->port[port].ctl_addr = (reg_addr + 8) | ATA_PCI_CTL_OFS; | |
311 | probe_ent->port[port].bmdma_addr = bmdma_addr; | |
312 | ||
313 | scr_addr = vt6421_scr_addr(pci_resource_start(pdev, 5), port); | |
314 | probe_ent->port[port].scr_addr = scr_addr; | |
315 | ||
316 | ata_std_ports(&probe_ent->port[port]); | |
317 | } | |
318 | ||
319 | static struct ata_probe_ent *vt6420_init_probe_ent(struct pci_dev *pdev) | |
320 | { | |
321 | struct ata_probe_ent *probe_ent; | |
29da9f6d JG |
322 | struct ata_port_info *ppi[2]; |
323 | ||
324 | ppi[0] = ppi[1] = &vt6420_port_info; | |
325 | probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | |
1da177e4 LT |
326 | if (!probe_ent) |
327 | return NULL; | |
328 | ||
329 | probe_ent->port[0].scr_addr = | |
330 | svia_scr_addr(pci_resource_start(pdev, 5), 0); | |
331 | probe_ent->port[1].scr_addr = | |
332 | svia_scr_addr(pci_resource_start(pdev, 5), 1); | |
333 | ||
334 | return probe_ent; | |
335 | } | |
336 | ||
337 | static struct ata_probe_ent *vt6421_init_probe_ent(struct pci_dev *pdev) | |
338 | { | |
339 | struct ata_probe_ent *probe_ent; | |
340 | unsigned int i; | |
341 | ||
342 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | |
343 | if (!probe_ent) | |
344 | return NULL; | |
345 | ||
346 | memset(probe_ent, 0, sizeof(*probe_ent)); | |
347 | probe_ent->dev = pci_dev_to_dev(pdev); | |
348 | INIT_LIST_HEAD(&probe_ent->node); | |
349 | ||
350 | probe_ent->sht = &svia_sht; | |
cca3974e | 351 | probe_ent->port_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY; |
ac2164d5 | 352 | probe_ent->port_ops = &vt6421_sata_ops; |
1da177e4 LT |
353 | probe_ent->n_ports = N_PORTS; |
354 | probe_ent->irq = pdev->irq; | |
1d6f359a | 355 | probe_ent->irq_flags = IRQF_SHARED; |
1da177e4 LT |
356 | probe_ent->pio_mask = 0x1f; |
357 | probe_ent->mwdma_mask = 0x07; | |
358 | probe_ent->udma_mask = 0x7f; | |
359 | ||
360 | for (i = 0; i < N_PORTS; i++) | |
361 | vt6421_init_addrs(probe_ent, pdev, i); | |
362 | ||
363 | return probe_ent; | |
364 | } | |
365 | ||
366 | static void svia_configure(struct pci_dev *pdev) | |
367 | { | |
368 | u8 tmp8; | |
369 | ||
370 | pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8); | |
a9524a76 | 371 | dev_printk(KERN_INFO, &pdev->dev, "routed to hard irq line %d\n", |
1da177e4 LT |
372 | (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f); |
373 | ||
374 | /* make sure SATA channels are enabled */ | |
375 | pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8); | |
376 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { | |
a9524a76 JG |
377 | dev_printk(KERN_DEBUG, &pdev->dev, |
378 | "enabling SATA channels (0x%x)\n", | |
379 | (int) tmp8); | |
1da177e4 LT |
380 | tmp8 |= ALL_PORTS; |
381 | pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8); | |
382 | } | |
383 | ||
384 | /* make sure interrupts for each channel sent to us */ | |
385 | pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8); | |
386 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { | |
a9524a76 JG |
387 | dev_printk(KERN_DEBUG, &pdev->dev, |
388 | "enabling SATA channel interrupts (0x%x)\n", | |
389 | (int) tmp8); | |
1da177e4 LT |
390 | tmp8 |= ALL_PORTS; |
391 | pci_write_config_byte(pdev, SATA_INT_GATE, tmp8); | |
392 | } | |
393 | ||
394 | /* make sure native mode is enabled */ | |
395 | pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8); | |
396 | if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) { | |
a9524a76 JG |
397 | dev_printk(KERN_DEBUG, &pdev->dev, |
398 | "enabling SATA channel native mode (0x%x)\n", | |
399 | (int) tmp8); | |
1da177e4 LT |
400 | tmp8 |= NATIVE_MODE_ALL; |
401 | pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8); | |
402 | } | |
403 | } | |
404 | ||
405 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |
406 | { | |
407 | static int printed_version; | |
408 | unsigned int i; | |
409 | int rc; | |
410 | struct ata_probe_ent *probe_ent; | |
411 | int board_id = (int) ent->driver_data; | |
412 | const int *bar_sizes; | |
413 | int pci_dev_busy = 0; | |
414 | u8 tmp8; | |
415 | ||
416 | if (!printed_version++) | |
a9524a76 | 417 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
1da177e4 LT |
418 | |
419 | rc = pci_enable_device(pdev); | |
420 | if (rc) | |
421 | return rc; | |
422 | ||
423 | rc = pci_request_regions(pdev, DRV_NAME); | |
424 | if (rc) { | |
425 | pci_dev_busy = 1; | |
426 | goto err_out; | |
427 | } | |
428 | ||
429 | if (board_id == vt6420) { | |
430 | pci_read_config_byte(pdev, SATA_PATA_SHARING, &tmp8); | |
431 | if (tmp8 & SATA_2DEV) { | |
a9524a76 JG |
432 | dev_printk(KERN_ERR, &pdev->dev, |
433 | "SATA master/slave not supported (0x%x)\n", | |
434 | (int) tmp8); | |
1da177e4 LT |
435 | rc = -EIO; |
436 | goto err_out_regions; | |
437 | } | |
438 | ||
439 | bar_sizes = &svia_bar_sizes[0]; | |
440 | } else { | |
441 | bar_sizes = &vt6421_bar_sizes[0]; | |
442 | } | |
443 | ||
444 | for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++) | |
445 | if ((pci_resource_start(pdev, i) == 0) || | |
446 | (pci_resource_len(pdev, i) < bar_sizes[i])) { | |
a9524a76 | 447 | dev_printk(KERN_ERR, &pdev->dev, |
e29419ff GKH |
448 | "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n", |
449 | i, | |
450 | (unsigned long long)pci_resource_start(pdev, i), | |
451 | (unsigned long long)pci_resource_len(pdev, i)); | |
1da177e4 LT |
452 | rc = -ENODEV; |
453 | goto err_out_regions; | |
454 | } | |
455 | ||
456 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
457 | if (rc) | |
458 | goto err_out_regions; | |
459 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
460 | if (rc) | |
461 | goto err_out_regions; | |
462 | ||
463 | if (board_id == vt6420) | |
464 | probe_ent = vt6420_init_probe_ent(pdev); | |
465 | else | |
466 | probe_ent = vt6421_init_probe_ent(pdev); | |
8a60a071 | 467 | |
1da177e4 | 468 | if (!probe_ent) { |
a9524a76 | 469 | dev_printk(KERN_ERR, &pdev->dev, "out of memory\n"); |
1da177e4 LT |
470 | rc = -ENOMEM; |
471 | goto err_out_regions; | |
472 | } | |
473 | ||
474 | svia_configure(pdev); | |
475 | ||
476 | pci_set_master(pdev); | |
477 | ||
478 | /* FIXME: check ata_device_add return value */ | |
479 | ata_device_add(probe_ent); | |
480 | kfree(probe_ent); | |
481 | ||
482 | return 0; | |
483 | ||
484 | err_out_regions: | |
485 | pci_release_regions(pdev); | |
486 | err_out: | |
487 | if (!pci_dev_busy) | |
488 | pci_disable_device(pdev); | |
489 | return rc; | |
490 | } | |
491 | ||
492 | static int __init svia_init(void) | |
493 | { | |
b7887196 | 494 | return pci_register_driver(&svia_pci_driver); |
1da177e4 LT |
495 | } |
496 | ||
497 | static void __exit svia_exit(void) | |
498 | { | |
499 | pci_unregister_driver(&svia_pci_driver); | |
500 | } | |
501 | ||
502 | module_init(svia_init); | |
503 | module_exit(svia_exit); | |
504 |