sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in DES code.
[deliverable/linux.git] / drivers / atm / solos-pci.c
CommitLineData
9c54004e
DW
1/*
2 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
3 * Traverse Technologies -- http://www.traverse.com.au/
4 * Xrio Limited -- http://www.xrio.com/
5 *
6 *
7 * Copyright © 2008 Traverse Technologies
8 * Copyright © 2008 Intel Corporation
9 *
10 * Authors: Nathan Williams <nathan@traverse.com.au>
11 * David Woodhouse <dwmw2@infradead.org>
7c4015bd 12 * Treker Chen <treker@xrio.com>
9c54004e
DW
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * version 2, as published by the Free Software Foundation.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24#define DEBUG
25#define VERBOSE_DEBUG
26
27#include <linux/interrupt.h>
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/errno.h>
31#include <linux/ioport.h>
32#include <linux/types.h>
33#include <linux/pci.h>
34#include <linux/atm.h>
35#include <linux/atmdev.h>
36#include <linux/skbuff.h>
37#include <linux/sysfs.h>
38#include <linux/device.h>
39#include <linux/kobject.h>
7c4015bd 40#include <linux/firmware.h>
01e2ffac
DW
41#include <linux/ctype.h>
42#include <linux/swab.h>
5a0e3ad6 43#include <linux/slab.h>
9c54004e 44
7c4015bd 45#define VERSION "0.07"
9c54004e
DW
46#define PTAG "solos-pci"
47
48#define CONFIG_RAM_SIZE 128
49#define FLAGS_ADDR 0x7C
50#define IRQ_EN_ADDR 0x78
51#define FPGA_VER 0x74
52#define IRQ_CLEAR 0x70
7c4015bd
SF
53#define WRITE_FLASH 0x6C
54#define PORTS 0x68
55#define FLASH_BLOCK 0x64
56#define FLASH_BUSY 0x60
57#define FPGA_MODE 0x5C
58#define FLASH_MODE 0x58
90937231
DW
59#define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
60#define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
9c54004e
DW
61
62#define DATA_RAM_SIZE 32768
4dbedf43
NW
63#define BUF_SIZE 2048
64#define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
7c4015bd
SF
65#define FPGA_PAGE 528 /* FPGA flash page size*/
66#define SOLOS_PAGE 512 /* Solos flash page size*/
67#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
68#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
9c54004e 69
4dbedf43
NW
70#define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
71#define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
72#define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
9c54004e 73
eaf83e39
DW
74#define RX_DMA_SIZE 2048
75
4dbedf43
NW
76#define FPGA_VERSION(a,b) (((a) << 8) + (b))
77#define LEGACY_BUFFERS 2
78#define DMA_SUPPORTED 4
79
cc3657e1 80static int reset = 0;
9c54004e 81static int atmdebug = 0;
7c4015bd
SF
82static int firmware_upgrade = 0;
83static int fpga_upgrade = 0;
4dbedf43
NW
84static int db_firmware_upgrade = 0;
85static int db_fpga_upgrade = 0;
9c54004e
DW
86
87struct pkt_hdr {
88 __le16 size;
89 __le16 vpi;
90 __le16 vci;
91 __le16 type;
92};
93
90937231
DW
94struct solos_skb_cb {
95 struct atm_vcc *vcc;
96 uint32_t dma_addr;
97};
98
99
100#define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb)
101
9c54004e
DW
102#define PKT_DATA 0
103#define PKT_COMMAND 1
104#define PKT_POPEN 3
105#define PKT_PCLOSE 4
87ebb186 106#define PKT_STATUS 5
9c54004e
DW
107
108struct solos_card {
109 void __iomem *config_regs;
110 void __iomem *buffers;
111 int nr_ports;
f69e4170 112 int tx_mask;
9c54004e
DW
113 struct pci_dev *dev;
114 struct atm_dev *atmdev[4];
115 struct tasklet_struct tlet;
116 spinlock_t tx_lock;
117 spinlock_t tx_queue_lock;
118 spinlock_t cli_queue_lock;
01e2ffac
DW
119 spinlock_t param_queue_lock;
120 struct list_head param_queue;
9c54004e
DW
121 struct sk_buff_head tx_queue[4];
122 struct sk_buff_head cli_queue[4];
90937231
DW
123 struct sk_buff *tx_skb[4];
124 struct sk_buff *rx_skb[4];
01e2ffac 125 wait_queue_head_t param_wq;
fa755b9f 126 wait_queue_head_t fw_wq;
90937231 127 int using_dma;
4dbedf43
NW
128 int fpga_version;
129 int buffer_size;
9c54004e
DW
130};
131
01e2ffac
DW
132
133struct solos_param {
134 struct list_head list;
135 pid_t pid;
136 int port;
137 struct sk_buff *response;
9c54004e
DW
138};
139
140#define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
141
142MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
143MODULE_DESCRIPTION("Solos PCI driver");
144MODULE_VERSION(VERSION);
145MODULE_LICENSE("GPL");
9fca79d6
BH
146MODULE_FIRMWARE("solos-FPGA.bin");
147MODULE_FIRMWARE("solos-Firmware.bin");
148MODULE_FIRMWARE("solos-db-FPGA.bin");
cc3657e1 149MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
9c54004e 150MODULE_PARM_DESC(atmdebug, "Print ATM data");
7c4015bd
SF
151MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
152MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
4dbedf43
NW
153MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
154MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
cc3657e1 155module_param(reset, int, 0444);
4306cad6 156module_param(atmdebug, int, 0644);
7c4015bd
SF
157module_param(firmware_upgrade, int, 0444);
158module_param(fpga_upgrade, int, 0444);
4dbedf43
NW
159module_param(db_firmware_upgrade, int, 0444);
160module_param(db_fpga_upgrade, int, 0444);
9c54004e
DW
161
162static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
163 struct atm_vcc *vcc);
35c2221b 164static uint32_t fpga_tx(struct solos_card *);
9c54004e
DW
165static irqreturn_t solos_irq(int irq, void *dev_id);
166static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
d9ca676b 167static int atm_init(struct solos_card *, struct device *);
9c54004e
DW
168static void atm_remove(struct solos_card *);
169static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
170static void solos_bh(unsigned long);
171static int print_buffer(struct sk_buff *buf);
172
173static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
174{
175 if (vcc->pop)
176 vcc->pop(vcc, skb);
177 else
178 dev_kfree_skb_any(skb);
179}
180
01e2ffac
DW
181static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
182 char *buf)
183{
184 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
185 struct solos_card *card = atmdev->dev_data;
186 struct solos_param prm;
187 struct sk_buff *skb;
188 struct pkt_hdr *header;
189 int buflen;
190
191 buflen = strlen(attr->attr.name) + 10;
192
3456b221 193 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
01e2ffac
DW
194 if (!skb) {
195 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
196 return -ENOMEM;
197 }
198
199 header = (void *)skb_put(skb, sizeof(*header));
200
201 buflen = snprintf((void *)&header[1], buflen - 1,
202 "L%05d\n%s\n", current->pid, attr->attr.name);
203 skb_put(skb, buflen);
204
205 header->size = cpu_to_le16(buflen);
206 header->vpi = cpu_to_le16(0);
207 header->vci = cpu_to_le16(0);
208 header->type = cpu_to_le16(PKT_COMMAND);
209
210 prm.pid = current->pid;
211 prm.response = NULL;
212 prm.port = SOLOS_CHAN(atmdev);
213
214 spin_lock_irq(&card->param_queue_lock);
215 list_add(&prm.list, &card->param_queue);
216 spin_unlock_irq(&card->param_queue_lock);
217
218 fpga_queue(card, prm.port, skb, NULL);
219
220 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
221
222 spin_lock_irq(&card->param_queue_lock);
223 list_del(&prm.list);
224 spin_unlock_irq(&card->param_queue_lock);
225
226 if (!prm.response)
227 return -EIO;
228
229 buflen = prm.response->len;
230 memcpy(buf, prm.response->data, buflen);
231 kfree_skb(prm.response);
232
233 return buflen;
234}
235
236static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
237 const char *buf, size_t count)
238{
239 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
240 struct solos_card *card = atmdev->dev_data;
241 struct solos_param prm;
242 struct sk_buff *skb;
243 struct pkt_hdr *header;
244 int buflen;
245 ssize_t ret;
246
247 buflen = strlen(attr->attr.name) + 11 + count;
248
3456b221 249 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
01e2ffac
DW
250 if (!skb) {
251 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
252 return -ENOMEM;
253 }
254
255 header = (void *)skb_put(skb, sizeof(*header));
256
257 buflen = snprintf((void *)&header[1], buflen - 1,
258 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
259
260 skb_put(skb, buflen);
261 header->size = cpu_to_le16(buflen);
262 header->vpi = cpu_to_le16(0);
263 header->vci = cpu_to_le16(0);
264 header->type = cpu_to_le16(PKT_COMMAND);
265
266 prm.pid = current->pid;
267 prm.response = NULL;
268 prm.port = SOLOS_CHAN(atmdev);
269
270 spin_lock_irq(&card->param_queue_lock);
271 list_add(&prm.list, &card->param_queue);
272 spin_unlock_irq(&card->param_queue_lock);
273
274 fpga_queue(card, prm.port, skb, NULL);
275
276 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
277
278 spin_lock_irq(&card->param_queue_lock);
279 list_del(&prm.list);
280 spin_unlock_irq(&card->param_queue_lock);
281
282 skb = prm.response;
283
284 if (!skb)
285 return -EIO;
286
287 buflen = skb->len;
288
289 /* Sometimes it has a newline, sometimes it doesn't. */
290 if (skb->data[buflen - 1] == '\n')
291 buflen--;
292
293 if (buflen == 2 && !strncmp(skb->data, "OK", 2))
294 ret = count;
295 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
296 ret = -EIO;
297 else {
298 /* We know we have enough space allocated for this; we allocated
299 it ourselves */
300 skb->data[buflen] = 0;
301
302 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
303 skb->data);
304 ret = -EIO;
305 }
306 kfree_skb(skb);
307
308 return ret;
309}
310
87ebb186
DW
311static char *next_string(struct sk_buff *skb)
312{
313 int i = 0;
314 char *this = skb->data;
c6428e52
DW
315
316 for (i = 0; i < skb->len; i++) {
87ebb186
DW
317 if (this[i] == '\n') {
318 this[i] = 0;
c6428e52 319 skb_pull(skb, i + 1);
87ebb186
DW
320 return this;
321 }
c6428e52
DW
322 if (!isprint(this[i]))
323 return NULL;
87ebb186
DW
324 }
325 return NULL;
326}
327
328/*
329 * Status packet has fields separated by \n, starting with a version number
330 * for the information therein. Fields are....
331 *
332 * packet version
87ebb186 333 * RxBitRate (version >= 1)
f87b2ed2 334 * TxBitRate (version >= 1)
87ebb186 335 * State (version >= 1)
f87b2ed2
DW
336 * LocalSNRMargin (version >= 1)
337 * LocalLineAttn (version >= 1)
87ebb186
DW
338 */
339static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
340{
f87b2ed2
DW
341 char *str, *end, *state_str, *snr, *attn;
342 int ver, rate_up, rate_down;
87ebb186
DW
343
344 if (!card->atmdev[port])
345 return -ENODEV;
346
347 str = next_string(skb);
348 if (!str)
349 return -EIO;
350
351 ver = simple_strtol(str, NULL, 10);
352 if (ver < 1) {
353 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
354 ver);
355 return -EIO;
356 }
357
358 str = next_string(skb);
c6428e52
DW
359 if (!str)
360 return -EIO;
95852f48
DW
361 if (!strcmp(str, "ERROR")) {
362 dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
363 port);
364 return 0;
365 }
366
f87b2ed2 367 rate_down = simple_strtol(str, &end, 10);
87ebb186
DW
368 if (*end)
369 return -EIO;
370
371 str = next_string(skb);
c6428e52
DW
372 if (!str)
373 return -EIO;
f87b2ed2 374 rate_up = simple_strtol(str, &end, 10);
87ebb186
DW
375 if (*end)
376 return -EIO;
377
af780656 378 state_str = next_string(skb);
c6428e52
DW
379 if (!state_str)
380 return -EIO;
f87b2ed2
DW
381
382 /* Anything but 'Showtime' is down */
383 if (strcmp(state_str, "Showtime")) {
49d49106 384 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
f87b2ed2
DW
385 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
386 return 0;
1e615df6 387 }
87ebb186 388
f87b2ed2 389 snr = next_string(skb);
6cf5767c 390 if (!snr)
f87b2ed2
DW
391 return -EIO;
392 attn = next_string(skb);
393 if (!attn)
394 return -EIO;
395
396 dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
397 port, state_str, rate_down/1000, rate_up/1000,
398 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
399
c6428e52 400 card->atmdev[port]->link_rate = rate_down / 424;
49d49106 401 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
87ebb186 402
87ebb186
DW
403 return 0;
404}
405
01e2ffac
DW
406static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
407{
408 struct solos_param *prm;
409 unsigned long flags;
410 int cmdpid;
411 int found = 0;
412
413 if (skb->len < 7)
414 return 0;
415
416 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
417 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
418 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
419 skb->data[6] != '\n')
420 return 0;
421
422 cmdpid = simple_strtol(&skb->data[1], NULL, 10);
423
424 spin_lock_irqsave(&card->param_queue_lock, flags);
425 list_for_each_entry(prm, &card->param_queue, list) {
426 if (prm->port == port && prm->pid == cmdpid) {
427 prm->response = skb;
428 skb_pull(skb, 7);
429 wake_up(&card->param_wq);
430 found = 1;
431 break;
432 }
433 }
434 spin_unlock_irqrestore(&card->param_queue_lock, flags);
435 return found;
436}
437
9c54004e
DW
438static ssize_t console_show(struct device *dev, struct device_attribute *attr,
439 char *buf)
440{
441 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
442 struct solos_card *card = atmdev->dev_data;
443 struct sk_buff *skb;
f1ee89d5 444 unsigned int len;
9c54004e
DW
445
446 spin_lock(&card->cli_queue_lock);
447 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
448 spin_unlock(&card->cli_queue_lock);
449 if(skb == NULL)
450 return sprintf(buf, "No data.\n");
451
f1ee89d5
JS
452 len = skb->len;
453 memcpy(buf, skb->data, len);
454 dev_dbg(&card->dev->dev, "len: %d\n", len);
9c54004e
DW
455
456 kfree_skb(skb);
f1ee89d5 457 return len;
9c54004e
DW
458}
459
460static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
461{
462 struct sk_buff *skb;
463 struct pkt_hdr *header;
464
9c54004e
DW
465 if (size > (BUF_SIZE - sizeof(*header))) {
466 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
467 return 0;
468 }
469 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
470 if (!skb) {
471 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
472 return 0;
473 }
474
475 header = (void *)skb_put(skb, sizeof(*header));
476
477 header->size = cpu_to_le16(size);
478 header->vpi = cpu_to_le16(0);
479 header->vci = cpu_to_le16(0);
480 header->type = cpu_to_le16(PKT_COMMAND);
481
482 memcpy(skb_put(skb, size), buf, size);
483
484 fpga_queue(card, dev, skb, NULL);
485
486 return 0;
487}
488
489static ssize_t console_store(struct device *dev, struct device_attribute *attr,
490 const char *buf, size_t count)
491{
492 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
493 struct solos_card *card = atmdev->dev_data;
494 int err;
495
496 err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
497
498 return err?:count;
499}
500
501static DEVICE_ATTR(console, 0644, console_show, console_store);
502
d057f0a4
DW
503
504#define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
505#define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
506
507#include "solos-attrlist.c"
508
509#undef SOLOS_ATTR_RO
510#undef SOLOS_ATTR_RW
511
512#define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
513#define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
514
515static struct attribute *solos_attrs[] = {
516#include "solos-attrlist.c"
517 NULL
518};
519
520static struct attribute_group solos_attr_group = {
521 .attrs = solos_attrs,
522 .name = "parameters",
523};
9c54004e 524
fa755b9f
DW
525static int flash_upgrade(struct solos_card *card, int chip)
526{
527 const struct firmware *fw;
528 const char *fw_name;
7c4015bd
SF
529 int blocksize = 0;
530 int numblocks = 0;
fa755b9f
DW
531 int offset;
532
7adcdb4c
AM
533 switch (chip) {
534 case 0:
fa755b9f 535 fw_name = "solos-FPGA.bin";
7c4015bd 536 blocksize = FPGA_BLOCK;
7adcdb4c
AM
537 break;
538 case 1:
fa755b9f 539 fw_name = "solos-Firmware.bin";
7c4015bd 540 blocksize = SOLOS_BLOCK;
7adcdb4c
AM
541 break;
542 case 2:
4dbedf43
NW
543 if (card->fpga_version > LEGACY_BUFFERS){
544 fw_name = "solos-db-FPGA.bin";
545 blocksize = FPGA_BLOCK;
546 } else {
7adcdb4c
AM
547 dev_info(&card->dev->dev, "FPGA version doesn't support"
548 " daughter board upgrades\n");
4dbedf43
NW
549 return -EPERM;
550 }
7adcdb4c
AM
551 break;
552 case 3:
4dbedf43
NW
553 if (card->fpga_version > LEGACY_BUFFERS){
554 fw_name = "solos-Firmware.bin";
555 blocksize = SOLOS_BLOCK;
556 } else {
7adcdb4c
AM
557 dev_info(&card->dev->dev, "FPGA version doesn't support"
558 " daughter board upgrades\n");
559 return -EPERM;
4dbedf43 560 }
7adcdb4c
AM
561 break;
562 default:
563 return -ENODEV;
4dbedf43 564 }
fa755b9f
DW
565
566 if (request_firmware(&fw, fw_name, &card->dev->dev))
567 return -ENOENT;
568
569 dev_info(&card->dev->dev, "Flash upgrade starting\n");
570
571 numblocks = fw->size / blocksize;
572 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
7c4015bd
SF
573 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
574
7c4015bd
SF
575 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
576 iowrite32(1, card->config_regs + FPGA_MODE);
06091ed6 577 (void) ioread32(card->config_regs + FPGA_MODE);
7c4015bd 578
fa755b9f 579 /* Set mode to Chip Erase */
4dbedf43
NW
580 if(chip == 0 || chip == 2)
581 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
582 if(chip == 1 || chip == 3)
583 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
fa755b9f 584 iowrite32((chip * 2), card->config_regs + FLASH_MODE);
7c4015bd 585
7c4015bd 586
fa755b9f
DW
587 iowrite32(1, card->config_regs + WRITE_FLASH);
588 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
589
590 for (offset = 0; offset < fw->size; offset += blocksize) {
591 int i;
592
593 /* Clear write flag */
7c4015bd 594 iowrite32(0, card->config_regs + WRITE_FLASH);
7c4015bd 595
fa755b9f
DW
596 /* Set mode to Block Write */
597 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
598 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
599
600 /* Copy block to buffer, swapping each 16 bits */
601 for(i = 0; i < blocksize; i += 4) {
602 uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
4dbedf43
NW
603 if(card->fpga_version > LEGACY_BUFFERS)
604 iowrite32(word, FLASH_BUF + i);
605 else
606 iowrite32(word, RX_BUF(card, 3) + i);
7c4015bd 607 }
fa755b9f
DW
608
609 /* Specify block number and then trigger flash write */
610 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
611 iowrite32(1, card->config_regs + WRITE_FLASH);
612 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
7c4015bd
SF
613 }
614
fa755b9f
DW
615 release_firmware(fw);
616 iowrite32(0, card->config_regs + WRITE_FLASH);
617 iowrite32(0, card->config_regs + FPGA_MODE);
618 iowrite32(0, card->config_regs + FLASH_MODE);
619 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
620 return 0;
7c4015bd
SF
621}
622
9c54004e
DW
623static irqreturn_t solos_irq(int irq, void *dev_id)
624{
625 struct solos_card *card = dev_id;
626 int handled = 1;
627
9c54004e 628 iowrite32(0, card->config_regs + IRQ_CLEAR);
9c54004e 629
35c2221b 630 /* If we're up and running, just kick the tasklet to process TX/RX */
fa755b9f 631 if (card->atmdev[0])
9c54004e 632 tasklet_schedule(&card->tlet);
fa755b9f
DW
633 else
634 wake_up(&card->fw_wq);
9c54004e 635
9c54004e
DW
636 return IRQ_RETVAL(handled);
637}
638
639void solos_bh(unsigned long card_arg)
640{
641 struct solos_card *card = (void *)card_arg;
9c54004e 642 uint32_t card_flags;
9c54004e 643 uint32_t rx_done = 0;
35c2221b 644 int port;
9c54004e 645
35c2221b
DW
646 /*
647 * Since fpga_tx() is going to need to read the flags under its lock,
648 * it can return them to us so that we don't have to hit PCI MMIO
649 * again for the same information
650 */
651 card_flags = fpga_tx(card);
9c54004e
DW
652
653 for (port = 0; port < card->nr_ports; port++) {
654 if (card_flags & (0x10 << port)) {
90937231 655 struct pkt_hdr _hdr, *header;
9c54004e
DW
656 struct sk_buff *skb;
657 struct atm_vcc *vcc;
658 int size;
659
90937231
DW
660 if (card->using_dma) {
661 skb = card->rx_skb[port];
eaf83e39 662 card->rx_skb[port] = NULL;
9c54004e 663
eaf83e39
DW
664 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
665 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
9c54004e 666
90937231
DW
667 header = (void *)skb->data;
668 size = le16_to_cpu(header->size);
669 skb_put(skb, size + sizeof(*header));
670 skb_pull(skb, sizeof(*header));
671 } else {
672 header = &_hdr;
9c54004e 673
90937231 674 rx_done |= 0x10 << port;
9c54004e 675
90937231 676 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
9c54004e 677
90937231 678 size = le16_to_cpu(header->size);
78f857f2
NW
679 if (size > (card->buffer_size - sizeof(*header))){
680 dev_warn(&card->dev->dev, "Invalid buffer size\n");
681 continue;
682 }
9c54004e 683
90937231
DW
684 skb = alloc_skb(size + 1, GFP_ATOMIC);
685 if (!skb) {
686 if (net_ratelimit())
687 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
688 continue;
689 }
9c54004e 690
90937231
DW
691 memcpy_fromio(skb_put(skb, size),
692 RX_BUF(card, port) + sizeof(*header),
693 size);
694 }
9c54004e 695 if (atmdebug) {
18b429e7 696 dev_info(&card->dev->dev, "Received: port %d\n", port);
9c54004e 697 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
90937231
DW
698 size, le16_to_cpu(header->vpi),
699 le16_to_cpu(header->vci));
9c54004e
DW
700 print_buffer(skb);
701 }
702
90937231 703 switch (le16_to_cpu(header->type)) {
9c54004e 704 case PKT_DATA:
90937231
DW
705 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
706 le16_to_cpu(header->vci));
9c54004e
DW
707 if (!vcc) {
708 if (net_ratelimit())
1e19e658
PP
709 dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n",
710 le16_to_cpu(header->vpi), le16_to_cpu(header->vci),
9c54004e 711 port);
007ef52b
NW
712 dev_kfree_skb_any(skb);
713 break;
9c54004e
DW
714 }
715 atm_charge(vcc, skb->truesize);
716 vcc->push(vcc, skb);
717 atomic_inc(&vcc->stats->rx);
718 break;
719
87ebb186 720 case PKT_STATUS:
95852f48
DW
721 if (process_status(card, port, skb) &&
722 net_ratelimit()) {
723 dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
724 print_buffer(skb);
725 }
eaf83e39 726 dev_kfree_skb_any(skb);
87ebb186
DW
727 break;
728
9c54004e
DW
729 case PKT_COMMAND:
730 default: /* FIXME: Not really, surely? */
01e2ffac
DW
731 if (process_command(card, port, skb))
732 break;
9c54004e
DW
733 spin_lock(&card->cli_queue_lock);
734 if (skb_queue_len(&card->cli_queue[port]) > 10) {
735 if (net_ratelimit())
736 dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
737 port);
eaf83e39 738 dev_kfree_skb_any(skb);
9c54004e
DW
739 } else
740 skb_queue_tail(&card->cli_queue[port], skb);
741 spin_unlock(&card->cli_queue_lock);
742 break;
743 }
744 }
eaf83e39
DW
745 /* Allocate RX skbs for any ports which need them */
746 if (card->using_dma && card->atmdev[port] &&
747 !card->rx_skb[port]) {
748 struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC);
749 if (skb) {
750 SKB_CB(skb)->dma_addr =
751 pci_map_single(card->dev, skb->data,
752 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
753 iowrite32(SKB_CB(skb)->dma_addr,
754 card->config_regs + RX_DMA_ADDR(port));
755 card->rx_skb[port] = skb;
756 } else {
757 if (net_ratelimit())
758 dev_warn(&card->dev->dev, "Failed to allocate RX skb");
759
760 /* We'll have to try again later */
761 tasklet_schedule(&card->tlet);
762 }
763 }
9c54004e
DW
764 }
765 if (rx_done)
766 iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
767
768 return;
769}
770
771static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
772{
773 struct hlist_head *head;
774 struct atm_vcc *vcc = NULL;
775 struct hlist_node *node;
776 struct sock *s;
777
778 read_lock(&vcc_sklist_lock);
779 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
780 sk_for_each(s, node, head) {
781 vcc = atm_sk(s);
782 if (vcc->dev == dev && vcc->vci == vci &&
1f6ea6e5
DW
783 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
784 test_bit(ATM_VF_READY, &vcc->flags))
9c54004e
DW
785 goto out;
786 }
787 vcc = NULL;
788 out:
789 read_unlock(&vcc_sklist_lock);
790 return vcc;
791}
792
9c54004e
DW
793static int popen(struct atm_vcc *vcc)
794{
795 struct solos_card *card = vcc->dev->dev_data;
796 struct sk_buff *skb;
797 struct pkt_hdr *header;
798
b28a4b9a
DW
799 if (vcc->qos.aal != ATM_AAL5) {
800 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
801 vcc->qos.aal);
802 return -EINVAL;
803 }
804
a1db5c5b 805 skb = alloc_skb(sizeof(*header), GFP_KERNEL);
da1ab3e2
JJ
806 if (!skb) {
807 if (net_ratelimit())
808 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
9c54004e
DW
809 return -ENOMEM;
810 }
811 header = (void *)skb_put(skb, sizeof(*header));
812
b76811af 813 header->size = cpu_to_le16(0);
9c54004e
DW
814 header->vpi = cpu_to_le16(vcc->vpi);
815 header->vci = cpu_to_le16(vcc->vci);
816 header->type = cpu_to_le16(PKT_POPEN);
817
818 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
819
bdc54625 820 set_bit(ATM_VF_ADDR, &vcc->flags);
9c54004e 821 set_bit(ATM_VF_READY, &vcc->flags);
9c54004e
DW
822
823 return 0;
824}
825
826static void pclose(struct atm_vcc *vcc)
827{
828 struct solos_card *card = vcc->dev->dev_data;
7ad3eade 829 unsigned char port = SOLOS_CHAN(vcc->dev);
213e85d3 830 struct sk_buff *skb, *tmpskb;
9c54004e
DW
831 struct pkt_hdr *header;
832
213e85d3
DW
833 /* Remove any yet-to-be-transmitted packets from the pending queue */
834 spin_lock(&card->tx_queue_lock);
835 skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) {
836 if (SKB_CB(skb)->vcc == vcc) {
837 skb_unlink(skb, &card->tx_queue[port]);
838 solos_pop(vcc, skb);
839 }
840 }
841 spin_unlock(&card->tx_queue_lock);
842
a1db5c5b 843 skb = alloc_skb(sizeof(*header), GFP_KERNEL);
9c54004e
DW
844 if (!skb) {
845 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
846 return;
847 }
848 header = (void *)skb_put(skb, sizeof(*header));
849
b76811af 850 header->size = cpu_to_le16(0);
9c54004e
DW
851 header->vpi = cpu_to_le16(vcc->vpi);
852 header->vci = cpu_to_le16(vcc->vci);
853 header->type = cpu_to_le16(PKT_PCLOSE);
854
7ad3eade
DW
855 skb_get(skb);
856 fpga_queue(card, port, skb, NULL);
9c54004e 857
7ad3eade
DW
858 if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ))
859 dev_warn(&card->dev->dev,
860 "Timeout waiting for VCC close on port %d\n", port);
861
862 dev_kfree_skb(skb);
863
1f6ea6e5
DW
864 /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
865 tasklet has finished processing any incoming packets (and, more to
866 the point, using the vcc pointer). */
867 tasklet_unlock_wait(&card->tlet);
213e85d3
DW
868
869 clear_bit(ATM_VF_ADDR, &vcc->flags);
870
9c54004e
DW
871 return;
872}
873
874static int print_buffer(struct sk_buff *buf)
875{
876 int len,i;
877 char msg[500];
878 char item[10];
879
880 len = buf->len;
881 for (i = 0; i < len; i++){
882 if(i % 8 == 0)
883 sprintf(msg, "%02X: ", i);
884
885 sprintf(item,"%02X ",*(buf->data + i));
886 strcat(msg, item);
887 if(i % 8 == 7) {
888 sprintf(item, "\n");
889 strcat(msg, item);
890 printk(KERN_DEBUG "%s", msg);
891 }
892 }
893 if (i % 8 != 0) {
894 sprintf(item, "\n");
895 strcat(msg, item);
896 printk(KERN_DEBUG "%s", msg);
897 }
898 printk(KERN_DEBUG "\n");
899
900 return 0;
901}
902
903static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
904 struct atm_vcc *vcc)
905{
906 int old_len;
f69e4170 907 unsigned long flags;
9c54004e 908
90937231 909 SKB_CB(skb)->vcc = vcc;
9c54004e 910
f69e4170 911 spin_lock_irqsave(&card->tx_queue_lock, flags);
9c54004e
DW
912 old_len = skb_queue_len(&card->tx_queue[port]);
913 skb_queue_tail(&card->tx_queue[port], skb);
35c2221b 914 if (!old_len)
f69e4170 915 card->tx_mask |= (1 << port);
f69e4170 916 spin_unlock_irqrestore(&card->tx_queue_lock, flags);
9c54004e 917
f69e4170
DW
918 /* Theoretically we could just schedule the tasklet here, but
919 that introduces latency we don't want -- it's noticeable */
9c54004e
DW
920 if (!old_len)
921 fpga_tx(card);
922}
923
35c2221b 924static uint32_t fpga_tx(struct solos_card *card)
9c54004e 925{
35c2221b 926 uint32_t tx_pending, card_flags;
9c54004e
DW
927 uint32_t tx_started = 0;
928 struct sk_buff *skb;
929 struct atm_vcc *vcc;
930 unsigned char port;
931 unsigned long flags;
932
933 spin_lock_irqsave(&card->tx_lock, flags);
35c2221b
DW
934
935 card_flags = ioread32(card->config_regs + FLAGS_ADDR);
936 /*
937 * The queue lock is required for _writing_ to tx_mask, but we're
938 * OK to read it here without locking. The only potential update
939 * that we could race with is in fpga_queue() where it sets a bit
940 * for a new port... but it's going to call this function again if
941 * it's doing that, anyway.
942 */
943 tx_pending = card->tx_mask & ~card_flags;
944
945 for (port = 0; tx_pending; tx_pending >>= 1, port++) {
946 if (tx_pending & 1) {
eaf83e39 947 struct sk_buff *oldskb = card->tx_skb[port];
cae49ede 948 if (oldskb) {
eaf83e39
DW
949 pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr,
950 oldskb->len, PCI_DMA_TODEVICE);
cae49ede
DW
951 card->tx_skb[port] = NULL;
952 }
9c54004e
DW
953 spin_lock(&card->tx_queue_lock);
954 skb = skb_dequeue(&card->tx_queue[port]);
f69e4170
DW
955 if (!skb)
956 card->tx_mask &= ~(1 << port);
9c54004e
DW
957 spin_unlock(&card->tx_queue_lock);
958
eaf83e39
DW
959 if (skb && !card->using_dma) {
960 memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
bdc54625 961 tx_started |= 1 << port;
eaf83e39
DW
962 oldskb = skb; /* We're done with this skb already */
963 } else if (skb && card->using_dma) {
964 SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data,
965 skb->len, PCI_DMA_TODEVICE);
b4bd8ad9 966 card->tx_skb[port] = skb;
eaf83e39
DW
967 iowrite32(SKB_CB(skb)->dma_addr,
968 card->config_regs + TX_DMA_ADDR(port));
969 }
970
971 if (!oldskb)
9c54004e
DW
972 continue;
973
eaf83e39 974 /* Clean up and free oldskb now it's gone */
9c54004e 975 if (atmdebug) {
18b429e7
PP
976 struct pkt_hdr *header = (void *)oldskb->data;
977 int size = le16_to_cpu(header->size);
978
979 skb_pull(oldskb, sizeof(*header));
9c54004e
DW
980 dev_info(&card->dev->dev, "Transmitted: port %d\n",
981 port);
18b429e7
PP
982 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
983 size, le16_to_cpu(header->vpi),
984 le16_to_cpu(header->vci));
eaf83e39 985 print_buffer(oldskb);
9c54004e 986 }
9c54004e 987
eaf83e39 988 vcc = SKB_CB(oldskb)->vcc;
9c54004e
DW
989
990 if (vcc) {
991 atomic_inc(&vcc->stats->tx);
eaf83e39 992 solos_pop(vcc, oldskb);
7ad3eade 993 } else {
eaf83e39 994 dev_kfree_skb_irq(oldskb);
7ad3eade
DW
995 wake_up(&card->param_wq);
996 }
9c54004e
DW
997 }
998 }
bdc54625 999 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
9c54004e
DW
1000 if (tx_started)
1001 iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
1002
1003 spin_unlock_irqrestore(&card->tx_lock, flags);
35c2221b 1004 return card_flags;
9c54004e
DW
1005}
1006
1007static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
1008{
1009 struct solos_card *card = vcc->dev->dev_data;
9c54004e 1010 struct pkt_hdr *header;
b76811af 1011 int pktlen;
9c54004e 1012
b76811af
DW
1013 pktlen = skb->len;
1014 if (pktlen > (BUF_SIZE - sizeof(*header))) {
9c54004e
DW
1015 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
1016 solos_pop(vcc, skb);
1017 return 0;
1018 }
1019
1020 if (!skb_clone_writable(skb, sizeof(*header))) {
1021 int expand_by = 0;
1022 int ret;
1023
1024 if (skb_headroom(skb) < sizeof(*header))
1025 expand_by = sizeof(*header) - skb_headroom(skb);
1026
1027 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
1028 if (ret) {
4306cad6 1029 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
9c54004e
DW
1030 solos_pop(vcc, skb);
1031 return ret;
1032 }
1033 }
1034
1035 header = (void *)skb_push(skb, sizeof(*header));
1036
b76811af
DW
1037 /* This does _not_ include the size of the header */
1038 header->size = cpu_to_le16(pktlen);
9c54004e
DW
1039 header->vpi = cpu_to_le16(vcc->vpi);
1040 header->vci = cpu_to_le16(vcc->vci);
1041 header->type = cpu_to_le16(PKT_DATA);
1042
1043 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
1044
1045 return 0;
1046}
1047
1048static struct atmdev_ops fpga_ops = {
1049 .open = popen,
1050 .close = pclose,
1051 .ioctl = NULL,
1052 .getsockopt = NULL,
1053 .setsockopt = NULL,
1054 .send = psend,
1055 .send_oam = NULL,
1056 .phy_put = NULL,
1057 .phy_get = NULL,
1058 .change_qos = NULL,
1059 .proc_read = NULL,
1060 .owner = THIS_MODULE
1061};
1062
1063static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1064{
cd5549e0 1065 int err;
9c54004e
DW
1066 uint16_t fpga_ver;
1067 uint8_t major_ver, minor_ver;
1068 uint32_t data32;
1069 struct solos_card *card;
1070
9c54004e
DW
1071 card = kzalloc(sizeof(*card), GFP_KERNEL);
1072 if (!card)
1073 return -ENOMEM;
1074
1075 card->dev = dev;
fa755b9f 1076 init_waitqueue_head(&card->fw_wq);
01e2ffac 1077 init_waitqueue_head(&card->param_wq);
9c54004e
DW
1078
1079 err = pci_enable_device(dev);
1080 if (err) {
1081 dev_warn(&dev->dev, "Failed to enable PCI device\n");
1082 goto out;
1083 }
1084
e930438c 1085 err = pci_set_dma_mask(dev, DMA_BIT_MASK(32));
90937231
DW
1086 if (err) {
1087 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
1088 goto out;
1089 }
1090
9c54004e
DW
1091 err = pci_request_regions(dev, "solos");
1092 if (err) {
1093 dev_warn(&dev->dev, "Failed to request regions\n");
1094 goto out;
1095 }
1096
1097 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
1098 if (!card->config_regs) {
1099 dev_warn(&dev->dev, "Failed to ioremap config registers\n");
1100 goto out_release_regions;
1101 }
1102 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
1103 if (!card->buffers) {
1104 dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
1105 goto out_unmap_config;
1106 }
1107
cc3657e1
DW
1108 if (reset) {
1109 iowrite32(1, card->config_regs + FPGA_MODE);
1110 data32 = ioread32(card->config_regs + FPGA_MODE);
9c54004e 1111
cc3657e1
DW
1112 iowrite32(0, card->config_regs + FPGA_MODE);
1113 data32 = ioread32(card->config_regs + FPGA_MODE);
1114 }
9c54004e
DW
1115
1116 data32 = ioread32(card->config_regs + FPGA_VER);
1117 fpga_ver = (data32 & 0x0000FFFF);
1118 major_ver = ((data32 & 0xFF000000) >> 24);
1119 minor_ver = ((data32 & 0x00FF0000) >> 16);
4dbedf43
NW
1120 card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
1121 if (card->fpga_version > LEGACY_BUFFERS)
1122 card->buffer_size = BUF_SIZE;
1123 else
1124 card->buffer_size = OLD_BUF_SIZE;
9c54004e
DW
1125 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1126 major_ver, minor_ver, fpga_ver);
1127
3ce1227c
DW
1128 if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade ||
1129 db_fpga_upgrade || db_firmware_upgrade)) {
1130 dev_warn(&dev->dev,
1131 "FPGA too old; cannot upgrade flash. Use JTAG.\n");
1132 fpga_upgrade = firmware_upgrade = 0;
1133 db_fpga_upgrade = db_firmware_upgrade = 0;
1134 }
1135
b4bd8ad9
DW
1136 if (card->fpga_version >= DMA_SUPPORTED) {
1137 pci_set_master(dev);
90937231 1138 card->using_dma = 1;
4dbedf43
NW
1139 } else {
1140 card->using_dma = 0;
eab50f73
DW
1141 /* Set RX empty flag for all ports */
1142 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1143 }
9c54004e 1144
0fc36aa5
NW
1145 data32 = ioread32(card->config_regs + PORTS);
1146 card->nr_ports = (data32 & 0x000000FF);
9c54004e
DW
1147
1148 pci_set_drvdata(dev, card);
fa755b9f 1149
9c54004e
DW
1150 tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
1151 spin_lock_init(&card->tx_lock);
1152 spin_lock_init(&card->tx_queue_lock);
1153 spin_lock_init(&card->cli_queue_lock);
01e2ffac
DW
1154 spin_lock_init(&card->param_queue_lock);
1155 INIT_LIST_HEAD(&card->param_queue);
fa755b9f 1156
fcd82664 1157 err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
9c54004e 1158 "solos-pci", card);
fa755b9f 1159 if (err) {
9c54004e 1160 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
fa755b9f
DW
1161 goto out_unmap_both;
1162 }
9c54004e 1163
9c54004e
DW
1164 iowrite32(1, card->config_regs + IRQ_EN_ADDR);
1165
fa755b9f
DW
1166 if (fpga_upgrade)
1167 flash_upgrade(card, 0);
1168
1169 if (firmware_upgrade)
1170 flash_upgrade(card, 1);
1171
4dbedf43
NW
1172 if (db_fpga_upgrade)
1173 flash_upgrade(card, 2);
1174
1175 if (db_firmware_upgrade)
1176 flash_upgrade(card, 3);
1177
d9ca676b 1178 err = atm_init(card, &dev->dev);
fa755b9f
DW
1179 if (err)
1180 goto out_free_irq;
1181
9c54004e
DW
1182 return 0;
1183
fa755b9f
DW
1184 out_free_irq:
1185 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1186 free_irq(dev->irq, card);
1187 tasklet_kill(&card->tlet);
1188
9c54004e 1189 out_unmap_both:
fa755b9f 1190 pci_set_drvdata(dev, NULL);
9c54004e 1191 pci_iounmap(dev, card->buffers);
8ae0cfee
JL
1192 out_unmap_config:
1193 pci_iounmap(dev, card->config_regs);
9c54004e
DW
1194 out_release_regions:
1195 pci_release_regions(dev);
1196 out:
bc111d57 1197 kfree(card);
9c54004e
DW
1198 return err;
1199}
1200
d9ca676b 1201static int atm_init(struct solos_card *card, struct device *parent)
9c54004e
DW
1202{
1203 int i;
1204
9c54004e 1205 for (i = 0; i < card->nr_ports; i++) {
87ebb186
DW
1206 struct sk_buff *skb;
1207 struct pkt_hdr *header;
1208
9c54004e
DW
1209 skb_queue_head_init(&card->tx_queue[i]);
1210 skb_queue_head_init(&card->cli_queue[i]);
1211
d9ca676b 1212 card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL);
9c54004e
DW
1213 if (!card->atmdev[i]) {
1214 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
1215 atm_remove(card);
1216 return -ENODEV;
1217 }
1218 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
1219 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
d057f0a4
DW
1220 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
1221 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
9c54004e
DW
1222
1223 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
1224
1225 card->atmdev[i]->ci_range.vpi_bits = 8;
1226 card->atmdev[i]->ci_range.vci_bits = 16;
1227 card->atmdev[i]->dev_data = card;
1228 card->atmdev[i]->phy_data = (void *)(unsigned long)i;
c031235b 1229 atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND);
87ebb186 1230
a1db5c5b 1231 skb = alloc_skb(sizeof(*header), GFP_KERNEL);
87ebb186
DW
1232 if (!skb) {
1233 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
1234 continue;
1235 }
1236
1237 header = (void *)skb_put(skb, sizeof(*header));
1238
1239 header->size = cpu_to_le16(0);
1240 header->vpi = cpu_to_le16(0);
1241 header->vci = cpu_to_le16(0);
1242 header->type = cpu_to_le16(PKT_STATUS);
1243
1244 fpga_queue(card, i, skb, NULL);
9c54004e
DW
1245 }
1246 return 0;
1247}
1248
1249static void atm_remove(struct solos_card *card)
1250{
1251 int i;
1252
1253 for (i = 0; i < card->nr_ports; i++) {
1254 if (card->atmdev[i]) {
97d759d3
DW
1255 struct sk_buff *skb;
1256
9c54004e 1257 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
c0fe3026
DW
1258
1259 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
9c54004e 1260 atm_dev_deregister(card->atmdev[i]);
97d759d3
DW
1261
1262 skb = card->rx_skb[i];
1263 if (skb) {
1264 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
1265 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
1266 dev_kfree_skb(skb);
1267 }
1268 skb = card->tx_skb[i];
1269 if (skb) {
1270 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
1271 skb->len, PCI_DMA_TODEVICE);
1272 dev_kfree_skb(skb);
1273 }
1274 while ((skb = skb_dequeue(&card->tx_queue[i])))
1275 dev_kfree_skb(skb);
1276
9c54004e
DW
1277 }
1278 }
1279}
1280
1281static void fpga_remove(struct pci_dev *dev)
1282{
1283 struct solos_card *card = pci_get_drvdata(dev);
97d759d3
DW
1284
1285 /* Disable IRQs */
1286 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
9c54004e 1287
97d759d3
DW
1288 /* Reset FPGA */
1289 iowrite32(1, card->config_regs + FPGA_MODE);
1290 (void)ioread32(card->config_regs + FPGA_MODE);
9c54004e
DW
1291
1292 atm_remove(card);
1293
9c54004e
DW
1294 free_irq(dev->irq, card);
1295 tasklet_kill(&card->tlet);
1296
97d759d3
DW
1297 /* Release device from reset */
1298 iowrite32(0, card->config_regs + FPGA_MODE);
1299 (void)ioread32(card->config_regs + FPGA_MODE);
1300
9c54004e
DW
1301 pci_iounmap(dev, card->buffers);
1302 pci_iounmap(dev, card->config_regs);
1303
9c54004e
DW
1304 pci_release_regions(dev);
1305 pci_disable_device(dev);
1306
1307 pci_set_drvdata(dev, NULL);
1308 kfree(card);
9c54004e
DW
1309}
1310
1311static struct pci_device_id fpga_pci_tbl[] __devinitdata = {
1312 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1313 { 0, }
1314};
1315
1316MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
1317
1318static struct pci_driver fpga_driver = {
1319 .name = "solos",
1320 .id_table = fpga_pci_tbl,
1321 .probe = fpga_probe,
1322 .remove = fpga_remove,
1323};
1324
1325
1326static int __init solos_pci_init(void)
1327{
7ad3eade
DW
1328 BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb));
1329
9c54004e
DW
1330 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
1331 return pci_register_driver(&fpga_driver);
1332}
1333
1334static void __exit solos_pci_exit(void)
1335{
1336 pci_unregister_driver(&fpga_driver);
1337 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
1338}
1339
1340module_init(solos_pci_init);
1341module_exit(solos_pci_exit);
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