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c09fcc4b MZ |
1 | /* |
2 | * MSI framework for platform devices | |
3 | * | |
4 | * Copyright (C) 2015 ARM Limited, All Rights Reserved. | |
5 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <linux/device.h> | |
21 | #include <linux/idr.h> | |
22 | #include <linux/irq.h> | |
23 | #include <linux/irqdomain.h> | |
24 | #include <linux/msi.h> | |
25 | #include <linux/slab.h> | |
26 | ||
aff5e06b | 27 | #define DEV_ID_SHIFT 21 |
ab6484ee | 28 | #define MAX_DEV_MSIS (1 << (32 - DEV_ID_SHIFT)) |
c09fcc4b MZ |
29 | |
30 | /* | |
31 | * Internal data structure containing a (made up, but unique) devid | |
32 | * and the callback to write the MSI message. | |
33 | */ | |
34 | struct platform_msi_priv_data { | |
552c494a MZ |
35 | struct device *dev; |
36 | void *host_data; | |
37 | msi_alloc_info_t arg; | |
c09fcc4b MZ |
38 | irq_write_msi_msg_t write_msg; |
39 | int devid; | |
40 | }; | |
41 | ||
42 | /* The devid allocator */ | |
43 | static DEFINE_IDA(platform_msi_devid_ida); | |
44 | ||
45 | #ifdef GENERIC_MSI_DOMAIN_OPS | |
46 | /* | |
47 | * Convert an msi_desc to a globaly unique identifier (per-device | |
48 | * devid + msi_desc position in the msi_list). | |
49 | */ | |
50 | static irq_hw_number_t platform_msi_calc_hwirq(struct msi_desc *desc) | |
51 | { | |
52 | u32 devid; | |
53 | ||
54 | devid = desc->platform.msi_priv_data->devid; | |
55 | ||
56 | return (devid << (32 - DEV_ID_SHIFT)) | desc->platform.msi_index; | |
57 | } | |
58 | ||
59 | static void platform_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc) | |
60 | { | |
61 | arg->desc = desc; | |
62 | arg->hwirq = platform_msi_calc_hwirq(desc); | |
63 | } | |
64 | ||
65 | static int platform_msi_init(struct irq_domain *domain, | |
66 | struct msi_domain_info *info, | |
67 | unsigned int virq, irq_hw_number_t hwirq, | |
68 | msi_alloc_info_t *arg) | |
69 | { | |
e4084a16 MZ |
70 | return irq_domain_set_hwirq_and_chip(domain, virq, hwirq, |
71 | info->chip, info->chip_data); | |
c09fcc4b MZ |
72 | } |
73 | #else | |
74 | #define platform_msi_set_desc NULL | |
75 | #define platform_msi_init NULL | |
76 | #endif | |
77 | ||
78 | static void platform_msi_update_dom_ops(struct msi_domain_info *info) | |
79 | { | |
80 | struct msi_domain_ops *ops = info->ops; | |
81 | ||
82 | BUG_ON(!ops); | |
83 | ||
84 | if (ops->msi_init == NULL) | |
85 | ops->msi_init = platform_msi_init; | |
86 | if (ops->set_desc == NULL) | |
87 | ops->set_desc = platform_msi_set_desc; | |
88 | } | |
89 | ||
90 | static void platform_msi_write_msg(struct irq_data *data, struct msi_msg *msg) | |
91 | { | |
e4084a16 | 92 | struct msi_desc *desc = irq_data_get_msi_desc(data); |
c09fcc4b MZ |
93 | struct platform_msi_priv_data *priv_data; |
94 | ||
95 | priv_data = desc->platform.msi_priv_data; | |
96 | ||
97 | priv_data->write_msg(desc, msg); | |
98 | } | |
99 | ||
100 | static void platform_msi_update_chip_ops(struct msi_domain_info *info) | |
101 | { | |
102 | struct irq_chip *chip = info->chip; | |
103 | ||
104 | BUG_ON(!chip); | |
105 | if (!chip->irq_mask) | |
106 | chip->irq_mask = irq_chip_mask_parent; | |
107 | if (!chip->irq_unmask) | |
108 | chip->irq_unmask = irq_chip_unmask_parent; | |
109 | if (!chip->irq_eoi) | |
110 | chip->irq_eoi = irq_chip_eoi_parent; | |
111 | if (!chip->irq_set_affinity) | |
112 | chip->irq_set_affinity = msi_domain_set_affinity; | |
113 | if (!chip->irq_write_msi_msg) | |
114 | chip->irq_write_msi_msg = platform_msi_write_msg; | |
115 | } | |
116 | ||
ab6484ee | 117 | static void platform_msi_free_descs(struct device *dev, int base, int nvec) |
c09fcc4b MZ |
118 | { |
119 | struct msi_desc *desc, *tmp; | |
120 | ||
121 | list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) { | |
ab6484ee MZ |
122 | if (desc->platform.msi_index >= base && |
123 | desc->platform.msi_index < (base + nvec)) { | |
124 | list_del(&desc->list); | |
125 | free_msi_entry(desc); | |
126 | } | |
c09fcc4b MZ |
127 | } |
128 | } | |
129 | ||
552c494a MZ |
130 | static int platform_msi_alloc_descs_with_irq(struct device *dev, int virq, |
131 | int nvec, | |
132 | struct platform_msi_priv_data *data) | |
c09fcc4b MZ |
133 | |
134 | { | |
ab6484ee MZ |
135 | struct msi_desc *desc; |
136 | int i, base = 0; | |
c09fcc4b | 137 | |
ab6484ee MZ |
138 | if (!list_empty(dev_to_msi_list(dev))) { |
139 | desc = list_last_entry(dev_to_msi_list(dev), | |
140 | struct msi_desc, list); | |
141 | base = desc->platform.msi_index + 1; | |
142 | } | |
c09fcc4b | 143 | |
ab6484ee | 144 | for (i = 0; i < nvec; i++) { |
c09fcc4b MZ |
145 | desc = alloc_msi_entry(dev); |
146 | if (!desc) | |
147 | break; | |
148 | ||
149 | desc->platform.msi_priv_data = data; | |
ab6484ee | 150 | desc->platform.msi_index = base + i; |
c09fcc4b | 151 | desc->nvec_used = 1; |
552c494a | 152 | desc->irq = virq ? virq + i : 0; |
c09fcc4b MZ |
153 | |
154 | list_add_tail(&desc->list, dev_to_msi_list(dev)); | |
155 | } | |
156 | ||
157 | if (i != nvec) { | |
158 | /* Clean up the mess */ | |
ab6484ee | 159 | platform_msi_free_descs(dev, base, nvec); |
c09fcc4b MZ |
160 | |
161 | return -ENOMEM; | |
162 | } | |
163 | ||
164 | return 0; | |
165 | } | |
166 | ||
552c494a MZ |
167 | static int platform_msi_alloc_descs(struct device *dev, int nvec, |
168 | struct platform_msi_priv_data *data) | |
169 | ||
170 | { | |
171 | return platform_msi_alloc_descs_with_irq(dev, 0, nvec, data); | |
172 | } | |
173 | ||
c09fcc4b MZ |
174 | /** |
175 | * platform_msi_create_irq_domain - Create a platform MSI interrupt domain | |
be5436c8 | 176 | * @fwnode: Optional fwnode of the interrupt controller |
c09fcc4b MZ |
177 | * @info: MSI domain info |
178 | * @parent: Parent irq domain | |
179 | * | |
180 | * Updates the domain and chip ops and creates a platform MSI | |
181 | * interrupt domain. | |
182 | * | |
183 | * Returns: | |
184 | * A domain pointer or NULL in case of failure. | |
185 | */ | |
be5436c8 | 186 | struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode, |
c09fcc4b MZ |
187 | struct msi_domain_info *info, |
188 | struct irq_domain *parent) | |
189 | { | |
190 | struct irq_domain *domain; | |
191 | ||
192 | if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS) | |
193 | platform_msi_update_dom_ops(info); | |
194 | if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) | |
195 | platform_msi_update_chip_ops(info); | |
196 | ||
be5436c8 | 197 | domain = msi_create_irq_domain(fwnode, info, parent); |
c09fcc4b MZ |
198 | if (domain) |
199 | domain->bus_token = DOMAIN_BUS_PLATFORM_MSI; | |
200 | ||
201 | return domain; | |
202 | } | |
203 | ||
72f57f2f MZ |
204 | static struct platform_msi_priv_data * |
205 | platform_msi_alloc_priv_data(struct device *dev, unsigned int nvec, | |
206 | irq_write_msi_msg_t write_msi_msg) | |
c09fcc4b | 207 | { |
72f57f2f | 208 | struct platform_msi_priv_data *datap; |
c09fcc4b MZ |
209 | /* |
210 | * Limit the number of interrupts to 256 per device. Should we | |
211 | * need to bump this up, DEV_ID_SHIFT should be adjusted | |
212 | * accordingly (which would impact the max number of MSI | |
213 | * capable devices). | |
214 | */ | |
ab6484ee | 215 | if (!dev->msi_domain || !write_msi_msg || !nvec || nvec > MAX_DEV_MSIS) |
72f57f2f | 216 | return ERR_PTR(-EINVAL); |
c09fcc4b MZ |
217 | |
218 | if (dev->msi_domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) { | |
219 | dev_err(dev, "Incompatible msi_domain, giving up\n"); | |
72f57f2f | 220 | return ERR_PTR(-EINVAL); |
c09fcc4b MZ |
221 | } |
222 | ||
223 | /* Already had a helping of MSI? Greed... */ | |
224 | if (!list_empty(dev_to_msi_list(dev))) | |
72f57f2f MZ |
225 | return ERR_PTR(-EBUSY); |
226 | ||
227 | datap = kzalloc(sizeof(*datap), GFP_KERNEL); | |
228 | if (!datap) | |
229 | return ERR_PTR(-ENOMEM); | |
230 | ||
231 | datap->devid = ida_simple_get(&platform_msi_devid_ida, | |
232 | 0, 1 << DEV_ID_SHIFT, GFP_KERNEL); | |
233 | if (datap->devid < 0) { | |
234 | int err = datap->devid; | |
235 | kfree(datap); | |
236 | return ERR_PTR(err); | |
237 | } | |
c09fcc4b | 238 | |
72f57f2f | 239 | datap->write_msg = write_msi_msg; |
552c494a | 240 | datap->dev = dev; |
c09fcc4b | 241 | |
72f57f2f MZ |
242 | return datap; |
243 | } | |
244 | ||
245 | static void platform_msi_free_priv_data(struct platform_msi_priv_data *data) | |
246 | { | |
247 | ida_simple_remove(&platform_msi_devid_ida, data->devid); | |
248 | kfree(data); | |
249 | } | |
250 | ||
251 | /** | |
252 | * platform_msi_domain_alloc_irqs - Allocate MSI interrupts for @dev | |
253 | * @dev: The device for which to allocate interrupts | |
254 | * @nvec: The number of interrupts to allocate | |
255 | * @write_msi_msg: Callback to write an interrupt message for @dev | |
256 | * | |
257 | * Returns: | |
258 | * Zero for success, or an error code in case of failure | |
259 | */ | |
260 | int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec, | |
261 | irq_write_msi_msg_t write_msi_msg) | |
262 | { | |
263 | struct platform_msi_priv_data *priv_data; | |
264 | int err; | |
c09fcc4b | 265 | |
72f57f2f MZ |
266 | priv_data = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg); |
267 | if (IS_ERR(priv_data)) | |
268 | return PTR_ERR(priv_data); | |
c09fcc4b MZ |
269 | |
270 | err = platform_msi_alloc_descs(dev, nvec, priv_data); | |
271 | if (err) | |
72f57f2f | 272 | goto out_free_priv_data; |
c09fcc4b MZ |
273 | |
274 | err = msi_domain_alloc_irqs(dev->msi_domain, dev, nvec); | |
275 | if (err) | |
276 | goto out_free_desc; | |
277 | ||
278 | return 0; | |
279 | ||
280 | out_free_desc: | |
ab6484ee | 281 | platform_msi_free_descs(dev, 0, nvec); |
72f57f2f MZ |
282 | out_free_priv_data: |
283 | platform_msi_free_priv_data(priv_data); | |
c09fcc4b MZ |
284 | |
285 | return err; | |
286 | } | |
bb1a7931 | 287 | EXPORT_SYMBOL_GPL(platform_msi_domain_alloc_irqs); |
c09fcc4b MZ |
288 | |
289 | /** | |
290 | * platform_msi_domain_free_irqs - Free MSI interrupts for @dev | |
291 | * @dev: The device for which to free interrupts | |
292 | */ | |
293 | void platform_msi_domain_free_irqs(struct device *dev) | |
294 | { | |
72f57f2f MZ |
295 | if (!list_empty(dev_to_msi_list(dev))) { |
296 | struct msi_desc *desc; | |
c09fcc4b | 297 | |
72f57f2f MZ |
298 | desc = first_msi_entry(dev); |
299 | platform_msi_free_priv_data(desc->platform.msi_priv_data); | |
c09fcc4b MZ |
300 | } |
301 | ||
302 | msi_domain_free_irqs(dev->msi_domain, dev); | |
ab6484ee | 303 | platform_msi_free_descs(dev, 0, MAX_DEV_MSIS); |
c09fcc4b | 304 | } |
bb1a7931 | 305 | EXPORT_SYMBOL_GPL(platform_msi_domain_free_irqs); |
552c494a MZ |
306 | |
307 | /** | |
308 | * platform_msi_get_host_data - Query the private data associated with | |
309 | * a platform-msi domain | |
310 | * @domain: The platform-msi domain | |
311 | * | |
312 | * Returns the private data provided when calling | |
313 | * platform_msi_create_device_domain. | |
314 | */ | |
315 | void *platform_msi_get_host_data(struct irq_domain *domain) | |
316 | { | |
317 | struct platform_msi_priv_data *data = domain->host_data; | |
318 | return data->host_data; | |
319 | } | |
320 | ||
321 | /** | |
322 | * platform_msi_create_device_domain - Create a platform-msi domain | |
323 | * | |
324 | * @dev: The device generating the MSIs | |
325 | * @nvec: The number of MSIs that need to be allocated | |
326 | * @write_msi_msg: Callback to write an interrupt message for @dev | |
327 | * @ops: The hierarchy domain operations to use | |
328 | * @host_data: Private data associated to this domain | |
329 | * | |
330 | * Returns an irqdomain for @nvec interrupts | |
331 | */ | |
332 | struct irq_domain * | |
333 | platform_msi_create_device_domain(struct device *dev, | |
334 | unsigned int nvec, | |
335 | irq_write_msi_msg_t write_msi_msg, | |
336 | const struct irq_domain_ops *ops, | |
337 | void *host_data) | |
338 | { | |
339 | struct platform_msi_priv_data *data; | |
340 | struct irq_domain *domain; | |
341 | int err; | |
342 | ||
343 | data = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg); | |
344 | if (IS_ERR(data)) | |
345 | return NULL; | |
346 | ||
347 | data->host_data = host_data; | |
348 | domain = irq_domain_create_hierarchy(dev->msi_domain, 0, nvec, | |
349 | of_node_to_fwnode(dev->of_node), | |
350 | ops, data); | |
351 | if (!domain) | |
352 | goto free_priv; | |
353 | ||
354 | err = msi_domain_prepare_irqs(domain->parent, dev, nvec, &data->arg); | |
355 | if (err) | |
356 | goto free_domain; | |
357 | ||
358 | return domain; | |
359 | ||
360 | free_domain: | |
361 | irq_domain_remove(domain); | |
362 | free_priv: | |
363 | platform_msi_free_priv_data(data); | |
364 | return NULL; | |
365 | } | |
366 | ||
367 | /** | |
368 | * platform_msi_domain_free - Free interrupts associated with a platform-msi | |
369 | * domain | |
370 | * | |
371 | * @domain: The platform-msi domain | |
372 | * @virq: The base irq from which to perform the free operation | |
373 | * @nvec: How many interrupts to free from @virq | |
374 | */ | |
375 | void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq, | |
376 | unsigned int nvec) | |
377 | { | |
378 | struct platform_msi_priv_data *data = domain->host_data; | |
379 | struct msi_desc *desc; | |
380 | for_each_msi_entry(desc, data->dev) { | |
381 | if (WARN_ON(!desc->irq || desc->nvec_used != 1)) | |
382 | return; | |
383 | if (!(desc->irq >= virq && desc->irq < (virq + nvec))) | |
384 | continue; | |
385 | ||
386 | irq_domain_free_irqs_common(domain, desc->irq, 1); | |
387 | } | |
388 | } | |
389 | ||
390 | /** | |
391 | * platform_msi_domain_alloc - Allocate interrupts associated with | |
392 | * a platform-msi domain | |
393 | * | |
394 | * @domain: The platform-msi domain | |
395 | * @virq: The base irq from which to perform the allocate operation | |
396 | * @nvec: How many interrupts to free from @virq | |
397 | * | |
398 | * Return 0 on success, or an error code on failure. Must be called | |
399 | * with irq_domain_mutex held (which can only be done as part of a | |
400 | * top-level interrupt allocation). | |
401 | */ | |
402 | int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq, | |
403 | unsigned int nr_irqs) | |
404 | { | |
405 | struct platform_msi_priv_data *data = domain->host_data; | |
406 | int err; | |
407 | ||
408 | err = platform_msi_alloc_descs_with_irq(data->dev, virq, nr_irqs, data); | |
409 | if (err) | |
410 | return err; | |
411 | ||
412 | err = msi_domain_populate_irqs(domain->parent, data->dev, | |
413 | virq, nr_irqs, &data->arg); | |
414 | if (err) | |
415 | platform_msi_domain_free(domain, virq, nr_irqs); | |
416 | ||
417 | return err; | |
418 | } |