Commit | Line | Data |
---|---|---|
9fabe24e DP |
1 | /* |
2 | * Register cache access API | |
3 | * | |
4 | * Copyright 2011 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/slab.h> | |
14 | #include <trace/events/regmap.h> | |
15 | ||
16 | #include "internal.h" | |
17 | ||
18 | static const struct regcache_ops *cache_types[] = { | |
195af65c | 19 | ®cache_indexed_ops, |
28644c80 | 20 | ®cache_rbtree_ops, |
2cbbb579 | 21 | ®cache_lzo_ops, |
9fabe24e DP |
22 | }; |
23 | ||
24 | static int regcache_hw_init(struct regmap *map) | |
25 | { | |
26 | int i, j; | |
27 | int ret; | |
28 | int count; | |
29 | unsigned int val; | |
30 | void *tmp_buf; | |
31 | ||
32 | if (!map->num_reg_defaults_raw) | |
33 | return -EINVAL; | |
34 | ||
35 | if (!map->reg_defaults_raw) { | |
36 | dev_warn(map->dev, "No cache defaults, reading back from HW\n"); | |
37 | tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL); | |
38 | if (!tmp_buf) | |
39 | return -EINVAL; | |
40 | ret = regmap_bulk_read(map, 0, tmp_buf, | |
41 | map->num_reg_defaults_raw); | |
42 | if (ret < 0) { | |
43 | kfree(tmp_buf); | |
44 | return ret; | |
45 | } | |
46 | map->reg_defaults_raw = tmp_buf; | |
47 | map->cache_free = 1; | |
48 | } | |
49 | ||
50 | /* calculate the size of reg_defaults */ | |
51 | for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) { | |
52 | val = regcache_get_val(map->reg_defaults_raw, | |
53 | i, map->cache_word_size); | |
54 | if (!val) | |
55 | continue; | |
56 | count++; | |
57 | } | |
58 | ||
59 | map->reg_defaults = kmalloc(count * sizeof(struct reg_default), | |
60 | GFP_KERNEL); | |
61 | if (!map->reg_defaults) | |
62 | return -ENOMEM; | |
63 | ||
64 | /* fill the reg_defaults */ | |
65 | map->num_reg_defaults = count; | |
66 | for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) { | |
67 | val = regcache_get_val(map->reg_defaults_raw, | |
68 | i, map->cache_word_size); | |
69 | if (!val) | |
70 | continue; | |
71 | map->reg_defaults[j].reg = i; | |
72 | map->reg_defaults[j].def = val; | |
73 | j++; | |
74 | } | |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
79 | int regcache_init(struct regmap *map) | |
80 | { | |
81 | int ret; | |
82 | int i; | |
83 | void *tmp_buf; | |
84 | ||
85 | if (map->cache_type == REGCACHE_NONE) | |
86 | return 0; | |
87 | ||
88 | for (i = 0; i < ARRAY_SIZE(cache_types); i++) | |
89 | if (cache_types[i]->type == map->cache_type) | |
90 | break; | |
91 | ||
92 | if (i == ARRAY_SIZE(cache_types)) { | |
93 | dev_err(map->dev, "Could not match compress type: %d\n", | |
94 | map->cache_type); | |
95 | return -EINVAL; | |
96 | } | |
97 | ||
98 | map->cache = NULL; | |
99 | map->cache_ops = cache_types[i]; | |
100 | ||
101 | if (!map->cache_ops->read || | |
102 | !map->cache_ops->write || | |
103 | !map->cache_ops->name) | |
104 | return -EINVAL; | |
105 | ||
106 | /* We still need to ensure that the reg_defaults | |
107 | * won't vanish from under us. We'll need to make | |
108 | * a copy of it. | |
109 | */ | |
110 | if (map->reg_defaults) { | |
111 | if (!map->num_reg_defaults) | |
112 | return -EINVAL; | |
113 | tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults * | |
114 | sizeof(struct reg_default), GFP_KERNEL); | |
115 | if (!tmp_buf) | |
116 | return -ENOMEM; | |
117 | map->reg_defaults = tmp_buf; | |
118 | } else { | |
119 | /* Some devices such as PMIC's don't have cache defaults, | |
120 | * we cope with this by reading back the HW registers and | |
121 | * crafting the cache defaults by hand. | |
122 | */ | |
123 | ret = regcache_hw_init(map); | |
124 | if (ret < 0) | |
125 | return ret; | |
126 | } | |
127 | ||
128 | if (!map->max_register) | |
129 | map->max_register = map->num_reg_defaults_raw; | |
130 | ||
131 | if (map->cache_ops->init) { | |
132 | dev_dbg(map->dev, "Initializing %s cache\n", | |
133 | map->cache_ops->name); | |
134 | return map->cache_ops->init(map); | |
135 | } | |
136 | return 0; | |
137 | } | |
138 | ||
139 | void regcache_exit(struct regmap *map) | |
140 | { | |
141 | if (map->cache_type == REGCACHE_NONE) | |
142 | return; | |
143 | ||
144 | BUG_ON(!map->cache_ops); | |
145 | ||
146 | kfree(map->reg_defaults); | |
147 | if (map->cache_free) | |
148 | kfree(map->reg_defaults_raw); | |
149 | ||
150 | if (map->cache_ops->exit) { | |
151 | dev_dbg(map->dev, "Destroying %s cache\n", | |
152 | map->cache_ops->name); | |
153 | map->cache_ops->exit(map); | |
154 | } | |
155 | } | |
156 | ||
157 | /** | |
158 | * regcache_read: Fetch the value of a given register from the cache. | |
159 | * | |
160 | * @map: map to configure. | |
161 | * @reg: The register index. | |
162 | * @value: The value to be returned. | |
163 | * | |
164 | * Return a negative value on failure, 0 on success. | |
165 | */ | |
166 | int regcache_read(struct regmap *map, | |
167 | unsigned int reg, unsigned int *value) | |
168 | { | |
169 | if (map->cache_type == REGCACHE_NONE) | |
170 | return -ENOSYS; | |
171 | ||
172 | BUG_ON(!map->cache_ops); | |
173 | ||
174 | if (!regmap_readable(map, reg)) | |
175 | return -EIO; | |
176 | ||
177 | if (!regmap_volatile(map, reg)) | |
178 | return map->cache_ops->read(map, reg, value); | |
179 | ||
180 | return -EINVAL; | |
181 | } | |
182 | EXPORT_SYMBOL_GPL(regcache_read); | |
183 | ||
184 | /** | |
185 | * regcache_write: Set the value of a given register in the cache. | |
186 | * | |
187 | * @map: map to configure. | |
188 | * @reg: The register index. | |
189 | * @value: The new register value. | |
190 | * | |
191 | * Return a negative value on failure, 0 on success. | |
192 | */ | |
193 | int regcache_write(struct regmap *map, | |
194 | unsigned int reg, unsigned int value) | |
195 | { | |
196 | if (map->cache_type == REGCACHE_NONE) | |
197 | return 0; | |
198 | ||
199 | BUG_ON(!map->cache_ops); | |
200 | ||
201 | if (!regmap_writeable(map, reg)) | |
202 | return -EIO; | |
203 | ||
204 | if (!regmap_volatile(map, reg)) | |
205 | return map->cache_ops->write(map, reg, value); | |
206 | ||
207 | return 0; | |
208 | } | |
209 | EXPORT_SYMBOL_GPL(regcache_write); | |
210 | ||
211 | /** | |
212 | * regcache_sync: Sync the register cache with the hardware. | |
213 | * | |
214 | * @map: map to configure. | |
215 | * | |
216 | * Any registers that should not be synced should be marked as | |
217 | * volatile. In general drivers can choose not to use the provided | |
218 | * syncing functionality if they so require. | |
219 | * | |
220 | * Return a negative value on failure, 0 on success. | |
221 | */ | |
222 | int regcache_sync(struct regmap *map) | |
223 | { | |
59360089 DP |
224 | int ret; |
225 | const char *name; | |
226 | ||
9fabe24e DP |
227 | BUG_ON(!map->cache_ops); |
228 | ||
229 | if (map->cache_ops->sync) { | |
230 | dev_dbg(map->dev, "Syncing %s cache\n", | |
231 | map->cache_ops->name); | |
59360089 DP |
232 | name = map->cache_ops->name; |
233 | trace_regcache_sync(map->dev, name, "start"); | |
234 | ret = map->cache_ops->sync(map); | |
235 | trace_regcache_sync(map->dev, name, "stop"); | |
9fabe24e DP |
236 | } |
237 | return 0; | |
238 | } | |
239 | EXPORT_SYMBOL_GPL(regcache_sync); | |
240 | ||
241 | bool regcache_set_val(void *base, unsigned int idx, | |
242 | unsigned int val, unsigned int word_size) | |
243 | { | |
244 | switch (word_size) { | |
245 | case 1: { | |
246 | u8 *cache = base; | |
247 | if (cache[idx] == val) | |
248 | return true; | |
249 | cache[idx] = val; | |
250 | break; | |
251 | } | |
252 | case 2: { | |
253 | u16 *cache = base; | |
254 | if (cache[idx] == val) | |
255 | return true; | |
256 | cache[idx] = val; | |
257 | break; | |
258 | } | |
259 | default: | |
260 | BUG(); | |
261 | } | |
262 | /* unreachable */ | |
263 | return false; | |
264 | } | |
265 | ||
266 | unsigned int regcache_get_val(const void *base, unsigned int idx, | |
267 | unsigned int word_size) | |
268 | { | |
269 | if (!base) | |
270 | return -EINVAL; | |
271 | ||
272 | switch (word_size) { | |
273 | case 1: { | |
274 | const u8 *cache = base; | |
275 | return cache[idx]; | |
276 | } | |
277 | case 2: { | |
278 | const u16 *cache = base; | |
279 | return cache[idx]; | |
280 | } | |
281 | default: | |
282 | BUG(); | |
283 | } | |
284 | /* unreachable */ | |
285 | return -1; | |
286 | } | |
287 | ||
288 | int regcache_lookup_reg(struct regmap *map, unsigned int reg) | |
289 | { | |
290 | unsigned int i; | |
291 | ||
292 | for (i = 0; i < map->num_reg_defaults; i++) | |
293 | if (map->reg_defaults[i].reg == reg) | |
294 | return i; | |
295 | return -1; | |
296 | } | |
297 | ||
298 | int regcache_insert_reg(struct regmap *map, unsigned int reg, | |
299 | unsigned int val) | |
300 | { | |
301 | void *tmp; | |
302 | ||
303 | tmp = krealloc(map->reg_defaults, | |
304 | (map->num_reg_defaults + 1) * sizeof(struct reg_default), | |
305 | GFP_KERNEL); | |
306 | if (!tmp) | |
307 | return -ENOMEM; | |
308 | map->reg_defaults = tmp; | |
309 | map->num_reg_defaults++; | |
310 | map->reg_defaults[map->num_reg_defaults - 1].reg = reg; | |
311 | map->reg_defaults[map->num_reg_defaults - 1].def = val; | |
312 | return 0; | |
313 | } |