[deliverable/linux.git] / drivers / base / regmap / regcache.c

/*
 * Register cache access API
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *
 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/slab.h>
#include <linux/export.h>
#include <trace/events/regmap.h>
#include <linux/bsearch.h>
#include <linux/sort.h>

#include "internal.h"

static const struct regcache_ops *cache_types[] = {
	&regcache_indexed_ops,
	&regcache_rbtree_ops,
	&regcache_lzo_ops,
};

static int regcache_hw_init(struct regmap *map)
{
	int i, j;
	int ret;
	int count;
	unsigned int val;
	void *tmp_buf;

	if (!map->num_reg_defaults_raw)
		return -EINVAL;

	if (!map->reg_defaults_raw) {
		dev_warn(map->dev, "No cache defaults, reading back from HW\n");
		tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
		if (!tmp_buf)
			return -EINVAL;
		ret = regmap_bulk_read(map, 0, tmp_buf,
				       map->num_reg_defaults_raw);
		if (ret < 0) {
			kfree(tmp_buf);
			return ret;
		}
		map->reg_defaults_raw = tmp_buf;
		map->cache_free = 1;
	}

	/* calculate the size of reg_defaults */
	for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
		val = regcache_get_val(map->reg_defaults_raw,
				       i, map->cache_word_size);
		if (!val)
			continue;
		count++;
	}

	map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
				      GFP_KERNEL);
	if (!map->reg_defaults) {
		ret = -ENOMEM;
		goto err_free;
	}

	/* fill the reg_defaults */
	map->num_reg_defaults = count;
	for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
		val = regcache_get_val(map->reg_defaults_raw,
				       i, map->cache_word_size);
		if (!val)
			continue;
		map->reg_defaults[j].reg = i;
		map->reg_defaults[j].def = val;
		j++;
	}

	return 0;

err_free:
	if (map->cache_free)
		kfree(map->reg_defaults_raw);

	return ret;
}

int regcache_init(struct regmap *map)
{
	int ret;
	int i;
	void *tmp_buf;

	if (map->cache_type == REGCACHE_NONE) {
		map->cache_bypass = true;
		return 0;
	}

	for (i = 0; i < ARRAY_SIZE(cache_types); i++)
		if (cache_types[i]->type == map->cache_type)
			break;

	if (i == ARRAY_SIZE(cache_types)) {
		dev_err(map->dev, "Could not match compress type: %d\n",
			map->cache_type);
		return -EINVAL;
	}

	map->cache = NULL;
	map->cache_ops = cache_types[i];

	if (!map->cache_ops->read ||
	    !map->cache_ops->write ||
	    !map->cache_ops->name)
		return -EINVAL;

	/* We still need to ensure that the reg_defaults
	 * won't vanish from under us.  We'll need to make
	 * a copy of it.
	 */
	if (map->reg_defaults) {
		if (!map->num_reg_defaults)
			return -EINVAL;
		tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults *
				  sizeof(struct reg_default), GFP_KERNEL);
		if (!tmp_buf)
			return -ENOMEM;
		map->reg_defaults = tmp_buf;
	} else if (map->num_reg_defaults_raw) {
		/* Some devices such as PMICs don't have cache defaults,
		 * we cope with this by reading back the HW registers and
		 * crafting the cache defaults by hand.
		 */
		ret = regcache_hw_init(map);
		if (ret < 0)
			return ret;
	}

	if (!map->max_register)
		map->max_register = map->num_reg_defaults_raw;

	if (map->cache_ops->init) {
		dev_dbg(map->dev, "Initializing %s cache\n",
			map->cache_ops->name);
		ret = map->cache_ops->init(map);
		if (ret)
			goto err_free;
	}
	return 0;

err_free:
	kfree(map->reg_defaults);
	if (map->cache_free)
		kfree(map->reg_defaults_raw);

	return ret;
}

void regcache_exit(struct regmap *map)
{
	if (map->cache_type == REGCACHE_NONE)
		return;

	BUG_ON(!map->cache_ops);

	kfree(map->reg_defaults);
	if (map->cache_free)
		kfree(map->reg_defaults_raw);

	if (map->cache_ops->exit) {
		dev_dbg(map->dev, "Destroying %s cache\n",
			map->cache_ops->name);
		map->cache_ops->exit(map);
	}
}

/**
 * regcache_read: Fetch the value of a given register from the cache.
 *
 * @map: map to configure.
 * @reg: The register index.
 * @value: The value to be returned.
 *
 * Return a negative value on failure, 0 on success.
 */
int regcache_read(struct regmap *map,
		  unsigned int reg, unsigned int *value)
{
	if (map->cache_type == REGCACHE_NONE)
		return -ENOSYS;

	BUG_ON(!map->cache_ops);

	if (!regmap_readable(map, reg))
		return -EIO;

	if (!regmap_volatile(map, reg))
		return map->cache_ops->read(map, reg, value);

	return -EINVAL;
}
EXPORT_SYMBOL_GPL(regcache_read);

/**
 * regcache_write: Set the value of a given register in the cache.
 *
 * @map: map to configure.
 * @reg: The register index.
 * @value: The new register value.
 *
 * Return a negative value on failure, 0 on success.
 */
int regcache_write(struct regmap *map,
		   unsigned int reg, unsigned int value)
{
	if (map->cache_type == REGCACHE_NONE)
		return 0;

	BUG_ON(!map->cache_ops);

	if (!regmap_writeable(map, reg))
		return -EIO;

	if (!regmap_volatile(map, reg))
		return map->cache_ops->write(map, reg, value);

	return 0;
}
EXPORT_SYMBOL_GPL(regcache_write);

/**
 * regcache_sync: Sync the register cache with the hardware.
 *
 * @map: map to configure.
 *
 * Any registers that should not be synced should be marked as
 * volatile.  In general drivers can choose not to use the provided
 * syncing functionality if they so require.
 *
 * Return a negative value on failure, 0 on success.
 */
int regcache_sync(struct regmap *map)
{
	int ret = 0;
	unsigned int val;
	unsigned int i;
	const char *name;
	unsigned int bypass;

	BUG_ON(!map->cache_ops);

	mutex_lock(&map->lock);
	/* Remember the initial bypass state */
	bypass = map->cache_bypass;
	dev_dbg(map->dev, "Syncing %s cache\n",
		map->cache_ops->name);
	name = map->cache_ops->name;
	trace_regcache_sync(map->dev, name, "start");
	if (!map->cache_dirty)
		goto out;
	if (map->cache_ops->sync) {
		ret = map->cache_ops->sync(map);
	} else {
		for (i = 0; i < map->num_reg_defaults; i++) {
			ret = regcache_read(map, i, &val);
			if (ret < 0)
				goto out;
			map->cache_bypass = 1;
			ret = _regmap_write(map, i, val);
			map->cache_bypass = 0;
			if (ret < 0)
				goto out;
			dev_dbg(map->dev, "Synced register %#x, value %#x\n",
				map->reg_defaults[i].reg,
				map->reg_defaults[i].def);
		}

	}
out:
	trace_regcache_sync(map->dev, name, "stop");
	/* Restore the bypass state */
	map->cache_bypass = bypass;
	mutex_unlock(&map->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(regcache_sync);

/**
 * regcache_cache_only: Put a register map into cache only mode
 *
 * @map: map to configure
 * @cache_only: flag if changes should be written to the hardware
 *
 * When a register map is marked as cache only writes to the register
 * map API will only update the register cache, they will not cause
 * any hardware changes.  This is useful for allowing portions of
 * drivers to act as though the device were functioning as normal when
 * it is disabled for power saving reasons.
 */
void regcache_cache_only(struct regmap *map, bool enable)
{
	mutex_lock(&map->lock);
	WARN_ON(map->cache_bypass && enable);
	map->cache_only = enable;
	mutex_unlock(&map->lock);
}
EXPORT_SYMBOL_GPL(regcache_cache_only);

/**
 * regcache_mark_dirty: Mark the register cache as dirty
 *
 * @map: map to mark
 *
 * Mark the register cache as dirty, for example due to the device
 * having been powered down for suspend.  If the cache is not marked
 * as dirty then the cache sync will be suppressed.
 */
void regcache_mark_dirty(struct regmap *map)
{
	mutex_lock(&map->lock);
	map->cache_dirty = true;
	mutex_unlock(&map->lock);
}
EXPORT_SYMBOL_GPL(regcache_mark_dirty);

/**
 * regcache_cache_bypass: Put a register map into cache bypass mode
 *
 * @map: map to configure
 * @cache_bypass: flag if changes should not be written to the hardware
 *
 * When a register map is marked with the cache bypass option, writes
 * to the register map API will only update the hardware and not the
 * the cache directly.  This is useful when syncing the cache back to
 * the hardware.
 */
void regcache_cache_bypass(struct regmap *map, bool enable)
{
	mutex_lock(&map->lock);
	WARN_ON(map->cache_only && enable);
	map->cache_bypass = enable;
	mutex_unlock(&map->lock);
}
EXPORT_SYMBOL_GPL(regcache_cache_bypass);

bool regcache_set_val(void *base, unsigned int idx,
		      unsigned int val, unsigned int word_size)
{
	switch (word_size) {
	case 1: {
		u8 *cache = base;
		if (cache[idx] == val)
			return true;
		cache[idx] = val;
		break;
	}
	case 2: {
		u16 *cache = base;
		if (cache[idx] == val)
			return true;
		cache[idx] = val;
		break;
	}
	default:
		BUG();
	}
	/* unreachable */
	return false;
}

unsigned int regcache_get_val(const void *base, unsigned int idx,
			      unsigned int word_size)
{
	if (!base)
		return -EINVAL;

	switch (word_size) {
	case 1: {
		const u8 *cache = base;
		return cache[idx];
	}
	case 2: {
		const u16 *cache = base;
		return cache[idx];
	}
	default:
		BUG();
	}
	/* unreachable */
	return -1;
}

static int regcache_default_cmp(const void *a, const void *b)
{
	const struct reg_default *_a = a;
	const struct reg_default *_b = b;

	return _a->reg - _b->reg;
}

int regcache_lookup_reg(struct regmap *map, unsigned int reg)
{
	struct reg_default key;
	struct reg_default *r;

	key.reg = reg;
	key.def = 0;

	r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
		    sizeof(struct reg_default), regcache_default_cmp);

	if (r)
		return r - map->reg_defaults;
	else
		return -ENOENT;
}

int regcache_insert_reg(struct regmap *map, unsigned int reg,
			unsigned int val)
{
	void *tmp;

	tmp = krealloc(map->reg_defaults,
		       (map->num_reg_defaults + 1) * sizeof(struct reg_default),
		       GFP_KERNEL);
	if (!tmp)
		return -ENOMEM;
	map->reg_defaults = tmp;
	map->num_reg_defaults++;
	map->reg_defaults[map->num_reg_defaults - 1].reg = reg;
	map->reg_defaults[map->num_reg_defaults - 1].def = val;
	sort(map->reg_defaults, map->num_reg_defaults,
	     sizeof(struct reg_default), regcache_default_cmp, NULL);
	return 0;
}
Commit	Line	Data
9fabe24e DP	1	/*
	2	* Register cache access API
	3	*
	4	* Copyright 2011 Wolfson Microelectronics plc
	5	*
	6	* Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/slab.h>
1b6bc32f	14	#include <linux/export.h>
9fabe24e	15	#include <trace/events/regmap.h>
f094fea6	16	#include <linux/bsearch.h>
c08604b8	17	#include <linux/sort.h>
9fabe24e DP	18
	19	#include "internal.h"
	20
	21	static const struct regcache_ops *cache_types[] = {
195af65c	22	&regcache_indexed_ops,
28644c80	23	&regcache_rbtree_ops,
2cbbb579	24	&regcache_lzo_ops,
9fabe24e DP	25	};
	26
	27	static int regcache_hw_init(struct regmap *map)
	28	{
	29	int i, j;
	30	int ret;
	31	int count;
	32	unsigned int val;
	33	void *tmp_buf;
	34
	35	if (!map->num_reg_defaults_raw)
	36	return -EINVAL;
	37
	38	if (!map->reg_defaults_raw) {
	39	dev_warn(map->dev, "No cache defaults, reading back from HW\n");
	40	tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
	41	if (!tmp_buf)
	42	return -EINVAL;
	43	ret = regmap_bulk_read(map, 0, tmp_buf,
	44	map->num_reg_defaults_raw);
	45	if (ret < 0) {
	46	kfree(tmp_buf);
	47	return ret;
	48	}
	49	map->reg_defaults_raw = tmp_buf;
	50	map->cache_free = 1;
	51	}
	52
	53	/* calculate the size of reg_defaults */
	54	for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
	55	val = regcache_get_val(map->reg_defaults_raw,
	56	i, map->cache_word_size);
	57	if (!val)
	58	continue;
	59	count++;
	60	}
	61
	62	map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
	63	GFP_KERNEL);
021cd616 LPC	64	if (!map->reg_defaults) {
	65	ret = -ENOMEM;
	66	goto err_free;
	67	}
9fabe24e DP	68
	69	/* fill the reg_defaults */
	70	map->num_reg_defaults = count;
	71	for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
	72	val = regcache_get_val(map->reg_defaults_raw,
	73	i, map->cache_word_size);
	74	if (!val)
	75	continue;
	76	map->reg_defaults[j].reg = i;
	77	map->reg_defaults[j].def = val;
	78	j++;
	79	}
	80
	81	return 0;
021cd616 LPC	82
	83	err_free:
	84	if (map->cache_free)
	85	kfree(map->reg_defaults_raw);
	86
	87	return ret;
9fabe24e DP	88	}
	89
	90	int regcache_init(struct regmap *map)
	91	{
	92	int ret;
	93	int i;
	94	void *tmp_buf;
	95
e7a6db30 MB	96	if (map->cache_type == REGCACHE_NONE) {
e7a6db30 MB	97	map->cache_bypass = true;
9fabe24e	98	return 0;
e7a6db30	99	}
9fabe24e DP	100
	101	for (i = 0; i < ARRAY_SIZE(cache_types); i++)
	102	if (cache_types[i]->type == map->cache_type)
	103	break;
	104
	105	if (i == ARRAY_SIZE(cache_types)) {
	106	dev_err(map->dev, "Could not match compress type: %d\n",
	107	map->cache_type);
	108	return -EINVAL;
	109	}
	110
	111	map->cache = NULL;
	112	map->cache_ops = cache_types[i];
	113
	114	if (!map->cache_ops->read \|\|
	115	!map->cache_ops->write \|\|
	116	!map->cache_ops->name)
	117	return -EINVAL;
	118
	119	/* We still need to ensure that the reg_defaults
	120	* won't vanish from under us. We'll need to make
	121	* a copy of it.
	122	*/
	123	if (map->reg_defaults) {
	124	if (!map->num_reg_defaults)
	125	return -EINVAL;
	126	tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults *
	127	sizeof(struct reg_default), GFP_KERNEL);
	128	if (!tmp_buf)
	129	return -ENOMEM;
	130	map->reg_defaults = tmp_buf;
8528bdd4	131	} else if (map->num_reg_defaults_raw) {
5fcd2560	132	/* Some devices such as PMICs don't have cache defaults,
9fabe24e DP	133	* we cope with this by reading back the HW registers and
	134	* crafting the cache defaults by hand.
	135	*/
	136	ret = regcache_hw_init(map);
	137	if (ret < 0)
	138	return ret;
	139	}
	140
	141	if (!map->max_register)
	142	map->max_register = map->num_reg_defaults_raw;
	143
	144	if (map->cache_ops->init) {
	145	dev_dbg(map->dev, "Initializing %s cache\n",
	146	map->cache_ops->name);
bd061c78 LPC	147	ret = map->cache_ops->init(map);
	148	if (ret)
	149	goto err_free;
9fabe24e DP	150	}
9fabe24e DP	151	return 0;
bd061c78 LPC	152
	153	err_free:
	154	kfree(map->reg_defaults);
	155	if (map->cache_free)
	156	kfree(map->reg_defaults_raw);
	157
	158	return ret;
9fabe24e DP	159	}
	160
	161	void regcache_exit(struct regmap *map)
	162	{
	163	if (map->cache_type == REGCACHE_NONE)
	164	return;
	165
	166	BUG_ON(!map->cache_ops);
	167
	168	kfree(map->reg_defaults);
	169	if (map->cache_free)
	170	kfree(map->reg_defaults_raw);
	171
	172	if (map->cache_ops->exit) {
	173	dev_dbg(map->dev, "Destroying %s cache\n",
	174	map->cache_ops->name);
	175	map->cache_ops->exit(map);
	176	}
	177	}
	178
	179	/**
	180	* regcache_read: Fetch the value of a given register from the cache.
	181	*
	182	* @map: map to configure.
	183	* @reg: The register index.
	184	* @value: The value to be returned.
	185	*
	186	* Return a negative value on failure, 0 on success.
	187	*/
	188	int regcache_read(struct regmap *map,
	189	unsigned int reg, unsigned int *value)
	190	{
	191	if (map->cache_type == REGCACHE_NONE)
	192	return -ENOSYS;
	193
	194	BUG_ON(!map->cache_ops);
	195
	196	if (!regmap_readable(map, reg))
	197	return -EIO;
	198
	199	if (!regmap_volatile(map, reg))
	200	return map->cache_ops->read(map, reg, value);
	201
	202	return -EINVAL;
	203	}
	204	EXPORT_SYMBOL_GPL(regcache_read);
	205
	206	/**
	207	* regcache_write: Set the value of a given register in the cache.
	208	*
	209	* @map: map to configure.
	210	* @reg: The register index.
	211	* @value: The new register value.
	212	*
	213	* Return a negative value on failure, 0 on success.
	214	*/
	215	int regcache_write(struct regmap *map,
	216	unsigned int reg, unsigned int value)
	217	{
	218	if (map->cache_type == REGCACHE_NONE)
	219	return 0;
	220
	221	BUG_ON(!map->cache_ops);
	222
223	if (!regmap_writeable(map, reg))
224	return -EIO;
225
226	if (!regmap_volatile(map, reg))
227	return map->cache_ops->write(map, reg, value);
228
229	return 0;
230	}
231	EXPORT_SYMBOL_GPL(regcache_write);
232
233	/**
234	* regcache_sync: Sync the register cache with the hardware.
235	*
236	* @map: map to configure.
237	*
238	* Any registers that should not be synced should be marked as
239	* volatile. In general drivers can choose not to use the provided
240	* syncing functionality if they so require.
241	*
242	* Return a negative value on failure, 0 on success.
243	*/
244	int regcache_sync(struct regmap *map)
245	{
954757d7 DP	246	int ret = 0;
	247	unsigned int val;
	248	unsigned int i;
59360089	249	const char *name;
beb1a10f	250	unsigned int bypass;
59360089	251
9fabe24e DP	252	BUG_ON(!map->cache_ops);
9fabe24e DP	253
13753a90	254	mutex_lock(&map->lock);
beb1a10f DP	255	/* Remember the initial bypass state */
beb1a10f DP	256	bypass = map->cache_bypass;
954757d7 DP	257	dev_dbg(map->dev, "Syncing %s cache\n",
	258	map->cache_ops->name);
	259	name = map->cache_ops->name;
	260	trace_regcache_sync(map->dev, name, "start");
8ae0d7e8 MB	261	if (!map->cache_dirty)
8ae0d7e8 MB	262	goto out;
9fabe24e	263	if (map->cache_ops->sync) {
59360089	264	ret = map->cache_ops->sync(map);
954757d7 DP	265	} else {
	266	for (i = 0; i < map->num_reg_defaults; i++) {
	267	ret = regcache_read(map, i, &val);
	268	if (ret < 0)
	269	goto out;
ec8a365f	270	map->cache_bypass = 1;
13753a90	271	ret = _regmap_write(map, i, val);
ec8a365f	272	map->cache_bypass = 0;
954757d7 DP	273	if (ret < 0)
	274	goto out;
	275	dev_dbg(map->dev, "Synced register %#x, value %#x\n",
	276	map->reg_defaults[i].reg,
	277	map->reg_defaults[i].def);
	278	}
	279
9fabe24e	280	}
954757d7 DP	281	out:
954757d7 DP	282	trace_regcache_sync(map->dev, name, "stop");
beb1a10f DP	283	/* Restore the bypass state */
beb1a10f DP	284	map->cache_bypass = bypass;
13753a90	285	mutex_unlock(&map->lock);
954757d7 DP	286
954757d7 DP	287	return ret;
9fabe24e DP	288	}
	289	EXPORT_SYMBOL_GPL(regcache_sync);
	290
92afb286 MB	291	/**
	292	* regcache_cache_only: Put a register map into cache only mode
	293	*
	294	* @map: map to configure
	295	* @cache_only: flag if changes should be written to the hardware
	296	*
	297	* When a register map is marked as cache only writes to the register
	298	* map API will only update the register cache, they will not cause
	299	* any hardware changes. This is useful for allowing portions of
	300	* drivers to act as though the device were functioning as normal when
	301	* it is disabled for power saving reasons.
	302	*/
	303	void regcache_cache_only(struct regmap *map, bool enable)
	304	{
2cd148f1	305	mutex_lock(&map->lock);
ac77a765	306	WARN_ON(map->cache_bypass && enable);
92afb286	307	map->cache_only = enable;
2cd148f1	308	mutex_unlock(&map->lock);
92afb286 MB	309	}
	310	EXPORT_SYMBOL_GPL(regcache_cache_only);
	311
8ae0d7e8 MB	312	/**
	313	* regcache_mark_dirty: Mark the register cache as dirty
	314	*
	315	* @map: map to mark
	316	*
	317	* Mark the register cache as dirty, for example due to the device
	318	* having been powered down for suspend. If the cache is not marked
	319	* as dirty then the cache sync will be suppressed.
	320	*/
	321	void regcache_mark_dirty(struct regmap *map)
	322	{
	323	mutex_lock(&map->lock);
	324	map->cache_dirty = true;
	325	mutex_unlock(&map->lock);
	326	}
	327	EXPORT_SYMBOL_GPL(regcache_mark_dirty);
	328
6eb0f5e0 DP	329	/**
	330	* regcache_cache_bypass: Put a register map into cache bypass mode
	331	*
	332	* @map: map to configure
0eef6b04	333	* @cache_bypass: flag if changes should not be written to the hardware
6eb0f5e0 DP	334	*
	335	* When a register map is marked with the cache bypass option, writes
	336	* to the register map API will only update the hardware and not the
	337	* the cache directly. This is useful when syncing the cache back to
	338	* the hardware.
	339	*/
	340	void regcache_cache_bypass(struct regmap *map, bool enable)
	341	{
	342	mutex_lock(&map->lock);
ac77a765	343	WARN_ON(map->cache_only && enable);
6eb0f5e0 DP	344	map->cache_bypass = enable;
	345	mutex_unlock(&map->lock);
	346	}
	347	EXPORT_SYMBOL_GPL(regcache_cache_bypass);
	348
9fabe24e DP	349	bool regcache_set_val(void *base, unsigned int idx,
	350	unsigned int val, unsigned int word_size)
	351	{
	352	switch (word_size) {
	353	case 1: {
	354	u8 *cache = base;
	355	if (cache[idx] == val)
	356	return true;
	357	cache[idx] = val;
	358	break;
	359	}
	360	case 2: {
	361	u16 *cache = base;
	362	if (cache[idx] == val)
	363	return true;
	364	cache[idx] = val;
	365	break;
	366	}
	367	default:
	368	BUG();
	369	}
	370	/* unreachable */
	371	return false;
	372	}
	373
	374	unsigned int regcache_get_val(const void *base, unsigned int idx,
	375	unsigned int word_size)
	376	{
	377	if (!base)
	378	return -EINVAL;
	379
	380	switch (word_size) {
	381	case 1: {
	382	const u8 *cache = base;
	383	return cache[idx];
	384	}
	385	case 2: {
	386	const u16 *cache = base;
	387	return cache[idx];
	388	}
	389	default:
	390	BUG();
	391	}
	392	/* unreachable */
	393	return -1;
	394	}
	395
f094fea6	396	static int regcache_default_cmp(const void a, const void b)
c08604b8 DP	397	{
	398	const struct reg_default *_a = a;
	399	const struct reg_default *_b = b;
	400
	401	return _a->reg - _b->reg;
	402	}
	403
f094fea6 MB	404	int regcache_lookup_reg(struct regmap *map, unsigned int reg)
	405	{
	406	struct reg_default key;
	407	struct reg_default *r;
	408
	409	key.reg = reg;
	410	key.def = 0;
	411
	412	r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
	413	sizeof(struct reg_default), regcache_default_cmp);
	414
	415	if (r)
	416	return r - map->reg_defaults;
	417	else
6e6ace00	418	return -ENOENT;
f094fea6 MB	419	}
f094fea6 MB	420
9fabe24e DP	421	int regcache_insert_reg(struct regmap *map, unsigned int reg,
	422	unsigned int val)
	423	{
	424	void *tmp;
	425
	426	tmp = krealloc(map->reg_defaults,
	427	(map->num_reg_defaults + 1) * sizeof(struct reg_default),
	428	GFP_KERNEL);
	429	if (!tmp)
	430	return -ENOMEM;
	431	map->reg_defaults = tmp;
	432	map->num_reg_defaults++;
	433	map->reg_defaults[map->num_reg_defaults - 1].reg = reg;
	434	map->reg_defaults[map->num_reg_defaults - 1].def = val;
c08604b8	435	sort(map->reg_defaults, map->num_reg_defaults,
f094fea6	436	sizeof(struct reg_default), regcache_default_cmp, NULL);
9fabe24e DP	437	return 0;
9fabe24e DP	438	}