Merge remote-tracking branch 'regmap/topic/spmi' into regmap-next
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
30b2a553 19#include <linux/sched.h>
b83a313b 20
fb2736bb
MB
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
93de9124 24#include "internal.h"
b83a313b 25
1044c180
MB
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
ad278406
AS
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
07c320dc
AS
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
ad278406 44
76aad392
DC
45bool regmap_reg_in_ranges(unsigned int reg,
46 const struct regmap_range *ranges,
47 unsigned int nranges)
48{
49 const struct regmap_range *r;
50 int i;
51
52 for (i = 0, r = ranges; i < nranges; i++, r++)
53 if (regmap_reg_in_range(reg, r))
54 return true;
55 return false;
56}
57EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
58
154881e5
MB
59bool regmap_check_range_table(struct regmap *map, unsigned int reg,
60 const struct regmap_access_table *table)
76aad392
DC
61{
62 /* Check "no ranges" first */
63 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
64 return false;
65
66 /* In case zero "yes ranges" are supplied, any reg is OK */
67 if (!table->n_yes_ranges)
68 return true;
69
70 return regmap_reg_in_ranges(reg, table->yes_ranges,
71 table->n_yes_ranges);
72}
154881e5 73EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 74
8de2f081
MB
75bool regmap_writeable(struct regmap *map, unsigned int reg)
76{
77 if (map->max_register && reg > map->max_register)
78 return false;
79
80 if (map->writeable_reg)
81 return map->writeable_reg(map->dev, reg);
82
76aad392 83 if (map->wr_table)
154881e5 84 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 85
8de2f081
MB
86 return true;
87}
88
89bool regmap_readable(struct regmap *map, unsigned int reg)
90{
91 if (map->max_register && reg > map->max_register)
92 return false;
93
4191f197
WS
94 if (map->format.format_write)
95 return false;
96
8de2f081
MB
97 if (map->readable_reg)
98 return map->readable_reg(map->dev, reg);
99
76aad392 100 if (map->rd_table)
154881e5 101 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 102
8de2f081
MB
103 return true;
104}
105
106bool regmap_volatile(struct regmap *map, unsigned int reg)
107{
4191f197 108 if (!regmap_readable(map, reg))
8de2f081
MB
109 return false;
110
111 if (map->volatile_reg)
112 return map->volatile_reg(map->dev, reg);
113
76aad392 114 if (map->volatile_table)
154881e5 115 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 116
b92be6fe
MB
117 if (map->cache_ops)
118 return false;
119 else
120 return true;
8de2f081
MB
121}
122
123bool regmap_precious(struct regmap *map, unsigned int reg)
124{
4191f197 125 if (!regmap_readable(map, reg))
8de2f081
MB
126 return false;
127
128 if (map->precious_reg)
129 return map->precious_reg(map->dev, reg);
130
76aad392 131 if (map->precious_table)
154881e5 132 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 133
8de2f081
MB
134 return false;
135}
136
82cd9965 137static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 138 size_t num)
82cd9965
LPC
139{
140 unsigned int i;
141
142 for (i = 0; i < num; i++)
143 if (!regmap_volatile(map, reg + i))
144 return false;
145
146 return true;
147}
148
9aa50750
WS
149static void regmap_format_2_6_write(struct regmap *map,
150 unsigned int reg, unsigned int val)
151{
152 u8 *out = map->work_buf;
153
154 *out = (reg << 6) | val;
155}
156
b83a313b
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157static void regmap_format_4_12_write(struct regmap *map,
158 unsigned int reg, unsigned int val)
159{
160 __be16 *out = map->work_buf;
161 *out = cpu_to_be16((reg << 12) | val);
162}
163
164static void regmap_format_7_9_write(struct regmap *map,
165 unsigned int reg, unsigned int val)
166{
167 __be16 *out = map->work_buf;
168 *out = cpu_to_be16((reg << 9) | val);
169}
170
7e5ec63e
LPC
171static void regmap_format_10_14_write(struct regmap *map,
172 unsigned int reg, unsigned int val)
173{
174 u8 *out = map->work_buf;
175
176 out[2] = val;
177 out[1] = (val >> 8) | (reg << 6);
178 out[0] = reg >> 2;
179}
180
d939fb9a 181static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
182{
183 u8 *b = buf;
184
d939fb9a 185 b[0] = val << shift;
b83a313b
MB
186}
187
141eba2e 188static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
189{
190 __be16 *b = buf;
191
d939fb9a 192 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
193}
194
141eba2e
SW
195static void regmap_format_16_native(void *buf, unsigned int val,
196 unsigned int shift)
197{
198 *(u16 *)buf = val << shift;
199}
200
d939fb9a 201static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
202{
203 u8 *b = buf;
204
d939fb9a
MR
205 val <<= shift;
206
ea279fc5
MR
207 b[0] = val >> 16;
208 b[1] = val >> 8;
209 b[2] = val;
210}
211
141eba2e 212static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
213{
214 __be32 *b = buf;
215
d939fb9a 216 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
217}
218
141eba2e
SW
219static void regmap_format_32_native(void *buf, unsigned int val,
220 unsigned int shift)
221{
222 *(u32 *)buf = val << shift;
223}
224
8a819ff8 225static void regmap_parse_inplace_noop(void *buf)
b83a313b 226{
8a819ff8
MB
227}
228
229static unsigned int regmap_parse_8(const void *buf)
230{
231 const u8 *b = buf;
b83a313b
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232
233 return b[0];
234}
235
8a819ff8
MB
236static unsigned int regmap_parse_16_be(const void *buf)
237{
238 const __be16 *b = buf;
239
240 return be16_to_cpu(b[0]);
241}
242
243static void regmap_parse_16_be_inplace(void *buf)
b83a313b
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244{
245 __be16 *b = buf;
246
247 b[0] = be16_to_cpu(b[0]);
b83a313b
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248}
249
8a819ff8 250static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
251{
252 return *(u16 *)buf;
253}
254
8a819ff8 255static unsigned int regmap_parse_24(const void *buf)
ea279fc5 256{
8a819ff8 257 const u8 *b = buf;
ea279fc5
MR
258 unsigned int ret = b[2];
259 ret |= ((unsigned int)b[1]) << 8;
260 ret |= ((unsigned int)b[0]) << 16;
261
262 return ret;
263}
264
8a819ff8
MB
265static unsigned int regmap_parse_32_be(const void *buf)
266{
267 const __be32 *b = buf;
268
269 return be32_to_cpu(b[0]);
270}
271
272static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
273{
274 __be32 *b = buf;
275
276 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
277}
278
8a819ff8 279static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
280{
281 return *(u32 *)buf;
282}
283
0d4529c5 284static void regmap_lock_mutex(void *__map)
bacdbe07 285{
0d4529c5 286 struct regmap *map = __map;
bacdbe07
SW
287 mutex_lock(&map->mutex);
288}
289
0d4529c5 290static void regmap_unlock_mutex(void *__map)
bacdbe07 291{
0d4529c5 292 struct regmap *map = __map;
bacdbe07
SW
293 mutex_unlock(&map->mutex);
294}
295
0d4529c5 296static void regmap_lock_spinlock(void *__map)
b4519c71 297__acquires(&map->spinlock)
bacdbe07 298{
0d4529c5 299 struct regmap *map = __map;
92ab1aab
LPC
300 unsigned long flags;
301
302 spin_lock_irqsave(&map->spinlock, flags);
303 map->spinlock_flags = flags;
bacdbe07
SW
304}
305
0d4529c5 306static void regmap_unlock_spinlock(void *__map)
b4519c71 307__releases(&map->spinlock)
bacdbe07 308{
0d4529c5 309 struct regmap *map = __map;
92ab1aab 310 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
311}
312
72b39f6f
MB
313static void dev_get_regmap_release(struct device *dev, void *res)
314{
315 /*
316 * We don't actually have anything to do here; the goal here
317 * is not to manage the regmap but to provide a simple way to
318 * get the regmap back given a struct device.
319 */
320}
321
6863ca62
KG
322static bool _regmap_range_add(struct regmap *map,
323 struct regmap_range_node *data)
324{
325 struct rb_root *root = &map->range_tree;
326 struct rb_node **new = &(root->rb_node), *parent = NULL;
327
328 while (*new) {
329 struct regmap_range_node *this =
330 container_of(*new, struct regmap_range_node, node);
331
332 parent = *new;
333 if (data->range_max < this->range_min)
334 new = &((*new)->rb_left);
335 else if (data->range_min > this->range_max)
336 new = &((*new)->rb_right);
337 else
338 return false;
339 }
340
341 rb_link_node(&data->node, parent, new);
342 rb_insert_color(&data->node, root);
343
344 return true;
345}
346
347static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
348 unsigned int reg)
349{
350 struct rb_node *node = map->range_tree.rb_node;
351
352 while (node) {
353 struct regmap_range_node *this =
354 container_of(node, struct regmap_range_node, node);
355
356 if (reg < this->range_min)
357 node = node->rb_left;
358 else if (reg > this->range_max)
359 node = node->rb_right;
360 else
361 return this;
362 }
363
364 return NULL;
365}
366
367static void regmap_range_exit(struct regmap *map)
368{
369 struct rb_node *next;
370 struct regmap_range_node *range_node;
371
372 next = rb_first(&map->range_tree);
373 while (next) {
374 range_node = rb_entry(next, struct regmap_range_node, node);
375 next = rb_next(&range_node->node);
376 rb_erase(&range_node->node, &map->range_tree);
377 kfree(range_node);
378 }
379
380 kfree(map->selector_work_buf);
381}
382
b83a313b
MB
383/**
384 * regmap_init(): Initialise register map
385 *
386 * @dev: Device that will be interacted with
387 * @bus: Bus-specific callbacks to use with device
0135bbcc 388 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
389 * @config: Configuration for register map
390 *
391 * The return value will be an ERR_PTR() on error or a valid pointer to
392 * a struct regmap. This function should generally not be called
393 * directly, it should be called by bus-specific init functions.
394 */
395struct regmap *regmap_init(struct device *dev,
396 const struct regmap_bus *bus,
0135bbcc 397 void *bus_context,
b83a313b
MB
398 const struct regmap_config *config)
399{
72b39f6f 400 struct regmap *map, **m;
b83a313b 401 int ret = -EINVAL;
141eba2e 402 enum regmap_endian reg_endian, val_endian;
6863ca62 403 int i, j;
b83a313b 404
d2a5884a 405 if (!config)
abbb18fb 406 goto err;
b83a313b
MB
407
408 map = kzalloc(sizeof(*map), GFP_KERNEL);
409 if (map == NULL) {
410 ret = -ENOMEM;
411 goto err;
412 }
413
0d4529c5
DC
414 if (config->lock && config->unlock) {
415 map->lock = config->lock;
416 map->unlock = config->unlock;
417 map->lock_arg = config->lock_arg;
bacdbe07 418 } else {
d2a5884a
AS
419 if ((bus && bus->fast_io) ||
420 config->fast_io) {
0d4529c5
DC
421 spin_lock_init(&map->spinlock);
422 map->lock = regmap_lock_spinlock;
423 map->unlock = regmap_unlock_spinlock;
424 } else {
425 mutex_init(&map->mutex);
426 map->lock = regmap_lock_mutex;
427 map->unlock = regmap_unlock_mutex;
428 }
429 map->lock_arg = map;
bacdbe07 430 }
c212accc 431 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 432 map->format.pad_bytes = config->pad_bits / 8;
c212accc 433 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
434 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
435 config->val_bits + config->pad_bits, 8);
d939fb9a 436 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
437 if (config->reg_stride)
438 map->reg_stride = config->reg_stride;
439 else
440 map->reg_stride = 1;
2e33caf1 441 map->use_single_rw = config->use_single_rw;
b83a313b
MB
442 map->dev = dev;
443 map->bus = bus;
0135bbcc 444 map->bus_context = bus_context;
2e2ae66d 445 map->max_register = config->max_register;
76aad392
DC
446 map->wr_table = config->wr_table;
447 map->rd_table = config->rd_table;
448 map->volatile_table = config->volatile_table;
449 map->precious_table = config->precious_table;
2e2ae66d
MB
450 map->writeable_reg = config->writeable_reg;
451 map->readable_reg = config->readable_reg;
452 map->volatile_reg = config->volatile_reg;
2efe1642 453 map->precious_reg = config->precious_reg;
5d1729e7 454 map->cache_type = config->cache_type;
72b39f6f 455 map->name = config->name;
b83a313b 456
0d509f2b
MB
457 spin_lock_init(&map->async_lock);
458 INIT_LIST_HEAD(&map->async_list);
7e09a979 459 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
460 init_waitqueue_head(&map->async_waitq);
461
6f306441
LPC
462 if (config->read_flag_mask || config->write_flag_mask) {
463 map->read_flag_mask = config->read_flag_mask;
464 map->write_flag_mask = config->write_flag_mask;
d2a5884a 465 } else if (bus) {
6f306441
LPC
466 map->read_flag_mask = bus->read_flag_mask;
467 }
468
d2a5884a
AS
469 if (!bus) {
470 map->reg_read = config->reg_read;
471 map->reg_write = config->reg_write;
472
473 map->defer_caching = false;
474 goto skip_format_initialization;
475 } else {
476 map->reg_read = _regmap_bus_read;
477 }
ad278406 478
141eba2e
SW
479 reg_endian = config->reg_format_endian;
480 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
481 reg_endian = bus->reg_format_endian_default;
482 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
483 reg_endian = REGMAP_ENDIAN_BIG;
484
485 val_endian = config->val_format_endian;
486 if (val_endian == REGMAP_ENDIAN_DEFAULT)
487 val_endian = bus->val_format_endian_default;
488 if (val_endian == REGMAP_ENDIAN_DEFAULT)
489 val_endian = REGMAP_ENDIAN_BIG;
490
d939fb9a 491 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
492 case 2:
493 switch (config->val_bits) {
494 case 6:
495 map->format.format_write = regmap_format_2_6_write;
496 break;
497 default:
498 goto err_map;
499 }
500 break;
501
b83a313b
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502 case 4:
503 switch (config->val_bits) {
504 case 12:
505 map->format.format_write = regmap_format_4_12_write;
506 break;
507 default:
508 goto err_map;
509 }
510 break;
511
512 case 7:
513 switch (config->val_bits) {
514 case 9:
515 map->format.format_write = regmap_format_7_9_write;
516 break;
517 default:
518 goto err_map;
519 }
520 break;
521
7e5ec63e
LPC
522 case 10:
523 switch (config->val_bits) {
524 case 14:
525 map->format.format_write = regmap_format_10_14_write;
526 break;
527 default:
528 goto err_map;
529 }
530 break;
531
b83a313b
MB
532 case 8:
533 map->format.format_reg = regmap_format_8;
534 break;
535
536 case 16:
141eba2e
SW
537 switch (reg_endian) {
538 case REGMAP_ENDIAN_BIG:
539 map->format.format_reg = regmap_format_16_be;
540 break;
541 case REGMAP_ENDIAN_NATIVE:
542 map->format.format_reg = regmap_format_16_native;
543 break;
544 default:
545 goto err_map;
546 }
b83a313b
MB
547 break;
548
237019e7
LPC
549 case 24:
550 if (reg_endian != REGMAP_ENDIAN_BIG)
551 goto err_map;
552 map->format.format_reg = regmap_format_24;
553 break;
554
7d5e525b 555 case 32:
141eba2e
SW
556 switch (reg_endian) {
557 case REGMAP_ENDIAN_BIG:
558 map->format.format_reg = regmap_format_32_be;
559 break;
560 case REGMAP_ENDIAN_NATIVE:
561 map->format.format_reg = regmap_format_32_native;
562 break;
563 default:
564 goto err_map;
565 }
7d5e525b
MB
566 break;
567
b83a313b
MB
568 default:
569 goto err_map;
570 }
571
8a819ff8
MB
572 if (val_endian == REGMAP_ENDIAN_NATIVE)
573 map->format.parse_inplace = regmap_parse_inplace_noop;
574
b83a313b
MB
575 switch (config->val_bits) {
576 case 8:
577 map->format.format_val = regmap_format_8;
578 map->format.parse_val = regmap_parse_8;
8a819ff8 579 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
580 break;
581 case 16:
141eba2e
SW
582 switch (val_endian) {
583 case REGMAP_ENDIAN_BIG:
584 map->format.format_val = regmap_format_16_be;
585 map->format.parse_val = regmap_parse_16_be;
8a819ff8 586 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e
SW
587 break;
588 case REGMAP_ENDIAN_NATIVE:
589 map->format.format_val = regmap_format_16_native;
590 map->format.parse_val = regmap_parse_16_native;
591 break;
592 default:
593 goto err_map;
594 }
b83a313b 595 break;
ea279fc5 596 case 24:
141eba2e
SW
597 if (val_endian != REGMAP_ENDIAN_BIG)
598 goto err_map;
ea279fc5
MR
599 map->format.format_val = regmap_format_24;
600 map->format.parse_val = regmap_parse_24;
601 break;
7d5e525b 602 case 32:
141eba2e
SW
603 switch (val_endian) {
604 case REGMAP_ENDIAN_BIG:
605 map->format.format_val = regmap_format_32_be;
606 map->format.parse_val = regmap_parse_32_be;
8a819ff8 607 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e
SW
608 break;
609 case REGMAP_ENDIAN_NATIVE:
610 map->format.format_val = regmap_format_32_native;
611 map->format.parse_val = regmap_parse_32_native;
612 break;
613 default:
614 goto err_map;
615 }
7d5e525b 616 break;
b83a313b
MB
617 }
618
141eba2e
SW
619 if (map->format.format_write) {
620 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
621 (val_endian != REGMAP_ENDIAN_BIG))
622 goto err_map;
7a647614 623 map->use_single_rw = true;
141eba2e 624 }
7a647614 625
b83a313b
MB
626 if (!map->format.format_write &&
627 !(map->format.format_reg && map->format.format_val))
628 goto err_map;
629
82159ba8 630 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
631 if (map->work_buf == NULL) {
632 ret = -ENOMEM;
5204f5e3 633 goto err_map;
b83a313b
MB
634 }
635
d2a5884a
AS
636 if (map->format.format_write) {
637 map->defer_caching = false;
07c320dc 638 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
639 } else if (map->format.format_val) {
640 map->defer_caching = true;
07c320dc 641 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
642 }
643
644skip_format_initialization:
07c320dc 645
6863ca62 646 map->range_tree = RB_ROOT;
e3549cd0 647 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
648 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
649 struct regmap_range_node *new;
650
651 /* Sanity check */
061adc06
MB
652 if (range_cfg->range_max < range_cfg->range_min) {
653 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
654 range_cfg->range_max, range_cfg->range_min);
6863ca62 655 goto err_range;
061adc06
MB
656 }
657
658 if (range_cfg->range_max > map->max_register) {
659 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
660 range_cfg->range_max, map->max_register);
661 goto err_range;
662 }
663
664 if (range_cfg->selector_reg > map->max_register) {
665 dev_err(map->dev,
666 "Invalid range %d: selector out of map\n", i);
667 goto err_range;
668 }
669
670 if (range_cfg->window_len == 0) {
671 dev_err(map->dev, "Invalid range %d: window_len 0\n",
672 i);
673 goto err_range;
674 }
6863ca62
KG
675
676 /* Make sure, that this register range has no selector
677 or data window within its boundary */
e3549cd0 678 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
679 unsigned sel_reg = config->ranges[j].selector_reg;
680 unsigned win_min = config->ranges[j].window_start;
681 unsigned win_max = win_min +
682 config->ranges[j].window_len - 1;
683
f161d220
PZ
684 /* Allow data window inside its own virtual range */
685 if (j == i)
686 continue;
687
6863ca62
KG
688 if (range_cfg->range_min <= sel_reg &&
689 sel_reg <= range_cfg->range_max) {
061adc06
MB
690 dev_err(map->dev,
691 "Range %d: selector for %d in window\n",
692 i, j);
6863ca62
KG
693 goto err_range;
694 }
695
696 if (!(win_max < range_cfg->range_min ||
697 win_min > range_cfg->range_max)) {
061adc06
MB
698 dev_err(map->dev,
699 "Range %d: window for %d in window\n",
700 i, j);
6863ca62
KG
701 goto err_range;
702 }
703 }
704
705 new = kzalloc(sizeof(*new), GFP_KERNEL);
706 if (new == NULL) {
707 ret = -ENOMEM;
708 goto err_range;
709 }
710
4b020b3f 711 new->map = map;
d058bb49 712 new->name = range_cfg->name;
6863ca62
KG
713 new->range_min = range_cfg->range_min;
714 new->range_max = range_cfg->range_max;
715 new->selector_reg = range_cfg->selector_reg;
716 new->selector_mask = range_cfg->selector_mask;
717 new->selector_shift = range_cfg->selector_shift;
718 new->window_start = range_cfg->window_start;
719 new->window_len = range_cfg->window_len;
720
721 if (_regmap_range_add(map, new) == false) {
061adc06 722 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
723 kfree(new);
724 goto err_range;
725 }
726
727 if (map->selector_work_buf == NULL) {
728 map->selector_work_buf =
729 kzalloc(map->format.buf_size, GFP_KERNEL);
730 if (map->selector_work_buf == NULL) {
731 ret = -ENOMEM;
732 goto err_range;
733 }
734 }
735 }
052d2cd1 736
c6432ea9
DP
737 regmap_debugfs_init(map, config->name);
738
e5e3b8ab 739 ret = regcache_init(map, config);
0ff3e62f 740 if (ret != 0)
6863ca62
KG
741 goto err_range;
742
72b39f6f
MB
743 /* Add a devres resource for dev_get_regmap() */
744 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
745 if (!m) {
746 ret = -ENOMEM;
6863ca62 747 goto err_debugfs;
72b39f6f
MB
748 }
749 *m = map;
750 devres_add(dev, m);
751
b83a313b
MB
752 return map;
753
bfaa25f3
SW
754err_debugfs:
755 regmap_debugfs_exit(map);
72b39f6f 756 regcache_exit(map);
6863ca62
KG
757err_range:
758 regmap_range_exit(map);
58072cbf 759 kfree(map->work_buf);
b83a313b
MB
760err_map:
761 kfree(map);
762err:
763 return ERR_PTR(ret);
764}
765EXPORT_SYMBOL_GPL(regmap_init);
766
c0eb4676
MB
767static void devm_regmap_release(struct device *dev, void *res)
768{
769 regmap_exit(*(struct regmap **)res);
770}
771
772/**
773 * devm_regmap_init(): Initialise managed register map
774 *
775 * @dev: Device that will be interacted with
776 * @bus: Bus-specific callbacks to use with device
0135bbcc 777 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
778 * @config: Configuration for register map
779 *
780 * The return value will be an ERR_PTR() on error or a valid pointer
781 * to a struct regmap. This function should generally not be called
782 * directly, it should be called by bus-specific init functions. The
783 * map will be automatically freed by the device management code.
784 */
785struct regmap *devm_regmap_init(struct device *dev,
786 const struct regmap_bus *bus,
0135bbcc 787 void *bus_context,
c0eb4676
MB
788 const struct regmap_config *config)
789{
790 struct regmap **ptr, *regmap;
791
792 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
793 if (!ptr)
794 return ERR_PTR(-ENOMEM);
795
0135bbcc 796 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
797 if (!IS_ERR(regmap)) {
798 *ptr = regmap;
799 devres_add(dev, ptr);
800 } else {
801 devres_free(ptr);
802 }
803
804 return regmap;
805}
806EXPORT_SYMBOL_GPL(devm_regmap_init);
807
67252287
SK
808static void regmap_field_init(struct regmap_field *rm_field,
809 struct regmap *regmap, struct reg_field reg_field)
810{
811 int field_bits = reg_field.msb - reg_field.lsb + 1;
812 rm_field->regmap = regmap;
813 rm_field->reg = reg_field.reg;
814 rm_field->shift = reg_field.lsb;
815 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
a0102375
KM
816 rm_field->id_size = reg_field.id_size;
817 rm_field->id_offset = reg_field.id_offset;
67252287
SK
818}
819
820/**
821 * devm_regmap_field_alloc(): Allocate and initialise a register field
822 * in a register map.
823 *
824 * @dev: Device that will be interacted with
825 * @regmap: regmap bank in which this register field is located.
826 * @reg_field: Register field with in the bank.
827 *
828 * The return value will be an ERR_PTR() on error or a valid pointer
829 * to a struct regmap_field. The regmap_field will be automatically freed
830 * by the device management code.
831 */
832struct regmap_field *devm_regmap_field_alloc(struct device *dev,
833 struct regmap *regmap, struct reg_field reg_field)
834{
835 struct regmap_field *rm_field = devm_kzalloc(dev,
836 sizeof(*rm_field), GFP_KERNEL);
837 if (!rm_field)
838 return ERR_PTR(-ENOMEM);
839
840 regmap_field_init(rm_field, regmap, reg_field);
841
842 return rm_field;
843
844}
845EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
846
847/**
848 * devm_regmap_field_free(): Free register field allocated using
849 * devm_regmap_field_alloc. Usally drivers need not call this function,
850 * as the memory allocated via devm will be freed as per device-driver
851 * life-cyle.
852 *
853 * @dev: Device that will be interacted with
854 * @field: regmap field which should be freed.
855 */
856void devm_regmap_field_free(struct device *dev,
857 struct regmap_field *field)
858{
859 devm_kfree(dev, field);
860}
861EXPORT_SYMBOL_GPL(devm_regmap_field_free);
862
863/**
864 * regmap_field_alloc(): Allocate and initialise a register field
865 * in a register map.
866 *
867 * @regmap: regmap bank in which this register field is located.
868 * @reg_field: Register field with in the bank.
869 *
870 * The return value will be an ERR_PTR() on error or a valid pointer
871 * to a struct regmap_field. The regmap_field should be freed by the
872 * user once its finished working with it using regmap_field_free().
873 */
874struct regmap_field *regmap_field_alloc(struct regmap *regmap,
875 struct reg_field reg_field)
876{
877 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
878
879 if (!rm_field)
880 return ERR_PTR(-ENOMEM);
881
882 regmap_field_init(rm_field, regmap, reg_field);
883
884 return rm_field;
885}
886EXPORT_SYMBOL_GPL(regmap_field_alloc);
887
888/**
889 * regmap_field_free(): Free register field allocated using regmap_field_alloc
890 *
891 * @field: regmap field which should be freed.
892 */
893void regmap_field_free(struct regmap_field *field)
894{
895 kfree(field);
896}
897EXPORT_SYMBOL_GPL(regmap_field_free);
898
bf315173
MB
899/**
900 * regmap_reinit_cache(): Reinitialise the current register cache
901 *
902 * @map: Register map to operate on.
903 * @config: New configuration. Only the cache data will be used.
904 *
905 * Discard any existing register cache for the map and initialize a
906 * new cache. This can be used to restore the cache to defaults or to
907 * update the cache configuration to reflect runtime discovery of the
908 * hardware.
4d879514
DP
909 *
910 * No explicit locking is done here, the user needs to ensure that
911 * this function will not race with other calls to regmap.
bf315173
MB
912 */
913int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
914{
bf315173 915 regcache_exit(map);
a24f64a6 916 regmap_debugfs_exit(map);
bf315173
MB
917
918 map->max_register = config->max_register;
919 map->writeable_reg = config->writeable_reg;
920 map->readable_reg = config->readable_reg;
921 map->volatile_reg = config->volatile_reg;
922 map->precious_reg = config->precious_reg;
923 map->cache_type = config->cache_type;
924
d3c242e1 925 regmap_debugfs_init(map, config->name);
a24f64a6 926
421e8d2d
MB
927 map->cache_bypass = false;
928 map->cache_only = false;
929
4d879514 930 return regcache_init(map, config);
bf315173 931}
752a6a5f 932EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 933
b83a313b
MB
934/**
935 * regmap_exit(): Free a previously allocated register map
936 */
937void regmap_exit(struct regmap *map)
938{
7e09a979
MB
939 struct regmap_async *async;
940
5d1729e7 941 regcache_exit(map);
31244e39 942 regmap_debugfs_exit(map);
6863ca62 943 regmap_range_exit(map);
d2a5884a 944 if (map->bus && map->bus->free_context)
0135bbcc 945 map->bus->free_context(map->bus_context);
b83a313b 946 kfree(map->work_buf);
7e09a979
MB
947 while (!list_empty(&map->async_free)) {
948 async = list_first_entry_or_null(&map->async_free,
949 struct regmap_async,
950 list);
951 list_del(&async->list);
952 kfree(async->work_buf);
953 kfree(async);
954 }
b83a313b
MB
955 kfree(map);
956}
957EXPORT_SYMBOL_GPL(regmap_exit);
958
72b39f6f
MB
959static int dev_get_regmap_match(struct device *dev, void *res, void *data)
960{
961 struct regmap **r = res;
962 if (!r || !*r) {
963 WARN_ON(!r || !*r);
964 return 0;
965 }
966
967 /* If the user didn't specify a name match any */
968 if (data)
969 return (*r)->name == data;
970 else
971 return 1;
972}
973
974/**
975 * dev_get_regmap(): Obtain the regmap (if any) for a device
976 *
977 * @dev: Device to retrieve the map for
978 * @name: Optional name for the register map, usually NULL.
979 *
980 * Returns the regmap for the device if one is present, or NULL. If
981 * name is specified then it must match the name specified when
982 * registering the device, if it is NULL then the first regmap found
983 * will be used. Devices with multiple register maps are very rare,
984 * generic code should normally not need to specify a name.
985 */
986struct regmap *dev_get_regmap(struct device *dev, const char *name)
987{
988 struct regmap **r = devres_find(dev, dev_get_regmap_release,
989 dev_get_regmap_match, (void *)name);
990
991 if (!r)
992 return NULL;
993 return *r;
994}
995EXPORT_SYMBOL_GPL(dev_get_regmap);
996
6863ca62 997static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 998 struct regmap_range_node *range,
6863ca62
KG
999 unsigned int val_num)
1000{
6863ca62
KG
1001 void *orig_work_buf;
1002 unsigned int win_offset;
1003 unsigned int win_page;
1004 bool page_chg;
1005 int ret;
1006
98bc7dfd
MB
1007 win_offset = (*reg - range->range_min) % range->window_len;
1008 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1009
98bc7dfd
MB
1010 if (val_num > 1) {
1011 /* Bulk write shouldn't cross range boundary */
1012 if (*reg + val_num - 1 > range->range_max)
1013 return -EINVAL;
6863ca62 1014
98bc7dfd
MB
1015 /* ... or single page boundary */
1016 if (val_num > range->window_len - win_offset)
1017 return -EINVAL;
1018 }
6863ca62 1019
98bc7dfd
MB
1020 /* It is possible to have selector register inside data window.
1021 In that case, selector register is located on every page and
1022 it needs no page switching, when accessed alone. */
1023 if (val_num > 1 ||
1024 range->window_start + win_offset != range->selector_reg) {
1025 /* Use separate work_buf during page switching */
1026 orig_work_buf = map->work_buf;
1027 map->work_buf = map->selector_work_buf;
6863ca62 1028
98bc7dfd
MB
1029 ret = _regmap_update_bits(map, range->selector_reg,
1030 range->selector_mask,
1031 win_page << range->selector_shift,
1032 &page_chg);
632a5b01 1033
98bc7dfd 1034 map->work_buf = orig_work_buf;
6863ca62 1035
0ff3e62f 1036 if (ret != 0)
98bc7dfd 1037 return ret;
6863ca62
KG
1038 }
1039
98bc7dfd
MB
1040 *reg = range->window_start + win_offset;
1041
6863ca62
KG
1042 return 0;
1043}
1044
584de329 1045int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1046 const void *val, size_t val_len)
b83a313b 1047{
98bc7dfd 1048 struct regmap_range_node *range;
0d509f2b 1049 unsigned long flags;
6f306441 1050 u8 *u8 = map->work_buf;
0d509f2b
MB
1051 void *work_val = map->work_buf + map->format.reg_bytes +
1052 map->format.pad_bytes;
b83a313b
MB
1053 void *buf;
1054 int ret = -ENOTSUPP;
1055 size_t len;
73304781
MB
1056 int i;
1057
f1b5c5c3 1058 WARN_ON(!map->bus);
d2a5884a 1059
73304781
MB
1060 /* Check for unwritable registers before we start */
1061 if (map->writeable_reg)
1062 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1063 if (!map->writeable_reg(map->dev,
1064 reg + (i * map->reg_stride)))
73304781 1065 return -EINVAL;
b83a313b 1066
c9157198
LD
1067 if (!map->cache_bypass && map->format.parse_val) {
1068 unsigned int ival;
1069 int val_bytes = map->format.val_bytes;
1070 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1071 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1072 ret = regcache_write(map, reg + (i * map->reg_stride),
1073 ival);
c9157198
LD
1074 if (ret) {
1075 dev_err(map->dev,
6d04b8ac 1076 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1077 reg + i, ret);
1078 return ret;
1079 }
1080 }
1081 if (map->cache_only) {
1082 map->cache_dirty = true;
1083 return 0;
1084 }
1085 }
1086
98bc7dfd
MB
1087 range = _regmap_range_lookup(map, reg);
1088 if (range) {
8a2ceac6
MB
1089 int val_num = val_len / map->format.val_bytes;
1090 int win_offset = (reg - range->range_min) % range->window_len;
1091 int win_residue = range->window_len - win_offset;
1092
1093 /* If the write goes beyond the end of the window split it */
1094 while (val_num > win_residue) {
1a61cfe3 1095 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1096 win_residue, val_len / map->format.val_bytes);
1097 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1098 map->format.val_bytes);
8a2ceac6
MB
1099 if (ret != 0)
1100 return ret;
1101
1102 reg += win_residue;
1103 val_num -= win_residue;
1104 val += win_residue * map->format.val_bytes;
1105 val_len -= win_residue * map->format.val_bytes;
1106
1107 win_offset = (reg - range->range_min) %
1108 range->window_len;
1109 win_residue = range->window_len - win_offset;
1110 }
1111
1112 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1113 if (ret != 0)
98bc7dfd
MB
1114 return ret;
1115 }
6863ca62 1116
d939fb9a 1117 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1118
6f306441
LPC
1119 u8[0] |= map->write_flag_mask;
1120
651e013e
MB
1121 /*
1122 * Essentially all I/O mechanisms will be faster with a single
1123 * buffer to write. Since register syncs often generate raw
1124 * writes of single registers optimise that case.
1125 */
1126 if (val != work_val && val_len == map->format.val_bytes) {
1127 memcpy(work_val, val, map->format.val_bytes);
1128 val = work_val;
1129 }
1130
0a819809 1131 if (map->async && map->bus->async_write) {
7e09a979 1132 struct regmap_async *async;
0d509f2b 1133
fe7d4ccd
MB
1134 trace_regmap_async_write_start(map->dev, reg, val_len);
1135
7e09a979
MB
1136 spin_lock_irqsave(&map->async_lock, flags);
1137 async = list_first_entry_or_null(&map->async_free,
1138 struct regmap_async,
1139 list);
1140 if (async)
1141 list_del(&async->list);
1142 spin_unlock_irqrestore(&map->async_lock, flags);
1143
1144 if (!async) {
1145 async = map->bus->async_alloc();
1146 if (!async)
1147 return -ENOMEM;
1148
1149 async->work_buf = kzalloc(map->format.buf_size,
1150 GFP_KERNEL | GFP_DMA);
1151 if (!async->work_buf) {
1152 kfree(async);
1153 return -ENOMEM;
1154 }
0d509f2b
MB
1155 }
1156
0d509f2b
MB
1157 async->map = map;
1158
1159 /* If the caller supplied the value we can use it safely. */
1160 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1161 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1162
1163 spin_lock_irqsave(&map->async_lock, flags);
1164 list_add_tail(&async->list, &map->async_list);
1165 spin_unlock_irqrestore(&map->async_lock, flags);
1166
04c50ccf
MB
1167 if (val != work_val)
1168 ret = map->bus->async_write(map->bus_context,
1169 async->work_buf,
1170 map->format.reg_bytes +
1171 map->format.pad_bytes,
1172 val, val_len, async);
1173 else
1174 ret = map->bus->async_write(map->bus_context,
1175 async->work_buf,
1176 map->format.reg_bytes +
1177 map->format.pad_bytes +
1178 val_len, NULL, 0, async);
0d509f2b
MB
1179
1180 if (ret != 0) {
1181 dev_err(map->dev, "Failed to schedule write: %d\n",
1182 ret);
1183
1184 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1185 list_move(&async->list, &map->async_free);
0d509f2b 1186 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1187 }
f951b658
MB
1188
1189 return ret;
0d509f2b
MB
1190 }
1191
fb2736bb
MB
1192 trace_regmap_hw_write_start(map->dev, reg,
1193 val_len / map->format.val_bytes);
1194
2547e201
MB
1195 /* If we're doing a single register write we can probably just
1196 * send the work_buf directly, otherwise try to do a gather
1197 * write.
1198 */
0d509f2b 1199 if (val == work_val)
0135bbcc 1200 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1201 map->format.reg_bytes +
1202 map->format.pad_bytes +
1203 val_len);
2547e201 1204 else if (map->bus->gather_write)
0135bbcc 1205 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1206 map->format.reg_bytes +
1207 map->format.pad_bytes,
b83a313b
MB
1208 val, val_len);
1209
2547e201 1210 /* If that didn't work fall back on linearising by hand. */
b83a313b 1211 if (ret == -ENOTSUPP) {
82159ba8
MB
1212 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1213 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1214 if (!buf)
1215 return -ENOMEM;
1216
1217 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1218 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1219 val, val_len);
0135bbcc 1220 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1221
1222 kfree(buf);
1223 }
1224
fb2736bb
MB
1225 trace_regmap_hw_write_done(map->dev, reg,
1226 val_len / map->format.val_bytes);
1227
b83a313b
MB
1228 return ret;
1229}
1230
221ad7f2
MB
1231/**
1232 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1233 *
1234 * @map: Map to check.
1235 */
1236bool regmap_can_raw_write(struct regmap *map)
1237{
1238 return map->bus && map->format.format_val && map->format.format_reg;
1239}
1240EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1241
07c320dc
AS
1242static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1243 unsigned int val)
1244{
1245 int ret;
1246 struct regmap_range_node *range;
1247 struct regmap *map = context;
1248
f1b5c5c3 1249 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1250
1251 range = _regmap_range_lookup(map, reg);
1252 if (range) {
1253 ret = _regmap_select_page(map, &reg, range, 1);
1254 if (ret != 0)
1255 return ret;
1256 }
1257
1258 map->format.format_write(map, reg, val);
1259
1260 trace_regmap_hw_write_start(map->dev, reg, 1);
1261
1262 ret = map->bus->write(map->bus_context, map->work_buf,
1263 map->format.buf_size);
1264
1265 trace_regmap_hw_write_done(map->dev, reg, 1);
1266
1267 return ret;
1268}
1269
1270static int _regmap_bus_raw_write(void *context, unsigned int reg,
1271 unsigned int val)
1272{
1273 struct regmap *map = context;
1274
f1b5c5c3 1275 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1276
1277 map->format.format_val(map->work_buf + map->format.reg_bytes
1278 + map->format.pad_bytes, val, 0);
1279 return _regmap_raw_write(map, reg,
1280 map->work_buf +
1281 map->format.reg_bytes +
1282 map->format.pad_bytes,
0a819809 1283 map->format.val_bytes);
07c320dc
AS
1284}
1285
d2a5884a
AS
1286static inline void *_regmap_map_get_context(struct regmap *map)
1287{
1288 return (map->bus) ? map : map->bus_context;
1289}
1290
4d2dc095
DP
1291int _regmap_write(struct regmap *map, unsigned int reg,
1292 unsigned int val)
b83a313b 1293{
fb2736bb 1294 int ret;
d2a5884a 1295 void *context = _regmap_map_get_context(map);
b83a313b 1296
515f2261
IN
1297 if (!regmap_writeable(map, reg))
1298 return -EIO;
1299
d2a5884a 1300 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1301 ret = regcache_write(map, reg, val);
1302 if (ret != 0)
1303 return ret;
8ae0d7e8
MB
1304 if (map->cache_only) {
1305 map->cache_dirty = true;
5d1729e7 1306 return 0;
8ae0d7e8 1307 }
5d1729e7
DP
1308 }
1309
1044c180
MB
1310#ifdef LOG_DEVICE
1311 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1312 dev_info(map->dev, "%x <= %x\n", reg, val);
1313#endif
1314
fb2736bb
MB
1315 trace_regmap_reg_write(map->dev, reg, val);
1316
d2a5884a 1317 return map->reg_write(context, reg, val);
b83a313b
MB
1318}
1319
1320/**
1321 * regmap_write(): Write a value to a single register
1322 *
1323 * @map: Register map to write to
1324 * @reg: Register to write to
1325 * @val: Value to be written
1326 *
1327 * A value of zero will be returned on success, a negative errno will
1328 * be returned in error cases.
1329 */
1330int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1331{
1332 int ret;
1333
f01ee60f
SW
1334 if (reg % map->reg_stride)
1335 return -EINVAL;
1336
0d4529c5 1337 map->lock(map->lock_arg);
b83a313b
MB
1338
1339 ret = _regmap_write(map, reg, val);
1340
0d4529c5 1341 map->unlock(map->lock_arg);
b83a313b
MB
1342
1343 return ret;
1344}
1345EXPORT_SYMBOL_GPL(regmap_write);
1346
915f441b
MB
1347/**
1348 * regmap_write_async(): Write a value to a single register asynchronously
1349 *
1350 * @map: Register map to write to
1351 * @reg: Register to write to
1352 * @val: Value to be written
1353 *
1354 * A value of zero will be returned on success, a negative errno will
1355 * be returned in error cases.
1356 */
1357int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1358{
1359 int ret;
1360
1361 if (reg % map->reg_stride)
1362 return -EINVAL;
1363
1364 map->lock(map->lock_arg);
1365
1366 map->async = true;
1367
1368 ret = _regmap_write(map, reg, val);
1369
1370 map->async = false;
1371
1372 map->unlock(map->lock_arg);
1373
1374 return ret;
1375}
1376EXPORT_SYMBOL_GPL(regmap_write_async);
1377
b83a313b
MB
1378/**
1379 * regmap_raw_write(): Write raw values to one or more registers
1380 *
1381 * @map: Register map to write to
1382 * @reg: Initial register to write to
1383 * @val: Block of data to be written, laid out for direct transmission to the
1384 * device
1385 * @val_len: Length of data pointed to by val.
1386 *
1387 * This function is intended to be used for things like firmware
1388 * download where a large block of data needs to be transferred to the
1389 * device. No formatting will be done on the data provided.
1390 *
1391 * A value of zero will be returned on success, a negative errno will
1392 * be returned in error cases.
1393 */
1394int regmap_raw_write(struct regmap *map, unsigned int reg,
1395 const void *val, size_t val_len)
1396{
1397 int ret;
1398
221ad7f2 1399 if (!regmap_can_raw_write(map))
d2a5884a 1400 return -EINVAL;
851960ba
SW
1401 if (val_len % map->format.val_bytes)
1402 return -EINVAL;
1403
0d4529c5 1404 map->lock(map->lock_arg);
b83a313b 1405
0a819809 1406 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1407
0d4529c5 1408 map->unlock(map->lock_arg);
b83a313b
MB
1409
1410 return ret;
1411}
1412EXPORT_SYMBOL_GPL(regmap_raw_write);
1413
67252287
SK
1414/**
1415 * regmap_field_write(): Write a value to a single register field
1416 *
1417 * @field: Register field to write to
1418 * @val: Value to be written
1419 *
1420 * A value of zero will be returned on success, a negative errno will
1421 * be returned in error cases.
1422 */
1423int regmap_field_write(struct regmap_field *field, unsigned int val)
1424{
1425 return regmap_update_bits(field->regmap, field->reg,
1426 field->mask, val << field->shift);
1427}
1428EXPORT_SYMBOL_GPL(regmap_field_write);
1429
fdf20029
KM
1430/**
1431 * regmap_field_update_bits(): Perform a read/modify/write cycle
1432 * on the register field
1433 *
1434 * @field: Register field to write to
1435 * @mask: Bitmask to change
1436 * @val: Value to be written
1437 *
1438 * A value of zero will be returned on success, a negative errno will
1439 * be returned in error cases.
1440 */
1441int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1442{
1443 mask = (mask << field->shift) & field->mask;
1444
1445 return regmap_update_bits(field->regmap, field->reg,
1446 mask, val << field->shift);
1447}
1448EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1449
a0102375
KM
1450/**
1451 * regmap_fields_write(): Write a value to a single register field with port ID
1452 *
1453 * @field: Register field to write to
1454 * @id: port ID
1455 * @val: Value to be written
1456 *
1457 * A value of zero will be returned on success, a negative errno will
1458 * be returned in error cases.
1459 */
1460int regmap_fields_write(struct regmap_field *field, unsigned int id,
1461 unsigned int val)
1462{
1463 if (id >= field->id_size)
1464 return -EINVAL;
1465
1466 return regmap_update_bits(field->regmap,
1467 field->reg + (field->id_offset * id),
1468 field->mask, val << field->shift);
1469}
1470EXPORT_SYMBOL_GPL(regmap_fields_write);
1471
1472/**
1473 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1474 * on the register field
1475 *
1476 * @field: Register field to write to
1477 * @id: port ID
1478 * @mask: Bitmask to change
1479 * @val: Value to be written
1480 *
1481 * A value of zero will be returned on success, a negative errno will
1482 * be returned in error cases.
1483 */
1484int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1485 unsigned int mask, unsigned int val)
1486{
1487 if (id >= field->id_size)
1488 return -EINVAL;
1489
1490 mask = (mask << field->shift) & field->mask;
1491
1492 return regmap_update_bits(field->regmap,
1493 field->reg + (field->id_offset * id),
1494 mask, val << field->shift);
1495}
1496EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1497
8eaeb219
LD
1498/*
1499 * regmap_bulk_write(): Write multiple registers to the device
1500 *
1501 * @map: Register map to write to
1502 * @reg: First register to be write from
1503 * @val: Block of data to be written, in native register size for device
1504 * @val_count: Number of registers to write
1505 *
1506 * This function is intended to be used for writing a large block of
31b35e9e 1507 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1508 *
1509 * A value of zero will be returned on success, a negative errno will
1510 * be returned in error cases.
1511 */
1512int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1513 size_t val_count)
1514{
1515 int ret = 0, i;
1516 size_t val_bytes = map->format.val_bytes;
1517 void *wval;
1518
d2a5884a
AS
1519 if (!map->bus)
1520 return -EINVAL;
8a819ff8 1521 if (!map->format.parse_inplace)
8eaeb219 1522 return -EINVAL;
f01ee60f
SW
1523 if (reg % map->reg_stride)
1524 return -EINVAL;
8eaeb219 1525
0d4529c5 1526 map->lock(map->lock_arg);
8eaeb219
LD
1527
1528 /* No formatting is require if val_byte is 1 */
1529 if (val_bytes == 1) {
1530 wval = (void *)val;
1531 } else {
1532 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1533 if (!wval) {
1534 ret = -ENOMEM;
1535 dev_err(map->dev, "Error in memory allocation\n");
1536 goto out;
1537 }
1538 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1539 map->format.parse_inplace(wval + i);
8eaeb219 1540 }
2e33caf1
AJ
1541 /*
1542 * Some devices does not support bulk write, for
1543 * them we have a series of single write operations.
1544 */
1545 if (map->use_single_rw) {
1546 for (i = 0; i < val_count; i++) {
4174a7a4
AO
1547 ret = _regmap_raw_write(map,
1548 reg + (i * map->reg_stride),
1549 val + (i * val_bytes),
7ccda983 1550 val_bytes);
2e33caf1
AJ
1551 if (ret != 0)
1552 return ret;
1553 }
1554 } else {
0a819809 1555 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
2e33caf1 1556 }
8eaeb219
LD
1557
1558 if (val_bytes != 1)
1559 kfree(wval);
1560
1561out:
0d4529c5 1562 map->unlock(map->lock_arg);
8eaeb219
LD
1563 return ret;
1564}
1565EXPORT_SYMBOL_GPL(regmap_bulk_write);
1566
e33fabd3
AO
1567/*
1568 * regmap_multi_reg_write(): Write multiple registers to the device
1569 *
1570 * where the set of register are supplied in any order
1571 *
1572 * @map: Register map to write to
1573 * @regs: Array of structures containing register,value to be written
1574 * @num_regs: Number of registers to write
1575 *
1576 * This function is intended to be used for writing a large block of data
1577 * atomically to the device in single transfer for those I2C client devices
1578 * that implement this alternative block write mode.
1579 *
1580 * A value of zero will be returned on success, a negative errno will
1581 * be returned in error cases.
1582 */
1583int regmap_multi_reg_write(struct regmap *map, struct reg_default *regs,
1584 int num_regs)
1585{
1586 int ret = 0, i;
1587
1588 for (i = 0; i < num_regs; i++) {
1589 int reg = regs[i].reg;
1590 if (reg % map->reg_stride)
1591 return -EINVAL;
1592 }
1593
1594 map->lock(map->lock_arg);
1595
1596 for (i = 0; i < num_regs; i++) {
1597 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1598 if (ret != 0)
1599 goto out;
1600 }
1601out:
1602 map->unlock(map->lock_arg);
1603
1604 return ret;
1605}
1606EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1607
0d509f2b
MB
1608/**
1609 * regmap_raw_write_async(): Write raw values to one or more registers
1610 * asynchronously
1611 *
1612 * @map: Register map to write to
1613 * @reg: Initial register to write to
1614 * @val: Block of data to be written, laid out for direct transmission to the
1615 * device. Must be valid until regmap_async_complete() is called.
1616 * @val_len: Length of data pointed to by val.
1617 *
1618 * This function is intended to be used for things like firmware
1619 * download where a large block of data needs to be transferred to the
1620 * device. No formatting will be done on the data provided.
1621 *
1622 * If supported by the underlying bus the write will be scheduled
1623 * asynchronously, helping maximise I/O speed on higher speed buses
1624 * like SPI. regmap_async_complete() can be called to ensure that all
1625 * asynchrnous writes have been completed.
1626 *
1627 * A value of zero will be returned on success, a negative errno will
1628 * be returned in error cases.
1629 */
1630int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1631 const void *val, size_t val_len)
1632{
1633 int ret;
1634
1635 if (val_len % map->format.val_bytes)
1636 return -EINVAL;
1637 if (reg % map->reg_stride)
1638 return -EINVAL;
1639
1640 map->lock(map->lock_arg);
1641
0a819809
MB
1642 map->async = true;
1643
1644 ret = _regmap_raw_write(map, reg, val, val_len);
1645
1646 map->async = false;
0d509f2b
MB
1647
1648 map->unlock(map->lock_arg);
1649
1650 return ret;
1651}
1652EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1653
b83a313b
MB
1654static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1655 unsigned int val_len)
1656{
98bc7dfd 1657 struct regmap_range_node *range;
b83a313b
MB
1658 u8 *u8 = map->work_buf;
1659 int ret;
1660
f1b5c5c3 1661 WARN_ON(!map->bus);
d2a5884a 1662
98bc7dfd
MB
1663 range = _regmap_range_lookup(map, reg);
1664 if (range) {
1665 ret = _regmap_select_page(map, &reg, range,
1666 val_len / map->format.val_bytes);
0ff3e62f 1667 if (ret != 0)
98bc7dfd
MB
1668 return ret;
1669 }
6863ca62 1670
d939fb9a 1671 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1672
1673 /*
6f306441 1674 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1675 * register addresss; since it's always the high bits for all
1676 * current formats we can do this here rather than in
1677 * formatting. This may break if we get interesting formats.
1678 */
6f306441 1679 u8[0] |= map->read_flag_mask;
b83a313b 1680
fb2736bb
MB
1681 trace_regmap_hw_read_start(map->dev, reg,
1682 val_len / map->format.val_bytes);
1683
0135bbcc 1684 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1685 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1686 val, val_len);
b83a313b 1687
fb2736bb
MB
1688 trace_regmap_hw_read_done(map->dev, reg,
1689 val_len / map->format.val_bytes);
1690
1691 return ret;
b83a313b
MB
1692}
1693
ad278406
AS
1694static int _regmap_bus_read(void *context, unsigned int reg,
1695 unsigned int *val)
1696{
1697 int ret;
1698 struct regmap *map = context;
1699
1700 if (!map->format.parse_val)
1701 return -EINVAL;
1702
1703 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1704 if (ret == 0)
1705 *val = map->format.parse_val(map->work_buf);
1706
1707 return ret;
1708}
1709
b83a313b
MB
1710static int _regmap_read(struct regmap *map, unsigned int reg,
1711 unsigned int *val)
1712{
1713 int ret;
d2a5884a
AS
1714 void *context = _regmap_map_get_context(map);
1715
f1b5c5c3 1716 WARN_ON(!map->reg_read);
b83a313b 1717
5d1729e7
DP
1718 if (!map->cache_bypass) {
1719 ret = regcache_read(map, reg, val);
1720 if (ret == 0)
1721 return 0;
1722 }
1723
1724 if (map->cache_only)
1725 return -EBUSY;
1726
d2a5884a 1727 ret = map->reg_read(context, reg, val);
fb2736bb 1728 if (ret == 0) {
1044c180
MB
1729#ifdef LOG_DEVICE
1730 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1731 dev_info(map->dev, "%x => %x\n", reg, *val);
1732#endif
1733
fb2736bb 1734 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1735
ad278406
AS
1736 if (!map->cache_bypass)
1737 regcache_write(map, reg, *val);
1738 }
f2985367 1739
b83a313b
MB
1740 return ret;
1741}
1742
1743/**
1744 * regmap_read(): Read a value from a single register
1745 *
1746 * @map: Register map to write to
1747 * @reg: Register to be read from
1748 * @val: Pointer to store read value
1749 *
1750 * A value of zero will be returned on success, a negative errno will
1751 * be returned in error cases.
1752 */
1753int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1754{
1755 int ret;
1756
f01ee60f
SW
1757 if (reg % map->reg_stride)
1758 return -EINVAL;
1759
0d4529c5 1760 map->lock(map->lock_arg);
b83a313b
MB
1761
1762 ret = _regmap_read(map, reg, val);
1763
0d4529c5 1764 map->unlock(map->lock_arg);
b83a313b
MB
1765
1766 return ret;
1767}
1768EXPORT_SYMBOL_GPL(regmap_read);
1769
1770/**
1771 * regmap_raw_read(): Read raw data from the device
1772 *
1773 * @map: Register map to write to
1774 * @reg: First register to be read from
1775 * @val: Pointer to store read value
1776 * @val_len: Size of data to read
1777 *
1778 * A value of zero will be returned on success, a negative errno will
1779 * be returned in error cases.
1780 */
1781int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1782 size_t val_len)
1783{
b8fb5ab1
MB
1784 size_t val_bytes = map->format.val_bytes;
1785 size_t val_count = val_len / val_bytes;
1786 unsigned int v;
1787 int ret, i;
04e016ad 1788
d2a5884a
AS
1789 if (!map->bus)
1790 return -EINVAL;
851960ba
SW
1791 if (val_len % map->format.val_bytes)
1792 return -EINVAL;
f01ee60f
SW
1793 if (reg % map->reg_stride)
1794 return -EINVAL;
851960ba 1795
0d4529c5 1796 map->lock(map->lock_arg);
b83a313b 1797
b8fb5ab1
MB
1798 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
1799 map->cache_type == REGCACHE_NONE) {
1800 /* Physical block read if there's no cache involved */
1801 ret = _regmap_raw_read(map, reg, val, val_len);
1802
1803 } else {
1804 /* Otherwise go word by word for the cache; should be low
1805 * cost as we expect to hit the cache.
1806 */
1807 for (i = 0; i < val_count; i++) {
f01ee60f
SW
1808 ret = _regmap_read(map, reg + (i * map->reg_stride),
1809 &v);
b8fb5ab1
MB
1810 if (ret != 0)
1811 goto out;
1812
d939fb9a 1813 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
1814 }
1815 }
b83a313b 1816
b8fb5ab1 1817 out:
0d4529c5 1818 map->unlock(map->lock_arg);
b83a313b
MB
1819
1820 return ret;
1821}
1822EXPORT_SYMBOL_GPL(regmap_raw_read);
1823
67252287
SK
1824/**
1825 * regmap_field_read(): Read a value to a single register field
1826 *
1827 * @field: Register field to read from
1828 * @val: Pointer to store read value
1829 *
1830 * A value of zero will be returned on success, a negative errno will
1831 * be returned in error cases.
1832 */
1833int regmap_field_read(struct regmap_field *field, unsigned int *val)
1834{
1835 int ret;
1836 unsigned int reg_val;
1837 ret = regmap_read(field->regmap, field->reg, &reg_val);
1838 if (ret != 0)
1839 return ret;
1840
1841 reg_val &= field->mask;
1842 reg_val >>= field->shift;
1843 *val = reg_val;
1844
1845 return ret;
1846}
1847EXPORT_SYMBOL_GPL(regmap_field_read);
1848
a0102375
KM
1849/**
1850 * regmap_fields_read(): Read a value to a single register field with port ID
1851 *
1852 * @field: Register field to read from
1853 * @id: port ID
1854 * @val: Pointer to store read value
1855 *
1856 * A value of zero will be returned on success, a negative errno will
1857 * be returned in error cases.
1858 */
1859int regmap_fields_read(struct regmap_field *field, unsigned int id,
1860 unsigned int *val)
1861{
1862 int ret;
1863 unsigned int reg_val;
1864
1865 if (id >= field->id_size)
1866 return -EINVAL;
1867
1868 ret = regmap_read(field->regmap,
1869 field->reg + (field->id_offset * id),
1870 &reg_val);
1871 if (ret != 0)
1872 return ret;
1873
1874 reg_val &= field->mask;
1875 reg_val >>= field->shift;
1876 *val = reg_val;
1877
1878 return ret;
1879}
1880EXPORT_SYMBOL_GPL(regmap_fields_read);
1881
b83a313b
MB
1882/**
1883 * regmap_bulk_read(): Read multiple registers from the device
1884 *
1885 * @map: Register map to write to
1886 * @reg: First register to be read from
1887 * @val: Pointer to store read value, in native register size for device
1888 * @val_count: Number of registers to read
1889 *
1890 * A value of zero will be returned on success, a negative errno will
1891 * be returned in error cases.
1892 */
1893int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1894 size_t val_count)
1895{
1896 int ret, i;
1897 size_t val_bytes = map->format.val_bytes;
82cd9965 1898 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 1899
d2a5884a
AS
1900 if (!map->bus)
1901 return -EINVAL;
8a819ff8 1902 if (!map->format.parse_inplace)
b83a313b 1903 return -EINVAL;
f01ee60f
SW
1904 if (reg % map->reg_stride)
1905 return -EINVAL;
b83a313b 1906
de2d808f 1907 if (vol || map->cache_type == REGCACHE_NONE) {
2e33caf1
AJ
1908 /*
1909 * Some devices does not support bulk read, for
1910 * them we have a series of single read operations.
1911 */
1912 if (map->use_single_rw) {
1913 for (i = 0; i < val_count; i++) {
1914 ret = regmap_raw_read(map,
1915 reg + (i * map->reg_stride),
1916 val + (i * val_bytes),
1917 val_bytes);
1918 if (ret != 0)
1919 return ret;
1920 }
1921 } else {
1922 ret = regmap_raw_read(map, reg, val,
1923 val_bytes * val_count);
1924 if (ret != 0)
1925 return ret;
1926 }
de2d808f
MB
1927
1928 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1929 map->format.parse_inplace(val + i);
de2d808f
MB
1930 } else {
1931 for (i = 0; i < val_count; i++) {
6560ffd1 1932 unsigned int ival;
f01ee60f 1933 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 1934 &ival);
de2d808f
MB
1935 if (ret != 0)
1936 return ret;
6560ffd1 1937 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
1938 }
1939 }
b83a313b
MB
1940
1941 return 0;
1942}
1943EXPORT_SYMBOL_GPL(regmap_bulk_read);
1944
018690d3
MB
1945static int _regmap_update_bits(struct regmap *map, unsigned int reg,
1946 unsigned int mask, unsigned int val,
1947 bool *change)
b83a313b
MB
1948{
1949 int ret;
d91e8db2 1950 unsigned int tmp, orig;
b83a313b 1951
d91e8db2 1952 ret = _regmap_read(map, reg, &orig);
b83a313b 1953 if (ret != 0)
fc3ebd78 1954 return ret;
b83a313b 1955
d91e8db2 1956 tmp = orig & ~mask;
b83a313b
MB
1957 tmp |= val & mask;
1958
018690d3 1959 if (tmp != orig) {
d91e8db2 1960 ret = _regmap_write(map, reg, tmp);
018690d3
MB
1961 *change = true;
1962 } else {
1963 *change = false;
1964 }
b83a313b 1965
b83a313b
MB
1966 return ret;
1967}
018690d3
MB
1968
1969/**
1970 * regmap_update_bits: Perform a read/modify/write cycle on the register map
1971 *
1972 * @map: Register map to update
1973 * @reg: Register to update
1974 * @mask: Bitmask to change
1975 * @val: New value for bitmask
1976 *
1977 * Returns zero for success, a negative number on error.
1978 */
1979int regmap_update_bits(struct regmap *map, unsigned int reg,
1980 unsigned int mask, unsigned int val)
1981{
1982 bool change;
fc3ebd78
KG
1983 int ret;
1984
0d4529c5 1985 map->lock(map->lock_arg);
fc3ebd78 1986 ret = _regmap_update_bits(map, reg, mask, val, &change);
0d4529c5 1987 map->unlock(map->lock_arg);
fc3ebd78
KG
1988
1989 return ret;
018690d3 1990}
b83a313b 1991EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 1992
915f441b
MB
1993/**
1994 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
1995 * map asynchronously
1996 *
1997 * @map: Register map to update
1998 * @reg: Register to update
1999 * @mask: Bitmask to change
2000 * @val: New value for bitmask
2001 *
2002 * With most buses the read must be done synchronously so this is most
2003 * useful for devices with a cache which do not need to interact with
2004 * the hardware to determine the current register value.
2005 *
2006 * Returns zero for success, a negative number on error.
2007 */
2008int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2009 unsigned int mask, unsigned int val)
2010{
2011 bool change;
2012 int ret;
2013
2014 map->lock(map->lock_arg);
2015
2016 map->async = true;
2017
2018 ret = _regmap_update_bits(map, reg, mask, val, &change);
2019
2020 map->async = false;
2021
2022 map->unlock(map->lock_arg);
2023
2024 return ret;
2025}
2026EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2027
018690d3
MB
2028/**
2029 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2030 * register map and report if updated
2031 *
2032 * @map: Register map to update
2033 * @reg: Register to update
2034 * @mask: Bitmask to change
2035 * @val: New value for bitmask
2036 * @change: Boolean indicating if a write was done
2037 *
2038 * Returns zero for success, a negative number on error.
2039 */
2040int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2041 unsigned int mask, unsigned int val,
2042 bool *change)
2043{
fc3ebd78
KG
2044 int ret;
2045
0d4529c5 2046 map->lock(map->lock_arg);
fc3ebd78 2047 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2048 map->unlock(map->lock_arg);
fc3ebd78 2049 return ret;
018690d3
MB
2050}
2051EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2052
915f441b
MB
2053/**
2054 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2055 * register map asynchronously and report if
2056 * updated
2057 *
2058 * @map: Register map to update
2059 * @reg: Register to update
2060 * @mask: Bitmask to change
2061 * @val: New value for bitmask
2062 * @change: Boolean indicating if a write was done
2063 *
2064 * With most buses the read must be done synchronously so this is most
2065 * useful for devices with a cache which do not need to interact with
2066 * the hardware to determine the current register value.
2067 *
2068 * Returns zero for success, a negative number on error.
2069 */
2070int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2071 unsigned int mask, unsigned int val,
2072 bool *change)
2073{
2074 int ret;
2075
2076 map->lock(map->lock_arg);
2077
2078 map->async = true;
2079
2080 ret = _regmap_update_bits(map, reg, mask, val, change);
2081
2082 map->async = false;
2083
2084 map->unlock(map->lock_arg);
2085
2086 return ret;
2087}
2088EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2089
0d509f2b
MB
2090void regmap_async_complete_cb(struct regmap_async *async, int ret)
2091{
2092 struct regmap *map = async->map;
2093 bool wake;
2094
fe7d4ccd
MB
2095 trace_regmap_async_io_complete(map->dev);
2096
0d509f2b 2097 spin_lock(&map->async_lock);
7e09a979 2098 list_move(&async->list, &map->async_free);
0d509f2b
MB
2099 wake = list_empty(&map->async_list);
2100
2101 if (ret != 0)
2102 map->async_ret = ret;
2103
2104 spin_unlock(&map->async_lock);
2105
0d509f2b
MB
2106 if (wake)
2107 wake_up(&map->async_waitq);
2108}
f804fb56 2109EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2110
2111static int regmap_async_is_done(struct regmap *map)
2112{
2113 unsigned long flags;
2114 int ret;
2115
2116 spin_lock_irqsave(&map->async_lock, flags);
2117 ret = list_empty(&map->async_list);
2118 spin_unlock_irqrestore(&map->async_lock, flags);
2119
2120 return ret;
2121}
2122
2123/**
2124 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2125 *
2126 * @map: Map to operate on.
2127 *
2128 * Blocks until any pending asynchronous I/O has completed. Returns
2129 * an error code for any failed I/O operations.
2130 */
2131int regmap_async_complete(struct regmap *map)
2132{
2133 unsigned long flags;
2134 int ret;
2135
2136 /* Nothing to do with no async support */
f2e055e7 2137 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
2138 return 0;
2139
fe7d4ccd
MB
2140 trace_regmap_async_complete_start(map->dev);
2141
0d509f2b
MB
2142 wait_event(map->async_waitq, regmap_async_is_done(map));
2143
2144 spin_lock_irqsave(&map->async_lock, flags);
2145 ret = map->async_ret;
2146 map->async_ret = 0;
2147 spin_unlock_irqrestore(&map->async_lock, flags);
2148
fe7d4ccd
MB
2149 trace_regmap_async_complete_done(map->dev);
2150
0d509f2b
MB
2151 return ret;
2152}
f88948ef 2153EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2154
22f0d90a
MB
2155/**
2156 * regmap_register_patch: Register and apply register updates to be applied
2157 * on device initialistion
2158 *
2159 * @map: Register map to apply updates to.
2160 * @regs: Values to update.
2161 * @num_regs: Number of entries in regs.
2162 *
2163 * Register a set of register updates to be applied to the device
2164 * whenever the device registers are synchronised with the cache and
2165 * apply them immediately. Typically this is used to apply
2166 * corrections to be applied to the device defaults on startup, such
2167 * as the updates some vendors provide to undocumented registers.
2168 */
2169int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2170 int num_regs)
2171{
aab13ebc 2172 struct reg_default *p;
22f0d90a
MB
2173 int i, ret;
2174 bool bypass;
2175
0d4529c5 2176 map->lock(map->lock_arg);
22f0d90a
MB
2177
2178 bypass = map->cache_bypass;
2179
2180 map->cache_bypass = true;
1a25f261 2181 map->async = true;
22f0d90a
MB
2182
2183 /* Write out first; it's useful to apply even if we fail later. */
2184 for (i = 0; i < num_regs; i++) {
2185 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2186 if (ret != 0) {
2187 dev_err(map->dev, "Failed to write %x = %x: %d\n",
2188 regs[i].reg, regs[i].def, ret);
2189 goto out;
2190 }
2191 }
2192
aab13ebc
MB
2193 p = krealloc(map->patch,
2194 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2195 GFP_KERNEL);
2196 if (p) {
2197 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2198 map->patch = p;
2199 map->patch_regs += num_regs;
22f0d90a
MB
2200 } else {
2201 ret = -ENOMEM;
2202 }
2203
2204out:
1a25f261 2205 map->async = false;
22f0d90a
MB
2206 map->cache_bypass = bypass;
2207
0d4529c5 2208 map->unlock(map->lock_arg);
22f0d90a 2209
1a25f261
MB
2210 regmap_async_complete(map);
2211
22f0d90a
MB
2212 return ret;
2213}
2214EXPORT_SYMBOL_GPL(regmap_register_patch);
2215
eae4b51b 2216/*
a6539c32
MB
2217 * regmap_get_val_bytes(): Report the size of a register value
2218 *
2219 * Report the size of a register value, mainly intended to for use by
2220 * generic infrastructure built on top of regmap.
2221 */
2222int regmap_get_val_bytes(struct regmap *map)
2223{
2224 if (map->format.format_write)
2225 return -EINVAL;
2226
2227 return map->format.val_bytes;
2228}
2229EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2230
31244e39
MB
2231static int __init regmap_initcall(void)
2232{
2233 regmap_debugfs_initcall();
2234
2235 return 0;
2236}
2237postcore_initcall(regmap_initcall);
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