regmap-i2c: Add smbus i2c block support
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
d647c199 18#include <linux/of.h>
6863ca62 19#include <linux/rbtree.h>
30b2a553 20#include <linux/sched.h>
b83a313b 21
fb2736bb 22#define CREATE_TRACE_POINTS
f58078da 23#include "trace.h"
fb2736bb 24
93de9124 25#include "internal.h"
b83a313b 26
1044c180
MB
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35static int _regmap_update_bits(struct regmap *map, unsigned int reg,
36 unsigned int mask, unsigned int val,
37 bool *change);
38
3ac17037
BB
39static int _regmap_bus_reg_read(void *context, unsigned int reg,
40 unsigned int *val);
ad278406
AS
41static int _regmap_bus_read(void *context, unsigned int reg,
42 unsigned int *val);
07c320dc
AS
43static int _regmap_bus_formatted_write(void *context, unsigned int reg,
44 unsigned int val);
3ac17037
BB
45static int _regmap_bus_reg_write(void *context, unsigned int reg,
46 unsigned int val);
07c320dc
AS
47static int _regmap_bus_raw_write(void *context, unsigned int reg,
48 unsigned int val);
ad278406 49
76aad392
DC
50bool regmap_reg_in_ranges(unsigned int reg,
51 const struct regmap_range *ranges,
52 unsigned int nranges)
53{
54 const struct regmap_range *r;
55 int i;
56
57 for (i = 0, r = ranges; i < nranges; i++, r++)
58 if (regmap_reg_in_range(reg, r))
59 return true;
60 return false;
61}
62EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
63
154881e5
MB
64bool regmap_check_range_table(struct regmap *map, unsigned int reg,
65 const struct regmap_access_table *table)
76aad392
DC
66{
67 /* Check "no ranges" first */
68 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
69 return false;
70
71 /* In case zero "yes ranges" are supplied, any reg is OK */
72 if (!table->n_yes_ranges)
73 return true;
74
75 return regmap_reg_in_ranges(reg, table->yes_ranges,
76 table->n_yes_ranges);
77}
154881e5 78EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 79
8de2f081
MB
80bool regmap_writeable(struct regmap *map, unsigned int reg)
81{
82 if (map->max_register && reg > map->max_register)
83 return false;
84
85 if (map->writeable_reg)
86 return map->writeable_reg(map->dev, reg);
87
76aad392 88 if (map->wr_table)
154881e5 89 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 90
8de2f081
MB
91 return true;
92}
93
94bool regmap_readable(struct regmap *map, unsigned int reg)
95{
04dc91ce
LPC
96 if (!map->reg_read)
97 return false;
98
8de2f081
MB
99 if (map->max_register && reg > map->max_register)
100 return false;
101
4191f197
WS
102 if (map->format.format_write)
103 return false;
104
8de2f081
MB
105 if (map->readable_reg)
106 return map->readable_reg(map->dev, reg);
107
76aad392 108 if (map->rd_table)
154881e5 109 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 110
8de2f081
MB
111 return true;
112}
113
114bool regmap_volatile(struct regmap *map, unsigned int reg)
115{
5844a8b9 116 if (!map->format.format_write && !regmap_readable(map, reg))
8de2f081
MB
117 return false;
118
119 if (map->volatile_reg)
120 return map->volatile_reg(map->dev, reg);
121
76aad392 122 if (map->volatile_table)
154881e5 123 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 124
b92be6fe
MB
125 if (map->cache_ops)
126 return false;
127 else
128 return true;
8de2f081
MB
129}
130
131bool regmap_precious(struct regmap *map, unsigned int reg)
132{
4191f197 133 if (!regmap_readable(map, reg))
8de2f081
MB
134 return false;
135
136 if (map->precious_reg)
137 return map->precious_reg(map->dev, reg);
138
76aad392 139 if (map->precious_table)
154881e5 140 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 141
8de2f081
MB
142 return false;
143}
144
82cd9965 145static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 146 size_t num)
82cd9965
LPC
147{
148 unsigned int i;
149
150 for (i = 0; i < num; i++)
151 if (!regmap_volatile(map, reg + i))
152 return false;
153
154 return true;
155}
156
9aa50750
WS
157static void regmap_format_2_6_write(struct regmap *map,
158 unsigned int reg, unsigned int val)
159{
160 u8 *out = map->work_buf;
161
162 *out = (reg << 6) | val;
163}
164
b83a313b
MB
165static void regmap_format_4_12_write(struct regmap *map,
166 unsigned int reg, unsigned int val)
167{
168 __be16 *out = map->work_buf;
169 *out = cpu_to_be16((reg << 12) | val);
170}
171
172static void regmap_format_7_9_write(struct regmap *map,
173 unsigned int reg, unsigned int val)
174{
175 __be16 *out = map->work_buf;
176 *out = cpu_to_be16((reg << 9) | val);
177}
178
7e5ec63e
LPC
179static void regmap_format_10_14_write(struct regmap *map,
180 unsigned int reg, unsigned int val)
181{
182 u8 *out = map->work_buf;
183
184 out[2] = val;
185 out[1] = (val >> 8) | (reg << 6);
186 out[0] = reg >> 2;
187}
188
d939fb9a 189static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
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190{
191 u8 *b = buf;
192
d939fb9a 193 b[0] = val << shift;
b83a313b
MB
194}
195
141eba2e 196static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
197{
198 __be16 *b = buf;
199
d939fb9a 200 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
201}
202
4aa8c069
XL
203static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
204{
205 __le16 *b = buf;
206
207 b[0] = cpu_to_le16(val << shift);
208}
209
141eba2e
SW
210static void regmap_format_16_native(void *buf, unsigned int val,
211 unsigned int shift)
212{
213 *(u16 *)buf = val << shift;
214}
215
d939fb9a 216static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
217{
218 u8 *b = buf;
219
d939fb9a
MR
220 val <<= shift;
221
ea279fc5
MR
222 b[0] = val >> 16;
223 b[1] = val >> 8;
224 b[2] = val;
225}
226
141eba2e 227static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
228{
229 __be32 *b = buf;
230
d939fb9a 231 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
232}
233
4aa8c069
XL
234static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
235{
236 __le32 *b = buf;
237
238 b[0] = cpu_to_le32(val << shift);
239}
240
141eba2e
SW
241static void regmap_format_32_native(void *buf, unsigned int val,
242 unsigned int shift)
243{
244 *(u32 *)buf = val << shift;
245}
246
8a819ff8 247static void regmap_parse_inplace_noop(void *buf)
b83a313b 248{
8a819ff8
MB
249}
250
251static unsigned int regmap_parse_8(const void *buf)
252{
253 const u8 *b = buf;
b83a313b
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254
255 return b[0];
256}
257
8a819ff8
MB
258static unsigned int regmap_parse_16_be(const void *buf)
259{
260 const __be16 *b = buf;
261
262 return be16_to_cpu(b[0]);
263}
264
4aa8c069
XL
265static unsigned int regmap_parse_16_le(const void *buf)
266{
267 const __le16 *b = buf;
268
269 return le16_to_cpu(b[0]);
270}
271
8a819ff8 272static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
273{
274 __be16 *b = buf;
275
276 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
277}
278
4aa8c069
XL
279static void regmap_parse_16_le_inplace(void *buf)
280{
281 __le16 *b = buf;
282
283 b[0] = le16_to_cpu(b[0]);
284}
285
8a819ff8 286static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
287{
288 return *(u16 *)buf;
289}
290
8a819ff8 291static unsigned int regmap_parse_24(const void *buf)
ea279fc5 292{
8a819ff8 293 const u8 *b = buf;
ea279fc5
MR
294 unsigned int ret = b[2];
295 ret |= ((unsigned int)b[1]) << 8;
296 ret |= ((unsigned int)b[0]) << 16;
297
298 return ret;
299}
300
8a819ff8
MB
301static unsigned int regmap_parse_32_be(const void *buf)
302{
303 const __be32 *b = buf;
304
305 return be32_to_cpu(b[0]);
306}
307
4aa8c069
XL
308static unsigned int regmap_parse_32_le(const void *buf)
309{
310 const __le32 *b = buf;
311
312 return le32_to_cpu(b[0]);
313}
314
8a819ff8 315static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
316{
317 __be32 *b = buf;
318
319 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
320}
321
4aa8c069
XL
322static void regmap_parse_32_le_inplace(void *buf)
323{
324 __le32 *b = buf;
325
326 b[0] = le32_to_cpu(b[0]);
327}
328
8a819ff8 329static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
330{
331 return *(u32 *)buf;
332}
333
0d4529c5 334static void regmap_lock_mutex(void *__map)
bacdbe07 335{
0d4529c5 336 struct regmap *map = __map;
bacdbe07
SW
337 mutex_lock(&map->mutex);
338}
339
0d4529c5 340static void regmap_unlock_mutex(void *__map)
bacdbe07 341{
0d4529c5 342 struct regmap *map = __map;
bacdbe07
SW
343 mutex_unlock(&map->mutex);
344}
345
0d4529c5 346static void regmap_lock_spinlock(void *__map)
b4519c71 347__acquires(&map->spinlock)
bacdbe07 348{
0d4529c5 349 struct regmap *map = __map;
92ab1aab
LPC
350 unsigned long flags;
351
352 spin_lock_irqsave(&map->spinlock, flags);
353 map->spinlock_flags = flags;
bacdbe07
SW
354}
355
0d4529c5 356static void regmap_unlock_spinlock(void *__map)
b4519c71 357__releases(&map->spinlock)
bacdbe07 358{
0d4529c5 359 struct regmap *map = __map;
92ab1aab 360 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
361}
362
72b39f6f
MB
363static void dev_get_regmap_release(struct device *dev, void *res)
364{
365 /*
366 * We don't actually have anything to do here; the goal here
367 * is not to manage the regmap but to provide a simple way to
368 * get the regmap back given a struct device.
369 */
370}
371
6863ca62
KG
372static bool _regmap_range_add(struct regmap *map,
373 struct regmap_range_node *data)
374{
375 struct rb_root *root = &map->range_tree;
376 struct rb_node **new = &(root->rb_node), *parent = NULL;
377
378 while (*new) {
379 struct regmap_range_node *this =
380 container_of(*new, struct regmap_range_node, node);
381
382 parent = *new;
383 if (data->range_max < this->range_min)
384 new = &((*new)->rb_left);
385 else if (data->range_min > this->range_max)
386 new = &((*new)->rb_right);
387 else
388 return false;
389 }
390
391 rb_link_node(&data->node, parent, new);
392 rb_insert_color(&data->node, root);
393
394 return true;
395}
396
397static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
398 unsigned int reg)
399{
400 struct rb_node *node = map->range_tree.rb_node;
401
402 while (node) {
403 struct regmap_range_node *this =
404 container_of(node, struct regmap_range_node, node);
405
406 if (reg < this->range_min)
407 node = node->rb_left;
408 else if (reg > this->range_max)
409 node = node->rb_right;
410 else
411 return this;
412 }
413
414 return NULL;
415}
416
417static void regmap_range_exit(struct regmap *map)
418{
419 struct rb_node *next;
420 struct regmap_range_node *range_node;
421
422 next = rb_first(&map->range_tree);
423 while (next) {
424 range_node = rb_entry(next, struct regmap_range_node, node);
425 next = rb_next(&range_node->node);
426 rb_erase(&range_node->node, &map->range_tree);
427 kfree(range_node);
428 }
429
430 kfree(map->selector_work_buf);
431}
432
6cfec04b
MS
433int regmap_attach_dev(struct device *dev, struct regmap *map,
434 const struct regmap_config *config)
435{
436 struct regmap **m;
437
438 map->dev = dev;
439
440 regmap_debugfs_init(map, config->name);
441
442 /* Add a devres resource for dev_get_regmap() */
443 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
444 if (!m) {
445 regmap_debugfs_exit(map);
446 return -ENOMEM;
447 }
448 *m = map;
449 devres_add(dev, m);
450
451 return 0;
452}
453EXPORT_SYMBOL_GPL(regmap_attach_dev);
454
cf673fbc
GU
455static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
456 const struct regmap_config *config)
457{
458 enum regmap_endian endian;
459
460 /* Retrieve the endianness specification from the regmap config */
461 endian = config->reg_format_endian;
462
463 /* If the regmap config specified a non-default value, use that */
464 if (endian != REGMAP_ENDIAN_DEFAULT)
465 return endian;
466
467 /* Retrieve the endianness specification from the bus config */
468 if (bus && bus->reg_format_endian_default)
469 endian = bus->reg_format_endian_default;
d647c199 470
cf673fbc
GU
471 /* If the bus specified a non-default value, use that */
472 if (endian != REGMAP_ENDIAN_DEFAULT)
473 return endian;
474
475 /* Use this if no other value was found */
476 return REGMAP_ENDIAN_BIG;
477}
478
3c174d29
GR
479enum regmap_endian regmap_get_val_endian(struct device *dev,
480 const struct regmap_bus *bus,
481 const struct regmap_config *config)
d647c199 482{
6e64b6cc 483 struct device_node *np;
cf673fbc 484 enum regmap_endian endian;
d647c199 485
45e1a279 486 /* Retrieve the endianness specification from the regmap config */
cf673fbc 487 endian = config->val_format_endian;
d647c199 488
45e1a279 489 /* If the regmap config specified a non-default value, use that */
cf673fbc
GU
490 if (endian != REGMAP_ENDIAN_DEFAULT)
491 return endian;
d647c199 492
6e64b6cc
PD
493 /* If the dev and dev->of_node exist try to get endianness from DT */
494 if (dev && dev->of_node) {
495 np = dev->of_node;
d647c199 496
6e64b6cc
PD
497 /* Parse the device's DT node for an endianness specification */
498 if (of_property_read_bool(np, "big-endian"))
499 endian = REGMAP_ENDIAN_BIG;
500 else if (of_property_read_bool(np, "little-endian"))
501 endian = REGMAP_ENDIAN_LITTLE;
502
503 /* If the endianness was specified in DT, use that */
504 if (endian != REGMAP_ENDIAN_DEFAULT)
505 return endian;
506 }
45e1a279
SW
507
508 /* Retrieve the endianness specification from the bus config */
cf673fbc
GU
509 if (bus && bus->val_format_endian_default)
510 endian = bus->val_format_endian_default;
d647c199 511
45e1a279 512 /* If the bus specified a non-default value, use that */
cf673fbc
GU
513 if (endian != REGMAP_ENDIAN_DEFAULT)
514 return endian;
45e1a279
SW
515
516 /* Use this if no other value was found */
cf673fbc 517 return REGMAP_ENDIAN_BIG;
d647c199 518}
3c174d29 519EXPORT_SYMBOL_GPL(regmap_get_val_endian);
d647c199 520
b83a313b
MB
521/**
522 * regmap_init(): Initialise register map
523 *
524 * @dev: Device that will be interacted with
525 * @bus: Bus-specific callbacks to use with device
0135bbcc 526 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
527 * @config: Configuration for register map
528 *
529 * The return value will be an ERR_PTR() on error or a valid pointer to
530 * a struct regmap. This function should generally not be called
531 * directly, it should be called by bus-specific init functions.
532 */
533struct regmap *regmap_init(struct device *dev,
534 const struct regmap_bus *bus,
0135bbcc 535 void *bus_context,
b83a313b
MB
536 const struct regmap_config *config)
537{
6cfec04b 538 struct regmap *map;
b83a313b 539 int ret = -EINVAL;
141eba2e 540 enum regmap_endian reg_endian, val_endian;
6863ca62 541 int i, j;
b83a313b 542
d2a5884a 543 if (!config)
abbb18fb 544 goto err;
b83a313b
MB
545
546 map = kzalloc(sizeof(*map), GFP_KERNEL);
547 if (map == NULL) {
548 ret = -ENOMEM;
549 goto err;
550 }
551
0d4529c5
DC
552 if (config->lock && config->unlock) {
553 map->lock = config->lock;
554 map->unlock = config->unlock;
555 map->lock_arg = config->lock_arg;
bacdbe07 556 } else {
d2a5884a
AS
557 if ((bus && bus->fast_io) ||
558 config->fast_io) {
0d4529c5
DC
559 spin_lock_init(&map->spinlock);
560 map->lock = regmap_lock_spinlock;
561 map->unlock = regmap_unlock_spinlock;
562 } else {
563 mutex_init(&map->mutex);
564 map->lock = regmap_lock_mutex;
565 map->unlock = regmap_unlock_mutex;
566 }
567 map->lock_arg = map;
bacdbe07 568 }
c212accc 569 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 570 map->format.pad_bytes = config->pad_bits / 8;
c212accc 571 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
572 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
573 config->val_bits + config->pad_bits, 8);
d939fb9a 574 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
575 if (config->reg_stride)
576 map->reg_stride = config->reg_stride;
577 else
578 map->reg_stride = 1;
67921a1a
MP
579 map->use_single_read = config->use_single_rw || !bus || !bus->read;
580 map->use_single_write = config->use_single_rw || !bus || !bus->write;
9c9f7f67 581 map->can_multi_write = config->can_multi_write && bus && bus->write;
adaac459
MP
582 map->max_raw_read = bus->max_raw_read;
583 map->max_raw_write = bus->max_raw_write;
b83a313b
MB
584 map->dev = dev;
585 map->bus = bus;
0135bbcc 586 map->bus_context = bus_context;
2e2ae66d 587 map->max_register = config->max_register;
76aad392
DC
588 map->wr_table = config->wr_table;
589 map->rd_table = config->rd_table;
590 map->volatile_table = config->volatile_table;
591 map->precious_table = config->precious_table;
2e2ae66d
MB
592 map->writeable_reg = config->writeable_reg;
593 map->readable_reg = config->readable_reg;
594 map->volatile_reg = config->volatile_reg;
2efe1642 595 map->precious_reg = config->precious_reg;
5d1729e7 596 map->cache_type = config->cache_type;
72b39f6f 597 map->name = config->name;
b83a313b 598
0d509f2b
MB
599 spin_lock_init(&map->async_lock);
600 INIT_LIST_HEAD(&map->async_list);
7e09a979 601 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
602 init_waitqueue_head(&map->async_waitq);
603
6f306441
LPC
604 if (config->read_flag_mask || config->write_flag_mask) {
605 map->read_flag_mask = config->read_flag_mask;
606 map->write_flag_mask = config->write_flag_mask;
d2a5884a 607 } else if (bus) {
6f306441
LPC
608 map->read_flag_mask = bus->read_flag_mask;
609 }
610
d2a5884a
AS
611 if (!bus) {
612 map->reg_read = config->reg_read;
613 map->reg_write = config->reg_write;
614
3ac17037
BB
615 map->defer_caching = false;
616 goto skip_format_initialization;
617 } else if (!bus->read || !bus->write) {
618 map->reg_read = _regmap_bus_reg_read;
619 map->reg_write = _regmap_bus_reg_write;
620
d2a5884a
AS
621 map->defer_caching = false;
622 goto skip_format_initialization;
623 } else {
624 map->reg_read = _regmap_bus_read;
625 }
ad278406 626
cf673fbc
GU
627 reg_endian = regmap_get_reg_endian(bus, config);
628 val_endian = regmap_get_val_endian(dev, bus, config);
141eba2e 629
d939fb9a 630 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
631 case 2:
632 switch (config->val_bits) {
633 case 6:
634 map->format.format_write = regmap_format_2_6_write;
635 break;
636 default:
637 goto err_map;
638 }
639 break;
640
b83a313b
MB
641 case 4:
642 switch (config->val_bits) {
643 case 12:
644 map->format.format_write = regmap_format_4_12_write;
645 break;
646 default:
647 goto err_map;
648 }
649 break;
650
651 case 7:
652 switch (config->val_bits) {
653 case 9:
654 map->format.format_write = regmap_format_7_9_write;
655 break;
656 default:
657 goto err_map;
658 }
659 break;
660
7e5ec63e
LPC
661 case 10:
662 switch (config->val_bits) {
663 case 14:
664 map->format.format_write = regmap_format_10_14_write;
665 break;
666 default:
667 goto err_map;
668 }
669 break;
670
b83a313b
MB
671 case 8:
672 map->format.format_reg = regmap_format_8;
673 break;
674
675 case 16:
141eba2e
SW
676 switch (reg_endian) {
677 case REGMAP_ENDIAN_BIG:
678 map->format.format_reg = regmap_format_16_be;
679 break;
680 case REGMAP_ENDIAN_NATIVE:
681 map->format.format_reg = regmap_format_16_native;
682 break;
683 default:
684 goto err_map;
685 }
b83a313b
MB
686 break;
687
237019e7
LPC
688 case 24:
689 if (reg_endian != REGMAP_ENDIAN_BIG)
690 goto err_map;
691 map->format.format_reg = regmap_format_24;
692 break;
693
7d5e525b 694 case 32:
141eba2e
SW
695 switch (reg_endian) {
696 case REGMAP_ENDIAN_BIG:
697 map->format.format_reg = regmap_format_32_be;
698 break;
699 case REGMAP_ENDIAN_NATIVE:
700 map->format.format_reg = regmap_format_32_native;
701 break;
702 default:
703 goto err_map;
704 }
7d5e525b
MB
705 break;
706
b83a313b
MB
707 default:
708 goto err_map;
709 }
710
8a819ff8
MB
711 if (val_endian == REGMAP_ENDIAN_NATIVE)
712 map->format.parse_inplace = regmap_parse_inplace_noop;
713
b83a313b
MB
714 switch (config->val_bits) {
715 case 8:
716 map->format.format_val = regmap_format_8;
717 map->format.parse_val = regmap_parse_8;
8a819ff8 718 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
719 break;
720 case 16:
141eba2e
SW
721 switch (val_endian) {
722 case REGMAP_ENDIAN_BIG:
723 map->format.format_val = regmap_format_16_be;
724 map->format.parse_val = regmap_parse_16_be;
8a819ff8 725 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 726 break;
4aa8c069
XL
727 case REGMAP_ENDIAN_LITTLE:
728 map->format.format_val = regmap_format_16_le;
729 map->format.parse_val = regmap_parse_16_le;
730 map->format.parse_inplace = regmap_parse_16_le_inplace;
731 break;
141eba2e
SW
732 case REGMAP_ENDIAN_NATIVE:
733 map->format.format_val = regmap_format_16_native;
734 map->format.parse_val = regmap_parse_16_native;
735 break;
736 default:
737 goto err_map;
738 }
b83a313b 739 break;
ea279fc5 740 case 24:
141eba2e
SW
741 if (val_endian != REGMAP_ENDIAN_BIG)
742 goto err_map;
ea279fc5
MR
743 map->format.format_val = regmap_format_24;
744 map->format.parse_val = regmap_parse_24;
745 break;
7d5e525b 746 case 32:
141eba2e
SW
747 switch (val_endian) {
748 case REGMAP_ENDIAN_BIG:
749 map->format.format_val = regmap_format_32_be;
750 map->format.parse_val = regmap_parse_32_be;
8a819ff8 751 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 752 break;
4aa8c069
XL
753 case REGMAP_ENDIAN_LITTLE:
754 map->format.format_val = regmap_format_32_le;
755 map->format.parse_val = regmap_parse_32_le;
756 map->format.parse_inplace = regmap_parse_32_le_inplace;
757 break;
141eba2e
SW
758 case REGMAP_ENDIAN_NATIVE:
759 map->format.format_val = regmap_format_32_native;
760 map->format.parse_val = regmap_parse_32_native;
761 break;
762 default:
763 goto err_map;
764 }
7d5e525b 765 break;
b83a313b
MB
766 }
767
141eba2e
SW
768 if (map->format.format_write) {
769 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
770 (val_endian != REGMAP_ENDIAN_BIG))
771 goto err_map;
67921a1a 772 map->use_single_write = true;
141eba2e 773 }
7a647614 774
b83a313b
MB
775 if (!map->format.format_write &&
776 !(map->format.format_reg && map->format.format_val))
777 goto err_map;
778
82159ba8 779 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
780 if (map->work_buf == NULL) {
781 ret = -ENOMEM;
5204f5e3 782 goto err_map;
b83a313b
MB
783 }
784
d2a5884a
AS
785 if (map->format.format_write) {
786 map->defer_caching = false;
07c320dc 787 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
788 } else if (map->format.format_val) {
789 map->defer_caching = true;
07c320dc 790 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
791 }
792
793skip_format_initialization:
07c320dc 794
6863ca62 795 map->range_tree = RB_ROOT;
e3549cd0 796 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
797 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
798 struct regmap_range_node *new;
799
800 /* Sanity check */
061adc06
MB
801 if (range_cfg->range_max < range_cfg->range_min) {
802 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
803 range_cfg->range_max, range_cfg->range_min);
6863ca62 804 goto err_range;
061adc06
MB
805 }
806
807 if (range_cfg->range_max > map->max_register) {
808 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
809 range_cfg->range_max, map->max_register);
810 goto err_range;
811 }
812
813 if (range_cfg->selector_reg > map->max_register) {
814 dev_err(map->dev,
815 "Invalid range %d: selector out of map\n", i);
816 goto err_range;
817 }
818
819 if (range_cfg->window_len == 0) {
820 dev_err(map->dev, "Invalid range %d: window_len 0\n",
821 i);
822 goto err_range;
823 }
6863ca62
KG
824
825 /* Make sure, that this register range has no selector
826 or data window within its boundary */
e3549cd0 827 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
828 unsigned sel_reg = config->ranges[j].selector_reg;
829 unsigned win_min = config->ranges[j].window_start;
830 unsigned win_max = win_min +
831 config->ranges[j].window_len - 1;
832
f161d220
PZ
833 /* Allow data window inside its own virtual range */
834 if (j == i)
835 continue;
836
6863ca62
KG
837 if (range_cfg->range_min <= sel_reg &&
838 sel_reg <= range_cfg->range_max) {
061adc06
MB
839 dev_err(map->dev,
840 "Range %d: selector for %d in window\n",
841 i, j);
6863ca62
KG
842 goto err_range;
843 }
844
845 if (!(win_max < range_cfg->range_min ||
846 win_min > range_cfg->range_max)) {
061adc06
MB
847 dev_err(map->dev,
848 "Range %d: window for %d in window\n",
849 i, j);
6863ca62
KG
850 goto err_range;
851 }
852 }
853
854 new = kzalloc(sizeof(*new), GFP_KERNEL);
855 if (new == NULL) {
856 ret = -ENOMEM;
857 goto err_range;
858 }
859
4b020b3f 860 new->map = map;
d058bb49 861 new->name = range_cfg->name;
6863ca62
KG
862 new->range_min = range_cfg->range_min;
863 new->range_max = range_cfg->range_max;
864 new->selector_reg = range_cfg->selector_reg;
865 new->selector_mask = range_cfg->selector_mask;
866 new->selector_shift = range_cfg->selector_shift;
867 new->window_start = range_cfg->window_start;
868 new->window_len = range_cfg->window_len;
869
53e87f88 870 if (!_regmap_range_add(map, new)) {
061adc06 871 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
872 kfree(new);
873 goto err_range;
874 }
875
876 if (map->selector_work_buf == NULL) {
877 map->selector_work_buf =
878 kzalloc(map->format.buf_size, GFP_KERNEL);
879 if (map->selector_work_buf == NULL) {
880 ret = -ENOMEM;
881 goto err_range;
882 }
883 }
884 }
052d2cd1 885
e5e3b8ab 886 ret = regcache_init(map, config);
0ff3e62f 887 if (ret != 0)
6863ca62
KG
888 goto err_range;
889
a7a037c8 890 if (dev) {
6cfec04b
MS
891 ret = regmap_attach_dev(dev, map, config);
892 if (ret != 0)
893 goto err_regcache;
a7a037c8 894 }
72b39f6f 895
b83a313b
MB
896 return map;
897
6cfec04b 898err_regcache:
72b39f6f 899 regcache_exit(map);
6863ca62
KG
900err_range:
901 regmap_range_exit(map);
58072cbf 902 kfree(map->work_buf);
b83a313b
MB
903err_map:
904 kfree(map);
905err:
906 return ERR_PTR(ret);
907}
908EXPORT_SYMBOL_GPL(regmap_init);
909
c0eb4676
MB
910static void devm_regmap_release(struct device *dev, void *res)
911{
912 regmap_exit(*(struct regmap **)res);
913}
914
915/**
916 * devm_regmap_init(): Initialise managed register map
917 *
918 * @dev: Device that will be interacted with
919 * @bus: Bus-specific callbacks to use with device
0135bbcc 920 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
921 * @config: Configuration for register map
922 *
923 * The return value will be an ERR_PTR() on error or a valid pointer
924 * to a struct regmap. This function should generally not be called
925 * directly, it should be called by bus-specific init functions. The
926 * map will be automatically freed by the device management code.
927 */
928struct regmap *devm_regmap_init(struct device *dev,
929 const struct regmap_bus *bus,
0135bbcc 930 void *bus_context,
c0eb4676
MB
931 const struct regmap_config *config)
932{
933 struct regmap **ptr, *regmap;
934
935 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
936 if (!ptr)
937 return ERR_PTR(-ENOMEM);
938
0135bbcc 939 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
940 if (!IS_ERR(regmap)) {
941 *ptr = regmap;
942 devres_add(dev, ptr);
943 } else {
944 devres_free(ptr);
945 }
946
947 return regmap;
948}
949EXPORT_SYMBOL_GPL(devm_regmap_init);
950
67252287
SK
951static void regmap_field_init(struct regmap_field *rm_field,
952 struct regmap *regmap, struct reg_field reg_field)
953{
67252287
SK
954 rm_field->regmap = regmap;
955 rm_field->reg = reg_field.reg;
956 rm_field->shift = reg_field.lsb;
921cc294 957 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
a0102375
KM
958 rm_field->id_size = reg_field.id_size;
959 rm_field->id_offset = reg_field.id_offset;
67252287
SK
960}
961
962/**
963 * devm_regmap_field_alloc(): Allocate and initialise a register field
964 * in a register map.
965 *
966 * @dev: Device that will be interacted with
967 * @regmap: regmap bank in which this register field is located.
968 * @reg_field: Register field with in the bank.
969 *
970 * The return value will be an ERR_PTR() on error or a valid pointer
971 * to a struct regmap_field. The regmap_field will be automatically freed
972 * by the device management code.
973 */
974struct regmap_field *devm_regmap_field_alloc(struct device *dev,
975 struct regmap *regmap, struct reg_field reg_field)
976{
977 struct regmap_field *rm_field = devm_kzalloc(dev,
978 sizeof(*rm_field), GFP_KERNEL);
979 if (!rm_field)
980 return ERR_PTR(-ENOMEM);
981
982 regmap_field_init(rm_field, regmap, reg_field);
983
984 return rm_field;
985
986}
987EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
988
989/**
990 * devm_regmap_field_free(): Free register field allocated using
991 * devm_regmap_field_alloc. Usally drivers need not call this function,
992 * as the memory allocated via devm will be freed as per device-driver
993 * life-cyle.
994 *
995 * @dev: Device that will be interacted with
996 * @field: regmap field which should be freed.
997 */
998void devm_regmap_field_free(struct device *dev,
999 struct regmap_field *field)
1000{
1001 devm_kfree(dev, field);
1002}
1003EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1004
1005/**
1006 * regmap_field_alloc(): Allocate and initialise a register field
1007 * in a register map.
1008 *
1009 * @regmap: regmap bank in which this register field is located.
1010 * @reg_field: Register field with in the bank.
1011 *
1012 * The return value will be an ERR_PTR() on error or a valid pointer
1013 * to a struct regmap_field. The regmap_field should be freed by the
1014 * user once its finished working with it using regmap_field_free().
1015 */
1016struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1017 struct reg_field reg_field)
1018{
1019 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1020
1021 if (!rm_field)
1022 return ERR_PTR(-ENOMEM);
1023
1024 regmap_field_init(rm_field, regmap, reg_field);
1025
1026 return rm_field;
1027}
1028EXPORT_SYMBOL_GPL(regmap_field_alloc);
1029
1030/**
1031 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1032 *
1033 * @field: regmap field which should be freed.
1034 */
1035void regmap_field_free(struct regmap_field *field)
1036{
1037 kfree(field);
1038}
1039EXPORT_SYMBOL_GPL(regmap_field_free);
1040
bf315173
MB
1041/**
1042 * regmap_reinit_cache(): Reinitialise the current register cache
1043 *
1044 * @map: Register map to operate on.
1045 * @config: New configuration. Only the cache data will be used.
1046 *
1047 * Discard any existing register cache for the map and initialize a
1048 * new cache. This can be used to restore the cache to defaults or to
1049 * update the cache configuration to reflect runtime discovery of the
1050 * hardware.
4d879514
DP
1051 *
1052 * No explicit locking is done here, the user needs to ensure that
1053 * this function will not race with other calls to regmap.
bf315173
MB
1054 */
1055int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1056{
bf315173 1057 regcache_exit(map);
a24f64a6 1058 regmap_debugfs_exit(map);
bf315173
MB
1059
1060 map->max_register = config->max_register;
1061 map->writeable_reg = config->writeable_reg;
1062 map->readable_reg = config->readable_reg;
1063 map->volatile_reg = config->volatile_reg;
1064 map->precious_reg = config->precious_reg;
1065 map->cache_type = config->cache_type;
1066
d3c242e1 1067 regmap_debugfs_init(map, config->name);
a24f64a6 1068
421e8d2d
MB
1069 map->cache_bypass = false;
1070 map->cache_only = false;
1071
4d879514 1072 return regcache_init(map, config);
bf315173 1073}
752a6a5f 1074EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1075
b83a313b
MB
1076/**
1077 * regmap_exit(): Free a previously allocated register map
1078 */
1079void regmap_exit(struct regmap *map)
1080{
7e09a979
MB
1081 struct regmap_async *async;
1082
5d1729e7 1083 regcache_exit(map);
31244e39 1084 regmap_debugfs_exit(map);
6863ca62 1085 regmap_range_exit(map);
d2a5884a 1086 if (map->bus && map->bus->free_context)
0135bbcc 1087 map->bus->free_context(map->bus_context);
b83a313b 1088 kfree(map->work_buf);
7e09a979
MB
1089 while (!list_empty(&map->async_free)) {
1090 async = list_first_entry_or_null(&map->async_free,
1091 struct regmap_async,
1092 list);
1093 list_del(&async->list);
1094 kfree(async->work_buf);
1095 kfree(async);
1096 }
b83a313b
MB
1097 kfree(map);
1098}
1099EXPORT_SYMBOL_GPL(regmap_exit);
1100
72b39f6f
MB
1101static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1102{
1103 struct regmap **r = res;
1104 if (!r || !*r) {
1105 WARN_ON(!r || !*r);
1106 return 0;
1107 }
1108
1109 /* If the user didn't specify a name match any */
1110 if (data)
1111 return (*r)->name == data;
1112 else
1113 return 1;
1114}
1115
1116/**
1117 * dev_get_regmap(): Obtain the regmap (if any) for a device
1118 *
1119 * @dev: Device to retrieve the map for
1120 * @name: Optional name for the register map, usually NULL.
1121 *
1122 * Returns the regmap for the device if one is present, or NULL. If
1123 * name is specified then it must match the name specified when
1124 * registering the device, if it is NULL then the first regmap found
1125 * will be used. Devices with multiple register maps are very rare,
1126 * generic code should normally not need to specify a name.
1127 */
1128struct regmap *dev_get_regmap(struct device *dev, const char *name)
1129{
1130 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1131 dev_get_regmap_match, (void *)name);
1132
1133 if (!r)
1134 return NULL;
1135 return *r;
1136}
1137EXPORT_SYMBOL_GPL(dev_get_regmap);
1138
8d7d3972
TT
1139/**
1140 * regmap_get_device(): Obtain the device from a regmap
1141 *
1142 * @map: Register map to operate on.
1143 *
1144 * Returns the underlying device that the regmap has been created for.
1145 */
1146struct device *regmap_get_device(struct regmap *map)
1147{
1148 return map->dev;
1149}
fa2fbe4a 1150EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1151
6863ca62 1152static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1153 struct regmap_range_node *range,
6863ca62
KG
1154 unsigned int val_num)
1155{
6863ca62
KG
1156 void *orig_work_buf;
1157 unsigned int win_offset;
1158 unsigned int win_page;
1159 bool page_chg;
1160 int ret;
1161
98bc7dfd
MB
1162 win_offset = (*reg - range->range_min) % range->window_len;
1163 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1164
98bc7dfd
MB
1165 if (val_num > 1) {
1166 /* Bulk write shouldn't cross range boundary */
1167 if (*reg + val_num - 1 > range->range_max)
1168 return -EINVAL;
6863ca62 1169
98bc7dfd
MB
1170 /* ... or single page boundary */
1171 if (val_num > range->window_len - win_offset)
1172 return -EINVAL;
1173 }
6863ca62 1174
98bc7dfd
MB
1175 /* It is possible to have selector register inside data window.
1176 In that case, selector register is located on every page and
1177 it needs no page switching, when accessed alone. */
1178 if (val_num > 1 ||
1179 range->window_start + win_offset != range->selector_reg) {
1180 /* Use separate work_buf during page switching */
1181 orig_work_buf = map->work_buf;
1182 map->work_buf = map->selector_work_buf;
6863ca62 1183
98bc7dfd
MB
1184 ret = _regmap_update_bits(map, range->selector_reg,
1185 range->selector_mask,
1186 win_page << range->selector_shift,
1187 &page_chg);
632a5b01 1188
98bc7dfd 1189 map->work_buf = orig_work_buf;
6863ca62 1190
0ff3e62f 1191 if (ret != 0)
98bc7dfd 1192 return ret;
6863ca62
KG
1193 }
1194
98bc7dfd
MB
1195 *reg = range->window_start + win_offset;
1196
6863ca62
KG
1197 return 0;
1198}
1199
584de329 1200int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1201 const void *val, size_t val_len)
b83a313b 1202{
98bc7dfd 1203 struct regmap_range_node *range;
0d509f2b 1204 unsigned long flags;
6f306441 1205 u8 *u8 = map->work_buf;
0d509f2b
MB
1206 void *work_val = map->work_buf + map->format.reg_bytes +
1207 map->format.pad_bytes;
b83a313b
MB
1208 void *buf;
1209 int ret = -ENOTSUPP;
1210 size_t len;
73304781
MB
1211 int i;
1212
f1b5c5c3 1213 WARN_ON(!map->bus);
d2a5884a 1214
73304781
MB
1215 /* Check for unwritable registers before we start */
1216 if (map->writeable_reg)
1217 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1218 if (!map->writeable_reg(map->dev,
1219 reg + (i * map->reg_stride)))
73304781 1220 return -EINVAL;
b83a313b 1221
c9157198
LD
1222 if (!map->cache_bypass && map->format.parse_val) {
1223 unsigned int ival;
1224 int val_bytes = map->format.val_bytes;
1225 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1226 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1227 ret = regcache_write(map, reg + (i * map->reg_stride),
1228 ival);
c9157198
LD
1229 if (ret) {
1230 dev_err(map->dev,
6d04b8ac 1231 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1232 reg + i, ret);
1233 return ret;
1234 }
1235 }
1236 if (map->cache_only) {
1237 map->cache_dirty = true;
1238 return 0;
1239 }
1240 }
1241
98bc7dfd
MB
1242 range = _regmap_range_lookup(map, reg);
1243 if (range) {
8a2ceac6
MB
1244 int val_num = val_len / map->format.val_bytes;
1245 int win_offset = (reg - range->range_min) % range->window_len;
1246 int win_residue = range->window_len - win_offset;
1247
1248 /* If the write goes beyond the end of the window split it */
1249 while (val_num > win_residue) {
1a61cfe3 1250 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1251 win_residue, val_len / map->format.val_bytes);
1252 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1253 map->format.val_bytes);
8a2ceac6
MB
1254 if (ret != 0)
1255 return ret;
1256
1257 reg += win_residue;
1258 val_num -= win_residue;
1259 val += win_residue * map->format.val_bytes;
1260 val_len -= win_residue * map->format.val_bytes;
1261
1262 win_offset = (reg - range->range_min) %
1263 range->window_len;
1264 win_residue = range->window_len - win_offset;
1265 }
1266
1267 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1268 if (ret != 0)
98bc7dfd
MB
1269 return ret;
1270 }
6863ca62 1271
d939fb9a 1272 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1273
6f306441
LPC
1274 u8[0] |= map->write_flag_mask;
1275
651e013e
MB
1276 /*
1277 * Essentially all I/O mechanisms will be faster with a single
1278 * buffer to write. Since register syncs often generate raw
1279 * writes of single registers optimise that case.
1280 */
1281 if (val != work_val && val_len == map->format.val_bytes) {
1282 memcpy(work_val, val, map->format.val_bytes);
1283 val = work_val;
1284 }
1285
0a819809 1286 if (map->async && map->bus->async_write) {
7e09a979 1287 struct regmap_async *async;
0d509f2b 1288
c6b570d9 1289 trace_regmap_async_write_start(map, reg, val_len);
fe7d4ccd 1290
7e09a979
MB
1291 spin_lock_irqsave(&map->async_lock, flags);
1292 async = list_first_entry_or_null(&map->async_free,
1293 struct regmap_async,
1294 list);
1295 if (async)
1296 list_del(&async->list);
1297 spin_unlock_irqrestore(&map->async_lock, flags);
1298
1299 if (!async) {
1300 async = map->bus->async_alloc();
1301 if (!async)
1302 return -ENOMEM;
1303
1304 async->work_buf = kzalloc(map->format.buf_size,
1305 GFP_KERNEL | GFP_DMA);
1306 if (!async->work_buf) {
1307 kfree(async);
1308 return -ENOMEM;
1309 }
0d509f2b
MB
1310 }
1311
0d509f2b
MB
1312 async->map = map;
1313
1314 /* If the caller supplied the value we can use it safely. */
1315 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1316 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1317
1318 spin_lock_irqsave(&map->async_lock, flags);
1319 list_add_tail(&async->list, &map->async_list);
1320 spin_unlock_irqrestore(&map->async_lock, flags);
1321
04c50ccf
MB
1322 if (val != work_val)
1323 ret = map->bus->async_write(map->bus_context,
1324 async->work_buf,
1325 map->format.reg_bytes +
1326 map->format.pad_bytes,
1327 val, val_len, async);
1328 else
1329 ret = map->bus->async_write(map->bus_context,
1330 async->work_buf,
1331 map->format.reg_bytes +
1332 map->format.pad_bytes +
1333 val_len, NULL, 0, async);
0d509f2b
MB
1334
1335 if (ret != 0) {
1336 dev_err(map->dev, "Failed to schedule write: %d\n",
1337 ret);
1338
1339 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1340 list_move(&async->list, &map->async_free);
0d509f2b 1341 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1342 }
f951b658
MB
1343
1344 return ret;
0d509f2b
MB
1345 }
1346
c6b570d9 1347 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 1348
2547e201
MB
1349 /* If we're doing a single register write we can probably just
1350 * send the work_buf directly, otherwise try to do a gather
1351 * write.
1352 */
0d509f2b 1353 if (val == work_val)
0135bbcc 1354 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1355 map->format.reg_bytes +
1356 map->format.pad_bytes +
1357 val_len);
2547e201 1358 else if (map->bus->gather_write)
0135bbcc 1359 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1360 map->format.reg_bytes +
1361 map->format.pad_bytes,
b83a313b
MB
1362 val, val_len);
1363
2547e201 1364 /* If that didn't work fall back on linearising by hand. */
b83a313b 1365 if (ret == -ENOTSUPP) {
82159ba8
MB
1366 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1367 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1368 if (!buf)
1369 return -ENOMEM;
1370
1371 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1372 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1373 val, val_len);
0135bbcc 1374 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1375
1376 kfree(buf);
1377 }
1378
c6b570d9 1379 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
fb2736bb 1380
b83a313b
MB
1381 return ret;
1382}
1383
221ad7f2
MB
1384/**
1385 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1386 *
1387 * @map: Map to check.
1388 */
1389bool regmap_can_raw_write(struct regmap *map)
1390{
07ea400e
MP
1391 return map->bus && map->bus->write && map->format.format_val &&
1392 map->format.format_reg;
221ad7f2
MB
1393}
1394EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1395
f50c9eb4
MP
1396/**
1397 * regmap_get_raw_read_max - Get the maximum size we can read
1398 *
1399 * @map: Map to check.
1400 */
1401size_t regmap_get_raw_read_max(struct regmap *map)
1402{
1403 return map->max_raw_read;
1404}
1405EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1406
1407/**
1408 * regmap_get_raw_write_max - Get the maximum size we can read
1409 *
1410 * @map: Map to check.
1411 */
1412size_t regmap_get_raw_write_max(struct regmap *map)
1413{
1414 return map->max_raw_write;
1415}
1416EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1417
07c320dc
AS
1418static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1419 unsigned int val)
1420{
1421 int ret;
1422 struct regmap_range_node *range;
1423 struct regmap *map = context;
1424
f1b5c5c3 1425 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1426
1427 range = _regmap_range_lookup(map, reg);
1428 if (range) {
1429 ret = _regmap_select_page(map, &reg, range, 1);
1430 if (ret != 0)
1431 return ret;
1432 }
1433
1434 map->format.format_write(map, reg, val);
1435
c6b570d9 1436 trace_regmap_hw_write_start(map, reg, 1);
07c320dc
AS
1437
1438 ret = map->bus->write(map->bus_context, map->work_buf,
1439 map->format.buf_size);
1440
c6b570d9 1441 trace_regmap_hw_write_done(map, reg, 1);
07c320dc
AS
1442
1443 return ret;
1444}
1445
3ac17037
BB
1446static int _regmap_bus_reg_write(void *context, unsigned int reg,
1447 unsigned int val)
1448{
1449 struct regmap *map = context;
1450
1451 return map->bus->reg_write(map->bus_context, reg, val);
1452}
1453
07c320dc
AS
1454static int _regmap_bus_raw_write(void *context, unsigned int reg,
1455 unsigned int val)
1456{
1457 struct regmap *map = context;
1458
f1b5c5c3 1459 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1460
1461 map->format.format_val(map->work_buf + map->format.reg_bytes
1462 + map->format.pad_bytes, val, 0);
1463 return _regmap_raw_write(map, reg,
1464 map->work_buf +
1465 map->format.reg_bytes +
1466 map->format.pad_bytes,
0a819809 1467 map->format.val_bytes);
07c320dc
AS
1468}
1469
d2a5884a
AS
1470static inline void *_regmap_map_get_context(struct regmap *map)
1471{
1472 return (map->bus) ? map : map->bus_context;
1473}
1474
4d2dc095
DP
1475int _regmap_write(struct regmap *map, unsigned int reg,
1476 unsigned int val)
b83a313b 1477{
fb2736bb 1478 int ret;
d2a5884a 1479 void *context = _regmap_map_get_context(map);
b83a313b 1480
515f2261
IN
1481 if (!regmap_writeable(map, reg))
1482 return -EIO;
1483
d2a5884a 1484 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1485 ret = regcache_write(map, reg, val);
1486 if (ret != 0)
1487 return ret;
8ae0d7e8
MB
1488 if (map->cache_only) {
1489 map->cache_dirty = true;
5d1729e7 1490 return 0;
8ae0d7e8 1491 }
5d1729e7
DP
1492 }
1493
1044c180 1494#ifdef LOG_DEVICE
5336be84 1495 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
1496 dev_info(map->dev, "%x <= %x\n", reg, val);
1497#endif
1498
c6b570d9 1499 trace_regmap_reg_write(map, reg, val);
fb2736bb 1500
d2a5884a 1501 return map->reg_write(context, reg, val);
b83a313b
MB
1502}
1503
1504/**
1505 * regmap_write(): Write a value to a single register
1506 *
1507 * @map: Register map to write to
1508 * @reg: Register to write to
1509 * @val: Value to be written
1510 *
1511 * A value of zero will be returned on success, a negative errno will
1512 * be returned in error cases.
1513 */
1514int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1515{
1516 int ret;
1517
f01ee60f
SW
1518 if (reg % map->reg_stride)
1519 return -EINVAL;
1520
0d4529c5 1521 map->lock(map->lock_arg);
b83a313b
MB
1522
1523 ret = _regmap_write(map, reg, val);
1524
0d4529c5 1525 map->unlock(map->lock_arg);
b83a313b
MB
1526
1527 return ret;
1528}
1529EXPORT_SYMBOL_GPL(regmap_write);
1530
915f441b
MB
1531/**
1532 * regmap_write_async(): Write a value to a single register asynchronously
1533 *
1534 * @map: Register map to write to
1535 * @reg: Register to write to
1536 * @val: Value to be written
1537 *
1538 * A value of zero will be returned on success, a negative errno will
1539 * be returned in error cases.
1540 */
1541int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1542{
1543 int ret;
1544
1545 if (reg % map->reg_stride)
1546 return -EINVAL;
1547
1548 map->lock(map->lock_arg);
1549
1550 map->async = true;
1551
1552 ret = _regmap_write(map, reg, val);
1553
1554 map->async = false;
1555
1556 map->unlock(map->lock_arg);
1557
1558 return ret;
1559}
1560EXPORT_SYMBOL_GPL(regmap_write_async);
1561
b83a313b
MB
1562/**
1563 * regmap_raw_write(): Write raw values to one or more registers
1564 *
1565 * @map: Register map to write to
1566 * @reg: Initial register to write to
1567 * @val: Block of data to be written, laid out for direct transmission to the
1568 * device
1569 * @val_len: Length of data pointed to by val.
1570 *
1571 * This function is intended to be used for things like firmware
1572 * download where a large block of data needs to be transferred to the
1573 * device. No formatting will be done on the data provided.
1574 *
1575 * A value of zero will be returned on success, a negative errno will
1576 * be returned in error cases.
1577 */
1578int regmap_raw_write(struct regmap *map, unsigned int reg,
1579 const void *val, size_t val_len)
1580{
1581 int ret;
1582
221ad7f2 1583 if (!regmap_can_raw_write(map))
d2a5884a 1584 return -EINVAL;
851960ba
SW
1585 if (val_len % map->format.val_bytes)
1586 return -EINVAL;
c335931e
MP
1587 if (map->max_raw_write && map->max_raw_write > val_len)
1588 return -E2BIG;
851960ba 1589
0d4529c5 1590 map->lock(map->lock_arg);
b83a313b 1591
0a819809 1592 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1593
0d4529c5 1594 map->unlock(map->lock_arg);
b83a313b
MB
1595
1596 return ret;
1597}
1598EXPORT_SYMBOL_GPL(regmap_raw_write);
1599
67252287
SK
1600/**
1601 * regmap_field_write(): Write a value to a single register field
1602 *
1603 * @field: Register field to write to
1604 * @val: Value to be written
1605 *
1606 * A value of zero will be returned on success, a negative errno will
1607 * be returned in error cases.
1608 */
1609int regmap_field_write(struct regmap_field *field, unsigned int val)
1610{
1611 return regmap_update_bits(field->regmap, field->reg,
1612 field->mask, val << field->shift);
1613}
1614EXPORT_SYMBOL_GPL(regmap_field_write);
1615
fdf20029
KM
1616/**
1617 * regmap_field_update_bits(): Perform a read/modify/write cycle
1618 * on the register field
1619 *
1620 * @field: Register field to write to
1621 * @mask: Bitmask to change
1622 * @val: Value to be written
1623 *
1624 * A value of zero will be returned on success, a negative errno will
1625 * be returned in error cases.
1626 */
1627int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1628{
1629 mask = (mask << field->shift) & field->mask;
1630
1631 return regmap_update_bits(field->regmap, field->reg,
1632 mask, val << field->shift);
1633}
1634EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1635
a0102375
KM
1636/**
1637 * regmap_fields_write(): Write a value to a single register field with port ID
1638 *
1639 * @field: Register field to write to
1640 * @id: port ID
1641 * @val: Value to be written
1642 *
1643 * A value of zero will be returned on success, a negative errno will
1644 * be returned in error cases.
1645 */
1646int regmap_fields_write(struct regmap_field *field, unsigned int id,
1647 unsigned int val)
1648{
1649 if (id >= field->id_size)
1650 return -EINVAL;
1651
1652 return regmap_update_bits(field->regmap,
1653 field->reg + (field->id_offset * id),
1654 field->mask, val << field->shift);
1655}
1656EXPORT_SYMBOL_GPL(regmap_fields_write);
1657
1658/**
1659 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1660 * on the register field
1661 *
1662 * @field: Register field to write to
1663 * @id: port ID
1664 * @mask: Bitmask to change
1665 * @val: Value to be written
1666 *
1667 * A value of zero will be returned on success, a negative errno will
1668 * be returned in error cases.
1669 */
1670int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1671 unsigned int mask, unsigned int val)
1672{
1673 if (id >= field->id_size)
1674 return -EINVAL;
1675
1676 mask = (mask << field->shift) & field->mask;
1677
1678 return regmap_update_bits(field->regmap,
1679 field->reg + (field->id_offset * id),
1680 mask, val << field->shift);
1681}
1682EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1683
8eaeb219
LD
1684/*
1685 * regmap_bulk_write(): Write multiple registers to the device
1686 *
1687 * @map: Register map to write to
1688 * @reg: First register to be write from
1689 * @val: Block of data to be written, in native register size for device
1690 * @val_count: Number of registers to write
1691 *
1692 * This function is intended to be used for writing a large block of
31b35e9e 1693 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1694 *
1695 * A value of zero will be returned on success, a negative errno will
1696 * be returned in error cases.
1697 */
1698int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1699 size_t val_count)
1700{
1701 int ret = 0, i;
1702 size_t val_bytes = map->format.val_bytes;
adaac459 1703 size_t total_size = val_bytes * val_count;
8eaeb219 1704
f4298360 1705 if (map->bus && !map->format.parse_inplace)
8eaeb219 1706 return -EINVAL;
f01ee60f
SW
1707 if (reg % map->reg_stride)
1708 return -EINVAL;
8eaeb219 1709
f4298360
SB
1710 /*
1711 * Some devices don't support bulk write, for
c594b7f2
MP
1712 * them we have a series of single write operations in the first two if
1713 * blocks.
1714 *
1715 * The first if block is used for memory mapped io. It does not allow
1716 * val_bytes of 3 for example.
1717 * The second one is used for busses which do not have this limitation
1718 * and can write arbitrary value lengths.
f4298360 1719 */
c594b7f2 1720 if (!map->bus) {
4999e962 1721 map->lock(map->lock_arg);
f4298360
SB
1722 for (i = 0; i < val_count; i++) {
1723 unsigned int ival;
1724
1725 switch (val_bytes) {
1726 case 1:
1727 ival = *(u8 *)(val + (i * val_bytes));
1728 break;
1729 case 2:
1730 ival = *(u16 *)(val + (i * val_bytes));
1731 break;
1732 case 4:
1733 ival = *(u32 *)(val + (i * val_bytes));
1734 break;
1735#ifdef CONFIG_64BIT
1736 case 8:
1737 ival = *(u64 *)(val + (i * val_bytes));
1738 break;
1739#endif
1740 default:
1741 ret = -EINVAL;
1742 goto out;
1743 }
8eaeb219 1744
f4298360
SB
1745 ret = _regmap_write(map, reg + (i * map->reg_stride),
1746 ival);
1747 if (ret != 0)
1748 goto out;
1749 }
4999e962
TI
1750out:
1751 map->unlock(map->lock_arg);
adaac459
MP
1752 } else if (map->use_single_write ||
1753 (map->max_raw_write && map->max_raw_write < total_size)) {
1754 int chunk_stride = map->reg_stride;
1755 size_t chunk_size = val_bytes;
1756 size_t chunk_count = val_count;
1757
1758 if (!map->use_single_write) {
1759 chunk_size = map->max_raw_write;
1760 if (chunk_size % val_bytes)
1761 chunk_size -= chunk_size % val_bytes;
1762 chunk_count = total_size / chunk_size;
1763 chunk_stride *= chunk_size / val_bytes;
1764 }
1765
c594b7f2 1766 map->lock(map->lock_arg);
adaac459
MP
1767 /* Write as many bytes as possible with chunk_size */
1768 for (i = 0; i < chunk_count; i++) {
c594b7f2 1769 ret = _regmap_raw_write(map,
adaac459
MP
1770 reg + (i * chunk_stride),
1771 val + (i * chunk_size),
1772 chunk_size);
c594b7f2
MP
1773 if (ret)
1774 break;
1775 }
adaac459
MP
1776
1777 /* Write remaining bytes */
1778 if (!ret && chunk_size * i < total_size) {
1779 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1780 val + (i * chunk_size),
1781 total_size - i * chunk_size);
1782 }
c594b7f2 1783 map->unlock(map->lock_arg);
8eaeb219 1784 } else {
f4298360
SB
1785 void *wval;
1786
d6b41cb0
XL
1787 if (!val_count)
1788 return -EINVAL;
1789
8eaeb219
LD
1790 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1791 if (!wval) {
8eaeb219 1792 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1793 return -ENOMEM;
8eaeb219
LD
1794 }
1795 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1796 map->format.parse_inplace(wval + i);
f4298360 1797
4999e962 1798 map->lock(map->lock_arg);
0a819809 1799 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1800 map->unlock(map->lock_arg);
8eaeb219 1801
8eaeb219 1802 kfree(wval);
f4298360 1803 }
8eaeb219
LD
1804 return ret;
1805}
1806EXPORT_SYMBOL_GPL(regmap_bulk_write);
1807
e894c3f4
OAO
1808/*
1809 * _regmap_raw_multi_reg_write()
1810 *
1811 * the (register,newvalue) pairs in regs have not been formatted, but
1812 * they are all in the same page and have been changed to being page
b486afbd 1813 * relative. The page register has been written if that was necessary.
e894c3f4
OAO
1814 */
1815static int _regmap_raw_multi_reg_write(struct regmap *map,
1816 const struct reg_default *regs,
1817 size_t num_regs)
1818{
1819 int ret;
1820 void *buf;
1821 int i;
1822 u8 *u8;
1823 size_t val_bytes = map->format.val_bytes;
1824 size_t reg_bytes = map->format.reg_bytes;
1825 size_t pad_bytes = map->format.pad_bytes;
1826 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1827 size_t len = pair_size * num_regs;
1828
f5727cd3
XL
1829 if (!len)
1830 return -EINVAL;
1831
e894c3f4
OAO
1832 buf = kzalloc(len, GFP_KERNEL);
1833 if (!buf)
1834 return -ENOMEM;
1835
1836 /* We have to linearise by hand. */
1837
1838 u8 = buf;
1839
1840 for (i = 0; i < num_regs; i++) {
1841 int reg = regs[i].reg;
1842 int val = regs[i].def;
c6b570d9 1843 trace_regmap_hw_write_start(map, reg, 1);
e894c3f4
OAO
1844 map->format.format_reg(u8, reg, map->reg_shift);
1845 u8 += reg_bytes + pad_bytes;
1846 map->format.format_val(u8, val, 0);
1847 u8 += val_bytes;
1848 }
1849 u8 = buf;
1850 *u8 |= map->write_flag_mask;
1851
1852 ret = map->bus->write(map->bus_context, buf, len);
1853
1854 kfree(buf);
1855
1856 for (i = 0; i < num_regs; i++) {
1857 int reg = regs[i].reg;
c6b570d9 1858 trace_regmap_hw_write_done(map, reg, 1);
e894c3f4
OAO
1859 }
1860 return ret;
1861}
1862
1863static unsigned int _regmap_register_page(struct regmap *map,
1864 unsigned int reg,
1865 struct regmap_range_node *range)
1866{
1867 unsigned int win_page = (reg - range->range_min) / range->window_len;
1868
1869 return win_page;
1870}
1871
1872static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1873 struct reg_default *regs,
1874 size_t num_regs)
1875{
1876 int ret;
1877 int i, n;
1878 struct reg_default *base;
b48d1398 1879 unsigned int this_page = 0;
e894c3f4
OAO
1880 /*
1881 * the set of registers are not neccessarily in order, but
1882 * since the order of write must be preserved this algorithm
1883 * chops the set each time the page changes
1884 */
1885 base = regs;
1886 for (i = 0, n = 0; i < num_regs; i++, n++) {
1887 unsigned int reg = regs[i].reg;
1888 struct regmap_range_node *range;
1889
1890 range = _regmap_range_lookup(map, reg);
1891 if (range) {
1892 unsigned int win_page = _regmap_register_page(map, reg,
1893 range);
1894
1895 if (i == 0)
1896 this_page = win_page;
1897 if (win_page != this_page) {
1898 this_page = win_page;
1899 ret = _regmap_raw_multi_reg_write(map, base, n);
1900 if (ret != 0)
1901 return ret;
1902 base += n;
1903 n = 0;
1904 }
1905 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1906 if (ret != 0)
1907 return ret;
1908 }
1909 }
1910 if (n > 0)
1911 return _regmap_raw_multi_reg_write(map, base, n);
1912 return 0;
1913}
1914
1d5b40bc
CK
1915static int _regmap_multi_reg_write(struct regmap *map,
1916 const struct reg_default *regs,
e894c3f4 1917 size_t num_regs)
1d5b40bc 1918{
e894c3f4
OAO
1919 int i;
1920 int ret;
1921
1922 if (!map->can_multi_write) {
1923 for (i = 0; i < num_regs; i++) {
1924 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1925 if (ret != 0)
1926 return ret;
1927 }
1928 return 0;
1929 }
1930
1931 if (!map->format.parse_inplace)
1932 return -EINVAL;
1933
1934 if (map->writeable_reg)
1935 for (i = 0; i < num_regs; i++) {
1936 int reg = regs[i].reg;
1937 if (!map->writeable_reg(map->dev, reg))
1938 return -EINVAL;
1939 if (reg % map->reg_stride)
1940 return -EINVAL;
1941 }
1942
1943 if (!map->cache_bypass) {
1944 for (i = 0; i < num_regs; i++) {
1945 unsigned int val = regs[i].def;
1946 unsigned int reg = regs[i].reg;
1947 ret = regcache_write(map, reg, val);
1948 if (ret) {
1949 dev_err(map->dev,
1950 "Error in caching of register: %x ret: %d\n",
1951 reg, ret);
1952 return ret;
1953 }
1954 }
1955 if (map->cache_only) {
1956 map->cache_dirty = true;
1957 return 0;
1958 }
1959 }
1960
1961 WARN_ON(!map->bus);
1d5b40bc
CK
1962
1963 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
1964 unsigned int reg = regs[i].reg;
1965 struct regmap_range_node *range;
1966 range = _regmap_range_lookup(map, reg);
1967 if (range) {
1968 size_t len = sizeof(struct reg_default)*num_regs;
1969 struct reg_default *base = kmemdup(regs, len,
1970 GFP_KERNEL);
1971 if (!base)
1972 return -ENOMEM;
1973 ret = _regmap_range_multi_paged_reg_write(map, base,
1974 num_regs);
1975 kfree(base);
1976
1d5b40bc
CK
1977 return ret;
1978 }
1979 }
e894c3f4 1980 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
1981}
1982
e33fabd3
AO
1983/*
1984 * regmap_multi_reg_write(): Write multiple registers to the device
1985 *
e894c3f4
OAO
1986 * where the set of register,value pairs are supplied in any order,
1987 * possibly not all in a single range.
e33fabd3
AO
1988 *
1989 * @map: Register map to write to
1990 * @regs: Array of structures containing register,value to be written
1991 * @num_regs: Number of registers to write
1992 *
e894c3f4
OAO
1993 * The 'normal' block write mode will send ultimately send data on the
1994 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1995 * addressed. However, this alternative block multi write mode will send
1996 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1997 * must of course support the mode.
e33fabd3 1998 *
e894c3f4
OAO
1999 * A value of zero will be returned on success, a negative errno will be
2000 * returned in error cases.
e33fabd3 2001 */
f7e2cec0
CK
2002int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
2003 int num_regs)
e33fabd3 2004{
1d5b40bc 2005 int ret;
e33fabd3
AO
2006
2007 map->lock(map->lock_arg);
2008
1d5b40bc
CK
2009 ret = _regmap_multi_reg_write(map, regs, num_regs);
2010
e33fabd3
AO
2011 map->unlock(map->lock_arg);
2012
2013 return ret;
2014}
2015EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2016
1d5b40bc
CK
2017/*
2018 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2019 * device but not the cache
2020 *
e33fabd3
AO
2021 * where the set of register are supplied in any order
2022 *
2023 * @map: Register map to write to
2024 * @regs: Array of structures containing register,value to be written
2025 * @num_regs: Number of registers to write
2026 *
2027 * This function is intended to be used for writing a large block of data
2028 * atomically to the device in single transfer for those I2C client devices
2029 * that implement this alternative block write mode.
2030 *
2031 * A value of zero will be returned on success, a negative errno will
2032 * be returned in error cases.
2033 */
1d5b40bc
CK
2034int regmap_multi_reg_write_bypassed(struct regmap *map,
2035 const struct reg_default *regs,
2036 int num_regs)
e33fabd3 2037{
1d5b40bc
CK
2038 int ret;
2039 bool bypass;
e33fabd3
AO
2040
2041 map->lock(map->lock_arg);
2042
1d5b40bc
CK
2043 bypass = map->cache_bypass;
2044 map->cache_bypass = true;
2045
2046 ret = _regmap_multi_reg_write(map, regs, num_regs);
2047
2048 map->cache_bypass = bypass;
2049
e33fabd3
AO
2050 map->unlock(map->lock_arg);
2051
2052 return ret;
2053}
1d5b40bc 2054EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 2055
0d509f2b
MB
2056/**
2057 * regmap_raw_write_async(): Write raw values to one or more registers
2058 * asynchronously
2059 *
2060 * @map: Register map to write to
2061 * @reg: Initial register to write to
2062 * @val: Block of data to be written, laid out for direct transmission to the
2063 * device. Must be valid until regmap_async_complete() is called.
2064 * @val_len: Length of data pointed to by val.
2065 *
2066 * This function is intended to be used for things like firmware
2067 * download where a large block of data needs to be transferred to the
2068 * device. No formatting will be done on the data provided.
2069 *
2070 * If supported by the underlying bus the write will be scheduled
2071 * asynchronously, helping maximise I/O speed on higher speed buses
2072 * like SPI. regmap_async_complete() can be called to ensure that all
2073 * asynchrnous writes have been completed.
2074 *
2075 * A value of zero will be returned on success, a negative errno will
2076 * be returned in error cases.
2077 */
2078int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2079 const void *val, size_t val_len)
2080{
2081 int ret;
2082
2083 if (val_len % map->format.val_bytes)
2084 return -EINVAL;
2085 if (reg % map->reg_stride)
2086 return -EINVAL;
2087
2088 map->lock(map->lock_arg);
2089
0a819809
MB
2090 map->async = true;
2091
2092 ret = _regmap_raw_write(map, reg, val, val_len);
2093
2094 map->async = false;
0d509f2b
MB
2095
2096 map->unlock(map->lock_arg);
2097
2098 return ret;
2099}
2100EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2101
b83a313b
MB
2102static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2103 unsigned int val_len)
2104{
98bc7dfd 2105 struct regmap_range_node *range;
b83a313b
MB
2106 u8 *u8 = map->work_buf;
2107 int ret;
2108
f1b5c5c3 2109 WARN_ON(!map->bus);
d2a5884a 2110
98bc7dfd
MB
2111 range = _regmap_range_lookup(map, reg);
2112 if (range) {
2113 ret = _regmap_select_page(map, &reg, range,
2114 val_len / map->format.val_bytes);
0ff3e62f 2115 if (ret != 0)
98bc7dfd
MB
2116 return ret;
2117 }
6863ca62 2118
d939fb9a 2119 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
2120
2121 /*
6f306441 2122 * Some buses or devices flag reads by setting the high bits in the
b486afbd 2123 * register address; since it's always the high bits for all
b83a313b
MB
2124 * current formats we can do this here rather than in
2125 * formatting. This may break if we get interesting formats.
2126 */
6f306441 2127 u8[0] |= map->read_flag_mask;
b83a313b 2128
c6b570d9 2129 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 2130
0135bbcc 2131 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 2132 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 2133 val, val_len);
b83a313b 2134
c6b570d9 2135 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
fb2736bb
MB
2136
2137 return ret;
b83a313b
MB
2138}
2139
3ac17037
BB
2140static int _regmap_bus_reg_read(void *context, unsigned int reg,
2141 unsigned int *val)
2142{
2143 struct regmap *map = context;
2144
2145 return map->bus->reg_read(map->bus_context, reg, val);
2146}
2147
ad278406
AS
2148static int _regmap_bus_read(void *context, unsigned int reg,
2149 unsigned int *val)
2150{
2151 int ret;
2152 struct regmap *map = context;
2153
2154 if (!map->format.parse_val)
2155 return -EINVAL;
2156
2157 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2158 if (ret == 0)
2159 *val = map->format.parse_val(map->work_buf);
2160
2161 return ret;
2162}
2163
b83a313b
MB
2164static int _regmap_read(struct regmap *map, unsigned int reg,
2165 unsigned int *val)
2166{
2167 int ret;
d2a5884a
AS
2168 void *context = _regmap_map_get_context(map);
2169
5d1729e7
DP
2170 if (!map->cache_bypass) {
2171 ret = regcache_read(map, reg, val);
2172 if (ret == 0)
2173 return 0;
2174 }
2175
2176 if (map->cache_only)
2177 return -EBUSY;
2178
d4807ad2
MS
2179 if (!regmap_readable(map, reg))
2180 return -EIO;
2181
d2a5884a 2182 ret = map->reg_read(context, reg, val);
fb2736bb 2183 if (ret == 0) {
1044c180 2184#ifdef LOG_DEVICE
5336be84 2185 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
2186 dev_info(map->dev, "%x => %x\n", reg, *val);
2187#endif
2188
c6b570d9 2189 trace_regmap_reg_read(map, reg, *val);
b83a313b 2190
ad278406
AS
2191 if (!map->cache_bypass)
2192 regcache_write(map, reg, *val);
2193 }
f2985367 2194
b83a313b
MB
2195 return ret;
2196}
2197
2198/**
2199 * regmap_read(): Read a value from a single register
2200 *
0093380c 2201 * @map: Register map to read from
b83a313b
MB
2202 * @reg: Register to be read from
2203 * @val: Pointer to store read value
2204 *
2205 * A value of zero will be returned on success, a negative errno will
2206 * be returned in error cases.
2207 */
2208int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2209{
2210 int ret;
2211
f01ee60f
SW
2212 if (reg % map->reg_stride)
2213 return -EINVAL;
2214
0d4529c5 2215 map->lock(map->lock_arg);
b83a313b
MB
2216
2217 ret = _regmap_read(map, reg, val);
2218
0d4529c5 2219 map->unlock(map->lock_arg);
b83a313b
MB
2220
2221 return ret;
2222}
2223EXPORT_SYMBOL_GPL(regmap_read);
2224
2225/**
2226 * regmap_raw_read(): Read raw data from the device
2227 *
0093380c 2228 * @map: Register map to read from
b83a313b
MB
2229 * @reg: First register to be read from
2230 * @val: Pointer to store read value
2231 * @val_len: Size of data to read
2232 *
2233 * A value of zero will be returned on success, a negative errno will
2234 * be returned in error cases.
2235 */
2236int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2237 size_t val_len)
2238{
b8fb5ab1
MB
2239 size_t val_bytes = map->format.val_bytes;
2240 size_t val_count = val_len / val_bytes;
2241 unsigned int v;
2242 int ret, i;
04e016ad 2243
d2a5884a
AS
2244 if (!map->bus)
2245 return -EINVAL;
851960ba
SW
2246 if (val_len % map->format.val_bytes)
2247 return -EINVAL;
f01ee60f
SW
2248 if (reg % map->reg_stride)
2249 return -EINVAL;
fa3eec77
MB
2250 if (val_count == 0)
2251 return -EINVAL;
851960ba 2252
0d4529c5 2253 map->lock(map->lock_arg);
b83a313b 2254
b8fb5ab1
MB
2255 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2256 map->cache_type == REGCACHE_NONE) {
9a16ea90
MP
2257 if (!map->bus->read) {
2258 ret = -ENOTSUPP;
2259 goto out;
2260 }
c335931e
MP
2261 if (map->max_raw_read && map->max_raw_read < val_len) {
2262 ret = -E2BIG;
2263 goto out;
2264 }
9a16ea90 2265
b8fb5ab1
MB
2266 /* Physical block read if there's no cache involved */
2267 ret = _regmap_raw_read(map, reg, val, val_len);
2268
2269 } else {
2270 /* Otherwise go word by word for the cache; should be low
2271 * cost as we expect to hit the cache.
2272 */
2273 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2274 ret = _regmap_read(map, reg + (i * map->reg_stride),
2275 &v);
b8fb5ab1
MB
2276 if (ret != 0)
2277 goto out;
2278
d939fb9a 2279 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2280 }
2281 }
b83a313b 2282
b8fb5ab1 2283 out:
0d4529c5 2284 map->unlock(map->lock_arg);
b83a313b
MB
2285
2286 return ret;
2287}
2288EXPORT_SYMBOL_GPL(regmap_raw_read);
2289
67252287
SK
2290/**
2291 * regmap_field_read(): Read a value to a single register field
2292 *
2293 * @field: Register field to read from
2294 * @val: Pointer to store read value
2295 *
2296 * A value of zero will be returned on success, a negative errno will
2297 * be returned in error cases.
2298 */
2299int regmap_field_read(struct regmap_field *field, unsigned int *val)
2300{
2301 int ret;
2302 unsigned int reg_val;
2303 ret = regmap_read(field->regmap, field->reg, &reg_val);
2304 if (ret != 0)
2305 return ret;
2306
2307 reg_val &= field->mask;
2308 reg_val >>= field->shift;
2309 *val = reg_val;
2310
2311 return ret;
2312}
2313EXPORT_SYMBOL_GPL(regmap_field_read);
2314
a0102375
KM
2315/**
2316 * regmap_fields_read(): Read a value to a single register field with port ID
2317 *
2318 * @field: Register field to read from
2319 * @id: port ID
2320 * @val: Pointer to store read value
2321 *
2322 * A value of zero will be returned on success, a negative errno will
2323 * be returned in error cases.
2324 */
2325int regmap_fields_read(struct regmap_field *field, unsigned int id,
2326 unsigned int *val)
2327{
2328 int ret;
2329 unsigned int reg_val;
2330
2331 if (id >= field->id_size)
2332 return -EINVAL;
2333
2334 ret = regmap_read(field->regmap,
2335 field->reg + (field->id_offset * id),
2336 &reg_val);
2337 if (ret != 0)
2338 return ret;
2339
2340 reg_val &= field->mask;
2341 reg_val >>= field->shift;
2342 *val = reg_val;
2343
2344 return ret;
2345}
2346EXPORT_SYMBOL_GPL(regmap_fields_read);
2347
b83a313b
MB
2348/**
2349 * regmap_bulk_read(): Read multiple registers from the device
2350 *
0093380c 2351 * @map: Register map to read from
b83a313b
MB
2352 * @reg: First register to be read from
2353 * @val: Pointer to store read value, in native register size for device
2354 * @val_count: Number of registers to read
2355 *
2356 * A value of zero will be returned on success, a negative errno will
2357 * be returned in error cases.
2358 */
2359int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2360 size_t val_count)
2361{
2362 int ret, i;
2363 size_t val_bytes = map->format.val_bytes;
82cd9965 2364 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2365
f01ee60f
SW
2366 if (reg % map->reg_stride)
2367 return -EINVAL;
b83a313b 2368
3b58ee13 2369 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2370 /*
2371 * Some devices does not support bulk read, for
2372 * them we have a series of single read operations.
2373 */
adaac459
MP
2374 size_t total_size = val_bytes * val_count;
2375
2376 if (!map->use_single_read &&
2377 (!map->max_raw_read || map->max_raw_read > total_size)) {
2e33caf1
AJ
2378 ret = regmap_raw_read(map, reg, val,
2379 val_bytes * val_count);
2380 if (ret != 0)
2381 return ret;
adaac459
MP
2382 } else {
2383 /*
2384 * Some devices do not support bulk read or do not
2385 * support large bulk reads, for them we have a series
2386 * of read operations.
2387 */
2388 int chunk_stride = map->reg_stride;
2389 size_t chunk_size = val_bytes;
2390 size_t chunk_count = val_count;
2391
2392 if (!map->use_single_read) {
2393 chunk_size = map->max_raw_read;
2394 if (chunk_size % val_bytes)
2395 chunk_size -= chunk_size % val_bytes;
2396 chunk_count = total_size / chunk_size;
2397 chunk_stride *= chunk_size / val_bytes;
2398 }
2399
2400 /* Read bytes that fit into a multiple of chunk_size */
2401 for (i = 0; i < chunk_count; i++) {
2402 ret = regmap_raw_read(map,
2403 reg + (i * chunk_stride),
2404 val + (i * chunk_size),
2405 chunk_size);
2406 if (ret != 0)
2407 return ret;
2408 }
2409
2410 /* Read remaining bytes */
2411 if (chunk_size * i < total_size) {
2412 ret = regmap_raw_read(map,
2413 reg + (i * chunk_stride),
2414 val + (i * chunk_size),
2415 total_size - i * chunk_size);
2416 if (ret != 0)
2417 return ret;
2418 }
2e33caf1 2419 }
de2d808f
MB
2420
2421 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2422 map->format.parse_inplace(val + i);
de2d808f
MB
2423 } else {
2424 for (i = 0; i < val_count; i++) {
6560ffd1 2425 unsigned int ival;
f01ee60f 2426 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2427 &ival);
de2d808f
MB
2428 if (ret != 0)
2429 return ret;
15b8d2c4 2430 map->format.format_val(val + (i * val_bytes), ival, 0);
de2d808f
MB
2431 }
2432 }
b83a313b
MB
2433
2434 return 0;
2435}
2436EXPORT_SYMBOL_GPL(regmap_bulk_read);
2437
018690d3
MB
2438static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2439 unsigned int mask, unsigned int val,
2440 bool *change)
b83a313b
MB
2441{
2442 int ret;
d91e8db2 2443 unsigned int tmp, orig;
b83a313b 2444
d91e8db2 2445 ret = _regmap_read(map, reg, &orig);
b83a313b 2446 if (ret != 0)
fc3ebd78 2447 return ret;
b83a313b 2448
d91e8db2 2449 tmp = orig & ~mask;
b83a313b
MB
2450 tmp |= val & mask;
2451
018690d3 2452 if (tmp != orig) {
d91e8db2 2453 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2454 if (change)
2455 *change = true;
018690d3 2456 } else {
e2f74dc6
XL
2457 if (change)
2458 *change = false;
018690d3 2459 }
b83a313b 2460
b83a313b
MB
2461 return ret;
2462}
018690d3
MB
2463
2464/**
2465 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2466 *
2467 * @map: Register map to update
2468 * @reg: Register to update
2469 * @mask: Bitmask to change
2470 * @val: New value for bitmask
2471 *
2472 * Returns zero for success, a negative number on error.
2473 */
2474int regmap_update_bits(struct regmap *map, unsigned int reg,
2475 unsigned int mask, unsigned int val)
2476{
fc3ebd78
KG
2477 int ret;
2478
0d4529c5 2479 map->lock(map->lock_arg);
e2f74dc6 2480 ret = _regmap_update_bits(map, reg, mask, val, NULL);
0d4529c5 2481 map->unlock(map->lock_arg);
fc3ebd78
KG
2482
2483 return ret;
018690d3 2484}
b83a313b 2485EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2486
915f441b
MB
2487/**
2488 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2489 * map asynchronously
2490 *
2491 * @map: Register map to update
2492 * @reg: Register to update
2493 * @mask: Bitmask to change
2494 * @val: New value for bitmask
2495 *
2496 * With most buses the read must be done synchronously so this is most
2497 * useful for devices with a cache which do not need to interact with
2498 * the hardware to determine the current register value.
2499 *
2500 * Returns zero for success, a negative number on error.
2501 */
2502int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2503 unsigned int mask, unsigned int val)
2504{
915f441b
MB
2505 int ret;
2506
2507 map->lock(map->lock_arg);
2508
2509 map->async = true;
2510
e2f74dc6 2511 ret = _regmap_update_bits(map, reg, mask, val, NULL);
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MB
2512
2513 map->async = false;
2514
2515 map->unlock(map->lock_arg);
2516
2517 return ret;
2518}
2519EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2520
018690d3
MB
2521/**
2522 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2523 * register map and report if updated
2524 *
2525 * @map: Register map to update
2526 * @reg: Register to update
2527 * @mask: Bitmask to change
2528 * @val: New value for bitmask
2529 * @change: Boolean indicating if a write was done
2530 *
2531 * Returns zero for success, a negative number on error.
2532 */
2533int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2534 unsigned int mask, unsigned int val,
2535 bool *change)
2536{
fc3ebd78
KG
2537 int ret;
2538
0d4529c5 2539 map->lock(map->lock_arg);
fc3ebd78 2540 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2541 map->unlock(map->lock_arg);
fc3ebd78 2542 return ret;
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MB
2543}
2544EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2545
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2546/**
2547 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2548 * register map asynchronously and report if
2549 * updated
2550 *
2551 * @map: Register map to update
2552 * @reg: Register to update
2553 * @mask: Bitmask to change
2554 * @val: New value for bitmask
2555 * @change: Boolean indicating if a write was done
2556 *
2557 * With most buses the read must be done synchronously so this is most
2558 * useful for devices with a cache which do not need to interact with
2559 * the hardware to determine the current register value.
2560 *
2561 * Returns zero for success, a negative number on error.
2562 */
2563int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2564 unsigned int mask, unsigned int val,
2565 bool *change)
2566{
2567 int ret;
2568
2569 map->lock(map->lock_arg);
2570
2571 map->async = true;
2572
2573 ret = _regmap_update_bits(map, reg, mask, val, change);
2574
2575 map->async = false;
2576
2577 map->unlock(map->lock_arg);
2578
2579 return ret;
2580}
2581EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2582
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2583void regmap_async_complete_cb(struct regmap_async *async, int ret)
2584{
2585 struct regmap *map = async->map;
2586 bool wake;
2587
c6b570d9 2588 trace_regmap_async_io_complete(map);
fe7d4ccd 2589
0d509f2b 2590 spin_lock(&map->async_lock);
7e09a979 2591 list_move(&async->list, &map->async_free);
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MB
2592 wake = list_empty(&map->async_list);
2593
2594 if (ret != 0)
2595 map->async_ret = ret;
2596
2597 spin_unlock(&map->async_lock);
2598
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2599 if (wake)
2600 wake_up(&map->async_waitq);
2601}
f804fb56 2602EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
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2603
2604static int regmap_async_is_done(struct regmap *map)
2605{
2606 unsigned long flags;
2607 int ret;
2608
2609 spin_lock_irqsave(&map->async_lock, flags);
2610 ret = list_empty(&map->async_list);
2611 spin_unlock_irqrestore(&map->async_lock, flags);
2612
2613 return ret;
2614}
2615
2616/**
2617 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2618 *
2619 * @map: Map to operate on.
2620 *
2621 * Blocks until any pending asynchronous I/O has completed. Returns
2622 * an error code for any failed I/O operations.
2623 */
2624int regmap_async_complete(struct regmap *map)
2625{
2626 unsigned long flags;
2627 int ret;
2628
2629 /* Nothing to do with no async support */
f2e055e7 2630 if (!map->bus || !map->bus->async_write)
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2631 return 0;
2632
c6b570d9 2633 trace_regmap_async_complete_start(map);
fe7d4ccd 2634
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2635 wait_event(map->async_waitq, regmap_async_is_done(map));
2636
2637 spin_lock_irqsave(&map->async_lock, flags);
2638 ret = map->async_ret;
2639 map->async_ret = 0;
2640 spin_unlock_irqrestore(&map->async_lock, flags);
2641
c6b570d9 2642 trace_regmap_async_complete_done(map);
fe7d4ccd 2643
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MB
2644 return ret;
2645}
f88948ef 2646EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2647
22f0d90a
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2648/**
2649 * regmap_register_patch: Register and apply register updates to be applied
2650 * on device initialistion
2651 *
2652 * @map: Register map to apply updates to.
2653 * @regs: Values to update.
2654 * @num_regs: Number of entries in regs.
2655 *
2656 * Register a set of register updates to be applied to the device
2657 * whenever the device registers are synchronised with the cache and
2658 * apply them immediately. Typically this is used to apply
2659 * corrections to be applied to the device defaults on startup, such
2660 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB
2661 *
2662 * The caller must ensure that this function cannot be called
2663 * concurrently with either itself or regcache_sync().
22f0d90a
MB
2664 */
2665int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2666 int num_regs)
2667{
aab13ebc 2668 struct reg_default *p;
6bf13103 2669 int ret;
22f0d90a
MB
2670 bool bypass;
2671
bd60e381
CZ
2672 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2673 num_regs))
2674 return 0;
2675
aab13ebc
MB
2676 p = krealloc(map->patch,
2677 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2678 GFP_KERNEL);
2679 if (p) {
2680 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2681 map->patch = p;
2682 map->patch_regs += num_regs;
22f0d90a 2683 } else {
56fb1c74 2684 return -ENOMEM;
22f0d90a
MB
2685 }
2686
0d4529c5 2687 map->lock(map->lock_arg);
22f0d90a
MB
2688
2689 bypass = map->cache_bypass;
2690
2691 map->cache_bypass = true;
1a25f261 2692 map->async = true;
22f0d90a 2693
6bf13103 2694 ret = _regmap_multi_reg_write(map, regs, num_regs);
22f0d90a 2695
1a25f261 2696 map->async = false;
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MB
2697 map->cache_bypass = bypass;
2698
0d4529c5 2699 map->unlock(map->lock_arg);
22f0d90a 2700
1a25f261
MB
2701 regmap_async_complete(map);
2702
22f0d90a
MB
2703 return ret;
2704}
2705EXPORT_SYMBOL_GPL(regmap_register_patch);
2706
eae4b51b 2707/*
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MB
2708 * regmap_get_val_bytes(): Report the size of a register value
2709 *
2710 * Report the size of a register value, mainly intended to for use by
2711 * generic infrastructure built on top of regmap.
2712 */
2713int regmap_get_val_bytes(struct regmap *map)
2714{
2715 if (map->format.format_write)
2716 return -EINVAL;
2717
2718 return map->format.val_bytes;
2719}
2720EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2721
668abc72
SK
2722/**
2723 * regmap_get_max_register(): Report the max register value
2724 *
2725 * Report the max register value, mainly intended to for use by
2726 * generic infrastructure built on top of regmap.
2727 */
2728int regmap_get_max_register(struct regmap *map)
2729{
2730 return map->max_register ? map->max_register : -EINVAL;
2731}
2732EXPORT_SYMBOL_GPL(regmap_get_max_register);
2733
a2f776cb
SK
2734/**
2735 * regmap_get_reg_stride(): Report the register address stride
2736 *
2737 * Report the register address stride, mainly intended to for use by
2738 * generic infrastructure built on top of regmap.
2739 */
2740int regmap_get_reg_stride(struct regmap *map)
2741{
2742 return map->reg_stride;
2743}
2744EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2745
13ff50c8
NC
2746int regmap_parse_val(struct regmap *map, const void *buf,
2747 unsigned int *val)
2748{
2749 if (!map->format.parse_val)
2750 return -EINVAL;
2751
2752 *val = map->format.parse_val(buf);
2753
2754 return 0;
2755}
2756EXPORT_SYMBOL_GPL(regmap_parse_val);
2757
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MB
2758static int __init regmap_initcall(void)
2759{
2760 regmap_debugfs_initcall();
2761
2762 return 0;
2763}
2764postcore_initcall(regmap_initcall);
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