regmap: of_regmap_get_endian() cleanup
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
d647c199 18#include <linux/of.h>
6863ca62 19#include <linux/rbtree.h>
30b2a553 20#include <linux/sched.h>
b83a313b 21
fb2736bb
MB
22#define CREATE_TRACE_POINTS
23#include <trace/events/regmap.h>
24
93de9124 25#include "internal.h"
b83a313b 26
1044c180
MB
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35static int _regmap_update_bits(struct regmap *map, unsigned int reg,
36 unsigned int mask, unsigned int val,
37 bool *change);
38
3ac17037
BB
39static int _regmap_bus_reg_read(void *context, unsigned int reg,
40 unsigned int *val);
ad278406
AS
41static int _regmap_bus_read(void *context, unsigned int reg,
42 unsigned int *val);
07c320dc
AS
43static int _regmap_bus_formatted_write(void *context, unsigned int reg,
44 unsigned int val);
3ac17037
BB
45static int _regmap_bus_reg_write(void *context, unsigned int reg,
46 unsigned int val);
07c320dc
AS
47static int _regmap_bus_raw_write(void *context, unsigned int reg,
48 unsigned int val);
ad278406 49
76aad392
DC
50bool regmap_reg_in_ranges(unsigned int reg,
51 const struct regmap_range *ranges,
52 unsigned int nranges)
53{
54 const struct regmap_range *r;
55 int i;
56
57 for (i = 0, r = ranges; i < nranges; i++, r++)
58 if (regmap_reg_in_range(reg, r))
59 return true;
60 return false;
61}
62EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
63
154881e5
MB
64bool regmap_check_range_table(struct regmap *map, unsigned int reg,
65 const struct regmap_access_table *table)
76aad392
DC
66{
67 /* Check "no ranges" first */
68 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
69 return false;
70
71 /* In case zero "yes ranges" are supplied, any reg is OK */
72 if (!table->n_yes_ranges)
73 return true;
74
75 return regmap_reg_in_ranges(reg, table->yes_ranges,
76 table->n_yes_ranges);
77}
154881e5 78EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 79
8de2f081
MB
80bool regmap_writeable(struct regmap *map, unsigned int reg)
81{
82 if (map->max_register && reg > map->max_register)
83 return false;
84
85 if (map->writeable_reg)
86 return map->writeable_reg(map->dev, reg);
87
76aad392 88 if (map->wr_table)
154881e5 89 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 90
8de2f081
MB
91 return true;
92}
93
94bool regmap_readable(struct regmap *map, unsigned int reg)
95{
96 if (map->max_register && reg > map->max_register)
97 return false;
98
4191f197
WS
99 if (map->format.format_write)
100 return false;
101
8de2f081
MB
102 if (map->readable_reg)
103 return map->readable_reg(map->dev, reg);
104
76aad392 105 if (map->rd_table)
154881e5 106 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 107
8de2f081
MB
108 return true;
109}
110
111bool regmap_volatile(struct regmap *map, unsigned int reg)
112{
4191f197 113 if (!regmap_readable(map, reg))
8de2f081
MB
114 return false;
115
116 if (map->volatile_reg)
117 return map->volatile_reg(map->dev, reg);
118
76aad392 119 if (map->volatile_table)
154881e5 120 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 121
b92be6fe
MB
122 if (map->cache_ops)
123 return false;
124 else
125 return true;
8de2f081
MB
126}
127
128bool regmap_precious(struct regmap *map, unsigned int reg)
129{
4191f197 130 if (!regmap_readable(map, reg))
8de2f081
MB
131 return false;
132
133 if (map->precious_reg)
134 return map->precious_reg(map->dev, reg);
135
76aad392 136 if (map->precious_table)
154881e5 137 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 138
8de2f081
MB
139 return false;
140}
141
82cd9965 142static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 143 size_t num)
82cd9965
LPC
144{
145 unsigned int i;
146
147 for (i = 0; i < num; i++)
148 if (!regmap_volatile(map, reg + i))
149 return false;
150
151 return true;
152}
153
9aa50750
WS
154static void regmap_format_2_6_write(struct regmap *map,
155 unsigned int reg, unsigned int val)
156{
157 u8 *out = map->work_buf;
158
159 *out = (reg << 6) | val;
160}
161
b83a313b
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162static void regmap_format_4_12_write(struct regmap *map,
163 unsigned int reg, unsigned int val)
164{
165 __be16 *out = map->work_buf;
166 *out = cpu_to_be16((reg << 12) | val);
167}
168
169static void regmap_format_7_9_write(struct regmap *map,
170 unsigned int reg, unsigned int val)
171{
172 __be16 *out = map->work_buf;
173 *out = cpu_to_be16((reg << 9) | val);
174}
175
7e5ec63e
LPC
176static void regmap_format_10_14_write(struct regmap *map,
177 unsigned int reg, unsigned int val)
178{
179 u8 *out = map->work_buf;
180
181 out[2] = val;
182 out[1] = (val >> 8) | (reg << 6);
183 out[0] = reg >> 2;
184}
185
d939fb9a 186static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
187{
188 u8 *b = buf;
189
d939fb9a 190 b[0] = val << shift;
b83a313b
MB
191}
192
141eba2e 193static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
194{
195 __be16 *b = buf;
196
d939fb9a 197 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
198}
199
4aa8c069
XL
200static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
201{
202 __le16 *b = buf;
203
204 b[0] = cpu_to_le16(val << shift);
205}
206
141eba2e
SW
207static void regmap_format_16_native(void *buf, unsigned int val,
208 unsigned int shift)
209{
210 *(u16 *)buf = val << shift;
211}
212
d939fb9a 213static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
214{
215 u8 *b = buf;
216
d939fb9a
MR
217 val <<= shift;
218
ea279fc5
MR
219 b[0] = val >> 16;
220 b[1] = val >> 8;
221 b[2] = val;
222}
223
141eba2e 224static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
225{
226 __be32 *b = buf;
227
d939fb9a 228 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
229}
230
4aa8c069
XL
231static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
232{
233 __le32 *b = buf;
234
235 b[0] = cpu_to_le32(val << shift);
236}
237
141eba2e
SW
238static void regmap_format_32_native(void *buf, unsigned int val,
239 unsigned int shift)
240{
241 *(u32 *)buf = val << shift;
242}
243
8a819ff8 244static void regmap_parse_inplace_noop(void *buf)
b83a313b 245{
8a819ff8
MB
246}
247
248static unsigned int regmap_parse_8(const void *buf)
249{
250 const u8 *b = buf;
b83a313b
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251
252 return b[0];
253}
254
8a819ff8
MB
255static unsigned int regmap_parse_16_be(const void *buf)
256{
257 const __be16 *b = buf;
258
259 return be16_to_cpu(b[0]);
260}
261
4aa8c069
XL
262static unsigned int regmap_parse_16_le(const void *buf)
263{
264 const __le16 *b = buf;
265
266 return le16_to_cpu(b[0]);
267}
268
8a819ff8 269static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
270{
271 __be16 *b = buf;
272
273 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
274}
275
4aa8c069
XL
276static void regmap_parse_16_le_inplace(void *buf)
277{
278 __le16 *b = buf;
279
280 b[0] = le16_to_cpu(b[0]);
281}
282
8a819ff8 283static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
284{
285 return *(u16 *)buf;
286}
287
8a819ff8 288static unsigned int regmap_parse_24(const void *buf)
ea279fc5 289{
8a819ff8 290 const u8 *b = buf;
ea279fc5
MR
291 unsigned int ret = b[2];
292 ret |= ((unsigned int)b[1]) << 8;
293 ret |= ((unsigned int)b[0]) << 16;
294
295 return ret;
296}
297
8a819ff8
MB
298static unsigned int regmap_parse_32_be(const void *buf)
299{
300 const __be32 *b = buf;
301
302 return be32_to_cpu(b[0]);
303}
304
4aa8c069
XL
305static unsigned int regmap_parse_32_le(const void *buf)
306{
307 const __le32 *b = buf;
308
309 return le32_to_cpu(b[0]);
310}
311
8a819ff8 312static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
313{
314 __be32 *b = buf;
315
316 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
317}
318
4aa8c069
XL
319static void regmap_parse_32_le_inplace(void *buf)
320{
321 __le32 *b = buf;
322
323 b[0] = le32_to_cpu(b[0]);
324}
325
8a819ff8 326static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
327{
328 return *(u32 *)buf;
329}
330
0d4529c5 331static void regmap_lock_mutex(void *__map)
bacdbe07 332{
0d4529c5 333 struct regmap *map = __map;
bacdbe07
SW
334 mutex_lock(&map->mutex);
335}
336
0d4529c5 337static void regmap_unlock_mutex(void *__map)
bacdbe07 338{
0d4529c5 339 struct regmap *map = __map;
bacdbe07
SW
340 mutex_unlock(&map->mutex);
341}
342
0d4529c5 343static void regmap_lock_spinlock(void *__map)
b4519c71 344__acquires(&map->spinlock)
bacdbe07 345{
0d4529c5 346 struct regmap *map = __map;
92ab1aab
LPC
347 unsigned long flags;
348
349 spin_lock_irqsave(&map->spinlock, flags);
350 map->spinlock_flags = flags;
bacdbe07
SW
351}
352
0d4529c5 353static void regmap_unlock_spinlock(void *__map)
b4519c71 354__releases(&map->spinlock)
bacdbe07 355{
0d4529c5 356 struct regmap *map = __map;
92ab1aab 357 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
358}
359
72b39f6f
MB
360static void dev_get_regmap_release(struct device *dev, void *res)
361{
362 /*
363 * We don't actually have anything to do here; the goal here
364 * is not to manage the regmap but to provide a simple way to
365 * get the regmap back given a struct device.
366 */
367}
368
6863ca62
KG
369static bool _regmap_range_add(struct regmap *map,
370 struct regmap_range_node *data)
371{
372 struct rb_root *root = &map->range_tree;
373 struct rb_node **new = &(root->rb_node), *parent = NULL;
374
375 while (*new) {
376 struct regmap_range_node *this =
377 container_of(*new, struct regmap_range_node, node);
378
379 parent = *new;
380 if (data->range_max < this->range_min)
381 new = &((*new)->rb_left);
382 else if (data->range_min > this->range_max)
383 new = &((*new)->rb_right);
384 else
385 return false;
386 }
387
388 rb_link_node(&data->node, parent, new);
389 rb_insert_color(&data->node, root);
390
391 return true;
392}
393
394static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
395 unsigned int reg)
396{
397 struct rb_node *node = map->range_tree.rb_node;
398
399 while (node) {
400 struct regmap_range_node *this =
401 container_of(node, struct regmap_range_node, node);
402
403 if (reg < this->range_min)
404 node = node->rb_left;
405 else if (reg > this->range_max)
406 node = node->rb_right;
407 else
408 return this;
409 }
410
411 return NULL;
412}
413
414static void regmap_range_exit(struct regmap *map)
415{
416 struct rb_node *next;
417 struct regmap_range_node *range_node;
418
419 next = rb_first(&map->range_tree);
420 while (next) {
421 range_node = rb_entry(next, struct regmap_range_node, node);
422 next = rb_next(&range_node->node);
423 rb_erase(&range_node->node, &map->range_tree);
424 kfree(range_node);
425 }
426
427 kfree(map->selector_work_buf);
428}
429
6cfec04b
MS
430int regmap_attach_dev(struct device *dev, struct regmap *map,
431 const struct regmap_config *config)
432{
433 struct regmap **m;
434
435 map->dev = dev;
436
437 regmap_debugfs_init(map, config->name);
438
439 /* Add a devres resource for dev_get_regmap() */
440 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
441 if (!m) {
442 regmap_debugfs_exit(map);
443 return -ENOMEM;
444 }
445 *m = map;
446 devres_add(dev, m);
447
448 return 0;
449}
450EXPORT_SYMBOL_GPL(regmap_attach_dev);
451
d647c199
XL
452enum regmap_endian_type {
453 REGMAP_ENDIAN_REG,
454 REGMAP_ENDIAN_VAL,
455};
456
45e1a279 457static int regmap_get_endian(struct device *dev,
d647c199
XL
458 const struct regmap_bus *bus,
459 const struct regmap_config *config,
460 enum regmap_endian_type type,
461 enum regmap_endian *endian)
462{
463 struct device_node *np = dev->of_node;
464
465 if (!endian || !config)
466 return -EINVAL;
467
45e1a279 468 /* Retrieve the endianness specification from the regmap config */
d647c199
XL
469 switch (type) {
470 case REGMAP_ENDIAN_REG:
471 *endian = config->reg_format_endian;
472 break;
473 case REGMAP_ENDIAN_VAL:
474 *endian = config->val_format_endian;
475 break;
476 default:
477 return -EINVAL;
478 }
479
45e1a279 480 /* If the regmap config specified a non-default value, use that */
d647c199
XL
481 if (*endian != REGMAP_ENDIAN_DEFAULT)
482 return 0;
483
45e1a279 484 /* Parse the device's DT node for an endianness specification */
d647c199
XL
485 switch (type) {
486 case REGMAP_ENDIAN_VAL:
487 if (of_property_read_bool(np, "big-endian"))
488 *endian = REGMAP_ENDIAN_BIG;
489 else if (of_property_read_bool(np, "little-endian"))
490 *endian = REGMAP_ENDIAN_LITTLE;
d647c199
XL
491 break;
492 case REGMAP_ENDIAN_REG:
493 break;
494 default:
495 return -EINVAL;
496 }
497
45e1a279
SW
498 /* If the endianness was specified in DT, use that */
499 if (*endian != REGMAP_ENDIAN_DEFAULT)
500 return 0;
501
502 /* Retrieve the endianness specification from the bus config */
d647c199
XL
503 switch (type) {
504 case REGMAP_ENDIAN_REG:
505 if (bus && bus->reg_format_endian_default)
506 *endian = bus->reg_format_endian_default;
507 break;
508 case REGMAP_ENDIAN_VAL:
509 if (bus && bus->val_format_endian_default)
510 *endian = bus->val_format_endian_default;
511 break;
512 default:
513 return -EINVAL;
514 }
515
45e1a279
SW
516 /* If the bus specified a non-default value, use that */
517 if (*endian != REGMAP_ENDIAN_DEFAULT)
518 return 0;
519
520 /* Use this if no other value was found */
521 *endian = REGMAP_ENDIAN_BIG;
522
d647c199
XL
523 return 0;
524}
525
b83a313b
MB
526/**
527 * regmap_init(): Initialise register map
528 *
529 * @dev: Device that will be interacted with
530 * @bus: Bus-specific callbacks to use with device
0135bbcc 531 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
532 * @config: Configuration for register map
533 *
534 * The return value will be an ERR_PTR() on error or a valid pointer to
535 * a struct regmap. This function should generally not be called
536 * directly, it should be called by bus-specific init functions.
537 */
538struct regmap *regmap_init(struct device *dev,
539 const struct regmap_bus *bus,
0135bbcc 540 void *bus_context,
b83a313b
MB
541 const struct regmap_config *config)
542{
6cfec04b 543 struct regmap *map;
b83a313b 544 int ret = -EINVAL;
141eba2e 545 enum regmap_endian reg_endian, val_endian;
6863ca62 546 int i, j;
b83a313b 547
d2a5884a 548 if (!config)
abbb18fb 549 goto err;
b83a313b
MB
550
551 map = kzalloc(sizeof(*map), GFP_KERNEL);
552 if (map == NULL) {
553 ret = -ENOMEM;
554 goto err;
555 }
556
0d4529c5
DC
557 if (config->lock && config->unlock) {
558 map->lock = config->lock;
559 map->unlock = config->unlock;
560 map->lock_arg = config->lock_arg;
bacdbe07 561 } else {
d2a5884a
AS
562 if ((bus && bus->fast_io) ||
563 config->fast_io) {
0d4529c5
DC
564 spin_lock_init(&map->spinlock);
565 map->lock = regmap_lock_spinlock;
566 map->unlock = regmap_unlock_spinlock;
567 } else {
568 mutex_init(&map->mutex);
569 map->lock = regmap_lock_mutex;
570 map->unlock = regmap_unlock_mutex;
571 }
572 map->lock_arg = map;
bacdbe07 573 }
c212accc 574 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 575 map->format.pad_bytes = config->pad_bits / 8;
c212accc 576 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
577 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
578 config->val_bits + config->pad_bits, 8);
d939fb9a 579 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
580 if (config->reg_stride)
581 map->reg_stride = config->reg_stride;
582 else
583 map->reg_stride = 1;
2e33caf1 584 map->use_single_rw = config->use_single_rw;
e894c3f4 585 map->can_multi_write = config->can_multi_write;
b83a313b
MB
586 map->dev = dev;
587 map->bus = bus;
0135bbcc 588 map->bus_context = bus_context;
2e2ae66d 589 map->max_register = config->max_register;
76aad392
DC
590 map->wr_table = config->wr_table;
591 map->rd_table = config->rd_table;
592 map->volatile_table = config->volatile_table;
593 map->precious_table = config->precious_table;
2e2ae66d
MB
594 map->writeable_reg = config->writeable_reg;
595 map->readable_reg = config->readable_reg;
596 map->volatile_reg = config->volatile_reg;
2efe1642 597 map->precious_reg = config->precious_reg;
5d1729e7 598 map->cache_type = config->cache_type;
72b39f6f 599 map->name = config->name;
b83a313b 600
0d509f2b
MB
601 spin_lock_init(&map->async_lock);
602 INIT_LIST_HEAD(&map->async_list);
7e09a979 603 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
604 init_waitqueue_head(&map->async_waitq);
605
6f306441
LPC
606 if (config->read_flag_mask || config->write_flag_mask) {
607 map->read_flag_mask = config->read_flag_mask;
608 map->write_flag_mask = config->write_flag_mask;
d2a5884a 609 } else if (bus) {
6f306441
LPC
610 map->read_flag_mask = bus->read_flag_mask;
611 }
612
d2a5884a
AS
613 if (!bus) {
614 map->reg_read = config->reg_read;
615 map->reg_write = config->reg_write;
616
3ac17037
BB
617 map->defer_caching = false;
618 goto skip_format_initialization;
619 } else if (!bus->read || !bus->write) {
620 map->reg_read = _regmap_bus_reg_read;
621 map->reg_write = _regmap_bus_reg_write;
622
d2a5884a
AS
623 map->defer_caching = false;
624 goto skip_format_initialization;
625 } else {
626 map->reg_read = _regmap_bus_read;
627 }
ad278406 628
45e1a279
SW
629 ret = regmap_get_endian(dev, bus, config, REGMAP_ENDIAN_REG,
630 &reg_endian);
d647c199
XL
631 if (ret)
632 return ERR_PTR(ret);
633
45e1a279
SW
634 ret = regmap_get_endian(dev, bus, config, REGMAP_ENDIAN_VAL,
635 &val_endian);
d647c199
XL
636 if (ret)
637 return ERR_PTR(ret);
141eba2e 638
d939fb9a 639 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
640 case 2:
641 switch (config->val_bits) {
642 case 6:
643 map->format.format_write = regmap_format_2_6_write;
644 break;
645 default:
646 goto err_map;
647 }
648 break;
649
b83a313b
MB
650 case 4:
651 switch (config->val_bits) {
652 case 12:
653 map->format.format_write = regmap_format_4_12_write;
654 break;
655 default:
656 goto err_map;
657 }
658 break;
659
660 case 7:
661 switch (config->val_bits) {
662 case 9:
663 map->format.format_write = regmap_format_7_9_write;
664 break;
665 default:
666 goto err_map;
667 }
668 break;
669
7e5ec63e
LPC
670 case 10:
671 switch (config->val_bits) {
672 case 14:
673 map->format.format_write = regmap_format_10_14_write;
674 break;
675 default:
676 goto err_map;
677 }
678 break;
679
b83a313b
MB
680 case 8:
681 map->format.format_reg = regmap_format_8;
682 break;
683
684 case 16:
141eba2e
SW
685 switch (reg_endian) {
686 case REGMAP_ENDIAN_BIG:
687 map->format.format_reg = regmap_format_16_be;
688 break;
689 case REGMAP_ENDIAN_NATIVE:
690 map->format.format_reg = regmap_format_16_native;
691 break;
692 default:
693 goto err_map;
694 }
b83a313b
MB
695 break;
696
237019e7
LPC
697 case 24:
698 if (reg_endian != REGMAP_ENDIAN_BIG)
699 goto err_map;
700 map->format.format_reg = regmap_format_24;
701 break;
702
7d5e525b 703 case 32:
141eba2e
SW
704 switch (reg_endian) {
705 case REGMAP_ENDIAN_BIG:
706 map->format.format_reg = regmap_format_32_be;
707 break;
708 case REGMAP_ENDIAN_NATIVE:
709 map->format.format_reg = regmap_format_32_native;
710 break;
711 default:
712 goto err_map;
713 }
7d5e525b
MB
714 break;
715
b83a313b
MB
716 default:
717 goto err_map;
718 }
719
8a819ff8
MB
720 if (val_endian == REGMAP_ENDIAN_NATIVE)
721 map->format.parse_inplace = regmap_parse_inplace_noop;
722
b83a313b
MB
723 switch (config->val_bits) {
724 case 8:
725 map->format.format_val = regmap_format_8;
726 map->format.parse_val = regmap_parse_8;
8a819ff8 727 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
728 break;
729 case 16:
141eba2e
SW
730 switch (val_endian) {
731 case REGMAP_ENDIAN_BIG:
732 map->format.format_val = regmap_format_16_be;
733 map->format.parse_val = regmap_parse_16_be;
8a819ff8 734 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 735 break;
4aa8c069
XL
736 case REGMAP_ENDIAN_LITTLE:
737 map->format.format_val = regmap_format_16_le;
738 map->format.parse_val = regmap_parse_16_le;
739 map->format.parse_inplace = regmap_parse_16_le_inplace;
740 break;
141eba2e
SW
741 case REGMAP_ENDIAN_NATIVE:
742 map->format.format_val = regmap_format_16_native;
743 map->format.parse_val = regmap_parse_16_native;
744 break;
745 default:
746 goto err_map;
747 }
b83a313b 748 break;
ea279fc5 749 case 24:
141eba2e
SW
750 if (val_endian != REGMAP_ENDIAN_BIG)
751 goto err_map;
ea279fc5
MR
752 map->format.format_val = regmap_format_24;
753 map->format.parse_val = regmap_parse_24;
754 break;
7d5e525b 755 case 32:
141eba2e
SW
756 switch (val_endian) {
757 case REGMAP_ENDIAN_BIG:
758 map->format.format_val = regmap_format_32_be;
759 map->format.parse_val = regmap_parse_32_be;
8a819ff8 760 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 761 break;
4aa8c069
XL
762 case REGMAP_ENDIAN_LITTLE:
763 map->format.format_val = regmap_format_32_le;
764 map->format.parse_val = regmap_parse_32_le;
765 map->format.parse_inplace = regmap_parse_32_le_inplace;
766 break;
141eba2e
SW
767 case REGMAP_ENDIAN_NATIVE:
768 map->format.format_val = regmap_format_32_native;
769 map->format.parse_val = regmap_parse_32_native;
770 break;
771 default:
772 goto err_map;
773 }
7d5e525b 774 break;
b83a313b
MB
775 }
776
141eba2e
SW
777 if (map->format.format_write) {
778 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
779 (val_endian != REGMAP_ENDIAN_BIG))
780 goto err_map;
7a647614 781 map->use_single_rw = true;
141eba2e 782 }
7a647614 783
b83a313b
MB
784 if (!map->format.format_write &&
785 !(map->format.format_reg && map->format.format_val))
786 goto err_map;
787
82159ba8 788 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
789 if (map->work_buf == NULL) {
790 ret = -ENOMEM;
5204f5e3 791 goto err_map;
b83a313b
MB
792 }
793
d2a5884a
AS
794 if (map->format.format_write) {
795 map->defer_caching = false;
07c320dc 796 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
797 } else if (map->format.format_val) {
798 map->defer_caching = true;
07c320dc 799 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
800 }
801
802skip_format_initialization:
07c320dc 803
6863ca62 804 map->range_tree = RB_ROOT;
e3549cd0 805 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
806 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
807 struct regmap_range_node *new;
808
809 /* Sanity check */
061adc06
MB
810 if (range_cfg->range_max < range_cfg->range_min) {
811 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
812 range_cfg->range_max, range_cfg->range_min);
6863ca62 813 goto err_range;
061adc06
MB
814 }
815
816 if (range_cfg->range_max > map->max_register) {
817 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
818 range_cfg->range_max, map->max_register);
819 goto err_range;
820 }
821
822 if (range_cfg->selector_reg > map->max_register) {
823 dev_err(map->dev,
824 "Invalid range %d: selector out of map\n", i);
825 goto err_range;
826 }
827
828 if (range_cfg->window_len == 0) {
829 dev_err(map->dev, "Invalid range %d: window_len 0\n",
830 i);
831 goto err_range;
832 }
6863ca62
KG
833
834 /* Make sure, that this register range has no selector
835 or data window within its boundary */
e3549cd0 836 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
837 unsigned sel_reg = config->ranges[j].selector_reg;
838 unsigned win_min = config->ranges[j].window_start;
839 unsigned win_max = win_min +
840 config->ranges[j].window_len - 1;
841
f161d220
PZ
842 /* Allow data window inside its own virtual range */
843 if (j == i)
844 continue;
845
6863ca62
KG
846 if (range_cfg->range_min <= sel_reg &&
847 sel_reg <= range_cfg->range_max) {
061adc06
MB
848 dev_err(map->dev,
849 "Range %d: selector for %d in window\n",
850 i, j);
6863ca62
KG
851 goto err_range;
852 }
853
854 if (!(win_max < range_cfg->range_min ||
855 win_min > range_cfg->range_max)) {
061adc06
MB
856 dev_err(map->dev,
857 "Range %d: window for %d in window\n",
858 i, j);
6863ca62
KG
859 goto err_range;
860 }
861 }
862
863 new = kzalloc(sizeof(*new), GFP_KERNEL);
864 if (new == NULL) {
865 ret = -ENOMEM;
866 goto err_range;
867 }
868
4b020b3f 869 new->map = map;
d058bb49 870 new->name = range_cfg->name;
6863ca62
KG
871 new->range_min = range_cfg->range_min;
872 new->range_max = range_cfg->range_max;
873 new->selector_reg = range_cfg->selector_reg;
874 new->selector_mask = range_cfg->selector_mask;
875 new->selector_shift = range_cfg->selector_shift;
876 new->window_start = range_cfg->window_start;
877 new->window_len = range_cfg->window_len;
878
53e87f88 879 if (!_regmap_range_add(map, new)) {
061adc06 880 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
881 kfree(new);
882 goto err_range;
883 }
884
885 if (map->selector_work_buf == NULL) {
886 map->selector_work_buf =
887 kzalloc(map->format.buf_size, GFP_KERNEL);
888 if (map->selector_work_buf == NULL) {
889 ret = -ENOMEM;
890 goto err_range;
891 }
892 }
893 }
052d2cd1 894
e5e3b8ab 895 ret = regcache_init(map, config);
0ff3e62f 896 if (ret != 0)
6863ca62
KG
897 goto err_range;
898
a7a037c8 899 if (dev) {
6cfec04b
MS
900 ret = regmap_attach_dev(dev, map, config);
901 if (ret != 0)
902 goto err_regcache;
a7a037c8 903 }
72b39f6f 904
b83a313b
MB
905 return map;
906
6cfec04b 907err_regcache:
72b39f6f 908 regcache_exit(map);
6863ca62
KG
909err_range:
910 regmap_range_exit(map);
58072cbf 911 kfree(map->work_buf);
b83a313b
MB
912err_map:
913 kfree(map);
914err:
915 return ERR_PTR(ret);
916}
917EXPORT_SYMBOL_GPL(regmap_init);
918
c0eb4676
MB
919static void devm_regmap_release(struct device *dev, void *res)
920{
921 regmap_exit(*(struct regmap **)res);
922}
923
924/**
925 * devm_regmap_init(): Initialise managed register map
926 *
927 * @dev: Device that will be interacted with
928 * @bus: Bus-specific callbacks to use with device
0135bbcc 929 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
930 * @config: Configuration for register map
931 *
932 * The return value will be an ERR_PTR() on error or a valid pointer
933 * to a struct regmap. This function should generally not be called
934 * directly, it should be called by bus-specific init functions. The
935 * map will be automatically freed by the device management code.
936 */
937struct regmap *devm_regmap_init(struct device *dev,
938 const struct regmap_bus *bus,
0135bbcc 939 void *bus_context,
c0eb4676
MB
940 const struct regmap_config *config)
941{
942 struct regmap **ptr, *regmap;
943
944 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
945 if (!ptr)
946 return ERR_PTR(-ENOMEM);
947
0135bbcc 948 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
949 if (!IS_ERR(regmap)) {
950 *ptr = regmap;
951 devres_add(dev, ptr);
952 } else {
953 devres_free(ptr);
954 }
955
956 return regmap;
957}
958EXPORT_SYMBOL_GPL(devm_regmap_init);
959
67252287
SK
960static void regmap_field_init(struct regmap_field *rm_field,
961 struct regmap *regmap, struct reg_field reg_field)
962{
963 int field_bits = reg_field.msb - reg_field.lsb + 1;
964 rm_field->regmap = regmap;
965 rm_field->reg = reg_field.reg;
966 rm_field->shift = reg_field.lsb;
967 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
a0102375
KM
968 rm_field->id_size = reg_field.id_size;
969 rm_field->id_offset = reg_field.id_offset;
67252287
SK
970}
971
972/**
973 * devm_regmap_field_alloc(): Allocate and initialise a register field
974 * in a register map.
975 *
976 * @dev: Device that will be interacted with
977 * @regmap: regmap bank in which this register field is located.
978 * @reg_field: Register field with in the bank.
979 *
980 * The return value will be an ERR_PTR() on error or a valid pointer
981 * to a struct regmap_field. The regmap_field will be automatically freed
982 * by the device management code.
983 */
984struct regmap_field *devm_regmap_field_alloc(struct device *dev,
985 struct regmap *regmap, struct reg_field reg_field)
986{
987 struct regmap_field *rm_field = devm_kzalloc(dev,
988 sizeof(*rm_field), GFP_KERNEL);
989 if (!rm_field)
990 return ERR_PTR(-ENOMEM);
991
992 regmap_field_init(rm_field, regmap, reg_field);
993
994 return rm_field;
995
996}
997EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
998
999/**
1000 * devm_regmap_field_free(): Free register field allocated using
1001 * devm_regmap_field_alloc. Usally drivers need not call this function,
1002 * as the memory allocated via devm will be freed as per device-driver
1003 * life-cyle.
1004 *
1005 * @dev: Device that will be interacted with
1006 * @field: regmap field which should be freed.
1007 */
1008void devm_regmap_field_free(struct device *dev,
1009 struct regmap_field *field)
1010{
1011 devm_kfree(dev, field);
1012}
1013EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1014
1015/**
1016 * regmap_field_alloc(): Allocate and initialise a register field
1017 * in a register map.
1018 *
1019 * @regmap: regmap bank in which this register field is located.
1020 * @reg_field: Register field with in the bank.
1021 *
1022 * The return value will be an ERR_PTR() on error or a valid pointer
1023 * to a struct regmap_field. The regmap_field should be freed by the
1024 * user once its finished working with it using regmap_field_free().
1025 */
1026struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1027 struct reg_field reg_field)
1028{
1029 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1030
1031 if (!rm_field)
1032 return ERR_PTR(-ENOMEM);
1033
1034 regmap_field_init(rm_field, regmap, reg_field);
1035
1036 return rm_field;
1037}
1038EXPORT_SYMBOL_GPL(regmap_field_alloc);
1039
1040/**
1041 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1042 *
1043 * @field: regmap field which should be freed.
1044 */
1045void regmap_field_free(struct regmap_field *field)
1046{
1047 kfree(field);
1048}
1049EXPORT_SYMBOL_GPL(regmap_field_free);
1050
bf315173
MB
1051/**
1052 * regmap_reinit_cache(): Reinitialise the current register cache
1053 *
1054 * @map: Register map to operate on.
1055 * @config: New configuration. Only the cache data will be used.
1056 *
1057 * Discard any existing register cache for the map and initialize a
1058 * new cache. This can be used to restore the cache to defaults or to
1059 * update the cache configuration to reflect runtime discovery of the
1060 * hardware.
4d879514
DP
1061 *
1062 * No explicit locking is done here, the user needs to ensure that
1063 * this function will not race with other calls to regmap.
bf315173
MB
1064 */
1065int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1066{
bf315173 1067 regcache_exit(map);
a24f64a6 1068 regmap_debugfs_exit(map);
bf315173
MB
1069
1070 map->max_register = config->max_register;
1071 map->writeable_reg = config->writeable_reg;
1072 map->readable_reg = config->readable_reg;
1073 map->volatile_reg = config->volatile_reg;
1074 map->precious_reg = config->precious_reg;
1075 map->cache_type = config->cache_type;
1076
d3c242e1 1077 regmap_debugfs_init(map, config->name);
a24f64a6 1078
421e8d2d
MB
1079 map->cache_bypass = false;
1080 map->cache_only = false;
1081
4d879514 1082 return regcache_init(map, config);
bf315173 1083}
752a6a5f 1084EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1085
b83a313b
MB
1086/**
1087 * regmap_exit(): Free a previously allocated register map
1088 */
1089void regmap_exit(struct regmap *map)
1090{
7e09a979
MB
1091 struct regmap_async *async;
1092
5d1729e7 1093 regcache_exit(map);
31244e39 1094 regmap_debugfs_exit(map);
6863ca62 1095 regmap_range_exit(map);
d2a5884a 1096 if (map->bus && map->bus->free_context)
0135bbcc 1097 map->bus->free_context(map->bus_context);
b83a313b 1098 kfree(map->work_buf);
7e09a979
MB
1099 while (!list_empty(&map->async_free)) {
1100 async = list_first_entry_or_null(&map->async_free,
1101 struct regmap_async,
1102 list);
1103 list_del(&async->list);
1104 kfree(async->work_buf);
1105 kfree(async);
1106 }
b83a313b
MB
1107 kfree(map);
1108}
1109EXPORT_SYMBOL_GPL(regmap_exit);
1110
72b39f6f
MB
1111static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1112{
1113 struct regmap **r = res;
1114 if (!r || !*r) {
1115 WARN_ON(!r || !*r);
1116 return 0;
1117 }
1118
1119 /* If the user didn't specify a name match any */
1120 if (data)
1121 return (*r)->name == data;
1122 else
1123 return 1;
1124}
1125
1126/**
1127 * dev_get_regmap(): Obtain the regmap (if any) for a device
1128 *
1129 * @dev: Device to retrieve the map for
1130 * @name: Optional name for the register map, usually NULL.
1131 *
1132 * Returns the regmap for the device if one is present, or NULL. If
1133 * name is specified then it must match the name specified when
1134 * registering the device, if it is NULL then the first regmap found
1135 * will be used. Devices with multiple register maps are very rare,
1136 * generic code should normally not need to specify a name.
1137 */
1138struct regmap *dev_get_regmap(struct device *dev, const char *name)
1139{
1140 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1141 dev_get_regmap_match, (void *)name);
1142
1143 if (!r)
1144 return NULL;
1145 return *r;
1146}
1147EXPORT_SYMBOL_GPL(dev_get_regmap);
1148
8d7d3972
TT
1149/**
1150 * regmap_get_device(): Obtain the device from a regmap
1151 *
1152 * @map: Register map to operate on.
1153 *
1154 * Returns the underlying device that the regmap has been created for.
1155 */
1156struct device *regmap_get_device(struct regmap *map)
1157{
1158 return map->dev;
1159}
fa2fbe4a 1160EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1161
6863ca62 1162static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1163 struct regmap_range_node *range,
6863ca62
KG
1164 unsigned int val_num)
1165{
6863ca62
KG
1166 void *orig_work_buf;
1167 unsigned int win_offset;
1168 unsigned int win_page;
1169 bool page_chg;
1170 int ret;
1171
98bc7dfd
MB
1172 win_offset = (*reg - range->range_min) % range->window_len;
1173 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1174
98bc7dfd
MB
1175 if (val_num > 1) {
1176 /* Bulk write shouldn't cross range boundary */
1177 if (*reg + val_num - 1 > range->range_max)
1178 return -EINVAL;
6863ca62 1179
98bc7dfd
MB
1180 /* ... or single page boundary */
1181 if (val_num > range->window_len - win_offset)
1182 return -EINVAL;
1183 }
6863ca62 1184
98bc7dfd
MB
1185 /* It is possible to have selector register inside data window.
1186 In that case, selector register is located on every page and
1187 it needs no page switching, when accessed alone. */
1188 if (val_num > 1 ||
1189 range->window_start + win_offset != range->selector_reg) {
1190 /* Use separate work_buf during page switching */
1191 orig_work_buf = map->work_buf;
1192 map->work_buf = map->selector_work_buf;
6863ca62 1193
98bc7dfd
MB
1194 ret = _regmap_update_bits(map, range->selector_reg,
1195 range->selector_mask,
1196 win_page << range->selector_shift,
1197 &page_chg);
632a5b01 1198
98bc7dfd 1199 map->work_buf = orig_work_buf;
6863ca62 1200
0ff3e62f 1201 if (ret != 0)
98bc7dfd 1202 return ret;
6863ca62
KG
1203 }
1204
98bc7dfd
MB
1205 *reg = range->window_start + win_offset;
1206
6863ca62
KG
1207 return 0;
1208}
1209
584de329 1210int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1211 const void *val, size_t val_len)
b83a313b 1212{
98bc7dfd 1213 struct regmap_range_node *range;
0d509f2b 1214 unsigned long flags;
6f306441 1215 u8 *u8 = map->work_buf;
0d509f2b
MB
1216 void *work_val = map->work_buf + map->format.reg_bytes +
1217 map->format.pad_bytes;
b83a313b
MB
1218 void *buf;
1219 int ret = -ENOTSUPP;
1220 size_t len;
73304781
MB
1221 int i;
1222
f1b5c5c3 1223 WARN_ON(!map->bus);
d2a5884a 1224
73304781
MB
1225 /* Check for unwritable registers before we start */
1226 if (map->writeable_reg)
1227 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1228 if (!map->writeable_reg(map->dev,
1229 reg + (i * map->reg_stride)))
73304781 1230 return -EINVAL;
b83a313b 1231
c9157198
LD
1232 if (!map->cache_bypass && map->format.parse_val) {
1233 unsigned int ival;
1234 int val_bytes = map->format.val_bytes;
1235 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1236 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1237 ret = regcache_write(map, reg + (i * map->reg_stride),
1238 ival);
c9157198
LD
1239 if (ret) {
1240 dev_err(map->dev,
6d04b8ac 1241 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1242 reg + i, ret);
1243 return ret;
1244 }
1245 }
1246 if (map->cache_only) {
1247 map->cache_dirty = true;
1248 return 0;
1249 }
1250 }
1251
98bc7dfd
MB
1252 range = _regmap_range_lookup(map, reg);
1253 if (range) {
8a2ceac6
MB
1254 int val_num = val_len / map->format.val_bytes;
1255 int win_offset = (reg - range->range_min) % range->window_len;
1256 int win_residue = range->window_len - win_offset;
1257
1258 /* If the write goes beyond the end of the window split it */
1259 while (val_num > win_residue) {
1a61cfe3 1260 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1261 win_residue, val_len / map->format.val_bytes);
1262 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1263 map->format.val_bytes);
8a2ceac6
MB
1264 if (ret != 0)
1265 return ret;
1266
1267 reg += win_residue;
1268 val_num -= win_residue;
1269 val += win_residue * map->format.val_bytes;
1270 val_len -= win_residue * map->format.val_bytes;
1271
1272 win_offset = (reg - range->range_min) %
1273 range->window_len;
1274 win_residue = range->window_len - win_offset;
1275 }
1276
1277 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1278 if (ret != 0)
98bc7dfd
MB
1279 return ret;
1280 }
6863ca62 1281
d939fb9a 1282 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1283
6f306441
LPC
1284 u8[0] |= map->write_flag_mask;
1285
651e013e
MB
1286 /*
1287 * Essentially all I/O mechanisms will be faster with a single
1288 * buffer to write. Since register syncs often generate raw
1289 * writes of single registers optimise that case.
1290 */
1291 if (val != work_val && val_len == map->format.val_bytes) {
1292 memcpy(work_val, val, map->format.val_bytes);
1293 val = work_val;
1294 }
1295
0a819809 1296 if (map->async && map->bus->async_write) {
7e09a979 1297 struct regmap_async *async;
0d509f2b 1298
fe7d4ccd
MB
1299 trace_regmap_async_write_start(map->dev, reg, val_len);
1300
7e09a979
MB
1301 spin_lock_irqsave(&map->async_lock, flags);
1302 async = list_first_entry_or_null(&map->async_free,
1303 struct regmap_async,
1304 list);
1305 if (async)
1306 list_del(&async->list);
1307 spin_unlock_irqrestore(&map->async_lock, flags);
1308
1309 if (!async) {
1310 async = map->bus->async_alloc();
1311 if (!async)
1312 return -ENOMEM;
1313
1314 async->work_buf = kzalloc(map->format.buf_size,
1315 GFP_KERNEL | GFP_DMA);
1316 if (!async->work_buf) {
1317 kfree(async);
1318 return -ENOMEM;
1319 }
0d509f2b
MB
1320 }
1321
0d509f2b
MB
1322 async->map = map;
1323
1324 /* If the caller supplied the value we can use it safely. */
1325 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1326 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1327
1328 spin_lock_irqsave(&map->async_lock, flags);
1329 list_add_tail(&async->list, &map->async_list);
1330 spin_unlock_irqrestore(&map->async_lock, flags);
1331
04c50ccf
MB
1332 if (val != work_val)
1333 ret = map->bus->async_write(map->bus_context,
1334 async->work_buf,
1335 map->format.reg_bytes +
1336 map->format.pad_bytes,
1337 val, val_len, async);
1338 else
1339 ret = map->bus->async_write(map->bus_context,
1340 async->work_buf,
1341 map->format.reg_bytes +
1342 map->format.pad_bytes +
1343 val_len, NULL, 0, async);
0d509f2b
MB
1344
1345 if (ret != 0) {
1346 dev_err(map->dev, "Failed to schedule write: %d\n",
1347 ret);
1348
1349 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1350 list_move(&async->list, &map->async_free);
0d509f2b 1351 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1352 }
f951b658
MB
1353
1354 return ret;
0d509f2b
MB
1355 }
1356
fb2736bb
MB
1357 trace_regmap_hw_write_start(map->dev, reg,
1358 val_len / map->format.val_bytes);
1359
2547e201
MB
1360 /* If we're doing a single register write we can probably just
1361 * send the work_buf directly, otherwise try to do a gather
1362 * write.
1363 */
0d509f2b 1364 if (val == work_val)
0135bbcc 1365 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1366 map->format.reg_bytes +
1367 map->format.pad_bytes +
1368 val_len);
2547e201 1369 else if (map->bus->gather_write)
0135bbcc 1370 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1371 map->format.reg_bytes +
1372 map->format.pad_bytes,
b83a313b
MB
1373 val, val_len);
1374
2547e201 1375 /* If that didn't work fall back on linearising by hand. */
b83a313b 1376 if (ret == -ENOTSUPP) {
82159ba8
MB
1377 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1378 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1379 if (!buf)
1380 return -ENOMEM;
1381
1382 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1383 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1384 val, val_len);
0135bbcc 1385 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1386
1387 kfree(buf);
1388 }
1389
fb2736bb
MB
1390 trace_regmap_hw_write_done(map->dev, reg,
1391 val_len / map->format.val_bytes);
1392
b83a313b
MB
1393 return ret;
1394}
1395
221ad7f2
MB
1396/**
1397 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1398 *
1399 * @map: Map to check.
1400 */
1401bool regmap_can_raw_write(struct regmap *map)
1402{
1403 return map->bus && map->format.format_val && map->format.format_reg;
1404}
1405EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1406
07c320dc
AS
1407static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1408 unsigned int val)
1409{
1410 int ret;
1411 struct regmap_range_node *range;
1412 struct regmap *map = context;
1413
f1b5c5c3 1414 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1415
1416 range = _regmap_range_lookup(map, reg);
1417 if (range) {
1418 ret = _regmap_select_page(map, &reg, range, 1);
1419 if (ret != 0)
1420 return ret;
1421 }
1422
1423 map->format.format_write(map, reg, val);
1424
1425 trace_regmap_hw_write_start(map->dev, reg, 1);
1426
1427 ret = map->bus->write(map->bus_context, map->work_buf,
1428 map->format.buf_size);
1429
1430 trace_regmap_hw_write_done(map->dev, reg, 1);
1431
1432 return ret;
1433}
1434
3ac17037
BB
1435static int _regmap_bus_reg_write(void *context, unsigned int reg,
1436 unsigned int val)
1437{
1438 struct regmap *map = context;
1439
1440 return map->bus->reg_write(map->bus_context, reg, val);
1441}
1442
07c320dc
AS
1443static int _regmap_bus_raw_write(void *context, unsigned int reg,
1444 unsigned int val)
1445{
1446 struct regmap *map = context;
1447
f1b5c5c3 1448 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1449
1450 map->format.format_val(map->work_buf + map->format.reg_bytes
1451 + map->format.pad_bytes, val, 0);
1452 return _regmap_raw_write(map, reg,
1453 map->work_buf +
1454 map->format.reg_bytes +
1455 map->format.pad_bytes,
0a819809 1456 map->format.val_bytes);
07c320dc
AS
1457}
1458
d2a5884a
AS
1459static inline void *_regmap_map_get_context(struct regmap *map)
1460{
1461 return (map->bus) ? map : map->bus_context;
1462}
1463
4d2dc095
DP
1464int _regmap_write(struct regmap *map, unsigned int reg,
1465 unsigned int val)
b83a313b 1466{
fb2736bb 1467 int ret;
d2a5884a 1468 void *context = _regmap_map_get_context(map);
b83a313b 1469
515f2261
IN
1470 if (!regmap_writeable(map, reg))
1471 return -EIO;
1472
d2a5884a 1473 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1474 ret = regcache_write(map, reg, val);
1475 if (ret != 0)
1476 return ret;
8ae0d7e8
MB
1477 if (map->cache_only) {
1478 map->cache_dirty = true;
5d1729e7 1479 return 0;
8ae0d7e8 1480 }
5d1729e7
DP
1481 }
1482
1044c180
MB
1483#ifdef LOG_DEVICE
1484 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1485 dev_info(map->dev, "%x <= %x\n", reg, val);
1486#endif
1487
fb2736bb
MB
1488 trace_regmap_reg_write(map->dev, reg, val);
1489
d2a5884a 1490 return map->reg_write(context, reg, val);
b83a313b
MB
1491}
1492
1493/**
1494 * regmap_write(): Write a value to a single register
1495 *
1496 * @map: Register map to write to
1497 * @reg: Register to write to
1498 * @val: Value to be written
1499 *
1500 * A value of zero will be returned on success, a negative errno will
1501 * be returned in error cases.
1502 */
1503int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1504{
1505 int ret;
1506
f01ee60f
SW
1507 if (reg % map->reg_stride)
1508 return -EINVAL;
1509
0d4529c5 1510 map->lock(map->lock_arg);
b83a313b
MB
1511
1512 ret = _regmap_write(map, reg, val);
1513
0d4529c5 1514 map->unlock(map->lock_arg);
b83a313b
MB
1515
1516 return ret;
1517}
1518EXPORT_SYMBOL_GPL(regmap_write);
1519
915f441b
MB
1520/**
1521 * regmap_write_async(): Write a value to a single register asynchronously
1522 *
1523 * @map: Register map to write to
1524 * @reg: Register to write to
1525 * @val: Value to be written
1526 *
1527 * A value of zero will be returned on success, a negative errno will
1528 * be returned in error cases.
1529 */
1530int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1531{
1532 int ret;
1533
1534 if (reg % map->reg_stride)
1535 return -EINVAL;
1536
1537 map->lock(map->lock_arg);
1538
1539 map->async = true;
1540
1541 ret = _regmap_write(map, reg, val);
1542
1543 map->async = false;
1544
1545 map->unlock(map->lock_arg);
1546
1547 return ret;
1548}
1549EXPORT_SYMBOL_GPL(regmap_write_async);
1550
b83a313b
MB
1551/**
1552 * regmap_raw_write(): Write raw values to one or more registers
1553 *
1554 * @map: Register map to write to
1555 * @reg: Initial register to write to
1556 * @val: Block of data to be written, laid out for direct transmission to the
1557 * device
1558 * @val_len: Length of data pointed to by val.
1559 *
1560 * This function is intended to be used for things like firmware
1561 * download where a large block of data needs to be transferred to the
1562 * device. No formatting will be done on the data provided.
1563 *
1564 * A value of zero will be returned on success, a negative errno will
1565 * be returned in error cases.
1566 */
1567int regmap_raw_write(struct regmap *map, unsigned int reg,
1568 const void *val, size_t val_len)
1569{
1570 int ret;
1571
221ad7f2 1572 if (!regmap_can_raw_write(map))
d2a5884a 1573 return -EINVAL;
851960ba
SW
1574 if (val_len % map->format.val_bytes)
1575 return -EINVAL;
1576
0d4529c5 1577 map->lock(map->lock_arg);
b83a313b 1578
0a819809 1579 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1580
0d4529c5 1581 map->unlock(map->lock_arg);
b83a313b
MB
1582
1583 return ret;
1584}
1585EXPORT_SYMBOL_GPL(regmap_raw_write);
1586
67252287
SK
1587/**
1588 * regmap_field_write(): Write a value to a single register field
1589 *
1590 * @field: Register field to write to
1591 * @val: Value to be written
1592 *
1593 * A value of zero will be returned on success, a negative errno will
1594 * be returned in error cases.
1595 */
1596int regmap_field_write(struct regmap_field *field, unsigned int val)
1597{
1598 return regmap_update_bits(field->regmap, field->reg,
1599 field->mask, val << field->shift);
1600}
1601EXPORT_SYMBOL_GPL(regmap_field_write);
1602
fdf20029
KM
1603/**
1604 * regmap_field_update_bits(): Perform a read/modify/write cycle
1605 * on the register field
1606 *
1607 * @field: Register field to write to
1608 * @mask: Bitmask to change
1609 * @val: Value to be written
1610 *
1611 * A value of zero will be returned on success, a negative errno will
1612 * be returned in error cases.
1613 */
1614int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1615{
1616 mask = (mask << field->shift) & field->mask;
1617
1618 return regmap_update_bits(field->regmap, field->reg,
1619 mask, val << field->shift);
1620}
1621EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1622
a0102375
KM
1623/**
1624 * regmap_fields_write(): Write a value to a single register field with port ID
1625 *
1626 * @field: Register field to write to
1627 * @id: port ID
1628 * @val: Value to be written
1629 *
1630 * A value of zero will be returned on success, a negative errno will
1631 * be returned in error cases.
1632 */
1633int regmap_fields_write(struct regmap_field *field, unsigned int id,
1634 unsigned int val)
1635{
1636 if (id >= field->id_size)
1637 return -EINVAL;
1638
1639 return regmap_update_bits(field->regmap,
1640 field->reg + (field->id_offset * id),
1641 field->mask, val << field->shift);
1642}
1643EXPORT_SYMBOL_GPL(regmap_fields_write);
1644
1645/**
1646 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1647 * on the register field
1648 *
1649 * @field: Register field to write to
1650 * @id: port ID
1651 * @mask: Bitmask to change
1652 * @val: Value to be written
1653 *
1654 * A value of zero will be returned on success, a negative errno will
1655 * be returned in error cases.
1656 */
1657int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1658 unsigned int mask, unsigned int val)
1659{
1660 if (id >= field->id_size)
1661 return -EINVAL;
1662
1663 mask = (mask << field->shift) & field->mask;
1664
1665 return regmap_update_bits(field->regmap,
1666 field->reg + (field->id_offset * id),
1667 mask, val << field->shift);
1668}
1669EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1670
8eaeb219
LD
1671/*
1672 * regmap_bulk_write(): Write multiple registers to the device
1673 *
1674 * @map: Register map to write to
1675 * @reg: First register to be write from
1676 * @val: Block of data to be written, in native register size for device
1677 * @val_count: Number of registers to write
1678 *
1679 * This function is intended to be used for writing a large block of
31b35e9e 1680 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1681 *
1682 * A value of zero will be returned on success, a negative errno will
1683 * be returned in error cases.
1684 */
1685int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1686 size_t val_count)
1687{
1688 int ret = 0, i;
1689 size_t val_bytes = map->format.val_bytes;
8eaeb219 1690
f4298360 1691 if (map->bus && !map->format.parse_inplace)
8eaeb219 1692 return -EINVAL;
f01ee60f
SW
1693 if (reg % map->reg_stride)
1694 return -EINVAL;
8eaeb219 1695
f4298360
SB
1696 /*
1697 * Some devices don't support bulk write, for
1698 * them we have a series of single write operations.
1699 */
1700 if (!map->bus || map->use_single_rw) {
4999e962 1701 map->lock(map->lock_arg);
f4298360
SB
1702 for (i = 0; i < val_count; i++) {
1703 unsigned int ival;
1704
1705 switch (val_bytes) {
1706 case 1:
1707 ival = *(u8 *)(val + (i * val_bytes));
1708 break;
1709 case 2:
1710 ival = *(u16 *)(val + (i * val_bytes));
1711 break;
1712 case 4:
1713 ival = *(u32 *)(val + (i * val_bytes));
1714 break;
1715#ifdef CONFIG_64BIT
1716 case 8:
1717 ival = *(u64 *)(val + (i * val_bytes));
1718 break;
1719#endif
1720 default:
1721 ret = -EINVAL;
1722 goto out;
1723 }
8eaeb219 1724
f4298360
SB
1725 ret = _regmap_write(map, reg + (i * map->reg_stride),
1726 ival);
1727 if (ret != 0)
1728 goto out;
1729 }
4999e962
TI
1730out:
1731 map->unlock(map->lock_arg);
8eaeb219 1732 } else {
f4298360
SB
1733 void *wval;
1734
8eaeb219
LD
1735 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1736 if (!wval) {
8eaeb219 1737 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1738 return -ENOMEM;
8eaeb219
LD
1739 }
1740 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1741 map->format.parse_inplace(wval + i);
f4298360 1742
4999e962 1743 map->lock(map->lock_arg);
0a819809 1744 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1745 map->unlock(map->lock_arg);
8eaeb219 1746
8eaeb219 1747 kfree(wval);
f4298360 1748 }
8eaeb219
LD
1749 return ret;
1750}
1751EXPORT_SYMBOL_GPL(regmap_bulk_write);
1752
e894c3f4
OAO
1753/*
1754 * _regmap_raw_multi_reg_write()
1755 *
1756 * the (register,newvalue) pairs in regs have not been formatted, but
1757 * they are all in the same page and have been changed to being page
1758 * relative. The page register has been written if that was neccessary.
1759 */
1760static int _regmap_raw_multi_reg_write(struct regmap *map,
1761 const struct reg_default *regs,
1762 size_t num_regs)
1763{
1764 int ret;
1765 void *buf;
1766 int i;
1767 u8 *u8;
1768 size_t val_bytes = map->format.val_bytes;
1769 size_t reg_bytes = map->format.reg_bytes;
1770 size_t pad_bytes = map->format.pad_bytes;
1771 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1772 size_t len = pair_size * num_regs;
1773
f5727cd3
XL
1774 if (!len)
1775 return -EINVAL;
1776
e894c3f4
OAO
1777 buf = kzalloc(len, GFP_KERNEL);
1778 if (!buf)
1779 return -ENOMEM;
1780
1781 /* We have to linearise by hand. */
1782
1783 u8 = buf;
1784
1785 for (i = 0; i < num_regs; i++) {
1786 int reg = regs[i].reg;
1787 int val = regs[i].def;
1788 trace_regmap_hw_write_start(map->dev, reg, 1);
1789 map->format.format_reg(u8, reg, map->reg_shift);
1790 u8 += reg_bytes + pad_bytes;
1791 map->format.format_val(u8, val, 0);
1792 u8 += val_bytes;
1793 }
1794 u8 = buf;
1795 *u8 |= map->write_flag_mask;
1796
1797 ret = map->bus->write(map->bus_context, buf, len);
1798
1799 kfree(buf);
1800
1801 for (i = 0; i < num_regs; i++) {
1802 int reg = regs[i].reg;
1803 trace_regmap_hw_write_done(map->dev, reg, 1);
1804 }
1805 return ret;
1806}
1807
1808static unsigned int _regmap_register_page(struct regmap *map,
1809 unsigned int reg,
1810 struct regmap_range_node *range)
1811{
1812 unsigned int win_page = (reg - range->range_min) / range->window_len;
1813
1814 return win_page;
1815}
1816
1817static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1818 struct reg_default *regs,
1819 size_t num_regs)
1820{
1821 int ret;
1822 int i, n;
1823 struct reg_default *base;
b48d1398 1824 unsigned int this_page = 0;
e894c3f4
OAO
1825 /*
1826 * the set of registers are not neccessarily in order, but
1827 * since the order of write must be preserved this algorithm
1828 * chops the set each time the page changes
1829 */
1830 base = regs;
1831 for (i = 0, n = 0; i < num_regs; i++, n++) {
1832 unsigned int reg = regs[i].reg;
1833 struct regmap_range_node *range;
1834
1835 range = _regmap_range_lookup(map, reg);
1836 if (range) {
1837 unsigned int win_page = _regmap_register_page(map, reg,
1838 range);
1839
1840 if (i == 0)
1841 this_page = win_page;
1842 if (win_page != this_page) {
1843 this_page = win_page;
1844 ret = _regmap_raw_multi_reg_write(map, base, n);
1845 if (ret != 0)
1846 return ret;
1847 base += n;
1848 n = 0;
1849 }
1850 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1851 if (ret != 0)
1852 return ret;
1853 }
1854 }
1855 if (n > 0)
1856 return _regmap_raw_multi_reg_write(map, base, n);
1857 return 0;
1858}
1859
1d5b40bc
CK
1860static int _regmap_multi_reg_write(struct regmap *map,
1861 const struct reg_default *regs,
e894c3f4 1862 size_t num_regs)
1d5b40bc 1863{
e894c3f4
OAO
1864 int i;
1865 int ret;
1866
1867 if (!map->can_multi_write) {
1868 for (i = 0; i < num_regs; i++) {
1869 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1870 if (ret != 0)
1871 return ret;
1872 }
1873 return 0;
1874 }
1875
1876 if (!map->format.parse_inplace)
1877 return -EINVAL;
1878
1879 if (map->writeable_reg)
1880 for (i = 0; i < num_regs; i++) {
1881 int reg = regs[i].reg;
1882 if (!map->writeable_reg(map->dev, reg))
1883 return -EINVAL;
1884 if (reg % map->reg_stride)
1885 return -EINVAL;
1886 }
1887
1888 if (!map->cache_bypass) {
1889 for (i = 0; i < num_regs; i++) {
1890 unsigned int val = regs[i].def;
1891 unsigned int reg = regs[i].reg;
1892 ret = regcache_write(map, reg, val);
1893 if (ret) {
1894 dev_err(map->dev,
1895 "Error in caching of register: %x ret: %d\n",
1896 reg, ret);
1897 return ret;
1898 }
1899 }
1900 if (map->cache_only) {
1901 map->cache_dirty = true;
1902 return 0;
1903 }
1904 }
1905
1906 WARN_ON(!map->bus);
1d5b40bc
CK
1907
1908 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
1909 unsigned int reg = regs[i].reg;
1910 struct regmap_range_node *range;
1911 range = _regmap_range_lookup(map, reg);
1912 if (range) {
1913 size_t len = sizeof(struct reg_default)*num_regs;
1914 struct reg_default *base = kmemdup(regs, len,
1915 GFP_KERNEL);
1916 if (!base)
1917 return -ENOMEM;
1918 ret = _regmap_range_multi_paged_reg_write(map, base,
1919 num_regs);
1920 kfree(base);
1921
1d5b40bc
CK
1922 return ret;
1923 }
1924 }
e894c3f4 1925 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
1926}
1927
e33fabd3
AO
1928/*
1929 * regmap_multi_reg_write(): Write multiple registers to the device
1930 *
e894c3f4
OAO
1931 * where the set of register,value pairs are supplied in any order,
1932 * possibly not all in a single range.
e33fabd3
AO
1933 *
1934 * @map: Register map to write to
1935 * @regs: Array of structures containing register,value to be written
1936 * @num_regs: Number of registers to write
1937 *
e894c3f4
OAO
1938 * The 'normal' block write mode will send ultimately send data on the
1939 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1940 * addressed. However, this alternative block multi write mode will send
1941 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1942 * must of course support the mode.
e33fabd3 1943 *
e894c3f4
OAO
1944 * A value of zero will be returned on success, a negative errno will be
1945 * returned in error cases.
e33fabd3 1946 */
f7e2cec0
CK
1947int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1948 int num_regs)
e33fabd3 1949{
1d5b40bc 1950 int ret;
e33fabd3
AO
1951
1952 map->lock(map->lock_arg);
1953
1d5b40bc
CK
1954 ret = _regmap_multi_reg_write(map, regs, num_regs);
1955
e33fabd3
AO
1956 map->unlock(map->lock_arg);
1957
1958 return ret;
1959}
1960EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1961
1d5b40bc
CK
1962/*
1963 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1964 * device but not the cache
1965 *
e33fabd3
AO
1966 * where the set of register are supplied in any order
1967 *
1968 * @map: Register map to write to
1969 * @regs: Array of structures containing register,value to be written
1970 * @num_regs: Number of registers to write
1971 *
1972 * This function is intended to be used for writing a large block of data
1973 * atomically to the device in single transfer for those I2C client devices
1974 * that implement this alternative block write mode.
1975 *
1976 * A value of zero will be returned on success, a negative errno will
1977 * be returned in error cases.
1978 */
1d5b40bc
CK
1979int regmap_multi_reg_write_bypassed(struct regmap *map,
1980 const struct reg_default *regs,
1981 int num_regs)
e33fabd3 1982{
1d5b40bc
CK
1983 int ret;
1984 bool bypass;
e33fabd3
AO
1985
1986 map->lock(map->lock_arg);
1987
1d5b40bc
CK
1988 bypass = map->cache_bypass;
1989 map->cache_bypass = true;
1990
1991 ret = _regmap_multi_reg_write(map, regs, num_regs);
1992
1993 map->cache_bypass = bypass;
1994
e33fabd3
AO
1995 map->unlock(map->lock_arg);
1996
1997 return ret;
1998}
1d5b40bc 1999EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 2000
0d509f2b
MB
2001/**
2002 * regmap_raw_write_async(): Write raw values to one or more registers
2003 * asynchronously
2004 *
2005 * @map: Register map to write to
2006 * @reg: Initial register to write to
2007 * @val: Block of data to be written, laid out for direct transmission to the
2008 * device. Must be valid until regmap_async_complete() is called.
2009 * @val_len: Length of data pointed to by val.
2010 *
2011 * This function is intended to be used for things like firmware
2012 * download where a large block of data needs to be transferred to the
2013 * device. No formatting will be done on the data provided.
2014 *
2015 * If supported by the underlying bus the write will be scheduled
2016 * asynchronously, helping maximise I/O speed on higher speed buses
2017 * like SPI. regmap_async_complete() can be called to ensure that all
2018 * asynchrnous writes have been completed.
2019 *
2020 * A value of zero will be returned on success, a negative errno will
2021 * be returned in error cases.
2022 */
2023int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2024 const void *val, size_t val_len)
2025{
2026 int ret;
2027
2028 if (val_len % map->format.val_bytes)
2029 return -EINVAL;
2030 if (reg % map->reg_stride)
2031 return -EINVAL;
2032
2033 map->lock(map->lock_arg);
2034
0a819809
MB
2035 map->async = true;
2036
2037 ret = _regmap_raw_write(map, reg, val, val_len);
2038
2039 map->async = false;
0d509f2b
MB
2040
2041 map->unlock(map->lock_arg);
2042
2043 return ret;
2044}
2045EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2046
b83a313b
MB
2047static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2048 unsigned int val_len)
2049{
98bc7dfd 2050 struct regmap_range_node *range;
b83a313b
MB
2051 u8 *u8 = map->work_buf;
2052 int ret;
2053
f1b5c5c3 2054 WARN_ON(!map->bus);
d2a5884a 2055
98bc7dfd
MB
2056 range = _regmap_range_lookup(map, reg);
2057 if (range) {
2058 ret = _regmap_select_page(map, &reg, range,
2059 val_len / map->format.val_bytes);
0ff3e62f 2060 if (ret != 0)
98bc7dfd
MB
2061 return ret;
2062 }
6863ca62 2063
d939fb9a 2064 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
2065
2066 /*
6f306441 2067 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
2068 * register addresss; since it's always the high bits for all
2069 * current formats we can do this here rather than in
2070 * formatting. This may break if we get interesting formats.
2071 */
6f306441 2072 u8[0] |= map->read_flag_mask;
b83a313b 2073
fb2736bb
MB
2074 trace_regmap_hw_read_start(map->dev, reg,
2075 val_len / map->format.val_bytes);
2076
0135bbcc 2077 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 2078 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 2079 val, val_len);
b83a313b 2080
fb2736bb
MB
2081 trace_regmap_hw_read_done(map->dev, reg,
2082 val_len / map->format.val_bytes);
2083
2084 return ret;
b83a313b
MB
2085}
2086
3ac17037
BB
2087static int _regmap_bus_reg_read(void *context, unsigned int reg,
2088 unsigned int *val)
2089{
2090 struct regmap *map = context;
2091
2092 return map->bus->reg_read(map->bus_context, reg, val);
2093}
2094
ad278406
AS
2095static int _regmap_bus_read(void *context, unsigned int reg,
2096 unsigned int *val)
2097{
2098 int ret;
2099 struct regmap *map = context;
2100
2101 if (!map->format.parse_val)
2102 return -EINVAL;
2103
2104 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2105 if (ret == 0)
2106 *val = map->format.parse_val(map->work_buf);
2107
2108 return ret;
2109}
2110
b83a313b
MB
2111static int _regmap_read(struct regmap *map, unsigned int reg,
2112 unsigned int *val)
2113{
2114 int ret;
d2a5884a
AS
2115 void *context = _regmap_map_get_context(map);
2116
f1b5c5c3 2117 WARN_ON(!map->reg_read);
b83a313b 2118
5d1729e7
DP
2119 if (!map->cache_bypass) {
2120 ret = regcache_read(map, reg, val);
2121 if (ret == 0)
2122 return 0;
2123 }
2124
2125 if (map->cache_only)
2126 return -EBUSY;
2127
d4807ad2
MS
2128 if (!regmap_readable(map, reg))
2129 return -EIO;
2130
d2a5884a 2131 ret = map->reg_read(context, reg, val);
fb2736bb 2132 if (ret == 0) {
1044c180
MB
2133#ifdef LOG_DEVICE
2134 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2135 dev_info(map->dev, "%x => %x\n", reg, *val);
2136#endif
2137
fb2736bb 2138 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 2139
ad278406
AS
2140 if (!map->cache_bypass)
2141 regcache_write(map, reg, *val);
2142 }
f2985367 2143
b83a313b
MB
2144 return ret;
2145}
2146
2147/**
2148 * regmap_read(): Read a value from a single register
2149 *
0093380c 2150 * @map: Register map to read from
b83a313b
MB
2151 * @reg: Register to be read from
2152 * @val: Pointer to store read value
2153 *
2154 * A value of zero will be returned on success, a negative errno will
2155 * be returned in error cases.
2156 */
2157int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2158{
2159 int ret;
2160
f01ee60f
SW
2161 if (reg % map->reg_stride)
2162 return -EINVAL;
2163
0d4529c5 2164 map->lock(map->lock_arg);
b83a313b
MB
2165
2166 ret = _regmap_read(map, reg, val);
2167
0d4529c5 2168 map->unlock(map->lock_arg);
b83a313b
MB
2169
2170 return ret;
2171}
2172EXPORT_SYMBOL_GPL(regmap_read);
2173
2174/**
2175 * regmap_raw_read(): Read raw data from the device
2176 *
0093380c 2177 * @map: Register map to read from
b83a313b
MB
2178 * @reg: First register to be read from
2179 * @val: Pointer to store read value
2180 * @val_len: Size of data to read
2181 *
2182 * A value of zero will be returned on success, a negative errno will
2183 * be returned in error cases.
2184 */
2185int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2186 size_t val_len)
2187{
b8fb5ab1
MB
2188 size_t val_bytes = map->format.val_bytes;
2189 size_t val_count = val_len / val_bytes;
2190 unsigned int v;
2191 int ret, i;
04e016ad 2192
d2a5884a
AS
2193 if (!map->bus)
2194 return -EINVAL;
851960ba
SW
2195 if (val_len % map->format.val_bytes)
2196 return -EINVAL;
f01ee60f
SW
2197 if (reg % map->reg_stride)
2198 return -EINVAL;
851960ba 2199
0d4529c5 2200 map->lock(map->lock_arg);
b83a313b 2201
b8fb5ab1
MB
2202 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2203 map->cache_type == REGCACHE_NONE) {
2204 /* Physical block read if there's no cache involved */
2205 ret = _regmap_raw_read(map, reg, val, val_len);
2206
2207 } else {
2208 /* Otherwise go word by word for the cache; should be low
2209 * cost as we expect to hit the cache.
2210 */
2211 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2212 ret = _regmap_read(map, reg + (i * map->reg_stride),
2213 &v);
b8fb5ab1
MB
2214 if (ret != 0)
2215 goto out;
2216
d939fb9a 2217 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2218 }
2219 }
b83a313b 2220
b8fb5ab1 2221 out:
0d4529c5 2222 map->unlock(map->lock_arg);
b83a313b
MB
2223
2224 return ret;
2225}
2226EXPORT_SYMBOL_GPL(regmap_raw_read);
2227
67252287
SK
2228/**
2229 * regmap_field_read(): Read a value to a single register field
2230 *
2231 * @field: Register field to read from
2232 * @val: Pointer to store read value
2233 *
2234 * A value of zero will be returned on success, a negative errno will
2235 * be returned in error cases.
2236 */
2237int regmap_field_read(struct regmap_field *field, unsigned int *val)
2238{
2239 int ret;
2240 unsigned int reg_val;
2241 ret = regmap_read(field->regmap, field->reg, &reg_val);
2242 if (ret != 0)
2243 return ret;
2244
2245 reg_val &= field->mask;
2246 reg_val >>= field->shift;
2247 *val = reg_val;
2248
2249 return ret;
2250}
2251EXPORT_SYMBOL_GPL(regmap_field_read);
2252
a0102375
KM
2253/**
2254 * regmap_fields_read(): Read a value to a single register field with port ID
2255 *
2256 * @field: Register field to read from
2257 * @id: port ID
2258 * @val: Pointer to store read value
2259 *
2260 * A value of zero will be returned on success, a negative errno will
2261 * be returned in error cases.
2262 */
2263int regmap_fields_read(struct regmap_field *field, unsigned int id,
2264 unsigned int *val)
2265{
2266 int ret;
2267 unsigned int reg_val;
2268
2269 if (id >= field->id_size)
2270 return -EINVAL;
2271
2272 ret = regmap_read(field->regmap,
2273 field->reg + (field->id_offset * id),
2274 &reg_val);
2275 if (ret != 0)
2276 return ret;
2277
2278 reg_val &= field->mask;
2279 reg_val >>= field->shift;
2280 *val = reg_val;
2281
2282 return ret;
2283}
2284EXPORT_SYMBOL_GPL(regmap_fields_read);
2285
b83a313b
MB
2286/**
2287 * regmap_bulk_read(): Read multiple registers from the device
2288 *
0093380c 2289 * @map: Register map to read from
b83a313b
MB
2290 * @reg: First register to be read from
2291 * @val: Pointer to store read value, in native register size for device
2292 * @val_count: Number of registers to read
2293 *
2294 * A value of zero will be returned on success, a negative errno will
2295 * be returned in error cases.
2296 */
2297int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2298 size_t val_count)
2299{
2300 int ret, i;
2301 size_t val_bytes = map->format.val_bytes;
82cd9965 2302 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2303
f01ee60f
SW
2304 if (reg % map->reg_stride)
2305 return -EINVAL;
b83a313b 2306
3b58ee13 2307 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2308 /*
2309 * Some devices does not support bulk read, for
2310 * them we have a series of single read operations.
2311 */
2312 if (map->use_single_rw) {
2313 for (i = 0; i < val_count; i++) {
2314 ret = regmap_raw_read(map,
2315 reg + (i * map->reg_stride),
2316 val + (i * val_bytes),
2317 val_bytes);
2318 if (ret != 0)
2319 return ret;
2320 }
2321 } else {
2322 ret = regmap_raw_read(map, reg, val,
2323 val_bytes * val_count);
2324 if (ret != 0)
2325 return ret;
2326 }
de2d808f
MB
2327
2328 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2329 map->format.parse_inplace(val + i);
de2d808f
MB
2330 } else {
2331 for (i = 0; i < val_count; i++) {
6560ffd1 2332 unsigned int ival;
f01ee60f 2333 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2334 &ival);
de2d808f
MB
2335 if (ret != 0)
2336 return ret;
6560ffd1 2337 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
2338 }
2339 }
b83a313b
MB
2340
2341 return 0;
2342}
2343EXPORT_SYMBOL_GPL(regmap_bulk_read);
2344
018690d3
MB
2345static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2346 unsigned int mask, unsigned int val,
2347 bool *change)
b83a313b
MB
2348{
2349 int ret;
d91e8db2 2350 unsigned int tmp, orig;
b83a313b 2351
d91e8db2 2352 ret = _regmap_read(map, reg, &orig);
b83a313b 2353 if (ret != 0)
fc3ebd78 2354 return ret;
b83a313b 2355
d91e8db2 2356 tmp = orig & ~mask;
b83a313b
MB
2357 tmp |= val & mask;
2358
018690d3 2359 if (tmp != orig) {
d91e8db2 2360 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2361 if (change)
2362 *change = true;
018690d3 2363 } else {
e2f74dc6
XL
2364 if (change)
2365 *change = false;
018690d3 2366 }
b83a313b 2367
b83a313b
MB
2368 return ret;
2369}
018690d3
MB
2370
2371/**
2372 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2373 *
2374 * @map: Register map to update
2375 * @reg: Register to update
2376 * @mask: Bitmask to change
2377 * @val: New value for bitmask
2378 *
2379 * Returns zero for success, a negative number on error.
2380 */
2381int regmap_update_bits(struct regmap *map, unsigned int reg,
2382 unsigned int mask, unsigned int val)
2383{
fc3ebd78
KG
2384 int ret;
2385
0d4529c5 2386 map->lock(map->lock_arg);
e2f74dc6 2387 ret = _regmap_update_bits(map, reg, mask, val, NULL);
0d4529c5 2388 map->unlock(map->lock_arg);
fc3ebd78
KG
2389
2390 return ret;
018690d3 2391}
b83a313b 2392EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2393
915f441b
MB
2394/**
2395 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2396 * map asynchronously
2397 *
2398 * @map: Register map to update
2399 * @reg: Register to update
2400 * @mask: Bitmask to change
2401 * @val: New value for bitmask
2402 *
2403 * With most buses the read must be done synchronously so this is most
2404 * useful for devices with a cache which do not need to interact with
2405 * the hardware to determine the current register value.
2406 *
2407 * Returns zero for success, a negative number on error.
2408 */
2409int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2410 unsigned int mask, unsigned int val)
2411{
915f441b
MB
2412 int ret;
2413
2414 map->lock(map->lock_arg);
2415
2416 map->async = true;
2417
e2f74dc6 2418 ret = _regmap_update_bits(map, reg, mask, val, NULL);
915f441b
MB
2419
2420 map->async = false;
2421
2422 map->unlock(map->lock_arg);
2423
2424 return ret;
2425}
2426EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2427
018690d3
MB
2428/**
2429 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2430 * register map and report if updated
2431 *
2432 * @map: Register map to update
2433 * @reg: Register to update
2434 * @mask: Bitmask to change
2435 * @val: New value for bitmask
2436 * @change: Boolean indicating if a write was done
2437 *
2438 * Returns zero for success, a negative number on error.
2439 */
2440int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2441 unsigned int mask, unsigned int val,
2442 bool *change)
2443{
fc3ebd78
KG
2444 int ret;
2445
0d4529c5 2446 map->lock(map->lock_arg);
fc3ebd78 2447 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2448 map->unlock(map->lock_arg);
fc3ebd78 2449 return ret;
018690d3
MB
2450}
2451EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2452
915f441b
MB
2453/**
2454 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2455 * register map asynchronously and report if
2456 * updated
2457 *
2458 * @map: Register map to update
2459 * @reg: Register to update
2460 * @mask: Bitmask to change
2461 * @val: New value for bitmask
2462 * @change: Boolean indicating if a write was done
2463 *
2464 * With most buses the read must be done synchronously so this is most
2465 * useful for devices with a cache which do not need to interact with
2466 * the hardware to determine the current register value.
2467 *
2468 * Returns zero for success, a negative number on error.
2469 */
2470int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2471 unsigned int mask, unsigned int val,
2472 bool *change)
2473{
2474 int ret;
2475
2476 map->lock(map->lock_arg);
2477
2478 map->async = true;
2479
2480 ret = _regmap_update_bits(map, reg, mask, val, change);
2481
2482 map->async = false;
2483
2484 map->unlock(map->lock_arg);
2485
2486 return ret;
2487}
2488EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2489
0d509f2b
MB
2490void regmap_async_complete_cb(struct regmap_async *async, int ret)
2491{
2492 struct regmap *map = async->map;
2493 bool wake;
2494
fe7d4ccd
MB
2495 trace_regmap_async_io_complete(map->dev);
2496
0d509f2b 2497 spin_lock(&map->async_lock);
7e09a979 2498 list_move(&async->list, &map->async_free);
0d509f2b
MB
2499 wake = list_empty(&map->async_list);
2500
2501 if (ret != 0)
2502 map->async_ret = ret;
2503
2504 spin_unlock(&map->async_lock);
2505
0d509f2b
MB
2506 if (wake)
2507 wake_up(&map->async_waitq);
2508}
f804fb56 2509EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2510
2511static int regmap_async_is_done(struct regmap *map)
2512{
2513 unsigned long flags;
2514 int ret;
2515
2516 spin_lock_irqsave(&map->async_lock, flags);
2517 ret = list_empty(&map->async_list);
2518 spin_unlock_irqrestore(&map->async_lock, flags);
2519
2520 return ret;
2521}
2522
2523/**
2524 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2525 *
2526 * @map: Map to operate on.
2527 *
2528 * Blocks until any pending asynchronous I/O has completed. Returns
2529 * an error code for any failed I/O operations.
2530 */
2531int regmap_async_complete(struct regmap *map)
2532{
2533 unsigned long flags;
2534 int ret;
2535
2536 /* Nothing to do with no async support */
f2e055e7 2537 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
2538 return 0;
2539
fe7d4ccd
MB
2540 trace_regmap_async_complete_start(map->dev);
2541
0d509f2b
MB
2542 wait_event(map->async_waitq, regmap_async_is_done(map));
2543
2544 spin_lock_irqsave(&map->async_lock, flags);
2545 ret = map->async_ret;
2546 map->async_ret = 0;
2547 spin_unlock_irqrestore(&map->async_lock, flags);
2548
fe7d4ccd
MB
2549 trace_regmap_async_complete_done(map->dev);
2550
0d509f2b
MB
2551 return ret;
2552}
f88948ef 2553EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2554
22f0d90a
MB
2555/**
2556 * regmap_register_patch: Register and apply register updates to be applied
2557 * on device initialistion
2558 *
2559 * @map: Register map to apply updates to.
2560 * @regs: Values to update.
2561 * @num_regs: Number of entries in regs.
2562 *
2563 * Register a set of register updates to be applied to the device
2564 * whenever the device registers are synchronised with the cache and
2565 * apply them immediately. Typically this is used to apply
2566 * corrections to be applied to the device defaults on startup, such
2567 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB
2568 *
2569 * The caller must ensure that this function cannot be called
2570 * concurrently with either itself or regcache_sync().
22f0d90a
MB
2571 */
2572int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2573 int num_regs)
2574{
aab13ebc 2575 struct reg_default *p;
6bf13103 2576 int ret;
22f0d90a
MB
2577 bool bypass;
2578
bd60e381
CZ
2579 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2580 num_regs))
2581 return 0;
2582
aab13ebc
MB
2583 p = krealloc(map->patch,
2584 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2585 GFP_KERNEL);
2586 if (p) {
2587 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2588 map->patch = p;
2589 map->patch_regs += num_regs;
22f0d90a 2590 } else {
56fb1c74 2591 return -ENOMEM;
22f0d90a
MB
2592 }
2593
0d4529c5 2594 map->lock(map->lock_arg);
22f0d90a
MB
2595
2596 bypass = map->cache_bypass;
2597
2598 map->cache_bypass = true;
1a25f261 2599 map->async = true;
22f0d90a 2600
6bf13103
CK
2601 ret = _regmap_multi_reg_write(map, regs, num_regs);
2602 if (ret != 0)
2603 goto out;
22f0d90a 2604
22f0d90a 2605out:
1a25f261 2606 map->async = false;
22f0d90a
MB
2607 map->cache_bypass = bypass;
2608
0d4529c5 2609 map->unlock(map->lock_arg);
22f0d90a 2610
1a25f261
MB
2611 regmap_async_complete(map);
2612
22f0d90a
MB
2613 return ret;
2614}
2615EXPORT_SYMBOL_GPL(regmap_register_patch);
2616
eae4b51b 2617/*
a6539c32
MB
2618 * regmap_get_val_bytes(): Report the size of a register value
2619 *
2620 * Report the size of a register value, mainly intended to for use by
2621 * generic infrastructure built on top of regmap.
2622 */
2623int regmap_get_val_bytes(struct regmap *map)
2624{
2625 if (map->format.format_write)
2626 return -EINVAL;
2627
2628 return map->format.val_bytes;
2629}
2630EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2631
13ff50c8
NC
2632int regmap_parse_val(struct regmap *map, const void *buf,
2633 unsigned int *val)
2634{
2635 if (!map->format.parse_val)
2636 return -EINVAL;
2637
2638 *val = map->format.parse_val(buf);
2639
2640 return 0;
2641}
2642EXPORT_SYMBOL_GPL(regmap_parse_val);
2643
31244e39
MB
2644static int __init regmap_initcall(void)
2645{
2646 regmap_debugfs_initcall();
2647
2648 return 0;
2649}
2650postcore_initcall(regmap_initcall);
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