regmap: Split use_single_rw internally into use_single_read/write
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
d647c199 18#include <linux/of.h>
6863ca62 19#include <linux/rbtree.h>
30b2a553 20#include <linux/sched.h>
b83a313b 21
fb2736bb 22#define CREATE_TRACE_POINTS
f58078da 23#include "trace.h"
fb2736bb 24
93de9124 25#include "internal.h"
b83a313b 26
1044c180
MB
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35static int _regmap_update_bits(struct regmap *map, unsigned int reg,
36 unsigned int mask, unsigned int val,
37 bool *change);
38
3ac17037
BB
39static int _regmap_bus_reg_read(void *context, unsigned int reg,
40 unsigned int *val);
ad278406
AS
41static int _regmap_bus_read(void *context, unsigned int reg,
42 unsigned int *val);
07c320dc
AS
43static int _regmap_bus_formatted_write(void *context, unsigned int reg,
44 unsigned int val);
3ac17037
BB
45static int _regmap_bus_reg_write(void *context, unsigned int reg,
46 unsigned int val);
07c320dc
AS
47static int _regmap_bus_raw_write(void *context, unsigned int reg,
48 unsigned int val);
ad278406 49
76aad392
DC
50bool regmap_reg_in_ranges(unsigned int reg,
51 const struct regmap_range *ranges,
52 unsigned int nranges)
53{
54 const struct regmap_range *r;
55 int i;
56
57 for (i = 0, r = ranges; i < nranges; i++, r++)
58 if (regmap_reg_in_range(reg, r))
59 return true;
60 return false;
61}
62EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
63
154881e5
MB
64bool regmap_check_range_table(struct regmap *map, unsigned int reg,
65 const struct regmap_access_table *table)
76aad392
DC
66{
67 /* Check "no ranges" first */
68 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
69 return false;
70
71 /* In case zero "yes ranges" are supplied, any reg is OK */
72 if (!table->n_yes_ranges)
73 return true;
74
75 return regmap_reg_in_ranges(reg, table->yes_ranges,
76 table->n_yes_ranges);
77}
154881e5 78EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 79
8de2f081
MB
80bool regmap_writeable(struct regmap *map, unsigned int reg)
81{
82 if (map->max_register && reg > map->max_register)
83 return false;
84
85 if (map->writeable_reg)
86 return map->writeable_reg(map->dev, reg);
87
76aad392 88 if (map->wr_table)
154881e5 89 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 90
8de2f081
MB
91 return true;
92}
93
94bool regmap_readable(struct regmap *map, unsigned int reg)
95{
04dc91ce
LPC
96 if (!map->reg_read)
97 return false;
98
8de2f081
MB
99 if (map->max_register && reg > map->max_register)
100 return false;
101
4191f197
WS
102 if (map->format.format_write)
103 return false;
104
8de2f081
MB
105 if (map->readable_reg)
106 return map->readable_reg(map->dev, reg);
107
76aad392 108 if (map->rd_table)
154881e5 109 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 110
8de2f081
MB
111 return true;
112}
113
114bool regmap_volatile(struct regmap *map, unsigned int reg)
115{
5844a8b9 116 if (!map->format.format_write && !regmap_readable(map, reg))
8de2f081
MB
117 return false;
118
119 if (map->volatile_reg)
120 return map->volatile_reg(map->dev, reg);
121
76aad392 122 if (map->volatile_table)
154881e5 123 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 124
b92be6fe
MB
125 if (map->cache_ops)
126 return false;
127 else
128 return true;
8de2f081
MB
129}
130
131bool regmap_precious(struct regmap *map, unsigned int reg)
132{
4191f197 133 if (!regmap_readable(map, reg))
8de2f081
MB
134 return false;
135
136 if (map->precious_reg)
137 return map->precious_reg(map->dev, reg);
138
76aad392 139 if (map->precious_table)
154881e5 140 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 141
8de2f081
MB
142 return false;
143}
144
82cd9965 145static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 146 size_t num)
82cd9965
LPC
147{
148 unsigned int i;
149
150 for (i = 0; i < num; i++)
151 if (!regmap_volatile(map, reg + i))
152 return false;
153
154 return true;
155}
156
9aa50750
WS
157static void regmap_format_2_6_write(struct regmap *map,
158 unsigned int reg, unsigned int val)
159{
160 u8 *out = map->work_buf;
161
162 *out = (reg << 6) | val;
163}
164
b83a313b
MB
165static void regmap_format_4_12_write(struct regmap *map,
166 unsigned int reg, unsigned int val)
167{
168 __be16 *out = map->work_buf;
169 *out = cpu_to_be16((reg << 12) | val);
170}
171
172static void regmap_format_7_9_write(struct regmap *map,
173 unsigned int reg, unsigned int val)
174{
175 __be16 *out = map->work_buf;
176 *out = cpu_to_be16((reg << 9) | val);
177}
178
7e5ec63e
LPC
179static void regmap_format_10_14_write(struct regmap *map,
180 unsigned int reg, unsigned int val)
181{
182 u8 *out = map->work_buf;
183
184 out[2] = val;
185 out[1] = (val >> 8) | (reg << 6);
186 out[0] = reg >> 2;
187}
188
d939fb9a 189static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
190{
191 u8 *b = buf;
192
d939fb9a 193 b[0] = val << shift;
b83a313b
MB
194}
195
141eba2e 196static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
197{
198 __be16 *b = buf;
199
d939fb9a 200 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
201}
202
4aa8c069
XL
203static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
204{
205 __le16 *b = buf;
206
207 b[0] = cpu_to_le16(val << shift);
208}
209
141eba2e
SW
210static void regmap_format_16_native(void *buf, unsigned int val,
211 unsigned int shift)
212{
213 *(u16 *)buf = val << shift;
214}
215
d939fb9a 216static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
217{
218 u8 *b = buf;
219
d939fb9a
MR
220 val <<= shift;
221
ea279fc5
MR
222 b[0] = val >> 16;
223 b[1] = val >> 8;
224 b[2] = val;
225}
226
141eba2e 227static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
228{
229 __be32 *b = buf;
230
d939fb9a 231 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
232}
233
4aa8c069
XL
234static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
235{
236 __le32 *b = buf;
237
238 b[0] = cpu_to_le32(val << shift);
239}
240
141eba2e
SW
241static void regmap_format_32_native(void *buf, unsigned int val,
242 unsigned int shift)
243{
244 *(u32 *)buf = val << shift;
245}
246
8a819ff8 247static void regmap_parse_inplace_noop(void *buf)
b83a313b 248{
8a819ff8
MB
249}
250
251static unsigned int regmap_parse_8(const void *buf)
252{
253 const u8 *b = buf;
b83a313b
MB
254
255 return b[0];
256}
257
8a819ff8
MB
258static unsigned int regmap_parse_16_be(const void *buf)
259{
260 const __be16 *b = buf;
261
262 return be16_to_cpu(b[0]);
263}
264
4aa8c069
XL
265static unsigned int regmap_parse_16_le(const void *buf)
266{
267 const __le16 *b = buf;
268
269 return le16_to_cpu(b[0]);
270}
271
8a819ff8 272static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
273{
274 __be16 *b = buf;
275
276 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
277}
278
4aa8c069
XL
279static void regmap_parse_16_le_inplace(void *buf)
280{
281 __le16 *b = buf;
282
283 b[0] = le16_to_cpu(b[0]);
284}
285
8a819ff8 286static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
287{
288 return *(u16 *)buf;
289}
290
8a819ff8 291static unsigned int regmap_parse_24(const void *buf)
ea279fc5 292{
8a819ff8 293 const u8 *b = buf;
ea279fc5
MR
294 unsigned int ret = b[2];
295 ret |= ((unsigned int)b[1]) << 8;
296 ret |= ((unsigned int)b[0]) << 16;
297
298 return ret;
299}
300
8a819ff8
MB
301static unsigned int regmap_parse_32_be(const void *buf)
302{
303 const __be32 *b = buf;
304
305 return be32_to_cpu(b[0]);
306}
307
4aa8c069
XL
308static unsigned int regmap_parse_32_le(const void *buf)
309{
310 const __le32 *b = buf;
311
312 return le32_to_cpu(b[0]);
313}
314
8a819ff8 315static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
316{
317 __be32 *b = buf;
318
319 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
320}
321
4aa8c069
XL
322static void regmap_parse_32_le_inplace(void *buf)
323{
324 __le32 *b = buf;
325
326 b[0] = le32_to_cpu(b[0]);
327}
328
8a819ff8 329static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
330{
331 return *(u32 *)buf;
332}
333
0d4529c5 334static void regmap_lock_mutex(void *__map)
bacdbe07 335{
0d4529c5 336 struct regmap *map = __map;
bacdbe07
SW
337 mutex_lock(&map->mutex);
338}
339
0d4529c5 340static void regmap_unlock_mutex(void *__map)
bacdbe07 341{
0d4529c5 342 struct regmap *map = __map;
bacdbe07
SW
343 mutex_unlock(&map->mutex);
344}
345
0d4529c5 346static void regmap_lock_spinlock(void *__map)
b4519c71 347__acquires(&map->spinlock)
bacdbe07 348{
0d4529c5 349 struct regmap *map = __map;
92ab1aab
LPC
350 unsigned long flags;
351
352 spin_lock_irqsave(&map->spinlock, flags);
353 map->spinlock_flags = flags;
bacdbe07
SW
354}
355
0d4529c5 356static void regmap_unlock_spinlock(void *__map)
b4519c71 357__releases(&map->spinlock)
bacdbe07 358{
0d4529c5 359 struct regmap *map = __map;
92ab1aab 360 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
361}
362
72b39f6f
MB
363static void dev_get_regmap_release(struct device *dev, void *res)
364{
365 /*
366 * We don't actually have anything to do here; the goal here
367 * is not to manage the regmap but to provide a simple way to
368 * get the regmap back given a struct device.
369 */
370}
371
6863ca62
KG
372static bool _regmap_range_add(struct regmap *map,
373 struct regmap_range_node *data)
374{
375 struct rb_root *root = &map->range_tree;
376 struct rb_node **new = &(root->rb_node), *parent = NULL;
377
378 while (*new) {
379 struct regmap_range_node *this =
380 container_of(*new, struct regmap_range_node, node);
381
382 parent = *new;
383 if (data->range_max < this->range_min)
384 new = &((*new)->rb_left);
385 else if (data->range_min > this->range_max)
386 new = &((*new)->rb_right);
387 else
388 return false;
389 }
390
391 rb_link_node(&data->node, parent, new);
392 rb_insert_color(&data->node, root);
393
394 return true;
395}
396
397static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
398 unsigned int reg)
399{
400 struct rb_node *node = map->range_tree.rb_node;
401
402 while (node) {
403 struct regmap_range_node *this =
404 container_of(node, struct regmap_range_node, node);
405
406 if (reg < this->range_min)
407 node = node->rb_left;
408 else if (reg > this->range_max)
409 node = node->rb_right;
410 else
411 return this;
412 }
413
414 return NULL;
415}
416
417static void regmap_range_exit(struct regmap *map)
418{
419 struct rb_node *next;
420 struct regmap_range_node *range_node;
421
422 next = rb_first(&map->range_tree);
423 while (next) {
424 range_node = rb_entry(next, struct regmap_range_node, node);
425 next = rb_next(&range_node->node);
426 rb_erase(&range_node->node, &map->range_tree);
427 kfree(range_node);
428 }
429
430 kfree(map->selector_work_buf);
431}
432
6cfec04b
MS
433int regmap_attach_dev(struct device *dev, struct regmap *map,
434 const struct regmap_config *config)
435{
436 struct regmap **m;
437
438 map->dev = dev;
439
440 regmap_debugfs_init(map, config->name);
441
442 /* Add a devres resource for dev_get_regmap() */
443 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
444 if (!m) {
445 regmap_debugfs_exit(map);
446 return -ENOMEM;
447 }
448 *m = map;
449 devres_add(dev, m);
450
451 return 0;
452}
453EXPORT_SYMBOL_GPL(regmap_attach_dev);
454
cf673fbc
GU
455static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
456 const struct regmap_config *config)
457{
458 enum regmap_endian endian;
459
460 /* Retrieve the endianness specification from the regmap config */
461 endian = config->reg_format_endian;
462
463 /* If the regmap config specified a non-default value, use that */
464 if (endian != REGMAP_ENDIAN_DEFAULT)
465 return endian;
466
467 /* Retrieve the endianness specification from the bus config */
468 if (bus && bus->reg_format_endian_default)
469 endian = bus->reg_format_endian_default;
d647c199 470
cf673fbc
GU
471 /* If the bus specified a non-default value, use that */
472 if (endian != REGMAP_ENDIAN_DEFAULT)
473 return endian;
474
475 /* Use this if no other value was found */
476 return REGMAP_ENDIAN_BIG;
477}
478
3c174d29
GR
479enum regmap_endian regmap_get_val_endian(struct device *dev,
480 const struct regmap_bus *bus,
481 const struct regmap_config *config)
d647c199 482{
6e64b6cc 483 struct device_node *np;
cf673fbc 484 enum regmap_endian endian;
d647c199 485
45e1a279 486 /* Retrieve the endianness specification from the regmap config */
cf673fbc 487 endian = config->val_format_endian;
d647c199 488
45e1a279 489 /* If the regmap config specified a non-default value, use that */
cf673fbc
GU
490 if (endian != REGMAP_ENDIAN_DEFAULT)
491 return endian;
d647c199 492
6e64b6cc
PD
493 /* If the dev and dev->of_node exist try to get endianness from DT */
494 if (dev && dev->of_node) {
495 np = dev->of_node;
d647c199 496
6e64b6cc
PD
497 /* Parse the device's DT node for an endianness specification */
498 if (of_property_read_bool(np, "big-endian"))
499 endian = REGMAP_ENDIAN_BIG;
500 else if (of_property_read_bool(np, "little-endian"))
501 endian = REGMAP_ENDIAN_LITTLE;
502
503 /* If the endianness was specified in DT, use that */
504 if (endian != REGMAP_ENDIAN_DEFAULT)
505 return endian;
506 }
45e1a279
SW
507
508 /* Retrieve the endianness specification from the bus config */
cf673fbc
GU
509 if (bus && bus->val_format_endian_default)
510 endian = bus->val_format_endian_default;
d647c199 511
45e1a279 512 /* If the bus specified a non-default value, use that */
cf673fbc
GU
513 if (endian != REGMAP_ENDIAN_DEFAULT)
514 return endian;
45e1a279
SW
515
516 /* Use this if no other value was found */
cf673fbc 517 return REGMAP_ENDIAN_BIG;
d647c199 518}
3c174d29 519EXPORT_SYMBOL_GPL(regmap_get_val_endian);
d647c199 520
b83a313b
MB
521/**
522 * regmap_init(): Initialise register map
523 *
524 * @dev: Device that will be interacted with
525 * @bus: Bus-specific callbacks to use with device
0135bbcc 526 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
527 * @config: Configuration for register map
528 *
529 * The return value will be an ERR_PTR() on error or a valid pointer to
530 * a struct regmap. This function should generally not be called
531 * directly, it should be called by bus-specific init functions.
532 */
533struct regmap *regmap_init(struct device *dev,
534 const struct regmap_bus *bus,
0135bbcc 535 void *bus_context,
b83a313b
MB
536 const struct regmap_config *config)
537{
6cfec04b 538 struct regmap *map;
b83a313b 539 int ret = -EINVAL;
141eba2e 540 enum regmap_endian reg_endian, val_endian;
6863ca62 541 int i, j;
b83a313b 542
d2a5884a 543 if (!config)
abbb18fb 544 goto err;
b83a313b
MB
545
546 map = kzalloc(sizeof(*map), GFP_KERNEL);
547 if (map == NULL) {
548 ret = -ENOMEM;
549 goto err;
550 }
551
0d4529c5
DC
552 if (config->lock && config->unlock) {
553 map->lock = config->lock;
554 map->unlock = config->unlock;
555 map->lock_arg = config->lock_arg;
bacdbe07 556 } else {
d2a5884a
AS
557 if ((bus && bus->fast_io) ||
558 config->fast_io) {
0d4529c5
DC
559 spin_lock_init(&map->spinlock);
560 map->lock = regmap_lock_spinlock;
561 map->unlock = regmap_unlock_spinlock;
562 } else {
563 mutex_init(&map->mutex);
564 map->lock = regmap_lock_mutex;
565 map->unlock = regmap_unlock_mutex;
566 }
567 map->lock_arg = map;
bacdbe07 568 }
c212accc 569 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 570 map->format.pad_bytes = config->pad_bits / 8;
c212accc 571 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
572 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
573 config->val_bits + config->pad_bits, 8);
d939fb9a 574 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
575 if (config->reg_stride)
576 map->reg_stride = config->reg_stride;
577 else
578 map->reg_stride = 1;
67921a1a
MP
579 map->use_single_read = config->use_single_rw || !bus || !bus->read;
580 map->use_single_write = config->use_single_rw || !bus || !bus->write;
e894c3f4 581 map->can_multi_write = config->can_multi_write;
b83a313b
MB
582 map->dev = dev;
583 map->bus = bus;
0135bbcc 584 map->bus_context = bus_context;
2e2ae66d 585 map->max_register = config->max_register;
76aad392
DC
586 map->wr_table = config->wr_table;
587 map->rd_table = config->rd_table;
588 map->volatile_table = config->volatile_table;
589 map->precious_table = config->precious_table;
2e2ae66d
MB
590 map->writeable_reg = config->writeable_reg;
591 map->readable_reg = config->readable_reg;
592 map->volatile_reg = config->volatile_reg;
2efe1642 593 map->precious_reg = config->precious_reg;
5d1729e7 594 map->cache_type = config->cache_type;
72b39f6f 595 map->name = config->name;
b83a313b 596
0d509f2b
MB
597 spin_lock_init(&map->async_lock);
598 INIT_LIST_HEAD(&map->async_list);
7e09a979 599 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
600 init_waitqueue_head(&map->async_waitq);
601
6f306441
LPC
602 if (config->read_flag_mask || config->write_flag_mask) {
603 map->read_flag_mask = config->read_flag_mask;
604 map->write_flag_mask = config->write_flag_mask;
d2a5884a 605 } else if (bus) {
6f306441
LPC
606 map->read_flag_mask = bus->read_flag_mask;
607 }
608
d2a5884a
AS
609 if (!bus) {
610 map->reg_read = config->reg_read;
611 map->reg_write = config->reg_write;
612
3ac17037
BB
613 map->defer_caching = false;
614 goto skip_format_initialization;
615 } else if (!bus->read || !bus->write) {
616 map->reg_read = _regmap_bus_reg_read;
617 map->reg_write = _regmap_bus_reg_write;
618
d2a5884a
AS
619 map->defer_caching = false;
620 goto skip_format_initialization;
621 } else {
622 map->reg_read = _regmap_bus_read;
623 }
ad278406 624
cf673fbc
GU
625 reg_endian = regmap_get_reg_endian(bus, config);
626 val_endian = regmap_get_val_endian(dev, bus, config);
141eba2e 627
d939fb9a 628 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
629 case 2:
630 switch (config->val_bits) {
631 case 6:
632 map->format.format_write = regmap_format_2_6_write;
633 break;
634 default:
635 goto err_map;
636 }
637 break;
638
b83a313b
MB
639 case 4:
640 switch (config->val_bits) {
641 case 12:
642 map->format.format_write = regmap_format_4_12_write;
643 break;
644 default:
645 goto err_map;
646 }
647 break;
648
649 case 7:
650 switch (config->val_bits) {
651 case 9:
652 map->format.format_write = regmap_format_7_9_write;
653 break;
654 default:
655 goto err_map;
656 }
657 break;
658
7e5ec63e
LPC
659 case 10:
660 switch (config->val_bits) {
661 case 14:
662 map->format.format_write = regmap_format_10_14_write;
663 break;
664 default:
665 goto err_map;
666 }
667 break;
668
b83a313b
MB
669 case 8:
670 map->format.format_reg = regmap_format_8;
671 break;
672
673 case 16:
141eba2e
SW
674 switch (reg_endian) {
675 case REGMAP_ENDIAN_BIG:
676 map->format.format_reg = regmap_format_16_be;
677 break;
678 case REGMAP_ENDIAN_NATIVE:
679 map->format.format_reg = regmap_format_16_native;
680 break;
681 default:
682 goto err_map;
683 }
b83a313b
MB
684 break;
685
237019e7
LPC
686 case 24:
687 if (reg_endian != REGMAP_ENDIAN_BIG)
688 goto err_map;
689 map->format.format_reg = regmap_format_24;
690 break;
691
7d5e525b 692 case 32:
141eba2e
SW
693 switch (reg_endian) {
694 case REGMAP_ENDIAN_BIG:
695 map->format.format_reg = regmap_format_32_be;
696 break;
697 case REGMAP_ENDIAN_NATIVE:
698 map->format.format_reg = regmap_format_32_native;
699 break;
700 default:
701 goto err_map;
702 }
7d5e525b
MB
703 break;
704
b83a313b
MB
705 default:
706 goto err_map;
707 }
708
8a819ff8
MB
709 if (val_endian == REGMAP_ENDIAN_NATIVE)
710 map->format.parse_inplace = regmap_parse_inplace_noop;
711
b83a313b
MB
712 switch (config->val_bits) {
713 case 8:
714 map->format.format_val = regmap_format_8;
715 map->format.parse_val = regmap_parse_8;
8a819ff8 716 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
717 break;
718 case 16:
141eba2e
SW
719 switch (val_endian) {
720 case REGMAP_ENDIAN_BIG:
721 map->format.format_val = regmap_format_16_be;
722 map->format.parse_val = regmap_parse_16_be;
8a819ff8 723 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 724 break;
4aa8c069
XL
725 case REGMAP_ENDIAN_LITTLE:
726 map->format.format_val = regmap_format_16_le;
727 map->format.parse_val = regmap_parse_16_le;
728 map->format.parse_inplace = regmap_parse_16_le_inplace;
729 break;
141eba2e
SW
730 case REGMAP_ENDIAN_NATIVE:
731 map->format.format_val = regmap_format_16_native;
732 map->format.parse_val = regmap_parse_16_native;
733 break;
734 default:
735 goto err_map;
736 }
b83a313b 737 break;
ea279fc5 738 case 24:
141eba2e
SW
739 if (val_endian != REGMAP_ENDIAN_BIG)
740 goto err_map;
ea279fc5
MR
741 map->format.format_val = regmap_format_24;
742 map->format.parse_val = regmap_parse_24;
743 break;
7d5e525b 744 case 32:
141eba2e
SW
745 switch (val_endian) {
746 case REGMAP_ENDIAN_BIG:
747 map->format.format_val = regmap_format_32_be;
748 map->format.parse_val = regmap_parse_32_be;
8a819ff8 749 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 750 break;
4aa8c069
XL
751 case REGMAP_ENDIAN_LITTLE:
752 map->format.format_val = regmap_format_32_le;
753 map->format.parse_val = regmap_parse_32_le;
754 map->format.parse_inplace = regmap_parse_32_le_inplace;
755 break;
141eba2e
SW
756 case REGMAP_ENDIAN_NATIVE:
757 map->format.format_val = regmap_format_32_native;
758 map->format.parse_val = regmap_parse_32_native;
759 break;
760 default:
761 goto err_map;
762 }
7d5e525b 763 break;
b83a313b
MB
764 }
765
141eba2e
SW
766 if (map->format.format_write) {
767 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
768 (val_endian != REGMAP_ENDIAN_BIG))
769 goto err_map;
67921a1a 770 map->use_single_write = true;
141eba2e 771 }
7a647614 772
b83a313b
MB
773 if (!map->format.format_write &&
774 !(map->format.format_reg && map->format.format_val))
775 goto err_map;
776
82159ba8 777 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
778 if (map->work_buf == NULL) {
779 ret = -ENOMEM;
5204f5e3 780 goto err_map;
b83a313b
MB
781 }
782
d2a5884a
AS
783 if (map->format.format_write) {
784 map->defer_caching = false;
07c320dc 785 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
786 } else if (map->format.format_val) {
787 map->defer_caching = true;
07c320dc 788 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
789 }
790
791skip_format_initialization:
07c320dc 792
6863ca62 793 map->range_tree = RB_ROOT;
e3549cd0 794 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
795 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
796 struct regmap_range_node *new;
797
798 /* Sanity check */
061adc06
MB
799 if (range_cfg->range_max < range_cfg->range_min) {
800 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
801 range_cfg->range_max, range_cfg->range_min);
6863ca62 802 goto err_range;
061adc06
MB
803 }
804
805 if (range_cfg->range_max > map->max_register) {
806 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
807 range_cfg->range_max, map->max_register);
808 goto err_range;
809 }
810
811 if (range_cfg->selector_reg > map->max_register) {
812 dev_err(map->dev,
813 "Invalid range %d: selector out of map\n", i);
814 goto err_range;
815 }
816
817 if (range_cfg->window_len == 0) {
818 dev_err(map->dev, "Invalid range %d: window_len 0\n",
819 i);
820 goto err_range;
821 }
6863ca62
KG
822
823 /* Make sure, that this register range has no selector
824 or data window within its boundary */
e3549cd0 825 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
826 unsigned sel_reg = config->ranges[j].selector_reg;
827 unsigned win_min = config->ranges[j].window_start;
828 unsigned win_max = win_min +
829 config->ranges[j].window_len - 1;
830
f161d220
PZ
831 /* Allow data window inside its own virtual range */
832 if (j == i)
833 continue;
834
6863ca62
KG
835 if (range_cfg->range_min <= sel_reg &&
836 sel_reg <= range_cfg->range_max) {
061adc06
MB
837 dev_err(map->dev,
838 "Range %d: selector for %d in window\n",
839 i, j);
6863ca62
KG
840 goto err_range;
841 }
842
843 if (!(win_max < range_cfg->range_min ||
844 win_min > range_cfg->range_max)) {
061adc06
MB
845 dev_err(map->dev,
846 "Range %d: window for %d in window\n",
847 i, j);
6863ca62
KG
848 goto err_range;
849 }
850 }
851
852 new = kzalloc(sizeof(*new), GFP_KERNEL);
853 if (new == NULL) {
854 ret = -ENOMEM;
855 goto err_range;
856 }
857
4b020b3f 858 new->map = map;
d058bb49 859 new->name = range_cfg->name;
6863ca62
KG
860 new->range_min = range_cfg->range_min;
861 new->range_max = range_cfg->range_max;
862 new->selector_reg = range_cfg->selector_reg;
863 new->selector_mask = range_cfg->selector_mask;
864 new->selector_shift = range_cfg->selector_shift;
865 new->window_start = range_cfg->window_start;
866 new->window_len = range_cfg->window_len;
867
53e87f88 868 if (!_regmap_range_add(map, new)) {
061adc06 869 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
870 kfree(new);
871 goto err_range;
872 }
873
874 if (map->selector_work_buf == NULL) {
875 map->selector_work_buf =
876 kzalloc(map->format.buf_size, GFP_KERNEL);
877 if (map->selector_work_buf == NULL) {
878 ret = -ENOMEM;
879 goto err_range;
880 }
881 }
882 }
052d2cd1 883
e5e3b8ab 884 ret = regcache_init(map, config);
0ff3e62f 885 if (ret != 0)
6863ca62
KG
886 goto err_range;
887
a7a037c8 888 if (dev) {
6cfec04b
MS
889 ret = regmap_attach_dev(dev, map, config);
890 if (ret != 0)
891 goto err_regcache;
a7a037c8 892 }
72b39f6f 893
b83a313b
MB
894 return map;
895
6cfec04b 896err_regcache:
72b39f6f 897 regcache_exit(map);
6863ca62
KG
898err_range:
899 regmap_range_exit(map);
58072cbf 900 kfree(map->work_buf);
b83a313b
MB
901err_map:
902 kfree(map);
903err:
904 return ERR_PTR(ret);
905}
906EXPORT_SYMBOL_GPL(regmap_init);
907
c0eb4676
MB
908static void devm_regmap_release(struct device *dev, void *res)
909{
910 regmap_exit(*(struct regmap **)res);
911}
912
913/**
914 * devm_regmap_init(): Initialise managed register map
915 *
916 * @dev: Device that will be interacted with
917 * @bus: Bus-specific callbacks to use with device
0135bbcc 918 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
919 * @config: Configuration for register map
920 *
921 * The return value will be an ERR_PTR() on error or a valid pointer
922 * to a struct regmap. This function should generally not be called
923 * directly, it should be called by bus-specific init functions. The
924 * map will be automatically freed by the device management code.
925 */
926struct regmap *devm_regmap_init(struct device *dev,
927 const struct regmap_bus *bus,
0135bbcc 928 void *bus_context,
c0eb4676
MB
929 const struct regmap_config *config)
930{
931 struct regmap **ptr, *regmap;
932
933 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
934 if (!ptr)
935 return ERR_PTR(-ENOMEM);
936
0135bbcc 937 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
938 if (!IS_ERR(regmap)) {
939 *ptr = regmap;
940 devres_add(dev, ptr);
941 } else {
942 devres_free(ptr);
943 }
944
945 return regmap;
946}
947EXPORT_SYMBOL_GPL(devm_regmap_init);
948
67252287
SK
949static void regmap_field_init(struct regmap_field *rm_field,
950 struct regmap *regmap, struct reg_field reg_field)
951{
67252287
SK
952 rm_field->regmap = regmap;
953 rm_field->reg = reg_field.reg;
954 rm_field->shift = reg_field.lsb;
921cc294 955 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
a0102375
KM
956 rm_field->id_size = reg_field.id_size;
957 rm_field->id_offset = reg_field.id_offset;
67252287
SK
958}
959
960/**
961 * devm_regmap_field_alloc(): Allocate and initialise a register field
962 * in a register map.
963 *
964 * @dev: Device that will be interacted with
965 * @regmap: regmap bank in which this register field is located.
966 * @reg_field: Register field with in the bank.
967 *
968 * The return value will be an ERR_PTR() on error or a valid pointer
969 * to a struct regmap_field. The regmap_field will be automatically freed
970 * by the device management code.
971 */
972struct regmap_field *devm_regmap_field_alloc(struct device *dev,
973 struct regmap *regmap, struct reg_field reg_field)
974{
975 struct regmap_field *rm_field = devm_kzalloc(dev,
976 sizeof(*rm_field), GFP_KERNEL);
977 if (!rm_field)
978 return ERR_PTR(-ENOMEM);
979
980 regmap_field_init(rm_field, regmap, reg_field);
981
982 return rm_field;
983
984}
985EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
986
987/**
988 * devm_regmap_field_free(): Free register field allocated using
989 * devm_regmap_field_alloc. Usally drivers need not call this function,
990 * as the memory allocated via devm will be freed as per device-driver
991 * life-cyle.
992 *
993 * @dev: Device that will be interacted with
994 * @field: regmap field which should be freed.
995 */
996void devm_regmap_field_free(struct device *dev,
997 struct regmap_field *field)
998{
999 devm_kfree(dev, field);
1000}
1001EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1002
1003/**
1004 * regmap_field_alloc(): Allocate and initialise a register field
1005 * in a register map.
1006 *
1007 * @regmap: regmap bank in which this register field is located.
1008 * @reg_field: Register field with in the bank.
1009 *
1010 * The return value will be an ERR_PTR() on error or a valid pointer
1011 * to a struct regmap_field. The regmap_field should be freed by the
1012 * user once its finished working with it using regmap_field_free().
1013 */
1014struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1015 struct reg_field reg_field)
1016{
1017 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1018
1019 if (!rm_field)
1020 return ERR_PTR(-ENOMEM);
1021
1022 regmap_field_init(rm_field, regmap, reg_field);
1023
1024 return rm_field;
1025}
1026EXPORT_SYMBOL_GPL(regmap_field_alloc);
1027
1028/**
1029 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1030 *
1031 * @field: regmap field which should be freed.
1032 */
1033void regmap_field_free(struct regmap_field *field)
1034{
1035 kfree(field);
1036}
1037EXPORT_SYMBOL_GPL(regmap_field_free);
1038
bf315173
MB
1039/**
1040 * regmap_reinit_cache(): Reinitialise the current register cache
1041 *
1042 * @map: Register map to operate on.
1043 * @config: New configuration. Only the cache data will be used.
1044 *
1045 * Discard any existing register cache for the map and initialize a
1046 * new cache. This can be used to restore the cache to defaults or to
1047 * update the cache configuration to reflect runtime discovery of the
1048 * hardware.
4d879514
DP
1049 *
1050 * No explicit locking is done here, the user needs to ensure that
1051 * this function will not race with other calls to regmap.
bf315173
MB
1052 */
1053int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1054{
bf315173 1055 regcache_exit(map);
a24f64a6 1056 regmap_debugfs_exit(map);
bf315173
MB
1057
1058 map->max_register = config->max_register;
1059 map->writeable_reg = config->writeable_reg;
1060 map->readable_reg = config->readable_reg;
1061 map->volatile_reg = config->volatile_reg;
1062 map->precious_reg = config->precious_reg;
1063 map->cache_type = config->cache_type;
1064
d3c242e1 1065 regmap_debugfs_init(map, config->name);
a24f64a6 1066
421e8d2d
MB
1067 map->cache_bypass = false;
1068 map->cache_only = false;
1069
4d879514 1070 return regcache_init(map, config);
bf315173 1071}
752a6a5f 1072EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1073
b83a313b
MB
1074/**
1075 * regmap_exit(): Free a previously allocated register map
1076 */
1077void regmap_exit(struct regmap *map)
1078{
7e09a979
MB
1079 struct regmap_async *async;
1080
5d1729e7 1081 regcache_exit(map);
31244e39 1082 regmap_debugfs_exit(map);
6863ca62 1083 regmap_range_exit(map);
d2a5884a 1084 if (map->bus && map->bus->free_context)
0135bbcc 1085 map->bus->free_context(map->bus_context);
b83a313b 1086 kfree(map->work_buf);
7e09a979
MB
1087 while (!list_empty(&map->async_free)) {
1088 async = list_first_entry_or_null(&map->async_free,
1089 struct regmap_async,
1090 list);
1091 list_del(&async->list);
1092 kfree(async->work_buf);
1093 kfree(async);
1094 }
b83a313b
MB
1095 kfree(map);
1096}
1097EXPORT_SYMBOL_GPL(regmap_exit);
1098
72b39f6f
MB
1099static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1100{
1101 struct regmap **r = res;
1102 if (!r || !*r) {
1103 WARN_ON(!r || !*r);
1104 return 0;
1105 }
1106
1107 /* If the user didn't specify a name match any */
1108 if (data)
1109 return (*r)->name == data;
1110 else
1111 return 1;
1112}
1113
1114/**
1115 * dev_get_regmap(): Obtain the regmap (if any) for a device
1116 *
1117 * @dev: Device to retrieve the map for
1118 * @name: Optional name for the register map, usually NULL.
1119 *
1120 * Returns the regmap for the device if one is present, or NULL. If
1121 * name is specified then it must match the name specified when
1122 * registering the device, if it is NULL then the first regmap found
1123 * will be used. Devices with multiple register maps are very rare,
1124 * generic code should normally not need to specify a name.
1125 */
1126struct regmap *dev_get_regmap(struct device *dev, const char *name)
1127{
1128 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1129 dev_get_regmap_match, (void *)name);
1130
1131 if (!r)
1132 return NULL;
1133 return *r;
1134}
1135EXPORT_SYMBOL_GPL(dev_get_regmap);
1136
8d7d3972
TT
1137/**
1138 * regmap_get_device(): Obtain the device from a regmap
1139 *
1140 * @map: Register map to operate on.
1141 *
1142 * Returns the underlying device that the regmap has been created for.
1143 */
1144struct device *regmap_get_device(struct regmap *map)
1145{
1146 return map->dev;
1147}
fa2fbe4a 1148EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1149
6863ca62 1150static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1151 struct regmap_range_node *range,
6863ca62
KG
1152 unsigned int val_num)
1153{
6863ca62
KG
1154 void *orig_work_buf;
1155 unsigned int win_offset;
1156 unsigned int win_page;
1157 bool page_chg;
1158 int ret;
1159
98bc7dfd
MB
1160 win_offset = (*reg - range->range_min) % range->window_len;
1161 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1162
98bc7dfd
MB
1163 if (val_num > 1) {
1164 /* Bulk write shouldn't cross range boundary */
1165 if (*reg + val_num - 1 > range->range_max)
1166 return -EINVAL;
6863ca62 1167
98bc7dfd
MB
1168 /* ... or single page boundary */
1169 if (val_num > range->window_len - win_offset)
1170 return -EINVAL;
1171 }
6863ca62 1172
98bc7dfd
MB
1173 /* It is possible to have selector register inside data window.
1174 In that case, selector register is located on every page and
1175 it needs no page switching, when accessed alone. */
1176 if (val_num > 1 ||
1177 range->window_start + win_offset != range->selector_reg) {
1178 /* Use separate work_buf during page switching */
1179 orig_work_buf = map->work_buf;
1180 map->work_buf = map->selector_work_buf;
6863ca62 1181
98bc7dfd
MB
1182 ret = _regmap_update_bits(map, range->selector_reg,
1183 range->selector_mask,
1184 win_page << range->selector_shift,
1185 &page_chg);
632a5b01 1186
98bc7dfd 1187 map->work_buf = orig_work_buf;
6863ca62 1188
0ff3e62f 1189 if (ret != 0)
98bc7dfd 1190 return ret;
6863ca62
KG
1191 }
1192
98bc7dfd
MB
1193 *reg = range->window_start + win_offset;
1194
6863ca62
KG
1195 return 0;
1196}
1197
584de329 1198int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1199 const void *val, size_t val_len)
b83a313b 1200{
98bc7dfd 1201 struct regmap_range_node *range;
0d509f2b 1202 unsigned long flags;
6f306441 1203 u8 *u8 = map->work_buf;
0d509f2b
MB
1204 void *work_val = map->work_buf + map->format.reg_bytes +
1205 map->format.pad_bytes;
b83a313b
MB
1206 void *buf;
1207 int ret = -ENOTSUPP;
1208 size_t len;
73304781
MB
1209 int i;
1210
f1b5c5c3 1211 WARN_ON(!map->bus);
d2a5884a 1212
73304781
MB
1213 /* Check for unwritable registers before we start */
1214 if (map->writeable_reg)
1215 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1216 if (!map->writeable_reg(map->dev,
1217 reg + (i * map->reg_stride)))
73304781 1218 return -EINVAL;
b83a313b 1219
c9157198
LD
1220 if (!map->cache_bypass && map->format.parse_val) {
1221 unsigned int ival;
1222 int val_bytes = map->format.val_bytes;
1223 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1224 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1225 ret = regcache_write(map, reg + (i * map->reg_stride),
1226 ival);
c9157198
LD
1227 if (ret) {
1228 dev_err(map->dev,
6d04b8ac 1229 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1230 reg + i, ret);
1231 return ret;
1232 }
1233 }
1234 if (map->cache_only) {
1235 map->cache_dirty = true;
1236 return 0;
1237 }
1238 }
1239
98bc7dfd
MB
1240 range = _regmap_range_lookup(map, reg);
1241 if (range) {
8a2ceac6
MB
1242 int val_num = val_len / map->format.val_bytes;
1243 int win_offset = (reg - range->range_min) % range->window_len;
1244 int win_residue = range->window_len - win_offset;
1245
1246 /* If the write goes beyond the end of the window split it */
1247 while (val_num > win_residue) {
1a61cfe3 1248 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1249 win_residue, val_len / map->format.val_bytes);
1250 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1251 map->format.val_bytes);
8a2ceac6
MB
1252 if (ret != 0)
1253 return ret;
1254
1255 reg += win_residue;
1256 val_num -= win_residue;
1257 val += win_residue * map->format.val_bytes;
1258 val_len -= win_residue * map->format.val_bytes;
1259
1260 win_offset = (reg - range->range_min) %
1261 range->window_len;
1262 win_residue = range->window_len - win_offset;
1263 }
1264
1265 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1266 if (ret != 0)
98bc7dfd
MB
1267 return ret;
1268 }
6863ca62 1269
d939fb9a 1270 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1271
6f306441
LPC
1272 u8[0] |= map->write_flag_mask;
1273
651e013e
MB
1274 /*
1275 * Essentially all I/O mechanisms will be faster with a single
1276 * buffer to write. Since register syncs often generate raw
1277 * writes of single registers optimise that case.
1278 */
1279 if (val != work_val && val_len == map->format.val_bytes) {
1280 memcpy(work_val, val, map->format.val_bytes);
1281 val = work_val;
1282 }
1283
0a819809 1284 if (map->async && map->bus->async_write) {
7e09a979 1285 struct regmap_async *async;
0d509f2b 1286
c6b570d9 1287 trace_regmap_async_write_start(map, reg, val_len);
fe7d4ccd 1288
7e09a979
MB
1289 spin_lock_irqsave(&map->async_lock, flags);
1290 async = list_first_entry_or_null(&map->async_free,
1291 struct regmap_async,
1292 list);
1293 if (async)
1294 list_del(&async->list);
1295 spin_unlock_irqrestore(&map->async_lock, flags);
1296
1297 if (!async) {
1298 async = map->bus->async_alloc();
1299 if (!async)
1300 return -ENOMEM;
1301
1302 async->work_buf = kzalloc(map->format.buf_size,
1303 GFP_KERNEL | GFP_DMA);
1304 if (!async->work_buf) {
1305 kfree(async);
1306 return -ENOMEM;
1307 }
0d509f2b
MB
1308 }
1309
0d509f2b
MB
1310 async->map = map;
1311
1312 /* If the caller supplied the value we can use it safely. */
1313 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1314 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1315
1316 spin_lock_irqsave(&map->async_lock, flags);
1317 list_add_tail(&async->list, &map->async_list);
1318 spin_unlock_irqrestore(&map->async_lock, flags);
1319
04c50ccf
MB
1320 if (val != work_val)
1321 ret = map->bus->async_write(map->bus_context,
1322 async->work_buf,
1323 map->format.reg_bytes +
1324 map->format.pad_bytes,
1325 val, val_len, async);
1326 else
1327 ret = map->bus->async_write(map->bus_context,
1328 async->work_buf,
1329 map->format.reg_bytes +
1330 map->format.pad_bytes +
1331 val_len, NULL, 0, async);
0d509f2b
MB
1332
1333 if (ret != 0) {
1334 dev_err(map->dev, "Failed to schedule write: %d\n",
1335 ret);
1336
1337 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1338 list_move(&async->list, &map->async_free);
0d509f2b 1339 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1340 }
f951b658
MB
1341
1342 return ret;
0d509f2b
MB
1343 }
1344
c6b570d9 1345 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 1346
2547e201
MB
1347 /* If we're doing a single register write we can probably just
1348 * send the work_buf directly, otherwise try to do a gather
1349 * write.
1350 */
0d509f2b 1351 if (val == work_val)
0135bbcc 1352 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1353 map->format.reg_bytes +
1354 map->format.pad_bytes +
1355 val_len);
2547e201 1356 else if (map->bus->gather_write)
0135bbcc 1357 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1358 map->format.reg_bytes +
1359 map->format.pad_bytes,
b83a313b
MB
1360 val, val_len);
1361
2547e201 1362 /* If that didn't work fall back on linearising by hand. */
b83a313b 1363 if (ret == -ENOTSUPP) {
82159ba8
MB
1364 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1365 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1366 if (!buf)
1367 return -ENOMEM;
1368
1369 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1370 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1371 val, val_len);
0135bbcc 1372 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1373
1374 kfree(buf);
1375 }
1376
c6b570d9 1377 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
fb2736bb 1378
b83a313b
MB
1379 return ret;
1380}
1381
221ad7f2
MB
1382/**
1383 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1384 *
1385 * @map: Map to check.
1386 */
1387bool regmap_can_raw_write(struct regmap *map)
1388{
1389 return map->bus && map->format.format_val && map->format.format_reg;
1390}
1391EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1392
07c320dc
AS
1393static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1394 unsigned int val)
1395{
1396 int ret;
1397 struct regmap_range_node *range;
1398 struct regmap *map = context;
1399
f1b5c5c3 1400 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1401
1402 range = _regmap_range_lookup(map, reg);
1403 if (range) {
1404 ret = _regmap_select_page(map, &reg, range, 1);
1405 if (ret != 0)
1406 return ret;
1407 }
1408
1409 map->format.format_write(map, reg, val);
1410
c6b570d9 1411 trace_regmap_hw_write_start(map, reg, 1);
07c320dc
AS
1412
1413 ret = map->bus->write(map->bus_context, map->work_buf,
1414 map->format.buf_size);
1415
c6b570d9 1416 trace_regmap_hw_write_done(map, reg, 1);
07c320dc
AS
1417
1418 return ret;
1419}
1420
3ac17037
BB
1421static int _regmap_bus_reg_write(void *context, unsigned int reg,
1422 unsigned int val)
1423{
1424 struct regmap *map = context;
1425
1426 return map->bus->reg_write(map->bus_context, reg, val);
1427}
1428
07c320dc
AS
1429static int _regmap_bus_raw_write(void *context, unsigned int reg,
1430 unsigned int val)
1431{
1432 struct regmap *map = context;
1433
f1b5c5c3 1434 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1435
1436 map->format.format_val(map->work_buf + map->format.reg_bytes
1437 + map->format.pad_bytes, val, 0);
1438 return _regmap_raw_write(map, reg,
1439 map->work_buf +
1440 map->format.reg_bytes +
1441 map->format.pad_bytes,
0a819809 1442 map->format.val_bytes);
07c320dc
AS
1443}
1444
d2a5884a
AS
1445static inline void *_regmap_map_get_context(struct regmap *map)
1446{
1447 return (map->bus) ? map : map->bus_context;
1448}
1449
4d2dc095
DP
1450int _regmap_write(struct regmap *map, unsigned int reg,
1451 unsigned int val)
b83a313b 1452{
fb2736bb 1453 int ret;
d2a5884a 1454 void *context = _regmap_map_get_context(map);
b83a313b 1455
515f2261
IN
1456 if (!regmap_writeable(map, reg))
1457 return -EIO;
1458
d2a5884a 1459 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1460 ret = regcache_write(map, reg, val);
1461 if (ret != 0)
1462 return ret;
8ae0d7e8
MB
1463 if (map->cache_only) {
1464 map->cache_dirty = true;
5d1729e7 1465 return 0;
8ae0d7e8 1466 }
5d1729e7
DP
1467 }
1468
1044c180 1469#ifdef LOG_DEVICE
5336be84 1470 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
1471 dev_info(map->dev, "%x <= %x\n", reg, val);
1472#endif
1473
c6b570d9 1474 trace_regmap_reg_write(map, reg, val);
fb2736bb 1475
d2a5884a 1476 return map->reg_write(context, reg, val);
b83a313b
MB
1477}
1478
1479/**
1480 * regmap_write(): Write a value to a single register
1481 *
1482 * @map: Register map to write to
1483 * @reg: Register to write to
1484 * @val: Value to be written
1485 *
1486 * A value of zero will be returned on success, a negative errno will
1487 * be returned in error cases.
1488 */
1489int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1490{
1491 int ret;
1492
f01ee60f
SW
1493 if (reg % map->reg_stride)
1494 return -EINVAL;
1495
0d4529c5 1496 map->lock(map->lock_arg);
b83a313b
MB
1497
1498 ret = _regmap_write(map, reg, val);
1499
0d4529c5 1500 map->unlock(map->lock_arg);
b83a313b
MB
1501
1502 return ret;
1503}
1504EXPORT_SYMBOL_GPL(regmap_write);
1505
915f441b
MB
1506/**
1507 * regmap_write_async(): Write a value to a single register asynchronously
1508 *
1509 * @map: Register map to write to
1510 * @reg: Register to write to
1511 * @val: Value to be written
1512 *
1513 * A value of zero will be returned on success, a negative errno will
1514 * be returned in error cases.
1515 */
1516int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1517{
1518 int ret;
1519
1520 if (reg % map->reg_stride)
1521 return -EINVAL;
1522
1523 map->lock(map->lock_arg);
1524
1525 map->async = true;
1526
1527 ret = _regmap_write(map, reg, val);
1528
1529 map->async = false;
1530
1531 map->unlock(map->lock_arg);
1532
1533 return ret;
1534}
1535EXPORT_SYMBOL_GPL(regmap_write_async);
1536
b83a313b
MB
1537/**
1538 * regmap_raw_write(): Write raw values to one or more registers
1539 *
1540 * @map: Register map to write to
1541 * @reg: Initial register to write to
1542 * @val: Block of data to be written, laid out for direct transmission to the
1543 * device
1544 * @val_len: Length of data pointed to by val.
1545 *
1546 * This function is intended to be used for things like firmware
1547 * download where a large block of data needs to be transferred to the
1548 * device. No formatting will be done on the data provided.
1549 *
1550 * A value of zero will be returned on success, a negative errno will
1551 * be returned in error cases.
1552 */
1553int regmap_raw_write(struct regmap *map, unsigned int reg,
1554 const void *val, size_t val_len)
1555{
1556 int ret;
1557
221ad7f2 1558 if (!regmap_can_raw_write(map))
d2a5884a 1559 return -EINVAL;
851960ba
SW
1560 if (val_len % map->format.val_bytes)
1561 return -EINVAL;
1562
0d4529c5 1563 map->lock(map->lock_arg);
b83a313b 1564
0a819809 1565 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1566
0d4529c5 1567 map->unlock(map->lock_arg);
b83a313b
MB
1568
1569 return ret;
1570}
1571EXPORT_SYMBOL_GPL(regmap_raw_write);
1572
67252287
SK
1573/**
1574 * regmap_field_write(): Write a value to a single register field
1575 *
1576 * @field: Register field to write to
1577 * @val: Value to be written
1578 *
1579 * A value of zero will be returned on success, a negative errno will
1580 * be returned in error cases.
1581 */
1582int regmap_field_write(struct regmap_field *field, unsigned int val)
1583{
1584 return regmap_update_bits(field->regmap, field->reg,
1585 field->mask, val << field->shift);
1586}
1587EXPORT_SYMBOL_GPL(regmap_field_write);
1588
fdf20029
KM
1589/**
1590 * regmap_field_update_bits(): Perform a read/modify/write cycle
1591 * on the register field
1592 *
1593 * @field: Register field to write to
1594 * @mask: Bitmask to change
1595 * @val: Value to be written
1596 *
1597 * A value of zero will be returned on success, a negative errno will
1598 * be returned in error cases.
1599 */
1600int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1601{
1602 mask = (mask << field->shift) & field->mask;
1603
1604 return regmap_update_bits(field->regmap, field->reg,
1605 mask, val << field->shift);
1606}
1607EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1608
a0102375
KM
1609/**
1610 * regmap_fields_write(): Write a value to a single register field with port ID
1611 *
1612 * @field: Register field to write to
1613 * @id: port ID
1614 * @val: Value to be written
1615 *
1616 * A value of zero will be returned on success, a negative errno will
1617 * be returned in error cases.
1618 */
1619int regmap_fields_write(struct regmap_field *field, unsigned int id,
1620 unsigned int val)
1621{
1622 if (id >= field->id_size)
1623 return -EINVAL;
1624
1625 return regmap_update_bits(field->regmap,
1626 field->reg + (field->id_offset * id),
1627 field->mask, val << field->shift);
1628}
1629EXPORT_SYMBOL_GPL(regmap_fields_write);
1630
1631/**
1632 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1633 * on the register field
1634 *
1635 * @field: Register field to write to
1636 * @id: port ID
1637 * @mask: Bitmask to change
1638 * @val: Value to be written
1639 *
1640 * A value of zero will be returned on success, a negative errno will
1641 * be returned in error cases.
1642 */
1643int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1644 unsigned int mask, unsigned int val)
1645{
1646 if (id >= field->id_size)
1647 return -EINVAL;
1648
1649 mask = (mask << field->shift) & field->mask;
1650
1651 return regmap_update_bits(field->regmap,
1652 field->reg + (field->id_offset * id),
1653 mask, val << field->shift);
1654}
1655EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1656
8eaeb219
LD
1657/*
1658 * regmap_bulk_write(): Write multiple registers to the device
1659 *
1660 * @map: Register map to write to
1661 * @reg: First register to be write from
1662 * @val: Block of data to be written, in native register size for device
1663 * @val_count: Number of registers to write
1664 *
1665 * This function is intended to be used for writing a large block of
31b35e9e 1666 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1667 *
1668 * A value of zero will be returned on success, a negative errno will
1669 * be returned in error cases.
1670 */
1671int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1672 size_t val_count)
1673{
1674 int ret = 0, i;
1675 size_t val_bytes = map->format.val_bytes;
8eaeb219 1676
f4298360 1677 if (map->bus && !map->format.parse_inplace)
8eaeb219 1678 return -EINVAL;
f01ee60f
SW
1679 if (reg % map->reg_stride)
1680 return -EINVAL;
8eaeb219 1681
f4298360
SB
1682 /*
1683 * Some devices don't support bulk write, for
c594b7f2
MP
1684 * them we have a series of single write operations in the first two if
1685 * blocks.
1686 *
1687 * The first if block is used for memory mapped io. It does not allow
1688 * val_bytes of 3 for example.
1689 * The second one is used for busses which do not have this limitation
1690 * and can write arbitrary value lengths.
f4298360 1691 */
c594b7f2 1692 if (!map->bus) {
4999e962 1693 map->lock(map->lock_arg);
f4298360
SB
1694 for (i = 0; i < val_count; i++) {
1695 unsigned int ival;
1696
1697 switch (val_bytes) {
1698 case 1:
1699 ival = *(u8 *)(val + (i * val_bytes));
1700 break;
1701 case 2:
1702 ival = *(u16 *)(val + (i * val_bytes));
1703 break;
1704 case 4:
1705 ival = *(u32 *)(val + (i * val_bytes));
1706 break;
1707#ifdef CONFIG_64BIT
1708 case 8:
1709 ival = *(u64 *)(val + (i * val_bytes));
1710 break;
1711#endif
1712 default:
1713 ret = -EINVAL;
1714 goto out;
1715 }
8eaeb219 1716
f4298360
SB
1717 ret = _regmap_write(map, reg + (i * map->reg_stride),
1718 ival);
1719 if (ret != 0)
1720 goto out;
1721 }
4999e962
TI
1722out:
1723 map->unlock(map->lock_arg);
67921a1a 1724 } else if (map->use_single_write) {
c594b7f2
MP
1725 map->lock(map->lock_arg);
1726 for (i = 0; i < val_count; i++) {
1727 ret = _regmap_raw_write(map,
1728 reg + (i * map->reg_stride),
1729 val + (i * val_bytes),
1730 val_bytes);
1731 if (ret)
1732 break;
1733 }
1734 map->unlock(map->lock_arg);
8eaeb219 1735 } else {
f4298360
SB
1736 void *wval;
1737
d6b41cb0
XL
1738 if (!val_count)
1739 return -EINVAL;
1740
8eaeb219
LD
1741 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1742 if (!wval) {
8eaeb219 1743 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1744 return -ENOMEM;
8eaeb219
LD
1745 }
1746 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1747 map->format.parse_inplace(wval + i);
f4298360 1748
4999e962 1749 map->lock(map->lock_arg);
0a819809 1750 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1751 map->unlock(map->lock_arg);
8eaeb219 1752
8eaeb219 1753 kfree(wval);
f4298360 1754 }
8eaeb219
LD
1755 return ret;
1756}
1757EXPORT_SYMBOL_GPL(regmap_bulk_write);
1758
e894c3f4
OAO
1759/*
1760 * _regmap_raw_multi_reg_write()
1761 *
1762 * the (register,newvalue) pairs in regs have not been formatted, but
1763 * they are all in the same page and have been changed to being page
1764 * relative. The page register has been written if that was neccessary.
1765 */
1766static int _regmap_raw_multi_reg_write(struct regmap *map,
1767 const struct reg_default *regs,
1768 size_t num_regs)
1769{
1770 int ret;
1771 void *buf;
1772 int i;
1773 u8 *u8;
1774 size_t val_bytes = map->format.val_bytes;
1775 size_t reg_bytes = map->format.reg_bytes;
1776 size_t pad_bytes = map->format.pad_bytes;
1777 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1778 size_t len = pair_size * num_regs;
1779
f5727cd3
XL
1780 if (!len)
1781 return -EINVAL;
1782
e894c3f4
OAO
1783 buf = kzalloc(len, GFP_KERNEL);
1784 if (!buf)
1785 return -ENOMEM;
1786
1787 /* We have to linearise by hand. */
1788
1789 u8 = buf;
1790
1791 for (i = 0; i < num_regs; i++) {
1792 int reg = regs[i].reg;
1793 int val = regs[i].def;
c6b570d9 1794 trace_regmap_hw_write_start(map, reg, 1);
e894c3f4
OAO
1795 map->format.format_reg(u8, reg, map->reg_shift);
1796 u8 += reg_bytes + pad_bytes;
1797 map->format.format_val(u8, val, 0);
1798 u8 += val_bytes;
1799 }
1800 u8 = buf;
1801 *u8 |= map->write_flag_mask;
1802
1803 ret = map->bus->write(map->bus_context, buf, len);
1804
1805 kfree(buf);
1806
1807 for (i = 0; i < num_regs; i++) {
1808 int reg = regs[i].reg;
c6b570d9 1809 trace_regmap_hw_write_done(map, reg, 1);
e894c3f4
OAO
1810 }
1811 return ret;
1812}
1813
1814static unsigned int _regmap_register_page(struct regmap *map,
1815 unsigned int reg,
1816 struct regmap_range_node *range)
1817{
1818 unsigned int win_page = (reg - range->range_min) / range->window_len;
1819
1820 return win_page;
1821}
1822
1823static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1824 struct reg_default *regs,
1825 size_t num_regs)
1826{
1827 int ret;
1828 int i, n;
1829 struct reg_default *base;
b48d1398 1830 unsigned int this_page = 0;
e894c3f4
OAO
1831 /*
1832 * the set of registers are not neccessarily in order, but
1833 * since the order of write must be preserved this algorithm
1834 * chops the set each time the page changes
1835 */
1836 base = regs;
1837 for (i = 0, n = 0; i < num_regs; i++, n++) {
1838 unsigned int reg = regs[i].reg;
1839 struct regmap_range_node *range;
1840
1841 range = _regmap_range_lookup(map, reg);
1842 if (range) {
1843 unsigned int win_page = _regmap_register_page(map, reg,
1844 range);
1845
1846 if (i == 0)
1847 this_page = win_page;
1848 if (win_page != this_page) {
1849 this_page = win_page;
1850 ret = _regmap_raw_multi_reg_write(map, base, n);
1851 if (ret != 0)
1852 return ret;
1853 base += n;
1854 n = 0;
1855 }
1856 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1857 if (ret != 0)
1858 return ret;
1859 }
1860 }
1861 if (n > 0)
1862 return _regmap_raw_multi_reg_write(map, base, n);
1863 return 0;
1864}
1865
1d5b40bc
CK
1866static int _regmap_multi_reg_write(struct regmap *map,
1867 const struct reg_default *regs,
e894c3f4 1868 size_t num_regs)
1d5b40bc 1869{
e894c3f4
OAO
1870 int i;
1871 int ret;
1872
1873 if (!map->can_multi_write) {
1874 for (i = 0; i < num_regs; i++) {
1875 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1876 if (ret != 0)
1877 return ret;
1878 }
1879 return 0;
1880 }
1881
1882 if (!map->format.parse_inplace)
1883 return -EINVAL;
1884
1885 if (map->writeable_reg)
1886 for (i = 0; i < num_regs; i++) {
1887 int reg = regs[i].reg;
1888 if (!map->writeable_reg(map->dev, reg))
1889 return -EINVAL;
1890 if (reg % map->reg_stride)
1891 return -EINVAL;
1892 }
1893
1894 if (!map->cache_bypass) {
1895 for (i = 0; i < num_regs; i++) {
1896 unsigned int val = regs[i].def;
1897 unsigned int reg = regs[i].reg;
1898 ret = regcache_write(map, reg, val);
1899 if (ret) {
1900 dev_err(map->dev,
1901 "Error in caching of register: %x ret: %d\n",
1902 reg, ret);
1903 return ret;
1904 }
1905 }
1906 if (map->cache_only) {
1907 map->cache_dirty = true;
1908 return 0;
1909 }
1910 }
1911
1912 WARN_ON(!map->bus);
1d5b40bc
CK
1913
1914 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
1915 unsigned int reg = regs[i].reg;
1916 struct regmap_range_node *range;
1917 range = _regmap_range_lookup(map, reg);
1918 if (range) {
1919 size_t len = sizeof(struct reg_default)*num_regs;
1920 struct reg_default *base = kmemdup(regs, len,
1921 GFP_KERNEL);
1922 if (!base)
1923 return -ENOMEM;
1924 ret = _regmap_range_multi_paged_reg_write(map, base,
1925 num_regs);
1926 kfree(base);
1927
1d5b40bc
CK
1928 return ret;
1929 }
1930 }
e894c3f4 1931 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
1932}
1933
e33fabd3
AO
1934/*
1935 * regmap_multi_reg_write(): Write multiple registers to the device
1936 *
e894c3f4
OAO
1937 * where the set of register,value pairs are supplied in any order,
1938 * possibly not all in a single range.
e33fabd3
AO
1939 *
1940 * @map: Register map to write to
1941 * @regs: Array of structures containing register,value to be written
1942 * @num_regs: Number of registers to write
1943 *
e894c3f4
OAO
1944 * The 'normal' block write mode will send ultimately send data on the
1945 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1946 * addressed. However, this alternative block multi write mode will send
1947 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1948 * must of course support the mode.
e33fabd3 1949 *
e894c3f4
OAO
1950 * A value of zero will be returned on success, a negative errno will be
1951 * returned in error cases.
e33fabd3 1952 */
f7e2cec0
CK
1953int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1954 int num_regs)
e33fabd3 1955{
1d5b40bc 1956 int ret;
e33fabd3
AO
1957
1958 map->lock(map->lock_arg);
1959
1d5b40bc
CK
1960 ret = _regmap_multi_reg_write(map, regs, num_regs);
1961
e33fabd3
AO
1962 map->unlock(map->lock_arg);
1963
1964 return ret;
1965}
1966EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1967
1d5b40bc
CK
1968/*
1969 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1970 * device but not the cache
1971 *
e33fabd3
AO
1972 * where the set of register are supplied in any order
1973 *
1974 * @map: Register map to write to
1975 * @regs: Array of structures containing register,value to be written
1976 * @num_regs: Number of registers to write
1977 *
1978 * This function is intended to be used for writing a large block of data
1979 * atomically to the device in single transfer for those I2C client devices
1980 * that implement this alternative block write mode.
1981 *
1982 * A value of zero will be returned on success, a negative errno will
1983 * be returned in error cases.
1984 */
1d5b40bc
CK
1985int regmap_multi_reg_write_bypassed(struct regmap *map,
1986 const struct reg_default *regs,
1987 int num_regs)
e33fabd3 1988{
1d5b40bc
CK
1989 int ret;
1990 bool bypass;
e33fabd3
AO
1991
1992 map->lock(map->lock_arg);
1993
1d5b40bc
CK
1994 bypass = map->cache_bypass;
1995 map->cache_bypass = true;
1996
1997 ret = _regmap_multi_reg_write(map, regs, num_regs);
1998
1999 map->cache_bypass = bypass;
2000
e33fabd3
AO
2001 map->unlock(map->lock_arg);
2002
2003 return ret;
2004}
1d5b40bc 2005EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 2006
0d509f2b
MB
2007/**
2008 * regmap_raw_write_async(): Write raw values to one or more registers
2009 * asynchronously
2010 *
2011 * @map: Register map to write to
2012 * @reg: Initial register to write to
2013 * @val: Block of data to be written, laid out for direct transmission to the
2014 * device. Must be valid until regmap_async_complete() is called.
2015 * @val_len: Length of data pointed to by val.
2016 *
2017 * This function is intended to be used for things like firmware
2018 * download where a large block of data needs to be transferred to the
2019 * device. No formatting will be done on the data provided.
2020 *
2021 * If supported by the underlying bus the write will be scheduled
2022 * asynchronously, helping maximise I/O speed on higher speed buses
2023 * like SPI. regmap_async_complete() can be called to ensure that all
2024 * asynchrnous writes have been completed.
2025 *
2026 * A value of zero will be returned on success, a negative errno will
2027 * be returned in error cases.
2028 */
2029int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2030 const void *val, size_t val_len)
2031{
2032 int ret;
2033
2034 if (val_len % map->format.val_bytes)
2035 return -EINVAL;
2036 if (reg % map->reg_stride)
2037 return -EINVAL;
2038
2039 map->lock(map->lock_arg);
2040
0a819809
MB
2041 map->async = true;
2042
2043 ret = _regmap_raw_write(map, reg, val, val_len);
2044
2045 map->async = false;
0d509f2b
MB
2046
2047 map->unlock(map->lock_arg);
2048
2049 return ret;
2050}
2051EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2052
b83a313b
MB
2053static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2054 unsigned int val_len)
2055{
98bc7dfd 2056 struct regmap_range_node *range;
b83a313b
MB
2057 u8 *u8 = map->work_buf;
2058 int ret;
2059
f1b5c5c3 2060 WARN_ON(!map->bus);
d2a5884a 2061
98bc7dfd
MB
2062 range = _regmap_range_lookup(map, reg);
2063 if (range) {
2064 ret = _regmap_select_page(map, &reg, range,
2065 val_len / map->format.val_bytes);
0ff3e62f 2066 if (ret != 0)
98bc7dfd
MB
2067 return ret;
2068 }
6863ca62 2069
d939fb9a 2070 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
2071
2072 /*
6f306441 2073 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
2074 * register addresss; since it's always the high bits for all
2075 * current formats we can do this here rather than in
2076 * formatting. This may break if we get interesting formats.
2077 */
6f306441 2078 u8[0] |= map->read_flag_mask;
b83a313b 2079
c6b570d9 2080 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 2081
0135bbcc 2082 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 2083 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 2084 val, val_len);
b83a313b 2085
c6b570d9 2086 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
fb2736bb
MB
2087
2088 return ret;
b83a313b
MB
2089}
2090
3ac17037
BB
2091static int _regmap_bus_reg_read(void *context, unsigned int reg,
2092 unsigned int *val)
2093{
2094 struct regmap *map = context;
2095
2096 return map->bus->reg_read(map->bus_context, reg, val);
2097}
2098
ad278406
AS
2099static int _regmap_bus_read(void *context, unsigned int reg,
2100 unsigned int *val)
2101{
2102 int ret;
2103 struct regmap *map = context;
2104
2105 if (!map->format.parse_val)
2106 return -EINVAL;
2107
2108 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2109 if (ret == 0)
2110 *val = map->format.parse_val(map->work_buf);
2111
2112 return ret;
2113}
2114
b83a313b
MB
2115static int _regmap_read(struct regmap *map, unsigned int reg,
2116 unsigned int *val)
2117{
2118 int ret;
d2a5884a
AS
2119 void *context = _regmap_map_get_context(map);
2120
5d1729e7
DP
2121 if (!map->cache_bypass) {
2122 ret = regcache_read(map, reg, val);
2123 if (ret == 0)
2124 return 0;
2125 }
2126
2127 if (map->cache_only)
2128 return -EBUSY;
2129
d4807ad2
MS
2130 if (!regmap_readable(map, reg))
2131 return -EIO;
2132
d2a5884a 2133 ret = map->reg_read(context, reg, val);
fb2736bb 2134 if (ret == 0) {
1044c180 2135#ifdef LOG_DEVICE
5336be84 2136 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
2137 dev_info(map->dev, "%x => %x\n", reg, *val);
2138#endif
2139
c6b570d9 2140 trace_regmap_reg_read(map, reg, *val);
b83a313b 2141
ad278406
AS
2142 if (!map->cache_bypass)
2143 regcache_write(map, reg, *val);
2144 }
f2985367 2145
b83a313b
MB
2146 return ret;
2147}
2148
2149/**
2150 * regmap_read(): Read a value from a single register
2151 *
0093380c 2152 * @map: Register map to read from
b83a313b
MB
2153 * @reg: Register to be read from
2154 * @val: Pointer to store read value
2155 *
2156 * A value of zero will be returned on success, a negative errno will
2157 * be returned in error cases.
2158 */
2159int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2160{
2161 int ret;
2162
f01ee60f
SW
2163 if (reg % map->reg_stride)
2164 return -EINVAL;
2165
0d4529c5 2166 map->lock(map->lock_arg);
b83a313b
MB
2167
2168 ret = _regmap_read(map, reg, val);
2169
0d4529c5 2170 map->unlock(map->lock_arg);
b83a313b
MB
2171
2172 return ret;
2173}
2174EXPORT_SYMBOL_GPL(regmap_read);
2175
2176/**
2177 * regmap_raw_read(): Read raw data from the device
2178 *
0093380c 2179 * @map: Register map to read from
b83a313b
MB
2180 * @reg: First register to be read from
2181 * @val: Pointer to store read value
2182 * @val_len: Size of data to read
2183 *
2184 * A value of zero will be returned on success, a negative errno will
2185 * be returned in error cases.
2186 */
2187int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2188 size_t val_len)
2189{
b8fb5ab1
MB
2190 size_t val_bytes = map->format.val_bytes;
2191 size_t val_count = val_len / val_bytes;
2192 unsigned int v;
2193 int ret, i;
04e016ad 2194
d2a5884a
AS
2195 if (!map->bus)
2196 return -EINVAL;
851960ba
SW
2197 if (val_len % map->format.val_bytes)
2198 return -EINVAL;
f01ee60f
SW
2199 if (reg % map->reg_stride)
2200 return -EINVAL;
fa3eec77
MB
2201 if (val_count == 0)
2202 return -EINVAL;
851960ba 2203
0d4529c5 2204 map->lock(map->lock_arg);
b83a313b 2205
b8fb5ab1
MB
2206 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2207 map->cache_type == REGCACHE_NONE) {
2208 /* Physical block read if there's no cache involved */
2209 ret = _regmap_raw_read(map, reg, val, val_len);
2210
2211 } else {
2212 /* Otherwise go word by word for the cache; should be low
2213 * cost as we expect to hit the cache.
2214 */
2215 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2216 ret = _regmap_read(map, reg + (i * map->reg_stride),
2217 &v);
b8fb5ab1
MB
2218 if (ret != 0)
2219 goto out;
2220
d939fb9a 2221 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2222 }
2223 }
b83a313b 2224
b8fb5ab1 2225 out:
0d4529c5 2226 map->unlock(map->lock_arg);
b83a313b
MB
2227
2228 return ret;
2229}
2230EXPORT_SYMBOL_GPL(regmap_raw_read);
2231
67252287
SK
2232/**
2233 * regmap_field_read(): Read a value to a single register field
2234 *
2235 * @field: Register field to read from
2236 * @val: Pointer to store read value
2237 *
2238 * A value of zero will be returned on success, a negative errno will
2239 * be returned in error cases.
2240 */
2241int regmap_field_read(struct regmap_field *field, unsigned int *val)
2242{
2243 int ret;
2244 unsigned int reg_val;
2245 ret = regmap_read(field->regmap, field->reg, &reg_val);
2246 if (ret != 0)
2247 return ret;
2248
2249 reg_val &= field->mask;
2250 reg_val >>= field->shift;
2251 *val = reg_val;
2252
2253 return ret;
2254}
2255EXPORT_SYMBOL_GPL(regmap_field_read);
2256
a0102375
KM
2257/**
2258 * regmap_fields_read(): Read a value to a single register field with port ID
2259 *
2260 * @field: Register field to read from
2261 * @id: port ID
2262 * @val: Pointer to store read value
2263 *
2264 * A value of zero will be returned on success, a negative errno will
2265 * be returned in error cases.
2266 */
2267int regmap_fields_read(struct regmap_field *field, unsigned int id,
2268 unsigned int *val)
2269{
2270 int ret;
2271 unsigned int reg_val;
2272
2273 if (id >= field->id_size)
2274 return -EINVAL;
2275
2276 ret = regmap_read(field->regmap,
2277 field->reg + (field->id_offset * id),
2278 &reg_val);
2279 if (ret != 0)
2280 return ret;
2281
2282 reg_val &= field->mask;
2283 reg_val >>= field->shift;
2284 *val = reg_val;
2285
2286 return ret;
2287}
2288EXPORT_SYMBOL_GPL(regmap_fields_read);
2289
b83a313b
MB
2290/**
2291 * regmap_bulk_read(): Read multiple registers from the device
2292 *
0093380c 2293 * @map: Register map to read from
b83a313b
MB
2294 * @reg: First register to be read from
2295 * @val: Pointer to store read value, in native register size for device
2296 * @val_count: Number of registers to read
2297 *
2298 * A value of zero will be returned on success, a negative errno will
2299 * be returned in error cases.
2300 */
2301int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2302 size_t val_count)
2303{
2304 int ret, i;
2305 size_t val_bytes = map->format.val_bytes;
82cd9965 2306 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2307
f01ee60f
SW
2308 if (reg % map->reg_stride)
2309 return -EINVAL;
b83a313b 2310
3b58ee13 2311 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2312 /*
2313 * Some devices does not support bulk read, for
2314 * them we have a series of single read operations.
2315 */
67921a1a 2316 if (map->use_single_read) {
2e33caf1
AJ
2317 for (i = 0; i < val_count; i++) {
2318 ret = regmap_raw_read(map,
2319 reg + (i * map->reg_stride),
2320 val + (i * val_bytes),
2321 val_bytes);
2322 if (ret != 0)
2323 return ret;
2324 }
2325 } else {
2326 ret = regmap_raw_read(map, reg, val,
2327 val_bytes * val_count);
2328 if (ret != 0)
2329 return ret;
2330 }
de2d808f
MB
2331
2332 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2333 map->format.parse_inplace(val + i);
de2d808f
MB
2334 } else {
2335 for (i = 0; i < val_count; i++) {
6560ffd1 2336 unsigned int ival;
f01ee60f 2337 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2338 &ival);
de2d808f
MB
2339 if (ret != 0)
2340 return ret;
15b8d2c4 2341 map->format.format_val(val + (i * val_bytes), ival, 0);
de2d808f
MB
2342 }
2343 }
b83a313b
MB
2344
2345 return 0;
2346}
2347EXPORT_SYMBOL_GPL(regmap_bulk_read);
2348
018690d3
MB
2349static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2350 unsigned int mask, unsigned int val,
2351 bool *change)
b83a313b
MB
2352{
2353 int ret;
d91e8db2 2354 unsigned int tmp, orig;
b83a313b 2355
d91e8db2 2356 ret = _regmap_read(map, reg, &orig);
b83a313b 2357 if (ret != 0)
fc3ebd78 2358 return ret;
b83a313b 2359
d91e8db2 2360 tmp = orig & ~mask;
b83a313b
MB
2361 tmp |= val & mask;
2362
018690d3 2363 if (tmp != orig) {
d91e8db2 2364 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2365 if (change)
2366 *change = true;
018690d3 2367 } else {
e2f74dc6
XL
2368 if (change)
2369 *change = false;
018690d3 2370 }
b83a313b 2371
b83a313b
MB
2372 return ret;
2373}
018690d3
MB
2374
2375/**
2376 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2377 *
2378 * @map: Register map to update
2379 * @reg: Register to update
2380 * @mask: Bitmask to change
2381 * @val: New value for bitmask
2382 *
2383 * Returns zero for success, a negative number on error.
2384 */
2385int regmap_update_bits(struct regmap *map, unsigned int reg,
2386 unsigned int mask, unsigned int val)
2387{
fc3ebd78
KG
2388 int ret;
2389
0d4529c5 2390 map->lock(map->lock_arg);
e2f74dc6 2391 ret = _regmap_update_bits(map, reg, mask, val, NULL);
0d4529c5 2392 map->unlock(map->lock_arg);
fc3ebd78
KG
2393
2394 return ret;
018690d3 2395}
b83a313b 2396EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2397
915f441b
MB
2398/**
2399 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2400 * map asynchronously
2401 *
2402 * @map: Register map to update
2403 * @reg: Register to update
2404 * @mask: Bitmask to change
2405 * @val: New value for bitmask
2406 *
2407 * With most buses the read must be done synchronously so this is most
2408 * useful for devices with a cache which do not need to interact with
2409 * the hardware to determine the current register value.
2410 *
2411 * Returns zero for success, a negative number on error.
2412 */
2413int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2414 unsigned int mask, unsigned int val)
2415{
915f441b
MB
2416 int ret;
2417
2418 map->lock(map->lock_arg);
2419
2420 map->async = true;
2421
e2f74dc6 2422 ret = _regmap_update_bits(map, reg, mask, val, NULL);
915f441b
MB
2423
2424 map->async = false;
2425
2426 map->unlock(map->lock_arg);
2427
2428 return ret;
2429}
2430EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2431
018690d3
MB
2432/**
2433 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2434 * register map and report if updated
2435 *
2436 * @map: Register map to update
2437 * @reg: Register to update
2438 * @mask: Bitmask to change
2439 * @val: New value for bitmask
2440 * @change: Boolean indicating if a write was done
2441 *
2442 * Returns zero for success, a negative number on error.
2443 */
2444int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2445 unsigned int mask, unsigned int val,
2446 bool *change)
2447{
fc3ebd78
KG
2448 int ret;
2449
0d4529c5 2450 map->lock(map->lock_arg);
fc3ebd78 2451 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2452 map->unlock(map->lock_arg);
fc3ebd78 2453 return ret;
018690d3
MB
2454}
2455EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2456
915f441b
MB
2457/**
2458 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2459 * register map asynchronously and report if
2460 * updated
2461 *
2462 * @map: Register map to update
2463 * @reg: Register to update
2464 * @mask: Bitmask to change
2465 * @val: New value for bitmask
2466 * @change: Boolean indicating if a write was done
2467 *
2468 * With most buses the read must be done synchronously so this is most
2469 * useful for devices with a cache which do not need to interact with
2470 * the hardware to determine the current register value.
2471 *
2472 * Returns zero for success, a negative number on error.
2473 */
2474int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2475 unsigned int mask, unsigned int val,
2476 bool *change)
2477{
2478 int ret;
2479
2480 map->lock(map->lock_arg);
2481
2482 map->async = true;
2483
2484 ret = _regmap_update_bits(map, reg, mask, val, change);
2485
2486 map->async = false;
2487
2488 map->unlock(map->lock_arg);
2489
2490 return ret;
2491}
2492EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2493
0d509f2b
MB
2494void regmap_async_complete_cb(struct regmap_async *async, int ret)
2495{
2496 struct regmap *map = async->map;
2497 bool wake;
2498
c6b570d9 2499 trace_regmap_async_io_complete(map);
fe7d4ccd 2500
0d509f2b 2501 spin_lock(&map->async_lock);
7e09a979 2502 list_move(&async->list, &map->async_free);
0d509f2b
MB
2503 wake = list_empty(&map->async_list);
2504
2505 if (ret != 0)
2506 map->async_ret = ret;
2507
2508 spin_unlock(&map->async_lock);
2509
0d509f2b
MB
2510 if (wake)
2511 wake_up(&map->async_waitq);
2512}
f804fb56 2513EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2514
2515static int regmap_async_is_done(struct regmap *map)
2516{
2517 unsigned long flags;
2518 int ret;
2519
2520 spin_lock_irqsave(&map->async_lock, flags);
2521 ret = list_empty(&map->async_list);
2522 spin_unlock_irqrestore(&map->async_lock, flags);
2523
2524 return ret;
2525}
2526
2527/**
2528 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2529 *
2530 * @map: Map to operate on.
2531 *
2532 * Blocks until any pending asynchronous I/O has completed. Returns
2533 * an error code for any failed I/O operations.
2534 */
2535int regmap_async_complete(struct regmap *map)
2536{
2537 unsigned long flags;
2538 int ret;
2539
2540 /* Nothing to do with no async support */
f2e055e7 2541 if (!map->bus || !map->bus->async_write)
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MB
2542 return 0;
2543
c6b570d9 2544 trace_regmap_async_complete_start(map);
fe7d4ccd 2545
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MB
2546 wait_event(map->async_waitq, regmap_async_is_done(map));
2547
2548 spin_lock_irqsave(&map->async_lock, flags);
2549 ret = map->async_ret;
2550 map->async_ret = 0;
2551 spin_unlock_irqrestore(&map->async_lock, flags);
2552
c6b570d9 2553 trace_regmap_async_complete_done(map);
fe7d4ccd 2554
0d509f2b
MB
2555 return ret;
2556}
f88948ef 2557EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2558
22f0d90a
MB
2559/**
2560 * regmap_register_patch: Register and apply register updates to be applied
2561 * on device initialistion
2562 *
2563 * @map: Register map to apply updates to.
2564 * @regs: Values to update.
2565 * @num_regs: Number of entries in regs.
2566 *
2567 * Register a set of register updates to be applied to the device
2568 * whenever the device registers are synchronised with the cache and
2569 * apply them immediately. Typically this is used to apply
2570 * corrections to be applied to the device defaults on startup, such
2571 * as the updates some vendors provide to undocumented registers.
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MB
2572 *
2573 * The caller must ensure that this function cannot be called
2574 * concurrently with either itself or regcache_sync().
22f0d90a
MB
2575 */
2576int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2577 int num_regs)
2578{
aab13ebc 2579 struct reg_default *p;
6bf13103 2580 int ret;
22f0d90a
MB
2581 bool bypass;
2582
bd60e381
CZ
2583 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2584 num_regs))
2585 return 0;
2586
aab13ebc
MB
2587 p = krealloc(map->patch,
2588 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2589 GFP_KERNEL);
2590 if (p) {
2591 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2592 map->patch = p;
2593 map->patch_regs += num_regs;
22f0d90a 2594 } else {
56fb1c74 2595 return -ENOMEM;
22f0d90a
MB
2596 }
2597
0d4529c5 2598 map->lock(map->lock_arg);
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MB
2599
2600 bypass = map->cache_bypass;
2601
2602 map->cache_bypass = true;
1a25f261 2603 map->async = true;
22f0d90a 2604
6bf13103 2605 ret = _regmap_multi_reg_write(map, regs, num_regs);
22f0d90a 2606
1a25f261 2607 map->async = false;
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MB
2608 map->cache_bypass = bypass;
2609
0d4529c5 2610 map->unlock(map->lock_arg);
22f0d90a 2611
1a25f261
MB
2612 regmap_async_complete(map);
2613
22f0d90a
MB
2614 return ret;
2615}
2616EXPORT_SYMBOL_GPL(regmap_register_patch);
2617
eae4b51b 2618/*
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MB
2619 * regmap_get_val_bytes(): Report the size of a register value
2620 *
2621 * Report the size of a register value, mainly intended to for use by
2622 * generic infrastructure built on top of regmap.
2623 */
2624int regmap_get_val_bytes(struct regmap *map)
2625{
2626 if (map->format.format_write)
2627 return -EINVAL;
2628
2629 return map->format.val_bytes;
2630}
2631EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2632
668abc72
SK
2633/**
2634 * regmap_get_max_register(): Report the max register value
2635 *
2636 * Report the max register value, mainly intended to for use by
2637 * generic infrastructure built on top of regmap.
2638 */
2639int regmap_get_max_register(struct regmap *map)
2640{
2641 return map->max_register ? map->max_register : -EINVAL;
2642}
2643EXPORT_SYMBOL_GPL(regmap_get_max_register);
2644
a2f776cb
SK
2645/**
2646 * regmap_get_reg_stride(): Report the register address stride
2647 *
2648 * Report the register address stride, mainly intended to for use by
2649 * generic infrastructure built on top of regmap.
2650 */
2651int regmap_get_reg_stride(struct regmap *map)
2652{
2653 return map->reg_stride;
2654}
2655EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2656
13ff50c8
NC
2657int regmap_parse_val(struct regmap *map, const void *buf,
2658 unsigned int *val)
2659{
2660 if (!map->format.parse_val)
2661 return -EINVAL;
2662
2663 *val = map->format.parse_val(buf);
2664
2665 return 0;
2666}
2667EXPORT_SYMBOL_GPL(regmap_parse_val);
2668
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MB
2669static int __init regmap_initcall(void)
2670{
2671 regmap_debugfs_initcall();
2672
2673 return 0;
2674}
2675postcore_initcall(regmap_initcall);
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