regmap: Cache async work structures
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
30b2a553 19#include <linux/sched.h>
b83a313b 20
fb2736bb
MB
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
93de9124 24#include "internal.h"
b83a313b 25
1044c180
MB
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
ad278406
AS
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
07c320dc
AS
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
ad278406 44
76aad392
DC
45bool regmap_reg_in_ranges(unsigned int reg,
46 const struct regmap_range *ranges,
47 unsigned int nranges)
48{
49 const struct regmap_range *r;
50 int i;
51
52 for (i = 0, r = ranges; i < nranges; i++, r++)
53 if (regmap_reg_in_range(reg, r))
54 return true;
55 return false;
56}
57EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
58
154881e5
MB
59bool regmap_check_range_table(struct regmap *map, unsigned int reg,
60 const struct regmap_access_table *table)
76aad392
DC
61{
62 /* Check "no ranges" first */
63 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
64 return false;
65
66 /* In case zero "yes ranges" are supplied, any reg is OK */
67 if (!table->n_yes_ranges)
68 return true;
69
70 return regmap_reg_in_ranges(reg, table->yes_ranges,
71 table->n_yes_ranges);
72}
154881e5 73EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 74
8de2f081
MB
75bool regmap_writeable(struct regmap *map, unsigned int reg)
76{
77 if (map->max_register && reg > map->max_register)
78 return false;
79
80 if (map->writeable_reg)
81 return map->writeable_reg(map->dev, reg);
82
76aad392 83 if (map->wr_table)
154881e5 84 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 85
8de2f081
MB
86 return true;
87}
88
89bool regmap_readable(struct regmap *map, unsigned int reg)
90{
91 if (map->max_register && reg > map->max_register)
92 return false;
93
4191f197
WS
94 if (map->format.format_write)
95 return false;
96
8de2f081
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97 if (map->readable_reg)
98 return map->readable_reg(map->dev, reg);
99
76aad392 100 if (map->rd_table)
154881e5 101 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 102
8de2f081
MB
103 return true;
104}
105
106bool regmap_volatile(struct regmap *map, unsigned int reg)
107{
4191f197 108 if (!regmap_readable(map, reg))
8de2f081
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109 return false;
110
111 if (map->volatile_reg)
112 return map->volatile_reg(map->dev, reg);
113
76aad392 114 if (map->volatile_table)
154881e5 115 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 116
b92be6fe
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117 if (map->cache_ops)
118 return false;
119 else
120 return true;
8de2f081
MB
121}
122
123bool regmap_precious(struct regmap *map, unsigned int reg)
124{
4191f197 125 if (!regmap_readable(map, reg))
8de2f081
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126 return false;
127
128 if (map->precious_reg)
129 return map->precious_reg(map->dev, reg);
130
76aad392 131 if (map->precious_table)
154881e5 132 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 133
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134 return false;
135}
136
82cd9965 137static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 138 size_t num)
82cd9965
LPC
139{
140 unsigned int i;
141
142 for (i = 0; i < num; i++)
143 if (!regmap_volatile(map, reg + i))
144 return false;
145
146 return true;
147}
148
9aa50750
WS
149static void regmap_format_2_6_write(struct regmap *map,
150 unsigned int reg, unsigned int val)
151{
152 u8 *out = map->work_buf;
153
154 *out = (reg << 6) | val;
155}
156
b83a313b
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157static void regmap_format_4_12_write(struct regmap *map,
158 unsigned int reg, unsigned int val)
159{
160 __be16 *out = map->work_buf;
161 *out = cpu_to_be16((reg << 12) | val);
162}
163
164static void regmap_format_7_9_write(struct regmap *map,
165 unsigned int reg, unsigned int val)
166{
167 __be16 *out = map->work_buf;
168 *out = cpu_to_be16((reg << 9) | val);
169}
170
7e5ec63e
LPC
171static void regmap_format_10_14_write(struct regmap *map,
172 unsigned int reg, unsigned int val)
173{
174 u8 *out = map->work_buf;
175
176 out[2] = val;
177 out[1] = (val >> 8) | (reg << 6);
178 out[0] = reg >> 2;
179}
180
d939fb9a 181static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
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182{
183 u8 *b = buf;
184
d939fb9a 185 b[0] = val << shift;
b83a313b
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186}
187
141eba2e 188static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
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189{
190 __be16 *b = buf;
191
d939fb9a 192 b[0] = cpu_to_be16(val << shift);
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193}
194
141eba2e
SW
195static void regmap_format_16_native(void *buf, unsigned int val,
196 unsigned int shift)
197{
198 *(u16 *)buf = val << shift;
199}
200
d939fb9a 201static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
202{
203 u8 *b = buf;
204
d939fb9a
MR
205 val <<= shift;
206
ea279fc5
MR
207 b[0] = val >> 16;
208 b[1] = val >> 8;
209 b[2] = val;
210}
211
141eba2e 212static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
213{
214 __be32 *b = buf;
215
d939fb9a 216 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
217}
218
141eba2e
SW
219static void regmap_format_32_native(void *buf, unsigned int val,
220 unsigned int shift)
221{
222 *(u32 *)buf = val << shift;
223}
224
8a819ff8 225static void regmap_parse_inplace_noop(void *buf)
b83a313b 226{
8a819ff8
MB
227}
228
229static unsigned int regmap_parse_8(const void *buf)
230{
231 const u8 *b = buf;
b83a313b
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232
233 return b[0];
234}
235
8a819ff8
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236static unsigned int regmap_parse_16_be(const void *buf)
237{
238 const __be16 *b = buf;
239
240 return be16_to_cpu(b[0]);
241}
242
243static void regmap_parse_16_be_inplace(void *buf)
b83a313b
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244{
245 __be16 *b = buf;
246
247 b[0] = be16_to_cpu(b[0]);
b83a313b
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248}
249
8a819ff8 250static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
251{
252 return *(u16 *)buf;
253}
254
8a819ff8 255static unsigned int regmap_parse_24(const void *buf)
ea279fc5 256{
8a819ff8 257 const u8 *b = buf;
ea279fc5
MR
258 unsigned int ret = b[2];
259 ret |= ((unsigned int)b[1]) << 8;
260 ret |= ((unsigned int)b[0]) << 16;
261
262 return ret;
263}
264
8a819ff8
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265static unsigned int regmap_parse_32_be(const void *buf)
266{
267 const __be32 *b = buf;
268
269 return be32_to_cpu(b[0]);
270}
271
272static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
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273{
274 __be32 *b = buf;
275
276 b[0] = be32_to_cpu(b[0]);
7d5e525b
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277}
278
8a819ff8 279static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
280{
281 return *(u32 *)buf;
282}
283
0d4529c5 284static void regmap_lock_mutex(void *__map)
bacdbe07 285{
0d4529c5 286 struct regmap *map = __map;
bacdbe07
SW
287 mutex_lock(&map->mutex);
288}
289
0d4529c5 290static void regmap_unlock_mutex(void *__map)
bacdbe07 291{
0d4529c5 292 struct regmap *map = __map;
bacdbe07
SW
293 mutex_unlock(&map->mutex);
294}
295
0d4529c5 296static void regmap_lock_spinlock(void *__map)
b4519c71 297__acquires(&map->spinlock)
bacdbe07 298{
0d4529c5 299 struct regmap *map = __map;
92ab1aab
LPC
300 unsigned long flags;
301
302 spin_lock_irqsave(&map->spinlock, flags);
303 map->spinlock_flags = flags;
bacdbe07
SW
304}
305
0d4529c5 306static void regmap_unlock_spinlock(void *__map)
b4519c71 307__releases(&map->spinlock)
bacdbe07 308{
0d4529c5 309 struct regmap *map = __map;
92ab1aab 310 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
311}
312
72b39f6f
MB
313static void dev_get_regmap_release(struct device *dev, void *res)
314{
315 /*
316 * We don't actually have anything to do here; the goal here
317 * is not to manage the regmap but to provide a simple way to
318 * get the regmap back given a struct device.
319 */
320}
321
6863ca62
KG
322static bool _regmap_range_add(struct regmap *map,
323 struct regmap_range_node *data)
324{
325 struct rb_root *root = &map->range_tree;
326 struct rb_node **new = &(root->rb_node), *parent = NULL;
327
328 while (*new) {
329 struct regmap_range_node *this =
330 container_of(*new, struct regmap_range_node, node);
331
332 parent = *new;
333 if (data->range_max < this->range_min)
334 new = &((*new)->rb_left);
335 else if (data->range_min > this->range_max)
336 new = &((*new)->rb_right);
337 else
338 return false;
339 }
340
341 rb_link_node(&data->node, parent, new);
342 rb_insert_color(&data->node, root);
343
344 return true;
345}
346
347static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
348 unsigned int reg)
349{
350 struct rb_node *node = map->range_tree.rb_node;
351
352 while (node) {
353 struct regmap_range_node *this =
354 container_of(node, struct regmap_range_node, node);
355
356 if (reg < this->range_min)
357 node = node->rb_left;
358 else if (reg > this->range_max)
359 node = node->rb_right;
360 else
361 return this;
362 }
363
364 return NULL;
365}
366
367static void regmap_range_exit(struct regmap *map)
368{
369 struct rb_node *next;
370 struct regmap_range_node *range_node;
371
372 next = rb_first(&map->range_tree);
373 while (next) {
374 range_node = rb_entry(next, struct regmap_range_node, node);
375 next = rb_next(&range_node->node);
376 rb_erase(&range_node->node, &map->range_tree);
377 kfree(range_node);
378 }
379
380 kfree(map->selector_work_buf);
381}
382
b83a313b
MB
383/**
384 * regmap_init(): Initialise register map
385 *
386 * @dev: Device that will be interacted with
387 * @bus: Bus-specific callbacks to use with device
0135bbcc 388 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
389 * @config: Configuration for register map
390 *
391 * The return value will be an ERR_PTR() on error or a valid pointer to
392 * a struct regmap. This function should generally not be called
393 * directly, it should be called by bus-specific init functions.
394 */
395struct regmap *regmap_init(struct device *dev,
396 const struct regmap_bus *bus,
0135bbcc 397 void *bus_context,
b83a313b
MB
398 const struct regmap_config *config)
399{
72b39f6f 400 struct regmap *map, **m;
b83a313b 401 int ret = -EINVAL;
141eba2e 402 enum regmap_endian reg_endian, val_endian;
6863ca62 403 int i, j;
b83a313b 404
d2a5884a 405 if (!config)
abbb18fb 406 goto err;
b83a313b
MB
407
408 map = kzalloc(sizeof(*map), GFP_KERNEL);
409 if (map == NULL) {
410 ret = -ENOMEM;
411 goto err;
412 }
413
0d4529c5
DC
414 if (config->lock && config->unlock) {
415 map->lock = config->lock;
416 map->unlock = config->unlock;
417 map->lock_arg = config->lock_arg;
bacdbe07 418 } else {
d2a5884a
AS
419 if ((bus && bus->fast_io) ||
420 config->fast_io) {
0d4529c5
DC
421 spin_lock_init(&map->spinlock);
422 map->lock = regmap_lock_spinlock;
423 map->unlock = regmap_unlock_spinlock;
424 } else {
425 mutex_init(&map->mutex);
426 map->lock = regmap_lock_mutex;
427 map->unlock = regmap_unlock_mutex;
428 }
429 map->lock_arg = map;
bacdbe07 430 }
c212accc 431 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 432 map->format.pad_bytes = config->pad_bits / 8;
c212accc 433 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
434 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
435 config->val_bits + config->pad_bits, 8);
d939fb9a 436 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
437 if (config->reg_stride)
438 map->reg_stride = config->reg_stride;
439 else
440 map->reg_stride = 1;
2e33caf1 441 map->use_single_rw = config->use_single_rw;
b83a313b
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442 map->dev = dev;
443 map->bus = bus;
0135bbcc 444 map->bus_context = bus_context;
2e2ae66d 445 map->max_register = config->max_register;
76aad392
DC
446 map->wr_table = config->wr_table;
447 map->rd_table = config->rd_table;
448 map->volatile_table = config->volatile_table;
449 map->precious_table = config->precious_table;
2e2ae66d
MB
450 map->writeable_reg = config->writeable_reg;
451 map->readable_reg = config->readable_reg;
452 map->volatile_reg = config->volatile_reg;
2efe1642 453 map->precious_reg = config->precious_reg;
5d1729e7 454 map->cache_type = config->cache_type;
72b39f6f 455 map->name = config->name;
b83a313b 456
0d509f2b
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457 spin_lock_init(&map->async_lock);
458 INIT_LIST_HEAD(&map->async_list);
7e09a979 459 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
460 init_waitqueue_head(&map->async_waitq);
461
6f306441
LPC
462 if (config->read_flag_mask || config->write_flag_mask) {
463 map->read_flag_mask = config->read_flag_mask;
464 map->write_flag_mask = config->write_flag_mask;
d2a5884a 465 } else if (bus) {
6f306441
LPC
466 map->read_flag_mask = bus->read_flag_mask;
467 }
468
d2a5884a
AS
469 if (!bus) {
470 map->reg_read = config->reg_read;
471 map->reg_write = config->reg_write;
472
473 map->defer_caching = false;
474 goto skip_format_initialization;
475 } else {
476 map->reg_read = _regmap_bus_read;
477 }
ad278406 478
141eba2e
SW
479 reg_endian = config->reg_format_endian;
480 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
481 reg_endian = bus->reg_format_endian_default;
482 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
483 reg_endian = REGMAP_ENDIAN_BIG;
484
485 val_endian = config->val_format_endian;
486 if (val_endian == REGMAP_ENDIAN_DEFAULT)
487 val_endian = bus->val_format_endian_default;
488 if (val_endian == REGMAP_ENDIAN_DEFAULT)
489 val_endian = REGMAP_ENDIAN_BIG;
490
d939fb9a 491 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
492 case 2:
493 switch (config->val_bits) {
494 case 6:
495 map->format.format_write = regmap_format_2_6_write;
496 break;
497 default:
498 goto err_map;
499 }
500 break;
501
b83a313b
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502 case 4:
503 switch (config->val_bits) {
504 case 12:
505 map->format.format_write = regmap_format_4_12_write;
506 break;
507 default:
508 goto err_map;
509 }
510 break;
511
512 case 7:
513 switch (config->val_bits) {
514 case 9:
515 map->format.format_write = regmap_format_7_9_write;
516 break;
517 default:
518 goto err_map;
519 }
520 break;
521
7e5ec63e
LPC
522 case 10:
523 switch (config->val_bits) {
524 case 14:
525 map->format.format_write = regmap_format_10_14_write;
526 break;
527 default:
528 goto err_map;
529 }
530 break;
531
b83a313b
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532 case 8:
533 map->format.format_reg = regmap_format_8;
534 break;
535
536 case 16:
141eba2e
SW
537 switch (reg_endian) {
538 case REGMAP_ENDIAN_BIG:
539 map->format.format_reg = regmap_format_16_be;
540 break;
541 case REGMAP_ENDIAN_NATIVE:
542 map->format.format_reg = regmap_format_16_native;
543 break;
544 default:
545 goto err_map;
546 }
b83a313b
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547 break;
548
237019e7
LPC
549 case 24:
550 if (reg_endian != REGMAP_ENDIAN_BIG)
551 goto err_map;
552 map->format.format_reg = regmap_format_24;
553 break;
554
7d5e525b 555 case 32:
141eba2e
SW
556 switch (reg_endian) {
557 case REGMAP_ENDIAN_BIG:
558 map->format.format_reg = regmap_format_32_be;
559 break;
560 case REGMAP_ENDIAN_NATIVE:
561 map->format.format_reg = regmap_format_32_native;
562 break;
563 default:
564 goto err_map;
565 }
7d5e525b
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566 break;
567
b83a313b
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568 default:
569 goto err_map;
570 }
571
8a819ff8
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572 if (val_endian == REGMAP_ENDIAN_NATIVE)
573 map->format.parse_inplace = regmap_parse_inplace_noop;
574
b83a313b
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575 switch (config->val_bits) {
576 case 8:
577 map->format.format_val = regmap_format_8;
578 map->format.parse_val = regmap_parse_8;
8a819ff8 579 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
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580 break;
581 case 16:
141eba2e
SW
582 switch (val_endian) {
583 case REGMAP_ENDIAN_BIG:
584 map->format.format_val = regmap_format_16_be;
585 map->format.parse_val = regmap_parse_16_be;
8a819ff8 586 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e
SW
587 break;
588 case REGMAP_ENDIAN_NATIVE:
589 map->format.format_val = regmap_format_16_native;
590 map->format.parse_val = regmap_parse_16_native;
591 break;
592 default:
593 goto err_map;
594 }
b83a313b 595 break;
ea279fc5 596 case 24:
141eba2e
SW
597 if (val_endian != REGMAP_ENDIAN_BIG)
598 goto err_map;
ea279fc5
MR
599 map->format.format_val = regmap_format_24;
600 map->format.parse_val = regmap_parse_24;
601 break;
7d5e525b 602 case 32:
141eba2e
SW
603 switch (val_endian) {
604 case REGMAP_ENDIAN_BIG:
605 map->format.format_val = regmap_format_32_be;
606 map->format.parse_val = regmap_parse_32_be;
8a819ff8 607 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e
SW
608 break;
609 case REGMAP_ENDIAN_NATIVE:
610 map->format.format_val = regmap_format_32_native;
611 map->format.parse_val = regmap_parse_32_native;
612 break;
613 default:
614 goto err_map;
615 }
7d5e525b 616 break;
b83a313b
MB
617 }
618
141eba2e
SW
619 if (map->format.format_write) {
620 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
621 (val_endian != REGMAP_ENDIAN_BIG))
622 goto err_map;
7a647614 623 map->use_single_rw = true;
141eba2e 624 }
7a647614 625
b83a313b
MB
626 if (!map->format.format_write &&
627 !(map->format.format_reg && map->format.format_val))
628 goto err_map;
629
82159ba8 630 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
631 if (map->work_buf == NULL) {
632 ret = -ENOMEM;
5204f5e3 633 goto err_map;
b83a313b
MB
634 }
635
d2a5884a
AS
636 if (map->format.format_write) {
637 map->defer_caching = false;
07c320dc 638 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
639 } else if (map->format.format_val) {
640 map->defer_caching = true;
07c320dc 641 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
642 }
643
644skip_format_initialization:
07c320dc 645
6863ca62 646 map->range_tree = RB_ROOT;
e3549cd0 647 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
648 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
649 struct regmap_range_node *new;
650
651 /* Sanity check */
061adc06
MB
652 if (range_cfg->range_max < range_cfg->range_min) {
653 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
654 range_cfg->range_max, range_cfg->range_min);
6863ca62 655 goto err_range;
061adc06
MB
656 }
657
658 if (range_cfg->range_max > map->max_register) {
659 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
660 range_cfg->range_max, map->max_register);
661 goto err_range;
662 }
663
664 if (range_cfg->selector_reg > map->max_register) {
665 dev_err(map->dev,
666 "Invalid range %d: selector out of map\n", i);
667 goto err_range;
668 }
669
670 if (range_cfg->window_len == 0) {
671 dev_err(map->dev, "Invalid range %d: window_len 0\n",
672 i);
673 goto err_range;
674 }
6863ca62
KG
675
676 /* Make sure, that this register range has no selector
677 or data window within its boundary */
e3549cd0 678 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
679 unsigned sel_reg = config->ranges[j].selector_reg;
680 unsigned win_min = config->ranges[j].window_start;
681 unsigned win_max = win_min +
682 config->ranges[j].window_len - 1;
683
f161d220
PZ
684 /* Allow data window inside its own virtual range */
685 if (j == i)
686 continue;
687
6863ca62
KG
688 if (range_cfg->range_min <= sel_reg &&
689 sel_reg <= range_cfg->range_max) {
061adc06
MB
690 dev_err(map->dev,
691 "Range %d: selector for %d in window\n",
692 i, j);
6863ca62
KG
693 goto err_range;
694 }
695
696 if (!(win_max < range_cfg->range_min ||
697 win_min > range_cfg->range_max)) {
061adc06
MB
698 dev_err(map->dev,
699 "Range %d: window for %d in window\n",
700 i, j);
6863ca62
KG
701 goto err_range;
702 }
703 }
704
705 new = kzalloc(sizeof(*new), GFP_KERNEL);
706 if (new == NULL) {
707 ret = -ENOMEM;
708 goto err_range;
709 }
710
4b020b3f 711 new->map = map;
d058bb49 712 new->name = range_cfg->name;
6863ca62
KG
713 new->range_min = range_cfg->range_min;
714 new->range_max = range_cfg->range_max;
715 new->selector_reg = range_cfg->selector_reg;
716 new->selector_mask = range_cfg->selector_mask;
717 new->selector_shift = range_cfg->selector_shift;
718 new->window_start = range_cfg->window_start;
719 new->window_len = range_cfg->window_len;
720
721 if (_regmap_range_add(map, new) == false) {
061adc06 722 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
723 kfree(new);
724 goto err_range;
725 }
726
727 if (map->selector_work_buf == NULL) {
728 map->selector_work_buf =
729 kzalloc(map->format.buf_size, GFP_KERNEL);
730 if (map->selector_work_buf == NULL) {
731 ret = -ENOMEM;
732 goto err_range;
733 }
734 }
735 }
052d2cd1 736
c6432ea9
DP
737 regmap_debugfs_init(map, config->name);
738
e5e3b8ab 739 ret = regcache_init(map, config);
0ff3e62f 740 if (ret != 0)
6863ca62
KG
741 goto err_range;
742
72b39f6f
MB
743 /* Add a devres resource for dev_get_regmap() */
744 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
745 if (!m) {
746 ret = -ENOMEM;
6863ca62 747 goto err_debugfs;
72b39f6f
MB
748 }
749 *m = map;
750 devres_add(dev, m);
751
b83a313b
MB
752 return map;
753
bfaa25f3
SW
754err_debugfs:
755 regmap_debugfs_exit(map);
72b39f6f 756 regcache_exit(map);
6863ca62
KG
757err_range:
758 regmap_range_exit(map);
58072cbf 759 kfree(map->work_buf);
b83a313b
MB
760err_map:
761 kfree(map);
762err:
763 return ERR_PTR(ret);
764}
765EXPORT_SYMBOL_GPL(regmap_init);
766
c0eb4676
MB
767static void devm_regmap_release(struct device *dev, void *res)
768{
769 regmap_exit(*(struct regmap **)res);
770}
771
772/**
773 * devm_regmap_init(): Initialise managed register map
774 *
775 * @dev: Device that will be interacted with
776 * @bus: Bus-specific callbacks to use with device
0135bbcc 777 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
778 * @config: Configuration for register map
779 *
780 * The return value will be an ERR_PTR() on error or a valid pointer
781 * to a struct regmap. This function should generally not be called
782 * directly, it should be called by bus-specific init functions. The
783 * map will be automatically freed by the device management code.
784 */
785struct regmap *devm_regmap_init(struct device *dev,
786 const struct regmap_bus *bus,
0135bbcc 787 void *bus_context,
c0eb4676
MB
788 const struct regmap_config *config)
789{
790 struct regmap **ptr, *regmap;
791
792 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
793 if (!ptr)
794 return ERR_PTR(-ENOMEM);
795
0135bbcc 796 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
797 if (!IS_ERR(regmap)) {
798 *ptr = regmap;
799 devres_add(dev, ptr);
800 } else {
801 devres_free(ptr);
802 }
803
804 return regmap;
805}
806EXPORT_SYMBOL_GPL(devm_regmap_init);
807
67252287
SK
808static void regmap_field_init(struct regmap_field *rm_field,
809 struct regmap *regmap, struct reg_field reg_field)
810{
811 int field_bits = reg_field.msb - reg_field.lsb + 1;
812 rm_field->regmap = regmap;
813 rm_field->reg = reg_field.reg;
814 rm_field->shift = reg_field.lsb;
815 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
816}
817
818/**
819 * devm_regmap_field_alloc(): Allocate and initialise a register field
820 * in a register map.
821 *
822 * @dev: Device that will be interacted with
823 * @regmap: regmap bank in which this register field is located.
824 * @reg_field: Register field with in the bank.
825 *
826 * The return value will be an ERR_PTR() on error or a valid pointer
827 * to a struct regmap_field. The regmap_field will be automatically freed
828 * by the device management code.
829 */
830struct regmap_field *devm_regmap_field_alloc(struct device *dev,
831 struct regmap *regmap, struct reg_field reg_field)
832{
833 struct regmap_field *rm_field = devm_kzalloc(dev,
834 sizeof(*rm_field), GFP_KERNEL);
835 if (!rm_field)
836 return ERR_PTR(-ENOMEM);
837
838 regmap_field_init(rm_field, regmap, reg_field);
839
840 return rm_field;
841
842}
843EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
844
845/**
846 * devm_regmap_field_free(): Free register field allocated using
847 * devm_regmap_field_alloc. Usally drivers need not call this function,
848 * as the memory allocated via devm will be freed as per device-driver
849 * life-cyle.
850 *
851 * @dev: Device that will be interacted with
852 * @field: regmap field which should be freed.
853 */
854void devm_regmap_field_free(struct device *dev,
855 struct regmap_field *field)
856{
857 devm_kfree(dev, field);
858}
859EXPORT_SYMBOL_GPL(devm_regmap_field_free);
860
861/**
862 * regmap_field_alloc(): Allocate and initialise a register field
863 * in a register map.
864 *
865 * @regmap: regmap bank in which this register field is located.
866 * @reg_field: Register field with in the bank.
867 *
868 * The return value will be an ERR_PTR() on error or a valid pointer
869 * to a struct regmap_field. The regmap_field should be freed by the
870 * user once its finished working with it using regmap_field_free().
871 */
872struct regmap_field *regmap_field_alloc(struct regmap *regmap,
873 struct reg_field reg_field)
874{
875 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
876
877 if (!rm_field)
878 return ERR_PTR(-ENOMEM);
879
880 regmap_field_init(rm_field, regmap, reg_field);
881
882 return rm_field;
883}
884EXPORT_SYMBOL_GPL(regmap_field_alloc);
885
886/**
887 * regmap_field_free(): Free register field allocated using regmap_field_alloc
888 *
889 * @field: regmap field which should be freed.
890 */
891void regmap_field_free(struct regmap_field *field)
892{
893 kfree(field);
894}
895EXPORT_SYMBOL_GPL(regmap_field_free);
896
bf315173
MB
897/**
898 * regmap_reinit_cache(): Reinitialise the current register cache
899 *
900 * @map: Register map to operate on.
901 * @config: New configuration. Only the cache data will be used.
902 *
903 * Discard any existing register cache for the map and initialize a
904 * new cache. This can be used to restore the cache to defaults or to
905 * update the cache configuration to reflect runtime discovery of the
906 * hardware.
4d879514
DP
907 *
908 * No explicit locking is done here, the user needs to ensure that
909 * this function will not race with other calls to regmap.
bf315173
MB
910 */
911int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
912{
bf315173 913 regcache_exit(map);
a24f64a6 914 regmap_debugfs_exit(map);
bf315173
MB
915
916 map->max_register = config->max_register;
917 map->writeable_reg = config->writeable_reg;
918 map->readable_reg = config->readable_reg;
919 map->volatile_reg = config->volatile_reg;
920 map->precious_reg = config->precious_reg;
921 map->cache_type = config->cache_type;
922
d3c242e1 923 regmap_debugfs_init(map, config->name);
a24f64a6 924
421e8d2d
MB
925 map->cache_bypass = false;
926 map->cache_only = false;
927
4d879514 928 return regcache_init(map, config);
bf315173 929}
752a6a5f 930EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 931
b83a313b
MB
932/**
933 * regmap_exit(): Free a previously allocated register map
934 */
935void regmap_exit(struct regmap *map)
936{
7e09a979
MB
937 struct regmap_async *async;
938
5d1729e7 939 regcache_exit(map);
31244e39 940 regmap_debugfs_exit(map);
6863ca62 941 regmap_range_exit(map);
d2a5884a 942 if (map->bus && map->bus->free_context)
0135bbcc 943 map->bus->free_context(map->bus_context);
b83a313b 944 kfree(map->work_buf);
7e09a979
MB
945 while (!list_empty(&map->async_free)) {
946 async = list_first_entry_or_null(&map->async_free,
947 struct regmap_async,
948 list);
949 list_del(&async->list);
950 kfree(async->work_buf);
951 kfree(async);
952 }
b83a313b
MB
953 kfree(map);
954}
955EXPORT_SYMBOL_GPL(regmap_exit);
956
72b39f6f
MB
957static int dev_get_regmap_match(struct device *dev, void *res, void *data)
958{
959 struct regmap **r = res;
960 if (!r || !*r) {
961 WARN_ON(!r || !*r);
962 return 0;
963 }
964
965 /* If the user didn't specify a name match any */
966 if (data)
967 return (*r)->name == data;
968 else
969 return 1;
970}
971
972/**
973 * dev_get_regmap(): Obtain the regmap (if any) for a device
974 *
975 * @dev: Device to retrieve the map for
976 * @name: Optional name for the register map, usually NULL.
977 *
978 * Returns the regmap for the device if one is present, or NULL. If
979 * name is specified then it must match the name specified when
980 * registering the device, if it is NULL then the first regmap found
981 * will be used. Devices with multiple register maps are very rare,
982 * generic code should normally not need to specify a name.
983 */
984struct regmap *dev_get_regmap(struct device *dev, const char *name)
985{
986 struct regmap **r = devres_find(dev, dev_get_regmap_release,
987 dev_get_regmap_match, (void *)name);
988
989 if (!r)
990 return NULL;
991 return *r;
992}
993EXPORT_SYMBOL_GPL(dev_get_regmap);
994
6863ca62 995static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 996 struct regmap_range_node *range,
6863ca62
KG
997 unsigned int val_num)
998{
6863ca62
KG
999 void *orig_work_buf;
1000 unsigned int win_offset;
1001 unsigned int win_page;
1002 bool page_chg;
1003 int ret;
1004
98bc7dfd
MB
1005 win_offset = (*reg - range->range_min) % range->window_len;
1006 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1007
98bc7dfd
MB
1008 if (val_num > 1) {
1009 /* Bulk write shouldn't cross range boundary */
1010 if (*reg + val_num - 1 > range->range_max)
1011 return -EINVAL;
6863ca62 1012
98bc7dfd
MB
1013 /* ... or single page boundary */
1014 if (val_num > range->window_len - win_offset)
1015 return -EINVAL;
1016 }
6863ca62 1017
98bc7dfd
MB
1018 /* It is possible to have selector register inside data window.
1019 In that case, selector register is located on every page and
1020 it needs no page switching, when accessed alone. */
1021 if (val_num > 1 ||
1022 range->window_start + win_offset != range->selector_reg) {
1023 /* Use separate work_buf during page switching */
1024 orig_work_buf = map->work_buf;
1025 map->work_buf = map->selector_work_buf;
6863ca62 1026
98bc7dfd
MB
1027 ret = _regmap_update_bits(map, range->selector_reg,
1028 range->selector_mask,
1029 win_page << range->selector_shift,
1030 &page_chg);
632a5b01 1031
98bc7dfd 1032 map->work_buf = orig_work_buf;
6863ca62 1033
0ff3e62f 1034 if (ret != 0)
98bc7dfd 1035 return ret;
6863ca62
KG
1036 }
1037
98bc7dfd
MB
1038 *reg = range->window_start + win_offset;
1039
6863ca62
KG
1040 return 0;
1041}
1042
584de329
MB
1043int _regmap_raw_write(struct regmap *map, unsigned int reg,
1044 const void *val, size_t val_len, bool async)
b83a313b 1045{
98bc7dfd 1046 struct regmap_range_node *range;
0d509f2b 1047 unsigned long flags;
6f306441 1048 u8 *u8 = map->work_buf;
0d509f2b
MB
1049 void *work_val = map->work_buf + map->format.reg_bytes +
1050 map->format.pad_bytes;
b83a313b
MB
1051 void *buf;
1052 int ret = -ENOTSUPP;
1053 size_t len;
73304781
MB
1054 int i;
1055
f1b5c5c3 1056 WARN_ON(!map->bus);
d2a5884a 1057
73304781
MB
1058 /* Check for unwritable registers before we start */
1059 if (map->writeable_reg)
1060 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1061 if (!map->writeable_reg(map->dev,
1062 reg + (i * map->reg_stride)))
73304781 1063 return -EINVAL;
b83a313b 1064
c9157198
LD
1065 if (!map->cache_bypass && map->format.parse_val) {
1066 unsigned int ival;
1067 int val_bytes = map->format.val_bytes;
1068 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1069 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1070 ret = regcache_write(map, reg + (i * map->reg_stride),
1071 ival);
c9157198
LD
1072 if (ret) {
1073 dev_err(map->dev,
6d04b8ac 1074 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1075 reg + i, ret);
1076 return ret;
1077 }
1078 }
1079 if (map->cache_only) {
1080 map->cache_dirty = true;
1081 return 0;
1082 }
1083 }
1084
98bc7dfd
MB
1085 range = _regmap_range_lookup(map, reg);
1086 if (range) {
8a2ceac6
MB
1087 int val_num = val_len / map->format.val_bytes;
1088 int win_offset = (reg - range->range_min) % range->window_len;
1089 int win_residue = range->window_len - win_offset;
1090
1091 /* If the write goes beyond the end of the window split it */
1092 while (val_num > win_residue) {
1a61cfe3 1093 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1094 win_residue, val_len / map->format.val_bytes);
1095 ret = _regmap_raw_write(map, reg, val, win_residue *
0d509f2b 1096 map->format.val_bytes, async);
8a2ceac6
MB
1097 if (ret != 0)
1098 return ret;
1099
1100 reg += win_residue;
1101 val_num -= win_residue;
1102 val += win_residue * map->format.val_bytes;
1103 val_len -= win_residue * map->format.val_bytes;
1104
1105 win_offset = (reg - range->range_min) %
1106 range->window_len;
1107 win_residue = range->window_len - win_offset;
1108 }
1109
1110 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1111 if (ret != 0)
98bc7dfd
MB
1112 return ret;
1113 }
6863ca62 1114
d939fb9a 1115 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1116
6f306441
LPC
1117 u8[0] |= map->write_flag_mask;
1118
0d509f2b 1119 if (async && map->bus->async_write) {
7e09a979 1120 struct regmap_async *async;
0d509f2b 1121
fe7d4ccd
MB
1122 trace_regmap_async_write_start(map->dev, reg, val_len);
1123
7e09a979
MB
1124 spin_lock_irqsave(&map->async_lock, flags);
1125 async = list_first_entry_or_null(&map->async_free,
1126 struct regmap_async,
1127 list);
1128 if (async)
1129 list_del(&async->list);
1130 spin_unlock_irqrestore(&map->async_lock, flags);
1131
1132 if (!async) {
1133 async = map->bus->async_alloc();
1134 if (!async)
1135 return -ENOMEM;
1136
1137 async->work_buf = kzalloc(map->format.buf_size,
1138 GFP_KERNEL | GFP_DMA);
1139 if (!async->work_buf) {
1140 kfree(async);
1141 return -ENOMEM;
1142 }
0d509f2b
MB
1143 }
1144
0d509f2b
MB
1145 async->map = map;
1146
1147 /* If the caller supplied the value we can use it safely. */
1148 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1149 map->format.reg_bytes + map->format.val_bytes);
1150 if (val == work_val)
1151 val = async->work_buf + map->format.pad_bytes +
1152 map->format.reg_bytes;
1153
1154 spin_lock_irqsave(&map->async_lock, flags);
1155 list_add_tail(&async->list, &map->async_list);
1156 spin_unlock_irqrestore(&map->async_lock, flags);
1157
1158 ret = map->bus->async_write(map->bus_context, async->work_buf,
1159 map->format.reg_bytes +
1160 map->format.pad_bytes,
1161 val, val_len, async);
1162
1163 if (ret != 0) {
1164 dev_err(map->dev, "Failed to schedule write: %d\n",
1165 ret);
1166
1167 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1168 list_move(&async->list, &map->async_free);
0d509f2b 1169 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1170 }
f951b658
MB
1171
1172 return ret;
0d509f2b
MB
1173 }
1174
fb2736bb
MB
1175 trace_regmap_hw_write_start(map->dev, reg,
1176 val_len / map->format.val_bytes);
1177
2547e201
MB
1178 /* If we're doing a single register write we can probably just
1179 * send the work_buf directly, otherwise try to do a gather
1180 * write.
1181 */
0d509f2b 1182 if (val == work_val)
0135bbcc 1183 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1184 map->format.reg_bytes +
1185 map->format.pad_bytes +
1186 val_len);
2547e201 1187 else if (map->bus->gather_write)
0135bbcc 1188 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1189 map->format.reg_bytes +
1190 map->format.pad_bytes,
b83a313b
MB
1191 val, val_len);
1192
2547e201 1193 /* If that didn't work fall back on linearising by hand. */
b83a313b 1194 if (ret == -ENOTSUPP) {
82159ba8
MB
1195 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1196 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1197 if (!buf)
1198 return -ENOMEM;
1199
1200 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1201 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1202 val, val_len);
0135bbcc 1203 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1204
1205 kfree(buf);
1206 }
1207
fb2736bb
MB
1208 trace_regmap_hw_write_done(map->dev, reg,
1209 val_len / map->format.val_bytes);
1210
b83a313b
MB
1211 return ret;
1212}
1213
221ad7f2
MB
1214/**
1215 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1216 *
1217 * @map: Map to check.
1218 */
1219bool regmap_can_raw_write(struct regmap *map)
1220{
1221 return map->bus && map->format.format_val && map->format.format_reg;
1222}
1223EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1224
07c320dc
AS
1225static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1226 unsigned int val)
1227{
1228 int ret;
1229 struct regmap_range_node *range;
1230 struct regmap *map = context;
1231
f1b5c5c3 1232 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1233
1234 range = _regmap_range_lookup(map, reg);
1235 if (range) {
1236 ret = _regmap_select_page(map, &reg, range, 1);
1237 if (ret != 0)
1238 return ret;
1239 }
1240
1241 map->format.format_write(map, reg, val);
1242
1243 trace_regmap_hw_write_start(map->dev, reg, 1);
1244
1245 ret = map->bus->write(map->bus_context, map->work_buf,
1246 map->format.buf_size);
1247
1248 trace_regmap_hw_write_done(map->dev, reg, 1);
1249
1250 return ret;
1251}
1252
1253static int _regmap_bus_raw_write(void *context, unsigned int reg,
1254 unsigned int val)
1255{
1256 struct regmap *map = context;
1257
f1b5c5c3 1258 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1259
1260 map->format.format_val(map->work_buf + map->format.reg_bytes
1261 + map->format.pad_bytes, val, 0);
1262 return _regmap_raw_write(map, reg,
1263 map->work_buf +
1264 map->format.reg_bytes +
1265 map->format.pad_bytes,
0d509f2b 1266 map->format.val_bytes, false);
07c320dc
AS
1267}
1268
d2a5884a
AS
1269static inline void *_regmap_map_get_context(struct regmap *map)
1270{
1271 return (map->bus) ? map : map->bus_context;
1272}
1273
4d2dc095
DP
1274int _regmap_write(struct regmap *map, unsigned int reg,
1275 unsigned int val)
b83a313b 1276{
fb2736bb 1277 int ret;
d2a5884a 1278 void *context = _regmap_map_get_context(map);
b83a313b 1279
515f2261
IN
1280 if (!regmap_writeable(map, reg))
1281 return -EIO;
1282
d2a5884a 1283 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1284 ret = regcache_write(map, reg, val);
1285 if (ret != 0)
1286 return ret;
8ae0d7e8
MB
1287 if (map->cache_only) {
1288 map->cache_dirty = true;
5d1729e7 1289 return 0;
8ae0d7e8 1290 }
5d1729e7
DP
1291 }
1292
1044c180
MB
1293#ifdef LOG_DEVICE
1294 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1295 dev_info(map->dev, "%x <= %x\n", reg, val);
1296#endif
1297
fb2736bb
MB
1298 trace_regmap_reg_write(map->dev, reg, val);
1299
d2a5884a 1300 return map->reg_write(context, reg, val);
b83a313b
MB
1301}
1302
1303/**
1304 * regmap_write(): Write a value to a single register
1305 *
1306 * @map: Register map to write to
1307 * @reg: Register to write to
1308 * @val: Value to be written
1309 *
1310 * A value of zero will be returned on success, a negative errno will
1311 * be returned in error cases.
1312 */
1313int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1314{
1315 int ret;
1316
f01ee60f
SW
1317 if (reg % map->reg_stride)
1318 return -EINVAL;
1319
0d4529c5 1320 map->lock(map->lock_arg);
b83a313b
MB
1321
1322 ret = _regmap_write(map, reg, val);
1323
0d4529c5 1324 map->unlock(map->lock_arg);
b83a313b
MB
1325
1326 return ret;
1327}
1328EXPORT_SYMBOL_GPL(regmap_write);
1329
1330/**
1331 * regmap_raw_write(): Write raw values to one or more registers
1332 *
1333 * @map: Register map to write to
1334 * @reg: Initial register to write to
1335 * @val: Block of data to be written, laid out for direct transmission to the
1336 * device
1337 * @val_len: Length of data pointed to by val.
1338 *
1339 * This function is intended to be used for things like firmware
1340 * download where a large block of data needs to be transferred to the
1341 * device. No formatting will be done on the data provided.
1342 *
1343 * A value of zero will be returned on success, a negative errno will
1344 * be returned in error cases.
1345 */
1346int regmap_raw_write(struct regmap *map, unsigned int reg,
1347 const void *val, size_t val_len)
1348{
1349 int ret;
1350
221ad7f2 1351 if (!regmap_can_raw_write(map))
d2a5884a 1352 return -EINVAL;
851960ba
SW
1353 if (val_len % map->format.val_bytes)
1354 return -EINVAL;
1355
0d4529c5 1356 map->lock(map->lock_arg);
b83a313b 1357
0d509f2b 1358 ret = _regmap_raw_write(map, reg, val, val_len, false);
b83a313b 1359
0d4529c5 1360 map->unlock(map->lock_arg);
b83a313b
MB
1361
1362 return ret;
1363}
1364EXPORT_SYMBOL_GPL(regmap_raw_write);
1365
67252287
SK
1366/**
1367 * regmap_field_write(): Write a value to a single register field
1368 *
1369 * @field: Register field to write to
1370 * @val: Value to be written
1371 *
1372 * A value of zero will be returned on success, a negative errno will
1373 * be returned in error cases.
1374 */
1375int regmap_field_write(struct regmap_field *field, unsigned int val)
1376{
1377 return regmap_update_bits(field->regmap, field->reg,
1378 field->mask, val << field->shift);
1379}
1380EXPORT_SYMBOL_GPL(regmap_field_write);
1381
8eaeb219
LD
1382/*
1383 * regmap_bulk_write(): Write multiple registers to the device
1384 *
1385 * @map: Register map to write to
1386 * @reg: First register to be write from
1387 * @val: Block of data to be written, in native register size for device
1388 * @val_count: Number of registers to write
1389 *
1390 * This function is intended to be used for writing a large block of
31b35e9e 1391 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1392 *
1393 * A value of zero will be returned on success, a negative errno will
1394 * be returned in error cases.
1395 */
1396int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1397 size_t val_count)
1398{
1399 int ret = 0, i;
1400 size_t val_bytes = map->format.val_bytes;
1401 void *wval;
1402
d2a5884a
AS
1403 if (!map->bus)
1404 return -EINVAL;
8a819ff8 1405 if (!map->format.parse_inplace)
8eaeb219 1406 return -EINVAL;
f01ee60f
SW
1407 if (reg % map->reg_stride)
1408 return -EINVAL;
8eaeb219 1409
0d4529c5 1410 map->lock(map->lock_arg);
8eaeb219
LD
1411
1412 /* No formatting is require if val_byte is 1 */
1413 if (val_bytes == 1) {
1414 wval = (void *)val;
1415 } else {
1416 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1417 if (!wval) {
1418 ret = -ENOMEM;
1419 dev_err(map->dev, "Error in memory allocation\n");
1420 goto out;
1421 }
1422 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1423 map->format.parse_inplace(wval + i);
8eaeb219 1424 }
2e33caf1
AJ
1425 /*
1426 * Some devices does not support bulk write, for
1427 * them we have a series of single write operations.
1428 */
1429 if (map->use_single_rw) {
1430 for (i = 0; i < val_count; i++) {
1431 ret = regmap_raw_write(map,
0d509f2b
MB
1432 reg + (i * map->reg_stride),
1433 val + (i * val_bytes),
1434 val_bytes);
2e33caf1
AJ
1435 if (ret != 0)
1436 return ret;
1437 }
1438 } else {
0d509f2b
MB
1439 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count,
1440 false);
2e33caf1 1441 }
8eaeb219
LD
1442
1443 if (val_bytes != 1)
1444 kfree(wval);
1445
1446out:
0d4529c5 1447 map->unlock(map->lock_arg);
8eaeb219
LD
1448 return ret;
1449}
1450EXPORT_SYMBOL_GPL(regmap_bulk_write);
1451
0d509f2b
MB
1452/**
1453 * regmap_raw_write_async(): Write raw values to one or more registers
1454 * asynchronously
1455 *
1456 * @map: Register map to write to
1457 * @reg: Initial register to write to
1458 * @val: Block of data to be written, laid out for direct transmission to the
1459 * device. Must be valid until regmap_async_complete() is called.
1460 * @val_len: Length of data pointed to by val.
1461 *
1462 * This function is intended to be used for things like firmware
1463 * download where a large block of data needs to be transferred to the
1464 * device. No formatting will be done on the data provided.
1465 *
1466 * If supported by the underlying bus the write will be scheduled
1467 * asynchronously, helping maximise I/O speed on higher speed buses
1468 * like SPI. regmap_async_complete() can be called to ensure that all
1469 * asynchrnous writes have been completed.
1470 *
1471 * A value of zero will be returned on success, a negative errno will
1472 * be returned in error cases.
1473 */
1474int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1475 const void *val, size_t val_len)
1476{
1477 int ret;
1478
1479 if (val_len % map->format.val_bytes)
1480 return -EINVAL;
1481 if (reg % map->reg_stride)
1482 return -EINVAL;
1483
1484 map->lock(map->lock_arg);
1485
1486 ret = _regmap_raw_write(map, reg, val, val_len, true);
1487
1488 map->unlock(map->lock_arg);
1489
1490 return ret;
1491}
1492EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1493
b83a313b
MB
1494static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1495 unsigned int val_len)
1496{
98bc7dfd 1497 struct regmap_range_node *range;
b83a313b
MB
1498 u8 *u8 = map->work_buf;
1499 int ret;
1500
f1b5c5c3 1501 WARN_ON(!map->bus);
d2a5884a 1502
98bc7dfd
MB
1503 range = _regmap_range_lookup(map, reg);
1504 if (range) {
1505 ret = _regmap_select_page(map, &reg, range,
1506 val_len / map->format.val_bytes);
0ff3e62f 1507 if (ret != 0)
98bc7dfd
MB
1508 return ret;
1509 }
6863ca62 1510
d939fb9a 1511 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1512
1513 /*
6f306441 1514 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1515 * register addresss; since it's always the high bits for all
1516 * current formats we can do this here rather than in
1517 * formatting. This may break if we get interesting formats.
1518 */
6f306441 1519 u8[0] |= map->read_flag_mask;
b83a313b 1520
fb2736bb
MB
1521 trace_regmap_hw_read_start(map->dev, reg,
1522 val_len / map->format.val_bytes);
1523
0135bbcc 1524 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1525 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1526 val, val_len);
b83a313b 1527
fb2736bb
MB
1528 trace_regmap_hw_read_done(map->dev, reg,
1529 val_len / map->format.val_bytes);
1530
1531 return ret;
b83a313b
MB
1532}
1533
ad278406
AS
1534static int _regmap_bus_read(void *context, unsigned int reg,
1535 unsigned int *val)
1536{
1537 int ret;
1538 struct regmap *map = context;
1539
1540 if (!map->format.parse_val)
1541 return -EINVAL;
1542
1543 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1544 if (ret == 0)
1545 *val = map->format.parse_val(map->work_buf);
1546
1547 return ret;
1548}
1549
b83a313b
MB
1550static int _regmap_read(struct regmap *map, unsigned int reg,
1551 unsigned int *val)
1552{
1553 int ret;
d2a5884a
AS
1554 void *context = _regmap_map_get_context(map);
1555
f1b5c5c3 1556 WARN_ON(!map->reg_read);
b83a313b 1557
5d1729e7
DP
1558 if (!map->cache_bypass) {
1559 ret = regcache_read(map, reg, val);
1560 if (ret == 0)
1561 return 0;
1562 }
1563
1564 if (map->cache_only)
1565 return -EBUSY;
1566
d2a5884a 1567 ret = map->reg_read(context, reg, val);
fb2736bb 1568 if (ret == 0) {
1044c180
MB
1569#ifdef LOG_DEVICE
1570 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1571 dev_info(map->dev, "%x => %x\n", reg, *val);
1572#endif
1573
fb2736bb 1574 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1575
ad278406
AS
1576 if (!map->cache_bypass)
1577 regcache_write(map, reg, *val);
1578 }
f2985367 1579
b83a313b
MB
1580 return ret;
1581}
1582
1583/**
1584 * regmap_read(): Read a value from a single register
1585 *
1586 * @map: Register map to write to
1587 * @reg: Register to be read from
1588 * @val: Pointer to store read value
1589 *
1590 * A value of zero will be returned on success, a negative errno will
1591 * be returned in error cases.
1592 */
1593int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1594{
1595 int ret;
1596
f01ee60f
SW
1597 if (reg % map->reg_stride)
1598 return -EINVAL;
1599
0d4529c5 1600 map->lock(map->lock_arg);
b83a313b
MB
1601
1602 ret = _regmap_read(map, reg, val);
1603
0d4529c5 1604 map->unlock(map->lock_arg);
b83a313b
MB
1605
1606 return ret;
1607}
1608EXPORT_SYMBOL_GPL(regmap_read);
1609
1610/**
1611 * regmap_raw_read(): Read raw data from the device
1612 *
1613 * @map: Register map to write to
1614 * @reg: First register to be read from
1615 * @val: Pointer to store read value
1616 * @val_len: Size of data to read
1617 *
1618 * A value of zero will be returned on success, a negative errno will
1619 * be returned in error cases.
1620 */
1621int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1622 size_t val_len)
1623{
b8fb5ab1
MB
1624 size_t val_bytes = map->format.val_bytes;
1625 size_t val_count = val_len / val_bytes;
1626 unsigned int v;
1627 int ret, i;
04e016ad 1628
d2a5884a
AS
1629 if (!map->bus)
1630 return -EINVAL;
851960ba
SW
1631 if (val_len % map->format.val_bytes)
1632 return -EINVAL;
f01ee60f
SW
1633 if (reg % map->reg_stride)
1634 return -EINVAL;
851960ba 1635
0d4529c5 1636 map->lock(map->lock_arg);
b83a313b 1637
b8fb5ab1
MB
1638 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
1639 map->cache_type == REGCACHE_NONE) {
1640 /* Physical block read if there's no cache involved */
1641 ret = _regmap_raw_read(map, reg, val, val_len);
1642
1643 } else {
1644 /* Otherwise go word by word for the cache; should be low
1645 * cost as we expect to hit the cache.
1646 */
1647 for (i = 0; i < val_count; i++) {
f01ee60f
SW
1648 ret = _regmap_read(map, reg + (i * map->reg_stride),
1649 &v);
b8fb5ab1
MB
1650 if (ret != 0)
1651 goto out;
1652
d939fb9a 1653 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
1654 }
1655 }
b83a313b 1656
b8fb5ab1 1657 out:
0d4529c5 1658 map->unlock(map->lock_arg);
b83a313b
MB
1659
1660 return ret;
1661}
1662EXPORT_SYMBOL_GPL(regmap_raw_read);
1663
67252287
SK
1664/**
1665 * regmap_field_read(): Read a value to a single register field
1666 *
1667 * @field: Register field to read from
1668 * @val: Pointer to store read value
1669 *
1670 * A value of zero will be returned on success, a negative errno will
1671 * be returned in error cases.
1672 */
1673int regmap_field_read(struct regmap_field *field, unsigned int *val)
1674{
1675 int ret;
1676 unsigned int reg_val;
1677 ret = regmap_read(field->regmap, field->reg, &reg_val);
1678 if (ret != 0)
1679 return ret;
1680
1681 reg_val &= field->mask;
1682 reg_val >>= field->shift;
1683 *val = reg_val;
1684
1685 return ret;
1686}
1687EXPORT_SYMBOL_GPL(regmap_field_read);
1688
b83a313b
MB
1689/**
1690 * regmap_bulk_read(): Read multiple registers from the device
1691 *
1692 * @map: Register map to write to
1693 * @reg: First register to be read from
1694 * @val: Pointer to store read value, in native register size for device
1695 * @val_count: Number of registers to read
1696 *
1697 * A value of zero will be returned on success, a negative errno will
1698 * be returned in error cases.
1699 */
1700int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1701 size_t val_count)
1702{
1703 int ret, i;
1704 size_t val_bytes = map->format.val_bytes;
82cd9965 1705 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 1706
d2a5884a
AS
1707 if (!map->bus)
1708 return -EINVAL;
8a819ff8 1709 if (!map->format.parse_inplace)
b83a313b 1710 return -EINVAL;
f01ee60f
SW
1711 if (reg % map->reg_stride)
1712 return -EINVAL;
b83a313b 1713
de2d808f 1714 if (vol || map->cache_type == REGCACHE_NONE) {
2e33caf1
AJ
1715 /*
1716 * Some devices does not support bulk read, for
1717 * them we have a series of single read operations.
1718 */
1719 if (map->use_single_rw) {
1720 for (i = 0; i < val_count; i++) {
1721 ret = regmap_raw_read(map,
1722 reg + (i * map->reg_stride),
1723 val + (i * val_bytes),
1724 val_bytes);
1725 if (ret != 0)
1726 return ret;
1727 }
1728 } else {
1729 ret = regmap_raw_read(map, reg, val,
1730 val_bytes * val_count);
1731 if (ret != 0)
1732 return ret;
1733 }
de2d808f
MB
1734
1735 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1736 map->format.parse_inplace(val + i);
de2d808f
MB
1737 } else {
1738 for (i = 0; i < val_count; i++) {
6560ffd1 1739 unsigned int ival;
f01ee60f 1740 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 1741 &ival);
de2d808f
MB
1742 if (ret != 0)
1743 return ret;
6560ffd1 1744 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
1745 }
1746 }
b83a313b
MB
1747
1748 return 0;
1749}
1750EXPORT_SYMBOL_GPL(regmap_bulk_read);
1751
018690d3
MB
1752static int _regmap_update_bits(struct regmap *map, unsigned int reg,
1753 unsigned int mask, unsigned int val,
1754 bool *change)
b83a313b
MB
1755{
1756 int ret;
d91e8db2 1757 unsigned int tmp, orig;
b83a313b 1758
d91e8db2 1759 ret = _regmap_read(map, reg, &orig);
b83a313b 1760 if (ret != 0)
fc3ebd78 1761 return ret;
b83a313b 1762
d91e8db2 1763 tmp = orig & ~mask;
b83a313b
MB
1764 tmp |= val & mask;
1765
018690d3 1766 if (tmp != orig) {
d91e8db2 1767 ret = _regmap_write(map, reg, tmp);
018690d3
MB
1768 *change = true;
1769 } else {
1770 *change = false;
1771 }
b83a313b 1772
b83a313b
MB
1773 return ret;
1774}
018690d3
MB
1775
1776/**
1777 * regmap_update_bits: Perform a read/modify/write cycle on the register map
1778 *
1779 * @map: Register map to update
1780 * @reg: Register to update
1781 * @mask: Bitmask to change
1782 * @val: New value for bitmask
1783 *
1784 * Returns zero for success, a negative number on error.
1785 */
1786int regmap_update_bits(struct regmap *map, unsigned int reg,
1787 unsigned int mask, unsigned int val)
1788{
1789 bool change;
fc3ebd78
KG
1790 int ret;
1791
0d4529c5 1792 map->lock(map->lock_arg);
fc3ebd78 1793 ret = _regmap_update_bits(map, reg, mask, val, &change);
0d4529c5 1794 map->unlock(map->lock_arg);
fc3ebd78
KG
1795
1796 return ret;
018690d3 1797}
b83a313b 1798EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 1799
018690d3
MB
1800/**
1801 * regmap_update_bits_check: Perform a read/modify/write cycle on the
1802 * register map and report if updated
1803 *
1804 * @map: Register map to update
1805 * @reg: Register to update
1806 * @mask: Bitmask to change
1807 * @val: New value for bitmask
1808 * @change: Boolean indicating if a write was done
1809 *
1810 * Returns zero for success, a negative number on error.
1811 */
1812int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1813 unsigned int mask, unsigned int val,
1814 bool *change)
1815{
fc3ebd78
KG
1816 int ret;
1817
0d4529c5 1818 map->lock(map->lock_arg);
fc3ebd78 1819 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 1820 map->unlock(map->lock_arg);
fc3ebd78 1821 return ret;
018690d3
MB
1822}
1823EXPORT_SYMBOL_GPL(regmap_update_bits_check);
1824
0d509f2b
MB
1825void regmap_async_complete_cb(struct regmap_async *async, int ret)
1826{
1827 struct regmap *map = async->map;
1828 bool wake;
1829
fe7d4ccd
MB
1830 trace_regmap_async_io_complete(map->dev);
1831
0d509f2b 1832 spin_lock(&map->async_lock);
7e09a979 1833 list_move(&async->list, &map->async_free);
0d509f2b
MB
1834 wake = list_empty(&map->async_list);
1835
1836 if (ret != 0)
1837 map->async_ret = ret;
1838
1839 spin_unlock(&map->async_lock);
1840
0d509f2b
MB
1841 if (wake)
1842 wake_up(&map->async_waitq);
1843}
f804fb56 1844EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
1845
1846static int regmap_async_is_done(struct regmap *map)
1847{
1848 unsigned long flags;
1849 int ret;
1850
1851 spin_lock_irqsave(&map->async_lock, flags);
1852 ret = list_empty(&map->async_list);
1853 spin_unlock_irqrestore(&map->async_lock, flags);
1854
1855 return ret;
1856}
1857
1858/**
1859 * regmap_async_complete: Ensure all asynchronous I/O has completed.
1860 *
1861 * @map: Map to operate on.
1862 *
1863 * Blocks until any pending asynchronous I/O has completed. Returns
1864 * an error code for any failed I/O operations.
1865 */
1866int regmap_async_complete(struct regmap *map)
1867{
1868 unsigned long flags;
1869 int ret;
1870
1871 /* Nothing to do with no async support */
f2e055e7 1872 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
1873 return 0;
1874
fe7d4ccd
MB
1875 trace_regmap_async_complete_start(map->dev);
1876
0d509f2b
MB
1877 wait_event(map->async_waitq, regmap_async_is_done(map));
1878
1879 spin_lock_irqsave(&map->async_lock, flags);
1880 ret = map->async_ret;
1881 map->async_ret = 0;
1882 spin_unlock_irqrestore(&map->async_lock, flags);
1883
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1884 trace_regmap_async_complete_done(map->dev);
1885
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1886 return ret;
1887}
f88948ef 1888EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 1889
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1890/**
1891 * regmap_register_patch: Register and apply register updates to be applied
1892 * on device initialistion
1893 *
1894 * @map: Register map to apply updates to.
1895 * @regs: Values to update.
1896 * @num_regs: Number of entries in regs.
1897 *
1898 * Register a set of register updates to be applied to the device
1899 * whenever the device registers are synchronised with the cache and
1900 * apply them immediately. Typically this is used to apply
1901 * corrections to be applied to the device defaults on startup, such
1902 * as the updates some vendors provide to undocumented registers.
1903 */
1904int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
1905 int num_regs)
1906{
aab13ebc 1907 struct reg_default *p;
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1908 int i, ret;
1909 bool bypass;
1910
0d4529c5 1911 map->lock(map->lock_arg);
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1912
1913 bypass = map->cache_bypass;
1914
1915 map->cache_bypass = true;
1916
1917 /* Write out first; it's useful to apply even if we fail later. */
1918 for (i = 0; i < num_regs; i++) {
1919 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1920 if (ret != 0) {
1921 dev_err(map->dev, "Failed to write %x = %x: %d\n",
1922 regs[i].reg, regs[i].def, ret);
1923 goto out;
1924 }
1925 }
1926
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1927 p = krealloc(map->patch,
1928 sizeof(struct reg_default) * (map->patch_regs + num_regs),
1929 GFP_KERNEL);
1930 if (p) {
1931 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
1932 map->patch = p;
1933 map->patch_regs += num_regs;
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1934 } else {
1935 ret = -ENOMEM;
1936 }
1937
1938out:
1939 map->cache_bypass = bypass;
1940
0d4529c5 1941 map->unlock(map->lock_arg);
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1942
1943 return ret;
1944}
1945EXPORT_SYMBOL_GPL(regmap_register_patch);
1946
eae4b51b 1947/*
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1948 * regmap_get_val_bytes(): Report the size of a register value
1949 *
1950 * Report the size of a register value, mainly intended to for use by
1951 * generic infrastructure built on top of regmap.
1952 */
1953int regmap_get_val_bytes(struct regmap *map)
1954{
1955 if (map->format.format_write)
1956 return -EINVAL;
1957
1958 return map->format.val_bytes;
1959}
1960EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
1961
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1962static int __init regmap_initcall(void)
1963{
1964 regmap_debugfs_initcall();
1965
1966 return 0;
1967}
1968postcore_initcall(regmap_initcall);
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