Linux 3.19-rc1
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
d647c199 18#include <linux/of.h>
6863ca62 19#include <linux/rbtree.h>
30b2a553 20#include <linux/sched.h>
b83a313b 21
fb2736bb
MB
22#define CREATE_TRACE_POINTS
23#include <trace/events/regmap.h>
24
93de9124 25#include "internal.h"
b83a313b 26
1044c180
MB
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35static int _regmap_update_bits(struct regmap *map, unsigned int reg,
36 unsigned int mask, unsigned int val,
37 bool *change);
38
3ac17037
BB
39static int _regmap_bus_reg_read(void *context, unsigned int reg,
40 unsigned int *val);
ad278406
AS
41static int _regmap_bus_read(void *context, unsigned int reg,
42 unsigned int *val);
07c320dc
AS
43static int _regmap_bus_formatted_write(void *context, unsigned int reg,
44 unsigned int val);
3ac17037
BB
45static int _regmap_bus_reg_write(void *context, unsigned int reg,
46 unsigned int val);
07c320dc
AS
47static int _regmap_bus_raw_write(void *context, unsigned int reg,
48 unsigned int val);
ad278406 49
76aad392
DC
50bool regmap_reg_in_ranges(unsigned int reg,
51 const struct regmap_range *ranges,
52 unsigned int nranges)
53{
54 const struct regmap_range *r;
55 int i;
56
57 for (i = 0, r = ranges; i < nranges; i++, r++)
58 if (regmap_reg_in_range(reg, r))
59 return true;
60 return false;
61}
62EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
63
154881e5
MB
64bool regmap_check_range_table(struct regmap *map, unsigned int reg,
65 const struct regmap_access_table *table)
76aad392
DC
66{
67 /* Check "no ranges" first */
68 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
69 return false;
70
71 /* In case zero "yes ranges" are supplied, any reg is OK */
72 if (!table->n_yes_ranges)
73 return true;
74
75 return regmap_reg_in_ranges(reg, table->yes_ranges,
76 table->n_yes_ranges);
77}
154881e5 78EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 79
8de2f081
MB
80bool regmap_writeable(struct regmap *map, unsigned int reg)
81{
82 if (map->max_register && reg > map->max_register)
83 return false;
84
85 if (map->writeable_reg)
86 return map->writeable_reg(map->dev, reg);
87
76aad392 88 if (map->wr_table)
154881e5 89 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 90
8de2f081
MB
91 return true;
92}
93
94bool regmap_readable(struct regmap *map, unsigned int reg)
95{
96 if (map->max_register && reg > map->max_register)
97 return false;
98
4191f197
WS
99 if (map->format.format_write)
100 return false;
101
8de2f081
MB
102 if (map->readable_reg)
103 return map->readable_reg(map->dev, reg);
104
76aad392 105 if (map->rd_table)
154881e5 106 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 107
8de2f081
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108 return true;
109}
110
111bool regmap_volatile(struct regmap *map, unsigned int reg)
112{
5844a8b9 113 if (!map->format.format_write && !regmap_readable(map, reg))
8de2f081
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114 return false;
115
116 if (map->volatile_reg)
117 return map->volatile_reg(map->dev, reg);
118
76aad392 119 if (map->volatile_table)
154881e5 120 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 121
b92be6fe
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122 if (map->cache_ops)
123 return false;
124 else
125 return true;
8de2f081
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126}
127
128bool regmap_precious(struct regmap *map, unsigned int reg)
129{
4191f197 130 if (!regmap_readable(map, reg))
8de2f081
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131 return false;
132
133 if (map->precious_reg)
134 return map->precious_reg(map->dev, reg);
135
76aad392 136 if (map->precious_table)
154881e5 137 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 138
8de2f081
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139 return false;
140}
141
82cd9965 142static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 143 size_t num)
82cd9965
LPC
144{
145 unsigned int i;
146
147 for (i = 0; i < num; i++)
148 if (!regmap_volatile(map, reg + i))
149 return false;
150
151 return true;
152}
153
9aa50750
WS
154static void regmap_format_2_6_write(struct regmap *map,
155 unsigned int reg, unsigned int val)
156{
157 u8 *out = map->work_buf;
158
159 *out = (reg << 6) | val;
160}
161
b83a313b
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162static void regmap_format_4_12_write(struct regmap *map,
163 unsigned int reg, unsigned int val)
164{
165 __be16 *out = map->work_buf;
166 *out = cpu_to_be16((reg << 12) | val);
167}
168
169static void regmap_format_7_9_write(struct regmap *map,
170 unsigned int reg, unsigned int val)
171{
172 __be16 *out = map->work_buf;
173 *out = cpu_to_be16((reg << 9) | val);
174}
175
7e5ec63e
LPC
176static void regmap_format_10_14_write(struct regmap *map,
177 unsigned int reg, unsigned int val)
178{
179 u8 *out = map->work_buf;
180
181 out[2] = val;
182 out[1] = (val >> 8) | (reg << 6);
183 out[0] = reg >> 2;
184}
185
d939fb9a 186static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
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187{
188 u8 *b = buf;
189
d939fb9a 190 b[0] = val << shift;
b83a313b
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191}
192
141eba2e 193static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
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194{
195 __be16 *b = buf;
196
d939fb9a 197 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
198}
199
4aa8c069
XL
200static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
201{
202 __le16 *b = buf;
203
204 b[0] = cpu_to_le16(val << shift);
205}
206
141eba2e
SW
207static void regmap_format_16_native(void *buf, unsigned int val,
208 unsigned int shift)
209{
210 *(u16 *)buf = val << shift;
211}
212
d939fb9a 213static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
214{
215 u8 *b = buf;
216
d939fb9a
MR
217 val <<= shift;
218
ea279fc5
MR
219 b[0] = val >> 16;
220 b[1] = val >> 8;
221 b[2] = val;
222}
223
141eba2e 224static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
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225{
226 __be32 *b = buf;
227
d939fb9a 228 b[0] = cpu_to_be32(val << shift);
7d5e525b
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229}
230
4aa8c069
XL
231static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
232{
233 __le32 *b = buf;
234
235 b[0] = cpu_to_le32(val << shift);
236}
237
141eba2e
SW
238static void regmap_format_32_native(void *buf, unsigned int val,
239 unsigned int shift)
240{
241 *(u32 *)buf = val << shift;
242}
243
8a819ff8 244static void regmap_parse_inplace_noop(void *buf)
b83a313b 245{
8a819ff8
MB
246}
247
248static unsigned int regmap_parse_8(const void *buf)
249{
250 const u8 *b = buf;
b83a313b
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251
252 return b[0];
253}
254
8a819ff8
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255static unsigned int regmap_parse_16_be(const void *buf)
256{
257 const __be16 *b = buf;
258
259 return be16_to_cpu(b[0]);
260}
261
4aa8c069
XL
262static unsigned int regmap_parse_16_le(const void *buf)
263{
264 const __le16 *b = buf;
265
266 return le16_to_cpu(b[0]);
267}
268
8a819ff8 269static void regmap_parse_16_be_inplace(void *buf)
b83a313b
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270{
271 __be16 *b = buf;
272
273 b[0] = be16_to_cpu(b[0]);
b83a313b
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274}
275
4aa8c069
XL
276static void regmap_parse_16_le_inplace(void *buf)
277{
278 __le16 *b = buf;
279
280 b[0] = le16_to_cpu(b[0]);
281}
282
8a819ff8 283static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
284{
285 return *(u16 *)buf;
286}
287
8a819ff8 288static unsigned int regmap_parse_24(const void *buf)
ea279fc5 289{
8a819ff8 290 const u8 *b = buf;
ea279fc5
MR
291 unsigned int ret = b[2];
292 ret |= ((unsigned int)b[1]) << 8;
293 ret |= ((unsigned int)b[0]) << 16;
294
295 return ret;
296}
297
8a819ff8
MB
298static unsigned int regmap_parse_32_be(const void *buf)
299{
300 const __be32 *b = buf;
301
302 return be32_to_cpu(b[0]);
303}
304
4aa8c069
XL
305static unsigned int regmap_parse_32_le(const void *buf)
306{
307 const __le32 *b = buf;
308
309 return le32_to_cpu(b[0]);
310}
311
8a819ff8 312static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
313{
314 __be32 *b = buf;
315
316 b[0] = be32_to_cpu(b[0]);
7d5e525b
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317}
318
4aa8c069
XL
319static void regmap_parse_32_le_inplace(void *buf)
320{
321 __le32 *b = buf;
322
323 b[0] = le32_to_cpu(b[0]);
324}
325
8a819ff8 326static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
327{
328 return *(u32 *)buf;
329}
330
0d4529c5 331static void regmap_lock_mutex(void *__map)
bacdbe07 332{
0d4529c5 333 struct regmap *map = __map;
bacdbe07
SW
334 mutex_lock(&map->mutex);
335}
336
0d4529c5 337static void regmap_unlock_mutex(void *__map)
bacdbe07 338{
0d4529c5 339 struct regmap *map = __map;
bacdbe07
SW
340 mutex_unlock(&map->mutex);
341}
342
0d4529c5 343static void regmap_lock_spinlock(void *__map)
b4519c71 344__acquires(&map->spinlock)
bacdbe07 345{
0d4529c5 346 struct regmap *map = __map;
92ab1aab
LPC
347 unsigned long flags;
348
349 spin_lock_irqsave(&map->spinlock, flags);
350 map->spinlock_flags = flags;
bacdbe07
SW
351}
352
0d4529c5 353static void regmap_unlock_spinlock(void *__map)
b4519c71 354__releases(&map->spinlock)
bacdbe07 355{
0d4529c5 356 struct regmap *map = __map;
92ab1aab 357 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
358}
359
72b39f6f
MB
360static void dev_get_regmap_release(struct device *dev, void *res)
361{
362 /*
363 * We don't actually have anything to do here; the goal here
364 * is not to manage the regmap but to provide a simple way to
365 * get the regmap back given a struct device.
366 */
367}
368
6863ca62
KG
369static bool _regmap_range_add(struct regmap *map,
370 struct regmap_range_node *data)
371{
372 struct rb_root *root = &map->range_tree;
373 struct rb_node **new = &(root->rb_node), *parent = NULL;
374
375 while (*new) {
376 struct regmap_range_node *this =
377 container_of(*new, struct regmap_range_node, node);
378
379 parent = *new;
380 if (data->range_max < this->range_min)
381 new = &((*new)->rb_left);
382 else if (data->range_min > this->range_max)
383 new = &((*new)->rb_right);
384 else
385 return false;
386 }
387
388 rb_link_node(&data->node, parent, new);
389 rb_insert_color(&data->node, root);
390
391 return true;
392}
393
394static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
395 unsigned int reg)
396{
397 struct rb_node *node = map->range_tree.rb_node;
398
399 while (node) {
400 struct regmap_range_node *this =
401 container_of(node, struct regmap_range_node, node);
402
403 if (reg < this->range_min)
404 node = node->rb_left;
405 else if (reg > this->range_max)
406 node = node->rb_right;
407 else
408 return this;
409 }
410
411 return NULL;
412}
413
414static void regmap_range_exit(struct regmap *map)
415{
416 struct rb_node *next;
417 struct regmap_range_node *range_node;
418
419 next = rb_first(&map->range_tree);
420 while (next) {
421 range_node = rb_entry(next, struct regmap_range_node, node);
422 next = rb_next(&range_node->node);
423 rb_erase(&range_node->node, &map->range_tree);
424 kfree(range_node);
425 }
426
427 kfree(map->selector_work_buf);
428}
429
6cfec04b
MS
430int regmap_attach_dev(struct device *dev, struct regmap *map,
431 const struct regmap_config *config)
432{
433 struct regmap **m;
434
435 map->dev = dev;
436
437 regmap_debugfs_init(map, config->name);
438
439 /* Add a devres resource for dev_get_regmap() */
440 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
441 if (!m) {
442 regmap_debugfs_exit(map);
443 return -ENOMEM;
444 }
445 *m = map;
446 devres_add(dev, m);
447
448 return 0;
449}
450EXPORT_SYMBOL_GPL(regmap_attach_dev);
451
cf673fbc
GU
452static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
453 const struct regmap_config *config)
454{
455 enum regmap_endian endian;
456
457 /* Retrieve the endianness specification from the regmap config */
458 endian = config->reg_format_endian;
459
460 /* If the regmap config specified a non-default value, use that */
461 if (endian != REGMAP_ENDIAN_DEFAULT)
462 return endian;
463
464 /* Retrieve the endianness specification from the bus config */
465 if (bus && bus->reg_format_endian_default)
466 endian = bus->reg_format_endian_default;
d647c199 467
cf673fbc
GU
468 /* If the bus specified a non-default value, use that */
469 if (endian != REGMAP_ENDIAN_DEFAULT)
470 return endian;
471
472 /* Use this if no other value was found */
473 return REGMAP_ENDIAN_BIG;
474}
475
476static enum regmap_endian regmap_get_val_endian(struct device *dev,
477 const struct regmap_bus *bus,
478 const struct regmap_config *config)
d647c199 479{
6e64b6cc 480 struct device_node *np;
cf673fbc 481 enum regmap_endian endian;
d647c199 482
45e1a279 483 /* Retrieve the endianness specification from the regmap config */
cf673fbc 484 endian = config->val_format_endian;
d647c199 485
45e1a279 486 /* If the regmap config specified a non-default value, use that */
cf673fbc
GU
487 if (endian != REGMAP_ENDIAN_DEFAULT)
488 return endian;
d647c199 489
6e64b6cc
PD
490 /* If the dev and dev->of_node exist try to get endianness from DT */
491 if (dev && dev->of_node) {
492 np = dev->of_node;
d647c199 493
6e64b6cc
PD
494 /* Parse the device's DT node for an endianness specification */
495 if (of_property_read_bool(np, "big-endian"))
496 endian = REGMAP_ENDIAN_BIG;
497 else if (of_property_read_bool(np, "little-endian"))
498 endian = REGMAP_ENDIAN_LITTLE;
499
500 /* If the endianness was specified in DT, use that */
501 if (endian != REGMAP_ENDIAN_DEFAULT)
502 return endian;
503 }
45e1a279
SW
504
505 /* Retrieve the endianness specification from the bus config */
cf673fbc
GU
506 if (bus && bus->val_format_endian_default)
507 endian = bus->val_format_endian_default;
d647c199 508
45e1a279 509 /* If the bus specified a non-default value, use that */
cf673fbc
GU
510 if (endian != REGMAP_ENDIAN_DEFAULT)
511 return endian;
45e1a279
SW
512
513 /* Use this if no other value was found */
cf673fbc 514 return REGMAP_ENDIAN_BIG;
d647c199
XL
515}
516
b83a313b
MB
517/**
518 * regmap_init(): Initialise register map
519 *
520 * @dev: Device that will be interacted with
521 * @bus: Bus-specific callbacks to use with device
0135bbcc 522 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
523 * @config: Configuration for register map
524 *
525 * The return value will be an ERR_PTR() on error or a valid pointer to
526 * a struct regmap. This function should generally not be called
527 * directly, it should be called by bus-specific init functions.
528 */
529struct regmap *regmap_init(struct device *dev,
530 const struct regmap_bus *bus,
0135bbcc 531 void *bus_context,
b83a313b
MB
532 const struct regmap_config *config)
533{
6cfec04b 534 struct regmap *map;
b83a313b 535 int ret = -EINVAL;
141eba2e 536 enum regmap_endian reg_endian, val_endian;
6863ca62 537 int i, j;
b83a313b 538
d2a5884a 539 if (!config)
abbb18fb 540 goto err;
b83a313b
MB
541
542 map = kzalloc(sizeof(*map), GFP_KERNEL);
543 if (map == NULL) {
544 ret = -ENOMEM;
545 goto err;
546 }
547
0d4529c5
DC
548 if (config->lock && config->unlock) {
549 map->lock = config->lock;
550 map->unlock = config->unlock;
551 map->lock_arg = config->lock_arg;
bacdbe07 552 } else {
d2a5884a
AS
553 if ((bus && bus->fast_io) ||
554 config->fast_io) {
0d4529c5
DC
555 spin_lock_init(&map->spinlock);
556 map->lock = regmap_lock_spinlock;
557 map->unlock = regmap_unlock_spinlock;
558 } else {
559 mutex_init(&map->mutex);
560 map->lock = regmap_lock_mutex;
561 map->unlock = regmap_unlock_mutex;
562 }
563 map->lock_arg = map;
bacdbe07 564 }
c212accc 565 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 566 map->format.pad_bytes = config->pad_bits / 8;
c212accc 567 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
568 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
569 config->val_bits + config->pad_bits, 8);
d939fb9a 570 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
571 if (config->reg_stride)
572 map->reg_stride = config->reg_stride;
573 else
574 map->reg_stride = 1;
2e33caf1 575 map->use_single_rw = config->use_single_rw;
e894c3f4 576 map->can_multi_write = config->can_multi_write;
b83a313b
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577 map->dev = dev;
578 map->bus = bus;
0135bbcc 579 map->bus_context = bus_context;
2e2ae66d 580 map->max_register = config->max_register;
76aad392
DC
581 map->wr_table = config->wr_table;
582 map->rd_table = config->rd_table;
583 map->volatile_table = config->volatile_table;
584 map->precious_table = config->precious_table;
2e2ae66d
MB
585 map->writeable_reg = config->writeable_reg;
586 map->readable_reg = config->readable_reg;
587 map->volatile_reg = config->volatile_reg;
2efe1642 588 map->precious_reg = config->precious_reg;
5d1729e7 589 map->cache_type = config->cache_type;
72b39f6f 590 map->name = config->name;
b83a313b 591
0d509f2b
MB
592 spin_lock_init(&map->async_lock);
593 INIT_LIST_HEAD(&map->async_list);
7e09a979 594 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
595 init_waitqueue_head(&map->async_waitq);
596
6f306441
LPC
597 if (config->read_flag_mask || config->write_flag_mask) {
598 map->read_flag_mask = config->read_flag_mask;
599 map->write_flag_mask = config->write_flag_mask;
d2a5884a 600 } else if (bus) {
6f306441
LPC
601 map->read_flag_mask = bus->read_flag_mask;
602 }
603
d2a5884a
AS
604 if (!bus) {
605 map->reg_read = config->reg_read;
606 map->reg_write = config->reg_write;
607
3ac17037
BB
608 map->defer_caching = false;
609 goto skip_format_initialization;
610 } else if (!bus->read || !bus->write) {
611 map->reg_read = _regmap_bus_reg_read;
612 map->reg_write = _regmap_bus_reg_write;
613
d2a5884a
AS
614 map->defer_caching = false;
615 goto skip_format_initialization;
616 } else {
617 map->reg_read = _regmap_bus_read;
618 }
ad278406 619
cf673fbc
GU
620 reg_endian = regmap_get_reg_endian(bus, config);
621 val_endian = regmap_get_val_endian(dev, bus, config);
141eba2e 622
d939fb9a 623 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
624 case 2:
625 switch (config->val_bits) {
626 case 6:
627 map->format.format_write = regmap_format_2_6_write;
628 break;
629 default:
630 goto err_map;
631 }
632 break;
633
b83a313b
MB
634 case 4:
635 switch (config->val_bits) {
636 case 12:
637 map->format.format_write = regmap_format_4_12_write;
638 break;
639 default:
640 goto err_map;
641 }
642 break;
643
644 case 7:
645 switch (config->val_bits) {
646 case 9:
647 map->format.format_write = regmap_format_7_9_write;
648 break;
649 default:
650 goto err_map;
651 }
652 break;
653
7e5ec63e
LPC
654 case 10:
655 switch (config->val_bits) {
656 case 14:
657 map->format.format_write = regmap_format_10_14_write;
658 break;
659 default:
660 goto err_map;
661 }
662 break;
663
b83a313b
MB
664 case 8:
665 map->format.format_reg = regmap_format_8;
666 break;
667
668 case 16:
141eba2e
SW
669 switch (reg_endian) {
670 case REGMAP_ENDIAN_BIG:
671 map->format.format_reg = regmap_format_16_be;
672 break;
673 case REGMAP_ENDIAN_NATIVE:
674 map->format.format_reg = regmap_format_16_native;
675 break;
676 default:
677 goto err_map;
678 }
b83a313b
MB
679 break;
680
237019e7
LPC
681 case 24:
682 if (reg_endian != REGMAP_ENDIAN_BIG)
683 goto err_map;
684 map->format.format_reg = regmap_format_24;
685 break;
686
7d5e525b 687 case 32:
141eba2e
SW
688 switch (reg_endian) {
689 case REGMAP_ENDIAN_BIG:
690 map->format.format_reg = regmap_format_32_be;
691 break;
692 case REGMAP_ENDIAN_NATIVE:
693 map->format.format_reg = regmap_format_32_native;
694 break;
695 default:
696 goto err_map;
697 }
7d5e525b
MB
698 break;
699
b83a313b
MB
700 default:
701 goto err_map;
702 }
703
8a819ff8
MB
704 if (val_endian == REGMAP_ENDIAN_NATIVE)
705 map->format.parse_inplace = regmap_parse_inplace_noop;
706
b83a313b
MB
707 switch (config->val_bits) {
708 case 8:
709 map->format.format_val = regmap_format_8;
710 map->format.parse_val = regmap_parse_8;
8a819ff8 711 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
712 break;
713 case 16:
141eba2e
SW
714 switch (val_endian) {
715 case REGMAP_ENDIAN_BIG:
716 map->format.format_val = regmap_format_16_be;
717 map->format.parse_val = regmap_parse_16_be;
8a819ff8 718 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 719 break;
4aa8c069
XL
720 case REGMAP_ENDIAN_LITTLE:
721 map->format.format_val = regmap_format_16_le;
722 map->format.parse_val = regmap_parse_16_le;
723 map->format.parse_inplace = regmap_parse_16_le_inplace;
724 break;
141eba2e
SW
725 case REGMAP_ENDIAN_NATIVE:
726 map->format.format_val = regmap_format_16_native;
727 map->format.parse_val = regmap_parse_16_native;
728 break;
729 default:
730 goto err_map;
731 }
b83a313b 732 break;
ea279fc5 733 case 24:
141eba2e
SW
734 if (val_endian != REGMAP_ENDIAN_BIG)
735 goto err_map;
ea279fc5
MR
736 map->format.format_val = regmap_format_24;
737 map->format.parse_val = regmap_parse_24;
738 break;
7d5e525b 739 case 32:
141eba2e
SW
740 switch (val_endian) {
741 case REGMAP_ENDIAN_BIG:
742 map->format.format_val = regmap_format_32_be;
743 map->format.parse_val = regmap_parse_32_be;
8a819ff8 744 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 745 break;
4aa8c069
XL
746 case REGMAP_ENDIAN_LITTLE:
747 map->format.format_val = regmap_format_32_le;
748 map->format.parse_val = regmap_parse_32_le;
749 map->format.parse_inplace = regmap_parse_32_le_inplace;
750 break;
141eba2e
SW
751 case REGMAP_ENDIAN_NATIVE:
752 map->format.format_val = regmap_format_32_native;
753 map->format.parse_val = regmap_parse_32_native;
754 break;
755 default:
756 goto err_map;
757 }
7d5e525b 758 break;
b83a313b
MB
759 }
760
141eba2e
SW
761 if (map->format.format_write) {
762 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
763 (val_endian != REGMAP_ENDIAN_BIG))
764 goto err_map;
7a647614 765 map->use_single_rw = true;
141eba2e 766 }
7a647614 767
b83a313b
MB
768 if (!map->format.format_write &&
769 !(map->format.format_reg && map->format.format_val))
770 goto err_map;
771
82159ba8 772 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
773 if (map->work_buf == NULL) {
774 ret = -ENOMEM;
5204f5e3 775 goto err_map;
b83a313b
MB
776 }
777
d2a5884a
AS
778 if (map->format.format_write) {
779 map->defer_caching = false;
07c320dc 780 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
781 } else if (map->format.format_val) {
782 map->defer_caching = true;
07c320dc 783 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
784 }
785
786skip_format_initialization:
07c320dc 787
6863ca62 788 map->range_tree = RB_ROOT;
e3549cd0 789 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
790 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
791 struct regmap_range_node *new;
792
793 /* Sanity check */
061adc06
MB
794 if (range_cfg->range_max < range_cfg->range_min) {
795 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
796 range_cfg->range_max, range_cfg->range_min);
6863ca62 797 goto err_range;
061adc06
MB
798 }
799
800 if (range_cfg->range_max > map->max_register) {
801 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
802 range_cfg->range_max, map->max_register);
803 goto err_range;
804 }
805
806 if (range_cfg->selector_reg > map->max_register) {
807 dev_err(map->dev,
808 "Invalid range %d: selector out of map\n", i);
809 goto err_range;
810 }
811
812 if (range_cfg->window_len == 0) {
813 dev_err(map->dev, "Invalid range %d: window_len 0\n",
814 i);
815 goto err_range;
816 }
6863ca62
KG
817
818 /* Make sure, that this register range has no selector
819 or data window within its boundary */
e3549cd0 820 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
821 unsigned sel_reg = config->ranges[j].selector_reg;
822 unsigned win_min = config->ranges[j].window_start;
823 unsigned win_max = win_min +
824 config->ranges[j].window_len - 1;
825
f161d220
PZ
826 /* Allow data window inside its own virtual range */
827 if (j == i)
828 continue;
829
6863ca62
KG
830 if (range_cfg->range_min <= sel_reg &&
831 sel_reg <= range_cfg->range_max) {
061adc06
MB
832 dev_err(map->dev,
833 "Range %d: selector for %d in window\n",
834 i, j);
6863ca62
KG
835 goto err_range;
836 }
837
838 if (!(win_max < range_cfg->range_min ||
839 win_min > range_cfg->range_max)) {
061adc06
MB
840 dev_err(map->dev,
841 "Range %d: window for %d in window\n",
842 i, j);
6863ca62
KG
843 goto err_range;
844 }
845 }
846
847 new = kzalloc(sizeof(*new), GFP_KERNEL);
848 if (new == NULL) {
849 ret = -ENOMEM;
850 goto err_range;
851 }
852
4b020b3f 853 new->map = map;
d058bb49 854 new->name = range_cfg->name;
6863ca62
KG
855 new->range_min = range_cfg->range_min;
856 new->range_max = range_cfg->range_max;
857 new->selector_reg = range_cfg->selector_reg;
858 new->selector_mask = range_cfg->selector_mask;
859 new->selector_shift = range_cfg->selector_shift;
860 new->window_start = range_cfg->window_start;
861 new->window_len = range_cfg->window_len;
862
53e87f88 863 if (!_regmap_range_add(map, new)) {
061adc06 864 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
865 kfree(new);
866 goto err_range;
867 }
868
869 if (map->selector_work_buf == NULL) {
870 map->selector_work_buf =
871 kzalloc(map->format.buf_size, GFP_KERNEL);
872 if (map->selector_work_buf == NULL) {
873 ret = -ENOMEM;
874 goto err_range;
875 }
876 }
877 }
052d2cd1 878
e5e3b8ab 879 ret = regcache_init(map, config);
0ff3e62f 880 if (ret != 0)
6863ca62
KG
881 goto err_range;
882
a7a037c8 883 if (dev) {
6cfec04b
MS
884 ret = regmap_attach_dev(dev, map, config);
885 if (ret != 0)
886 goto err_regcache;
a7a037c8 887 }
72b39f6f 888
b83a313b
MB
889 return map;
890
6cfec04b 891err_regcache:
72b39f6f 892 regcache_exit(map);
6863ca62
KG
893err_range:
894 regmap_range_exit(map);
58072cbf 895 kfree(map->work_buf);
b83a313b
MB
896err_map:
897 kfree(map);
898err:
899 return ERR_PTR(ret);
900}
901EXPORT_SYMBOL_GPL(regmap_init);
902
c0eb4676
MB
903static void devm_regmap_release(struct device *dev, void *res)
904{
905 regmap_exit(*(struct regmap **)res);
906}
907
908/**
909 * devm_regmap_init(): Initialise managed register map
910 *
911 * @dev: Device that will be interacted with
912 * @bus: Bus-specific callbacks to use with device
0135bbcc 913 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
914 * @config: Configuration for register map
915 *
916 * The return value will be an ERR_PTR() on error or a valid pointer
917 * to a struct regmap. This function should generally not be called
918 * directly, it should be called by bus-specific init functions. The
919 * map will be automatically freed by the device management code.
920 */
921struct regmap *devm_regmap_init(struct device *dev,
922 const struct regmap_bus *bus,
0135bbcc 923 void *bus_context,
c0eb4676
MB
924 const struct regmap_config *config)
925{
926 struct regmap **ptr, *regmap;
927
928 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
929 if (!ptr)
930 return ERR_PTR(-ENOMEM);
931
0135bbcc 932 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
933 if (!IS_ERR(regmap)) {
934 *ptr = regmap;
935 devres_add(dev, ptr);
936 } else {
937 devres_free(ptr);
938 }
939
940 return regmap;
941}
942EXPORT_SYMBOL_GPL(devm_regmap_init);
943
67252287
SK
944static void regmap_field_init(struct regmap_field *rm_field,
945 struct regmap *regmap, struct reg_field reg_field)
946{
947 int field_bits = reg_field.msb - reg_field.lsb + 1;
948 rm_field->regmap = regmap;
949 rm_field->reg = reg_field.reg;
950 rm_field->shift = reg_field.lsb;
951 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
a0102375
KM
952 rm_field->id_size = reg_field.id_size;
953 rm_field->id_offset = reg_field.id_offset;
67252287
SK
954}
955
956/**
957 * devm_regmap_field_alloc(): Allocate and initialise a register field
958 * in a register map.
959 *
960 * @dev: Device that will be interacted with
961 * @regmap: regmap bank in which this register field is located.
962 * @reg_field: Register field with in the bank.
963 *
964 * The return value will be an ERR_PTR() on error or a valid pointer
965 * to a struct regmap_field. The regmap_field will be automatically freed
966 * by the device management code.
967 */
968struct regmap_field *devm_regmap_field_alloc(struct device *dev,
969 struct regmap *regmap, struct reg_field reg_field)
970{
971 struct regmap_field *rm_field = devm_kzalloc(dev,
972 sizeof(*rm_field), GFP_KERNEL);
973 if (!rm_field)
974 return ERR_PTR(-ENOMEM);
975
976 regmap_field_init(rm_field, regmap, reg_field);
977
978 return rm_field;
979
980}
981EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
982
983/**
984 * devm_regmap_field_free(): Free register field allocated using
985 * devm_regmap_field_alloc. Usally drivers need not call this function,
986 * as the memory allocated via devm will be freed as per device-driver
987 * life-cyle.
988 *
989 * @dev: Device that will be interacted with
990 * @field: regmap field which should be freed.
991 */
992void devm_regmap_field_free(struct device *dev,
993 struct regmap_field *field)
994{
995 devm_kfree(dev, field);
996}
997EXPORT_SYMBOL_GPL(devm_regmap_field_free);
998
999/**
1000 * regmap_field_alloc(): Allocate and initialise a register field
1001 * in a register map.
1002 *
1003 * @regmap: regmap bank in which this register field is located.
1004 * @reg_field: Register field with in the bank.
1005 *
1006 * The return value will be an ERR_PTR() on error or a valid pointer
1007 * to a struct regmap_field. The regmap_field should be freed by the
1008 * user once its finished working with it using regmap_field_free().
1009 */
1010struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1011 struct reg_field reg_field)
1012{
1013 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1014
1015 if (!rm_field)
1016 return ERR_PTR(-ENOMEM);
1017
1018 regmap_field_init(rm_field, regmap, reg_field);
1019
1020 return rm_field;
1021}
1022EXPORT_SYMBOL_GPL(regmap_field_alloc);
1023
1024/**
1025 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1026 *
1027 * @field: regmap field which should be freed.
1028 */
1029void regmap_field_free(struct regmap_field *field)
1030{
1031 kfree(field);
1032}
1033EXPORT_SYMBOL_GPL(regmap_field_free);
1034
bf315173
MB
1035/**
1036 * regmap_reinit_cache(): Reinitialise the current register cache
1037 *
1038 * @map: Register map to operate on.
1039 * @config: New configuration. Only the cache data will be used.
1040 *
1041 * Discard any existing register cache for the map and initialize a
1042 * new cache. This can be used to restore the cache to defaults or to
1043 * update the cache configuration to reflect runtime discovery of the
1044 * hardware.
4d879514
DP
1045 *
1046 * No explicit locking is done here, the user needs to ensure that
1047 * this function will not race with other calls to regmap.
bf315173
MB
1048 */
1049int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1050{
bf315173 1051 regcache_exit(map);
a24f64a6 1052 regmap_debugfs_exit(map);
bf315173
MB
1053
1054 map->max_register = config->max_register;
1055 map->writeable_reg = config->writeable_reg;
1056 map->readable_reg = config->readable_reg;
1057 map->volatile_reg = config->volatile_reg;
1058 map->precious_reg = config->precious_reg;
1059 map->cache_type = config->cache_type;
1060
d3c242e1 1061 regmap_debugfs_init(map, config->name);
a24f64a6 1062
421e8d2d
MB
1063 map->cache_bypass = false;
1064 map->cache_only = false;
1065
4d879514 1066 return regcache_init(map, config);
bf315173 1067}
752a6a5f 1068EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1069
b83a313b
MB
1070/**
1071 * regmap_exit(): Free a previously allocated register map
1072 */
1073void regmap_exit(struct regmap *map)
1074{
7e09a979
MB
1075 struct regmap_async *async;
1076
5d1729e7 1077 regcache_exit(map);
31244e39 1078 regmap_debugfs_exit(map);
6863ca62 1079 regmap_range_exit(map);
d2a5884a 1080 if (map->bus && map->bus->free_context)
0135bbcc 1081 map->bus->free_context(map->bus_context);
b83a313b 1082 kfree(map->work_buf);
7e09a979
MB
1083 while (!list_empty(&map->async_free)) {
1084 async = list_first_entry_or_null(&map->async_free,
1085 struct regmap_async,
1086 list);
1087 list_del(&async->list);
1088 kfree(async->work_buf);
1089 kfree(async);
1090 }
b83a313b
MB
1091 kfree(map);
1092}
1093EXPORT_SYMBOL_GPL(regmap_exit);
1094
72b39f6f
MB
1095static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1096{
1097 struct regmap **r = res;
1098 if (!r || !*r) {
1099 WARN_ON(!r || !*r);
1100 return 0;
1101 }
1102
1103 /* If the user didn't specify a name match any */
1104 if (data)
1105 return (*r)->name == data;
1106 else
1107 return 1;
1108}
1109
1110/**
1111 * dev_get_regmap(): Obtain the regmap (if any) for a device
1112 *
1113 * @dev: Device to retrieve the map for
1114 * @name: Optional name for the register map, usually NULL.
1115 *
1116 * Returns the regmap for the device if one is present, or NULL. If
1117 * name is specified then it must match the name specified when
1118 * registering the device, if it is NULL then the first regmap found
1119 * will be used. Devices with multiple register maps are very rare,
1120 * generic code should normally not need to specify a name.
1121 */
1122struct regmap *dev_get_regmap(struct device *dev, const char *name)
1123{
1124 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1125 dev_get_regmap_match, (void *)name);
1126
1127 if (!r)
1128 return NULL;
1129 return *r;
1130}
1131EXPORT_SYMBOL_GPL(dev_get_regmap);
1132
8d7d3972
TT
1133/**
1134 * regmap_get_device(): Obtain the device from a regmap
1135 *
1136 * @map: Register map to operate on.
1137 *
1138 * Returns the underlying device that the regmap has been created for.
1139 */
1140struct device *regmap_get_device(struct regmap *map)
1141{
1142 return map->dev;
1143}
fa2fbe4a 1144EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1145
6863ca62 1146static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1147 struct regmap_range_node *range,
6863ca62
KG
1148 unsigned int val_num)
1149{
6863ca62
KG
1150 void *orig_work_buf;
1151 unsigned int win_offset;
1152 unsigned int win_page;
1153 bool page_chg;
1154 int ret;
1155
98bc7dfd
MB
1156 win_offset = (*reg - range->range_min) % range->window_len;
1157 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1158
98bc7dfd
MB
1159 if (val_num > 1) {
1160 /* Bulk write shouldn't cross range boundary */
1161 if (*reg + val_num - 1 > range->range_max)
1162 return -EINVAL;
6863ca62 1163
98bc7dfd
MB
1164 /* ... or single page boundary */
1165 if (val_num > range->window_len - win_offset)
1166 return -EINVAL;
1167 }
6863ca62 1168
98bc7dfd
MB
1169 /* It is possible to have selector register inside data window.
1170 In that case, selector register is located on every page and
1171 it needs no page switching, when accessed alone. */
1172 if (val_num > 1 ||
1173 range->window_start + win_offset != range->selector_reg) {
1174 /* Use separate work_buf during page switching */
1175 orig_work_buf = map->work_buf;
1176 map->work_buf = map->selector_work_buf;
6863ca62 1177
98bc7dfd
MB
1178 ret = _regmap_update_bits(map, range->selector_reg,
1179 range->selector_mask,
1180 win_page << range->selector_shift,
1181 &page_chg);
632a5b01 1182
98bc7dfd 1183 map->work_buf = orig_work_buf;
6863ca62 1184
0ff3e62f 1185 if (ret != 0)
98bc7dfd 1186 return ret;
6863ca62
KG
1187 }
1188
98bc7dfd
MB
1189 *reg = range->window_start + win_offset;
1190
6863ca62
KG
1191 return 0;
1192}
1193
584de329 1194int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1195 const void *val, size_t val_len)
b83a313b 1196{
98bc7dfd 1197 struct regmap_range_node *range;
0d509f2b 1198 unsigned long flags;
6f306441 1199 u8 *u8 = map->work_buf;
0d509f2b
MB
1200 void *work_val = map->work_buf + map->format.reg_bytes +
1201 map->format.pad_bytes;
b83a313b
MB
1202 void *buf;
1203 int ret = -ENOTSUPP;
1204 size_t len;
73304781
MB
1205 int i;
1206
f1b5c5c3 1207 WARN_ON(!map->bus);
d2a5884a 1208
73304781
MB
1209 /* Check for unwritable registers before we start */
1210 if (map->writeable_reg)
1211 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1212 if (!map->writeable_reg(map->dev,
1213 reg + (i * map->reg_stride)))
73304781 1214 return -EINVAL;
b83a313b 1215
c9157198
LD
1216 if (!map->cache_bypass && map->format.parse_val) {
1217 unsigned int ival;
1218 int val_bytes = map->format.val_bytes;
1219 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1220 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1221 ret = regcache_write(map, reg + (i * map->reg_stride),
1222 ival);
c9157198
LD
1223 if (ret) {
1224 dev_err(map->dev,
6d04b8ac 1225 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1226 reg + i, ret);
1227 return ret;
1228 }
1229 }
1230 if (map->cache_only) {
1231 map->cache_dirty = true;
1232 return 0;
1233 }
1234 }
1235
98bc7dfd
MB
1236 range = _regmap_range_lookup(map, reg);
1237 if (range) {
8a2ceac6
MB
1238 int val_num = val_len / map->format.val_bytes;
1239 int win_offset = (reg - range->range_min) % range->window_len;
1240 int win_residue = range->window_len - win_offset;
1241
1242 /* If the write goes beyond the end of the window split it */
1243 while (val_num > win_residue) {
1a61cfe3 1244 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1245 win_residue, val_len / map->format.val_bytes);
1246 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1247 map->format.val_bytes);
8a2ceac6
MB
1248 if (ret != 0)
1249 return ret;
1250
1251 reg += win_residue;
1252 val_num -= win_residue;
1253 val += win_residue * map->format.val_bytes;
1254 val_len -= win_residue * map->format.val_bytes;
1255
1256 win_offset = (reg - range->range_min) %
1257 range->window_len;
1258 win_residue = range->window_len - win_offset;
1259 }
1260
1261 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1262 if (ret != 0)
98bc7dfd
MB
1263 return ret;
1264 }
6863ca62 1265
d939fb9a 1266 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1267
6f306441
LPC
1268 u8[0] |= map->write_flag_mask;
1269
651e013e
MB
1270 /*
1271 * Essentially all I/O mechanisms will be faster with a single
1272 * buffer to write. Since register syncs often generate raw
1273 * writes of single registers optimise that case.
1274 */
1275 if (val != work_val && val_len == map->format.val_bytes) {
1276 memcpy(work_val, val, map->format.val_bytes);
1277 val = work_val;
1278 }
1279
0a819809 1280 if (map->async && map->bus->async_write) {
7e09a979 1281 struct regmap_async *async;
0d509f2b 1282
fe7d4ccd
MB
1283 trace_regmap_async_write_start(map->dev, reg, val_len);
1284
7e09a979
MB
1285 spin_lock_irqsave(&map->async_lock, flags);
1286 async = list_first_entry_or_null(&map->async_free,
1287 struct regmap_async,
1288 list);
1289 if (async)
1290 list_del(&async->list);
1291 spin_unlock_irqrestore(&map->async_lock, flags);
1292
1293 if (!async) {
1294 async = map->bus->async_alloc();
1295 if (!async)
1296 return -ENOMEM;
1297
1298 async->work_buf = kzalloc(map->format.buf_size,
1299 GFP_KERNEL | GFP_DMA);
1300 if (!async->work_buf) {
1301 kfree(async);
1302 return -ENOMEM;
1303 }
0d509f2b
MB
1304 }
1305
0d509f2b
MB
1306 async->map = map;
1307
1308 /* If the caller supplied the value we can use it safely. */
1309 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1310 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1311
1312 spin_lock_irqsave(&map->async_lock, flags);
1313 list_add_tail(&async->list, &map->async_list);
1314 spin_unlock_irqrestore(&map->async_lock, flags);
1315
04c50ccf
MB
1316 if (val != work_val)
1317 ret = map->bus->async_write(map->bus_context,
1318 async->work_buf,
1319 map->format.reg_bytes +
1320 map->format.pad_bytes,
1321 val, val_len, async);
1322 else
1323 ret = map->bus->async_write(map->bus_context,
1324 async->work_buf,
1325 map->format.reg_bytes +
1326 map->format.pad_bytes +
1327 val_len, NULL, 0, async);
0d509f2b
MB
1328
1329 if (ret != 0) {
1330 dev_err(map->dev, "Failed to schedule write: %d\n",
1331 ret);
1332
1333 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1334 list_move(&async->list, &map->async_free);
0d509f2b 1335 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1336 }
f951b658
MB
1337
1338 return ret;
0d509f2b
MB
1339 }
1340
fb2736bb
MB
1341 trace_regmap_hw_write_start(map->dev, reg,
1342 val_len / map->format.val_bytes);
1343
2547e201
MB
1344 /* If we're doing a single register write we can probably just
1345 * send the work_buf directly, otherwise try to do a gather
1346 * write.
1347 */
0d509f2b 1348 if (val == work_val)
0135bbcc 1349 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1350 map->format.reg_bytes +
1351 map->format.pad_bytes +
1352 val_len);
2547e201 1353 else if (map->bus->gather_write)
0135bbcc 1354 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1355 map->format.reg_bytes +
1356 map->format.pad_bytes,
b83a313b
MB
1357 val, val_len);
1358
2547e201 1359 /* If that didn't work fall back on linearising by hand. */
b83a313b 1360 if (ret == -ENOTSUPP) {
82159ba8
MB
1361 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1362 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1363 if (!buf)
1364 return -ENOMEM;
1365
1366 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1367 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1368 val, val_len);
0135bbcc 1369 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1370
1371 kfree(buf);
1372 }
1373
fb2736bb
MB
1374 trace_regmap_hw_write_done(map->dev, reg,
1375 val_len / map->format.val_bytes);
1376
b83a313b
MB
1377 return ret;
1378}
1379
221ad7f2
MB
1380/**
1381 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1382 *
1383 * @map: Map to check.
1384 */
1385bool regmap_can_raw_write(struct regmap *map)
1386{
1387 return map->bus && map->format.format_val && map->format.format_reg;
1388}
1389EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1390
07c320dc
AS
1391static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1392 unsigned int val)
1393{
1394 int ret;
1395 struct regmap_range_node *range;
1396 struct regmap *map = context;
1397
f1b5c5c3 1398 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1399
1400 range = _regmap_range_lookup(map, reg);
1401 if (range) {
1402 ret = _regmap_select_page(map, &reg, range, 1);
1403 if (ret != 0)
1404 return ret;
1405 }
1406
1407 map->format.format_write(map, reg, val);
1408
1409 trace_regmap_hw_write_start(map->dev, reg, 1);
1410
1411 ret = map->bus->write(map->bus_context, map->work_buf,
1412 map->format.buf_size);
1413
1414 trace_regmap_hw_write_done(map->dev, reg, 1);
1415
1416 return ret;
1417}
1418
3ac17037
BB
1419static int _regmap_bus_reg_write(void *context, unsigned int reg,
1420 unsigned int val)
1421{
1422 struct regmap *map = context;
1423
1424 return map->bus->reg_write(map->bus_context, reg, val);
1425}
1426
07c320dc
AS
1427static int _regmap_bus_raw_write(void *context, unsigned int reg,
1428 unsigned int val)
1429{
1430 struct regmap *map = context;
1431
f1b5c5c3 1432 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1433
1434 map->format.format_val(map->work_buf + map->format.reg_bytes
1435 + map->format.pad_bytes, val, 0);
1436 return _regmap_raw_write(map, reg,
1437 map->work_buf +
1438 map->format.reg_bytes +
1439 map->format.pad_bytes,
0a819809 1440 map->format.val_bytes);
07c320dc
AS
1441}
1442
d2a5884a
AS
1443static inline void *_regmap_map_get_context(struct regmap *map)
1444{
1445 return (map->bus) ? map : map->bus_context;
1446}
1447
4d2dc095
DP
1448int _regmap_write(struct regmap *map, unsigned int reg,
1449 unsigned int val)
b83a313b 1450{
fb2736bb 1451 int ret;
d2a5884a 1452 void *context = _regmap_map_get_context(map);
b83a313b 1453
515f2261
IN
1454 if (!regmap_writeable(map, reg))
1455 return -EIO;
1456
d2a5884a 1457 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1458 ret = regcache_write(map, reg, val);
1459 if (ret != 0)
1460 return ret;
8ae0d7e8
MB
1461 if (map->cache_only) {
1462 map->cache_dirty = true;
5d1729e7 1463 return 0;
8ae0d7e8 1464 }
5d1729e7
DP
1465 }
1466
1044c180 1467#ifdef LOG_DEVICE
5336be84 1468 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
1469 dev_info(map->dev, "%x <= %x\n", reg, val);
1470#endif
1471
fb2736bb
MB
1472 trace_regmap_reg_write(map->dev, reg, val);
1473
d2a5884a 1474 return map->reg_write(context, reg, val);
b83a313b
MB
1475}
1476
1477/**
1478 * regmap_write(): Write a value to a single register
1479 *
1480 * @map: Register map to write to
1481 * @reg: Register to write to
1482 * @val: Value to be written
1483 *
1484 * A value of zero will be returned on success, a negative errno will
1485 * be returned in error cases.
1486 */
1487int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1488{
1489 int ret;
1490
f01ee60f
SW
1491 if (reg % map->reg_stride)
1492 return -EINVAL;
1493
0d4529c5 1494 map->lock(map->lock_arg);
b83a313b
MB
1495
1496 ret = _regmap_write(map, reg, val);
1497
0d4529c5 1498 map->unlock(map->lock_arg);
b83a313b
MB
1499
1500 return ret;
1501}
1502EXPORT_SYMBOL_GPL(regmap_write);
1503
915f441b
MB
1504/**
1505 * regmap_write_async(): Write a value to a single register asynchronously
1506 *
1507 * @map: Register map to write to
1508 * @reg: Register to write to
1509 * @val: Value to be written
1510 *
1511 * A value of zero will be returned on success, a negative errno will
1512 * be returned in error cases.
1513 */
1514int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1515{
1516 int ret;
1517
1518 if (reg % map->reg_stride)
1519 return -EINVAL;
1520
1521 map->lock(map->lock_arg);
1522
1523 map->async = true;
1524
1525 ret = _regmap_write(map, reg, val);
1526
1527 map->async = false;
1528
1529 map->unlock(map->lock_arg);
1530
1531 return ret;
1532}
1533EXPORT_SYMBOL_GPL(regmap_write_async);
1534
b83a313b
MB
1535/**
1536 * regmap_raw_write(): Write raw values to one or more registers
1537 *
1538 * @map: Register map to write to
1539 * @reg: Initial register to write to
1540 * @val: Block of data to be written, laid out for direct transmission to the
1541 * device
1542 * @val_len: Length of data pointed to by val.
1543 *
1544 * This function is intended to be used for things like firmware
1545 * download where a large block of data needs to be transferred to the
1546 * device. No formatting will be done on the data provided.
1547 *
1548 * A value of zero will be returned on success, a negative errno will
1549 * be returned in error cases.
1550 */
1551int regmap_raw_write(struct regmap *map, unsigned int reg,
1552 const void *val, size_t val_len)
1553{
1554 int ret;
1555
221ad7f2 1556 if (!regmap_can_raw_write(map))
d2a5884a 1557 return -EINVAL;
851960ba
SW
1558 if (val_len % map->format.val_bytes)
1559 return -EINVAL;
1560
0d4529c5 1561 map->lock(map->lock_arg);
b83a313b 1562
0a819809 1563 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1564
0d4529c5 1565 map->unlock(map->lock_arg);
b83a313b
MB
1566
1567 return ret;
1568}
1569EXPORT_SYMBOL_GPL(regmap_raw_write);
1570
67252287
SK
1571/**
1572 * regmap_field_write(): Write a value to a single register field
1573 *
1574 * @field: Register field to write to
1575 * @val: Value to be written
1576 *
1577 * A value of zero will be returned on success, a negative errno will
1578 * be returned in error cases.
1579 */
1580int regmap_field_write(struct regmap_field *field, unsigned int val)
1581{
1582 return regmap_update_bits(field->regmap, field->reg,
1583 field->mask, val << field->shift);
1584}
1585EXPORT_SYMBOL_GPL(regmap_field_write);
1586
fdf20029
KM
1587/**
1588 * regmap_field_update_bits(): Perform a read/modify/write cycle
1589 * on the register field
1590 *
1591 * @field: Register field to write to
1592 * @mask: Bitmask to change
1593 * @val: Value to be written
1594 *
1595 * A value of zero will be returned on success, a negative errno will
1596 * be returned in error cases.
1597 */
1598int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1599{
1600 mask = (mask << field->shift) & field->mask;
1601
1602 return regmap_update_bits(field->regmap, field->reg,
1603 mask, val << field->shift);
1604}
1605EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1606
a0102375
KM
1607/**
1608 * regmap_fields_write(): Write a value to a single register field with port ID
1609 *
1610 * @field: Register field to write to
1611 * @id: port ID
1612 * @val: Value to be written
1613 *
1614 * A value of zero will be returned on success, a negative errno will
1615 * be returned in error cases.
1616 */
1617int regmap_fields_write(struct regmap_field *field, unsigned int id,
1618 unsigned int val)
1619{
1620 if (id >= field->id_size)
1621 return -EINVAL;
1622
1623 return regmap_update_bits(field->regmap,
1624 field->reg + (field->id_offset * id),
1625 field->mask, val << field->shift);
1626}
1627EXPORT_SYMBOL_GPL(regmap_fields_write);
1628
1629/**
1630 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1631 * on the register field
1632 *
1633 * @field: Register field to write to
1634 * @id: port ID
1635 * @mask: Bitmask to change
1636 * @val: Value to be written
1637 *
1638 * A value of zero will be returned on success, a negative errno will
1639 * be returned in error cases.
1640 */
1641int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1642 unsigned int mask, unsigned int val)
1643{
1644 if (id >= field->id_size)
1645 return -EINVAL;
1646
1647 mask = (mask << field->shift) & field->mask;
1648
1649 return regmap_update_bits(field->regmap,
1650 field->reg + (field->id_offset * id),
1651 mask, val << field->shift);
1652}
1653EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1654
8eaeb219
LD
1655/*
1656 * regmap_bulk_write(): Write multiple registers to the device
1657 *
1658 * @map: Register map to write to
1659 * @reg: First register to be write from
1660 * @val: Block of data to be written, in native register size for device
1661 * @val_count: Number of registers to write
1662 *
1663 * This function is intended to be used for writing a large block of
31b35e9e 1664 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1665 *
1666 * A value of zero will be returned on success, a negative errno will
1667 * be returned in error cases.
1668 */
1669int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1670 size_t val_count)
1671{
1672 int ret = 0, i;
1673 size_t val_bytes = map->format.val_bytes;
8eaeb219 1674
f4298360 1675 if (map->bus && !map->format.parse_inplace)
8eaeb219 1676 return -EINVAL;
f01ee60f
SW
1677 if (reg % map->reg_stride)
1678 return -EINVAL;
8eaeb219 1679
f4298360
SB
1680 /*
1681 * Some devices don't support bulk write, for
1682 * them we have a series of single write operations.
1683 */
1684 if (!map->bus || map->use_single_rw) {
4999e962 1685 map->lock(map->lock_arg);
f4298360
SB
1686 for (i = 0; i < val_count; i++) {
1687 unsigned int ival;
1688
1689 switch (val_bytes) {
1690 case 1:
1691 ival = *(u8 *)(val + (i * val_bytes));
1692 break;
1693 case 2:
1694 ival = *(u16 *)(val + (i * val_bytes));
1695 break;
1696 case 4:
1697 ival = *(u32 *)(val + (i * val_bytes));
1698 break;
1699#ifdef CONFIG_64BIT
1700 case 8:
1701 ival = *(u64 *)(val + (i * val_bytes));
1702 break;
1703#endif
1704 default:
1705 ret = -EINVAL;
1706 goto out;
1707 }
8eaeb219 1708
f4298360
SB
1709 ret = _regmap_write(map, reg + (i * map->reg_stride),
1710 ival);
1711 if (ret != 0)
1712 goto out;
1713 }
4999e962
TI
1714out:
1715 map->unlock(map->lock_arg);
8eaeb219 1716 } else {
f4298360
SB
1717 void *wval;
1718
d6b41cb0
XL
1719 if (!val_count)
1720 return -EINVAL;
1721
8eaeb219
LD
1722 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1723 if (!wval) {
8eaeb219 1724 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1725 return -ENOMEM;
8eaeb219
LD
1726 }
1727 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1728 map->format.parse_inplace(wval + i);
f4298360 1729
4999e962 1730 map->lock(map->lock_arg);
0a819809 1731 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1732 map->unlock(map->lock_arg);
8eaeb219 1733
8eaeb219 1734 kfree(wval);
f4298360 1735 }
8eaeb219
LD
1736 return ret;
1737}
1738EXPORT_SYMBOL_GPL(regmap_bulk_write);
1739
e894c3f4
OAO
1740/*
1741 * _regmap_raw_multi_reg_write()
1742 *
1743 * the (register,newvalue) pairs in regs have not been formatted, but
1744 * they are all in the same page and have been changed to being page
1745 * relative. The page register has been written if that was neccessary.
1746 */
1747static int _regmap_raw_multi_reg_write(struct regmap *map,
1748 const struct reg_default *regs,
1749 size_t num_regs)
1750{
1751 int ret;
1752 void *buf;
1753 int i;
1754 u8 *u8;
1755 size_t val_bytes = map->format.val_bytes;
1756 size_t reg_bytes = map->format.reg_bytes;
1757 size_t pad_bytes = map->format.pad_bytes;
1758 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1759 size_t len = pair_size * num_regs;
1760
f5727cd3
XL
1761 if (!len)
1762 return -EINVAL;
1763
e894c3f4
OAO
1764 buf = kzalloc(len, GFP_KERNEL);
1765 if (!buf)
1766 return -ENOMEM;
1767
1768 /* We have to linearise by hand. */
1769
1770 u8 = buf;
1771
1772 for (i = 0; i < num_regs; i++) {
1773 int reg = regs[i].reg;
1774 int val = regs[i].def;
1775 trace_regmap_hw_write_start(map->dev, reg, 1);
1776 map->format.format_reg(u8, reg, map->reg_shift);
1777 u8 += reg_bytes + pad_bytes;
1778 map->format.format_val(u8, val, 0);
1779 u8 += val_bytes;
1780 }
1781 u8 = buf;
1782 *u8 |= map->write_flag_mask;
1783
1784 ret = map->bus->write(map->bus_context, buf, len);
1785
1786 kfree(buf);
1787
1788 for (i = 0; i < num_regs; i++) {
1789 int reg = regs[i].reg;
1790 trace_regmap_hw_write_done(map->dev, reg, 1);
1791 }
1792 return ret;
1793}
1794
1795static unsigned int _regmap_register_page(struct regmap *map,
1796 unsigned int reg,
1797 struct regmap_range_node *range)
1798{
1799 unsigned int win_page = (reg - range->range_min) / range->window_len;
1800
1801 return win_page;
1802}
1803
1804static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1805 struct reg_default *regs,
1806 size_t num_regs)
1807{
1808 int ret;
1809 int i, n;
1810 struct reg_default *base;
b48d1398 1811 unsigned int this_page = 0;
e894c3f4
OAO
1812 /*
1813 * the set of registers are not neccessarily in order, but
1814 * since the order of write must be preserved this algorithm
1815 * chops the set each time the page changes
1816 */
1817 base = regs;
1818 for (i = 0, n = 0; i < num_regs; i++, n++) {
1819 unsigned int reg = regs[i].reg;
1820 struct regmap_range_node *range;
1821
1822 range = _regmap_range_lookup(map, reg);
1823 if (range) {
1824 unsigned int win_page = _regmap_register_page(map, reg,
1825 range);
1826
1827 if (i == 0)
1828 this_page = win_page;
1829 if (win_page != this_page) {
1830 this_page = win_page;
1831 ret = _regmap_raw_multi_reg_write(map, base, n);
1832 if (ret != 0)
1833 return ret;
1834 base += n;
1835 n = 0;
1836 }
1837 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1838 if (ret != 0)
1839 return ret;
1840 }
1841 }
1842 if (n > 0)
1843 return _regmap_raw_multi_reg_write(map, base, n);
1844 return 0;
1845}
1846
1d5b40bc
CK
1847static int _regmap_multi_reg_write(struct regmap *map,
1848 const struct reg_default *regs,
e894c3f4 1849 size_t num_regs)
1d5b40bc 1850{
e894c3f4
OAO
1851 int i;
1852 int ret;
1853
1854 if (!map->can_multi_write) {
1855 for (i = 0; i < num_regs; i++) {
1856 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1857 if (ret != 0)
1858 return ret;
1859 }
1860 return 0;
1861 }
1862
1863 if (!map->format.parse_inplace)
1864 return -EINVAL;
1865
1866 if (map->writeable_reg)
1867 for (i = 0; i < num_regs; i++) {
1868 int reg = regs[i].reg;
1869 if (!map->writeable_reg(map->dev, reg))
1870 return -EINVAL;
1871 if (reg % map->reg_stride)
1872 return -EINVAL;
1873 }
1874
1875 if (!map->cache_bypass) {
1876 for (i = 0; i < num_regs; i++) {
1877 unsigned int val = regs[i].def;
1878 unsigned int reg = regs[i].reg;
1879 ret = regcache_write(map, reg, val);
1880 if (ret) {
1881 dev_err(map->dev,
1882 "Error in caching of register: %x ret: %d\n",
1883 reg, ret);
1884 return ret;
1885 }
1886 }
1887 if (map->cache_only) {
1888 map->cache_dirty = true;
1889 return 0;
1890 }
1891 }
1892
1893 WARN_ON(!map->bus);
1d5b40bc
CK
1894
1895 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
1896 unsigned int reg = regs[i].reg;
1897 struct regmap_range_node *range;
1898 range = _regmap_range_lookup(map, reg);
1899 if (range) {
1900 size_t len = sizeof(struct reg_default)*num_regs;
1901 struct reg_default *base = kmemdup(regs, len,
1902 GFP_KERNEL);
1903 if (!base)
1904 return -ENOMEM;
1905 ret = _regmap_range_multi_paged_reg_write(map, base,
1906 num_regs);
1907 kfree(base);
1908
1d5b40bc
CK
1909 return ret;
1910 }
1911 }
e894c3f4 1912 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
1913}
1914
e33fabd3
AO
1915/*
1916 * regmap_multi_reg_write(): Write multiple registers to the device
1917 *
e894c3f4
OAO
1918 * where the set of register,value pairs are supplied in any order,
1919 * possibly not all in a single range.
e33fabd3
AO
1920 *
1921 * @map: Register map to write to
1922 * @regs: Array of structures containing register,value to be written
1923 * @num_regs: Number of registers to write
1924 *
e894c3f4
OAO
1925 * The 'normal' block write mode will send ultimately send data on the
1926 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1927 * addressed. However, this alternative block multi write mode will send
1928 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1929 * must of course support the mode.
e33fabd3 1930 *
e894c3f4
OAO
1931 * A value of zero will be returned on success, a negative errno will be
1932 * returned in error cases.
e33fabd3 1933 */
f7e2cec0
CK
1934int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1935 int num_regs)
e33fabd3 1936{
1d5b40bc 1937 int ret;
e33fabd3
AO
1938
1939 map->lock(map->lock_arg);
1940
1d5b40bc
CK
1941 ret = _regmap_multi_reg_write(map, regs, num_regs);
1942
e33fabd3
AO
1943 map->unlock(map->lock_arg);
1944
1945 return ret;
1946}
1947EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1948
1d5b40bc
CK
1949/*
1950 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1951 * device but not the cache
1952 *
e33fabd3
AO
1953 * where the set of register are supplied in any order
1954 *
1955 * @map: Register map to write to
1956 * @regs: Array of structures containing register,value to be written
1957 * @num_regs: Number of registers to write
1958 *
1959 * This function is intended to be used for writing a large block of data
1960 * atomically to the device in single transfer for those I2C client devices
1961 * that implement this alternative block write mode.
1962 *
1963 * A value of zero will be returned on success, a negative errno will
1964 * be returned in error cases.
1965 */
1d5b40bc
CK
1966int regmap_multi_reg_write_bypassed(struct regmap *map,
1967 const struct reg_default *regs,
1968 int num_regs)
e33fabd3 1969{
1d5b40bc
CK
1970 int ret;
1971 bool bypass;
e33fabd3
AO
1972
1973 map->lock(map->lock_arg);
1974
1d5b40bc
CK
1975 bypass = map->cache_bypass;
1976 map->cache_bypass = true;
1977
1978 ret = _regmap_multi_reg_write(map, regs, num_regs);
1979
1980 map->cache_bypass = bypass;
1981
e33fabd3
AO
1982 map->unlock(map->lock_arg);
1983
1984 return ret;
1985}
1d5b40bc 1986EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 1987
0d509f2b
MB
1988/**
1989 * regmap_raw_write_async(): Write raw values to one or more registers
1990 * asynchronously
1991 *
1992 * @map: Register map to write to
1993 * @reg: Initial register to write to
1994 * @val: Block of data to be written, laid out for direct transmission to the
1995 * device. Must be valid until regmap_async_complete() is called.
1996 * @val_len: Length of data pointed to by val.
1997 *
1998 * This function is intended to be used for things like firmware
1999 * download where a large block of data needs to be transferred to the
2000 * device. No formatting will be done on the data provided.
2001 *
2002 * If supported by the underlying bus the write will be scheduled
2003 * asynchronously, helping maximise I/O speed on higher speed buses
2004 * like SPI. regmap_async_complete() can be called to ensure that all
2005 * asynchrnous writes have been completed.
2006 *
2007 * A value of zero will be returned on success, a negative errno will
2008 * be returned in error cases.
2009 */
2010int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2011 const void *val, size_t val_len)
2012{
2013 int ret;
2014
2015 if (val_len % map->format.val_bytes)
2016 return -EINVAL;
2017 if (reg % map->reg_stride)
2018 return -EINVAL;
2019
2020 map->lock(map->lock_arg);
2021
0a819809
MB
2022 map->async = true;
2023
2024 ret = _regmap_raw_write(map, reg, val, val_len);
2025
2026 map->async = false;
0d509f2b
MB
2027
2028 map->unlock(map->lock_arg);
2029
2030 return ret;
2031}
2032EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2033
b83a313b
MB
2034static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2035 unsigned int val_len)
2036{
98bc7dfd 2037 struct regmap_range_node *range;
b83a313b
MB
2038 u8 *u8 = map->work_buf;
2039 int ret;
2040
f1b5c5c3 2041 WARN_ON(!map->bus);
d2a5884a 2042
98bc7dfd
MB
2043 range = _regmap_range_lookup(map, reg);
2044 if (range) {
2045 ret = _regmap_select_page(map, &reg, range,
2046 val_len / map->format.val_bytes);
0ff3e62f 2047 if (ret != 0)
98bc7dfd
MB
2048 return ret;
2049 }
6863ca62 2050
d939fb9a 2051 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
2052
2053 /*
6f306441 2054 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
2055 * register addresss; since it's always the high bits for all
2056 * current formats we can do this here rather than in
2057 * formatting. This may break if we get interesting formats.
2058 */
6f306441 2059 u8[0] |= map->read_flag_mask;
b83a313b 2060
fb2736bb
MB
2061 trace_regmap_hw_read_start(map->dev, reg,
2062 val_len / map->format.val_bytes);
2063
0135bbcc 2064 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 2065 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 2066 val, val_len);
b83a313b 2067
fb2736bb
MB
2068 trace_regmap_hw_read_done(map->dev, reg,
2069 val_len / map->format.val_bytes);
2070
2071 return ret;
b83a313b
MB
2072}
2073
3ac17037
BB
2074static int _regmap_bus_reg_read(void *context, unsigned int reg,
2075 unsigned int *val)
2076{
2077 struct regmap *map = context;
2078
2079 return map->bus->reg_read(map->bus_context, reg, val);
2080}
2081
ad278406
AS
2082static int _regmap_bus_read(void *context, unsigned int reg,
2083 unsigned int *val)
2084{
2085 int ret;
2086 struct regmap *map = context;
2087
2088 if (!map->format.parse_val)
2089 return -EINVAL;
2090
2091 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2092 if (ret == 0)
2093 *val = map->format.parse_val(map->work_buf);
2094
2095 return ret;
2096}
2097
b83a313b
MB
2098static int _regmap_read(struct regmap *map, unsigned int reg,
2099 unsigned int *val)
2100{
2101 int ret;
d2a5884a
AS
2102 void *context = _regmap_map_get_context(map);
2103
f1b5c5c3 2104 WARN_ON(!map->reg_read);
b83a313b 2105
5d1729e7
DP
2106 if (!map->cache_bypass) {
2107 ret = regcache_read(map, reg, val);
2108 if (ret == 0)
2109 return 0;
2110 }
2111
2112 if (map->cache_only)
2113 return -EBUSY;
2114
d4807ad2
MS
2115 if (!regmap_readable(map, reg))
2116 return -EIO;
2117
d2a5884a 2118 ret = map->reg_read(context, reg, val);
fb2736bb 2119 if (ret == 0) {
1044c180 2120#ifdef LOG_DEVICE
5336be84 2121 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
2122 dev_info(map->dev, "%x => %x\n", reg, *val);
2123#endif
2124
fb2736bb 2125 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 2126
ad278406
AS
2127 if (!map->cache_bypass)
2128 regcache_write(map, reg, *val);
2129 }
f2985367 2130
b83a313b
MB
2131 return ret;
2132}
2133
2134/**
2135 * regmap_read(): Read a value from a single register
2136 *
0093380c 2137 * @map: Register map to read from
b83a313b
MB
2138 * @reg: Register to be read from
2139 * @val: Pointer to store read value
2140 *
2141 * A value of zero will be returned on success, a negative errno will
2142 * be returned in error cases.
2143 */
2144int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2145{
2146 int ret;
2147
f01ee60f
SW
2148 if (reg % map->reg_stride)
2149 return -EINVAL;
2150
0d4529c5 2151 map->lock(map->lock_arg);
b83a313b
MB
2152
2153 ret = _regmap_read(map, reg, val);
2154
0d4529c5 2155 map->unlock(map->lock_arg);
b83a313b
MB
2156
2157 return ret;
2158}
2159EXPORT_SYMBOL_GPL(regmap_read);
2160
2161/**
2162 * regmap_raw_read(): Read raw data from the device
2163 *
0093380c 2164 * @map: Register map to read from
b83a313b
MB
2165 * @reg: First register to be read from
2166 * @val: Pointer to store read value
2167 * @val_len: Size of data to read
2168 *
2169 * A value of zero will be returned on success, a negative errno will
2170 * be returned in error cases.
2171 */
2172int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2173 size_t val_len)
2174{
b8fb5ab1
MB
2175 size_t val_bytes = map->format.val_bytes;
2176 size_t val_count = val_len / val_bytes;
2177 unsigned int v;
2178 int ret, i;
04e016ad 2179
d2a5884a
AS
2180 if (!map->bus)
2181 return -EINVAL;
851960ba
SW
2182 if (val_len % map->format.val_bytes)
2183 return -EINVAL;
f01ee60f
SW
2184 if (reg % map->reg_stride)
2185 return -EINVAL;
851960ba 2186
0d4529c5 2187 map->lock(map->lock_arg);
b83a313b 2188
b8fb5ab1
MB
2189 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2190 map->cache_type == REGCACHE_NONE) {
2191 /* Physical block read if there's no cache involved */
2192 ret = _regmap_raw_read(map, reg, val, val_len);
2193
2194 } else {
2195 /* Otherwise go word by word for the cache; should be low
2196 * cost as we expect to hit the cache.
2197 */
2198 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2199 ret = _regmap_read(map, reg + (i * map->reg_stride),
2200 &v);
b8fb5ab1
MB
2201 if (ret != 0)
2202 goto out;
2203
d939fb9a 2204 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2205 }
2206 }
b83a313b 2207
b8fb5ab1 2208 out:
0d4529c5 2209 map->unlock(map->lock_arg);
b83a313b
MB
2210
2211 return ret;
2212}
2213EXPORT_SYMBOL_GPL(regmap_raw_read);
2214
67252287
SK
2215/**
2216 * regmap_field_read(): Read a value to a single register field
2217 *
2218 * @field: Register field to read from
2219 * @val: Pointer to store read value
2220 *
2221 * A value of zero will be returned on success, a negative errno will
2222 * be returned in error cases.
2223 */
2224int regmap_field_read(struct regmap_field *field, unsigned int *val)
2225{
2226 int ret;
2227 unsigned int reg_val;
2228 ret = regmap_read(field->regmap, field->reg, &reg_val);
2229 if (ret != 0)
2230 return ret;
2231
2232 reg_val &= field->mask;
2233 reg_val >>= field->shift;
2234 *val = reg_val;
2235
2236 return ret;
2237}
2238EXPORT_SYMBOL_GPL(regmap_field_read);
2239
a0102375
KM
2240/**
2241 * regmap_fields_read(): Read a value to a single register field with port ID
2242 *
2243 * @field: Register field to read from
2244 * @id: port ID
2245 * @val: Pointer to store read value
2246 *
2247 * A value of zero will be returned on success, a negative errno will
2248 * be returned in error cases.
2249 */
2250int regmap_fields_read(struct regmap_field *field, unsigned int id,
2251 unsigned int *val)
2252{
2253 int ret;
2254 unsigned int reg_val;
2255
2256 if (id >= field->id_size)
2257 return -EINVAL;
2258
2259 ret = regmap_read(field->regmap,
2260 field->reg + (field->id_offset * id),
2261 &reg_val);
2262 if (ret != 0)
2263 return ret;
2264
2265 reg_val &= field->mask;
2266 reg_val >>= field->shift;
2267 *val = reg_val;
2268
2269 return ret;
2270}
2271EXPORT_SYMBOL_GPL(regmap_fields_read);
2272
b83a313b
MB
2273/**
2274 * regmap_bulk_read(): Read multiple registers from the device
2275 *
0093380c 2276 * @map: Register map to read from
b83a313b
MB
2277 * @reg: First register to be read from
2278 * @val: Pointer to store read value, in native register size for device
2279 * @val_count: Number of registers to read
2280 *
2281 * A value of zero will be returned on success, a negative errno will
2282 * be returned in error cases.
2283 */
2284int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2285 size_t val_count)
2286{
2287 int ret, i;
2288 size_t val_bytes = map->format.val_bytes;
82cd9965 2289 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2290
f01ee60f
SW
2291 if (reg % map->reg_stride)
2292 return -EINVAL;
b83a313b 2293
3b58ee13 2294 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2295 /*
2296 * Some devices does not support bulk read, for
2297 * them we have a series of single read operations.
2298 */
2299 if (map->use_single_rw) {
2300 for (i = 0; i < val_count; i++) {
2301 ret = regmap_raw_read(map,
2302 reg + (i * map->reg_stride),
2303 val + (i * val_bytes),
2304 val_bytes);
2305 if (ret != 0)
2306 return ret;
2307 }
2308 } else {
2309 ret = regmap_raw_read(map, reg, val,
2310 val_bytes * val_count);
2311 if (ret != 0)
2312 return ret;
2313 }
de2d808f
MB
2314
2315 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2316 map->format.parse_inplace(val + i);
de2d808f
MB
2317 } else {
2318 for (i = 0; i < val_count; i++) {
6560ffd1 2319 unsigned int ival;
f01ee60f 2320 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2321 &ival);
de2d808f
MB
2322 if (ret != 0)
2323 return ret;
6560ffd1 2324 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
2325 }
2326 }
b83a313b
MB
2327
2328 return 0;
2329}
2330EXPORT_SYMBOL_GPL(regmap_bulk_read);
2331
018690d3
MB
2332static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2333 unsigned int mask, unsigned int val,
2334 bool *change)
b83a313b
MB
2335{
2336 int ret;
d91e8db2 2337 unsigned int tmp, orig;
b83a313b 2338
d91e8db2 2339 ret = _regmap_read(map, reg, &orig);
b83a313b 2340 if (ret != 0)
fc3ebd78 2341 return ret;
b83a313b 2342
d91e8db2 2343 tmp = orig & ~mask;
b83a313b
MB
2344 tmp |= val & mask;
2345
018690d3 2346 if (tmp != orig) {
d91e8db2 2347 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2348 if (change)
2349 *change = true;
018690d3 2350 } else {
e2f74dc6
XL
2351 if (change)
2352 *change = false;
018690d3 2353 }
b83a313b 2354
b83a313b
MB
2355 return ret;
2356}
018690d3
MB
2357
2358/**
2359 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2360 *
2361 * @map: Register map to update
2362 * @reg: Register to update
2363 * @mask: Bitmask to change
2364 * @val: New value for bitmask
2365 *
2366 * Returns zero for success, a negative number on error.
2367 */
2368int regmap_update_bits(struct regmap *map, unsigned int reg,
2369 unsigned int mask, unsigned int val)
2370{
fc3ebd78
KG
2371 int ret;
2372
0d4529c5 2373 map->lock(map->lock_arg);
e2f74dc6 2374 ret = _regmap_update_bits(map, reg, mask, val, NULL);
0d4529c5 2375 map->unlock(map->lock_arg);
fc3ebd78
KG
2376
2377 return ret;
018690d3 2378}
b83a313b 2379EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2380
915f441b
MB
2381/**
2382 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2383 * map asynchronously
2384 *
2385 * @map: Register map to update
2386 * @reg: Register to update
2387 * @mask: Bitmask to change
2388 * @val: New value for bitmask
2389 *
2390 * With most buses the read must be done synchronously so this is most
2391 * useful for devices with a cache which do not need to interact with
2392 * the hardware to determine the current register value.
2393 *
2394 * Returns zero for success, a negative number on error.
2395 */
2396int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2397 unsigned int mask, unsigned int val)
2398{
915f441b
MB
2399 int ret;
2400
2401 map->lock(map->lock_arg);
2402
2403 map->async = true;
2404
e2f74dc6 2405 ret = _regmap_update_bits(map, reg, mask, val, NULL);
915f441b
MB
2406
2407 map->async = false;
2408
2409 map->unlock(map->lock_arg);
2410
2411 return ret;
2412}
2413EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2414
018690d3
MB
2415/**
2416 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2417 * register map and report if updated
2418 *
2419 * @map: Register map to update
2420 * @reg: Register to update
2421 * @mask: Bitmask to change
2422 * @val: New value for bitmask
2423 * @change: Boolean indicating if a write was done
2424 *
2425 * Returns zero for success, a negative number on error.
2426 */
2427int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2428 unsigned int mask, unsigned int val,
2429 bool *change)
2430{
fc3ebd78
KG
2431 int ret;
2432
0d4529c5 2433 map->lock(map->lock_arg);
fc3ebd78 2434 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2435 map->unlock(map->lock_arg);
fc3ebd78 2436 return ret;
018690d3
MB
2437}
2438EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2439
915f441b
MB
2440/**
2441 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2442 * register map asynchronously and report if
2443 * updated
2444 *
2445 * @map: Register map to update
2446 * @reg: Register to update
2447 * @mask: Bitmask to change
2448 * @val: New value for bitmask
2449 * @change: Boolean indicating if a write was done
2450 *
2451 * With most buses the read must be done synchronously so this is most
2452 * useful for devices with a cache which do not need to interact with
2453 * the hardware to determine the current register value.
2454 *
2455 * Returns zero for success, a negative number on error.
2456 */
2457int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2458 unsigned int mask, unsigned int val,
2459 bool *change)
2460{
2461 int ret;
2462
2463 map->lock(map->lock_arg);
2464
2465 map->async = true;
2466
2467 ret = _regmap_update_bits(map, reg, mask, val, change);
2468
2469 map->async = false;
2470
2471 map->unlock(map->lock_arg);
2472
2473 return ret;
2474}
2475EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2476
0d509f2b
MB
2477void regmap_async_complete_cb(struct regmap_async *async, int ret)
2478{
2479 struct regmap *map = async->map;
2480 bool wake;
2481
fe7d4ccd
MB
2482 trace_regmap_async_io_complete(map->dev);
2483
0d509f2b 2484 spin_lock(&map->async_lock);
7e09a979 2485 list_move(&async->list, &map->async_free);
0d509f2b
MB
2486 wake = list_empty(&map->async_list);
2487
2488 if (ret != 0)
2489 map->async_ret = ret;
2490
2491 spin_unlock(&map->async_lock);
2492
0d509f2b
MB
2493 if (wake)
2494 wake_up(&map->async_waitq);
2495}
f804fb56 2496EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2497
2498static int regmap_async_is_done(struct regmap *map)
2499{
2500 unsigned long flags;
2501 int ret;
2502
2503 spin_lock_irqsave(&map->async_lock, flags);
2504 ret = list_empty(&map->async_list);
2505 spin_unlock_irqrestore(&map->async_lock, flags);
2506
2507 return ret;
2508}
2509
2510/**
2511 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2512 *
2513 * @map: Map to operate on.
2514 *
2515 * Blocks until any pending asynchronous I/O has completed. Returns
2516 * an error code for any failed I/O operations.
2517 */
2518int regmap_async_complete(struct regmap *map)
2519{
2520 unsigned long flags;
2521 int ret;
2522
2523 /* Nothing to do with no async support */
f2e055e7 2524 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
2525 return 0;
2526
fe7d4ccd
MB
2527 trace_regmap_async_complete_start(map->dev);
2528
0d509f2b
MB
2529 wait_event(map->async_waitq, regmap_async_is_done(map));
2530
2531 spin_lock_irqsave(&map->async_lock, flags);
2532 ret = map->async_ret;
2533 map->async_ret = 0;
2534 spin_unlock_irqrestore(&map->async_lock, flags);
2535
fe7d4ccd
MB
2536 trace_regmap_async_complete_done(map->dev);
2537
0d509f2b
MB
2538 return ret;
2539}
f88948ef 2540EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2541
22f0d90a
MB
2542/**
2543 * regmap_register_patch: Register and apply register updates to be applied
2544 * on device initialistion
2545 *
2546 * @map: Register map to apply updates to.
2547 * @regs: Values to update.
2548 * @num_regs: Number of entries in regs.
2549 *
2550 * Register a set of register updates to be applied to the device
2551 * whenever the device registers are synchronised with the cache and
2552 * apply them immediately. Typically this is used to apply
2553 * corrections to be applied to the device defaults on startup, such
2554 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB
2555 *
2556 * The caller must ensure that this function cannot be called
2557 * concurrently with either itself or regcache_sync().
22f0d90a
MB
2558 */
2559int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2560 int num_regs)
2561{
aab13ebc 2562 struct reg_default *p;
6bf13103 2563 int ret;
22f0d90a
MB
2564 bool bypass;
2565
bd60e381
CZ
2566 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2567 num_regs))
2568 return 0;
2569
aab13ebc
MB
2570 p = krealloc(map->patch,
2571 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2572 GFP_KERNEL);
2573 if (p) {
2574 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2575 map->patch = p;
2576 map->patch_regs += num_regs;
22f0d90a 2577 } else {
56fb1c74 2578 return -ENOMEM;
22f0d90a
MB
2579 }
2580
0d4529c5 2581 map->lock(map->lock_arg);
22f0d90a
MB
2582
2583 bypass = map->cache_bypass;
2584
2585 map->cache_bypass = true;
1a25f261 2586 map->async = true;
22f0d90a 2587
6bf13103
CK
2588 ret = _regmap_multi_reg_write(map, regs, num_regs);
2589 if (ret != 0)
2590 goto out;
22f0d90a 2591
22f0d90a 2592out:
1a25f261 2593 map->async = false;
22f0d90a
MB
2594 map->cache_bypass = bypass;
2595
0d4529c5 2596 map->unlock(map->lock_arg);
22f0d90a 2597
1a25f261
MB
2598 regmap_async_complete(map);
2599
22f0d90a
MB
2600 return ret;
2601}
2602EXPORT_SYMBOL_GPL(regmap_register_patch);
2603
eae4b51b 2604/*
a6539c32
MB
2605 * regmap_get_val_bytes(): Report the size of a register value
2606 *
2607 * Report the size of a register value, mainly intended to for use by
2608 * generic infrastructure built on top of regmap.
2609 */
2610int regmap_get_val_bytes(struct regmap *map)
2611{
2612 if (map->format.format_write)
2613 return -EINVAL;
2614
2615 return map->format.val_bytes;
2616}
2617EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2618
13ff50c8
NC
2619int regmap_parse_val(struct regmap *map, const void *buf,
2620 unsigned int *val)
2621{
2622 if (!map->format.parse_val)
2623 return -EINVAL;
2624
2625 *val = map->format.parse_val(buf);
2626
2627 return 0;
2628}
2629EXPORT_SYMBOL_GPL(regmap_parse_val);
2630
31244e39
MB
2631static int __init regmap_initcall(void)
2632{
2633 regmap_debugfs_initcall();
2634
2635 return 0;
2636}
2637postcore_initcall(regmap_initcall);
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