Commit | Line | Data |
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b83a313b MB |
1 | /* |
2 | * Register map access API | |
3 | * | |
4 | * Copyright 2011 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
f5d6eba7 | 13 | #include <linux/device.h> |
b83a313b | 14 | #include <linux/slab.h> |
19694b5e | 15 | #include <linux/export.h> |
b83a313b MB |
16 | #include <linux/mutex.h> |
17 | #include <linux/err.h> | |
d647c199 | 18 | #include <linux/of.h> |
6863ca62 | 19 | #include <linux/rbtree.h> |
30b2a553 | 20 | #include <linux/sched.h> |
b83a313b | 21 | |
fb2736bb MB |
22 | #define CREATE_TRACE_POINTS |
23 | #include <trace/events/regmap.h> | |
24 | ||
93de9124 | 25 | #include "internal.h" |
b83a313b | 26 | |
1044c180 MB |
27 | /* |
28 | * Sometimes for failures during very early init the trace | |
29 | * infrastructure isn't available early enough to be used. For this | |
30 | * sort of problem defining LOG_DEVICE will add printks for basic | |
31 | * register I/O on a specific device. | |
32 | */ | |
33 | #undef LOG_DEVICE | |
34 | ||
35 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, | |
36 | unsigned int mask, unsigned int val, | |
37 | bool *change); | |
38 | ||
3ac17037 BB |
39 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
40 | unsigned int *val); | |
ad278406 AS |
41 | static int _regmap_bus_read(void *context, unsigned int reg, |
42 | unsigned int *val); | |
07c320dc AS |
43 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
44 | unsigned int val); | |
3ac17037 BB |
45 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
46 | unsigned int val); | |
07c320dc AS |
47 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
48 | unsigned int val); | |
ad278406 | 49 | |
76aad392 DC |
50 | bool regmap_reg_in_ranges(unsigned int reg, |
51 | const struct regmap_range *ranges, | |
52 | unsigned int nranges) | |
53 | { | |
54 | const struct regmap_range *r; | |
55 | int i; | |
56 | ||
57 | for (i = 0, r = ranges; i < nranges; i++, r++) | |
58 | if (regmap_reg_in_range(reg, r)) | |
59 | return true; | |
60 | return false; | |
61 | } | |
62 | EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); | |
63 | ||
154881e5 MB |
64 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
65 | const struct regmap_access_table *table) | |
76aad392 DC |
66 | { |
67 | /* Check "no ranges" first */ | |
68 | if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) | |
69 | return false; | |
70 | ||
71 | /* In case zero "yes ranges" are supplied, any reg is OK */ | |
72 | if (!table->n_yes_ranges) | |
73 | return true; | |
74 | ||
75 | return regmap_reg_in_ranges(reg, table->yes_ranges, | |
76 | table->n_yes_ranges); | |
77 | } | |
154881e5 | 78 | EXPORT_SYMBOL_GPL(regmap_check_range_table); |
76aad392 | 79 | |
8de2f081 MB |
80 | bool regmap_writeable(struct regmap *map, unsigned int reg) |
81 | { | |
82 | if (map->max_register && reg > map->max_register) | |
83 | return false; | |
84 | ||
85 | if (map->writeable_reg) | |
86 | return map->writeable_reg(map->dev, reg); | |
87 | ||
76aad392 | 88 | if (map->wr_table) |
154881e5 | 89 | return regmap_check_range_table(map, reg, map->wr_table); |
76aad392 | 90 | |
8de2f081 MB |
91 | return true; |
92 | } | |
93 | ||
94 | bool regmap_readable(struct regmap *map, unsigned int reg) | |
95 | { | |
96 | if (map->max_register && reg > map->max_register) | |
97 | return false; | |
98 | ||
4191f197 WS |
99 | if (map->format.format_write) |
100 | return false; | |
101 | ||
8de2f081 MB |
102 | if (map->readable_reg) |
103 | return map->readable_reg(map->dev, reg); | |
104 | ||
76aad392 | 105 | if (map->rd_table) |
154881e5 | 106 | return regmap_check_range_table(map, reg, map->rd_table); |
76aad392 | 107 | |
8de2f081 MB |
108 | return true; |
109 | } | |
110 | ||
111 | bool regmap_volatile(struct regmap *map, unsigned int reg) | |
112 | { | |
4191f197 | 113 | if (!regmap_readable(map, reg)) |
8de2f081 MB |
114 | return false; |
115 | ||
116 | if (map->volatile_reg) | |
117 | return map->volatile_reg(map->dev, reg); | |
118 | ||
76aad392 | 119 | if (map->volatile_table) |
154881e5 | 120 | return regmap_check_range_table(map, reg, map->volatile_table); |
76aad392 | 121 | |
b92be6fe MB |
122 | if (map->cache_ops) |
123 | return false; | |
124 | else | |
125 | return true; | |
8de2f081 MB |
126 | } |
127 | ||
128 | bool regmap_precious(struct regmap *map, unsigned int reg) | |
129 | { | |
4191f197 | 130 | if (!regmap_readable(map, reg)) |
8de2f081 MB |
131 | return false; |
132 | ||
133 | if (map->precious_reg) | |
134 | return map->precious_reg(map->dev, reg); | |
135 | ||
76aad392 | 136 | if (map->precious_table) |
154881e5 | 137 | return regmap_check_range_table(map, reg, map->precious_table); |
76aad392 | 138 | |
8de2f081 MB |
139 | return false; |
140 | } | |
141 | ||
82cd9965 | 142 | static bool regmap_volatile_range(struct regmap *map, unsigned int reg, |
a8f28cfa | 143 | size_t num) |
82cd9965 LPC |
144 | { |
145 | unsigned int i; | |
146 | ||
147 | for (i = 0; i < num; i++) | |
148 | if (!regmap_volatile(map, reg + i)) | |
149 | return false; | |
150 | ||
151 | return true; | |
152 | } | |
153 | ||
9aa50750 WS |
154 | static void regmap_format_2_6_write(struct regmap *map, |
155 | unsigned int reg, unsigned int val) | |
156 | { | |
157 | u8 *out = map->work_buf; | |
158 | ||
159 | *out = (reg << 6) | val; | |
160 | } | |
161 | ||
b83a313b MB |
162 | static void regmap_format_4_12_write(struct regmap *map, |
163 | unsigned int reg, unsigned int val) | |
164 | { | |
165 | __be16 *out = map->work_buf; | |
166 | *out = cpu_to_be16((reg << 12) | val); | |
167 | } | |
168 | ||
169 | static void regmap_format_7_9_write(struct regmap *map, | |
170 | unsigned int reg, unsigned int val) | |
171 | { | |
172 | __be16 *out = map->work_buf; | |
173 | *out = cpu_to_be16((reg << 9) | val); | |
174 | } | |
175 | ||
7e5ec63e LPC |
176 | static void regmap_format_10_14_write(struct regmap *map, |
177 | unsigned int reg, unsigned int val) | |
178 | { | |
179 | u8 *out = map->work_buf; | |
180 | ||
181 | out[2] = val; | |
182 | out[1] = (val >> 8) | (reg << 6); | |
183 | out[0] = reg >> 2; | |
184 | } | |
185 | ||
d939fb9a | 186 | static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) |
b83a313b MB |
187 | { |
188 | u8 *b = buf; | |
189 | ||
d939fb9a | 190 | b[0] = val << shift; |
b83a313b MB |
191 | } |
192 | ||
141eba2e | 193 | static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) |
b83a313b MB |
194 | { |
195 | __be16 *b = buf; | |
196 | ||
d939fb9a | 197 | b[0] = cpu_to_be16(val << shift); |
b83a313b MB |
198 | } |
199 | ||
4aa8c069 XL |
200 | static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) |
201 | { | |
202 | __le16 *b = buf; | |
203 | ||
204 | b[0] = cpu_to_le16(val << shift); | |
205 | } | |
206 | ||
141eba2e SW |
207 | static void regmap_format_16_native(void *buf, unsigned int val, |
208 | unsigned int shift) | |
209 | { | |
210 | *(u16 *)buf = val << shift; | |
211 | } | |
212 | ||
d939fb9a | 213 | static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) |
ea279fc5 MR |
214 | { |
215 | u8 *b = buf; | |
216 | ||
d939fb9a MR |
217 | val <<= shift; |
218 | ||
ea279fc5 MR |
219 | b[0] = val >> 16; |
220 | b[1] = val >> 8; | |
221 | b[2] = val; | |
222 | } | |
223 | ||
141eba2e | 224 | static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) |
7d5e525b MB |
225 | { |
226 | __be32 *b = buf; | |
227 | ||
d939fb9a | 228 | b[0] = cpu_to_be32(val << shift); |
7d5e525b MB |
229 | } |
230 | ||
4aa8c069 XL |
231 | static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) |
232 | { | |
233 | __le32 *b = buf; | |
234 | ||
235 | b[0] = cpu_to_le32(val << shift); | |
236 | } | |
237 | ||
141eba2e SW |
238 | static void regmap_format_32_native(void *buf, unsigned int val, |
239 | unsigned int shift) | |
240 | { | |
241 | *(u32 *)buf = val << shift; | |
242 | } | |
243 | ||
8a819ff8 | 244 | static void regmap_parse_inplace_noop(void *buf) |
b83a313b | 245 | { |
8a819ff8 MB |
246 | } |
247 | ||
248 | static unsigned int regmap_parse_8(const void *buf) | |
249 | { | |
250 | const u8 *b = buf; | |
b83a313b MB |
251 | |
252 | return b[0]; | |
253 | } | |
254 | ||
8a819ff8 MB |
255 | static unsigned int regmap_parse_16_be(const void *buf) |
256 | { | |
257 | const __be16 *b = buf; | |
258 | ||
259 | return be16_to_cpu(b[0]); | |
260 | } | |
261 | ||
4aa8c069 XL |
262 | static unsigned int regmap_parse_16_le(const void *buf) |
263 | { | |
264 | const __le16 *b = buf; | |
265 | ||
266 | return le16_to_cpu(b[0]); | |
267 | } | |
268 | ||
8a819ff8 | 269 | static void regmap_parse_16_be_inplace(void *buf) |
b83a313b MB |
270 | { |
271 | __be16 *b = buf; | |
272 | ||
273 | b[0] = be16_to_cpu(b[0]); | |
b83a313b MB |
274 | } |
275 | ||
4aa8c069 XL |
276 | static void regmap_parse_16_le_inplace(void *buf) |
277 | { | |
278 | __le16 *b = buf; | |
279 | ||
280 | b[0] = le16_to_cpu(b[0]); | |
281 | } | |
282 | ||
8a819ff8 | 283 | static unsigned int regmap_parse_16_native(const void *buf) |
141eba2e SW |
284 | { |
285 | return *(u16 *)buf; | |
286 | } | |
287 | ||
8a819ff8 | 288 | static unsigned int regmap_parse_24(const void *buf) |
ea279fc5 | 289 | { |
8a819ff8 | 290 | const u8 *b = buf; |
ea279fc5 MR |
291 | unsigned int ret = b[2]; |
292 | ret |= ((unsigned int)b[1]) << 8; | |
293 | ret |= ((unsigned int)b[0]) << 16; | |
294 | ||
295 | return ret; | |
296 | } | |
297 | ||
8a819ff8 MB |
298 | static unsigned int regmap_parse_32_be(const void *buf) |
299 | { | |
300 | const __be32 *b = buf; | |
301 | ||
302 | return be32_to_cpu(b[0]); | |
303 | } | |
304 | ||
4aa8c069 XL |
305 | static unsigned int regmap_parse_32_le(const void *buf) |
306 | { | |
307 | const __le32 *b = buf; | |
308 | ||
309 | return le32_to_cpu(b[0]); | |
310 | } | |
311 | ||
8a819ff8 | 312 | static void regmap_parse_32_be_inplace(void *buf) |
7d5e525b MB |
313 | { |
314 | __be32 *b = buf; | |
315 | ||
316 | b[0] = be32_to_cpu(b[0]); | |
7d5e525b MB |
317 | } |
318 | ||
4aa8c069 XL |
319 | static void regmap_parse_32_le_inplace(void *buf) |
320 | { | |
321 | __le32 *b = buf; | |
322 | ||
323 | b[0] = le32_to_cpu(b[0]); | |
324 | } | |
325 | ||
8a819ff8 | 326 | static unsigned int regmap_parse_32_native(const void *buf) |
141eba2e SW |
327 | { |
328 | return *(u32 *)buf; | |
329 | } | |
330 | ||
0d4529c5 | 331 | static void regmap_lock_mutex(void *__map) |
bacdbe07 | 332 | { |
0d4529c5 | 333 | struct regmap *map = __map; |
bacdbe07 SW |
334 | mutex_lock(&map->mutex); |
335 | } | |
336 | ||
0d4529c5 | 337 | static void regmap_unlock_mutex(void *__map) |
bacdbe07 | 338 | { |
0d4529c5 | 339 | struct regmap *map = __map; |
bacdbe07 SW |
340 | mutex_unlock(&map->mutex); |
341 | } | |
342 | ||
0d4529c5 | 343 | static void regmap_lock_spinlock(void *__map) |
b4519c71 | 344 | __acquires(&map->spinlock) |
bacdbe07 | 345 | { |
0d4529c5 | 346 | struct regmap *map = __map; |
92ab1aab LPC |
347 | unsigned long flags; |
348 | ||
349 | spin_lock_irqsave(&map->spinlock, flags); | |
350 | map->spinlock_flags = flags; | |
bacdbe07 SW |
351 | } |
352 | ||
0d4529c5 | 353 | static void regmap_unlock_spinlock(void *__map) |
b4519c71 | 354 | __releases(&map->spinlock) |
bacdbe07 | 355 | { |
0d4529c5 | 356 | struct regmap *map = __map; |
92ab1aab | 357 | spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); |
bacdbe07 SW |
358 | } |
359 | ||
72b39f6f MB |
360 | static void dev_get_regmap_release(struct device *dev, void *res) |
361 | { | |
362 | /* | |
363 | * We don't actually have anything to do here; the goal here | |
364 | * is not to manage the regmap but to provide a simple way to | |
365 | * get the regmap back given a struct device. | |
366 | */ | |
367 | } | |
368 | ||
6863ca62 KG |
369 | static bool _regmap_range_add(struct regmap *map, |
370 | struct regmap_range_node *data) | |
371 | { | |
372 | struct rb_root *root = &map->range_tree; | |
373 | struct rb_node **new = &(root->rb_node), *parent = NULL; | |
374 | ||
375 | while (*new) { | |
376 | struct regmap_range_node *this = | |
377 | container_of(*new, struct regmap_range_node, node); | |
378 | ||
379 | parent = *new; | |
380 | if (data->range_max < this->range_min) | |
381 | new = &((*new)->rb_left); | |
382 | else if (data->range_min > this->range_max) | |
383 | new = &((*new)->rb_right); | |
384 | else | |
385 | return false; | |
386 | } | |
387 | ||
388 | rb_link_node(&data->node, parent, new); | |
389 | rb_insert_color(&data->node, root); | |
390 | ||
391 | return true; | |
392 | } | |
393 | ||
394 | static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, | |
395 | unsigned int reg) | |
396 | { | |
397 | struct rb_node *node = map->range_tree.rb_node; | |
398 | ||
399 | while (node) { | |
400 | struct regmap_range_node *this = | |
401 | container_of(node, struct regmap_range_node, node); | |
402 | ||
403 | if (reg < this->range_min) | |
404 | node = node->rb_left; | |
405 | else if (reg > this->range_max) | |
406 | node = node->rb_right; | |
407 | else | |
408 | return this; | |
409 | } | |
410 | ||
411 | return NULL; | |
412 | } | |
413 | ||
414 | static void regmap_range_exit(struct regmap *map) | |
415 | { | |
416 | struct rb_node *next; | |
417 | struct regmap_range_node *range_node; | |
418 | ||
419 | next = rb_first(&map->range_tree); | |
420 | while (next) { | |
421 | range_node = rb_entry(next, struct regmap_range_node, node); | |
422 | next = rb_next(&range_node->node); | |
423 | rb_erase(&range_node->node, &map->range_tree); | |
424 | kfree(range_node); | |
425 | } | |
426 | ||
427 | kfree(map->selector_work_buf); | |
428 | } | |
429 | ||
6cfec04b MS |
430 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
431 | const struct regmap_config *config) | |
432 | { | |
433 | struct regmap **m; | |
434 | ||
435 | map->dev = dev; | |
436 | ||
437 | regmap_debugfs_init(map, config->name); | |
438 | ||
439 | /* Add a devres resource for dev_get_regmap() */ | |
440 | m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); | |
441 | if (!m) { | |
442 | regmap_debugfs_exit(map); | |
443 | return -ENOMEM; | |
444 | } | |
445 | *m = map; | |
446 | devres_add(dev, m); | |
447 | ||
448 | return 0; | |
449 | } | |
450 | EXPORT_SYMBOL_GPL(regmap_attach_dev); | |
451 | ||
d647c199 XL |
452 | enum regmap_endian_type { |
453 | REGMAP_ENDIAN_REG, | |
454 | REGMAP_ENDIAN_VAL, | |
455 | }; | |
456 | ||
457 | static int of_regmap_get_endian(struct device *dev, | |
458 | const struct regmap_bus *bus, | |
459 | const struct regmap_config *config, | |
460 | enum regmap_endian_type type, | |
461 | enum regmap_endian *endian) | |
462 | { | |
463 | struct device_node *np = dev->of_node; | |
464 | ||
465 | if (!endian || !config) | |
466 | return -EINVAL; | |
467 | ||
468 | /* | |
469 | * Firstly, try to parse the endianness from driver's config, | |
470 | * this is to be compatible with the none DT or the old drivers. | |
471 | * From the driver's config the endianness value maybe: | |
472 | * REGMAP_ENDIAN_BIG, | |
473 | * REGMAP_ENDIAN_LITTLE, | |
474 | * REGMAP_ENDIAN_NATIVE, | |
475 | * REGMAP_ENDIAN_DEFAULT. | |
476 | */ | |
477 | switch (type) { | |
478 | case REGMAP_ENDIAN_REG: | |
479 | *endian = config->reg_format_endian; | |
480 | break; | |
481 | case REGMAP_ENDIAN_VAL: | |
482 | *endian = config->val_format_endian; | |
483 | break; | |
484 | default: | |
485 | return -EINVAL; | |
486 | } | |
487 | ||
488 | /* | |
489 | * If the endianness parsed from driver config is | |
490 | * REGMAP_ENDIAN_DEFAULT, that means maybe we are using the DT | |
491 | * node to specify the endianness information. | |
492 | */ | |
493 | if (*endian != REGMAP_ENDIAN_DEFAULT) | |
494 | return 0; | |
495 | ||
496 | /* | |
497 | * Secondly, try to parse the endianness from DT node if the | |
498 | * driver config does not specify it. | |
499 | * From the DT node the endianness value maybe: | |
500 | * REGMAP_ENDIAN_BIG, | |
501 | * REGMAP_ENDIAN_LITTLE, | |
d647c199 XL |
502 | */ |
503 | switch (type) { | |
504 | case REGMAP_ENDIAN_VAL: | |
505 | if (of_property_read_bool(np, "big-endian")) | |
506 | *endian = REGMAP_ENDIAN_BIG; | |
507 | else if (of_property_read_bool(np, "little-endian")) | |
508 | *endian = REGMAP_ENDIAN_LITTLE; | |
ba1b53fe JMC |
509 | |
510 | if (*endian != REGMAP_ENDIAN_DEFAULT) | |
511 | return 0; | |
512 | ||
d647c199 XL |
513 | break; |
514 | case REGMAP_ENDIAN_REG: | |
515 | break; | |
516 | default: | |
517 | return -EINVAL; | |
518 | } | |
519 | ||
d647c199 XL |
520 | /* |
521 | * Finally, try to parse the endianness from regmap bus config | |
522 | * if in device's DT node the endianness property is absent. | |
523 | */ | |
524 | switch (type) { | |
525 | case REGMAP_ENDIAN_REG: | |
526 | if (bus && bus->reg_format_endian_default) | |
527 | *endian = bus->reg_format_endian_default; | |
528 | break; | |
529 | case REGMAP_ENDIAN_VAL: | |
530 | if (bus && bus->val_format_endian_default) | |
531 | *endian = bus->val_format_endian_default; | |
532 | break; | |
533 | default: | |
534 | return -EINVAL; | |
535 | } | |
536 | ||
537 | return 0; | |
538 | } | |
539 | ||
b83a313b MB |
540 | /** |
541 | * regmap_init(): Initialise register map | |
542 | * | |
543 | * @dev: Device that will be interacted with | |
544 | * @bus: Bus-specific callbacks to use with device | |
0135bbcc | 545 | * @bus_context: Data passed to bus-specific callbacks |
b83a313b MB |
546 | * @config: Configuration for register map |
547 | * | |
548 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
549 | * a struct regmap. This function should generally not be called | |
550 | * directly, it should be called by bus-specific init functions. | |
551 | */ | |
552 | struct regmap *regmap_init(struct device *dev, | |
553 | const struct regmap_bus *bus, | |
0135bbcc | 554 | void *bus_context, |
b83a313b MB |
555 | const struct regmap_config *config) |
556 | { | |
6cfec04b | 557 | struct regmap *map; |
b83a313b | 558 | int ret = -EINVAL; |
141eba2e | 559 | enum regmap_endian reg_endian, val_endian; |
6863ca62 | 560 | int i, j; |
b83a313b | 561 | |
d2a5884a | 562 | if (!config) |
abbb18fb | 563 | goto err; |
b83a313b MB |
564 | |
565 | map = kzalloc(sizeof(*map), GFP_KERNEL); | |
566 | if (map == NULL) { | |
567 | ret = -ENOMEM; | |
568 | goto err; | |
569 | } | |
570 | ||
0d4529c5 DC |
571 | if (config->lock && config->unlock) { |
572 | map->lock = config->lock; | |
573 | map->unlock = config->unlock; | |
574 | map->lock_arg = config->lock_arg; | |
bacdbe07 | 575 | } else { |
d2a5884a AS |
576 | if ((bus && bus->fast_io) || |
577 | config->fast_io) { | |
0d4529c5 DC |
578 | spin_lock_init(&map->spinlock); |
579 | map->lock = regmap_lock_spinlock; | |
580 | map->unlock = regmap_unlock_spinlock; | |
581 | } else { | |
582 | mutex_init(&map->mutex); | |
583 | map->lock = regmap_lock_mutex; | |
584 | map->unlock = regmap_unlock_mutex; | |
585 | } | |
586 | map->lock_arg = map; | |
bacdbe07 | 587 | } |
c212accc | 588 | map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); |
82159ba8 | 589 | map->format.pad_bytes = config->pad_bits / 8; |
c212accc | 590 | map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); |
5494a98f FE |
591 | map->format.buf_size = DIV_ROUND_UP(config->reg_bits + |
592 | config->val_bits + config->pad_bits, 8); | |
d939fb9a | 593 | map->reg_shift = config->pad_bits % 8; |
f01ee60f SW |
594 | if (config->reg_stride) |
595 | map->reg_stride = config->reg_stride; | |
596 | else | |
597 | map->reg_stride = 1; | |
2e33caf1 | 598 | map->use_single_rw = config->use_single_rw; |
e894c3f4 | 599 | map->can_multi_write = config->can_multi_write; |
b83a313b MB |
600 | map->dev = dev; |
601 | map->bus = bus; | |
0135bbcc | 602 | map->bus_context = bus_context; |
2e2ae66d | 603 | map->max_register = config->max_register; |
76aad392 DC |
604 | map->wr_table = config->wr_table; |
605 | map->rd_table = config->rd_table; | |
606 | map->volatile_table = config->volatile_table; | |
607 | map->precious_table = config->precious_table; | |
2e2ae66d MB |
608 | map->writeable_reg = config->writeable_reg; |
609 | map->readable_reg = config->readable_reg; | |
610 | map->volatile_reg = config->volatile_reg; | |
2efe1642 | 611 | map->precious_reg = config->precious_reg; |
5d1729e7 | 612 | map->cache_type = config->cache_type; |
72b39f6f | 613 | map->name = config->name; |
b83a313b | 614 | |
0d509f2b MB |
615 | spin_lock_init(&map->async_lock); |
616 | INIT_LIST_HEAD(&map->async_list); | |
7e09a979 | 617 | INIT_LIST_HEAD(&map->async_free); |
0d509f2b MB |
618 | init_waitqueue_head(&map->async_waitq); |
619 | ||
6f306441 LPC |
620 | if (config->read_flag_mask || config->write_flag_mask) { |
621 | map->read_flag_mask = config->read_flag_mask; | |
622 | map->write_flag_mask = config->write_flag_mask; | |
d2a5884a | 623 | } else if (bus) { |
6f306441 LPC |
624 | map->read_flag_mask = bus->read_flag_mask; |
625 | } | |
626 | ||
d2a5884a AS |
627 | if (!bus) { |
628 | map->reg_read = config->reg_read; | |
629 | map->reg_write = config->reg_write; | |
630 | ||
3ac17037 BB |
631 | map->defer_caching = false; |
632 | goto skip_format_initialization; | |
633 | } else if (!bus->read || !bus->write) { | |
634 | map->reg_read = _regmap_bus_reg_read; | |
635 | map->reg_write = _regmap_bus_reg_write; | |
636 | ||
d2a5884a AS |
637 | map->defer_caching = false; |
638 | goto skip_format_initialization; | |
639 | } else { | |
640 | map->reg_read = _regmap_bus_read; | |
641 | } | |
ad278406 | 642 | |
d647c199 XL |
643 | ret = of_regmap_get_endian(dev, bus, config, REGMAP_ENDIAN_REG, |
644 | ®_endian); | |
645 | if (ret) | |
646 | return ERR_PTR(ret); | |
647 | ||
648 | ret = of_regmap_get_endian(dev, bus, config, REGMAP_ENDIAN_VAL, | |
649 | &val_endian); | |
650 | if (ret) | |
651 | return ERR_PTR(ret); | |
141eba2e | 652 | |
d939fb9a | 653 | switch (config->reg_bits + map->reg_shift) { |
9aa50750 WS |
654 | case 2: |
655 | switch (config->val_bits) { | |
656 | case 6: | |
657 | map->format.format_write = regmap_format_2_6_write; | |
658 | break; | |
659 | default: | |
660 | goto err_map; | |
661 | } | |
662 | break; | |
663 | ||
b83a313b MB |
664 | case 4: |
665 | switch (config->val_bits) { | |
666 | case 12: | |
667 | map->format.format_write = regmap_format_4_12_write; | |
668 | break; | |
669 | default: | |
670 | goto err_map; | |
671 | } | |
672 | break; | |
673 | ||
674 | case 7: | |
675 | switch (config->val_bits) { | |
676 | case 9: | |
677 | map->format.format_write = regmap_format_7_9_write; | |
678 | break; | |
679 | default: | |
680 | goto err_map; | |
681 | } | |
682 | break; | |
683 | ||
7e5ec63e LPC |
684 | case 10: |
685 | switch (config->val_bits) { | |
686 | case 14: | |
687 | map->format.format_write = regmap_format_10_14_write; | |
688 | break; | |
689 | default: | |
690 | goto err_map; | |
691 | } | |
692 | break; | |
693 | ||
b83a313b MB |
694 | case 8: |
695 | map->format.format_reg = regmap_format_8; | |
696 | break; | |
697 | ||
698 | case 16: | |
141eba2e SW |
699 | switch (reg_endian) { |
700 | case REGMAP_ENDIAN_BIG: | |
701 | map->format.format_reg = regmap_format_16_be; | |
702 | break; | |
703 | case REGMAP_ENDIAN_NATIVE: | |
704 | map->format.format_reg = regmap_format_16_native; | |
705 | break; | |
706 | default: | |
707 | goto err_map; | |
708 | } | |
b83a313b MB |
709 | break; |
710 | ||
237019e7 LPC |
711 | case 24: |
712 | if (reg_endian != REGMAP_ENDIAN_BIG) | |
713 | goto err_map; | |
714 | map->format.format_reg = regmap_format_24; | |
715 | break; | |
716 | ||
7d5e525b | 717 | case 32: |
141eba2e SW |
718 | switch (reg_endian) { |
719 | case REGMAP_ENDIAN_BIG: | |
720 | map->format.format_reg = regmap_format_32_be; | |
721 | break; | |
722 | case REGMAP_ENDIAN_NATIVE: | |
723 | map->format.format_reg = regmap_format_32_native; | |
724 | break; | |
725 | default: | |
726 | goto err_map; | |
727 | } | |
7d5e525b MB |
728 | break; |
729 | ||
b83a313b MB |
730 | default: |
731 | goto err_map; | |
732 | } | |
733 | ||
8a819ff8 MB |
734 | if (val_endian == REGMAP_ENDIAN_NATIVE) |
735 | map->format.parse_inplace = regmap_parse_inplace_noop; | |
736 | ||
b83a313b MB |
737 | switch (config->val_bits) { |
738 | case 8: | |
739 | map->format.format_val = regmap_format_8; | |
740 | map->format.parse_val = regmap_parse_8; | |
8a819ff8 | 741 | map->format.parse_inplace = regmap_parse_inplace_noop; |
b83a313b MB |
742 | break; |
743 | case 16: | |
141eba2e SW |
744 | switch (val_endian) { |
745 | case REGMAP_ENDIAN_BIG: | |
746 | map->format.format_val = regmap_format_16_be; | |
747 | map->format.parse_val = regmap_parse_16_be; | |
8a819ff8 | 748 | map->format.parse_inplace = regmap_parse_16_be_inplace; |
141eba2e | 749 | break; |
4aa8c069 XL |
750 | case REGMAP_ENDIAN_LITTLE: |
751 | map->format.format_val = regmap_format_16_le; | |
752 | map->format.parse_val = regmap_parse_16_le; | |
753 | map->format.parse_inplace = regmap_parse_16_le_inplace; | |
754 | break; | |
141eba2e SW |
755 | case REGMAP_ENDIAN_NATIVE: |
756 | map->format.format_val = regmap_format_16_native; | |
757 | map->format.parse_val = regmap_parse_16_native; | |
758 | break; | |
759 | default: | |
760 | goto err_map; | |
761 | } | |
b83a313b | 762 | break; |
ea279fc5 | 763 | case 24: |
141eba2e SW |
764 | if (val_endian != REGMAP_ENDIAN_BIG) |
765 | goto err_map; | |
ea279fc5 MR |
766 | map->format.format_val = regmap_format_24; |
767 | map->format.parse_val = regmap_parse_24; | |
768 | break; | |
7d5e525b | 769 | case 32: |
141eba2e SW |
770 | switch (val_endian) { |
771 | case REGMAP_ENDIAN_BIG: | |
772 | map->format.format_val = regmap_format_32_be; | |
773 | map->format.parse_val = regmap_parse_32_be; | |
8a819ff8 | 774 | map->format.parse_inplace = regmap_parse_32_be_inplace; |
141eba2e | 775 | break; |
4aa8c069 XL |
776 | case REGMAP_ENDIAN_LITTLE: |
777 | map->format.format_val = regmap_format_32_le; | |
778 | map->format.parse_val = regmap_parse_32_le; | |
779 | map->format.parse_inplace = regmap_parse_32_le_inplace; | |
780 | break; | |
141eba2e SW |
781 | case REGMAP_ENDIAN_NATIVE: |
782 | map->format.format_val = regmap_format_32_native; | |
783 | map->format.parse_val = regmap_parse_32_native; | |
784 | break; | |
785 | default: | |
786 | goto err_map; | |
787 | } | |
7d5e525b | 788 | break; |
b83a313b MB |
789 | } |
790 | ||
141eba2e SW |
791 | if (map->format.format_write) { |
792 | if ((reg_endian != REGMAP_ENDIAN_BIG) || | |
793 | (val_endian != REGMAP_ENDIAN_BIG)) | |
794 | goto err_map; | |
7a647614 | 795 | map->use_single_rw = true; |
141eba2e | 796 | } |
7a647614 | 797 | |
b83a313b MB |
798 | if (!map->format.format_write && |
799 | !(map->format.format_reg && map->format.format_val)) | |
800 | goto err_map; | |
801 | ||
82159ba8 | 802 | map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); |
b83a313b MB |
803 | if (map->work_buf == NULL) { |
804 | ret = -ENOMEM; | |
5204f5e3 | 805 | goto err_map; |
b83a313b MB |
806 | } |
807 | ||
d2a5884a AS |
808 | if (map->format.format_write) { |
809 | map->defer_caching = false; | |
07c320dc | 810 | map->reg_write = _regmap_bus_formatted_write; |
d2a5884a AS |
811 | } else if (map->format.format_val) { |
812 | map->defer_caching = true; | |
07c320dc | 813 | map->reg_write = _regmap_bus_raw_write; |
d2a5884a AS |
814 | } |
815 | ||
816 | skip_format_initialization: | |
07c320dc | 817 | |
6863ca62 | 818 | map->range_tree = RB_ROOT; |
e3549cd0 | 819 | for (i = 0; i < config->num_ranges; i++) { |
6863ca62 KG |
820 | const struct regmap_range_cfg *range_cfg = &config->ranges[i]; |
821 | struct regmap_range_node *new; | |
822 | ||
823 | /* Sanity check */ | |
061adc06 MB |
824 | if (range_cfg->range_max < range_cfg->range_min) { |
825 | dev_err(map->dev, "Invalid range %d: %d < %d\n", i, | |
826 | range_cfg->range_max, range_cfg->range_min); | |
6863ca62 | 827 | goto err_range; |
061adc06 MB |
828 | } |
829 | ||
830 | if (range_cfg->range_max > map->max_register) { | |
831 | dev_err(map->dev, "Invalid range %d: %d > %d\n", i, | |
832 | range_cfg->range_max, map->max_register); | |
833 | goto err_range; | |
834 | } | |
835 | ||
836 | if (range_cfg->selector_reg > map->max_register) { | |
837 | dev_err(map->dev, | |
838 | "Invalid range %d: selector out of map\n", i); | |
839 | goto err_range; | |
840 | } | |
841 | ||
842 | if (range_cfg->window_len == 0) { | |
843 | dev_err(map->dev, "Invalid range %d: window_len 0\n", | |
844 | i); | |
845 | goto err_range; | |
846 | } | |
6863ca62 KG |
847 | |
848 | /* Make sure, that this register range has no selector | |
849 | or data window within its boundary */ | |
e3549cd0 | 850 | for (j = 0; j < config->num_ranges; j++) { |
6863ca62 KG |
851 | unsigned sel_reg = config->ranges[j].selector_reg; |
852 | unsigned win_min = config->ranges[j].window_start; | |
853 | unsigned win_max = win_min + | |
854 | config->ranges[j].window_len - 1; | |
855 | ||
f161d220 PZ |
856 | /* Allow data window inside its own virtual range */ |
857 | if (j == i) | |
858 | continue; | |
859 | ||
6863ca62 KG |
860 | if (range_cfg->range_min <= sel_reg && |
861 | sel_reg <= range_cfg->range_max) { | |
061adc06 MB |
862 | dev_err(map->dev, |
863 | "Range %d: selector for %d in window\n", | |
864 | i, j); | |
6863ca62 KG |
865 | goto err_range; |
866 | } | |
867 | ||
868 | if (!(win_max < range_cfg->range_min || | |
869 | win_min > range_cfg->range_max)) { | |
061adc06 MB |
870 | dev_err(map->dev, |
871 | "Range %d: window for %d in window\n", | |
872 | i, j); | |
6863ca62 KG |
873 | goto err_range; |
874 | } | |
875 | } | |
876 | ||
877 | new = kzalloc(sizeof(*new), GFP_KERNEL); | |
878 | if (new == NULL) { | |
879 | ret = -ENOMEM; | |
880 | goto err_range; | |
881 | } | |
882 | ||
4b020b3f | 883 | new->map = map; |
d058bb49 | 884 | new->name = range_cfg->name; |
6863ca62 KG |
885 | new->range_min = range_cfg->range_min; |
886 | new->range_max = range_cfg->range_max; | |
887 | new->selector_reg = range_cfg->selector_reg; | |
888 | new->selector_mask = range_cfg->selector_mask; | |
889 | new->selector_shift = range_cfg->selector_shift; | |
890 | new->window_start = range_cfg->window_start; | |
891 | new->window_len = range_cfg->window_len; | |
892 | ||
53e87f88 | 893 | if (!_regmap_range_add(map, new)) { |
061adc06 | 894 | dev_err(map->dev, "Failed to add range %d\n", i); |
6863ca62 KG |
895 | kfree(new); |
896 | goto err_range; | |
897 | } | |
898 | ||
899 | if (map->selector_work_buf == NULL) { | |
900 | map->selector_work_buf = | |
901 | kzalloc(map->format.buf_size, GFP_KERNEL); | |
902 | if (map->selector_work_buf == NULL) { | |
903 | ret = -ENOMEM; | |
904 | goto err_range; | |
905 | } | |
906 | } | |
907 | } | |
052d2cd1 | 908 | |
e5e3b8ab | 909 | ret = regcache_init(map, config); |
0ff3e62f | 910 | if (ret != 0) |
6863ca62 KG |
911 | goto err_range; |
912 | ||
a7a037c8 | 913 | if (dev) { |
6cfec04b MS |
914 | ret = regmap_attach_dev(dev, map, config); |
915 | if (ret != 0) | |
916 | goto err_regcache; | |
a7a037c8 | 917 | } |
72b39f6f | 918 | |
b83a313b MB |
919 | return map; |
920 | ||
6cfec04b | 921 | err_regcache: |
72b39f6f | 922 | regcache_exit(map); |
6863ca62 KG |
923 | err_range: |
924 | regmap_range_exit(map); | |
58072cbf | 925 | kfree(map->work_buf); |
b83a313b MB |
926 | err_map: |
927 | kfree(map); | |
928 | err: | |
929 | return ERR_PTR(ret); | |
930 | } | |
931 | EXPORT_SYMBOL_GPL(regmap_init); | |
932 | ||
c0eb4676 MB |
933 | static void devm_regmap_release(struct device *dev, void *res) |
934 | { | |
935 | regmap_exit(*(struct regmap **)res); | |
936 | } | |
937 | ||
938 | /** | |
939 | * devm_regmap_init(): Initialise managed register map | |
940 | * | |
941 | * @dev: Device that will be interacted with | |
942 | * @bus: Bus-specific callbacks to use with device | |
0135bbcc | 943 | * @bus_context: Data passed to bus-specific callbacks |
c0eb4676 MB |
944 | * @config: Configuration for register map |
945 | * | |
946 | * The return value will be an ERR_PTR() on error or a valid pointer | |
947 | * to a struct regmap. This function should generally not be called | |
948 | * directly, it should be called by bus-specific init functions. The | |
949 | * map will be automatically freed by the device management code. | |
950 | */ | |
951 | struct regmap *devm_regmap_init(struct device *dev, | |
952 | const struct regmap_bus *bus, | |
0135bbcc | 953 | void *bus_context, |
c0eb4676 MB |
954 | const struct regmap_config *config) |
955 | { | |
956 | struct regmap **ptr, *regmap; | |
957 | ||
958 | ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); | |
959 | if (!ptr) | |
960 | return ERR_PTR(-ENOMEM); | |
961 | ||
0135bbcc | 962 | regmap = regmap_init(dev, bus, bus_context, config); |
c0eb4676 MB |
963 | if (!IS_ERR(regmap)) { |
964 | *ptr = regmap; | |
965 | devres_add(dev, ptr); | |
966 | } else { | |
967 | devres_free(ptr); | |
968 | } | |
969 | ||
970 | return regmap; | |
971 | } | |
972 | EXPORT_SYMBOL_GPL(devm_regmap_init); | |
973 | ||
67252287 SK |
974 | static void regmap_field_init(struct regmap_field *rm_field, |
975 | struct regmap *regmap, struct reg_field reg_field) | |
976 | { | |
977 | int field_bits = reg_field.msb - reg_field.lsb + 1; | |
978 | rm_field->regmap = regmap; | |
979 | rm_field->reg = reg_field.reg; | |
980 | rm_field->shift = reg_field.lsb; | |
981 | rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb); | |
a0102375 KM |
982 | rm_field->id_size = reg_field.id_size; |
983 | rm_field->id_offset = reg_field.id_offset; | |
67252287 SK |
984 | } |
985 | ||
986 | /** | |
987 | * devm_regmap_field_alloc(): Allocate and initialise a register field | |
988 | * in a register map. | |
989 | * | |
990 | * @dev: Device that will be interacted with | |
991 | * @regmap: regmap bank in which this register field is located. | |
992 | * @reg_field: Register field with in the bank. | |
993 | * | |
994 | * The return value will be an ERR_PTR() on error or a valid pointer | |
995 | * to a struct regmap_field. The regmap_field will be automatically freed | |
996 | * by the device management code. | |
997 | */ | |
998 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
999 | struct regmap *regmap, struct reg_field reg_field) | |
1000 | { | |
1001 | struct regmap_field *rm_field = devm_kzalloc(dev, | |
1002 | sizeof(*rm_field), GFP_KERNEL); | |
1003 | if (!rm_field) | |
1004 | return ERR_PTR(-ENOMEM); | |
1005 | ||
1006 | regmap_field_init(rm_field, regmap, reg_field); | |
1007 | ||
1008 | return rm_field; | |
1009 | ||
1010 | } | |
1011 | EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); | |
1012 | ||
1013 | /** | |
1014 | * devm_regmap_field_free(): Free register field allocated using | |
1015 | * devm_regmap_field_alloc. Usally drivers need not call this function, | |
1016 | * as the memory allocated via devm will be freed as per device-driver | |
1017 | * life-cyle. | |
1018 | * | |
1019 | * @dev: Device that will be interacted with | |
1020 | * @field: regmap field which should be freed. | |
1021 | */ | |
1022 | void devm_regmap_field_free(struct device *dev, | |
1023 | struct regmap_field *field) | |
1024 | { | |
1025 | devm_kfree(dev, field); | |
1026 | } | |
1027 | EXPORT_SYMBOL_GPL(devm_regmap_field_free); | |
1028 | ||
1029 | /** | |
1030 | * regmap_field_alloc(): Allocate and initialise a register field | |
1031 | * in a register map. | |
1032 | * | |
1033 | * @regmap: regmap bank in which this register field is located. | |
1034 | * @reg_field: Register field with in the bank. | |
1035 | * | |
1036 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1037 | * to a struct regmap_field. The regmap_field should be freed by the | |
1038 | * user once its finished working with it using regmap_field_free(). | |
1039 | */ | |
1040 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
1041 | struct reg_field reg_field) | |
1042 | { | |
1043 | struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); | |
1044 | ||
1045 | if (!rm_field) | |
1046 | return ERR_PTR(-ENOMEM); | |
1047 | ||
1048 | regmap_field_init(rm_field, regmap, reg_field); | |
1049 | ||
1050 | return rm_field; | |
1051 | } | |
1052 | EXPORT_SYMBOL_GPL(regmap_field_alloc); | |
1053 | ||
1054 | /** | |
1055 | * regmap_field_free(): Free register field allocated using regmap_field_alloc | |
1056 | * | |
1057 | * @field: regmap field which should be freed. | |
1058 | */ | |
1059 | void regmap_field_free(struct regmap_field *field) | |
1060 | { | |
1061 | kfree(field); | |
1062 | } | |
1063 | EXPORT_SYMBOL_GPL(regmap_field_free); | |
1064 | ||
bf315173 MB |
1065 | /** |
1066 | * regmap_reinit_cache(): Reinitialise the current register cache | |
1067 | * | |
1068 | * @map: Register map to operate on. | |
1069 | * @config: New configuration. Only the cache data will be used. | |
1070 | * | |
1071 | * Discard any existing register cache for the map and initialize a | |
1072 | * new cache. This can be used to restore the cache to defaults or to | |
1073 | * update the cache configuration to reflect runtime discovery of the | |
1074 | * hardware. | |
4d879514 DP |
1075 | * |
1076 | * No explicit locking is done here, the user needs to ensure that | |
1077 | * this function will not race with other calls to regmap. | |
bf315173 MB |
1078 | */ |
1079 | int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) | |
1080 | { | |
bf315173 | 1081 | regcache_exit(map); |
a24f64a6 | 1082 | regmap_debugfs_exit(map); |
bf315173 MB |
1083 | |
1084 | map->max_register = config->max_register; | |
1085 | map->writeable_reg = config->writeable_reg; | |
1086 | map->readable_reg = config->readable_reg; | |
1087 | map->volatile_reg = config->volatile_reg; | |
1088 | map->precious_reg = config->precious_reg; | |
1089 | map->cache_type = config->cache_type; | |
1090 | ||
d3c242e1 | 1091 | regmap_debugfs_init(map, config->name); |
a24f64a6 | 1092 | |
421e8d2d MB |
1093 | map->cache_bypass = false; |
1094 | map->cache_only = false; | |
1095 | ||
4d879514 | 1096 | return regcache_init(map, config); |
bf315173 | 1097 | } |
752a6a5f | 1098 | EXPORT_SYMBOL_GPL(regmap_reinit_cache); |
bf315173 | 1099 | |
b83a313b MB |
1100 | /** |
1101 | * regmap_exit(): Free a previously allocated register map | |
1102 | */ | |
1103 | void regmap_exit(struct regmap *map) | |
1104 | { | |
7e09a979 MB |
1105 | struct regmap_async *async; |
1106 | ||
5d1729e7 | 1107 | regcache_exit(map); |
31244e39 | 1108 | regmap_debugfs_exit(map); |
6863ca62 | 1109 | regmap_range_exit(map); |
d2a5884a | 1110 | if (map->bus && map->bus->free_context) |
0135bbcc | 1111 | map->bus->free_context(map->bus_context); |
b83a313b | 1112 | kfree(map->work_buf); |
7e09a979 MB |
1113 | while (!list_empty(&map->async_free)) { |
1114 | async = list_first_entry_or_null(&map->async_free, | |
1115 | struct regmap_async, | |
1116 | list); | |
1117 | list_del(&async->list); | |
1118 | kfree(async->work_buf); | |
1119 | kfree(async); | |
1120 | } | |
b83a313b MB |
1121 | kfree(map); |
1122 | } | |
1123 | EXPORT_SYMBOL_GPL(regmap_exit); | |
1124 | ||
72b39f6f MB |
1125 | static int dev_get_regmap_match(struct device *dev, void *res, void *data) |
1126 | { | |
1127 | struct regmap **r = res; | |
1128 | if (!r || !*r) { | |
1129 | WARN_ON(!r || !*r); | |
1130 | return 0; | |
1131 | } | |
1132 | ||
1133 | /* If the user didn't specify a name match any */ | |
1134 | if (data) | |
1135 | return (*r)->name == data; | |
1136 | else | |
1137 | return 1; | |
1138 | } | |
1139 | ||
1140 | /** | |
1141 | * dev_get_regmap(): Obtain the regmap (if any) for a device | |
1142 | * | |
1143 | * @dev: Device to retrieve the map for | |
1144 | * @name: Optional name for the register map, usually NULL. | |
1145 | * | |
1146 | * Returns the regmap for the device if one is present, or NULL. If | |
1147 | * name is specified then it must match the name specified when | |
1148 | * registering the device, if it is NULL then the first regmap found | |
1149 | * will be used. Devices with multiple register maps are very rare, | |
1150 | * generic code should normally not need to specify a name. | |
1151 | */ | |
1152 | struct regmap *dev_get_regmap(struct device *dev, const char *name) | |
1153 | { | |
1154 | struct regmap **r = devres_find(dev, dev_get_regmap_release, | |
1155 | dev_get_regmap_match, (void *)name); | |
1156 | ||
1157 | if (!r) | |
1158 | return NULL; | |
1159 | return *r; | |
1160 | } | |
1161 | EXPORT_SYMBOL_GPL(dev_get_regmap); | |
1162 | ||
8d7d3972 TT |
1163 | /** |
1164 | * regmap_get_device(): Obtain the device from a regmap | |
1165 | * | |
1166 | * @map: Register map to operate on. | |
1167 | * | |
1168 | * Returns the underlying device that the regmap has been created for. | |
1169 | */ | |
1170 | struct device *regmap_get_device(struct regmap *map) | |
1171 | { | |
1172 | return map->dev; | |
1173 | } | |
fa2fbe4a | 1174 | EXPORT_SYMBOL_GPL(regmap_get_device); |
8d7d3972 | 1175 | |
6863ca62 | 1176 | static int _regmap_select_page(struct regmap *map, unsigned int *reg, |
98bc7dfd | 1177 | struct regmap_range_node *range, |
6863ca62 KG |
1178 | unsigned int val_num) |
1179 | { | |
6863ca62 KG |
1180 | void *orig_work_buf; |
1181 | unsigned int win_offset; | |
1182 | unsigned int win_page; | |
1183 | bool page_chg; | |
1184 | int ret; | |
1185 | ||
98bc7dfd MB |
1186 | win_offset = (*reg - range->range_min) % range->window_len; |
1187 | win_page = (*reg - range->range_min) / range->window_len; | |
6863ca62 | 1188 | |
98bc7dfd MB |
1189 | if (val_num > 1) { |
1190 | /* Bulk write shouldn't cross range boundary */ | |
1191 | if (*reg + val_num - 1 > range->range_max) | |
1192 | return -EINVAL; | |
6863ca62 | 1193 | |
98bc7dfd MB |
1194 | /* ... or single page boundary */ |
1195 | if (val_num > range->window_len - win_offset) | |
1196 | return -EINVAL; | |
1197 | } | |
6863ca62 | 1198 | |
98bc7dfd MB |
1199 | /* It is possible to have selector register inside data window. |
1200 | In that case, selector register is located on every page and | |
1201 | it needs no page switching, when accessed alone. */ | |
1202 | if (val_num > 1 || | |
1203 | range->window_start + win_offset != range->selector_reg) { | |
1204 | /* Use separate work_buf during page switching */ | |
1205 | orig_work_buf = map->work_buf; | |
1206 | map->work_buf = map->selector_work_buf; | |
6863ca62 | 1207 | |
98bc7dfd MB |
1208 | ret = _regmap_update_bits(map, range->selector_reg, |
1209 | range->selector_mask, | |
1210 | win_page << range->selector_shift, | |
1211 | &page_chg); | |
632a5b01 | 1212 | |
98bc7dfd | 1213 | map->work_buf = orig_work_buf; |
6863ca62 | 1214 | |
0ff3e62f | 1215 | if (ret != 0) |
98bc7dfd | 1216 | return ret; |
6863ca62 KG |
1217 | } |
1218 | ||
98bc7dfd MB |
1219 | *reg = range->window_start + win_offset; |
1220 | ||
6863ca62 KG |
1221 | return 0; |
1222 | } | |
1223 | ||
584de329 | 1224 | int _regmap_raw_write(struct regmap *map, unsigned int reg, |
0a819809 | 1225 | const void *val, size_t val_len) |
b83a313b | 1226 | { |
98bc7dfd | 1227 | struct regmap_range_node *range; |
0d509f2b | 1228 | unsigned long flags; |
6f306441 | 1229 | u8 *u8 = map->work_buf; |
0d509f2b MB |
1230 | void *work_val = map->work_buf + map->format.reg_bytes + |
1231 | map->format.pad_bytes; | |
b83a313b MB |
1232 | void *buf; |
1233 | int ret = -ENOTSUPP; | |
1234 | size_t len; | |
73304781 MB |
1235 | int i; |
1236 | ||
f1b5c5c3 | 1237 | WARN_ON(!map->bus); |
d2a5884a | 1238 | |
73304781 MB |
1239 | /* Check for unwritable registers before we start */ |
1240 | if (map->writeable_reg) | |
1241 | for (i = 0; i < val_len / map->format.val_bytes; i++) | |
f01ee60f SW |
1242 | if (!map->writeable_reg(map->dev, |
1243 | reg + (i * map->reg_stride))) | |
73304781 | 1244 | return -EINVAL; |
b83a313b | 1245 | |
c9157198 LD |
1246 | if (!map->cache_bypass && map->format.parse_val) { |
1247 | unsigned int ival; | |
1248 | int val_bytes = map->format.val_bytes; | |
1249 | for (i = 0; i < val_len / val_bytes; i++) { | |
5a08d156 | 1250 | ival = map->format.parse_val(val + (i * val_bytes)); |
f01ee60f SW |
1251 | ret = regcache_write(map, reg + (i * map->reg_stride), |
1252 | ival); | |
c9157198 LD |
1253 | if (ret) { |
1254 | dev_err(map->dev, | |
6d04b8ac | 1255 | "Error in caching of register: %x ret: %d\n", |
c9157198 LD |
1256 | reg + i, ret); |
1257 | return ret; | |
1258 | } | |
1259 | } | |
1260 | if (map->cache_only) { | |
1261 | map->cache_dirty = true; | |
1262 | return 0; | |
1263 | } | |
1264 | } | |
1265 | ||
98bc7dfd MB |
1266 | range = _regmap_range_lookup(map, reg); |
1267 | if (range) { | |
8a2ceac6 MB |
1268 | int val_num = val_len / map->format.val_bytes; |
1269 | int win_offset = (reg - range->range_min) % range->window_len; | |
1270 | int win_residue = range->window_len - win_offset; | |
1271 | ||
1272 | /* If the write goes beyond the end of the window split it */ | |
1273 | while (val_num > win_residue) { | |
1a61cfe3 | 1274 | dev_dbg(map->dev, "Writing window %d/%zu\n", |
8a2ceac6 MB |
1275 | win_residue, val_len / map->format.val_bytes); |
1276 | ret = _regmap_raw_write(map, reg, val, win_residue * | |
0a819809 | 1277 | map->format.val_bytes); |
8a2ceac6 MB |
1278 | if (ret != 0) |
1279 | return ret; | |
1280 | ||
1281 | reg += win_residue; | |
1282 | val_num -= win_residue; | |
1283 | val += win_residue * map->format.val_bytes; | |
1284 | val_len -= win_residue * map->format.val_bytes; | |
1285 | ||
1286 | win_offset = (reg - range->range_min) % | |
1287 | range->window_len; | |
1288 | win_residue = range->window_len - win_offset; | |
1289 | } | |
1290 | ||
1291 | ret = _regmap_select_page(map, ®, range, val_num); | |
0ff3e62f | 1292 | if (ret != 0) |
98bc7dfd MB |
1293 | return ret; |
1294 | } | |
6863ca62 | 1295 | |
d939fb9a | 1296 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
b83a313b | 1297 | |
6f306441 LPC |
1298 | u8[0] |= map->write_flag_mask; |
1299 | ||
651e013e MB |
1300 | /* |
1301 | * Essentially all I/O mechanisms will be faster with a single | |
1302 | * buffer to write. Since register syncs often generate raw | |
1303 | * writes of single registers optimise that case. | |
1304 | */ | |
1305 | if (val != work_val && val_len == map->format.val_bytes) { | |
1306 | memcpy(work_val, val, map->format.val_bytes); | |
1307 | val = work_val; | |
1308 | } | |
1309 | ||
0a819809 | 1310 | if (map->async && map->bus->async_write) { |
7e09a979 | 1311 | struct regmap_async *async; |
0d509f2b | 1312 | |
fe7d4ccd MB |
1313 | trace_regmap_async_write_start(map->dev, reg, val_len); |
1314 | ||
7e09a979 MB |
1315 | spin_lock_irqsave(&map->async_lock, flags); |
1316 | async = list_first_entry_or_null(&map->async_free, | |
1317 | struct regmap_async, | |
1318 | list); | |
1319 | if (async) | |
1320 | list_del(&async->list); | |
1321 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1322 | ||
1323 | if (!async) { | |
1324 | async = map->bus->async_alloc(); | |
1325 | if (!async) | |
1326 | return -ENOMEM; | |
1327 | ||
1328 | async->work_buf = kzalloc(map->format.buf_size, | |
1329 | GFP_KERNEL | GFP_DMA); | |
1330 | if (!async->work_buf) { | |
1331 | kfree(async); | |
1332 | return -ENOMEM; | |
1333 | } | |
0d509f2b MB |
1334 | } |
1335 | ||
0d509f2b MB |
1336 | async->map = map; |
1337 | ||
1338 | /* If the caller supplied the value we can use it safely. */ | |
1339 | memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + | |
1340 | map->format.reg_bytes + map->format.val_bytes); | |
0d509f2b MB |
1341 | |
1342 | spin_lock_irqsave(&map->async_lock, flags); | |
1343 | list_add_tail(&async->list, &map->async_list); | |
1344 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1345 | ||
04c50ccf MB |
1346 | if (val != work_val) |
1347 | ret = map->bus->async_write(map->bus_context, | |
1348 | async->work_buf, | |
1349 | map->format.reg_bytes + | |
1350 | map->format.pad_bytes, | |
1351 | val, val_len, async); | |
1352 | else | |
1353 | ret = map->bus->async_write(map->bus_context, | |
1354 | async->work_buf, | |
1355 | map->format.reg_bytes + | |
1356 | map->format.pad_bytes + | |
1357 | val_len, NULL, 0, async); | |
0d509f2b MB |
1358 | |
1359 | if (ret != 0) { | |
1360 | dev_err(map->dev, "Failed to schedule write: %d\n", | |
1361 | ret); | |
1362 | ||
1363 | spin_lock_irqsave(&map->async_lock, flags); | |
7e09a979 | 1364 | list_move(&async->list, &map->async_free); |
0d509f2b | 1365 | spin_unlock_irqrestore(&map->async_lock, flags); |
0d509f2b | 1366 | } |
f951b658 MB |
1367 | |
1368 | return ret; | |
0d509f2b MB |
1369 | } |
1370 | ||
fb2736bb MB |
1371 | trace_regmap_hw_write_start(map->dev, reg, |
1372 | val_len / map->format.val_bytes); | |
1373 | ||
2547e201 MB |
1374 | /* If we're doing a single register write we can probably just |
1375 | * send the work_buf directly, otherwise try to do a gather | |
1376 | * write. | |
1377 | */ | |
0d509f2b | 1378 | if (val == work_val) |
0135bbcc | 1379 | ret = map->bus->write(map->bus_context, map->work_buf, |
82159ba8 MB |
1380 | map->format.reg_bytes + |
1381 | map->format.pad_bytes + | |
1382 | val_len); | |
2547e201 | 1383 | else if (map->bus->gather_write) |
0135bbcc | 1384 | ret = map->bus->gather_write(map->bus_context, map->work_buf, |
82159ba8 MB |
1385 | map->format.reg_bytes + |
1386 | map->format.pad_bytes, | |
b83a313b MB |
1387 | val, val_len); |
1388 | ||
2547e201 | 1389 | /* If that didn't work fall back on linearising by hand. */ |
b83a313b | 1390 | if (ret == -ENOTSUPP) { |
82159ba8 MB |
1391 | len = map->format.reg_bytes + map->format.pad_bytes + val_len; |
1392 | buf = kzalloc(len, GFP_KERNEL); | |
b83a313b MB |
1393 | if (!buf) |
1394 | return -ENOMEM; | |
1395 | ||
1396 | memcpy(buf, map->work_buf, map->format.reg_bytes); | |
82159ba8 MB |
1397 | memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, |
1398 | val, val_len); | |
0135bbcc | 1399 | ret = map->bus->write(map->bus_context, buf, len); |
b83a313b MB |
1400 | |
1401 | kfree(buf); | |
1402 | } | |
1403 | ||
fb2736bb MB |
1404 | trace_regmap_hw_write_done(map->dev, reg, |
1405 | val_len / map->format.val_bytes); | |
1406 | ||
b83a313b MB |
1407 | return ret; |
1408 | } | |
1409 | ||
221ad7f2 MB |
1410 | /** |
1411 | * regmap_can_raw_write - Test if regmap_raw_write() is supported | |
1412 | * | |
1413 | * @map: Map to check. | |
1414 | */ | |
1415 | bool regmap_can_raw_write(struct regmap *map) | |
1416 | { | |
1417 | return map->bus && map->format.format_val && map->format.format_reg; | |
1418 | } | |
1419 | EXPORT_SYMBOL_GPL(regmap_can_raw_write); | |
1420 | ||
07c320dc AS |
1421 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
1422 | unsigned int val) | |
1423 | { | |
1424 | int ret; | |
1425 | struct regmap_range_node *range; | |
1426 | struct regmap *map = context; | |
1427 | ||
f1b5c5c3 | 1428 | WARN_ON(!map->bus || !map->format.format_write); |
07c320dc AS |
1429 | |
1430 | range = _regmap_range_lookup(map, reg); | |
1431 | if (range) { | |
1432 | ret = _regmap_select_page(map, ®, range, 1); | |
1433 | if (ret != 0) | |
1434 | return ret; | |
1435 | } | |
1436 | ||
1437 | map->format.format_write(map, reg, val); | |
1438 | ||
1439 | trace_regmap_hw_write_start(map->dev, reg, 1); | |
1440 | ||
1441 | ret = map->bus->write(map->bus_context, map->work_buf, | |
1442 | map->format.buf_size); | |
1443 | ||
1444 | trace_regmap_hw_write_done(map->dev, reg, 1); | |
1445 | ||
1446 | return ret; | |
1447 | } | |
1448 | ||
3ac17037 BB |
1449 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
1450 | unsigned int val) | |
1451 | { | |
1452 | struct regmap *map = context; | |
1453 | ||
1454 | return map->bus->reg_write(map->bus_context, reg, val); | |
1455 | } | |
1456 | ||
07c320dc AS |
1457 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
1458 | unsigned int val) | |
1459 | { | |
1460 | struct regmap *map = context; | |
1461 | ||
f1b5c5c3 | 1462 | WARN_ON(!map->bus || !map->format.format_val); |
07c320dc AS |
1463 | |
1464 | map->format.format_val(map->work_buf + map->format.reg_bytes | |
1465 | + map->format.pad_bytes, val, 0); | |
1466 | return _regmap_raw_write(map, reg, | |
1467 | map->work_buf + | |
1468 | map->format.reg_bytes + | |
1469 | map->format.pad_bytes, | |
0a819809 | 1470 | map->format.val_bytes); |
07c320dc AS |
1471 | } |
1472 | ||
d2a5884a AS |
1473 | static inline void *_regmap_map_get_context(struct regmap *map) |
1474 | { | |
1475 | return (map->bus) ? map : map->bus_context; | |
1476 | } | |
1477 | ||
4d2dc095 DP |
1478 | int _regmap_write(struct regmap *map, unsigned int reg, |
1479 | unsigned int val) | |
b83a313b | 1480 | { |
fb2736bb | 1481 | int ret; |
d2a5884a | 1482 | void *context = _regmap_map_get_context(map); |
b83a313b | 1483 | |
515f2261 IN |
1484 | if (!regmap_writeable(map, reg)) |
1485 | return -EIO; | |
1486 | ||
d2a5884a | 1487 | if (!map->cache_bypass && !map->defer_caching) { |
5d1729e7 DP |
1488 | ret = regcache_write(map, reg, val); |
1489 | if (ret != 0) | |
1490 | return ret; | |
8ae0d7e8 MB |
1491 | if (map->cache_only) { |
1492 | map->cache_dirty = true; | |
5d1729e7 | 1493 | return 0; |
8ae0d7e8 | 1494 | } |
5d1729e7 DP |
1495 | } |
1496 | ||
1044c180 MB |
1497 | #ifdef LOG_DEVICE |
1498 | if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0) | |
1499 | dev_info(map->dev, "%x <= %x\n", reg, val); | |
1500 | #endif | |
1501 | ||
fb2736bb MB |
1502 | trace_regmap_reg_write(map->dev, reg, val); |
1503 | ||
d2a5884a | 1504 | return map->reg_write(context, reg, val); |
b83a313b MB |
1505 | } |
1506 | ||
1507 | /** | |
1508 | * regmap_write(): Write a value to a single register | |
1509 | * | |
1510 | * @map: Register map to write to | |
1511 | * @reg: Register to write to | |
1512 | * @val: Value to be written | |
1513 | * | |
1514 | * A value of zero will be returned on success, a negative errno will | |
1515 | * be returned in error cases. | |
1516 | */ | |
1517 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) | |
1518 | { | |
1519 | int ret; | |
1520 | ||
f01ee60f SW |
1521 | if (reg % map->reg_stride) |
1522 | return -EINVAL; | |
1523 | ||
0d4529c5 | 1524 | map->lock(map->lock_arg); |
b83a313b MB |
1525 | |
1526 | ret = _regmap_write(map, reg, val); | |
1527 | ||
0d4529c5 | 1528 | map->unlock(map->lock_arg); |
b83a313b MB |
1529 | |
1530 | return ret; | |
1531 | } | |
1532 | EXPORT_SYMBOL_GPL(regmap_write); | |
1533 | ||
915f441b MB |
1534 | /** |
1535 | * regmap_write_async(): Write a value to a single register asynchronously | |
1536 | * | |
1537 | * @map: Register map to write to | |
1538 | * @reg: Register to write to | |
1539 | * @val: Value to be written | |
1540 | * | |
1541 | * A value of zero will be returned on success, a negative errno will | |
1542 | * be returned in error cases. | |
1543 | */ | |
1544 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) | |
1545 | { | |
1546 | int ret; | |
1547 | ||
1548 | if (reg % map->reg_stride) | |
1549 | return -EINVAL; | |
1550 | ||
1551 | map->lock(map->lock_arg); | |
1552 | ||
1553 | map->async = true; | |
1554 | ||
1555 | ret = _regmap_write(map, reg, val); | |
1556 | ||
1557 | map->async = false; | |
1558 | ||
1559 | map->unlock(map->lock_arg); | |
1560 | ||
1561 | return ret; | |
1562 | } | |
1563 | EXPORT_SYMBOL_GPL(regmap_write_async); | |
1564 | ||
b83a313b MB |
1565 | /** |
1566 | * regmap_raw_write(): Write raw values to one or more registers | |
1567 | * | |
1568 | * @map: Register map to write to | |
1569 | * @reg: Initial register to write to | |
1570 | * @val: Block of data to be written, laid out for direct transmission to the | |
1571 | * device | |
1572 | * @val_len: Length of data pointed to by val. | |
1573 | * | |
1574 | * This function is intended to be used for things like firmware | |
1575 | * download where a large block of data needs to be transferred to the | |
1576 | * device. No formatting will be done on the data provided. | |
1577 | * | |
1578 | * A value of zero will be returned on success, a negative errno will | |
1579 | * be returned in error cases. | |
1580 | */ | |
1581 | int regmap_raw_write(struct regmap *map, unsigned int reg, | |
1582 | const void *val, size_t val_len) | |
1583 | { | |
1584 | int ret; | |
1585 | ||
221ad7f2 | 1586 | if (!regmap_can_raw_write(map)) |
d2a5884a | 1587 | return -EINVAL; |
851960ba SW |
1588 | if (val_len % map->format.val_bytes) |
1589 | return -EINVAL; | |
1590 | ||
0d4529c5 | 1591 | map->lock(map->lock_arg); |
b83a313b | 1592 | |
0a819809 | 1593 | ret = _regmap_raw_write(map, reg, val, val_len); |
b83a313b | 1594 | |
0d4529c5 | 1595 | map->unlock(map->lock_arg); |
b83a313b MB |
1596 | |
1597 | return ret; | |
1598 | } | |
1599 | EXPORT_SYMBOL_GPL(regmap_raw_write); | |
1600 | ||
67252287 SK |
1601 | /** |
1602 | * regmap_field_write(): Write a value to a single register field | |
1603 | * | |
1604 | * @field: Register field to write to | |
1605 | * @val: Value to be written | |
1606 | * | |
1607 | * A value of zero will be returned on success, a negative errno will | |
1608 | * be returned in error cases. | |
1609 | */ | |
1610 | int regmap_field_write(struct regmap_field *field, unsigned int val) | |
1611 | { | |
1612 | return regmap_update_bits(field->regmap, field->reg, | |
1613 | field->mask, val << field->shift); | |
1614 | } | |
1615 | EXPORT_SYMBOL_GPL(regmap_field_write); | |
1616 | ||
fdf20029 KM |
1617 | /** |
1618 | * regmap_field_update_bits(): Perform a read/modify/write cycle | |
1619 | * on the register field | |
1620 | * | |
1621 | * @field: Register field to write to | |
1622 | * @mask: Bitmask to change | |
1623 | * @val: Value to be written | |
1624 | * | |
1625 | * A value of zero will be returned on success, a negative errno will | |
1626 | * be returned in error cases. | |
1627 | */ | |
1628 | int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val) | |
1629 | { | |
1630 | mask = (mask << field->shift) & field->mask; | |
1631 | ||
1632 | return regmap_update_bits(field->regmap, field->reg, | |
1633 | mask, val << field->shift); | |
1634 | } | |
1635 | EXPORT_SYMBOL_GPL(regmap_field_update_bits); | |
1636 | ||
a0102375 KM |
1637 | /** |
1638 | * regmap_fields_write(): Write a value to a single register field with port ID | |
1639 | * | |
1640 | * @field: Register field to write to | |
1641 | * @id: port ID | |
1642 | * @val: Value to be written | |
1643 | * | |
1644 | * A value of zero will be returned on success, a negative errno will | |
1645 | * be returned in error cases. | |
1646 | */ | |
1647 | int regmap_fields_write(struct regmap_field *field, unsigned int id, | |
1648 | unsigned int val) | |
1649 | { | |
1650 | if (id >= field->id_size) | |
1651 | return -EINVAL; | |
1652 | ||
1653 | return regmap_update_bits(field->regmap, | |
1654 | field->reg + (field->id_offset * id), | |
1655 | field->mask, val << field->shift); | |
1656 | } | |
1657 | EXPORT_SYMBOL_GPL(regmap_fields_write); | |
1658 | ||
1659 | /** | |
1660 | * regmap_fields_update_bits(): Perform a read/modify/write cycle | |
1661 | * on the register field | |
1662 | * | |
1663 | * @field: Register field to write to | |
1664 | * @id: port ID | |
1665 | * @mask: Bitmask to change | |
1666 | * @val: Value to be written | |
1667 | * | |
1668 | * A value of zero will be returned on success, a negative errno will | |
1669 | * be returned in error cases. | |
1670 | */ | |
1671 | int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1672 | unsigned int mask, unsigned int val) | |
1673 | { | |
1674 | if (id >= field->id_size) | |
1675 | return -EINVAL; | |
1676 | ||
1677 | mask = (mask << field->shift) & field->mask; | |
1678 | ||
1679 | return regmap_update_bits(field->regmap, | |
1680 | field->reg + (field->id_offset * id), | |
1681 | mask, val << field->shift); | |
1682 | } | |
1683 | EXPORT_SYMBOL_GPL(regmap_fields_update_bits); | |
1684 | ||
8eaeb219 LD |
1685 | /* |
1686 | * regmap_bulk_write(): Write multiple registers to the device | |
1687 | * | |
1688 | * @map: Register map to write to | |
1689 | * @reg: First register to be write from | |
1690 | * @val: Block of data to be written, in native register size for device | |
1691 | * @val_count: Number of registers to write | |
1692 | * | |
1693 | * This function is intended to be used for writing a large block of | |
31b35e9e | 1694 | * data to the device either in single transfer or multiple transfer. |
8eaeb219 LD |
1695 | * |
1696 | * A value of zero will be returned on success, a negative errno will | |
1697 | * be returned in error cases. | |
1698 | */ | |
1699 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, | |
1700 | size_t val_count) | |
1701 | { | |
1702 | int ret = 0, i; | |
1703 | size_t val_bytes = map->format.val_bytes; | |
8eaeb219 | 1704 | |
f4298360 | 1705 | if (map->bus && !map->format.parse_inplace) |
8eaeb219 | 1706 | return -EINVAL; |
f01ee60f SW |
1707 | if (reg % map->reg_stride) |
1708 | return -EINVAL; | |
8eaeb219 | 1709 | |
f4298360 SB |
1710 | /* |
1711 | * Some devices don't support bulk write, for | |
1712 | * them we have a series of single write operations. | |
1713 | */ | |
1714 | if (!map->bus || map->use_single_rw) { | |
4999e962 | 1715 | map->lock(map->lock_arg); |
f4298360 SB |
1716 | for (i = 0; i < val_count; i++) { |
1717 | unsigned int ival; | |
1718 | ||
1719 | switch (val_bytes) { | |
1720 | case 1: | |
1721 | ival = *(u8 *)(val + (i * val_bytes)); | |
1722 | break; | |
1723 | case 2: | |
1724 | ival = *(u16 *)(val + (i * val_bytes)); | |
1725 | break; | |
1726 | case 4: | |
1727 | ival = *(u32 *)(val + (i * val_bytes)); | |
1728 | break; | |
1729 | #ifdef CONFIG_64BIT | |
1730 | case 8: | |
1731 | ival = *(u64 *)(val + (i * val_bytes)); | |
1732 | break; | |
1733 | #endif | |
1734 | default: | |
1735 | ret = -EINVAL; | |
1736 | goto out; | |
1737 | } | |
8eaeb219 | 1738 | |
f4298360 SB |
1739 | ret = _regmap_write(map, reg + (i * map->reg_stride), |
1740 | ival); | |
1741 | if (ret != 0) | |
1742 | goto out; | |
1743 | } | |
4999e962 TI |
1744 | out: |
1745 | map->unlock(map->lock_arg); | |
8eaeb219 | 1746 | } else { |
f4298360 SB |
1747 | void *wval; |
1748 | ||
8eaeb219 LD |
1749 | wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL); |
1750 | if (!wval) { | |
8eaeb219 | 1751 | dev_err(map->dev, "Error in memory allocation\n"); |
4999e962 | 1752 | return -ENOMEM; |
8eaeb219 LD |
1753 | } |
1754 | for (i = 0; i < val_count * val_bytes; i += val_bytes) | |
8a819ff8 | 1755 | map->format.parse_inplace(wval + i); |
f4298360 | 1756 | |
4999e962 | 1757 | map->lock(map->lock_arg); |
0a819809 | 1758 | ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count); |
4999e962 | 1759 | map->unlock(map->lock_arg); |
8eaeb219 | 1760 | |
8eaeb219 | 1761 | kfree(wval); |
f4298360 | 1762 | } |
8eaeb219 LD |
1763 | return ret; |
1764 | } | |
1765 | EXPORT_SYMBOL_GPL(regmap_bulk_write); | |
1766 | ||
e894c3f4 OAO |
1767 | /* |
1768 | * _regmap_raw_multi_reg_write() | |
1769 | * | |
1770 | * the (register,newvalue) pairs in regs have not been formatted, but | |
1771 | * they are all in the same page and have been changed to being page | |
1772 | * relative. The page register has been written if that was neccessary. | |
1773 | */ | |
1774 | static int _regmap_raw_multi_reg_write(struct regmap *map, | |
1775 | const struct reg_default *regs, | |
1776 | size_t num_regs) | |
1777 | { | |
1778 | int ret; | |
1779 | void *buf; | |
1780 | int i; | |
1781 | u8 *u8; | |
1782 | size_t val_bytes = map->format.val_bytes; | |
1783 | size_t reg_bytes = map->format.reg_bytes; | |
1784 | size_t pad_bytes = map->format.pad_bytes; | |
1785 | size_t pair_size = reg_bytes + pad_bytes + val_bytes; | |
1786 | size_t len = pair_size * num_regs; | |
1787 | ||
f5727cd3 XL |
1788 | if (!len) |
1789 | return -EINVAL; | |
1790 | ||
e894c3f4 OAO |
1791 | buf = kzalloc(len, GFP_KERNEL); |
1792 | if (!buf) | |
1793 | return -ENOMEM; | |
1794 | ||
1795 | /* We have to linearise by hand. */ | |
1796 | ||
1797 | u8 = buf; | |
1798 | ||
1799 | for (i = 0; i < num_regs; i++) { | |
1800 | int reg = regs[i].reg; | |
1801 | int val = regs[i].def; | |
1802 | trace_regmap_hw_write_start(map->dev, reg, 1); | |
1803 | map->format.format_reg(u8, reg, map->reg_shift); | |
1804 | u8 += reg_bytes + pad_bytes; | |
1805 | map->format.format_val(u8, val, 0); | |
1806 | u8 += val_bytes; | |
1807 | } | |
1808 | u8 = buf; | |
1809 | *u8 |= map->write_flag_mask; | |
1810 | ||
1811 | ret = map->bus->write(map->bus_context, buf, len); | |
1812 | ||
1813 | kfree(buf); | |
1814 | ||
1815 | for (i = 0; i < num_regs; i++) { | |
1816 | int reg = regs[i].reg; | |
1817 | trace_regmap_hw_write_done(map->dev, reg, 1); | |
1818 | } | |
1819 | return ret; | |
1820 | } | |
1821 | ||
1822 | static unsigned int _regmap_register_page(struct regmap *map, | |
1823 | unsigned int reg, | |
1824 | struct regmap_range_node *range) | |
1825 | { | |
1826 | unsigned int win_page = (reg - range->range_min) / range->window_len; | |
1827 | ||
1828 | return win_page; | |
1829 | } | |
1830 | ||
1831 | static int _regmap_range_multi_paged_reg_write(struct regmap *map, | |
1832 | struct reg_default *regs, | |
1833 | size_t num_regs) | |
1834 | { | |
1835 | int ret; | |
1836 | int i, n; | |
1837 | struct reg_default *base; | |
b48d1398 | 1838 | unsigned int this_page = 0; |
e894c3f4 OAO |
1839 | /* |
1840 | * the set of registers are not neccessarily in order, but | |
1841 | * since the order of write must be preserved this algorithm | |
1842 | * chops the set each time the page changes | |
1843 | */ | |
1844 | base = regs; | |
1845 | for (i = 0, n = 0; i < num_regs; i++, n++) { | |
1846 | unsigned int reg = regs[i].reg; | |
1847 | struct regmap_range_node *range; | |
1848 | ||
1849 | range = _regmap_range_lookup(map, reg); | |
1850 | if (range) { | |
1851 | unsigned int win_page = _regmap_register_page(map, reg, | |
1852 | range); | |
1853 | ||
1854 | if (i == 0) | |
1855 | this_page = win_page; | |
1856 | if (win_page != this_page) { | |
1857 | this_page = win_page; | |
1858 | ret = _regmap_raw_multi_reg_write(map, base, n); | |
1859 | if (ret != 0) | |
1860 | return ret; | |
1861 | base += n; | |
1862 | n = 0; | |
1863 | } | |
1864 | ret = _regmap_select_page(map, &base[n].reg, range, 1); | |
1865 | if (ret != 0) | |
1866 | return ret; | |
1867 | } | |
1868 | } | |
1869 | if (n > 0) | |
1870 | return _regmap_raw_multi_reg_write(map, base, n); | |
1871 | return 0; | |
1872 | } | |
1873 | ||
1d5b40bc CK |
1874 | static int _regmap_multi_reg_write(struct regmap *map, |
1875 | const struct reg_default *regs, | |
e894c3f4 | 1876 | size_t num_regs) |
1d5b40bc | 1877 | { |
e894c3f4 OAO |
1878 | int i; |
1879 | int ret; | |
1880 | ||
1881 | if (!map->can_multi_write) { | |
1882 | for (i = 0; i < num_regs; i++) { | |
1883 | ret = _regmap_write(map, regs[i].reg, regs[i].def); | |
1884 | if (ret != 0) | |
1885 | return ret; | |
1886 | } | |
1887 | return 0; | |
1888 | } | |
1889 | ||
1890 | if (!map->format.parse_inplace) | |
1891 | return -EINVAL; | |
1892 | ||
1893 | if (map->writeable_reg) | |
1894 | for (i = 0; i < num_regs; i++) { | |
1895 | int reg = regs[i].reg; | |
1896 | if (!map->writeable_reg(map->dev, reg)) | |
1897 | return -EINVAL; | |
1898 | if (reg % map->reg_stride) | |
1899 | return -EINVAL; | |
1900 | } | |
1901 | ||
1902 | if (!map->cache_bypass) { | |
1903 | for (i = 0; i < num_regs; i++) { | |
1904 | unsigned int val = regs[i].def; | |
1905 | unsigned int reg = regs[i].reg; | |
1906 | ret = regcache_write(map, reg, val); | |
1907 | if (ret) { | |
1908 | dev_err(map->dev, | |
1909 | "Error in caching of register: %x ret: %d\n", | |
1910 | reg, ret); | |
1911 | return ret; | |
1912 | } | |
1913 | } | |
1914 | if (map->cache_only) { | |
1915 | map->cache_dirty = true; | |
1916 | return 0; | |
1917 | } | |
1918 | } | |
1919 | ||
1920 | WARN_ON(!map->bus); | |
1d5b40bc CK |
1921 | |
1922 | for (i = 0; i < num_regs; i++) { | |
e894c3f4 OAO |
1923 | unsigned int reg = regs[i].reg; |
1924 | struct regmap_range_node *range; | |
1925 | range = _regmap_range_lookup(map, reg); | |
1926 | if (range) { | |
1927 | size_t len = sizeof(struct reg_default)*num_regs; | |
1928 | struct reg_default *base = kmemdup(regs, len, | |
1929 | GFP_KERNEL); | |
1930 | if (!base) | |
1931 | return -ENOMEM; | |
1932 | ret = _regmap_range_multi_paged_reg_write(map, base, | |
1933 | num_regs); | |
1934 | kfree(base); | |
1935 | ||
1d5b40bc CK |
1936 | return ret; |
1937 | } | |
1938 | } | |
e894c3f4 | 1939 | return _regmap_raw_multi_reg_write(map, regs, num_regs); |
1d5b40bc CK |
1940 | } |
1941 | ||
e33fabd3 AO |
1942 | /* |
1943 | * regmap_multi_reg_write(): Write multiple registers to the device | |
1944 | * | |
e894c3f4 OAO |
1945 | * where the set of register,value pairs are supplied in any order, |
1946 | * possibly not all in a single range. | |
e33fabd3 AO |
1947 | * |
1948 | * @map: Register map to write to | |
1949 | * @regs: Array of structures containing register,value to be written | |
1950 | * @num_regs: Number of registers to write | |
1951 | * | |
e894c3f4 OAO |
1952 | * The 'normal' block write mode will send ultimately send data on the |
1953 | * target bus as R,V1,V2,V3,..,Vn where successively higer registers are | |
1954 | * addressed. However, this alternative block multi write mode will send | |
1955 | * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device | |
1956 | * must of course support the mode. | |
e33fabd3 | 1957 | * |
e894c3f4 OAO |
1958 | * A value of zero will be returned on success, a negative errno will be |
1959 | * returned in error cases. | |
e33fabd3 | 1960 | */ |
f7e2cec0 CK |
1961 | int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, |
1962 | int num_regs) | |
e33fabd3 | 1963 | { |
1d5b40bc | 1964 | int ret; |
e33fabd3 AO |
1965 | |
1966 | map->lock(map->lock_arg); | |
1967 | ||
1d5b40bc CK |
1968 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
1969 | ||
e33fabd3 AO |
1970 | map->unlock(map->lock_arg); |
1971 | ||
1972 | return ret; | |
1973 | } | |
1974 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write); | |
1975 | ||
1d5b40bc CK |
1976 | /* |
1977 | * regmap_multi_reg_write_bypassed(): Write multiple registers to the | |
1978 | * device but not the cache | |
1979 | * | |
e33fabd3 AO |
1980 | * where the set of register are supplied in any order |
1981 | * | |
1982 | * @map: Register map to write to | |
1983 | * @regs: Array of structures containing register,value to be written | |
1984 | * @num_regs: Number of registers to write | |
1985 | * | |
1986 | * This function is intended to be used for writing a large block of data | |
1987 | * atomically to the device in single transfer for those I2C client devices | |
1988 | * that implement this alternative block write mode. | |
1989 | * | |
1990 | * A value of zero will be returned on success, a negative errno will | |
1991 | * be returned in error cases. | |
1992 | */ | |
1d5b40bc CK |
1993 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
1994 | const struct reg_default *regs, | |
1995 | int num_regs) | |
e33fabd3 | 1996 | { |
1d5b40bc CK |
1997 | int ret; |
1998 | bool bypass; | |
e33fabd3 AO |
1999 | |
2000 | map->lock(map->lock_arg); | |
2001 | ||
1d5b40bc CK |
2002 | bypass = map->cache_bypass; |
2003 | map->cache_bypass = true; | |
2004 | ||
2005 | ret = _regmap_multi_reg_write(map, regs, num_regs); | |
2006 | ||
2007 | map->cache_bypass = bypass; | |
2008 | ||
e33fabd3 AO |
2009 | map->unlock(map->lock_arg); |
2010 | ||
2011 | return ret; | |
2012 | } | |
1d5b40bc | 2013 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); |
e33fabd3 | 2014 | |
0d509f2b MB |
2015 | /** |
2016 | * regmap_raw_write_async(): Write raw values to one or more registers | |
2017 | * asynchronously | |
2018 | * | |
2019 | * @map: Register map to write to | |
2020 | * @reg: Initial register to write to | |
2021 | * @val: Block of data to be written, laid out for direct transmission to the | |
2022 | * device. Must be valid until regmap_async_complete() is called. | |
2023 | * @val_len: Length of data pointed to by val. | |
2024 | * | |
2025 | * This function is intended to be used for things like firmware | |
2026 | * download where a large block of data needs to be transferred to the | |
2027 | * device. No formatting will be done on the data provided. | |
2028 | * | |
2029 | * If supported by the underlying bus the write will be scheduled | |
2030 | * asynchronously, helping maximise I/O speed on higher speed buses | |
2031 | * like SPI. regmap_async_complete() can be called to ensure that all | |
2032 | * asynchrnous writes have been completed. | |
2033 | * | |
2034 | * A value of zero will be returned on success, a negative errno will | |
2035 | * be returned in error cases. | |
2036 | */ | |
2037 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, | |
2038 | const void *val, size_t val_len) | |
2039 | { | |
2040 | int ret; | |
2041 | ||
2042 | if (val_len % map->format.val_bytes) | |
2043 | return -EINVAL; | |
2044 | if (reg % map->reg_stride) | |
2045 | return -EINVAL; | |
2046 | ||
2047 | map->lock(map->lock_arg); | |
2048 | ||
0a819809 MB |
2049 | map->async = true; |
2050 | ||
2051 | ret = _regmap_raw_write(map, reg, val, val_len); | |
2052 | ||
2053 | map->async = false; | |
0d509f2b MB |
2054 | |
2055 | map->unlock(map->lock_arg); | |
2056 | ||
2057 | return ret; | |
2058 | } | |
2059 | EXPORT_SYMBOL_GPL(regmap_raw_write_async); | |
2060 | ||
b83a313b MB |
2061 | static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, |
2062 | unsigned int val_len) | |
2063 | { | |
98bc7dfd | 2064 | struct regmap_range_node *range; |
b83a313b MB |
2065 | u8 *u8 = map->work_buf; |
2066 | int ret; | |
2067 | ||
f1b5c5c3 | 2068 | WARN_ON(!map->bus); |
d2a5884a | 2069 | |
98bc7dfd MB |
2070 | range = _regmap_range_lookup(map, reg); |
2071 | if (range) { | |
2072 | ret = _regmap_select_page(map, ®, range, | |
2073 | val_len / map->format.val_bytes); | |
0ff3e62f | 2074 | if (ret != 0) |
98bc7dfd MB |
2075 | return ret; |
2076 | } | |
6863ca62 | 2077 | |
d939fb9a | 2078 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
b83a313b MB |
2079 | |
2080 | /* | |
6f306441 | 2081 | * Some buses or devices flag reads by setting the high bits in the |
b83a313b MB |
2082 | * register addresss; since it's always the high bits for all |
2083 | * current formats we can do this here rather than in | |
2084 | * formatting. This may break if we get interesting formats. | |
2085 | */ | |
6f306441 | 2086 | u8[0] |= map->read_flag_mask; |
b83a313b | 2087 | |
fb2736bb MB |
2088 | trace_regmap_hw_read_start(map->dev, reg, |
2089 | val_len / map->format.val_bytes); | |
2090 | ||
0135bbcc | 2091 | ret = map->bus->read(map->bus_context, map->work_buf, |
82159ba8 | 2092 | map->format.reg_bytes + map->format.pad_bytes, |
40c5cc26 | 2093 | val, val_len); |
b83a313b | 2094 | |
fb2736bb MB |
2095 | trace_regmap_hw_read_done(map->dev, reg, |
2096 | val_len / map->format.val_bytes); | |
2097 | ||
2098 | return ret; | |
b83a313b MB |
2099 | } |
2100 | ||
3ac17037 BB |
2101 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
2102 | unsigned int *val) | |
2103 | { | |
2104 | struct regmap *map = context; | |
2105 | ||
2106 | return map->bus->reg_read(map->bus_context, reg, val); | |
2107 | } | |
2108 | ||
ad278406 AS |
2109 | static int _regmap_bus_read(void *context, unsigned int reg, |
2110 | unsigned int *val) | |
2111 | { | |
2112 | int ret; | |
2113 | struct regmap *map = context; | |
2114 | ||
2115 | if (!map->format.parse_val) | |
2116 | return -EINVAL; | |
2117 | ||
2118 | ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes); | |
2119 | if (ret == 0) | |
2120 | *val = map->format.parse_val(map->work_buf); | |
2121 | ||
2122 | return ret; | |
2123 | } | |
2124 | ||
b83a313b MB |
2125 | static int _regmap_read(struct regmap *map, unsigned int reg, |
2126 | unsigned int *val) | |
2127 | { | |
2128 | int ret; | |
d2a5884a AS |
2129 | void *context = _regmap_map_get_context(map); |
2130 | ||
f1b5c5c3 | 2131 | WARN_ON(!map->reg_read); |
b83a313b | 2132 | |
5d1729e7 DP |
2133 | if (!map->cache_bypass) { |
2134 | ret = regcache_read(map, reg, val); | |
2135 | if (ret == 0) | |
2136 | return 0; | |
2137 | } | |
2138 | ||
2139 | if (map->cache_only) | |
2140 | return -EBUSY; | |
2141 | ||
d4807ad2 MS |
2142 | if (!regmap_readable(map, reg)) |
2143 | return -EIO; | |
2144 | ||
d2a5884a | 2145 | ret = map->reg_read(context, reg, val); |
fb2736bb | 2146 | if (ret == 0) { |
1044c180 MB |
2147 | #ifdef LOG_DEVICE |
2148 | if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0) | |
2149 | dev_info(map->dev, "%x => %x\n", reg, *val); | |
2150 | #endif | |
2151 | ||
fb2736bb | 2152 | trace_regmap_reg_read(map->dev, reg, *val); |
b83a313b | 2153 | |
ad278406 AS |
2154 | if (!map->cache_bypass) |
2155 | regcache_write(map, reg, *val); | |
2156 | } | |
f2985367 | 2157 | |
b83a313b MB |
2158 | return ret; |
2159 | } | |
2160 | ||
2161 | /** | |
2162 | * regmap_read(): Read a value from a single register | |
2163 | * | |
0093380c | 2164 | * @map: Register map to read from |
b83a313b MB |
2165 | * @reg: Register to be read from |
2166 | * @val: Pointer to store read value | |
2167 | * | |
2168 | * A value of zero will be returned on success, a negative errno will | |
2169 | * be returned in error cases. | |
2170 | */ | |
2171 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) | |
2172 | { | |
2173 | int ret; | |
2174 | ||
f01ee60f SW |
2175 | if (reg % map->reg_stride) |
2176 | return -EINVAL; | |
2177 | ||
0d4529c5 | 2178 | map->lock(map->lock_arg); |
b83a313b MB |
2179 | |
2180 | ret = _regmap_read(map, reg, val); | |
2181 | ||
0d4529c5 | 2182 | map->unlock(map->lock_arg); |
b83a313b MB |
2183 | |
2184 | return ret; | |
2185 | } | |
2186 | EXPORT_SYMBOL_GPL(regmap_read); | |
2187 | ||
2188 | /** | |
2189 | * regmap_raw_read(): Read raw data from the device | |
2190 | * | |
0093380c | 2191 | * @map: Register map to read from |
b83a313b MB |
2192 | * @reg: First register to be read from |
2193 | * @val: Pointer to store read value | |
2194 | * @val_len: Size of data to read | |
2195 | * | |
2196 | * A value of zero will be returned on success, a negative errno will | |
2197 | * be returned in error cases. | |
2198 | */ | |
2199 | int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, | |
2200 | size_t val_len) | |
2201 | { | |
b8fb5ab1 MB |
2202 | size_t val_bytes = map->format.val_bytes; |
2203 | size_t val_count = val_len / val_bytes; | |
2204 | unsigned int v; | |
2205 | int ret, i; | |
04e016ad | 2206 | |
d2a5884a AS |
2207 | if (!map->bus) |
2208 | return -EINVAL; | |
851960ba SW |
2209 | if (val_len % map->format.val_bytes) |
2210 | return -EINVAL; | |
f01ee60f SW |
2211 | if (reg % map->reg_stride) |
2212 | return -EINVAL; | |
851960ba | 2213 | |
0d4529c5 | 2214 | map->lock(map->lock_arg); |
b83a313b | 2215 | |
b8fb5ab1 MB |
2216 | if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || |
2217 | map->cache_type == REGCACHE_NONE) { | |
2218 | /* Physical block read if there's no cache involved */ | |
2219 | ret = _regmap_raw_read(map, reg, val, val_len); | |
2220 | ||
2221 | } else { | |
2222 | /* Otherwise go word by word for the cache; should be low | |
2223 | * cost as we expect to hit the cache. | |
2224 | */ | |
2225 | for (i = 0; i < val_count; i++) { | |
f01ee60f SW |
2226 | ret = _regmap_read(map, reg + (i * map->reg_stride), |
2227 | &v); | |
b8fb5ab1 MB |
2228 | if (ret != 0) |
2229 | goto out; | |
2230 | ||
d939fb9a | 2231 | map->format.format_val(val + (i * val_bytes), v, 0); |
b8fb5ab1 MB |
2232 | } |
2233 | } | |
b83a313b | 2234 | |
b8fb5ab1 | 2235 | out: |
0d4529c5 | 2236 | map->unlock(map->lock_arg); |
b83a313b MB |
2237 | |
2238 | return ret; | |
2239 | } | |
2240 | EXPORT_SYMBOL_GPL(regmap_raw_read); | |
2241 | ||
67252287 SK |
2242 | /** |
2243 | * regmap_field_read(): Read a value to a single register field | |
2244 | * | |
2245 | * @field: Register field to read from | |
2246 | * @val: Pointer to store read value | |
2247 | * | |
2248 | * A value of zero will be returned on success, a negative errno will | |
2249 | * be returned in error cases. | |
2250 | */ | |
2251 | int regmap_field_read(struct regmap_field *field, unsigned int *val) | |
2252 | { | |
2253 | int ret; | |
2254 | unsigned int reg_val; | |
2255 | ret = regmap_read(field->regmap, field->reg, ®_val); | |
2256 | if (ret != 0) | |
2257 | return ret; | |
2258 | ||
2259 | reg_val &= field->mask; | |
2260 | reg_val >>= field->shift; | |
2261 | *val = reg_val; | |
2262 | ||
2263 | return ret; | |
2264 | } | |
2265 | EXPORT_SYMBOL_GPL(regmap_field_read); | |
2266 | ||
a0102375 KM |
2267 | /** |
2268 | * regmap_fields_read(): Read a value to a single register field with port ID | |
2269 | * | |
2270 | * @field: Register field to read from | |
2271 | * @id: port ID | |
2272 | * @val: Pointer to store read value | |
2273 | * | |
2274 | * A value of zero will be returned on success, a negative errno will | |
2275 | * be returned in error cases. | |
2276 | */ | |
2277 | int regmap_fields_read(struct regmap_field *field, unsigned int id, | |
2278 | unsigned int *val) | |
2279 | { | |
2280 | int ret; | |
2281 | unsigned int reg_val; | |
2282 | ||
2283 | if (id >= field->id_size) | |
2284 | return -EINVAL; | |
2285 | ||
2286 | ret = regmap_read(field->regmap, | |
2287 | field->reg + (field->id_offset * id), | |
2288 | ®_val); | |
2289 | if (ret != 0) | |
2290 | return ret; | |
2291 | ||
2292 | reg_val &= field->mask; | |
2293 | reg_val >>= field->shift; | |
2294 | *val = reg_val; | |
2295 | ||
2296 | return ret; | |
2297 | } | |
2298 | EXPORT_SYMBOL_GPL(regmap_fields_read); | |
2299 | ||
b83a313b MB |
2300 | /** |
2301 | * regmap_bulk_read(): Read multiple registers from the device | |
2302 | * | |
0093380c | 2303 | * @map: Register map to read from |
b83a313b MB |
2304 | * @reg: First register to be read from |
2305 | * @val: Pointer to store read value, in native register size for device | |
2306 | * @val_count: Number of registers to read | |
2307 | * | |
2308 | * A value of zero will be returned on success, a negative errno will | |
2309 | * be returned in error cases. | |
2310 | */ | |
2311 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
2312 | size_t val_count) | |
2313 | { | |
2314 | int ret, i; | |
2315 | size_t val_bytes = map->format.val_bytes; | |
82cd9965 | 2316 | bool vol = regmap_volatile_range(map, reg, val_count); |
5d1729e7 | 2317 | |
f01ee60f SW |
2318 | if (reg % map->reg_stride) |
2319 | return -EINVAL; | |
b83a313b | 2320 | |
3b58ee13 | 2321 | if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { |
2e33caf1 AJ |
2322 | /* |
2323 | * Some devices does not support bulk read, for | |
2324 | * them we have a series of single read operations. | |
2325 | */ | |
2326 | if (map->use_single_rw) { | |
2327 | for (i = 0; i < val_count; i++) { | |
2328 | ret = regmap_raw_read(map, | |
2329 | reg + (i * map->reg_stride), | |
2330 | val + (i * val_bytes), | |
2331 | val_bytes); | |
2332 | if (ret != 0) | |
2333 | return ret; | |
2334 | } | |
2335 | } else { | |
2336 | ret = regmap_raw_read(map, reg, val, | |
2337 | val_bytes * val_count); | |
2338 | if (ret != 0) | |
2339 | return ret; | |
2340 | } | |
de2d808f MB |
2341 | |
2342 | for (i = 0; i < val_count * val_bytes; i += val_bytes) | |
8a819ff8 | 2343 | map->format.parse_inplace(val + i); |
de2d808f MB |
2344 | } else { |
2345 | for (i = 0; i < val_count; i++) { | |
6560ffd1 | 2346 | unsigned int ival; |
f01ee60f | 2347 | ret = regmap_read(map, reg + (i * map->reg_stride), |
25061d28 | 2348 | &ival); |
de2d808f MB |
2349 | if (ret != 0) |
2350 | return ret; | |
6560ffd1 | 2351 | memcpy(val + (i * val_bytes), &ival, val_bytes); |
de2d808f MB |
2352 | } |
2353 | } | |
b83a313b MB |
2354 | |
2355 | return 0; | |
2356 | } | |
2357 | EXPORT_SYMBOL_GPL(regmap_bulk_read); | |
2358 | ||
018690d3 MB |
2359 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, |
2360 | unsigned int mask, unsigned int val, | |
2361 | bool *change) | |
b83a313b MB |
2362 | { |
2363 | int ret; | |
d91e8db2 | 2364 | unsigned int tmp, orig; |
b83a313b | 2365 | |
d91e8db2 | 2366 | ret = _regmap_read(map, reg, &orig); |
b83a313b | 2367 | if (ret != 0) |
fc3ebd78 | 2368 | return ret; |
b83a313b | 2369 | |
d91e8db2 | 2370 | tmp = orig & ~mask; |
b83a313b MB |
2371 | tmp |= val & mask; |
2372 | ||
018690d3 | 2373 | if (tmp != orig) { |
d91e8db2 | 2374 | ret = _regmap_write(map, reg, tmp); |
e2f74dc6 XL |
2375 | if (change) |
2376 | *change = true; | |
018690d3 | 2377 | } else { |
e2f74dc6 XL |
2378 | if (change) |
2379 | *change = false; | |
018690d3 | 2380 | } |
b83a313b | 2381 | |
b83a313b MB |
2382 | return ret; |
2383 | } | |
018690d3 MB |
2384 | |
2385 | /** | |
2386 | * regmap_update_bits: Perform a read/modify/write cycle on the register map | |
2387 | * | |
2388 | * @map: Register map to update | |
2389 | * @reg: Register to update | |
2390 | * @mask: Bitmask to change | |
2391 | * @val: New value for bitmask | |
2392 | * | |
2393 | * Returns zero for success, a negative number on error. | |
2394 | */ | |
2395 | int regmap_update_bits(struct regmap *map, unsigned int reg, | |
2396 | unsigned int mask, unsigned int val) | |
2397 | { | |
fc3ebd78 KG |
2398 | int ret; |
2399 | ||
0d4529c5 | 2400 | map->lock(map->lock_arg); |
e2f74dc6 | 2401 | ret = _regmap_update_bits(map, reg, mask, val, NULL); |
0d4529c5 | 2402 | map->unlock(map->lock_arg); |
fc3ebd78 KG |
2403 | |
2404 | return ret; | |
018690d3 | 2405 | } |
b83a313b | 2406 | EXPORT_SYMBOL_GPL(regmap_update_bits); |
31244e39 | 2407 | |
915f441b MB |
2408 | /** |
2409 | * regmap_update_bits_async: Perform a read/modify/write cycle on the register | |
2410 | * map asynchronously | |
2411 | * | |
2412 | * @map: Register map to update | |
2413 | * @reg: Register to update | |
2414 | * @mask: Bitmask to change | |
2415 | * @val: New value for bitmask | |
2416 | * | |
2417 | * With most buses the read must be done synchronously so this is most | |
2418 | * useful for devices with a cache which do not need to interact with | |
2419 | * the hardware to determine the current register value. | |
2420 | * | |
2421 | * Returns zero for success, a negative number on error. | |
2422 | */ | |
2423 | int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
2424 | unsigned int mask, unsigned int val) | |
2425 | { | |
915f441b MB |
2426 | int ret; |
2427 | ||
2428 | map->lock(map->lock_arg); | |
2429 | ||
2430 | map->async = true; | |
2431 | ||
e2f74dc6 | 2432 | ret = _regmap_update_bits(map, reg, mask, val, NULL); |
915f441b MB |
2433 | |
2434 | map->async = false; | |
2435 | ||
2436 | map->unlock(map->lock_arg); | |
2437 | ||
2438 | return ret; | |
2439 | } | |
2440 | EXPORT_SYMBOL_GPL(regmap_update_bits_async); | |
2441 | ||
018690d3 MB |
2442 | /** |
2443 | * regmap_update_bits_check: Perform a read/modify/write cycle on the | |
2444 | * register map and report if updated | |
2445 | * | |
2446 | * @map: Register map to update | |
2447 | * @reg: Register to update | |
2448 | * @mask: Bitmask to change | |
2449 | * @val: New value for bitmask | |
2450 | * @change: Boolean indicating if a write was done | |
2451 | * | |
2452 | * Returns zero for success, a negative number on error. | |
2453 | */ | |
2454 | int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
2455 | unsigned int mask, unsigned int val, | |
2456 | bool *change) | |
2457 | { | |
fc3ebd78 KG |
2458 | int ret; |
2459 | ||
0d4529c5 | 2460 | map->lock(map->lock_arg); |
fc3ebd78 | 2461 | ret = _regmap_update_bits(map, reg, mask, val, change); |
0d4529c5 | 2462 | map->unlock(map->lock_arg); |
fc3ebd78 | 2463 | return ret; |
018690d3 MB |
2464 | } |
2465 | EXPORT_SYMBOL_GPL(regmap_update_bits_check); | |
2466 | ||
915f441b MB |
2467 | /** |
2468 | * regmap_update_bits_check_async: Perform a read/modify/write cycle on the | |
2469 | * register map asynchronously and report if | |
2470 | * updated | |
2471 | * | |
2472 | * @map: Register map to update | |
2473 | * @reg: Register to update | |
2474 | * @mask: Bitmask to change | |
2475 | * @val: New value for bitmask | |
2476 | * @change: Boolean indicating if a write was done | |
2477 | * | |
2478 | * With most buses the read must be done synchronously so this is most | |
2479 | * useful for devices with a cache which do not need to interact with | |
2480 | * the hardware to determine the current register value. | |
2481 | * | |
2482 | * Returns zero for success, a negative number on error. | |
2483 | */ | |
2484 | int regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
2485 | unsigned int mask, unsigned int val, | |
2486 | bool *change) | |
2487 | { | |
2488 | int ret; | |
2489 | ||
2490 | map->lock(map->lock_arg); | |
2491 | ||
2492 | map->async = true; | |
2493 | ||
2494 | ret = _regmap_update_bits(map, reg, mask, val, change); | |
2495 | ||
2496 | map->async = false; | |
2497 | ||
2498 | map->unlock(map->lock_arg); | |
2499 | ||
2500 | return ret; | |
2501 | } | |
2502 | EXPORT_SYMBOL_GPL(regmap_update_bits_check_async); | |
2503 | ||
0d509f2b MB |
2504 | void regmap_async_complete_cb(struct regmap_async *async, int ret) |
2505 | { | |
2506 | struct regmap *map = async->map; | |
2507 | bool wake; | |
2508 | ||
fe7d4ccd MB |
2509 | trace_regmap_async_io_complete(map->dev); |
2510 | ||
0d509f2b | 2511 | spin_lock(&map->async_lock); |
7e09a979 | 2512 | list_move(&async->list, &map->async_free); |
0d509f2b MB |
2513 | wake = list_empty(&map->async_list); |
2514 | ||
2515 | if (ret != 0) | |
2516 | map->async_ret = ret; | |
2517 | ||
2518 | spin_unlock(&map->async_lock); | |
2519 | ||
0d509f2b MB |
2520 | if (wake) |
2521 | wake_up(&map->async_waitq); | |
2522 | } | |
f804fb56 | 2523 | EXPORT_SYMBOL_GPL(regmap_async_complete_cb); |
0d509f2b MB |
2524 | |
2525 | static int regmap_async_is_done(struct regmap *map) | |
2526 | { | |
2527 | unsigned long flags; | |
2528 | int ret; | |
2529 | ||
2530 | spin_lock_irqsave(&map->async_lock, flags); | |
2531 | ret = list_empty(&map->async_list); | |
2532 | spin_unlock_irqrestore(&map->async_lock, flags); | |
2533 | ||
2534 | return ret; | |
2535 | } | |
2536 | ||
2537 | /** | |
2538 | * regmap_async_complete: Ensure all asynchronous I/O has completed. | |
2539 | * | |
2540 | * @map: Map to operate on. | |
2541 | * | |
2542 | * Blocks until any pending asynchronous I/O has completed. Returns | |
2543 | * an error code for any failed I/O operations. | |
2544 | */ | |
2545 | int regmap_async_complete(struct regmap *map) | |
2546 | { | |
2547 | unsigned long flags; | |
2548 | int ret; | |
2549 | ||
2550 | /* Nothing to do with no async support */ | |
f2e055e7 | 2551 | if (!map->bus || !map->bus->async_write) |
0d509f2b MB |
2552 | return 0; |
2553 | ||
fe7d4ccd MB |
2554 | trace_regmap_async_complete_start(map->dev); |
2555 | ||
0d509f2b MB |
2556 | wait_event(map->async_waitq, regmap_async_is_done(map)); |
2557 | ||
2558 | spin_lock_irqsave(&map->async_lock, flags); | |
2559 | ret = map->async_ret; | |
2560 | map->async_ret = 0; | |
2561 | spin_unlock_irqrestore(&map->async_lock, flags); | |
2562 | ||
fe7d4ccd MB |
2563 | trace_regmap_async_complete_done(map->dev); |
2564 | ||
0d509f2b MB |
2565 | return ret; |
2566 | } | |
f88948ef | 2567 | EXPORT_SYMBOL_GPL(regmap_async_complete); |
0d509f2b | 2568 | |
22f0d90a MB |
2569 | /** |
2570 | * regmap_register_patch: Register and apply register updates to be applied | |
2571 | * on device initialistion | |
2572 | * | |
2573 | * @map: Register map to apply updates to. | |
2574 | * @regs: Values to update. | |
2575 | * @num_regs: Number of entries in regs. | |
2576 | * | |
2577 | * Register a set of register updates to be applied to the device | |
2578 | * whenever the device registers are synchronised with the cache and | |
2579 | * apply them immediately. Typically this is used to apply | |
2580 | * corrections to be applied to the device defaults on startup, such | |
2581 | * as the updates some vendors provide to undocumented registers. | |
56fb1c74 MB |
2582 | * |
2583 | * The caller must ensure that this function cannot be called | |
2584 | * concurrently with either itself or regcache_sync(). | |
22f0d90a MB |
2585 | */ |
2586 | int regmap_register_patch(struct regmap *map, const struct reg_default *regs, | |
2587 | int num_regs) | |
2588 | { | |
aab13ebc | 2589 | struct reg_default *p; |
6bf13103 | 2590 | int ret; |
22f0d90a MB |
2591 | bool bypass; |
2592 | ||
bd60e381 CZ |
2593 | if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", |
2594 | num_regs)) | |
2595 | return 0; | |
2596 | ||
aab13ebc MB |
2597 | p = krealloc(map->patch, |
2598 | sizeof(struct reg_default) * (map->patch_regs + num_regs), | |
2599 | GFP_KERNEL); | |
2600 | if (p) { | |
2601 | memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); | |
2602 | map->patch = p; | |
2603 | map->patch_regs += num_regs; | |
22f0d90a | 2604 | } else { |
56fb1c74 | 2605 | return -ENOMEM; |
22f0d90a MB |
2606 | } |
2607 | ||
0d4529c5 | 2608 | map->lock(map->lock_arg); |
22f0d90a MB |
2609 | |
2610 | bypass = map->cache_bypass; | |
2611 | ||
2612 | map->cache_bypass = true; | |
1a25f261 | 2613 | map->async = true; |
22f0d90a | 2614 | |
6bf13103 CK |
2615 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
2616 | if (ret != 0) | |
2617 | goto out; | |
22f0d90a | 2618 | |
22f0d90a | 2619 | out: |
1a25f261 | 2620 | map->async = false; |
22f0d90a MB |
2621 | map->cache_bypass = bypass; |
2622 | ||
0d4529c5 | 2623 | map->unlock(map->lock_arg); |
22f0d90a | 2624 | |
1a25f261 MB |
2625 | regmap_async_complete(map); |
2626 | ||
22f0d90a MB |
2627 | return ret; |
2628 | } | |
2629 | EXPORT_SYMBOL_GPL(regmap_register_patch); | |
2630 | ||
eae4b51b | 2631 | /* |
a6539c32 MB |
2632 | * regmap_get_val_bytes(): Report the size of a register value |
2633 | * | |
2634 | * Report the size of a register value, mainly intended to for use by | |
2635 | * generic infrastructure built on top of regmap. | |
2636 | */ | |
2637 | int regmap_get_val_bytes(struct regmap *map) | |
2638 | { | |
2639 | if (map->format.format_write) | |
2640 | return -EINVAL; | |
2641 | ||
2642 | return map->format.val_bytes; | |
2643 | } | |
2644 | EXPORT_SYMBOL_GPL(regmap_get_val_bytes); | |
2645 | ||
13ff50c8 NC |
2646 | int regmap_parse_val(struct regmap *map, const void *buf, |
2647 | unsigned int *val) | |
2648 | { | |
2649 | if (!map->format.parse_val) | |
2650 | return -EINVAL; | |
2651 | ||
2652 | *val = map->format.parse_val(buf); | |
2653 | ||
2654 | return 0; | |
2655 | } | |
2656 | EXPORT_SYMBOL_GPL(regmap_parse_val); | |
2657 | ||
31244e39 MB |
2658 | static int __init regmap_initcall(void) |
2659 | { | |
2660 | regmap_debugfs_initcall(); | |
2661 | ||
2662 | return 0; | |
2663 | } | |
2664 | postcore_initcall(regmap_initcall); |