regmap: Fix regmap_bulk_write for bus writes
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
d647c199 18#include <linux/of.h>
6863ca62 19#include <linux/rbtree.h>
30b2a553 20#include <linux/sched.h>
b83a313b 21
fb2736bb 22#define CREATE_TRACE_POINTS
f58078da 23#include "trace.h"
fb2736bb 24
93de9124 25#include "internal.h"
b83a313b 26
1044c180
MB
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35static int _regmap_update_bits(struct regmap *map, unsigned int reg,
36 unsigned int mask, unsigned int val,
37 bool *change);
38
3ac17037
BB
39static int _regmap_bus_reg_read(void *context, unsigned int reg,
40 unsigned int *val);
ad278406
AS
41static int _regmap_bus_read(void *context, unsigned int reg,
42 unsigned int *val);
07c320dc
AS
43static int _regmap_bus_formatted_write(void *context, unsigned int reg,
44 unsigned int val);
3ac17037
BB
45static int _regmap_bus_reg_write(void *context, unsigned int reg,
46 unsigned int val);
07c320dc
AS
47static int _regmap_bus_raw_write(void *context, unsigned int reg,
48 unsigned int val);
ad278406 49
76aad392
DC
50bool regmap_reg_in_ranges(unsigned int reg,
51 const struct regmap_range *ranges,
52 unsigned int nranges)
53{
54 const struct regmap_range *r;
55 int i;
56
57 for (i = 0, r = ranges; i < nranges; i++, r++)
58 if (regmap_reg_in_range(reg, r))
59 return true;
60 return false;
61}
62EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
63
154881e5
MB
64bool regmap_check_range_table(struct regmap *map, unsigned int reg,
65 const struct regmap_access_table *table)
76aad392
DC
66{
67 /* Check "no ranges" first */
68 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
69 return false;
70
71 /* In case zero "yes ranges" are supplied, any reg is OK */
72 if (!table->n_yes_ranges)
73 return true;
74
75 return regmap_reg_in_ranges(reg, table->yes_ranges,
76 table->n_yes_ranges);
77}
154881e5 78EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 79
8de2f081
MB
80bool regmap_writeable(struct regmap *map, unsigned int reg)
81{
82 if (map->max_register && reg > map->max_register)
83 return false;
84
85 if (map->writeable_reg)
86 return map->writeable_reg(map->dev, reg);
87
76aad392 88 if (map->wr_table)
154881e5 89 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 90
8de2f081
MB
91 return true;
92}
93
94bool regmap_readable(struct regmap *map, unsigned int reg)
95{
04dc91ce
LPC
96 if (!map->reg_read)
97 return false;
98
8de2f081
MB
99 if (map->max_register && reg > map->max_register)
100 return false;
101
4191f197
WS
102 if (map->format.format_write)
103 return false;
104
8de2f081
MB
105 if (map->readable_reg)
106 return map->readable_reg(map->dev, reg);
107
76aad392 108 if (map->rd_table)
154881e5 109 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 110
8de2f081
MB
111 return true;
112}
113
114bool regmap_volatile(struct regmap *map, unsigned int reg)
115{
5844a8b9 116 if (!map->format.format_write && !regmap_readable(map, reg))
8de2f081
MB
117 return false;
118
119 if (map->volatile_reg)
120 return map->volatile_reg(map->dev, reg);
121
76aad392 122 if (map->volatile_table)
154881e5 123 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 124
b92be6fe
MB
125 if (map->cache_ops)
126 return false;
127 else
128 return true;
8de2f081
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129}
130
131bool regmap_precious(struct regmap *map, unsigned int reg)
132{
4191f197 133 if (!regmap_readable(map, reg))
8de2f081
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134 return false;
135
136 if (map->precious_reg)
137 return map->precious_reg(map->dev, reg);
138
76aad392 139 if (map->precious_table)
154881e5 140 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 141
8de2f081
MB
142 return false;
143}
144
82cd9965 145static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 146 size_t num)
82cd9965
LPC
147{
148 unsigned int i;
149
150 for (i = 0; i < num; i++)
151 if (!regmap_volatile(map, reg + i))
152 return false;
153
154 return true;
155}
156
9aa50750
WS
157static void regmap_format_2_6_write(struct regmap *map,
158 unsigned int reg, unsigned int val)
159{
160 u8 *out = map->work_buf;
161
162 *out = (reg << 6) | val;
163}
164
b83a313b
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165static void regmap_format_4_12_write(struct regmap *map,
166 unsigned int reg, unsigned int val)
167{
168 __be16 *out = map->work_buf;
169 *out = cpu_to_be16((reg << 12) | val);
170}
171
172static void regmap_format_7_9_write(struct regmap *map,
173 unsigned int reg, unsigned int val)
174{
175 __be16 *out = map->work_buf;
176 *out = cpu_to_be16((reg << 9) | val);
177}
178
7e5ec63e
LPC
179static void regmap_format_10_14_write(struct regmap *map,
180 unsigned int reg, unsigned int val)
181{
182 u8 *out = map->work_buf;
183
184 out[2] = val;
185 out[1] = (val >> 8) | (reg << 6);
186 out[0] = reg >> 2;
187}
188
d939fb9a 189static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
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190{
191 u8 *b = buf;
192
d939fb9a 193 b[0] = val << shift;
b83a313b
MB
194}
195
141eba2e 196static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
197{
198 __be16 *b = buf;
199
d939fb9a 200 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
201}
202
4aa8c069
XL
203static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
204{
205 __le16 *b = buf;
206
207 b[0] = cpu_to_le16(val << shift);
208}
209
141eba2e
SW
210static void regmap_format_16_native(void *buf, unsigned int val,
211 unsigned int shift)
212{
213 *(u16 *)buf = val << shift;
214}
215
d939fb9a 216static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
217{
218 u8 *b = buf;
219
d939fb9a
MR
220 val <<= shift;
221
ea279fc5
MR
222 b[0] = val >> 16;
223 b[1] = val >> 8;
224 b[2] = val;
225}
226
141eba2e 227static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
228{
229 __be32 *b = buf;
230
d939fb9a 231 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
232}
233
4aa8c069
XL
234static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
235{
236 __le32 *b = buf;
237
238 b[0] = cpu_to_le32(val << shift);
239}
240
141eba2e
SW
241static void regmap_format_32_native(void *buf, unsigned int val,
242 unsigned int shift)
243{
244 *(u32 *)buf = val << shift;
245}
246
8a819ff8 247static void regmap_parse_inplace_noop(void *buf)
b83a313b 248{
8a819ff8
MB
249}
250
251static unsigned int regmap_parse_8(const void *buf)
252{
253 const u8 *b = buf;
b83a313b
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254
255 return b[0];
256}
257
8a819ff8
MB
258static unsigned int regmap_parse_16_be(const void *buf)
259{
260 const __be16 *b = buf;
261
262 return be16_to_cpu(b[0]);
263}
264
4aa8c069
XL
265static unsigned int regmap_parse_16_le(const void *buf)
266{
267 const __le16 *b = buf;
268
269 return le16_to_cpu(b[0]);
270}
271
8a819ff8 272static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
273{
274 __be16 *b = buf;
275
276 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
277}
278
4aa8c069
XL
279static void regmap_parse_16_le_inplace(void *buf)
280{
281 __le16 *b = buf;
282
283 b[0] = le16_to_cpu(b[0]);
284}
285
8a819ff8 286static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
287{
288 return *(u16 *)buf;
289}
290
8a819ff8 291static unsigned int regmap_parse_24(const void *buf)
ea279fc5 292{
8a819ff8 293 const u8 *b = buf;
ea279fc5
MR
294 unsigned int ret = b[2];
295 ret |= ((unsigned int)b[1]) << 8;
296 ret |= ((unsigned int)b[0]) << 16;
297
298 return ret;
299}
300
8a819ff8
MB
301static unsigned int regmap_parse_32_be(const void *buf)
302{
303 const __be32 *b = buf;
304
305 return be32_to_cpu(b[0]);
306}
307
4aa8c069
XL
308static unsigned int regmap_parse_32_le(const void *buf)
309{
310 const __le32 *b = buf;
311
312 return le32_to_cpu(b[0]);
313}
314
8a819ff8 315static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
316{
317 __be32 *b = buf;
318
319 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
320}
321
4aa8c069
XL
322static void regmap_parse_32_le_inplace(void *buf)
323{
324 __le32 *b = buf;
325
326 b[0] = le32_to_cpu(b[0]);
327}
328
8a819ff8 329static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
330{
331 return *(u32 *)buf;
332}
333
0d4529c5 334static void regmap_lock_mutex(void *__map)
bacdbe07 335{
0d4529c5 336 struct regmap *map = __map;
bacdbe07
SW
337 mutex_lock(&map->mutex);
338}
339
0d4529c5 340static void regmap_unlock_mutex(void *__map)
bacdbe07 341{
0d4529c5 342 struct regmap *map = __map;
bacdbe07
SW
343 mutex_unlock(&map->mutex);
344}
345
0d4529c5 346static void regmap_lock_spinlock(void *__map)
b4519c71 347__acquires(&map->spinlock)
bacdbe07 348{
0d4529c5 349 struct regmap *map = __map;
92ab1aab
LPC
350 unsigned long flags;
351
352 spin_lock_irqsave(&map->spinlock, flags);
353 map->spinlock_flags = flags;
bacdbe07
SW
354}
355
0d4529c5 356static void regmap_unlock_spinlock(void *__map)
b4519c71 357__releases(&map->spinlock)
bacdbe07 358{
0d4529c5 359 struct regmap *map = __map;
92ab1aab 360 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
361}
362
72b39f6f
MB
363static void dev_get_regmap_release(struct device *dev, void *res)
364{
365 /*
366 * We don't actually have anything to do here; the goal here
367 * is not to manage the regmap but to provide a simple way to
368 * get the regmap back given a struct device.
369 */
370}
371
6863ca62
KG
372static bool _regmap_range_add(struct regmap *map,
373 struct regmap_range_node *data)
374{
375 struct rb_root *root = &map->range_tree;
376 struct rb_node **new = &(root->rb_node), *parent = NULL;
377
378 while (*new) {
379 struct regmap_range_node *this =
380 container_of(*new, struct regmap_range_node, node);
381
382 parent = *new;
383 if (data->range_max < this->range_min)
384 new = &((*new)->rb_left);
385 else if (data->range_min > this->range_max)
386 new = &((*new)->rb_right);
387 else
388 return false;
389 }
390
391 rb_link_node(&data->node, parent, new);
392 rb_insert_color(&data->node, root);
393
394 return true;
395}
396
397static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
398 unsigned int reg)
399{
400 struct rb_node *node = map->range_tree.rb_node;
401
402 while (node) {
403 struct regmap_range_node *this =
404 container_of(node, struct regmap_range_node, node);
405
406 if (reg < this->range_min)
407 node = node->rb_left;
408 else if (reg > this->range_max)
409 node = node->rb_right;
410 else
411 return this;
412 }
413
414 return NULL;
415}
416
417static void regmap_range_exit(struct regmap *map)
418{
419 struct rb_node *next;
420 struct regmap_range_node *range_node;
421
422 next = rb_first(&map->range_tree);
423 while (next) {
424 range_node = rb_entry(next, struct regmap_range_node, node);
425 next = rb_next(&range_node->node);
426 rb_erase(&range_node->node, &map->range_tree);
427 kfree(range_node);
428 }
429
430 kfree(map->selector_work_buf);
431}
432
6cfec04b
MS
433int regmap_attach_dev(struct device *dev, struct regmap *map,
434 const struct regmap_config *config)
435{
436 struct regmap **m;
437
438 map->dev = dev;
439
440 regmap_debugfs_init(map, config->name);
441
442 /* Add a devres resource for dev_get_regmap() */
443 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
444 if (!m) {
445 regmap_debugfs_exit(map);
446 return -ENOMEM;
447 }
448 *m = map;
449 devres_add(dev, m);
450
451 return 0;
452}
453EXPORT_SYMBOL_GPL(regmap_attach_dev);
454
cf673fbc
GU
455static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
456 const struct regmap_config *config)
457{
458 enum regmap_endian endian;
459
460 /* Retrieve the endianness specification from the regmap config */
461 endian = config->reg_format_endian;
462
463 /* If the regmap config specified a non-default value, use that */
464 if (endian != REGMAP_ENDIAN_DEFAULT)
465 return endian;
466
467 /* Retrieve the endianness specification from the bus config */
468 if (bus && bus->reg_format_endian_default)
469 endian = bus->reg_format_endian_default;
d647c199 470
cf673fbc
GU
471 /* If the bus specified a non-default value, use that */
472 if (endian != REGMAP_ENDIAN_DEFAULT)
473 return endian;
474
475 /* Use this if no other value was found */
476 return REGMAP_ENDIAN_BIG;
477}
478
3c174d29
GR
479enum regmap_endian regmap_get_val_endian(struct device *dev,
480 const struct regmap_bus *bus,
481 const struct regmap_config *config)
d647c199 482{
6e64b6cc 483 struct device_node *np;
cf673fbc 484 enum regmap_endian endian;
d647c199 485
45e1a279 486 /* Retrieve the endianness specification from the regmap config */
cf673fbc 487 endian = config->val_format_endian;
d647c199 488
45e1a279 489 /* If the regmap config specified a non-default value, use that */
cf673fbc
GU
490 if (endian != REGMAP_ENDIAN_DEFAULT)
491 return endian;
d647c199 492
6e64b6cc
PD
493 /* If the dev and dev->of_node exist try to get endianness from DT */
494 if (dev && dev->of_node) {
495 np = dev->of_node;
d647c199 496
6e64b6cc
PD
497 /* Parse the device's DT node for an endianness specification */
498 if (of_property_read_bool(np, "big-endian"))
499 endian = REGMAP_ENDIAN_BIG;
500 else if (of_property_read_bool(np, "little-endian"))
501 endian = REGMAP_ENDIAN_LITTLE;
502
503 /* If the endianness was specified in DT, use that */
504 if (endian != REGMAP_ENDIAN_DEFAULT)
505 return endian;
506 }
45e1a279
SW
507
508 /* Retrieve the endianness specification from the bus config */
cf673fbc
GU
509 if (bus && bus->val_format_endian_default)
510 endian = bus->val_format_endian_default;
d647c199 511
45e1a279 512 /* If the bus specified a non-default value, use that */
cf673fbc
GU
513 if (endian != REGMAP_ENDIAN_DEFAULT)
514 return endian;
45e1a279
SW
515
516 /* Use this if no other value was found */
cf673fbc 517 return REGMAP_ENDIAN_BIG;
d647c199 518}
3c174d29 519EXPORT_SYMBOL_GPL(regmap_get_val_endian);
d647c199 520
b83a313b
MB
521/**
522 * regmap_init(): Initialise register map
523 *
524 * @dev: Device that will be interacted with
525 * @bus: Bus-specific callbacks to use with device
0135bbcc 526 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
527 * @config: Configuration for register map
528 *
529 * The return value will be an ERR_PTR() on error or a valid pointer to
530 * a struct regmap. This function should generally not be called
531 * directly, it should be called by bus-specific init functions.
532 */
533struct regmap *regmap_init(struct device *dev,
534 const struct regmap_bus *bus,
0135bbcc 535 void *bus_context,
b83a313b
MB
536 const struct regmap_config *config)
537{
6cfec04b 538 struct regmap *map;
b83a313b 539 int ret = -EINVAL;
141eba2e 540 enum regmap_endian reg_endian, val_endian;
6863ca62 541 int i, j;
b83a313b 542
d2a5884a 543 if (!config)
abbb18fb 544 goto err;
b83a313b
MB
545
546 map = kzalloc(sizeof(*map), GFP_KERNEL);
547 if (map == NULL) {
548 ret = -ENOMEM;
549 goto err;
550 }
551
0d4529c5
DC
552 if (config->lock && config->unlock) {
553 map->lock = config->lock;
554 map->unlock = config->unlock;
555 map->lock_arg = config->lock_arg;
bacdbe07 556 } else {
d2a5884a
AS
557 if ((bus && bus->fast_io) ||
558 config->fast_io) {
0d4529c5
DC
559 spin_lock_init(&map->spinlock);
560 map->lock = regmap_lock_spinlock;
561 map->unlock = regmap_unlock_spinlock;
562 } else {
563 mutex_init(&map->mutex);
564 map->lock = regmap_lock_mutex;
565 map->unlock = regmap_unlock_mutex;
566 }
567 map->lock_arg = map;
bacdbe07 568 }
c212accc 569 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 570 map->format.pad_bytes = config->pad_bits / 8;
c212accc 571 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
572 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
573 config->val_bits + config->pad_bits, 8);
d939fb9a 574 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
575 if (config->reg_stride)
576 map->reg_stride = config->reg_stride;
577 else
578 map->reg_stride = 1;
2e33caf1 579 map->use_single_rw = config->use_single_rw;
e894c3f4 580 map->can_multi_write = config->can_multi_write;
b83a313b
MB
581 map->dev = dev;
582 map->bus = bus;
0135bbcc 583 map->bus_context = bus_context;
2e2ae66d 584 map->max_register = config->max_register;
76aad392
DC
585 map->wr_table = config->wr_table;
586 map->rd_table = config->rd_table;
587 map->volatile_table = config->volatile_table;
588 map->precious_table = config->precious_table;
2e2ae66d
MB
589 map->writeable_reg = config->writeable_reg;
590 map->readable_reg = config->readable_reg;
591 map->volatile_reg = config->volatile_reg;
2efe1642 592 map->precious_reg = config->precious_reg;
5d1729e7 593 map->cache_type = config->cache_type;
72b39f6f 594 map->name = config->name;
b83a313b 595
0d509f2b
MB
596 spin_lock_init(&map->async_lock);
597 INIT_LIST_HEAD(&map->async_list);
7e09a979 598 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
599 init_waitqueue_head(&map->async_waitq);
600
6f306441
LPC
601 if (config->read_flag_mask || config->write_flag_mask) {
602 map->read_flag_mask = config->read_flag_mask;
603 map->write_flag_mask = config->write_flag_mask;
d2a5884a 604 } else if (bus) {
6f306441
LPC
605 map->read_flag_mask = bus->read_flag_mask;
606 }
607
d2a5884a
AS
608 if (!bus) {
609 map->reg_read = config->reg_read;
610 map->reg_write = config->reg_write;
611
3ac17037
BB
612 map->defer_caching = false;
613 goto skip_format_initialization;
614 } else if (!bus->read || !bus->write) {
615 map->reg_read = _regmap_bus_reg_read;
616 map->reg_write = _regmap_bus_reg_write;
617
d2a5884a
AS
618 map->defer_caching = false;
619 goto skip_format_initialization;
620 } else {
621 map->reg_read = _regmap_bus_read;
622 }
ad278406 623
cf673fbc
GU
624 reg_endian = regmap_get_reg_endian(bus, config);
625 val_endian = regmap_get_val_endian(dev, bus, config);
141eba2e 626
d939fb9a 627 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
628 case 2:
629 switch (config->val_bits) {
630 case 6:
631 map->format.format_write = regmap_format_2_6_write;
632 break;
633 default:
634 goto err_map;
635 }
636 break;
637
b83a313b
MB
638 case 4:
639 switch (config->val_bits) {
640 case 12:
641 map->format.format_write = regmap_format_4_12_write;
642 break;
643 default:
644 goto err_map;
645 }
646 break;
647
648 case 7:
649 switch (config->val_bits) {
650 case 9:
651 map->format.format_write = regmap_format_7_9_write;
652 break;
653 default:
654 goto err_map;
655 }
656 break;
657
7e5ec63e
LPC
658 case 10:
659 switch (config->val_bits) {
660 case 14:
661 map->format.format_write = regmap_format_10_14_write;
662 break;
663 default:
664 goto err_map;
665 }
666 break;
667
b83a313b
MB
668 case 8:
669 map->format.format_reg = regmap_format_8;
670 break;
671
672 case 16:
141eba2e
SW
673 switch (reg_endian) {
674 case REGMAP_ENDIAN_BIG:
675 map->format.format_reg = regmap_format_16_be;
676 break;
677 case REGMAP_ENDIAN_NATIVE:
678 map->format.format_reg = regmap_format_16_native;
679 break;
680 default:
681 goto err_map;
682 }
b83a313b
MB
683 break;
684
237019e7
LPC
685 case 24:
686 if (reg_endian != REGMAP_ENDIAN_BIG)
687 goto err_map;
688 map->format.format_reg = regmap_format_24;
689 break;
690
7d5e525b 691 case 32:
141eba2e
SW
692 switch (reg_endian) {
693 case REGMAP_ENDIAN_BIG:
694 map->format.format_reg = regmap_format_32_be;
695 break;
696 case REGMAP_ENDIAN_NATIVE:
697 map->format.format_reg = regmap_format_32_native;
698 break;
699 default:
700 goto err_map;
701 }
7d5e525b
MB
702 break;
703
b83a313b
MB
704 default:
705 goto err_map;
706 }
707
8a819ff8
MB
708 if (val_endian == REGMAP_ENDIAN_NATIVE)
709 map->format.parse_inplace = regmap_parse_inplace_noop;
710
b83a313b
MB
711 switch (config->val_bits) {
712 case 8:
713 map->format.format_val = regmap_format_8;
714 map->format.parse_val = regmap_parse_8;
8a819ff8 715 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
716 break;
717 case 16:
141eba2e
SW
718 switch (val_endian) {
719 case REGMAP_ENDIAN_BIG:
720 map->format.format_val = regmap_format_16_be;
721 map->format.parse_val = regmap_parse_16_be;
8a819ff8 722 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 723 break;
4aa8c069
XL
724 case REGMAP_ENDIAN_LITTLE:
725 map->format.format_val = regmap_format_16_le;
726 map->format.parse_val = regmap_parse_16_le;
727 map->format.parse_inplace = regmap_parse_16_le_inplace;
728 break;
141eba2e
SW
729 case REGMAP_ENDIAN_NATIVE:
730 map->format.format_val = regmap_format_16_native;
731 map->format.parse_val = regmap_parse_16_native;
732 break;
733 default:
734 goto err_map;
735 }
b83a313b 736 break;
ea279fc5 737 case 24:
141eba2e
SW
738 if (val_endian != REGMAP_ENDIAN_BIG)
739 goto err_map;
ea279fc5
MR
740 map->format.format_val = regmap_format_24;
741 map->format.parse_val = regmap_parse_24;
742 break;
7d5e525b 743 case 32:
141eba2e
SW
744 switch (val_endian) {
745 case REGMAP_ENDIAN_BIG:
746 map->format.format_val = regmap_format_32_be;
747 map->format.parse_val = regmap_parse_32_be;
8a819ff8 748 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 749 break;
4aa8c069
XL
750 case REGMAP_ENDIAN_LITTLE:
751 map->format.format_val = regmap_format_32_le;
752 map->format.parse_val = regmap_parse_32_le;
753 map->format.parse_inplace = regmap_parse_32_le_inplace;
754 break;
141eba2e
SW
755 case REGMAP_ENDIAN_NATIVE:
756 map->format.format_val = regmap_format_32_native;
757 map->format.parse_val = regmap_parse_32_native;
758 break;
759 default:
760 goto err_map;
761 }
7d5e525b 762 break;
b83a313b
MB
763 }
764
141eba2e
SW
765 if (map->format.format_write) {
766 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
767 (val_endian != REGMAP_ENDIAN_BIG))
768 goto err_map;
7a647614 769 map->use_single_rw = true;
141eba2e 770 }
7a647614 771
b83a313b
MB
772 if (!map->format.format_write &&
773 !(map->format.format_reg && map->format.format_val))
774 goto err_map;
775
82159ba8 776 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
777 if (map->work_buf == NULL) {
778 ret = -ENOMEM;
5204f5e3 779 goto err_map;
b83a313b
MB
780 }
781
d2a5884a
AS
782 if (map->format.format_write) {
783 map->defer_caching = false;
07c320dc 784 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
785 } else if (map->format.format_val) {
786 map->defer_caching = true;
07c320dc 787 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
788 }
789
790skip_format_initialization:
07c320dc 791
6863ca62 792 map->range_tree = RB_ROOT;
e3549cd0 793 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
794 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
795 struct regmap_range_node *new;
796
797 /* Sanity check */
061adc06
MB
798 if (range_cfg->range_max < range_cfg->range_min) {
799 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
800 range_cfg->range_max, range_cfg->range_min);
6863ca62 801 goto err_range;
061adc06
MB
802 }
803
804 if (range_cfg->range_max > map->max_register) {
805 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
806 range_cfg->range_max, map->max_register);
807 goto err_range;
808 }
809
810 if (range_cfg->selector_reg > map->max_register) {
811 dev_err(map->dev,
812 "Invalid range %d: selector out of map\n", i);
813 goto err_range;
814 }
815
816 if (range_cfg->window_len == 0) {
817 dev_err(map->dev, "Invalid range %d: window_len 0\n",
818 i);
819 goto err_range;
820 }
6863ca62
KG
821
822 /* Make sure, that this register range has no selector
823 or data window within its boundary */
e3549cd0 824 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
825 unsigned sel_reg = config->ranges[j].selector_reg;
826 unsigned win_min = config->ranges[j].window_start;
827 unsigned win_max = win_min +
828 config->ranges[j].window_len - 1;
829
f161d220
PZ
830 /* Allow data window inside its own virtual range */
831 if (j == i)
832 continue;
833
6863ca62
KG
834 if (range_cfg->range_min <= sel_reg &&
835 sel_reg <= range_cfg->range_max) {
061adc06
MB
836 dev_err(map->dev,
837 "Range %d: selector for %d in window\n",
838 i, j);
6863ca62
KG
839 goto err_range;
840 }
841
842 if (!(win_max < range_cfg->range_min ||
843 win_min > range_cfg->range_max)) {
061adc06
MB
844 dev_err(map->dev,
845 "Range %d: window for %d in window\n",
846 i, j);
6863ca62
KG
847 goto err_range;
848 }
849 }
850
851 new = kzalloc(sizeof(*new), GFP_KERNEL);
852 if (new == NULL) {
853 ret = -ENOMEM;
854 goto err_range;
855 }
856
4b020b3f 857 new->map = map;
d058bb49 858 new->name = range_cfg->name;
6863ca62
KG
859 new->range_min = range_cfg->range_min;
860 new->range_max = range_cfg->range_max;
861 new->selector_reg = range_cfg->selector_reg;
862 new->selector_mask = range_cfg->selector_mask;
863 new->selector_shift = range_cfg->selector_shift;
864 new->window_start = range_cfg->window_start;
865 new->window_len = range_cfg->window_len;
866
53e87f88 867 if (!_regmap_range_add(map, new)) {
061adc06 868 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
869 kfree(new);
870 goto err_range;
871 }
872
873 if (map->selector_work_buf == NULL) {
874 map->selector_work_buf =
875 kzalloc(map->format.buf_size, GFP_KERNEL);
876 if (map->selector_work_buf == NULL) {
877 ret = -ENOMEM;
878 goto err_range;
879 }
880 }
881 }
052d2cd1 882
e5e3b8ab 883 ret = regcache_init(map, config);
0ff3e62f 884 if (ret != 0)
6863ca62
KG
885 goto err_range;
886
a7a037c8 887 if (dev) {
6cfec04b
MS
888 ret = regmap_attach_dev(dev, map, config);
889 if (ret != 0)
890 goto err_regcache;
a7a037c8 891 }
72b39f6f 892
b83a313b
MB
893 return map;
894
6cfec04b 895err_regcache:
72b39f6f 896 regcache_exit(map);
6863ca62
KG
897err_range:
898 regmap_range_exit(map);
58072cbf 899 kfree(map->work_buf);
b83a313b
MB
900err_map:
901 kfree(map);
902err:
903 return ERR_PTR(ret);
904}
905EXPORT_SYMBOL_GPL(regmap_init);
906
c0eb4676
MB
907static void devm_regmap_release(struct device *dev, void *res)
908{
909 regmap_exit(*(struct regmap **)res);
910}
911
912/**
913 * devm_regmap_init(): Initialise managed register map
914 *
915 * @dev: Device that will be interacted with
916 * @bus: Bus-specific callbacks to use with device
0135bbcc 917 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
918 * @config: Configuration for register map
919 *
920 * The return value will be an ERR_PTR() on error or a valid pointer
921 * to a struct regmap. This function should generally not be called
922 * directly, it should be called by bus-specific init functions. The
923 * map will be automatically freed by the device management code.
924 */
925struct regmap *devm_regmap_init(struct device *dev,
926 const struct regmap_bus *bus,
0135bbcc 927 void *bus_context,
c0eb4676
MB
928 const struct regmap_config *config)
929{
930 struct regmap **ptr, *regmap;
931
932 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
933 if (!ptr)
934 return ERR_PTR(-ENOMEM);
935
0135bbcc 936 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
937 if (!IS_ERR(regmap)) {
938 *ptr = regmap;
939 devres_add(dev, ptr);
940 } else {
941 devres_free(ptr);
942 }
943
944 return regmap;
945}
946EXPORT_SYMBOL_GPL(devm_regmap_init);
947
67252287
SK
948static void regmap_field_init(struct regmap_field *rm_field,
949 struct regmap *regmap, struct reg_field reg_field)
950{
67252287
SK
951 rm_field->regmap = regmap;
952 rm_field->reg = reg_field.reg;
953 rm_field->shift = reg_field.lsb;
921cc294 954 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
a0102375
KM
955 rm_field->id_size = reg_field.id_size;
956 rm_field->id_offset = reg_field.id_offset;
67252287
SK
957}
958
959/**
960 * devm_regmap_field_alloc(): Allocate and initialise a register field
961 * in a register map.
962 *
963 * @dev: Device that will be interacted with
964 * @regmap: regmap bank in which this register field is located.
965 * @reg_field: Register field with in the bank.
966 *
967 * The return value will be an ERR_PTR() on error or a valid pointer
968 * to a struct regmap_field. The regmap_field will be automatically freed
969 * by the device management code.
970 */
971struct regmap_field *devm_regmap_field_alloc(struct device *dev,
972 struct regmap *regmap, struct reg_field reg_field)
973{
974 struct regmap_field *rm_field = devm_kzalloc(dev,
975 sizeof(*rm_field), GFP_KERNEL);
976 if (!rm_field)
977 return ERR_PTR(-ENOMEM);
978
979 regmap_field_init(rm_field, regmap, reg_field);
980
981 return rm_field;
982
983}
984EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
985
986/**
987 * devm_regmap_field_free(): Free register field allocated using
988 * devm_regmap_field_alloc. Usally drivers need not call this function,
989 * as the memory allocated via devm will be freed as per device-driver
990 * life-cyle.
991 *
992 * @dev: Device that will be interacted with
993 * @field: regmap field which should be freed.
994 */
995void devm_regmap_field_free(struct device *dev,
996 struct regmap_field *field)
997{
998 devm_kfree(dev, field);
999}
1000EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1001
1002/**
1003 * regmap_field_alloc(): Allocate and initialise a register field
1004 * in a register map.
1005 *
1006 * @regmap: regmap bank in which this register field is located.
1007 * @reg_field: Register field with in the bank.
1008 *
1009 * The return value will be an ERR_PTR() on error or a valid pointer
1010 * to a struct regmap_field. The regmap_field should be freed by the
1011 * user once its finished working with it using regmap_field_free().
1012 */
1013struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1014 struct reg_field reg_field)
1015{
1016 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1017
1018 if (!rm_field)
1019 return ERR_PTR(-ENOMEM);
1020
1021 regmap_field_init(rm_field, regmap, reg_field);
1022
1023 return rm_field;
1024}
1025EXPORT_SYMBOL_GPL(regmap_field_alloc);
1026
1027/**
1028 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1029 *
1030 * @field: regmap field which should be freed.
1031 */
1032void regmap_field_free(struct regmap_field *field)
1033{
1034 kfree(field);
1035}
1036EXPORT_SYMBOL_GPL(regmap_field_free);
1037
bf315173
MB
1038/**
1039 * regmap_reinit_cache(): Reinitialise the current register cache
1040 *
1041 * @map: Register map to operate on.
1042 * @config: New configuration. Only the cache data will be used.
1043 *
1044 * Discard any existing register cache for the map and initialize a
1045 * new cache. This can be used to restore the cache to defaults or to
1046 * update the cache configuration to reflect runtime discovery of the
1047 * hardware.
4d879514
DP
1048 *
1049 * No explicit locking is done here, the user needs to ensure that
1050 * this function will not race with other calls to regmap.
bf315173
MB
1051 */
1052int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1053{
bf315173 1054 regcache_exit(map);
a24f64a6 1055 regmap_debugfs_exit(map);
bf315173
MB
1056
1057 map->max_register = config->max_register;
1058 map->writeable_reg = config->writeable_reg;
1059 map->readable_reg = config->readable_reg;
1060 map->volatile_reg = config->volatile_reg;
1061 map->precious_reg = config->precious_reg;
1062 map->cache_type = config->cache_type;
1063
d3c242e1 1064 regmap_debugfs_init(map, config->name);
a24f64a6 1065
421e8d2d
MB
1066 map->cache_bypass = false;
1067 map->cache_only = false;
1068
4d879514 1069 return regcache_init(map, config);
bf315173 1070}
752a6a5f 1071EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1072
b83a313b
MB
1073/**
1074 * regmap_exit(): Free a previously allocated register map
1075 */
1076void regmap_exit(struct regmap *map)
1077{
7e09a979
MB
1078 struct regmap_async *async;
1079
5d1729e7 1080 regcache_exit(map);
31244e39 1081 regmap_debugfs_exit(map);
6863ca62 1082 regmap_range_exit(map);
d2a5884a 1083 if (map->bus && map->bus->free_context)
0135bbcc 1084 map->bus->free_context(map->bus_context);
b83a313b 1085 kfree(map->work_buf);
7e09a979
MB
1086 while (!list_empty(&map->async_free)) {
1087 async = list_first_entry_or_null(&map->async_free,
1088 struct regmap_async,
1089 list);
1090 list_del(&async->list);
1091 kfree(async->work_buf);
1092 kfree(async);
1093 }
b83a313b
MB
1094 kfree(map);
1095}
1096EXPORT_SYMBOL_GPL(regmap_exit);
1097
72b39f6f
MB
1098static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1099{
1100 struct regmap **r = res;
1101 if (!r || !*r) {
1102 WARN_ON(!r || !*r);
1103 return 0;
1104 }
1105
1106 /* If the user didn't specify a name match any */
1107 if (data)
1108 return (*r)->name == data;
1109 else
1110 return 1;
1111}
1112
1113/**
1114 * dev_get_regmap(): Obtain the regmap (if any) for a device
1115 *
1116 * @dev: Device to retrieve the map for
1117 * @name: Optional name for the register map, usually NULL.
1118 *
1119 * Returns the regmap for the device if one is present, or NULL. If
1120 * name is specified then it must match the name specified when
1121 * registering the device, if it is NULL then the first regmap found
1122 * will be used. Devices with multiple register maps are very rare,
1123 * generic code should normally not need to specify a name.
1124 */
1125struct regmap *dev_get_regmap(struct device *dev, const char *name)
1126{
1127 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1128 dev_get_regmap_match, (void *)name);
1129
1130 if (!r)
1131 return NULL;
1132 return *r;
1133}
1134EXPORT_SYMBOL_GPL(dev_get_regmap);
1135
8d7d3972
TT
1136/**
1137 * regmap_get_device(): Obtain the device from a regmap
1138 *
1139 * @map: Register map to operate on.
1140 *
1141 * Returns the underlying device that the regmap has been created for.
1142 */
1143struct device *regmap_get_device(struct regmap *map)
1144{
1145 return map->dev;
1146}
fa2fbe4a 1147EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1148
6863ca62 1149static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1150 struct regmap_range_node *range,
6863ca62
KG
1151 unsigned int val_num)
1152{
6863ca62
KG
1153 void *orig_work_buf;
1154 unsigned int win_offset;
1155 unsigned int win_page;
1156 bool page_chg;
1157 int ret;
1158
98bc7dfd
MB
1159 win_offset = (*reg - range->range_min) % range->window_len;
1160 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1161
98bc7dfd
MB
1162 if (val_num > 1) {
1163 /* Bulk write shouldn't cross range boundary */
1164 if (*reg + val_num - 1 > range->range_max)
1165 return -EINVAL;
6863ca62 1166
98bc7dfd
MB
1167 /* ... or single page boundary */
1168 if (val_num > range->window_len - win_offset)
1169 return -EINVAL;
1170 }
6863ca62 1171
98bc7dfd
MB
1172 /* It is possible to have selector register inside data window.
1173 In that case, selector register is located on every page and
1174 it needs no page switching, when accessed alone. */
1175 if (val_num > 1 ||
1176 range->window_start + win_offset != range->selector_reg) {
1177 /* Use separate work_buf during page switching */
1178 orig_work_buf = map->work_buf;
1179 map->work_buf = map->selector_work_buf;
6863ca62 1180
98bc7dfd
MB
1181 ret = _regmap_update_bits(map, range->selector_reg,
1182 range->selector_mask,
1183 win_page << range->selector_shift,
1184 &page_chg);
632a5b01 1185
98bc7dfd 1186 map->work_buf = orig_work_buf;
6863ca62 1187
0ff3e62f 1188 if (ret != 0)
98bc7dfd 1189 return ret;
6863ca62
KG
1190 }
1191
98bc7dfd
MB
1192 *reg = range->window_start + win_offset;
1193
6863ca62
KG
1194 return 0;
1195}
1196
584de329 1197int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1198 const void *val, size_t val_len)
b83a313b 1199{
98bc7dfd 1200 struct regmap_range_node *range;
0d509f2b 1201 unsigned long flags;
6f306441 1202 u8 *u8 = map->work_buf;
0d509f2b
MB
1203 void *work_val = map->work_buf + map->format.reg_bytes +
1204 map->format.pad_bytes;
b83a313b
MB
1205 void *buf;
1206 int ret = -ENOTSUPP;
1207 size_t len;
73304781
MB
1208 int i;
1209
f1b5c5c3 1210 WARN_ON(!map->bus);
d2a5884a 1211
73304781
MB
1212 /* Check for unwritable registers before we start */
1213 if (map->writeable_reg)
1214 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1215 if (!map->writeable_reg(map->dev,
1216 reg + (i * map->reg_stride)))
73304781 1217 return -EINVAL;
b83a313b 1218
c9157198
LD
1219 if (!map->cache_bypass && map->format.parse_val) {
1220 unsigned int ival;
1221 int val_bytes = map->format.val_bytes;
1222 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1223 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1224 ret = regcache_write(map, reg + (i * map->reg_stride),
1225 ival);
c9157198
LD
1226 if (ret) {
1227 dev_err(map->dev,
6d04b8ac 1228 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1229 reg + i, ret);
1230 return ret;
1231 }
1232 }
1233 if (map->cache_only) {
1234 map->cache_dirty = true;
1235 return 0;
1236 }
1237 }
1238
98bc7dfd
MB
1239 range = _regmap_range_lookup(map, reg);
1240 if (range) {
8a2ceac6
MB
1241 int val_num = val_len / map->format.val_bytes;
1242 int win_offset = (reg - range->range_min) % range->window_len;
1243 int win_residue = range->window_len - win_offset;
1244
1245 /* If the write goes beyond the end of the window split it */
1246 while (val_num > win_residue) {
1a61cfe3 1247 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1248 win_residue, val_len / map->format.val_bytes);
1249 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1250 map->format.val_bytes);
8a2ceac6
MB
1251 if (ret != 0)
1252 return ret;
1253
1254 reg += win_residue;
1255 val_num -= win_residue;
1256 val += win_residue * map->format.val_bytes;
1257 val_len -= win_residue * map->format.val_bytes;
1258
1259 win_offset = (reg - range->range_min) %
1260 range->window_len;
1261 win_residue = range->window_len - win_offset;
1262 }
1263
1264 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1265 if (ret != 0)
98bc7dfd
MB
1266 return ret;
1267 }
6863ca62 1268
d939fb9a 1269 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1270
6f306441
LPC
1271 u8[0] |= map->write_flag_mask;
1272
651e013e
MB
1273 /*
1274 * Essentially all I/O mechanisms will be faster with a single
1275 * buffer to write. Since register syncs often generate raw
1276 * writes of single registers optimise that case.
1277 */
1278 if (val != work_val && val_len == map->format.val_bytes) {
1279 memcpy(work_val, val, map->format.val_bytes);
1280 val = work_val;
1281 }
1282
0a819809 1283 if (map->async && map->bus->async_write) {
7e09a979 1284 struct regmap_async *async;
0d509f2b 1285
c6b570d9 1286 trace_regmap_async_write_start(map, reg, val_len);
fe7d4ccd 1287
7e09a979
MB
1288 spin_lock_irqsave(&map->async_lock, flags);
1289 async = list_first_entry_or_null(&map->async_free,
1290 struct regmap_async,
1291 list);
1292 if (async)
1293 list_del(&async->list);
1294 spin_unlock_irqrestore(&map->async_lock, flags);
1295
1296 if (!async) {
1297 async = map->bus->async_alloc();
1298 if (!async)
1299 return -ENOMEM;
1300
1301 async->work_buf = kzalloc(map->format.buf_size,
1302 GFP_KERNEL | GFP_DMA);
1303 if (!async->work_buf) {
1304 kfree(async);
1305 return -ENOMEM;
1306 }
0d509f2b
MB
1307 }
1308
0d509f2b
MB
1309 async->map = map;
1310
1311 /* If the caller supplied the value we can use it safely. */
1312 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1313 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1314
1315 spin_lock_irqsave(&map->async_lock, flags);
1316 list_add_tail(&async->list, &map->async_list);
1317 spin_unlock_irqrestore(&map->async_lock, flags);
1318
04c50ccf
MB
1319 if (val != work_val)
1320 ret = map->bus->async_write(map->bus_context,
1321 async->work_buf,
1322 map->format.reg_bytes +
1323 map->format.pad_bytes,
1324 val, val_len, async);
1325 else
1326 ret = map->bus->async_write(map->bus_context,
1327 async->work_buf,
1328 map->format.reg_bytes +
1329 map->format.pad_bytes +
1330 val_len, NULL, 0, async);
0d509f2b
MB
1331
1332 if (ret != 0) {
1333 dev_err(map->dev, "Failed to schedule write: %d\n",
1334 ret);
1335
1336 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1337 list_move(&async->list, &map->async_free);
0d509f2b 1338 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1339 }
f951b658
MB
1340
1341 return ret;
0d509f2b
MB
1342 }
1343
c6b570d9 1344 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 1345
2547e201
MB
1346 /* If we're doing a single register write we can probably just
1347 * send the work_buf directly, otherwise try to do a gather
1348 * write.
1349 */
0d509f2b 1350 if (val == work_val)
0135bbcc 1351 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1352 map->format.reg_bytes +
1353 map->format.pad_bytes +
1354 val_len);
2547e201 1355 else if (map->bus->gather_write)
0135bbcc 1356 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1357 map->format.reg_bytes +
1358 map->format.pad_bytes,
b83a313b
MB
1359 val, val_len);
1360
2547e201 1361 /* If that didn't work fall back on linearising by hand. */
b83a313b 1362 if (ret == -ENOTSUPP) {
82159ba8
MB
1363 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1364 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1365 if (!buf)
1366 return -ENOMEM;
1367
1368 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1369 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1370 val, val_len);
0135bbcc 1371 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1372
1373 kfree(buf);
1374 }
1375
c6b570d9 1376 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
fb2736bb 1377
b83a313b
MB
1378 return ret;
1379}
1380
221ad7f2
MB
1381/**
1382 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1383 *
1384 * @map: Map to check.
1385 */
1386bool regmap_can_raw_write(struct regmap *map)
1387{
1388 return map->bus && map->format.format_val && map->format.format_reg;
1389}
1390EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1391
07c320dc
AS
1392static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1393 unsigned int val)
1394{
1395 int ret;
1396 struct regmap_range_node *range;
1397 struct regmap *map = context;
1398
f1b5c5c3 1399 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1400
1401 range = _regmap_range_lookup(map, reg);
1402 if (range) {
1403 ret = _regmap_select_page(map, &reg, range, 1);
1404 if (ret != 0)
1405 return ret;
1406 }
1407
1408 map->format.format_write(map, reg, val);
1409
c6b570d9 1410 trace_regmap_hw_write_start(map, reg, 1);
07c320dc
AS
1411
1412 ret = map->bus->write(map->bus_context, map->work_buf,
1413 map->format.buf_size);
1414
c6b570d9 1415 trace_regmap_hw_write_done(map, reg, 1);
07c320dc
AS
1416
1417 return ret;
1418}
1419
3ac17037
BB
1420static int _regmap_bus_reg_write(void *context, unsigned int reg,
1421 unsigned int val)
1422{
1423 struct regmap *map = context;
1424
1425 return map->bus->reg_write(map->bus_context, reg, val);
1426}
1427
07c320dc
AS
1428static int _regmap_bus_raw_write(void *context, unsigned int reg,
1429 unsigned int val)
1430{
1431 struct regmap *map = context;
1432
f1b5c5c3 1433 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1434
1435 map->format.format_val(map->work_buf + map->format.reg_bytes
1436 + map->format.pad_bytes, val, 0);
1437 return _regmap_raw_write(map, reg,
1438 map->work_buf +
1439 map->format.reg_bytes +
1440 map->format.pad_bytes,
0a819809 1441 map->format.val_bytes);
07c320dc
AS
1442}
1443
d2a5884a
AS
1444static inline void *_regmap_map_get_context(struct regmap *map)
1445{
1446 return (map->bus) ? map : map->bus_context;
1447}
1448
4d2dc095
DP
1449int _regmap_write(struct regmap *map, unsigned int reg,
1450 unsigned int val)
b83a313b 1451{
fb2736bb 1452 int ret;
d2a5884a 1453 void *context = _regmap_map_get_context(map);
b83a313b 1454
515f2261
IN
1455 if (!regmap_writeable(map, reg))
1456 return -EIO;
1457
d2a5884a 1458 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1459 ret = regcache_write(map, reg, val);
1460 if (ret != 0)
1461 return ret;
8ae0d7e8
MB
1462 if (map->cache_only) {
1463 map->cache_dirty = true;
5d1729e7 1464 return 0;
8ae0d7e8 1465 }
5d1729e7
DP
1466 }
1467
1044c180 1468#ifdef LOG_DEVICE
5336be84 1469 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
1470 dev_info(map->dev, "%x <= %x\n", reg, val);
1471#endif
1472
c6b570d9 1473 trace_regmap_reg_write(map, reg, val);
fb2736bb 1474
d2a5884a 1475 return map->reg_write(context, reg, val);
b83a313b
MB
1476}
1477
1478/**
1479 * regmap_write(): Write a value to a single register
1480 *
1481 * @map: Register map to write to
1482 * @reg: Register to write to
1483 * @val: Value to be written
1484 *
1485 * A value of zero will be returned on success, a negative errno will
1486 * be returned in error cases.
1487 */
1488int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1489{
1490 int ret;
1491
f01ee60f
SW
1492 if (reg % map->reg_stride)
1493 return -EINVAL;
1494
0d4529c5 1495 map->lock(map->lock_arg);
b83a313b
MB
1496
1497 ret = _regmap_write(map, reg, val);
1498
0d4529c5 1499 map->unlock(map->lock_arg);
b83a313b
MB
1500
1501 return ret;
1502}
1503EXPORT_SYMBOL_GPL(regmap_write);
1504
915f441b
MB
1505/**
1506 * regmap_write_async(): Write a value to a single register asynchronously
1507 *
1508 * @map: Register map to write to
1509 * @reg: Register to write to
1510 * @val: Value to be written
1511 *
1512 * A value of zero will be returned on success, a negative errno will
1513 * be returned in error cases.
1514 */
1515int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1516{
1517 int ret;
1518
1519 if (reg % map->reg_stride)
1520 return -EINVAL;
1521
1522 map->lock(map->lock_arg);
1523
1524 map->async = true;
1525
1526 ret = _regmap_write(map, reg, val);
1527
1528 map->async = false;
1529
1530 map->unlock(map->lock_arg);
1531
1532 return ret;
1533}
1534EXPORT_SYMBOL_GPL(regmap_write_async);
1535
b83a313b
MB
1536/**
1537 * regmap_raw_write(): Write raw values to one or more registers
1538 *
1539 * @map: Register map to write to
1540 * @reg: Initial register to write to
1541 * @val: Block of data to be written, laid out for direct transmission to the
1542 * device
1543 * @val_len: Length of data pointed to by val.
1544 *
1545 * This function is intended to be used for things like firmware
1546 * download where a large block of data needs to be transferred to the
1547 * device. No formatting will be done on the data provided.
1548 *
1549 * A value of zero will be returned on success, a negative errno will
1550 * be returned in error cases.
1551 */
1552int regmap_raw_write(struct regmap *map, unsigned int reg,
1553 const void *val, size_t val_len)
1554{
1555 int ret;
1556
221ad7f2 1557 if (!regmap_can_raw_write(map))
d2a5884a 1558 return -EINVAL;
851960ba
SW
1559 if (val_len % map->format.val_bytes)
1560 return -EINVAL;
1561
0d4529c5 1562 map->lock(map->lock_arg);
b83a313b 1563
0a819809 1564 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1565
0d4529c5 1566 map->unlock(map->lock_arg);
b83a313b
MB
1567
1568 return ret;
1569}
1570EXPORT_SYMBOL_GPL(regmap_raw_write);
1571
67252287
SK
1572/**
1573 * regmap_field_write(): Write a value to a single register field
1574 *
1575 * @field: Register field to write to
1576 * @val: Value to be written
1577 *
1578 * A value of zero will be returned on success, a negative errno will
1579 * be returned in error cases.
1580 */
1581int regmap_field_write(struct regmap_field *field, unsigned int val)
1582{
1583 return regmap_update_bits(field->regmap, field->reg,
1584 field->mask, val << field->shift);
1585}
1586EXPORT_SYMBOL_GPL(regmap_field_write);
1587
fdf20029
KM
1588/**
1589 * regmap_field_update_bits(): Perform a read/modify/write cycle
1590 * on the register field
1591 *
1592 * @field: Register field to write to
1593 * @mask: Bitmask to change
1594 * @val: Value to be written
1595 *
1596 * A value of zero will be returned on success, a negative errno will
1597 * be returned in error cases.
1598 */
1599int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1600{
1601 mask = (mask << field->shift) & field->mask;
1602
1603 return regmap_update_bits(field->regmap, field->reg,
1604 mask, val << field->shift);
1605}
1606EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1607
a0102375
KM
1608/**
1609 * regmap_fields_write(): Write a value to a single register field with port ID
1610 *
1611 * @field: Register field to write to
1612 * @id: port ID
1613 * @val: Value to be written
1614 *
1615 * A value of zero will be returned on success, a negative errno will
1616 * be returned in error cases.
1617 */
1618int regmap_fields_write(struct regmap_field *field, unsigned int id,
1619 unsigned int val)
1620{
1621 if (id >= field->id_size)
1622 return -EINVAL;
1623
1624 return regmap_update_bits(field->regmap,
1625 field->reg + (field->id_offset * id),
1626 field->mask, val << field->shift);
1627}
1628EXPORT_SYMBOL_GPL(regmap_fields_write);
1629
1630/**
1631 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1632 * on the register field
1633 *
1634 * @field: Register field to write to
1635 * @id: port ID
1636 * @mask: Bitmask to change
1637 * @val: Value to be written
1638 *
1639 * A value of zero will be returned on success, a negative errno will
1640 * be returned in error cases.
1641 */
1642int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1643 unsigned int mask, unsigned int val)
1644{
1645 if (id >= field->id_size)
1646 return -EINVAL;
1647
1648 mask = (mask << field->shift) & field->mask;
1649
1650 return regmap_update_bits(field->regmap,
1651 field->reg + (field->id_offset * id),
1652 mask, val << field->shift);
1653}
1654EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1655
8eaeb219
LD
1656/*
1657 * regmap_bulk_write(): Write multiple registers to the device
1658 *
1659 * @map: Register map to write to
1660 * @reg: First register to be write from
1661 * @val: Block of data to be written, in native register size for device
1662 * @val_count: Number of registers to write
1663 *
1664 * This function is intended to be used for writing a large block of
31b35e9e 1665 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1666 *
1667 * A value of zero will be returned on success, a negative errno will
1668 * be returned in error cases.
1669 */
1670int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1671 size_t val_count)
1672{
1673 int ret = 0, i;
1674 size_t val_bytes = map->format.val_bytes;
8eaeb219 1675
f4298360 1676 if (map->bus && !map->format.parse_inplace)
8eaeb219 1677 return -EINVAL;
f01ee60f
SW
1678 if (reg % map->reg_stride)
1679 return -EINVAL;
8eaeb219 1680
f4298360
SB
1681 /*
1682 * Some devices don't support bulk write, for
c594b7f2
MP
1683 * them we have a series of single write operations in the first two if
1684 * blocks.
1685 *
1686 * The first if block is used for memory mapped io. It does not allow
1687 * val_bytes of 3 for example.
1688 * The second one is used for busses which do not have this limitation
1689 * and can write arbitrary value lengths.
f4298360 1690 */
c594b7f2 1691 if (!map->bus) {
4999e962 1692 map->lock(map->lock_arg);
f4298360
SB
1693 for (i = 0; i < val_count; i++) {
1694 unsigned int ival;
1695
1696 switch (val_bytes) {
1697 case 1:
1698 ival = *(u8 *)(val + (i * val_bytes));
1699 break;
1700 case 2:
1701 ival = *(u16 *)(val + (i * val_bytes));
1702 break;
1703 case 4:
1704 ival = *(u32 *)(val + (i * val_bytes));
1705 break;
1706#ifdef CONFIG_64BIT
1707 case 8:
1708 ival = *(u64 *)(val + (i * val_bytes));
1709 break;
1710#endif
1711 default:
1712 ret = -EINVAL;
1713 goto out;
1714 }
8eaeb219 1715
f4298360
SB
1716 ret = _regmap_write(map, reg + (i * map->reg_stride),
1717 ival);
1718 if (ret != 0)
1719 goto out;
1720 }
4999e962
TI
1721out:
1722 map->unlock(map->lock_arg);
c594b7f2
MP
1723 } else if (map->use_single_rw) {
1724 map->lock(map->lock_arg);
1725 for (i = 0; i < val_count; i++) {
1726 ret = _regmap_raw_write(map,
1727 reg + (i * map->reg_stride),
1728 val + (i * val_bytes),
1729 val_bytes);
1730 if (ret)
1731 break;
1732 }
1733 map->unlock(map->lock_arg);
8eaeb219 1734 } else {
f4298360
SB
1735 void *wval;
1736
d6b41cb0
XL
1737 if (!val_count)
1738 return -EINVAL;
1739
8eaeb219
LD
1740 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1741 if (!wval) {
8eaeb219 1742 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1743 return -ENOMEM;
8eaeb219
LD
1744 }
1745 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1746 map->format.parse_inplace(wval + i);
f4298360 1747
4999e962 1748 map->lock(map->lock_arg);
0a819809 1749 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1750 map->unlock(map->lock_arg);
8eaeb219 1751
8eaeb219 1752 kfree(wval);
f4298360 1753 }
8eaeb219
LD
1754 return ret;
1755}
1756EXPORT_SYMBOL_GPL(regmap_bulk_write);
1757
e894c3f4
OAO
1758/*
1759 * _regmap_raw_multi_reg_write()
1760 *
1761 * the (register,newvalue) pairs in regs have not been formatted, but
1762 * they are all in the same page and have been changed to being page
1763 * relative. The page register has been written if that was neccessary.
1764 */
1765static int _regmap_raw_multi_reg_write(struct regmap *map,
1766 const struct reg_default *regs,
1767 size_t num_regs)
1768{
1769 int ret;
1770 void *buf;
1771 int i;
1772 u8 *u8;
1773 size_t val_bytes = map->format.val_bytes;
1774 size_t reg_bytes = map->format.reg_bytes;
1775 size_t pad_bytes = map->format.pad_bytes;
1776 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1777 size_t len = pair_size * num_regs;
1778
f5727cd3
XL
1779 if (!len)
1780 return -EINVAL;
1781
e894c3f4
OAO
1782 buf = kzalloc(len, GFP_KERNEL);
1783 if (!buf)
1784 return -ENOMEM;
1785
1786 /* We have to linearise by hand. */
1787
1788 u8 = buf;
1789
1790 for (i = 0; i < num_regs; i++) {
1791 int reg = regs[i].reg;
1792 int val = regs[i].def;
c6b570d9 1793 trace_regmap_hw_write_start(map, reg, 1);
e894c3f4
OAO
1794 map->format.format_reg(u8, reg, map->reg_shift);
1795 u8 += reg_bytes + pad_bytes;
1796 map->format.format_val(u8, val, 0);
1797 u8 += val_bytes;
1798 }
1799 u8 = buf;
1800 *u8 |= map->write_flag_mask;
1801
1802 ret = map->bus->write(map->bus_context, buf, len);
1803
1804 kfree(buf);
1805
1806 for (i = 0; i < num_regs; i++) {
1807 int reg = regs[i].reg;
c6b570d9 1808 trace_regmap_hw_write_done(map, reg, 1);
e894c3f4
OAO
1809 }
1810 return ret;
1811}
1812
1813static unsigned int _regmap_register_page(struct regmap *map,
1814 unsigned int reg,
1815 struct regmap_range_node *range)
1816{
1817 unsigned int win_page = (reg - range->range_min) / range->window_len;
1818
1819 return win_page;
1820}
1821
1822static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1823 struct reg_default *regs,
1824 size_t num_regs)
1825{
1826 int ret;
1827 int i, n;
1828 struct reg_default *base;
b48d1398 1829 unsigned int this_page = 0;
e894c3f4
OAO
1830 /*
1831 * the set of registers are not neccessarily in order, but
1832 * since the order of write must be preserved this algorithm
1833 * chops the set each time the page changes
1834 */
1835 base = regs;
1836 for (i = 0, n = 0; i < num_regs; i++, n++) {
1837 unsigned int reg = regs[i].reg;
1838 struct regmap_range_node *range;
1839
1840 range = _regmap_range_lookup(map, reg);
1841 if (range) {
1842 unsigned int win_page = _regmap_register_page(map, reg,
1843 range);
1844
1845 if (i == 0)
1846 this_page = win_page;
1847 if (win_page != this_page) {
1848 this_page = win_page;
1849 ret = _regmap_raw_multi_reg_write(map, base, n);
1850 if (ret != 0)
1851 return ret;
1852 base += n;
1853 n = 0;
1854 }
1855 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1856 if (ret != 0)
1857 return ret;
1858 }
1859 }
1860 if (n > 0)
1861 return _regmap_raw_multi_reg_write(map, base, n);
1862 return 0;
1863}
1864
1d5b40bc
CK
1865static int _regmap_multi_reg_write(struct regmap *map,
1866 const struct reg_default *regs,
e894c3f4 1867 size_t num_regs)
1d5b40bc 1868{
e894c3f4
OAO
1869 int i;
1870 int ret;
1871
1872 if (!map->can_multi_write) {
1873 for (i = 0; i < num_regs; i++) {
1874 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1875 if (ret != 0)
1876 return ret;
1877 }
1878 return 0;
1879 }
1880
1881 if (!map->format.parse_inplace)
1882 return -EINVAL;
1883
1884 if (map->writeable_reg)
1885 for (i = 0; i < num_regs; i++) {
1886 int reg = regs[i].reg;
1887 if (!map->writeable_reg(map->dev, reg))
1888 return -EINVAL;
1889 if (reg % map->reg_stride)
1890 return -EINVAL;
1891 }
1892
1893 if (!map->cache_bypass) {
1894 for (i = 0; i < num_regs; i++) {
1895 unsigned int val = regs[i].def;
1896 unsigned int reg = regs[i].reg;
1897 ret = regcache_write(map, reg, val);
1898 if (ret) {
1899 dev_err(map->dev,
1900 "Error in caching of register: %x ret: %d\n",
1901 reg, ret);
1902 return ret;
1903 }
1904 }
1905 if (map->cache_only) {
1906 map->cache_dirty = true;
1907 return 0;
1908 }
1909 }
1910
1911 WARN_ON(!map->bus);
1d5b40bc
CK
1912
1913 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
1914 unsigned int reg = regs[i].reg;
1915 struct regmap_range_node *range;
1916 range = _regmap_range_lookup(map, reg);
1917 if (range) {
1918 size_t len = sizeof(struct reg_default)*num_regs;
1919 struct reg_default *base = kmemdup(regs, len,
1920 GFP_KERNEL);
1921 if (!base)
1922 return -ENOMEM;
1923 ret = _regmap_range_multi_paged_reg_write(map, base,
1924 num_regs);
1925 kfree(base);
1926
1d5b40bc
CK
1927 return ret;
1928 }
1929 }
e894c3f4 1930 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
1931}
1932
e33fabd3
AO
1933/*
1934 * regmap_multi_reg_write(): Write multiple registers to the device
1935 *
e894c3f4
OAO
1936 * where the set of register,value pairs are supplied in any order,
1937 * possibly not all in a single range.
e33fabd3
AO
1938 *
1939 * @map: Register map to write to
1940 * @regs: Array of structures containing register,value to be written
1941 * @num_regs: Number of registers to write
1942 *
e894c3f4
OAO
1943 * The 'normal' block write mode will send ultimately send data on the
1944 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1945 * addressed. However, this alternative block multi write mode will send
1946 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1947 * must of course support the mode.
e33fabd3 1948 *
e894c3f4
OAO
1949 * A value of zero will be returned on success, a negative errno will be
1950 * returned in error cases.
e33fabd3 1951 */
f7e2cec0
CK
1952int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1953 int num_regs)
e33fabd3 1954{
1d5b40bc 1955 int ret;
e33fabd3
AO
1956
1957 map->lock(map->lock_arg);
1958
1d5b40bc
CK
1959 ret = _regmap_multi_reg_write(map, regs, num_regs);
1960
e33fabd3
AO
1961 map->unlock(map->lock_arg);
1962
1963 return ret;
1964}
1965EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1966
1d5b40bc
CK
1967/*
1968 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1969 * device but not the cache
1970 *
e33fabd3
AO
1971 * where the set of register are supplied in any order
1972 *
1973 * @map: Register map to write to
1974 * @regs: Array of structures containing register,value to be written
1975 * @num_regs: Number of registers to write
1976 *
1977 * This function is intended to be used for writing a large block of data
1978 * atomically to the device in single transfer for those I2C client devices
1979 * that implement this alternative block write mode.
1980 *
1981 * A value of zero will be returned on success, a negative errno will
1982 * be returned in error cases.
1983 */
1d5b40bc
CK
1984int regmap_multi_reg_write_bypassed(struct regmap *map,
1985 const struct reg_default *regs,
1986 int num_regs)
e33fabd3 1987{
1d5b40bc
CK
1988 int ret;
1989 bool bypass;
e33fabd3
AO
1990
1991 map->lock(map->lock_arg);
1992
1d5b40bc
CK
1993 bypass = map->cache_bypass;
1994 map->cache_bypass = true;
1995
1996 ret = _regmap_multi_reg_write(map, regs, num_regs);
1997
1998 map->cache_bypass = bypass;
1999
e33fabd3
AO
2000 map->unlock(map->lock_arg);
2001
2002 return ret;
2003}
1d5b40bc 2004EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 2005
0d509f2b
MB
2006/**
2007 * regmap_raw_write_async(): Write raw values to one or more registers
2008 * asynchronously
2009 *
2010 * @map: Register map to write to
2011 * @reg: Initial register to write to
2012 * @val: Block of data to be written, laid out for direct transmission to the
2013 * device. Must be valid until regmap_async_complete() is called.
2014 * @val_len: Length of data pointed to by val.
2015 *
2016 * This function is intended to be used for things like firmware
2017 * download where a large block of data needs to be transferred to the
2018 * device. No formatting will be done on the data provided.
2019 *
2020 * If supported by the underlying bus the write will be scheduled
2021 * asynchronously, helping maximise I/O speed on higher speed buses
2022 * like SPI. regmap_async_complete() can be called to ensure that all
2023 * asynchrnous writes have been completed.
2024 *
2025 * A value of zero will be returned on success, a negative errno will
2026 * be returned in error cases.
2027 */
2028int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2029 const void *val, size_t val_len)
2030{
2031 int ret;
2032
2033 if (val_len % map->format.val_bytes)
2034 return -EINVAL;
2035 if (reg % map->reg_stride)
2036 return -EINVAL;
2037
2038 map->lock(map->lock_arg);
2039
0a819809
MB
2040 map->async = true;
2041
2042 ret = _regmap_raw_write(map, reg, val, val_len);
2043
2044 map->async = false;
0d509f2b
MB
2045
2046 map->unlock(map->lock_arg);
2047
2048 return ret;
2049}
2050EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2051
b83a313b
MB
2052static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2053 unsigned int val_len)
2054{
98bc7dfd 2055 struct regmap_range_node *range;
b83a313b
MB
2056 u8 *u8 = map->work_buf;
2057 int ret;
2058
f1b5c5c3 2059 WARN_ON(!map->bus);
d2a5884a 2060
98bc7dfd
MB
2061 range = _regmap_range_lookup(map, reg);
2062 if (range) {
2063 ret = _regmap_select_page(map, &reg, range,
2064 val_len / map->format.val_bytes);
0ff3e62f 2065 if (ret != 0)
98bc7dfd
MB
2066 return ret;
2067 }
6863ca62 2068
d939fb9a 2069 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
2070
2071 /*
6f306441 2072 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
2073 * register addresss; since it's always the high bits for all
2074 * current formats we can do this here rather than in
2075 * formatting. This may break if we get interesting formats.
2076 */
6f306441 2077 u8[0] |= map->read_flag_mask;
b83a313b 2078
c6b570d9 2079 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 2080
0135bbcc 2081 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 2082 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 2083 val, val_len);
b83a313b 2084
c6b570d9 2085 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
fb2736bb
MB
2086
2087 return ret;
b83a313b
MB
2088}
2089
3ac17037
BB
2090static int _regmap_bus_reg_read(void *context, unsigned int reg,
2091 unsigned int *val)
2092{
2093 struct regmap *map = context;
2094
2095 return map->bus->reg_read(map->bus_context, reg, val);
2096}
2097
ad278406
AS
2098static int _regmap_bus_read(void *context, unsigned int reg,
2099 unsigned int *val)
2100{
2101 int ret;
2102 struct regmap *map = context;
2103
2104 if (!map->format.parse_val)
2105 return -EINVAL;
2106
2107 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2108 if (ret == 0)
2109 *val = map->format.parse_val(map->work_buf);
2110
2111 return ret;
2112}
2113
b83a313b
MB
2114static int _regmap_read(struct regmap *map, unsigned int reg,
2115 unsigned int *val)
2116{
2117 int ret;
d2a5884a
AS
2118 void *context = _regmap_map_get_context(map);
2119
5d1729e7
DP
2120 if (!map->cache_bypass) {
2121 ret = regcache_read(map, reg, val);
2122 if (ret == 0)
2123 return 0;
2124 }
2125
2126 if (map->cache_only)
2127 return -EBUSY;
2128
d4807ad2
MS
2129 if (!regmap_readable(map, reg))
2130 return -EIO;
2131
d2a5884a 2132 ret = map->reg_read(context, reg, val);
fb2736bb 2133 if (ret == 0) {
1044c180 2134#ifdef LOG_DEVICE
5336be84 2135 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
2136 dev_info(map->dev, "%x => %x\n", reg, *val);
2137#endif
2138
c6b570d9 2139 trace_regmap_reg_read(map, reg, *val);
b83a313b 2140
ad278406
AS
2141 if (!map->cache_bypass)
2142 regcache_write(map, reg, *val);
2143 }
f2985367 2144
b83a313b
MB
2145 return ret;
2146}
2147
2148/**
2149 * regmap_read(): Read a value from a single register
2150 *
0093380c 2151 * @map: Register map to read from
b83a313b
MB
2152 * @reg: Register to be read from
2153 * @val: Pointer to store read value
2154 *
2155 * A value of zero will be returned on success, a negative errno will
2156 * be returned in error cases.
2157 */
2158int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2159{
2160 int ret;
2161
f01ee60f
SW
2162 if (reg % map->reg_stride)
2163 return -EINVAL;
2164
0d4529c5 2165 map->lock(map->lock_arg);
b83a313b
MB
2166
2167 ret = _regmap_read(map, reg, val);
2168
0d4529c5 2169 map->unlock(map->lock_arg);
b83a313b
MB
2170
2171 return ret;
2172}
2173EXPORT_SYMBOL_GPL(regmap_read);
2174
2175/**
2176 * regmap_raw_read(): Read raw data from the device
2177 *
0093380c 2178 * @map: Register map to read from
b83a313b
MB
2179 * @reg: First register to be read from
2180 * @val: Pointer to store read value
2181 * @val_len: Size of data to read
2182 *
2183 * A value of zero will be returned on success, a negative errno will
2184 * be returned in error cases.
2185 */
2186int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2187 size_t val_len)
2188{
b8fb5ab1
MB
2189 size_t val_bytes = map->format.val_bytes;
2190 size_t val_count = val_len / val_bytes;
2191 unsigned int v;
2192 int ret, i;
04e016ad 2193
d2a5884a
AS
2194 if (!map->bus)
2195 return -EINVAL;
851960ba
SW
2196 if (val_len % map->format.val_bytes)
2197 return -EINVAL;
f01ee60f
SW
2198 if (reg % map->reg_stride)
2199 return -EINVAL;
fa3eec77
MB
2200 if (val_count == 0)
2201 return -EINVAL;
851960ba 2202
0d4529c5 2203 map->lock(map->lock_arg);
b83a313b 2204
b8fb5ab1
MB
2205 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2206 map->cache_type == REGCACHE_NONE) {
2207 /* Physical block read if there's no cache involved */
2208 ret = _regmap_raw_read(map, reg, val, val_len);
2209
2210 } else {
2211 /* Otherwise go word by word for the cache; should be low
2212 * cost as we expect to hit the cache.
2213 */
2214 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2215 ret = _regmap_read(map, reg + (i * map->reg_stride),
2216 &v);
b8fb5ab1
MB
2217 if (ret != 0)
2218 goto out;
2219
d939fb9a 2220 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2221 }
2222 }
b83a313b 2223
b8fb5ab1 2224 out:
0d4529c5 2225 map->unlock(map->lock_arg);
b83a313b
MB
2226
2227 return ret;
2228}
2229EXPORT_SYMBOL_GPL(regmap_raw_read);
2230
67252287
SK
2231/**
2232 * regmap_field_read(): Read a value to a single register field
2233 *
2234 * @field: Register field to read from
2235 * @val: Pointer to store read value
2236 *
2237 * A value of zero will be returned on success, a negative errno will
2238 * be returned in error cases.
2239 */
2240int regmap_field_read(struct regmap_field *field, unsigned int *val)
2241{
2242 int ret;
2243 unsigned int reg_val;
2244 ret = regmap_read(field->regmap, field->reg, &reg_val);
2245 if (ret != 0)
2246 return ret;
2247
2248 reg_val &= field->mask;
2249 reg_val >>= field->shift;
2250 *val = reg_val;
2251
2252 return ret;
2253}
2254EXPORT_SYMBOL_GPL(regmap_field_read);
2255
a0102375
KM
2256/**
2257 * regmap_fields_read(): Read a value to a single register field with port ID
2258 *
2259 * @field: Register field to read from
2260 * @id: port ID
2261 * @val: Pointer to store read value
2262 *
2263 * A value of zero will be returned on success, a negative errno will
2264 * be returned in error cases.
2265 */
2266int regmap_fields_read(struct regmap_field *field, unsigned int id,
2267 unsigned int *val)
2268{
2269 int ret;
2270 unsigned int reg_val;
2271
2272 if (id >= field->id_size)
2273 return -EINVAL;
2274
2275 ret = regmap_read(field->regmap,
2276 field->reg + (field->id_offset * id),
2277 &reg_val);
2278 if (ret != 0)
2279 return ret;
2280
2281 reg_val &= field->mask;
2282 reg_val >>= field->shift;
2283 *val = reg_val;
2284
2285 return ret;
2286}
2287EXPORT_SYMBOL_GPL(regmap_fields_read);
2288
b83a313b
MB
2289/**
2290 * regmap_bulk_read(): Read multiple registers from the device
2291 *
0093380c 2292 * @map: Register map to read from
b83a313b
MB
2293 * @reg: First register to be read from
2294 * @val: Pointer to store read value, in native register size for device
2295 * @val_count: Number of registers to read
2296 *
2297 * A value of zero will be returned on success, a negative errno will
2298 * be returned in error cases.
2299 */
2300int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2301 size_t val_count)
2302{
2303 int ret, i;
2304 size_t val_bytes = map->format.val_bytes;
82cd9965 2305 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2306
f01ee60f
SW
2307 if (reg % map->reg_stride)
2308 return -EINVAL;
b83a313b 2309
3b58ee13 2310 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2311 /*
2312 * Some devices does not support bulk read, for
2313 * them we have a series of single read operations.
2314 */
2315 if (map->use_single_rw) {
2316 for (i = 0; i < val_count; i++) {
2317 ret = regmap_raw_read(map,
2318 reg + (i * map->reg_stride),
2319 val + (i * val_bytes),
2320 val_bytes);
2321 if (ret != 0)
2322 return ret;
2323 }
2324 } else {
2325 ret = regmap_raw_read(map, reg, val,
2326 val_bytes * val_count);
2327 if (ret != 0)
2328 return ret;
2329 }
de2d808f
MB
2330
2331 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2332 map->format.parse_inplace(val + i);
de2d808f
MB
2333 } else {
2334 for (i = 0; i < val_count; i++) {
6560ffd1 2335 unsigned int ival;
f01ee60f 2336 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2337 &ival);
de2d808f
MB
2338 if (ret != 0)
2339 return ret;
15b8d2c4 2340 map->format.format_val(val + (i * val_bytes), ival, 0);
de2d808f
MB
2341 }
2342 }
b83a313b
MB
2343
2344 return 0;
2345}
2346EXPORT_SYMBOL_GPL(regmap_bulk_read);
2347
018690d3
MB
2348static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2349 unsigned int mask, unsigned int val,
2350 bool *change)
b83a313b
MB
2351{
2352 int ret;
d91e8db2 2353 unsigned int tmp, orig;
b83a313b 2354
d91e8db2 2355 ret = _regmap_read(map, reg, &orig);
b83a313b 2356 if (ret != 0)
fc3ebd78 2357 return ret;
b83a313b 2358
d91e8db2 2359 tmp = orig & ~mask;
b83a313b
MB
2360 tmp |= val & mask;
2361
018690d3 2362 if (tmp != orig) {
d91e8db2 2363 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2364 if (change)
2365 *change = true;
018690d3 2366 } else {
e2f74dc6
XL
2367 if (change)
2368 *change = false;
018690d3 2369 }
b83a313b 2370
b83a313b
MB
2371 return ret;
2372}
018690d3
MB
2373
2374/**
2375 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2376 *
2377 * @map: Register map to update
2378 * @reg: Register to update
2379 * @mask: Bitmask to change
2380 * @val: New value for bitmask
2381 *
2382 * Returns zero for success, a negative number on error.
2383 */
2384int regmap_update_bits(struct regmap *map, unsigned int reg,
2385 unsigned int mask, unsigned int val)
2386{
fc3ebd78
KG
2387 int ret;
2388
0d4529c5 2389 map->lock(map->lock_arg);
e2f74dc6 2390 ret = _regmap_update_bits(map, reg, mask, val, NULL);
0d4529c5 2391 map->unlock(map->lock_arg);
fc3ebd78
KG
2392
2393 return ret;
018690d3 2394}
b83a313b 2395EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2396
915f441b
MB
2397/**
2398 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2399 * map asynchronously
2400 *
2401 * @map: Register map to update
2402 * @reg: Register to update
2403 * @mask: Bitmask to change
2404 * @val: New value for bitmask
2405 *
2406 * With most buses the read must be done synchronously so this is most
2407 * useful for devices with a cache which do not need to interact with
2408 * the hardware to determine the current register value.
2409 *
2410 * Returns zero for success, a negative number on error.
2411 */
2412int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2413 unsigned int mask, unsigned int val)
2414{
915f441b
MB
2415 int ret;
2416
2417 map->lock(map->lock_arg);
2418
2419 map->async = true;
2420
e2f74dc6 2421 ret = _regmap_update_bits(map, reg, mask, val, NULL);
915f441b
MB
2422
2423 map->async = false;
2424
2425 map->unlock(map->lock_arg);
2426
2427 return ret;
2428}
2429EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2430
018690d3
MB
2431/**
2432 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2433 * register map and report if updated
2434 *
2435 * @map: Register map to update
2436 * @reg: Register to update
2437 * @mask: Bitmask to change
2438 * @val: New value for bitmask
2439 * @change: Boolean indicating if a write was done
2440 *
2441 * Returns zero for success, a negative number on error.
2442 */
2443int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2444 unsigned int mask, unsigned int val,
2445 bool *change)
2446{
fc3ebd78
KG
2447 int ret;
2448
0d4529c5 2449 map->lock(map->lock_arg);
fc3ebd78 2450 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2451 map->unlock(map->lock_arg);
fc3ebd78 2452 return ret;
018690d3
MB
2453}
2454EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2455
915f441b
MB
2456/**
2457 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2458 * register map asynchronously and report if
2459 * updated
2460 *
2461 * @map: Register map to update
2462 * @reg: Register to update
2463 * @mask: Bitmask to change
2464 * @val: New value for bitmask
2465 * @change: Boolean indicating if a write was done
2466 *
2467 * With most buses the read must be done synchronously so this is most
2468 * useful for devices with a cache which do not need to interact with
2469 * the hardware to determine the current register value.
2470 *
2471 * Returns zero for success, a negative number on error.
2472 */
2473int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2474 unsigned int mask, unsigned int val,
2475 bool *change)
2476{
2477 int ret;
2478
2479 map->lock(map->lock_arg);
2480
2481 map->async = true;
2482
2483 ret = _regmap_update_bits(map, reg, mask, val, change);
2484
2485 map->async = false;
2486
2487 map->unlock(map->lock_arg);
2488
2489 return ret;
2490}
2491EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2492
0d509f2b
MB
2493void regmap_async_complete_cb(struct regmap_async *async, int ret)
2494{
2495 struct regmap *map = async->map;
2496 bool wake;
2497
c6b570d9 2498 trace_regmap_async_io_complete(map);
fe7d4ccd 2499
0d509f2b 2500 spin_lock(&map->async_lock);
7e09a979 2501 list_move(&async->list, &map->async_free);
0d509f2b
MB
2502 wake = list_empty(&map->async_list);
2503
2504 if (ret != 0)
2505 map->async_ret = ret;
2506
2507 spin_unlock(&map->async_lock);
2508
0d509f2b
MB
2509 if (wake)
2510 wake_up(&map->async_waitq);
2511}
f804fb56 2512EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2513
2514static int regmap_async_is_done(struct regmap *map)
2515{
2516 unsigned long flags;
2517 int ret;
2518
2519 spin_lock_irqsave(&map->async_lock, flags);
2520 ret = list_empty(&map->async_list);
2521 spin_unlock_irqrestore(&map->async_lock, flags);
2522
2523 return ret;
2524}
2525
2526/**
2527 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2528 *
2529 * @map: Map to operate on.
2530 *
2531 * Blocks until any pending asynchronous I/O has completed. Returns
2532 * an error code for any failed I/O operations.
2533 */
2534int regmap_async_complete(struct regmap *map)
2535{
2536 unsigned long flags;
2537 int ret;
2538
2539 /* Nothing to do with no async support */
f2e055e7 2540 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
2541 return 0;
2542
c6b570d9 2543 trace_regmap_async_complete_start(map);
fe7d4ccd 2544
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MB
2545 wait_event(map->async_waitq, regmap_async_is_done(map));
2546
2547 spin_lock_irqsave(&map->async_lock, flags);
2548 ret = map->async_ret;
2549 map->async_ret = 0;
2550 spin_unlock_irqrestore(&map->async_lock, flags);
2551
c6b570d9 2552 trace_regmap_async_complete_done(map);
fe7d4ccd 2553
0d509f2b
MB
2554 return ret;
2555}
f88948ef 2556EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2557
22f0d90a
MB
2558/**
2559 * regmap_register_patch: Register and apply register updates to be applied
2560 * on device initialistion
2561 *
2562 * @map: Register map to apply updates to.
2563 * @regs: Values to update.
2564 * @num_regs: Number of entries in regs.
2565 *
2566 * Register a set of register updates to be applied to the device
2567 * whenever the device registers are synchronised with the cache and
2568 * apply them immediately. Typically this is used to apply
2569 * corrections to be applied to the device defaults on startup, such
2570 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB
2571 *
2572 * The caller must ensure that this function cannot be called
2573 * concurrently with either itself or regcache_sync().
22f0d90a
MB
2574 */
2575int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2576 int num_regs)
2577{
aab13ebc 2578 struct reg_default *p;
6bf13103 2579 int ret;
22f0d90a
MB
2580 bool bypass;
2581
bd60e381
CZ
2582 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2583 num_regs))
2584 return 0;
2585
aab13ebc
MB
2586 p = krealloc(map->patch,
2587 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2588 GFP_KERNEL);
2589 if (p) {
2590 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2591 map->patch = p;
2592 map->patch_regs += num_regs;
22f0d90a 2593 } else {
56fb1c74 2594 return -ENOMEM;
22f0d90a
MB
2595 }
2596
0d4529c5 2597 map->lock(map->lock_arg);
22f0d90a
MB
2598
2599 bypass = map->cache_bypass;
2600
2601 map->cache_bypass = true;
1a25f261 2602 map->async = true;
22f0d90a 2603
6bf13103 2604 ret = _regmap_multi_reg_write(map, regs, num_regs);
22f0d90a 2605
1a25f261 2606 map->async = false;
22f0d90a
MB
2607 map->cache_bypass = bypass;
2608
0d4529c5 2609 map->unlock(map->lock_arg);
22f0d90a 2610
1a25f261
MB
2611 regmap_async_complete(map);
2612
22f0d90a
MB
2613 return ret;
2614}
2615EXPORT_SYMBOL_GPL(regmap_register_patch);
2616
eae4b51b 2617/*
a6539c32
MB
2618 * regmap_get_val_bytes(): Report the size of a register value
2619 *
2620 * Report the size of a register value, mainly intended to for use by
2621 * generic infrastructure built on top of regmap.
2622 */
2623int regmap_get_val_bytes(struct regmap *map)
2624{
2625 if (map->format.format_write)
2626 return -EINVAL;
2627
2628 return map->format.val_bytes;
2629}
2630EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2631
668abc72
SK
2632/**
2633 * regmap_get_max_register(): Report the max register value
2634 *
2635 * Report the max register value, mainly intended to for use by
2636 * generic infrastructure built on top of regmap.
2637 */
2638int regmap_get_max_register(struct regmap *map)
2639{
2640 return map->max_register ? map->max_register : -EINVAL;
2641}
2642EXPORT_SYMBOL_GPL(regmap_get_max_register);
2643
a2f776cb
SK
2644/**
2645 * regmap_get_reg_stride(): Report the register address stride
2646 *
2647 * Report the register address stride, mainly intended to for use by
2648 * generic infrastructure built on top of regmap.
2649 */
2650int regmap_get_reg_stride(struct regmap *map)
2651{
2652 return map->reg_stride;
2653}
2654EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2655
13ff50c8
NC
2656int regmap_parse_val(struct regmap *map, const void *buf,
2657 unsigned int *val)
2658{
2659 if (!map->format.parse_val)
2660 return -EINVAL;
2661
2662 *val = map->format.parse_val(buf);
2663
2664 return 0;
2665}
2666EXPORT_SYMBOL_GPL(regmap_parse_val);
2667
31244e39
MB
2668static int __init regmap_initcall(void)
2669{
2670 regmap_debugfs_initcall();
2671
2672 return 0;
2673}
2674postcore_initcall(regmap_initcall);
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