Linux 3.15-rc1
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
30b2a553 19#include <linux/sched.h>
b83a313b 20
fb2736bb
MB
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
93de9124 24#include "internal.h"
b83a313b 25
1044c180
MB
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
ad278406
AS
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
07c320dc
AS
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
ad278406 44
76aad392
DC
45bool regmap_reg_in_ranges(unsigned int reg,
46 const struct regmap_range *ranges,
47 unsigned int nranges)
48{
49 const struct regmap_range *r;
50 int i;
51
52 for (i = 0, r = ranges; i < nranges; i++, r++)
53 if (regmap_reg_in_range(reg, r))
54 return true;
55 return false;
56}
57EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
58
154881e5
MB
59bool regmap_check_range_table(struct regmap *map, unsigned int reg,
60 const struct regmap_access_table *table)
76aad392
DC
61{
62 /* Check "no ranges" first */
63 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
64 return false;
65
66 /* In case zero "yes ranges" are supplied, any reg is OK */
67 if (!table->n_yes_ranges)
68 return true;
69
70 return regmap_reg_in_ranges(reg, table->yes_ranges,
71 table->n_yes_ranges);
72}
154881e5 73EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 74
8de2f081
MB
75bool regmap_writeable(struct regmap *map, unsigned int reg)
76{
77 if (map->max_register && reg > map->max_register)
78 return false;
79
80 if (map->writeable_reg)
81 return map->writeable_reg(map->dev, reg);
82
76aad392 83 if (map->wr_table)
154881e5 84 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 85
8de2f081
MB
86 return true;
87}
88
89bool regmap_readable(struct regmap *map, unsigned int reg)
90{
91 if (map->max_register && reg > map->max_register)
92 return false;
93
4191f197
WS
94 if (map->format.format_write)
95 return false;
96
8de2f081
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97 if (map->readable_reg)
98 return map->readable_reg(map->dev, reg);
99
76aad392 100 if (map->rd_table)
154881e5 101 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 102
8de2f081
MB
103 return true;
104}
105
106bool regmap_volatile(struct regmap *map, unsigned int reg)
107{
4191f197 108 if (!regmap_readable(map, reg))
8de2f081
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109 return false;
110
111 if (map->volatile_reg)
112 return map->volatile_reg(map->dev, reg);
113
76aad392 114 if (map->volatile_table)
154881e5 115 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 116
b92be6fe
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117 if (map->cache_ops)
118 return false;
119 else
120 return true;
8de2f081
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121}
122
123bool regmap_precious(struct regmap *map, unsigned int reg)
124{
4191f197 125 if (!regmap_readable(map, reg))
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126 return false;
127
128 if (map->precious_reg)
129 return map->precious_reg(map->dev, reg);
130
76aad392 131 if (map->precious_table)
154881e5 132 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 133
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134 return false;
135}
136
82cd9965 137static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 138 size_t num)
82cd9965
LPC
139{
140 unsigned int i;
141
142 for (i = 0; i < num; i++)
143 if (!regmap_volatile(map, reg + i))
144 return false;
145
146 return true;
147}
148
9aa50750
WS
149static void regmap_format_2_6_write(struct regmap *map,
150 unsigned int reg, unsigned int val)
151{
152 u8 *out = map->work_buf;
153
154 *out = (reg << 6) | val;
155}
156
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157static void regmap_format_4_12_write(struct regmap *map,
158 unsigned int reg, unsigned int val)
159{
160 __be16 *out = map->work_buf;
161 *out = cpu_to_be16((reg << 12) | val);
162}
163
164static void regmap_format_7_9_write(struct regmap *map,
165 unsigned int reg, unsigned int val)
166{
167 __be16 *out = map->work_buf;
168 *out = cpu_to_be16((reg << 9) | val);
169}
170
7e5ec63e
LPC
171static void regmap_format_10_14_write(struct regmap *map,
172 unsigned int reg, unsigned int val)
173{
174 u8 *out = map->work_buf;
175
176 out[2] = val;
177 out[1] = (val >> 8) | (reg << 6);
178 out[0] = reg >> 2;
179}
180
d939fb9a 181static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
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182{
183 u8 *b = buf;
184
d939fb9a 185 b[0] = val << shift;
b83a313b
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186}
187
141eba2e 188static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
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189{
190 __be16 *b = buf;
191
d939fb9a 192 b[0] = cpu_to_be16(val << shift);
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193}
194
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SW
195static void regmap_format_16_native(void *buf, unsigned int val,
196 unsigned int shift)
197{
198 *(u16 *)buf = val << shift;
199}
200
d939fb9a 201static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
202{
203 u8 *b = buf;
204
d939fb9a
MR
205 val <<= shift;
206
ea279fc5
MR
207 b[0] = val >> 16;
208 b[1] = val >> 8;
209 b[2] = val;
210}
211
141eba2e 212static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
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213{
214 __be32 *b = buf;
215
d939fb9a 216 b[0] = cpu_to_be32(val << shift);
7d5e525b
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217}
218
141eba2e
SW
219static void regmap_format_32_native(void *buf, unsigned int val,
220 unsigned int shift)
221{
222 *(u32 *)buf = val << shift;
223}
224
8a819ff8 225static void regmap_parse_inplace_noop(void *buf)
b83a313b 226{
8a819ff8
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227}
228
229static unsigned int regmap_parse_8(const void *buf)
230{
231 const u8 *b = buf;
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232
233 return b[0];
234}
235
8a819ff8
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236static unsigned int regmap_parse_16_be(const void *buf)
237{
238 const __be16 *b = buf;
239
240 return be16_to_cpu(b[0]);
241}
242
243static void regmap_parse_16_be_inplace(void *buf)
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244{
245 __be16 *b = buf;
246
247 b[0] = be16_to_cpu(b[0]);
b83a313b
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248}
249
8a819ff8 250static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
251{
252 return *(u16 *)buf;
253}
254
8a819ff8 255static unsigned int regmap_parse_24(const void *buf)
ea279fc5 256{
8a819ff8 257 const u8 *b = buf;
ea279fc5
MR
258 unsigned int ret = b[2];
259 ret |= ((unsigned int)b[1]) << 8;
260 ret |= ((unsigned int)b[0]) << 16;
261
262 return ret;
263}
264
8a819ff8
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265static unsigned int regmap_parse_32_be(const void *buf)
266{
267 const __be32 *b = buf;
268
269 return be32_to_cpu(b[0]);
270}
271
272static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
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273{
274 __be32 *b = buf;
275
276 b[0] = be32_to_cpu(b[0]);
7d5e525b
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277}
278
8a819ff8 279static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
280{
281 return *(u32 *)buf;
282}
283
0d4529c5 284static void regmap_lock_mutex(void *__map)
bacdbe07 285{
0d4529c5 286 struct regmap *map = __map;
bacdbe07
SW
287 mutex_lock(&map->mutex);
288}
289
0d4529c5 290static void regmap_unlock_mutex(void *__map)
bacdbe07 291{
0d4529c5 292 struct regmap *map = __map;
bacdbe07
SW
293 mutex_unlock(&map->mutex);
294}
295
0d4529c5 296static void regmap_lock_spinlock(void *__map)
b4519c71 297__acquires(&map->spinlock)
bacdbe07 298{
0d4529c5 299 struct regmap *map = __map;
92ab1aab
LPC
300 unsigned long flags;
301
302 spin_lock_irqsave(&map->spinlock, flags);
303 map->spinlock_flags = flags;
bacdbe07
SW
304}
305
0d4529c5 306static void regmap_unlock_spinlock(void *__map)
b4519c71 307__releases(&map->spinlock)
bacdbe07 308{
0d4529c5 309 struct regmap *map = __map;
92ab1aab 310 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
311}
312
72b39f6f
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313static void dev_get_regmap_release(struct device *dev, void *res)
314{
315 /*
316 * We don't actually have anything to do here; the goal here
317 * is not to manage the regmap but to provide a simple way to
318 * get the regmap back given a struct device.
319 */
320}
321
6863ca62
KG
322static bool _regmap_range_add(struct regmap *map,
323 struct regmap_range_node *data)
324{
325 struct rb_root *root = &map->range_tree;
326 struct rb_node **new = &(root->rb_node), *parent = NULL;
327
328 while (*new) {
329 struct regmap_range_node *this =
330 container_of(*new, struct regmap_range_node, node);
331
332 parent = *new;
333 if (data->range_max < this->range_min)
334 new = &((*new)->rb_left);
335 else if (data->range_min > this->range_max)
336 new = &((*new)->rb_right);
337 else
338 return false;
339 }
340
341 rb_link_node(&data->node, parent, new);
342 rb_insert_color(&data->node, root);
343
344 return true;
345}
346
347static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
348 unsigned int reg)
349{
350 struct rb_node *node = map->range_tree.rb_node;
351
352 while (node) {
353 struct regmap_range_node *this =
354 container_of(node, struct regmap_range_node, node);
355
356 if (reg < this->range_min)
357 node = node->rb_left;
358 else if (reg > this->range_max)
359 node = node->rb_right;
360 else
361 return this;
362 }
363
364 return NULL;
365}
366
367static void regmap_range_exit(struct regmap *map)
368{
369 struct rb_node *next;
370 struct regmap_range_node *range_node;
371
372 next = rb_first(&map->range_tree);
373 while (next) {
374 range_node = rb_entry(next, struct regmap_range_node, node);
375 next = rb_next(&range_node->node);
376 rb_erase(&range_node->node, &map->range_tree);
377 kfree(range_node);
378 }
379
380 kfree(map->selector_work_buf);
381}
382
6cfec04b
MS
383int regmap_attach_dev(struct device *dev, struct regmap *map,
384 const struct regmap_config *config)
385{
386 struct regmap **m;
387
388 map->dev = dev;
389
390 regmap_debugfs_init(map, config->name);
391
392 /* Add a devres resource for dev_get_regmap() */
393 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
394 if (!m) {
395 regmap_debugfs_exit(map);
396 return -ENOMEM;
397 }
398 *m = map;
399 devres_add(dev, m);
400
401 return 0;
402}
403EXPORT_SYMBOL_GPL(regmap_attach_dev);
404
b83a313b
MB
405/**
406 * regmap_init(): Initialise register map
407 *
408 * @dev: Device that will be interacted with
409 * @bus: Bus-specific callbacks to use with device
0135bbcc 410 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
411 * @config: Configuration for register map
412 *
413 * The return value will be an ERR_PTR() on error or a valid pointer to
414 * a struct regmap. This function should generally not be called
415 * directly, it should be called by bus-specific init functions.
416 */
417struct regmap *regmap_init(struct device *dev,
418 const struct regmap_bus *bus,
0135bbcc 419 void *bus_context,
b83a313b
MB
420 const struct regmap_config *config)
421{
6cfec04b 422 struct regmap *map;
b83a313b 423 int ret = -EINVAL;
141eba2e 424 enum regmap_endian reg_endian, val_endian;
6863ca62 425 int i, j;
b83a313b 426
d2a5884a 427 if (!config)
abbb18fb 428 goto err;
b83a313b
MB
429
430 map = kzalloc(sizeof(*map), GFP_KERNEL);
431 if (map == NULL) {
432 ret = -ENOMEM;
433 goto err;
434 }
435
0d4529c5
DC
436 if (config->lock && config->unlock) {
437 map->lock = config->lock;
438 map->unlock = config->unlock;
439 map->lock_arg = config->lock_arg;
bacdbe07 440 } else {
d2a5884a
AS
441 if ((bus && bus->fast_io) ||
442 config->fast_io) {
0d4529c5
DC
443 spin_lock_init(&map->spinlock);
444 map->lock = regmap_lock_spinlock;
445 map->unlock = regmap_unlock_spinlock;
446 } else {
447 mutex_init(&map->mutex);
448 map->lock = regmap_lock_mutex;
449 map->unlock = regmap_unlock_mutex;
450 }
451 map->lock_arg = map;
bacdbe07 452 }
c212accc 453 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 454 map->format.pad_bytes = config->pad_bits / 8;
c212accc 455 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
456 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
457 config->val_bits + config->pad_bits, 8);
d939fb9a 458 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
459 if (config->reg_stride)
460 map->reg_stride = config->reg_stride;
461 else
462 map->reg_stride = 1;
2e33caf1 463 map->use_single_rw = config->use_single_rw;
e894c3f4 464 map->can_multi_write = config->can_multi_write;
b83a313b
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465 map->dev = dev;
466 map->bus = bus;
0135bbcc 467 map->bus_context = bus_context;
2e2ae66d 468 map->max_register = config->max_register;
76aad392
DC
469 map->wr_table = config->wr_table;
470 map->rd_table = config->rd_table;
471 map->volatile_table = config->volatile_table;
472 map->precious_table = config->precious_table;
2e2ae66d
MB
473 map->writeable_reg = config->writeable_reg;
474 map->readable_reg = config->readable_reg;
475 map->volatile_reg = config->volatile_reg;
2efe1642 476 map->precious_reg = config->precious_reg;
5d1729e7 477 map->cache_type = config->cache_type;
72b39f6f 478 map->name = config->name;
b83a313b 479
0d509f2b
MB
480 spin_lock_init(&map->async_lock);
481 INIT_LIST_HEAD(&map->async_list);
7e09a979 482 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
483 init_waitqueue_head(&map->async_waitq);
484
6f306441
LPC
485 if (config->read_flag_mask || config->write_flag_mask) {
486 map->read_flag_mask = config->read_flag_mask;
487 map->write_flag_mask = config->write_flag_mask;
d2a5884a 488 } else if (bus) {
6f306441
LPC
489 map->read_flag_mask = bus->read_flag_mask;
490 }
491
d2a5884a
AS
492 if (!bus) {
493 map->reg_read = config->reg_read;
494 map->reg_write = config->reg_write;
495
496 map->defer_caching = false;
497 goto skip_format_initialization;
498 } else {
499 map->reg_read = _regmap_bus_read;
500 }
ad278406 501
141eba2e
SW
502 reg_endian = config->reg_format_endian;
503 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
504 reg_endian = bus->reg_format_endian_default;
505 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
506 reg_endian = REGMAP_ENDIAN_BIG;
507
508 val_endian = config->val_format_endian;
509 if (val_endian == REGMAP_ENDIAN_DEFAULT)
510 val_endian = bus->val_format_endian_default;
511 if (val_endian == REGMAP_ENDIAN_DEFAULT)
512 val_endian = REGMAP_ENDIAN_BIG;
513
d939fb9a 514 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
515 case 2:
516 switch (config->val_bits) {
517 case 6:
518 map->format.format_write = regmap_format_2_6_write;
519 break;
520 default:
521 goto err_map;
522 }
523 break;
524
b83a313b
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525 case 4:
526 switch (config->val_bits) {
527 case 12:
528 map->format.format_write = regmap_format_4_12_write;
529 break;
530 default:
531 goto err_map;
532 }
533 break;
534
535 case 7:
536 switch (config->val_bits) {
537 case 9:
538 map->format.format_write = regmap_format_7_9_write;
539 break;
540 default:
541 goto err_map;
542 }
543 break;
544
7e5ec63e
LPC
545 case 10:
546 switch (config->val_bits) {
547 case 14:
548 map->format.format_write = regmap_format_10_14_write;
549 break;
550 default:
551 goto err_map;
552 }
553 break;
554
b83a313b
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555 case 8:
556 map->format.format_reg = regmap_format_8;
557 break;
558
559 case 16:
141eba2e
SW
560 switch (reg_endian) {
561 case REGMAP_ENDIAN_BIG:
562 map->format.format_reg = regmap_format_16_be;
563 break;
564 case REGMAP_ENDIAN_NATIVE:
565 map->format.format_reg = regmap_format_16_native;
566 break;
567 default:
568 goto err_map;
569 }
b83a313b
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570 break;
571
237019e7
LPC
572 case 24:
573 if (reg_endian != REGMAP_ENDIAN_BIG)
574 goto err_map;
575 map->format.format_reg = regmap_format_24;
576 break;
577
7d5e525b 578 case 32:
141eba2e
SW
579 switch (reg_endian) {
580 case REGMAP_ENDIAN_BIG:
581 map->format.format_reg = regmap_format_32_be;
582 break;
583 case REGMAP_ENDIAN_NATIVE:
584 map->format.format_reg = regmap_format_32_native;
585 break;
586 default:
587 goto err_map;
588 }
7d5e525b
MB
589 break;
590
b83a313b
MB
591 default:
592 goto err_map;
593 }
594
8a819ff8
MB
595 if (val_endian == REGMAP_ENDIAN_NATIVE)
596 map->format.parse_inplace = regmap_parse_inplace_noop;
597
b83a313b
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598 switch (config->val_bits) {
599 case 8:
600 map->format.format_val = regmap_format_8;
601 map->format.parse_val = regmap_parse_8;
8a819ff8 602 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
603 break;
604 case 16:
141eba2e
SW
605 switch (val_endian) {
606 case REGMAP_ENDIAN_BIG:
607 map->format.format_val = regmap_format_16_be;
608 map->format.parse_val = regmap_parse_16_be;
8a819ff8 609 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e
SW
610 break;
611 case REGMAP_ENDIAN_NATIVE:
612 map->format.format_val = regmap_format_16_native;
613 map->format.parse_val = regmap_parse_16_native;
614 break;
615 default:
616 goto err_map;
617 }
b83a313b 618 break;
ea279fc5 619 case 24:
141eba2e
SW
620 if (val_endian != REGMAP_ENDIAN_BIG)
621 goto err_map;
ea279fc5
MR
622 map->format.format_val = regmap_format_24;
623 map->format.parse_val = regmap_parse_24;
624 break;
7d5e525b 625 case 32:
141eba2e
SW
626 switch (val_endian) {
627 case REGMAP_ENDIAN_BIG:
628 map->format.format_val = regmap_format_32_be;
629 map->format.parse_val = regmap_parse_32_be;
8a819ff8 630 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e
SW
631 break;
632 case REGMAP_ENDIAN_NATIVE:
633 map->format.format_val = regmap_format_32_native;
634 map->format.parse_val = regmap_parse_32_native;
635 break;
636 default:
637 goto err_map;
638 }
7d5e525b 639 break;
b83a313b
MB
640 }
641
141eba2e
SW
642 if (map->format.format_write) {
643 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
644 (val_endian != REGMAP_ENDIAN_BIG))
645 goto err_map;
7a647614 646 map->use_single_rw = true;
141eba2e 647 }
7a647614 648
b83a313b
MB
649 if (!map->format.format_write &&
650 !(map->format.format_reg && map->format.format_val))
651 goto err_map;
652
82159ba8 653 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
654 if (map->work_buf == NULL) {
655 ret = -ENOMEM;
5204f5e3 656 goto err_map;
b83a313b
MB
657 }
658
d2a5884a
AS
659 if (map->format.format_write) {
660 map->defer_caching = false;
07c320dc 661 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
662 } else if (map->format.format_val) {
663 map->defer_caching = true;
07c320dc 664 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
665 }
666
667skip_format_initialization:
07c320dc 668
6863ca62 669 map->range_tree = RB_ROOT;
e3549cd0 670 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
671 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
672 struct regmap_range_node *new;
673
674 /* Sanity check */
061adc06
MB
675 if (range_cfg->range_max < range_cfg->range_min) {
676 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
677 range_cfg->range_max, range_cfg->range_min);
6863ca62 678 goto err_range;
061adc06
MB
679 }
680
681 if (range_cfg->range_max > map->max_register) {
682 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
683 range_cfg->range_max, map->max_register);
684 goto err_range;
685 }
686
687 if (range_cfg->selector_reg > map->max_register) {
688 dev_err(map->dev,
689 "Invalid range %d: selector out of map\n", i);
690 goto err_range;
691 }
692
693 if (range_cfg->window_len == 0) {
694 dev_err(map->dev, "Invalid range %d: window_len 0\n",
695 i);
696 goto err_range;
697 }
6863ca62
KG
698
699 /* Make sure, that this register range has no selector
700 or data window within its boundary */
e3549cd0 701 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
702 unsigned sel_reg = config->ranges[j].selector_reg;
703 unsigned win_min = config->ranges[j].window_start;
704 unsigned win_max = win_min +
705 config->ranges[j].window_len - 1;
706
f161d220
PZ
707 /* Allow data window inside its own virtual range */
708 if (j == i)
709 continue;
710
6863ca62
KG
711 if (range_cfg->range_min <= sel_reg &&
712 sel_reg <= range_cfg->range_max) {
061adc06
MB
713 dev_err(map->dev,
714 "Range %d: selector for %d in window\n",
715 i, j);
6863ca62
KG
716 goto err_range;
717 }
718
719 if (!(win_max < range_cfg->range_min ||
720 win_min > range_cfg->range_max)) {
061adc06
MB
721 dev_err(map->dev,
722 "Range %d: window for %d in window\n",
723 i, j);
6863ca62
KG
724 goto err_range;
725 }
726 }
727
728 new = kzalloc(sizeof(*new), GFP_KERNEL);
729 if (new == NULL) {
730 ret = -ENOMEM;
731 goto err_range;
732 }
733
4b020b3f 734 new->map = map;
d058bb49 735 new->name = range_cfg->name;
6863ca62
KG
736 new->range_min = range_cfg->range_min;
737 new->range_max = range_cfg->range_max;
738 new->selector_reg = range_cfg->selector_reg;
739 new->selector_mask = range_cfg->selector_mask;
740 new->selector_shift = range_cfg->selector_shift;
741 new->window_start = range_cfg->window_start;
742 new->window_len = range_cfg->window_len;
743
53e87f88 744 if (!_regmap_range_add(map, new)) {
061adc06 745 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
746 kfree(new);
747 goto err_range;
748 }
749
750 if (map->selector_work_buf == NULL) {
751 map->selector_work_buf =
752 kzalloc(map->format.buf_size, GFP_KERNEL);
753 if (map->selector_work_buf == NULL) {
754 ret = -ENOMEM;
755 goto err_range;
756 }
757 }
758 }
052d2cd1 759
e5e3b8ab 760 ret = regcache_init(map, config);
0ff3e62f 761 if (ret != 0)
6863ca62
KG
762 goto err_range;
763
a7a037c8 764 if (dev) {
6cfec04b
MS
765 ret = regmap_attach_dev(dev, map, config);
766 if (ret != 0)
767 goto err_regcache;
a7a037c8 768 }
72b39f6f 769
b83a313b
MB
770 return map;
771
6cfec04b 772err_regcache:
72b39f6f 773 regcache_exit(map);
6863ca62
KG
774err_range:
775 regmap_range_exit(map);
58072cbf 776 kfree(map->work_buf);
b83a313b
MB
777err_map:
778 kfree(map);
779err:
780 return ERR_PTR(ret);
781}
782EXPORT_SYMBOL_GPL(regmap_init);
783
c0eb4676
MB
784static void devm_regmap_release(struct device *dev, void *res)
785{
786 regmap_exit(*(struct regmap **)res);
787}
788
789/**
790 * devm_regmap_init(): Initialise managed register map
791 *
792 * @dev: Device that will be interacted with
793 * @bus: Bus-specific callbacks to use with device
0135bbcc 794 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
795 * @config: Configuration for register map
796 *
797 * The return value will be an ERR_PTR() on error or a valid pointer
798 * to a struct regmap. This function should generally not be called
799 * directly, it should be called by bus-specific init functions. The
800 * map will be automatically freed by the device management code.
801 */
802struct regmap *devm_regmap_init(struct device *dev,
803 const struct regmap_bus *bus,
0135bbcc 804 void *bus_context,
c0eb4676
MB
805 const struct regmap_config *config)
806{
807 struct regmap **ptr, *regmap;
808
809 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
810 if (!ptr)
811 return ERR_PTR(-ENOMEM);
812
0135bbcc 813 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
814 if (!IS_ERR(regmap)) {
815 *ptr = regmap;
816 devres_add(dev, ptr);
817 } else {
818 devres_free(ptr);
819 }
820
821 return regmap;
822}
823EXPORT_SYMBOL_GPL(devm_regmap_init);
824
67252287
SK
825static void regmap_field_init(struct regmap_field *rm_field,
826 struct regmap *regmap, struct reg_field reg_field)
827{
828 int field_bits = reg_field.msb - reg_field.lsb + 1;
829 rm_field->regmap = regmap;
830 rm_field->reg = reg_field.reg;
831 rm_field->shift = reg_field.lsb;
832 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
a0102375
KM
833 rm_field->id_size = reg_field.id_size;
834 rm_field->id_offset = reg_field.id_offset;
67252287
SK
835}
836
837/**
838 * devm_regmap_field_alloc(): Allocate and initialise a register field
839 * in a register map.
840 *
841 * @dev: Device that will be interacted with
842 * @regmap: regmap bank in which this register field is located.
843 * @reg_field: Register field with in the bank.
844 *
845 * The return value will be an ERR_PTR() on error or a valid pointer
846 * to a struct regmap_field. The regmap_field will be automatically freed
847 * by the device management code.
848 */
849struct regmap_field *devm_regmap_field_alloc(struct device *dev,
850 struct regmap *regmap, struct reg_field reg_field)
851{
852 struct regmap_field *rm_field = devm_kzalloc(dev,
853 sizeof(*rm_field), GFP_KERNEL);
854 if (!rm_field)
855 return ERR_PTR(-ENOMEM);
856
857 regmap_field_init(rm_field, regmap, reg_field);
858
859 return rm_field;
860
861}
862EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
863
864/**
865 * devm_regmap_field_free(): Free register field allocated using
866 * devm_regmap_field_alloc. Usally drivers need not call this function,
867 * as the memory allocated via devm will be freed as per device-driver
868 * life-cyle.
869 *
870 * @dev: Device that will be interacted with
871 * @field: regmap field which should be freed.
872 */
873void devm_regmap_field_free(struct device *dev,
874 struct regmap_field *field)
875{
876 devm_kfree(dev, field);
877}
878EXPORT_SYMBOL_GPL(devm_regmap_field_free);
879
880/**
881 * regmap_field_alloc(): Allocate and initialise a register field
882 * in a register map.
883 *
884 * @regmap: regmap bank in which this register field is located.
885 * @reg_field: Register field with in the bank.
886 *
887 * The return value will be an ERR_PTR() on error or a valid pointer
888 * to a struct regmap_field. The regmap_field should be freed by the
889 * user once its finished working with it using regmap_field_free().
890 */
891struct regmap_field *regmap_field_alloc(struct regmap *regmap,
892 struct reg_field reg_field)
893{
894 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
895
896 if (!rm_field)
897 return ERR_PTR(-ENOMEM);
898
899 regmap_field_init(rm_field, regmap, reg_field);
900
901 return rm_field;
902}
903EXPORT_SYMBOL_GPL(regmap_field_alloc);
904
905/**
906 * regmap_field_free(): Free register field allocated using regmap_field_alloc
907 *
908 * @field: regmap field which should be freed.
909 */
910void regmap_field_free(struct regmap_field *field)
911{
912 kfree(field);
913}
914EXPORT_SYMBOL_GPL(regmap_field_free);
915
bf315173
MB
916/**
917 * regmap_reinit_cache(): Reinitialise the current register cache
918 *
919 * @map: Register map to operate on.
920 * @config: New configuration. Only the cache data will be used.
921 *
922 * Discard any existing register cache for the map and initialize a
923 * new cache. This can be used to restore the cache to defaults or to
924 * update the cache configuration to reflect runtime discovery of the
925 * hardware.
4d879514
DP
926 *
927 * No explicit locking is done here, the user needs to ensure that
928 * this function will not race with other calls to regmap.
bf315173
MB
929 */
930int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
931{
bf315173 932 regcache_exit(map);
a24f64a6 933 regmap_debugfs_exit(map);
bf315173
MB
934
935 map->max_register = config->max_register;
936 map->writeable_reg = config->writeable_reg;
937 map->readable_reg = config->readable_reg;
938 map->volatile_reg = config->volatile_reg;
939 map->precious_reg = config->precious_reg;
940 map->cache_type = config->cache_type;
941
d3c242e1 942 regmap_debugfs_init(map, config->name);
a24f64a6 943
421e8d2d
MB
944 map->cache_bypass = false;
945 map->cache_only = false;
946
4d879514 947 return regcache_init(map, config);
bf315173 948}
752a6a5f 949EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 950
b83a313b
MB
951/**
952 * regmap_exit(): Free a previously allocated register map
953 */
954void regmap_exit(struct regmap *map)
955{
7e09a979
MB
956 struct regmap_async *async;
957
5d1729e7 958 regcache_exit(map);
31244e39 959 regmap_debugfs_exit(map);
6863ca62 960 regmap_range_exit(map);
d2a5884a 961 if (map->bus && map->bus->free_context)
0135bbcc 962 map->bus->free_context(map->bus_context);
b83a313b 963 kfree(map->work_buf);
7e09a979
MB
964 while (!list_empty(&map->async_free)) {
965 async = list_first_entry_or_null(&map->async_free,
966 struct regmap_async,
967 list);
968 list_del(&async->list);
969 kfree(async->work_buf);
970 kfree(async);
971 }
b83a313b
MB
972 kfree(map);
973}
974EXPORT_SYMBOL_GPL(regmap_exit);
975
72b39f6f
MB
976static int dev_get_regmap_match(struct device *dev, void *res, void *data)
977{
978 struct regmap **r = res;
979 if (!r || !*r) {
980 WARN_ON(!r || !*r);
981 return 0;
982 }
983
984 /* If the user didn't specify a name match any */
985 if (data)
986 return (*r)->name == data;
987 else
988 return 1;
989}
990
991/**
992 * dev_get_regmap(): Obtain the regmap (if any) for a device
993 *
994 * @dev: Device to retrieve the map for
995 * @name: Optional name for the register map, usually NULL.
996 *
997 * Returns the regmap for the device if one is present, or NULL. If
998 * name is specified then it must match the name specified when
999 * registering the device, if it is NULL then the first regmap found
1000 * will be used. Devices with multiple register maps are very rare,
1001 * generic code should normally not need to specify a name.
1002 */
1003struct regmap *dev_get_regmap(struct device *dev, const char *name)
1004{
1005 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1006 dev_get_regmap_match, (void *)name);
1007
1008 if (!r)
1009 return NULL;
1010 return *r;
1011}
1012EXPORT_SYMBOL_GPL(dev_get_regmap);
1013
6863ca62 1014static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1015 struct regmap_range_node *range,
6863ca62
KG
1016 unsigned int val_num)
1017{
6863ca62
KG
1018 void *orig_work_buf;
1019 unsigned int win_offset;
1020 unsigned int win_page;
1021 bool page_chg;
1022 int ret;
1023
98bc7dfd
MB
1024 win_offset = (*reg - range->range_min) % range->window_len;
1025 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1026
98bc7dfd
MB
1027 if (val_num > 1) {
1028 /* Bulk write shouldn't cross range boundary */
1029 if (*reg + val_num - 1 > range->range_max)
1030 return -EINVAL;
6863ca62 1031
98bc7dfd
MB
1032 /* ... or single page boundary */
1033 if (val_num > range->window_len - win_offset)
1034 return -EINVAL;
1035 }
6863ca62 1036
98bc7dfd
MB
1037 /* It is possible to have selector register inside data window.
1038 In that case, selector register is located on every page and
1039 it needs no page switching, when accessed alone. */
1040 if (val_num > 1 ||
1041 range->window_start + win_offset != range->selector_reg) {
1042 /* Use separate work_buf during page switching */
1043 orig_work_buf = map->work_buf;
1044 map->work_buf = map->selector_work_buf;
6863ca62 1045
98bc7dfd
MB
1046 ret = _regmap_update_bits(map, range->selector_reg,
1047 range->selector_mask,
1048 win_page << range->selector_shift,
1049 &page_chg);
632a5b01 1050
98bc7dfd 1051 map->work_buf = orig_work_buf;
6863ca62 1052
0ff3e62f 1053 if (ret != 0)
98bc7dfd 1054 return ret;
6863ca62
KG
1055 }
1056
98bc7dfd
MB
1057 *reg = range->window_start + win_offset;
1058
6863ca62
KG
1059 return 0;
1060}
1061
584de329 1062int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1063 const void *val, size_t val_len)
b83a313b 1064{
98bc7dfd 1065 struct regmap_range_node *range;
0d509f2b 1066 unsigned long flags;
6f306441 1067 u8 *u8 = map->work_buf;
0d509f2b
MB
1068 void *work_val = map->work_buf + map->format.reg_bytes +
1069 map->format.pad_bytes;
b83a313b
MB
1070 void *buf;
1071 int ret = -ENOTSUPP;
1072 size_t len;
73304781
MB
1073 int i;
1074
f1b5c5c3 1075 WARN_ON(!map->bus);
d2a5884a 1076
73304781
MB
1077 /* Check for unwritable registers before we start */
1078 if (map->writeable_reg)
1079 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1080 if (!map->writeable_reg(map->dev,
1081 reg + (i * map->reg_stride)))
73304781 1082 return -EINVAL;
b83a313b 1083
c9157198
LD
1084 if (!map->cache_bypass && map->format.parse_val) {
1085 unsigned int ival;
1086 int val_bytes = map->format.val_bytes;
1087 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1088 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1089 ret = regcache_write(map, reg + (i * map->reg_stride),
1090 ival);
c9157198
LD
1091 if (ret) {
1092 dev_err(map->dev,
6d04b8ac 1093 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1094 reg + i, ret);
1095 return ret;
1096 }
1097 }
1098 if (map->cache_only) {
1099 map->cache_dirty = true;
1100 return 0;
1101 }
1102 }
1103
98bc7dfd
MB
1104 range = _regmap_range_lookup(map, reg);
1105 if (range) {
8a2ceac6
MB
1106 int val_num = val_len / map->format.val_bytes;
1107 int win_offset = (reg - range->range_min) % range->window_len;
1108 int win_residue = range->window_len - win_offset;
1109
1110 /* If the write goes beyond the end of the window split it */
1111 while (val_num > win_residue) {
1a61cfe3 1112 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1113 win_residue, val_len / map->format.val_bytes);
1114 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1115 map->format.val_bytes);
8a2ceac6
MB
1116 if (ret != 0)
1117 return ret;
1118
1119 reg += win_residue;
1120 val_num -= win_residue;
1121 val += win_residue * map->format.val_bytes;
1122 val_len -= win_residue * map->format.val_bytes;
1123
1124 win_offset = (reg - range->range_min) %
1125 range->window_len;
1126 win_residue = range->window_len - win_offset;
1127 }
1128
1129 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1130 if (ret != 0)
98bc7dfd
MB
1131 return ret;
1132 }
6863ca62 1133
d939fb9a 1134 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1135
6f306441
LPC
1136 u8[0] |= map->write_flag_mask;
1137
651e013e
MB
1138 /*
1139 * Essentially all I/O mechanisms will be faster with a single
1140 * buffer to write. Since register syncs often generate raw
1141 * writes of single registers optimise that case.
1142 */
1143 if (val != work_val && val_len == map->format.val_bytes) {
1144 memcpy(work_val, val, map->format.val_bytes);
1145 val = work_val;
1146 }
1147
0a819809 1148 if (map->async && map->bus->async_write) {
7e09a979 1149 struct regmap_async *async;
0d509f2b 1150
fe7d4ccd
MB
1151 trace_regmap_async_write_start(map->dev, reg, val_len);
1152
7e09a979
MB
1153 spin_lock_irqsave(&map->async_lock, flags);
1154 async = list_first_entry_or_null(&map->async_free,
1155 struct regmap_async,
1156 list);
1157 if (async)
1158 list_del(&async->list);
1159 spin_unlock_irqrestore(&map->async_lock, flags);
1160
1161 if (!async) {
1162 async = map->bus->async_alloc();
1163 if (!async)
1164 return -ENOMEM;
1165
1166 async->work_buf = kzalloc(map->format.buf_size,
1167 GFP_KERNEL | GFP_DMA);
1168 if (!async->work_buf) {
1169 kfree(async);
1170 return -ENOMEM;
1171 }
0d509f2b
MB
1172 }
1173
0d509f2b
MB
1174 async->map = map;
1175
1176 /* If the caller supplied the value we can use it safely. */
1177 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1178 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1179
1180 spin_lock_irqsave(&map->async_lock, flags);
1181 list_add_tail(&async->list, &map->async_list);
1182 spin_unlock_irqrestore(&map->async_lock, flags);
1183
04c50ccf
MB
1184 if (val != work_val)
1185 ret = map->bus->async_write(map->bus_context,
1186 async->work_buf,
1187 map->format.reg_bytes +
1188 map->format.pad_bytes,
1189 val, val_len, async);
1190 else
1191 ret = map->bus->async_write(map->bus_context,
1192 async->work_buf,
1193 map->format.reg_bytes +
1194 map->format.pad_bytes +
1195 val_len, NULL, 0, async);
0d509f2b
MB
1196
1197 if (ret != 0) {
1198 dev_err(map->dev, "Failed to schedule write: %d\n",
1199 ret);
1200
1201 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1202 list_move(&async->list, &map->async_free);
0d509f2b 1203 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1204 }
f951b658
MB
1205
1206 return ret;
0d509f2b
MB
1207 }
1208
fb2736bb
MB
1209 trace_regmap_hw_write_start(map->dev, reg,
1210 val_len / map->format.val_bytes);
1211
2547e201
MB
1212 /* If we're doing a single register write we can probably just
1213 * send the work_buf directly, otherwise try to do a gather
1214 * write.
1215 */
0d509f2b 1216 if (val == work_val)
0135bbcc 1217 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1218 map->format.reg_bytes +
1219 map->format.pad_bytes +
1220 val_len);
2547e201 1221 else if (map->bus->gather_write)
0135bbcc 1222 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1223 map->format.reg_bytes +
1224 map->format.pad_bytes,
b83a313b
MB
1225 val, val_len);
1226
2547e201 1227 /* If that didn't work fall back on linearising by hand. */
b83a313b 1228 if (ret == -ENOTSUPP) {
82159ba8
MB
1229 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1230 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1231 if (!buf)
1232 return -ENOMEM;
1233
1234 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1235 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1236 val, val_len);
0135bbcc 1237 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1238
1239 kfree(buf);
1240 }
1241
fb2736bb
MB
1242 trace_regmap_hw_write_done(map->dev, reg,
1243 val_len / map->format.val_bytes);
1244
b83a313b
MB
1245 return ret;
1246}
1247
221ad7f2
MB
1248/**
1249 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1250 *
1251 * @map: Map to check.
1252 */
1253bool regmap_can_raw_write(struct regmap *map)
1254{
1255 return map->bus && map->format.format_val && map->format.format_reg;
1256}
1257EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1258
07c320dc
AS
1259static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1260 unsigned int val)
1261{
1262 int ret;
1263 struct regmap_range_node *range;
1264 struct regmap *map = context;
1265
f1b5c5c3 1266 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1267
1268 range = _regmap_range_lookup(map, reg);
1269 if (range) {
1270 ret = _regmap_select_page(map, &reg, range, 1);
1271 if (ret != 0)
1272 return ret;
1273 }
1274
1275 map->format.format_write(map, reg, val);
1276
1277 trace_regmap_hw_write_start(map->dev, reg, 1);
1278
1279 ret = map->bus->write(map->bus_context, map->work_buf,
1280 map->format.buf_size);
1281
1282 trace_regmap_hw_write_done(map->dev, reg, 1);
1283
1284 return ret;
1285}
1286
1287static int _regmap_bus_raw_write(void *context, unsigned int reg,
1288 unsigned int val)
1289{
1290 struct regmap *map = context;
1291
f1b5c5c3 1292 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1293
1294 map->format.format_val(map->work_buf + map->format.reg_bytes
1295 + map->format.pad_bytes, val, 0);
1296 return _regmap_raw_write(map, reg,
1297 map->work_buf +
1298 map->format.reg_bytes +
1299 map->format.pad_bytes,
0a819809 1300 map->format.val_bytes);
07c320dc
AS
1301}
1302
d2a5884a
AS
1303static inline void *_regmap_map_get_context(struct regmap *map)
1304{
1305 return (map->bus) ? map : map->bus_context;
1306}
1307
4d2dc095
DP
1308int _regmap_write(struct regmap *map, unsigned int reg,
1309 unsigned int val)
b83a313b 1310{
fb2736bb 1311 int ret;
d2a5884a 1312 void *context = _regmap_map_get_context(map);
b83a313b 1313
515f2261
IN
1314 if (!regmap_writeable(map, reg))
1315 return -EIO;
1316
d2a5884a 1317 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1318 ret = regcache_write(map, reg, val);
1319 if (ret != 0)
1320 return ret;
8ae0d7e8
MB
1321 if (map->cache_only) {
1322 map->cache_dirty = true;
5d1729e7 1323 return 0;
8ae0d7e8 1324 }
5d1729e7
DP
1325 }
1326
1044c180
MB
1327#ifdef LOG_DEVICE
1328 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1329 dev_info(map->dev, "%x <= %x\n", reg, val);
1330#endif
1331
fb2736bb
MB
1332 trace_regmap_reg_write(map->dev, reg, val);
1333
d2a5884a 1334 return map->reg_write(context, reg, val);
b83a313b
MB
1335}
1336
1337/**
1338 * regmap_write(): Write a value to a single register
1339 *
1340 * @map: Register map to write to
1341 * @reg: Register to write to
1342 * @val: Value to be written
1343 *
1344 * A value of zero will be returned on success, a negative errno will
1345 * be returned in error cases.
1346 */
1347int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1348{
1349 int ret;
1350
f01ee60f
SW
1351 if (reg % map->reg_stride)
1352 return -EINVAL;
1353
0d4529c5 1354 map->lock(map->lock_arg);
b83a313b
MB
1355
1356 ret = _regmap_write(map, reg, val);
1357
0d4529c5 1358 map->unlock(map->lock_arg);
b83a313b
MB
1359
1360 return ret;
1361}
1362EXPORT_SYMBOL_GPL(regmap_write);
1363
915f441b
MB
1364/**
1365 * regmap_write_async(): Write a value to a single register asynchronously
1366 *
1367 * @map: Register map to write to
1368 * @reg: Register to write to
1369 * @val: Value to be written
1370 *
1371 * A value of zero will be returned on success, a negative errno will
1372 * be returned in error cases.
1373 */
1374int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1375{
1376 int ret;
1377
1378 if (reg % map->reg_stride)
1379 return -EINVAL;
1380
1381 map->lock(map->lock_arg);
1382
1383 map->async = true;
1384
1385 ret = _regmap_write(map, reg, val);
1386
1387 map->async = false;
1388
1389 map->unlock(map->lock_arg);
1390
1391 return ret;
1392}
1393EXPORT_SYMBOL_GPL(regmap_write_async);
1394
b83a313b
MB
1395/**
1396 * regmap_raw_write(): Write raw values to one or more registers
1397 *
1398 * @map: Register map to write to
1399 * @reg: Initial register to write to
1400 * @val: Block of data to be written, laid out for direct transmission to the
1401 * device
1402 * @val_len: Length of data pointed to by val.
1403 *
1404 * This function is intended to be used for things like firmware
1405 * download where a large block of data needs to be transferred to the
1406 * device. No formatting will be done on the data provided.
1407 *
1408 * A value of zero will be returned on success, a negative errno will
1409 * be returned in error cases.
1410 */
1411int regmap_raw_write(struct regmap *map, unsigned int reg,
1412 const void *val, size_t val_len)
1413{
1414 int ret;
1415
221ad7f2 1416 if (!regmap_can_raw_write(map))
d2a5884a 1417 return -EINVAL;
851960ba
SW
1418 if (val_len % map->format.val_bytes)
1419 return -EINVAL;
1420
0d4529c5 1421 map->lock(map->lock_arg);
b83a313b 1422
0a819809 1423 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1424
0d4529c5 1425 map->unlock(map->lock_arg);
b83a313b
MB
1426
1427 return ret;
1428}
1429EXPORT_SYMBOL_GPL(regmap_raw_write);
1430
67252287
SK
1431/**
1432 * regmap_field_write(): Write a value to a single register field
1433 *
1434 * @field: Register field to write to
1435 * @val: Value to be written
1436 *
1437 * A value of zero will be returned on success, a negative errno will
1438 * be returned in error cases.
1439 */
1440int regmap_field_write(struct regmap_field *field, unsigned int val)
1441{
1442 return regmap_update_bits(field->regmap, field->reg,
1443 field->mask, val << field->shift);
1444}
1445EXPORT_SYMBOL_GPL(regmap_field_write);
1446
fdf20029
KM
1447/**
1448 * regmap_field_update_bits(): Perform a read/modify/write cycle
1449 * on the register field
1450 *
1451 * @field: Register field to write to
1452 * @mask: Bitmask to change
1453 * @val: Value to be written
1454 *
1455 * A value of zero will be returned on success, a negative errno will
1456 * be returned in error cases.
1457 */
1458int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1459{
1460 mask = (mask << field->shift) & field->mask;
1461
1462 return regmap_update_bits(field->regmap, field->reg,
1463 mask, val << field->shift);
1464}
1465EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1466
a0102375
KM
1467/**
1468 * regmap_fields_write(): Write a value to a single register field with port ID
1469 *
1470 * @field: Register field to write to
1471 * @id: port ID
1472 * @val: Value to be written
1473 *
1474 * A value of zero will be returned on success, a negative errno will
1475 * be returned in error cases.
1476 */
1477int regmap_fields_write(struct regmap_field *field, unsigned int id,
1478 unsigned int val)
1479{
1480 if (id >= field->id_size)
1481 return -EINVAL;
1482
1483 return regmap_update_bits(field->regmap,
1484 field->reg + (field->id_offset * id),
1485 field->mask, val << field->shift);
1486}
1487EXPORT_SYMBOL_GPL(regmap_fields_write);
1488
1489/**
1490 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1491 * on the register field
1492 *
1493 * @field: Register field to write to
1494 * @id: port ID
1495 * @mask: Bitmask to change
1496 * @val: Value to be written
1497 *
1498 * A value of zero will be returned on success, a negative errno will
1499 * be returned in error cases.
1500 */
1501int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1502 unsigned int mask, unsigned int val)
1503{
1504 if (id >= field->id_size)
1505 return -EINVAL;
1506
1507 mask = (mask << field->shift) & field->mask;
1508
1509 return regmap_update_bits(field->regmap,
1510 field->reg + (field->id_offset * id),
1511 mask, val << field->shift);
1512}
1513EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1514
8eaeb219
LD
1515/*
1516 * regmap_bulk_write(): Write multiple registers to the device
1517 *
1518 * @map: Register map to write to
1519 * @reg: First register to be write from
1520 * @val: Block of data to be written, in native register size for device
1521 * @val_count: Number of registers to write
1522 *
1523 * This function is intended to be used for writing a large block of
31b35e9e 1524 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1525 *
1526 * A value of zero will be returned on success, a negative errno will
1527 * be returned in error cases.
1528 */
1529int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1530 size_t val_count)
1531{
1532 int ret = 0, i;
1533 size_t val_bytes = map->format.val_bytes;
8eaeb219 1534
f4298360 1535 if (map->bus && !map->format.parse_inplace)
8eaeb219 1536 return -EINVAL;
f01ee60f
SW
1537 if (reg % map->reg_stride)
1538 return -EINVAL;
8eaeb219 1539
f4298360
SB
1540 /*
1541 * Some devices don't support bulk write, for
1542 * them we have a series of single write operations.
1543 */
1544 if (!map->bus || map->use_single_rw) {
4999e962 1545 map->lock(map->lock_arg);
f4298360
SB
1546 for (i = 0; i < val_count; i++) {
1547 unsigned int ival;
1548
1549 switch (val_bytes) {
1550 case 1:
1551 ival = *(u8 *)(val + (i * val_bytes));
1552 break;
1553 case 2:
1554 ival = *(u16 *)(val + (i * val_bytes));
1555 break;
1556 case 4:
1557 ival = *(u32 *)(val + (i * val_bytes));
1558 break;
1559#ifdef CONFIG_64BIT
1560 case 8:
1561 ival = *(u64 *)(val + (i * val_bytes));
1562 break;
1563#endif
1564 default:
1565 ret = -EINVAL;
1566 goto out;
1567 }
8eaeb219 1568
f4298360
SB
1569 ret = _regmap_write(map, reg + (i * map->reg_stride),
1570 ival);
1571 if (ret != 0)
1572 goto out;
1573 }
4999e962
TI
1574out:
1575 map->unlock(map->lock_arg);
8eaeb219 1576 } else {
f4298360
SB
1577 void *wval;
1578
8eaeb219
LD
1579 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1580 if (!wval) {
8eaeb219 1581 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1582 return -ENOMEM;
8eaeb219
LD
1583 }
1584 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1585 map->format.parse_inplace(wval + i);
f4298360 1586
4999e962 1587 map->lock(map->lock_arg);
0a819809 1588 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1589 map->unlock(map->lock_arg);
8eaeb219 1590
8eaeb219 1591 kfree(wval);
f4298360 1592 }
8eaeb219
LD
1593 return ret;
1594}
1595EXPORT_SYMBOL_GPL(regmap_bulk_write);
1596
e894c3f4
OAO
1597/*
1598 * _regmap_raw_multi_reg_write()
1599 *
1600 * the (register,newvalue) pairs in regs have not been formatted, but
1601 * they are all in the same page and have been changed to being page
1602 * relative. The page register has been written if that was neccessary.
1603 */
1604static int _regmap_raw_multi_reg_write(struct regmap *map,
1605 const struct reg_default *regs,
1606 size_t num_regs)
1607{
1608 int ret;
1609 void *buf;
1610 int i;
1611 u8 *u8;
1612 size_t val_bytes = map->format.val_bytes;
1613 size_t reg_bytes = map->format.reg_bytes;
1614 size_t pad_bytes = map->format.pad_bytes;
1615 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1616 size_t len = pair_size * num_regs;
1617
1618 buf = kzalloc(len, GFP_KERNEL);
1619 if (!buf)
1620 return -ENOMEM;
1621
1622 /* We have to linearise by hand. */
1623
1624 u8 = buf;
1625
1626 for (i = 0; i < num_regs; i++) {
1627 int reg = regs[i].reg;
1628 int val = regs[i].def;
1629 trace_regmap_hw_write_start(map->dev, reg, 1);
1630 map->format.format_reg(u8, reg, map->reg_shift);
1631 u8 += reg_bytes + pad_bytes;
1632 map->format.format_val(u8, val, 0);
1633 u8 += val_bytes;
1634 }
1635 u8 = buf;
1636 *u8 |= map->write_flag_mask;
1637
1638 ret = map->bus->write(map->bus_context, buf, len);
1639
1640 kfree(buf);
1641
1642 for (i = 0; i < num_regs; i++) {
1643 int reg = regs[i].reg;
1644 trace_regmap_hw_write_done(map->dev, reg, 1);
1645 }
1646 return ret;
1647}
1648
1649static unsigned int _regmap_register_page(struct regmap *map,
1650 unsigned int reg,
1651 struct regmap_range_node *range)
1652{
1653 unsigned int win_page = (reg - range->range_min) / range->window_len;
1654
1655 return win_page;
1656}
1657
1658static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1659 struct reg_default *regs,
1660 size_t num_regs)
1661{
1662 int ret;
1663 int i, n;
1664 struct reg_default *base;
1665 unsigned int this_page;
1666 /*
1667 * the set of registers are not neccessarily in order, but
1668 * since the order of write must be preserved this algorithm
1669 * chops the set each time the page changes
1670 */
1671 base = regs;
1672 for (i = 0, n = 0; i < num_regs; i++, n++) {
1673 unsigned int reg = regs[i].reg;
1674 struct regmap_range_node *range;
1675
1676 range = _regmap_range_lookup(map, reg);
1677 if (range) {
1678 unsigned int win_page = _regmap_register_page(map, reg,
1679 range);
1680
1681 if (i == 0)
1682 this_page = win_page;
1683 if (win_page != this_page) {
1684 this_page = win_page;
1685 ret = _regmap_raw_multi_reg_write(map, base, n);
1686 if (ret != 0)
1687 return ret;
1688 base += n;
1689 n = 0;
1690 }
1691 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1692 if (ret != 0)
1693 return ret;
1694 }
1695 }
1696 if (n > 0)
1697 return _regmap_raw_multi_reg_write(map, base, n);
1698 return 0;
1699}
1700
1d5b40bc
CK
1701static int _regmap_multi_reg_write(struct regmap *map,
1702 const struct reg_default *regs,
e894c3f4 1703 size_t num_regs)
1d5b40bc 1704{
e894c3f4
OAO
1705 int i;
1706 int ret;
1707
1708 if (!map->can_multi_write) {
1709 for (i = 0; i < num_regs; i++) {
1710 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1711 if (ret != 0)
1712 return ret;
1713 }
1714 return 0;
1715 }
1716
1717 if (!map->format.parse_inplace)
1718 return -EINVAL;
1719
1720 if (map->writeable_reg)
1721 for (i = 0; i < num_regs; i++) {
1722 int reg = regs[i].reg;
1723 if (!map->writeable_reg(map->dev, reg))
1724 return -EINVAL;
1725 if (reg % map->reg_stride)
1726 return -EINVAL;
1727 }
1728
1729 if (!map->cache_bypass) {
1730 for (i = 0; i < num_regs; i++) {
1731 unsigned int val = regs[i].def;
1732 unsigned int reg = regs[i].reg;
1733 ret = regcache_write(map, reg, val);
1734 if (ret) {
1735 dev_err(map->dev,
1736 "Error in caching of register: %x ret: %d\n",
1737 reg, ret);
1738 return ret;
1739 }
1740 }
1741 if (map->cache_only) {
1742 map->cache_dirty = true;
1743 return 0;
1744 }
1745 }
1746
1747 WARN_ON(!map->bus);
1d5b40bc
CK
1748
1749 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
1750 unsigned int reg = regs[i].reg;
1751 struct regmap_range_node *range;
1752 range = _regmap_range_lookup(map, reg);
1753 if (range) {
1754 size_t len = sizeof(struct reg_default)*num_regs;
1755 struct reg_default *base = kmemdup(regs, len,
1756 GFP_KERNEL);
1757 if (!base)
1758 return -ENOMEM;
1759 ret = _regmap_range_multi_paged_reg_write(map, base,
1760 num_regs);
1761 kfree(base);
1762
1d5b40bc
CK
1763 return ret;
1764 }
1765 }
e894c3f4 1766 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
1767}
1768
e33fabd3
AO
1769/*
1770 * regmap_multi_reg_write(): Write multiple registers to the device
1771 *
e894c3f4
OAO
1772 * where the set of register,value pairs are supplied in any order,
1773 * possibly not all in a single range.
e33fabd3
AO
1774 *
1775 * @map: Register map to write to
1776 * @regs: Array of structures containing register,value to be written
1777 * @num_regs: Number of registers to write
1778 *
e894c3f4
OAO
1779 * The 'normal' block write mode will send ultimately send data on the
1780 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1781 * addressed. However, this alternative block multi write mode will send
1782 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1783 * must of course support the mode.
e33fabd3 1784 *
e894c3f4
OAO
1785 * A value of zero will be returned on success, a negative errno will be
1786 * returned in error cases.
e33fabd3 1787 */
f7e2cec0
CK
1788int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1789 int num_regs)
e33fabd3 1790{
1d5b40bc 1791 int ret;
e33fabd3
AO
1792
1793 map->lock(map->lock_arg);
1794
1d5b40bc
CK
1795 ret = _regmap_multi_reg_write(map, regs, num_regs);
1796
e33fabd3
AO
1797 map->unlock(map->lock_arg);
1798
1799 return ret;
1800}
1801EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1802
1d5b40bc
CK
1803/*
1804 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1805 * device but not the cache
1806 *
e33fabd3
AO
1807 * where the set of register are supplied in any order
1808 *
1809 * @map: Register map to write to
1810 * @regs: Array of structures containing register,value to be written
1811 * @num_regs: Number of registers to write
1812 *
1813 * This function is intended to be used for writing a large block of data
1814 * atomically to the device in single transfer for those I2C client devices
1815 * that implement this alternative block write mode.
1816 *
1817 * A value of zero will be returned on success, a negative errno will
1818 * be returned in error cases.
1819 */
1d5b40bc
CK
1820int regmap_multi_reg_write_bypassed(struct regmap *map,
1821 const struct reg_default *regs,
1822 int num_regs)
e33fabd3 1823{
1d5b40bc
CK
1824 int ret;
1825 bool bypass;
e33fabd3
AO
1826
1827 map->lock(map->lock_arg);
1828
1d5b40bc
CK
1829 bypass = map->cache_bypass;
1830 map->cache_bypass = true;
1831
1832 ret = _regmap_multi_reg_write(map, regs, num_regs);
1833
1834 map->cache_bypass = bypass;
1835
e33fabd3
AO
1836 map->unlock(map->lock_arg);
1837
1838 return ret;
1839}
1d5b40bc 1840EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 1841
0d509f2b
MB
1842/**
1843 * regmap_raw_write_async(): Write raw values to one or more registers
1844 * asynchronously
1845 *
1846 * @map: Register map to write to
1847 * @reg: Initial register to write to
1848 * @val: Block of data to be written, laid out for direct transmission to the
1849 * device. Must be valid until regmap_async_complete() is called.
1850 * @val_len: Length of data pointed to by val.
1851 *
1852 * This function is intended to be used for things like firmware
1853 * download where a large block of data needs to be transferred to the
1854 * device. No formatting will be done on the data provided.
1855 *
1856 * If supported by the underlying bus the write will be scheduled
1857 * asynchronously, helping maximise I/O speed on higher speed buses
1858 * like SPI. regmap_async_complete() can be called to ensure that all
1859 * asynchrnous writes have been completed.
1860 *
1861 * A value of zero will be returned on success, a negative errno will
1862 * be returned in error cases.
1863 */
1864int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1865 const void *val, size_t val_len)
1866{
1867 int ret;
1868
1869 if (val_len % map->format.val_bytes)
1870 return -EINVAL;
1871 if (reg % map->reg_stride)
1872 return -EINVAL;
1873
1874 map->lock(map->lock_arg);
1875
0a819809
MB
1876 map->async = true;
1877
1878 ret = _regmap_raw_write(map, reg, val, val_len);
1879
1880 map->async = false;
0d509f2b
MB
1881
1882 map->unlock(map->lock_arg);
1883
1884 return ret;
1885}
1886EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1887
b83a313b
MB
1888static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1889 unsigned int val_len)
1890{
98bc7dfd 1891 struct regmap_range_node *range;
b83a313b
MB
1892 u8 *u8 = map->work_buf;
1893 int ret;
1894
f1b5c5c3 1895 WARN_ON(!map->bus);
d2a5884a 1896
98bc7dfd
MB
1897 range = _regmap_range_lookup(map, reg);
1898 if (range) {
1899 ret = _regmap_select_page(map, &reg, range,
1900 val_len / map->format.val_bytes);
0ff3e62f 1901 if (ret != 0)
98bc7dfd
MB
1902 return ret;
1903 }
6863ca62 1904
d939fb9a 1905 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1906
1907 /*
6f306441 1908 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1909 * register addresss; since it's always the high bits for all
1910 * current formats we can do this here rather than in
1911 * formatting. This may break if we get interesting formats.
1912 */
6f306441 1913 u8[0] |= map->read_flag_mask;
b83a313b 1914
fb2736bb
MB
1915 trace_regmap_hw_read_start(map->dev, reg,
1916 val_len / map->format.val_bytes);
1917
0135bbcc 1918 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1919 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1920 val, val_len);
b83a313b 1921
fb2736bb
MB
1922 trace_regmap_hw_read_done(map->dev, reg,
1923 val_len / map->format.val_bytes);
1924
1925 return ret;
b83a313b
MB
1926}
1927
ad278406
AS
1928static int _regmap_bus_read(void *context, unsigned int reg,
1929 unsigned int *val)
1930{
1931 int ret;
1932 struct regmap *map = context;
1933
1934 if (!map->format.parse_val)
1935 return -EINVAL;
1936
1937 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1938 if (ret == 0)
1939 *val = map->format.parse_val(map->work_buf);
1940
1941 return ret;
1942}
1943
b83a313b
MB
1944static int _regmap_read(struct regmap *map, unsigned int reg,
1945 unsigned int *val)
1946{
1947 int ret;
d2a5884a
AS
1948 void *context = _regmap_map_get_context(map);
1949
f1b5c5c3 1950 WARN_ON(!map->reg_read);
b83a313b 1951
5d1729e7
DP
1952 if (!map->cache_bypass) {
1953 ret = regcache_read(map, reg, val);
1954 if (ret == 0)
1955 return 0;
1956 }
1957
1958 if (map->cache_only)
1959 return -EBUSY;
1960
d4807ad2
MS
1961 if (!regmap_readable(map, reg))
1962 return -EIO;
1963
d2a5884a 1964 ret = map->reg_read(context, reg, val);
fb2736bb 1965 if (ret == 0) {
1044c180
MB
1966#ifdef LOG_DEVICE
1967 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1968 dev_info(map->dev, "%x => %x\n", reg, *val);
1969#endif
1970
fb2736bb 1971 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1972
ad278406
AS
1973 if (!map->cache_bypass)
1974 regcache_write(map, reg, *val);
1975 }
f2985367 1976
b83a313b
MB
1977 return ret;
1978}
1979
1980/**
1981 * regmap_read(): Read a value from a single register
1982 *
0093380c 1983 * @map: Register map to read from
b83a313b
MB
1984 * @reg: Register to be read from
1985 * @val: Pointer to store read value
1986 *
1987 * A value of zero will be returned on success, a negative errno will
1988 * be returned in error cases.
1989 */
1990int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1991{
1992 int ret;
1993
f01ee60f
SW
1994 if (reg % map->reg_stride)
1995 return -EINVAL;
1996
0d4529c5 1997 map->lock(map->lock_arg);
b83a313b
MB
1998
1999 ret = _regmap_read(map, reg, val);
2000
0d4529c5 2001 map->unlock(map->lock_arg);
b83a313b
MB
2002
2003 return ret;
2004}
2005EXPORT_SYMBOL_GPL(regmap_read);
2006
2007/**
2008 * regmap_raw_read(): Read raw data from the device
2009 *
0093380c 2010 * @map: Register map to read from
b83a313b
MB
2011 * @reg: First register to be read from
2012 * @val: Pointer to store read value
2013 * @val_len: Size of data to read
2014 *
2015 * A value of zero will be returned on success, a negative errno will
2016 * be returned in error cases.
2017 */
2018int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2019 size_t val_len)
2020{
b8fb5ab1
MB
2021 size_t val_bytes = map->format.val_bytes;
2022 size_t val_count = val_len / val_bytes;
2023 unsigned int v;
2024 int ret, i;
04e016ad 2025
d2a5884a
AS
2026 if (!map->bus)
2027 return -EINVAL;
851960ba
SW
2028 if (val_len % map->format.val_bytes)
2029 return -EINVAL;
f01ee60f
SW
2030 if (reg % map->reg_stride)
2031 return -EINVAL;
851960ba 2032
0d4529c5 2033 map->lock(map->lock_arg);
b83a313b 2034
b8fb5ab1
MB
2035 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2036 map->cache_type == REGCACHE_NONE) {
2037 /* Physical block read if there's no cache involved */
2038 ret = _regmap_raw_read(map, reg, val, val_len);
2039
2040 } else {
2041 /* Otherwise go word by word for the cache; should be low
2042 * cost as we expect to hit the cache.
2043 */
2044 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2045 ret = _regmap_read(map, reg + (i * map->reg_stride),
2046 &v);
b8fb5ab1
MB
2047 if (ret != 0)
2048 goto out;
2049
d939fb9a 2050 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2051 }
2052 }
b83a313b 2053
b8fb5ab1 2054 out:
0d4529c5 2055 map->unlock(map->lock_arg);
b83a313b
MB
2056
2057 return ret;
2058}
2059EXPORT_SYMBOL_GPL(regmap_raw_read);
2060
67252287
SK
2061/**
2062 * regmap_field_read(): Read a value to a single register field
2063 *
2064 * @field: Register field to read from
2065 * @val: Pointer to store read value
2066 *
2067 * A value of zero will be returned on success, a negative errno will
2068 * be returned in error cases.
2069 */
2070int regmap_field_read(struct regmap_field *field, unsigned int *val)
2071{
2072 int ret;
2073 unsigned int reg_val;
2074 ret = regmap_read(field->regmap, field->reg, &reg_val);
2075 if (ret != 0)
2076 return ret;
2077
2078 reg_val &= field->mask;
2079 reg_val >>= field->shift;
2080 *val = reg_val;
2081
2082 return ret;
2083}
2084EXPORT_SYMBOL_GPL(regmap_field_read);
2085
a0102375
KM
2086/**
2087 * regmap_fields_read(): Read a value to a single register field with port ID
2088 *
2089 * @field: Register field to read from
2090 * @id: port ID
2091 * @val: Pointer to store read value
2092 *
2093 * A value of zero will be returned on success, a negative errno will
2094 * be returned in error cases.
2095 */
2096int regmap_fields_read(struct regmap_field *field, unsigned int id,
2097 unsigned int *val)
2098{
2099 int ret;
2100 unsigned int reg_val;
2101
2102 if (id >= field->id_size)
2103 return -EINVAL;
2104
2105 ret = regmap_read(field->regmap,
2106 field->reg + (field->id_offset * id),
2107 &reg_val);
2108 if (ret != 0)
2109 return ret;
2110
2111 reg_val &= field->mask;
2112 reg_val >>= field->shift;
2113 *val = reg_val;
2114
2115 return ret;
2116}
2117EXPORT_SYMBOL_GPL(regmap_fields_read);
2118
b83a313b
MB
2119/**
2120 * regmap_bulk_read(): Read multiple registers from the device
2121 *
0093380c 2122 * @map: Register map to read from
b83a313b
MB
2123 * @reg: First register to be read from
2124 * @val: Pointer to store read value, in native register size for device
2125 * @val_count: Number of registers to read
2126 *
2127 * A value of zero will be returned on success, a negative errno will
2128 * be returned in error cases.
2129 */
2130int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2131 size_t val_count)
2132{
2133 int ret, i;
2134 size_t val_bytes = map->format.val_bytes;
82cd9965 2135 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2136
f01ee60f
SW
2137 if (reg % map->reg_stride)
2138 return -EINVAL;
b83a313b 2139
3b58ee13 2140 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2141 /*
2142 * Some devices does not support bulk read, for
2143 * them we have a series of single read operations.
2144 */
2145 if (map->use_single_rw) {
2146 for (i = 0; i < val_count; i++) {
2147 ret = regmap_raw_read(map,
2148 reg + (i * map->reg_stride),
2149 val + (i * val_bytes),
2150 val_bytes);
2151 if (ret != 0)
2152 return ret;
2153 }
2154 } else {
2155 ret = regmap_raw_read(map, reg, val,
2156 val_bytes * val_count);
2157 if (ret != 0)
2158 return ret;
2159 }
de2d808f
MB
2160
2161 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2162 map->format.parse_inplace(val + i);
de2d808f
MB
2163 } else {
2164 for (i = 0; i < val_count; i++) {
6560ffd1 2165 unsigned int ival;
f01ee60f 2166 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2167 &ival);
de2d808f
MB
2168 if (ret != 0)
2169 return ret;
6560ffd1 2170 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
2171 }
2172 }
b83a313b
MB
2173
2174 return 0;
2175}
2176EXPORT_SYMBOL_GPL(regmap_bulk_read);
2177
018690d3
MB
2178static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2179 unsigned int mask, unsigned int val,
2180 bool *change)
b83a313b
MB
2181{
2182 int ret;
d91e8db2 2183 unsigned int tmp, orig;
b83a313b 2184
d91e8db2 2185 ret = _regmap_read(map, reg, &orig);
b83a313b 2186 if (ret != 0)
fc3ebd78 2187 return ret;
b83a313b 2188
d91e8db2 2189 tmp = orig & ~mask;
b83a313b
MB
2190 tmp |= val & mask;
2191
018690d3 2192 if (tmp != orig) {
d91e8db2 2193 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2194 if (change)
2195 *change = true;
018690d3 2196 } else {
e2f74dc6
XL
2197 if (change)
2198 *change = false;
018690d3 2199 }
b83a313b 2200
b83a313b
MB
2201 return ret;
2202}
018690d3
MB
2203
2204/**
2205 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2206 *
2207 * @map: Register map to update
2208 * @reg: Register to update
2209 * @mask: Bitmask to change
2210 * @val: New value for bitmask
2211 *
2212 * Returns zero for success, a negative number on error.
2213 */
2214int regmap_update_bits(struct regmap *map, unsigned int reg,
2215 unsigned int mask, unsigned int val)
2216{
fc3ebd78
KG
2217 int ret;
2218
0d4529c5 2219 map->lock(map->lock_arg);
e2f74dc6 2220 ret = _regmap_update_bits(map, reg, mask, val, NULL);
0d4529c5 2221 map->unlock(map->lock_arg);
fc3ebd78
KG
2222
2223 return ret;
018690d3 2224}
b83a313b 2225EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2226
915f441b
MB
2227/**
2228 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2229 * map asynchronously
2230 *
2231 * @map: Register map to update
2232 * @reg: Register to update
2233 * @mask: Bitmask to change
2234 * @val: New value for bitmask
2235 *
2236 * With most buses the read must be done synchronously so this is most
2237 * useful for devices with a cache which do not need to interact with
2238 * the hardware to determine the current register value.
2239 *
2240 * Returns zero for success, a negative number on error.
2241 */
2242int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2243 unsigned int mask, unsigned int val)
2244{
915f441b
MB
2245 int ret;
2246
2247 map->lock(map->lock_arg);
2248
2249 map->async = true;
2250
e2f74dc6 2251 ret = _regmap_update_bits(map, reg, mask, val, NULL);
915f441b
MB
2252
2253 map->async = false;
2254
2255 map->unlock(map->lock_arg);
2256
2257 return ret;
2258}
2259EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2260
018690d3
MB
2261/**
2262 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2263 * register map and report if updated
2264 *
2265 * @map: Register map to update
2266 * @reg: Register to update
2267 * @mask: Bitmask to change
2268 * @val: New value for bitmask
2269 * @change: Boolean indicating if a write was done
2270 *
2271 * Returns zero for success, a negative number on error.
2272 */
2273int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2274 unsigned int mask, unsigned int val,
2275 bool *change)
2276{
fc3ebd78
KG
2277 int ret;
2278
0d4529c5 2279 map->lock(map->lock_arg);
fc3ebd78 2280 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2281 map->unlock(map->lock_arg);
fc3ebd78 2282 return ret;
018690d3
MB
2283}
2284EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2285
915f441b
MB
2286/**
2287 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2288 * register map asynchronously and report if
2289 * updated
2290 *
2291 * @map: Register map to update
2292 * @reg: Register to update
2293 * @mask: Bitmask to change
2294 * @val: New value for bitmask
2295 * @change: Boolean indicating if a write was done
2296 *
2297 * With most buses the read must be done synchronously so this is most
2298 * useful for devices with a cache which do not need to interact with
2299 * the hardware to determine the current register value.
2300 *
2301 * Returns zero for success, a negative number on error.
2302 */
2303int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2304 unsigned int mask, unsigned int val,
2305 bool *change)
2306{
2307 int ret;
2308
2309 map->lock(map->lock_arg);
2310
2311 map->async = true;
2312
2313 ret = _regmap_update_bits(map, reg, mask, val, change);
2314
2315 map->async = false;
2316
2317 map->unlock(map->lock_arg);
2318
2319 return ret;
2320}
2321EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2322
0d509f2b
MB
2323void regmap_async_complete_cb(struct regmap_async *async, int ret)
2324{
2325 struct regmap *map = async->map;
2326 bool wake;
2327
fe7d4ccd
MB
2328 trace_regmap_async_io_complete(map->dev);
2329
0d509f2b 2330 spin_lock(&map->async_lock);
7e09a979 2331 list_move(&async->list, &map->async_free);
0d509f2b
MB
2332 wake = list_empty(&map->async_list);
2333
2334 if (ret != 0)
2335 map->async_ret = ret;
2336
2337 spin_unlock(&map->async_lock);
2338
0d509f2b
MB
2339 if (wake)
2340 wake_up(&map->async_waitq);
2341}
f804fb56 2342EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2343
2344static int regmap_async_is_done(struct regmap *map)
2345{
2346 unsigned long flags;
2347 int ret;
2348
2349 spin_lock_irqsave(&map->async_lock, flags);
2350 ret = list_empty(&map->async_list);
2351 spin_unlock_irqrestore(&map->async_lock, flags);
2352
2353 return ret;
2354}
2355
2356/**
2357 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2358 *
2359 * @map: Map to operate on.
2360 *
2361 * Blocks until any pending asynchronous I/O has completed. Returns
2362 * an error code for any failed I/O operations.
2363 */
2364int regmap_async_complete(struct regmap *map)
2365{
2366 unsigned long flags;
2367 int ret;
2368
2369 /* Nothing to do with no async support */
f2e055e7 2370 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
2371 return 0;
2372
fe7d4ccd
MB
2373 trace_regmap_async_complete_start(map->dev);
2374
0d509f2b
MB
2375 wait_event(map->async_waitq, regmap_async_is_done(map));
2376
2377 spin_lock_irqsave(&map->async_lock, flags);
2378 ret = map->async_ret;
2379 map->async_ret = 0;
2380 spin_unlock_irqrestore(&map->async_lock, flags);
2381
fe7d4ccd
MB
2382 trace_regmap_async_complete_done(map->dev);
2383
0d509f2b
MB
2384 return ret;
2385}
f88948ef 2386EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2387
22f0d90a
MB
2388/**
2389 * regmap_register_patch: Register and apply register updates to be applied
2390 * on device initialistion
2391 *
2392 * @map: Register map to apply updates to.
2393 * @regs: Values to update.
2394 * @num_regs: Number of entries in regs.
2395 *
2396 * Register a set of register updates to be applied to the device
2397 * whenever the device registers are synchronised with the cache and
2398 * apply them immediately. Typically this is used to apply
2399 * corrections to be applied to the device defaults on startup, such
2400 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB
2401 *
2402 * The caller must ensure that this function cannot be called
2403 * concurrently with either itself or regcache_sync().
22f0d90a
MB
2404 */
2405int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2406 int num_regs)
2407{
aab13ebc 2408 struct reg_default *p;
6bf13103 2409 int ret;
22f0d90a
MB
2410 bool bypass;
2411
bd60e381
CZ
2412 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2413 num_regs))
2414 return 0;
2415
aab13ebc
MB
2416 p = krealloc(map->patch,
2417 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2418 GFP_KERNEL);
2419 if (p) {
2420 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2421 map->patch = p;
2422 map->patch_regs += num_regs;
22f0d90a 2423 } else {
56fb1c74 2424 return -ENOMEM;
22f0d90a
MB
2425 }
2426
0d4529c5 2427 map->lock(map->lock_arg);
22f0d90a
MB
2428
2429 bypass = map->cache_bypass;
2430
2431 map->cache_bypass = true;
1a25f261 2432 map->async = true;
22f0d90a 2433
6bf13103
CK
2434 ret = _regmap_multi_reg_write(map, regs, num_regs);
2435 if (ret != 0)
2436 goto out;
22f0d90a 2437
22f0d90a 2438out:
1a25f261 2439 map->async = false;
22f0d90a
MB
2440 map->cache_bypass = bypass;
2441
0d4529c5 2442 map->unlock(map->lock_arg);
22f0d90a 2443
1a25f261
MB
2444 regmap_async_complete(map);
2445
22f0d90a
MB
2446 return ret;
2447}
2448EXPORT_SYMBOL_GPL(regmap_register_patch);
2449
eae4b51b 2450/*
a6539c32
MB
2451 * regmap_get_val_bytes(): Report the size of a register value
2452 *
2453 * Report the size of a register value, mainly intended to for use by
2454 * generic infrastructure built on top of regmap.
2455 */
2456int regmap_get_val_bytes(struct regmap *map)
2457{
2458 if (map->format.format_write)
2459 return -EINVAL;
2460
2461 return map->format.val_bytes;
2462}
2463EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2464
13ff50c8
NC
2465int regmap_parse_val(struct regmap *map, const void *buf,
2466 unsigned int *val)
2467{
2468 if (!map->format.parse_val)
2469 return -EINVAL;
2470
2471 *val = map->format.parse_val(buf);
2472
2473 return 0;
2474}
2475EXPORT_SYMBOL_GPL(regmap_parse_val);
2476
31244e39
MB
2477static int __init regmap_initcall(void)
2478{
2479 regmap_debugfs_initcall();
2480
2481 return 0;
2482}
2483postcore_initcall(regmap_initcall);
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