regmap: Split regmap_get_endian() in two functions
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
d647c199 18#include <linux/of.h>
6863ca62 19#include <linux/rbtree.h>
30b2a553 20#include <linux/sched.h>
b83a313b 21
fb2736bb
MB
22#define CREATE_TRACE_POINTS
23#include <trace/events/regmap.h>
24
93de9124 25#include "internal.h"
b83a313b 26
1044c180
MB
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35static int _regmap_update_bits(struct regmap *map, unsigned int reg,
36 unsigned int mask, unsigned int val,
37 bool *change);
38
3ac17037
BB
39static int _regmap_bus_reg_read(void *context, unsigned int reg,
40 unsigned int *val);
ad278406
AS
41static int _regmap_bus_read(void *context, unsigned int reg,
42 unsigned int *val);
07c320dc
AS
43static int _regmap_bus_formatted_write(void *context, unsigned int reg,
44 unsigned int val);
3ac17037
BB
45static int _regmap_bus_reg_write(void *context, unsigned int reg,
46 unsigned int val);
07c320dc
AS
47static int _regmap_bus_raw_write(void *context, unsigned int reg,
48 unsigned int val);
ad278406 49
76aad392
DC
50bool regmap_reg_in_ranges(unsigned int reg,
51 const struct regmap_range *ranges,
52 unsigned int nranges)
53{
54 const struct regmap_range *r;
55 int i;
56
57 for (i = 0, r = ranges; i < nranges; i++, r++)
58 if (regmap_reg_in_range(reg, r))
59 return true;
60 return false;
61}
62EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
63
154881e5
MB
64bool regmap_check_range_table(struct regmap *map, unsigned int reg,
65 const struct regmap_access_table *table)
76aad392
DC
66{
67 /* Check "no ranges" first */
68 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
69 return false;
70
71 /* In case zero "yes ranges" are supplied, any reg is OK */
72 if (!table->n_yes_ranges)
73 return true;
74
75 return regmap_reg_in_ranges(reg, table->yes_ranges,
76 table->n_yes_ranges);
77}
154881e5 78EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 79
8de2f081
MB
80bool regmap_writeable(struct regmap *map, unsigned int reg)
81{
82 if (map->max_register && reg > map->max_register)
83 return false;
84
85 if (map->writeable_reg)
86 return map->writeable_reg(map->dev, reg);
87
76aad392 88 if (map->wr_table)
154881e5 89 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 90
8de2f081
MB
91 return true;
92}
93
94bool regmap_readable(struct regmap *map, unsigned int reg)
95{
96 if (map->max_register && reg > map->max_register)
97 return false;
98
4191f197
WS
99 if (map->format.format_write)
100 return false;
101
8de2f081
MB
102 if (map->readable_reg)
103 return map->readable_reg(map->dev, reg);
104
76aad392 105 if (map->rd_table)
154881e5 106 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 107
8de2f081
MB
108 return true;
109}
110
111bool regmap_volatile(struct regmap *map, unsigned int reg)
112{
4191f197 113 if (!regmap_readable(map, reg))
8de2f081
MB
114 return false;
115
116 if (map->volatile_reg)
117 return map->volatile_reg(map->dev, reg);
118
76aad392 119 if (map->volatile_table)
154881e5 120 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 121
b92be6fe
MB
122 if (map->cache_ops)
123 return false;
124 else
125 return true;
8de2f081
MB
126}
127
128bool regmap_precious(struct regmap *map, unsigned int reg)
129{
4191f197 130 if (!regmap_readable(map, reg))
8de2f081
MB
131 return false;
132
133 if (map->precious_reg)
134 return map->precious_reg(map->dev, reg);
135
76aad392 136 if (map->precious_table)
154881e5 137 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 138
8de2f081
MB
139 return false;
140}
141
82cd9965 142static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 143 size_t num)
82cd9965
LPC
144{
145 unsigned int i;
146
147 for (i = 0; i < num; i++)
148 if (!regmap_volatile(map, reg + i))
149 return false;
150
151 return true;
152}
153
9aa50750
WS
154static void regmap_format_2_6_write(struct regmap *map,
155 unsigned int reg, unsigned int val)
156{
157 u8 *out = map->work_buf;
158
159 *out = (reg << 6) | val;
160}
161
b83a313b
MB
162static void regmap_format_4_12_write(struct regmap *map,
163 unsigned int reg, unsigned int val)
164{
165 __be16 *out = map->work_buf;
166 *out = cpu_to_be16((reg << 12) | val);
167}
168
169static void regmap_format_7_9_write(struct regmap *map,
170 unsigned int reg, unsigned int val)
171{
172 __be16 *out = map->work_buf;
173 *out = cpu_to_be16((reg << 9) | val);
174}
175
7e5ec63e
LPC
176static void regmap_format_10_14_write(struct regmap *map,
177 unsigned int reg, unsigned int val)
178{
179 u8 *out = map->work_buf;
180
181 out[2] = val;
182 out[1] = (val >> 8) | (reg << 6);
183 out[0] = reg >> 2;
184}
185
d939fb9a 186static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
187{
188 u8 *b = buf;
189
d939fb9a 190 b[0] = val << shift;
b83a313b
MB
191}
192
141eba2e 193static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
194{
195 __be16 *b = buf;
196
d939fb9a 197 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
198}
199
4aa8c069
XL
200static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
201{
202 __le16 *b = buf;
203
204 b[0] = cpu_to_le16(val << shift);
205}
206
141eba2e
SW
207static void regmap_format_16_native(void *buf, unsigned int val,
208 unsigned int shift)
209{
210 *(u16 *)buf = val << shift;
211}
212
d939fb9a 213static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
214{
215 u8 *b = buf;
216
d939fb9a
MR
217 val <<= shift;
218
ea279fc5
MR
219 b[0] = val >> 16;
220 b[1] = val >> 8;
221 b[2] = val;
222}
223
141eba2e 224static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
225{
226 __be32 *b = buf;
227
d939fb9a 228 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
229}
230
4aa8c069
XL
231static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
232{
233 __le32 *b = buf;
234
235 b[0] = cpu_to_le32(val << shift);
236}
237
141eba2e
SW
238static void regmap_format_32_native(void *buf, unsigned int val,
239 unsigned int shift)
240{
241 *(u32 *)buf = val << shift;
242}
243
8a819ff8 244static void regmap_parse_inplace_noop(void *buf)
b83a313b 245{
8a819ff8
MB
246}
247
248static unsigned int regmap_parse_8(const void *buf)
249{
250 const u8 *b = buf;
b83a313b
MB
251
252 return b[0];
253}
254
8a819ff8
MB
255static unsigned int regmap_parse_16_be(const void *buf)
256{
257 const __be16 *b = buf;
258
259 return be16_to_cpu(b[0]);
260}
261
4aa8c069
XL
262static unsigned int regmap_parse_16_le(const void *buf)
263{
264 const __le16 *b = buf;
265
266 return le16_to_cpu(b[0]);
267}
268
8a819ff8 269static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
270{
271 __be16 *b = buf;
272
273 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
274}
275
4aa8c069
XL
276static void regmap_parse_16_le_inplace(void *buf)
277{
278 __le16 *b = buf;
279
280 b[0] = le16_to_cpu(b[0]);
281}
282
8a819ff8 283static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
284{
285 return *(u16 *)buf;
286}
287
8a819ff8 288static unsigned int regmap_parse_24(const void *buf)
ea279fc5 289{
8a819ff8 290 const u8 *b = buf;
ea279fc5
MR
291 unsigned int ret = b[2];
292 ret |= ((unsigned int)b[1]) << 8;
293 ret |= ((unsigned int)b[0]) << 16;
294
295 return ret;
296}
297
8a819ff8
MB
298static unsigned int regmap_parse_32_be(const void *buf)
299{
300 const __be32 *b = buf;
301
302 return be32_to_cpu(b[0]);
303}
304
4aa8c069
XL
305static unsigned int regmap_parse_32_le(const void *buf)
306{
307 const __le32 *b = buf;
308
309 return le32_to_cpu(b[0]);
310}
311
8a819ff8 312static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
313{
314 __be32 *b = buf;
315
316 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
317}
318
4aa8c069
XL
319static void regmap_parse_32_le_inplace(void *buf)
320{
321 __le32 *b = buf;
322
323 b[0] = le32_to_cpu(b[0]);
324}
325
8a819ff8 326static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
327{
328 return *(u32 *)buf;
329}
330
0d4529c5 331static void regmap_lock_mutex(void *__map)
bacdbe07 332{
0d4529c5 333 struct regmap *map = __map;
bacdbe07
SW
334 mutex_lock(&map->mutex);
335}
336
0d4529c5 337static void regmap_unlock_mutex(void *__map)
bacdbe07 338{
0d4529c5 339 struct regmap *map = __map;
bacdbe07
SW
340 mutex_unlock(&map->mutex);
341}
342
0d4529c5 343static void regmap_lock_spinlock(void *__map)
b4519c71 344__acquires(&map->spinlock)
bacdbe07 345{
0d4529c5 346 struct regmap *map = __map;
92ab1aab
LPC
347 unsigned long flags;
348
349 spin_lock_irqsave(&map->spinlock, flags);
350 map->spinlock_flags = flags;
bacdbe07
SW
351}
352
0d4529c5 353static void regmap_unlock_spinlock(void *__map)
b4519c71 354__releases(&map->spinlock)
bacdbe07 355{
0d4529c5 356 struct regmap *map = __map;
92ab1aab 357 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
358}
359
72b39f6f
MB
360static void dev_get_regmap_release(struct device *dev, void *res)
361{
362 /*
363 * We don't actually have anything to do here; the goal here
364 * is not to manage the regmap but to provide a simple way to
365 * get the regmap back given a struct device.
366 */
367}
368
6863ca62
KG
369static bool _regmap_range_add(struct regmap *map,
370 struct regmap_range_node *data)
371{
372 struct rb_root *root = &map->range_tree;
373 struct rb_node **new = &(root->rb_node), *parent = NULL;
374
375 while (*new) {
376 struct regmap_range_node *this =
377 container_of(*new, struct regmap_range_node, node);
378
379 parent = *new;
380 if (data->range_max < this->range_min)
381 new = &((*new)->rb_left);
382 else if (data->range_min > this->range_max)
383 new = &((*new)->rb_right);
384 else
385 return false;
386 }
387
388 rb_link_node(&data->node, parent, new);
389 rb_insert_color(&data->node, root);
390
391 return true;
392}
393
394static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
395 unsigned int reg)
396{
397 struct rb_node *node = map->range_tree.rb_node;
398
399 while (node) {
400 struct regmap_range_node *this =
401 container_of(node, struct regmap_range_node, node);
402
403 if (reg < this->range_min)
404 node = node->rb_left;
405 else if (reg > this->range_max)
406 node = node->rb_right;
407 else
408 return this;
409 }
410
411 return NULL;
412}
413
414static void regmap_range_exit(struct regmap *map)
415{
416 struct rb_node *next;
417 struct regmap_range_node *range_node;
418
419 next = rb_first(&map->range_tree);
420 while (next) {
421 range_node = rb_entry(next, struct regmap_range_node, node);
422 next = rb_next(&range_node->node);
423 rb_erase(&range_node->node, &map->range_tree);
424 kfree(range_node);
425 }
426
427 kfree(map->selector_work_buf);
428}
429
6cfec04b
MS
430int regmap_attach_dev(struct device *dev, struct regmap *map,
431 const struct regmap_config *config)
432{
433 struct regmap **m;
434
435 map->dev = dev;
436
437 regmap_debugfs_init(map, config->name);
438
439 /* Add a devres resource for dev_get_regmap() */
440 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
441 if (!m) {
442 regmap_debugfs_exit(map);
443 return -ENOMEM;
444 }
445 *m = map;
446 devres_add(dev, m);
447
448 return 0;
449}
450EXPORT_SYMBOL_GPL(regmap_attach_dev);
451
cf673fbc
GU
452static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
453 const struct regmap_config *config)
454{
455 enum regmap_endian endian;
456
457 /* Retrieve the endianness specification from the regmap config */
458 endian = config->reg_format_endian;
459
460 /* If the regmap config specified a non-default value, use that */
461 if (endian != REGMAP_ENDIAN_DEFAULT)
462 return endian;
463
464 /* Retrieve the endianness specification from the bus config */
465 if (bus && bus->reg_format_endian_default)
466 endian = bus->reg_format_endian_default;
d647c199 467
cf673fbc
GU
468 /* If the bus specified a non-default value, use that */
469 if (endian != REGMAP_ENDIAN_DEFAULT)
470 return endian;
471
472 /* Use this if no other value was found */
473 return REGMAP_ENDIAN_BIG;
474}
475
476static enum regmap_endian regmap_get_val_endian(struct device *dev,
477 const struct regmap_bus *bus,
478 const struct regmap_config *config)
d647c199
XL
479{
480 struct device_node *np = dev->of_node;
cf673fbc 481 enum regmap_endian endian;
d647c199 482
45e1a279 483 /* Retrieve the endianness specification from the regmap config */
cf673fbc 484 endian = config->val_format_endian;
d647c199 485
45e1a279 486 /* If the regmap config specified a non-default value, use that */
cf673fbc
GU
487 if (endian != REGMAP_ENDIAN_DEFAULT)
488 return endian;
d647c199 489
45e1a279 490 /* Parse the device's DT node for an endianness specification */
cf673fbc
GU
491 if (of_property_read_bool(np, "big-endian"))
492 endian = REGMAP_ENDIAN_BIG;
493 else if (of_property_read_bool(np, "little-endian"))
494 endian = REGMAP_ENDIAN_LITTLE;
d647c199 495
45e1a279 496 /* If the endianness was specified in DT, use that */
cf673fbc
GU
497 if (endian != REGMAP_ENDIAN_DEFAULT)
498 return endian;
45e1a279
SW
499
500 /* Retrieve the endianness specification from the bus config */
cf673fbc
GU
501 if (bus && bus->val_format_endian_default)
502 endian = bus->val_format_endian_default;
d647c199 503
45e1a279 504 /* If the bus specified a non-default value, use that */
cf673fbc
GU
505 if (endian != REGMAP_ENDIAN_DEFAULT)
506 return endian;
45e1a279
SW
507
508 /* Use this if no other value was found */
cf673fbc 509 return REGMAP_ENDIAN_BIG;
d647c199
XL
510}
511
b83a313b
MB
512/**
513 * regmap_init(): Initialise register map
514 *
515 * @dev: Device that will be interacted with
516 * @bus: Bus-specific callbacks to use with device
0135bbcc 517 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
518 * @config: Configuration for register map
519 *
520 * The return value will be an ERR_PTR() on error or a valid pointer to
521 * a struct regmap. This function should generally not be called
522 * directly, it should be called by bus-specific init functions.
523 */
524struct regmap *regmap_init(struct device *dev,
525 const struct regmap_bus *bus,
0135bbcc 526 void *bus_context,
b83a313b
MB
527 const struct regmap_config *config)
528{
6cfec04b 529 struct regmap *map;
b83a313b 530 int ret = -EINVAL;
141eba2e 531 enum regmap_endian reg_endian, val_endian;
6863ca62 532 int i, j;
b83a313b 533
d2a5884a 534 if (!config)
abbb18fb 535 goto err;
b83a313b
MB
536
537 map = kzalloc(sizeof(*map), GFP_KERNEL);
538 if (map == NULL) {
539 ret = -ENOMEM;
540 goto err;
541 }
542
0d4529c5
DC
543 if (config->lock && config->unlock) {
544 map->lock = config->lock;
545 map->unlock = config->unlock;
546 map->lock_arg = config->lock_arg;
bacdbe07 547 } else {
d2a5884a
AS
548 if ((bus && bus->fast_io) ||
549 config->fast_io) {
0d4529c5
DC
550 spin_lock_init(&map->spinlock);
551 map->lock = regmap_lock_spinlock;
552 map->unlock = regmap_unlock_spinlock;
553 } else {
554 mutex_init(&map->mutex);
555 map->lock = regmap_lock_mutex;
556 map->unlock = regmap_unlock_mutex;
557 }
558 map->lock_arg = map;
bacdbe07 559 }
c212accc 560 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 561 map->format.pad_bytes = config->pad_bits / 8;
c212accc 562 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
563 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
564 config->val_bits + config->pad_bits, 8);
d939fb9a 565 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
566 if (config->reg_stride)
567 map->reg_stride = config->reg_stride;
568 else
569 map->reg_stride = 1;
2e33caf1 570 map->use_single_rw = config->use_single_rw;
e894c3f4 571 map->can_multi_write = config->can_multi_write;
b83a313b
MB
572 map->dev = dev;
573 map->bus = bus;
0135bbcc 574 map->bus_context = bus_context;
2e2ae66d 575 map->max_register = config->max_register;
76aad392
DC
576 map->wr_table = config->wr_table;
577 map->rd_table = config->rd_table;
578 map->volatile_table = config->volatile_table;
579 map->precious_table = config->precious_table;
2e2ae66d
MB
580 map->writeable_reg = config->writeable_reg;
581 map->readable_reg = config->readable_reg;
582 map->volatile_reg = config->volatile_reg;
2efe1642 583 map->precious_reg = config->precious_reg;
5d1729e7 584 map->cache_type = config->cache_type;
72b39f6f 585 map->name = config->name;
b83a313b 586
0d509f2b
MB
587 spin_lock_init(&map->async_lock);
588 INIT_LIST_HEAD(&map->async_list);
7e09a979 589 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
590 init_waitqueue_head(&map->async_waitq);
591
6f306441
LPC
592 if (config->read_flag_mask || config->write_flag_mask) {
593 map->read_flag_mask = config->read_flag_mask;
594 map->write_flag_mask = config->write_flag_mask;
d2a5884a 595 } else if (bus) {
6f306441
LPC
596 map->read_flag_mask = bus->read_flag_mask;
597 }
598
d2a5884a
AS
599 if (!bus) {
600 map->reg_read = config->reg_read;
601 map->reg_write = config->reg_write;
602
3ac17037
BB
603 map->defer_caching = false;
604 goto skip_format_initialization;
605 } else if (!bus->read || !bus->write) {
606 map->reg_read = _regmap_bus_reg_read;
607 map->reg_write = _regmap_bus_reg_write;
608
d2a5884a
AS
609 map->defer_caching = false;
610 goto skip_format_initialization;
611 } else {
612 map->reg_read = _regmap_bus_read;
613 }
ad278406 614
cf673fbc
GU
615 reg_endian = regmap_get_reg_endian(bus, config);
616 val_endian = regmap_get_val_endian(dev, bus, config);
141eba2e 617
d939fb9a 618 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
619 case 2:
620 switch (config->val_bits) {
621 case 6:
622 map->format.format_write = regmap_format_2_6_write;
623 break;
624 default:
625 goto err_map;
626 }
627 break;
628
b83a313b
MB
629 case 4:
630 switch (config->val_bits) {
631 case 12:
632 map->format.format_write = regmap_format_4_12_write;
633 break;
634 default:
635 goto err_map;
636 }
637 break;
638
639 case 7:
640 switch (config->val_bits) {
641 case 9:
642 map->format.format_write = regmap_format_7_9_write;
643 break;
644 default:
645 goto err_map;
646 }
647 break;
648
7e5ec63e
LPC
649 case 10:
650 switch (config->val_bits) {
651 case 14:
652 map->format.format_write = regmap_format_10_14_write;
653 break;
654 default:
655 goto err_map;
656 }
657 break;
658
b83a313b
MB
659 case 8:
660 map->format.format_reg = regmap_format_8;
661 break;
662
663 case 16:
141eba2e
SW
664 switch (reg_endian) {
665 case REGMAP_ENDIAN_BIG:
666 map->format.format_reg = regmap_format_16_be;
667 break;
668 case REGMAP_ENDIAN_NATIVE:
669 map->format.format_reg = regmap_format_16_native;
670 break;
671 default:
672 goto err_map;
673 }
b83a313b
MB
674 break;
675
237019e7
LPC
676 case 24:
677 if (reg_endian != REGMAP_ENDIAN_BIG)
678 goto err_map;
679 map->format.format_reg = regmap_format_24;
680 break;
681
7d5e525b 682 case 32:
141eba2e
SW
683 switch (reg_endian) {
684 case REGMAP_ENDIAN_BIG:
685 map->format.format_reg = regmap_format_32_be;
686 break;
687 case REGMAP_ENDIAN_NATIVE:
688 map->format.format_reg = regmap_format_32_native;
689 break;
690 default:
691 goto err_map;
692 }
7d5e525b
MB
693 break;
694
b83a313b
MB
695 default:
696 goto err_map;
697 }
698
8a819ff8
MB
699 if (val_endian == REGMAP_ENDIAN_NATIVE)
700 map->format.parse_inplace = regmap_parse_inplace_noop;
701
b83a313b
MB
702 switch (config->val_bits) {
703 case 8:
704 map->format.format_val = regmap_format_8;
705 map->format.parse_val = regmap_parse_8;
8a819ff8 706 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
707 break;
708 case 16:
141eba2e
SW
709 switch (val_endian) {
710 case REGMAP_ENDIAN_BIG:
711 map->format.format_val = regmap_format_16_be;
712 map->format.parse_val = regmap_parse_16_be;
8a819ff8 713 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 714 break;
4aa8c069
XL
715 case REGMAP_ENDIAN_LITTLE:
716 map->format.format_val = regmap_format_16_le;
717 map->format.parse_val = regmap_parse_16_le;
718 map->format.parse_inplace = regmap_parse_16_le_inplace;
719 break;
141eba2e
SW
720 case REGMAP_ENDIAN_NATIVE:
721 map->format.format_val = regmap_format_16_native;
722 map->format.parse_val = regmap_parse_16_native;
723 break;
724 default:
725 goto err_map;
726 }
b83a313b 727 break;
ea279fc5 728 case 24:
141eba2e
SW
729 if (val_endian != REGMAP_ENDIAN_BIG)
730 goto err_map;
ea279fc5
MR
731 map->format.format_val = regmap_format_24;
732 map->format.parse_val = regmap_parse_24;
733 break;
7d5e525b 734 case 32:
141eba2e
SW
735 switch (val_endian) {
736 case REGMAP_ENDIAN_BIG:
737 map->format.format_val = regmap_format_32_be;
738 map->format.parse_val = regmap_parse_32_be;
8a819ff8 739 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 740 break;
4aa8c069
XL
741 case REGMAP_ENDIAN_LITTLE:
742 map->format.format_val = regmap_format_32_le;
743 map->format.parse_val = regmap_parse_32_le;
744 map->format.parse_inplace = regmap_parse_32_le_inplace;
745 break;
141eba2e
SW
746 case REGMAP_ENDIAN_NATIVE:
747 map->format.format_val = regmap_format_32_native;
748 map->format.parse_val = regmap_parse_32_native;
749 break;
750 default:
751 goto err_map;
752 }
7d5e525b 753 break;
b83a313b
MB
754 }
755
141eba2e
SW
756 if (map->format.format_write) {
757 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
758 (val_endian != REGMAP_ENDIAN_BIG))
759 goto err_map;
7a647614 760 map->use_single_rw = true;
141eba2e 761 }
7a647614 762
b83a313b
MB
763 if (!map->format.format_write &&
764 !(map->format.format_reg && map->format.format_val))
765 goto err_map;
766
82159ba8 767 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
768 if (map->work_buf == NULL) {
769 ret = -ENOMEM;
5204f5e3 770 goto err_map;
b83a313b
MB
771 }
772
d2a5884a
AS
773 if (map->format.format_write) {
774 map->defer_caching = false;
07c320dc 775 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
776 } else if (map->format.format_val) {
777 map->defer_caching = true;
07c320dc 778 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
779 }
780
781skip_format_initialization:
07c320dc 782
6863ca62 783 map->range_tree = RB_ROOT;
e3549cd0 784 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
785 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
786 struct regmap_range_node *new;
787
788 /* Sanity check */
061adc06
MB
789 if (range_cfg->range_max < range_cfg->range_min) {
790 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
791 range_cfg->range_max, range_cfg->range_min);
6863ca62 792 goto err_range;
061adc06
MB
793 }
794
795 if (range_cfg->range_max > map->max_register) {
796 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
797 range_cfg->range_max, map->max_register);
798 goto err_range;
799 }
800
801 if (range_cfg->selector_reg > map->max_register) {
802 dev_err(map->dev,
803 "Invalid range %d: selector out of map\n", i);
804 goto err_range;
805 }
806
807 if (range_cfg->window_len == 0) {
808 dev_err(map->dev, "Invalid range %d: window_len 0\n",
809 i);
810 goto err_range;
811 }
6863ca62
KG
812
813 /* Make sure, that this register range has no selector
814 or data window within its boundary */
e3549cd0 815 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
816 unsigned sel_reg = config->ranges[j].selector_reg;
817 unsigned win_min = config->ranges[j].window_start;
818 unsigned win_max = win_min +
819 config->ranges[j].window_len - 1;
820
f161d220
PZ
821 /* Allow data window inside its own virtual range */
822 if (j == i)
823 continue;
824
6863ca62
KG
825 if (range_cfg->range_min <= sel_reg &&
826 sel_reg <= range_cfg->range_max) {
061adc06
MB
827 dev_err(map->dev,
828 "Range %d: selector for %d in window\n",
829 i, j);
6863ca62
KG
830 goto err_range;
831 }
832
833 if (!(win_max < range_cfg->range_min ||
834 win_min > range_cfg->range_max)) {
061adc06
MB
835 dev_err(map->dev,
836 "Range %d: window for %d in window\n",
837 i, j);
6863ca62
KG
838 goto err_range;
839 }
840 }
841
842 new = kzalloc(sizeof(*new), GFP_KERNEL);
843 if (new == NULL) {
844 ret = -ENOMEM;
845 goto err_range;
846 }
847
4b020b3f 848 new->map = map;
d058bb49 849 new->name = range_cfg->name;
6863ca62
KG
850 new->range_min = range_cfg->range_min;
851 new->range_max = range_cfg->range_max;
852 new->selector_reg = range_cfg->selector_reg;
853 new->selector_mask = range_cfg->selector_mask;
854 new->selector_shift = range_cfg->selector_shift;
855 new->window_start = range_cfg->window_start;
856 new->window_len = range_cfg->window_len;
857
53e87f88 858 if (!_regmap_range_add(map, new)) {
061adc06 859 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
860 kfree(new);
861 goto err_range;
862 }
863
864 if (map->selector_work_buf == NULL) {
865 map->selector_work_buf =
866 kzalloc(map->format.buf_size, GFP_KERNEL);
867 if (map->selector_work_buf == NULL) {
868 ret = -ENOMEM;
869 goto err_range;
870 }
871 }
872 }
052d2cd1 873
e5e3b8ab 874 ret = regcache_init(map, config);
0ff3e62f 875 if (ret != 0)
6863ca62
KG
876 goto err_range;
877
a7a037c8 878 if (dev) {
6cfec04b
MS
879 ret = regmap_attach_dev(dev, map, config);
880 if (ret != 0)
881 goto err_regcache;
a7a037c8 882 }
72b39f6f 883
b83a313b
MB
884 return map;
885
6cfec04b 886err_regcache:
72b39f6f 887 regcache_exit(map);
6863ca62
KG
888err_range:
889 regmap_range_exit(map);
58072cbf 890 kfree(map->work_buf);
b83a313b
MB
891err_map:
892 kfree(map);
893err:
894 return ERR_PTR(ret);
895}
896EXPORT_SYMBOL_GPL(regmap_init);
897
c0eb4676
MB
898static void devm_regmap_release(struct device *dev, void *res)
899{
900 regmap_exit(*(struct regmap **)res);
901}
902
903/**
904 * devm_regmap_init(): Initialise managed register map
905 *
906 * @dev: Device that will be interacted with
907 * @bus: Bus-specific callbacks to use with device
0135bbcc 908 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
909 * @config: Configuration for register map
910 *
911 * The return value will be an ERR_PTR() on error or a valid pointer
912 * to a struct regmap. This function should generally not be called
913 * directly, it should be called by bus-specific init functions. The
914 * map will be automatically freed by the device management code.
915 */
916struct regmap *devm_regmap_init(struct device *dev,
917 const struct regmap_bus *bus,
0135bbcc 918 void *bus_context,
c0eb4676
MB
919 const struct regmap_config *config)
920{
921 struct regmap **ptr, *regmap;
922
923 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
924 if (!ptr)
925 return ERR_PTR(-ENOMEM);
926
0135bbcc 927 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
928 if (!IS_ERR(regmap)) {
929 *ptr = regmap;
930 devres_add(dev, ptr);
931 } else {
932 devres_free(ptr);
933 }
934
935 return regmap;
936}
937EXPORT_SYMBOL_GPL(devm_regmap_init);
938
67252287
SK
939static void regmap_field_init(struct regmap_field *rm_field,
940 struct regmap *regmap, struct reg_field reg_field)
941{
942 int field_bits = reg_field.msb - reg_field.lsb + 1;
943 rm_field->regmap = regmap;
944 rm_field->reg = reg_field.reg;
945 rm_field->shift = reg_field.lsb;
946 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
a0102375
KM
947 rm_field->id_size = reg_field.id_size;
948 rm_field->id_offset = reg_field.id_offset;
67252287
SK
949}
950
951/**
952 * devm_regmap_field_alloc(): Allocate and initialise a register field
953 * in a register map.
954 *
955 * @dev: Device that will be interacted with
956 * @regmap: regmap bank in which this register field is located.
957 * @reg_field: Register field with in the bank.
958 *
959 * The return value will be an ERR_PTR() on error or a valid pointer
960 * to a struct regmap_field. The regmap_field will be automatically freed
961 * by the device management code.
962 */
963struct regmap_field *devm_regmap_field_alloc(struct device *dev,
964 struct regmap *regmap, struct reg_field reg_field)
965{
966 struct regmap_field *rm_field = devm_kzalloc(dev,
967 sizeof(*rm_field), GFP_KERNEL);
968 if (!rm_field)
969 return ERR_PTR(-ENOMEM);
970
971 regmap_field_init(rm_field, regmap, reg_field);
972
973 return rm_field;
974
975}
976EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
977
978/**
979 * devm_regmap_field_free(): Free register field allocated using
980 * devm_regmap_field_alloc. Usally drivers need not call this function,
981 * as the memory allocated via devm will be freed as per device-driver
982 * life-cyle.
983 *
984 * @dev: Device that will be interacted with
985 * @field: regmap field which should be freed.
986 */
987void devm_regmap_field_free(struct device *dev,
988 struct regmap_field *field)
989{
990 devm_kfree(dev, field);
991}
992EXPORT_SYMBOL_GPL(devm_regmap_field_free);
993
994/**
995 * regmap_field_alloc(): Allocate and initialise a register field
996 * in a register map.
997 *
998 * @regmap: regmap bank in which this register field is located.
999 * @reg_field: Register field with in the bank.
1000 *
1001 * The return value will be an ERR_PTR() on error or a valid pointer
1002 * to a struct regmap_field. The regmap_field should be freed by the
1003 * user once its finished working with it using regmap_field_free().
1004 */
1005struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1006 struct reg_field reg_field)
1007{
1008 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1009
1010 if (!rm_field)
1011 return ERR_PTR(-ENOMEM);
1012
1013 regmap_field_init(rm_field, regmap, reg_field);
1014
1015 return rm_field;
1016}
1017EXPORT_SYMBOL_GPL(regmap_field_alloc);
1018
1019/**
1020 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1021 *
1022 * @field: regmap field which should be freed.
1023 */
1024void regmap_field_free(struct regmap_field *field)
1025{
1026 kfree(field);
1027}
1028EXPORT_SYMBOL_GPL(regmap_field_free);
1029
bf315173
MB
1030/**
1031 * regmap_reinit_cache(): Reinitialise the current register cache
1032 *
1033 * @map: Register map to operate on.
1034 * @config: New configuration. Only the cache data will be used.
1035 *
1036 * Discard any existing register cache for the map and initialize a
1037 * new cache. This can be used to restore the cache to defaults or to
1038 * update the cache configuration to reflect runtime discovery of the
1039 * hardware.
4d879514
DP
1040 *
1041 * No explicit locking is done here, the user needs to ensure that
1042 * this function will not race with other calls to regmap.
bf315173
MB
1043 */
1044int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1045{
bf315173 1046 regcache_exit(map);
a24f64a6 1047 regmap_debugfs_exit(map);
bf315173
MB
1048
1049 map->max_register = config->max_register;
1050 map->writeable_reg = config->writeable_reg;
1051 map->readable_reg = config->readable_reg;
1052 map->volatile_reg = config->volatile_reg;
1053 map->precious_reg = config->precious_reg;
1054 map->cache_type = config->cache_type;
1055
d3c242e1 1056 regmap_debugfs_init(map, config->name);
a24f64a6 1057
421e8d2d
MB
1058 map->cache_bypass = false;
1059 map->cache_only = false;
1060
4d879514 1061 return regcache_init(map, config);
bf315173 1062}
752a6a5f 1063EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1064
b83a313b
MB
1065/**
1066 * regmap_exit(): Free a previously allocated register map
1067 */
1068void regmap_exit(struct regmap *map)
1069{
7e09a979
MB
1070 struct regmap_async *async;
1071
5d1729e7 1072 regcache_exit(map);
31244e39 1073 regmap_debugfs_exit(map);
6863ca62 1074 regmap_range_exit(map);
d2a5884a 1075 if (map->bus && map->bus->free_context)
0135bbcc 1076 map->bus->free_context(map->bus_context);
b83a313b 1077 kfree(map->work_buf);
7e09a979
MB
1078 while (!list_empty(&map->async_free)) {
1079 async = list_first_entry_or_null(&map->async_free,
1080 struct regmap_async,
1081 list);
1082 list_del(&async->list);
1083 kfree(async->work_buf);
1084 kfree(async);
1085 }
b83a313b
MB
1086 kfree(map);
1087}
1088EXPORT_SYMBOL_GPL(regmap_exit);
1089
72b39f6f
MB
1090static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1091{
1092 struct regmap **r = res;
1093 if (!r || !*r) {
1094 WARN_ON(!r || !*r);
1095 return 0;
1096 }
1097
1098 /* If the user didn't specify a name match any */
1099 if (data)
1100 return (*r)->name == data;
1101 else
1102 return 1;
1103}
1104
1105/**
1106 * dev_get_regmap(): Obtain the regmap (if any) for a device
1107 *
1108 * @dev: Device to retrieve the map for
1109 * @name: Optional name for the register map, usually NULL.
1110 *
1111 * Returns the regmap for the device if one is present, or NULL. If
1112 * name is specified then it must match the name specified when
1113 * registering the device, if it is NULL then the first regmap found
1114 * will be used. Devices with multiple register maps are very rare,
1115 * generic code should normally not need to specify a name.
1116 */
1117struct regmap *dev_get_regmap(struct device *dev, const char *name)
1118{
1119 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1120 dev_get_regmap_match, (void *)name);
1121
1122 if (!r)
1123 return NULL;
1124 return *r;
1125}
1126EXPORT_SYMBOL_GPL(dev_get_regmap);
1127
8d7d3972
TT
1128/**
1129 * regmap_get_device(): Obtain the device from a regmap
1130 *
1131 * @map: Register map to operate on.
1132 *
1133 * Returns the underlying device that the regmap has been created for.
1134 */
1135struct device *regmap_get_device(struct regmap *map)
1136{
1137 return map->dev;
1138}
fa2fbe4a 1139EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1140
6863ca62 1141static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1142 struct regmap_range_node *range,
6863ca62
KG
1143 unsigned int val_num)
1144{
6863ca62
KG
1145 void *orig_work_buf;
1146 unsigned int win_offset;
1147 unsigned int win_page;
1148 bool page_chg;
1149 int ret;
1150
98bc7dfd
MB
1151 win_offset = (*reg - range->range_min) % range->window_len;
1152 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1153
98bc7dfd
MB
1154 if (val_num > 1) {
1155 /* Bulk write shouldn't cross range boundary */
1156 if (*reg + val_num - 1 > range->range_max)
1157 return -EINVAL;
6863ca62 1158
98bc7dfd
MB
1159 /* ... or single page boundary */
1160 if (val_num > range->window_len - win_offset)
1161 return -EINVAL;
1162 }
6863ca62 1163
98bc7dfd
MB
1164 /* It is possible to have selector register inside data window.
1165 In that case, selector register is located on every page and
1166 it needs no page switching, when accessed alone. */
1167 if (val_num > 1 ||
1168 range->window_start + win_offset != range->selector_reg) {
1169 /* Use separate work_buf during page switching */
1170 orig_work_buf = map->work_buf;
1171 map->work_buf = map->selector_work_buf;
6863ca62 1172
98bc7dfd
MB
1173 ret = _regmap_update_bits(map, range->selector_reg,
1174 range->selector_mask,
1175 win_page << range->selector_shift,
1176 &page_chg);
632a5b01 1177
98bc7dfd 1178 map->work_buf = orig_work_buf;
6863ca62 1179
0ff3e62f 1180 if (ret != 0)
98bc7dfd 1181 return ret;
6863ca62
KG
1182 }
1183
98bc7dfd
MB
1184 *reg = range->window_start + win_offset;
1185
6863ca62
KG
1186 return 0;
1187}
1188
584de329 1189int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1190 const void *val, size_t val_len)
b83a313b 1191{
98bc7dfd 1192 struct regmap_range_node *range;
0d509f2b 1193 unsigned long flags;
6f306441 1194 u8 *u8 = map->work_buf;
0d509f2b
MB
1195 void *work_val = map->work_buf + map->format.reg_bytes +
1196 map->format.pad_bytes;
b83a313b
MB
1197 void *buf;
1198 int ret = -ENOTSUPP;
1199 size_t len;
73304781
MB
1200 int i;
1201
f1b5c5c3 1202 WARN_ON(!map->bus);
d2a5884a 1203
73304781
MB
1204 /* Check for unwritable registers before we start */
1205 if (map->writeable_reg)
1206 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1207 if (!map->writeable_reg(map->dev,
1208 reg + (i * map->reg_stride)))
73304781 1209 return -EINVAL;
b83a313b 1210
c9157198
LD
1211 if (!map->cache_bypass && map->format.parse_val) {
1212 unsigned int ival;
1213 int val_bytes = map->format.val_bytes;
1214 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1215 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1216 ret = regcache_write(map, reg + (i * map->reg_stride),
1217 ival);
c9157198
LD
1218 if (ret) {
1219 dev_err(map->dev,
6d04b8ac 1220 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1221 reg + i, ret);
1222 return ret;
1223 }
1224 }
1225 if (map->cache_only) {
1226 map->cache_dirty = true;
1227 return 0;
1228 }
1229 }
1230
98bc7dfd
MB
1231 range = _regmap_range_lookup(map, reg);
1232 if (range) {
8a2ceac6
MB
1233 int val_num = val_len / map->format.val_bytes;
1234 int win_offset = (reg - range->range_min) % range->window_len;
1235 int win_residue = range->window_len - win_offset;
1236
1237 /* If the write goes beyond the end of the window split it */
1238 while (val_num > win_residue) {
1a61cfe3 1239 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1240 win_residue, val_len / map->format.val_bytes);
1241 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1242 map->format.val_bytes);
8a2ceac6
MB
1243 if (ret != 0)
1244 return ret;
1245
1246 reg += win_residue;
1247 val_num -= win_residue;
1248 val += win_residue * map->format.val_bytes;
1249 val_len -= win_residue * map->format.val_bytes;
1250
1251 win_offset = (reg - range->range_min) %
1252 range->window_len;
1253 win_residue = range->window_len - win_offset;
1254 }
1255
1256 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1257 if (ret != 0)
98bc7dfd
MB
1258 return ret;
1259 }
6863ca62 1260
d939fb9a 1261 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1262
6f306441
LPC
1263 u8[0] |= map->write_flag_mask;
1264
651e013e
MB
1265 /*
1266 * Essentially all I/O mechanisms will be faster with a single
1267 * buffer to write. Since register syncs often generate raw
1268 * writes of single registers optimise that case.
1269 */
1270 if (val != work_val && val_len == map->format.val_bytes) {
1271 memcpy(work_val, val, map->format.val_bytes);
1272 val = work_val;
1273 }
1274
0a819809 1275 if (map->async && map->bus->async_write) {
7e09a979 1276 struct regmap_async *async;
0d509f2b 1277
fe7d4ccd
MB
1278 trace_regmap_async_write_start(map->dev, reg, val_len);
1279
7e09a979
MB
1280 spin_lock_irqsave(&map->async_lock, flags);
1281 async = list_first_entry_or_null(&map->async_free,
1282 struct regmap_async,
1283 list);
1284 if (async)
1285 list_del(&async->list);
1286 spin_unlock_irqrestore(&map->async_lock, flags);
1287
1288 if (!async) {
1289 async = map->bus->async_alloc();
1290 if (!async)
1291 return -ENOMEM;
1292
1293 async->work_buf = kzalloc(map->format.buf_size,
1294 GFP_KERNEL | GFP_DMA);
1295 if (!async->work_buf) {
1296 kfree(async);
1297 return -ENOMEM;
1298 }
0d509f2b
MB
1299 }
1300
0d509f2b
MB
1301 async->map = map;
1302
1303 /* If the caller supplied the value we can use it safely. */
1304 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1305 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1306
1307 spin_lock_irqsave(&map->async_lock, flags);
1308 list_add_tail(&async->list, &map->async_list);
1309 spin_unlock_irqrestore(&map->async_lock, flags);
1310
04c50ccf
MB
1311 if (val != work_val)
1312 ret = map->bus->async_write(map->bus_context,
1313 async->work_buf,
1314 map->format.reg_bytes +
1315 map->format.pad_bytes,
1316 val, val_len, async);
1317 else
1318 ret = map->bus->async_write(map->bus_context,
1319 async->work_buf,
1320 map->format.reg_bytes +
1321 map->format.pad_bytes +
1322 val_len, NULL, 0, async);
0d509f2b
MB
1323
1324 if (ret != 0) {
1325 dev_err(map->dev, "Failed to schedule write: %d\n",
1326 ret);
1327
1328 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1329 list_move(&async->list, &map->async_free);
0d509f2b 1330 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1331 }
f951b658
MB
1332
1333 return ret;
0d509f2b
MB
1334 }
1335
fb2736bb
MB
1336 trace_regmap_hw_write_start(map->dev, reg,
1337 val_len / map->format.val_bytes);
1338
2547e201
MB
1339 /* If we're doing a single register write we can probably just
1340 * send the work_buf directly, otherwise try to do a gather
1341 * write.
1342 */
0d509f2b 1343 if (val == work_val)
0135bbcc 1344 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1345 map->format.reg_bytes +
1346 map->format.pad_bytes +
1347 val_len);
2547e201 1348 else if (map->bus->gather_write)
0135bbcc 1349 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1350 map->format.reg_bytes +
1351 map->format.pad_bytes,
b83a313b
MB
1352 val, val_len);
1353
2547e201 1354 /* If that didn't work fall back on linearising by hand. */
b83a313b 1355 if (ret == -ENOTSUPP) {
82159ba8
MB
1356 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1357 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1358 if (!buf)
1359 return -ENOMEM;
1360
1361 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1362 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1363 val, val_len);
0135bbcc 1364 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1365
1366 kfree(buf);
1367 }
1368
fb2736bb
MB
1369 trace_regmap_hw_write_done(map->dev, reg,
1370 val_len / map->format.val_bytes);
1371
b83a313b
MB
1372 return ret;
1373}
1374
221ad7f2
MB
1375/**
1376 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1377 *
1378 * @map: Map to check.
1379 */
1380bool regmap_can_raw_write(struct regmap *map)
1381{
1382 return map->bus && map->format.format_val && map->format.format_reg;
1383}
1384EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1385
07c320dc
AS
1386static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1387 unsigned int val)
1388{
1389 int ret;
1390 struct regmap_range_node *range;
1391 struct regmap *map = context;
1392
f1b5c5c3 1393 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1394
1395 range = _regmap_range_lookup(map, reg);
1396 if (range) {
1397 ret = _regmap_select_page(map, &reg, range, 1);
1398 if (ret != 0)
1399 return ret;
1400 }
1401
1402 map->format.format_write(map, reg, val);
1403
1404 trace_regmap_hw_write_start(map->dev, reg, 1);
1405
1406 ret = map->bus->write(map->bus_context, map->work_buf,
1407 map->format.buf_size);
1408
1409 trace_regmap_hw_write_done(map->dev, reg, 1);
1410
1411 return ret;
1412}
1413
3ac17037
BB
1414static int _regmap_bus_reg_write(void *context, unsigned int reg,
1415 unsigned int val)
1416{
1417 struct regmap *map = context;
1418
1419 return map->bus->reg_write(map->bus_context, reg, val);
1420}
1421
07c320dc
AS
1422static int _regmap_bus_raw_write(void *context, unsigned int reg,
1423 unsigned int val)
1424{
1425 struct regmap *map = context;
1426
f1b5c5c3 1427 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1428
1429 map->format.format_val(map->work_buf + map->format.reg_bytes
1430 + map->format.pad_bytes, val, 0);
1431 return _regmap_raw_write(map, reg,
1432 map->work_buf +
1433 map->format.reg_bytes +
1434 map->format.pad_bytes,
0a819809 1435 map->format.val_bytes);
07c320dc
AS
1436}
1437
d2a5884a
AS
1438static inline void *_regmap_map_get_context(struct regmap *map)
1439{
1440 return (map->bus) ? map : map->bus_context;
1441}
1442
4d2dc095
DP
1443int _regmap_write(struct regmap *map, unsigned int reg,
1444 unsigned int val)
b83a313b 1445{
fb2736bb 1446 int ret;
d2a5884a 1447 void *context = _regmap_map_get_context(map);
b83a313b 1448
515f2261
IN
1449 if (!regmap_writeable(map, reg))
1450 return -EIO;
1451
d2a5884a 1452 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1453 ret = regcache_write(map, reg, val);
1454 if (ret != 0)
1455 return ret;
8ae0d7e8
MB
1456 if (map->cache_only) {
1457 map->cache_dirty = true;
5d1729e7 1458 return 0;
8ae0d7e8 1459 }
5d1729e7
DP
1460 }
1461
1044c180
MB
1462#ifdef LOG_DEVICE
1463 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1464 dev_info(map->dev, "%x <= %x\n", reg, val);
1465#endif
1466
fb2736bb
MB
1467 trace_regmap_reg_write(map->dev, reg, val);
1468
d2a5884a 1469 return map->reg_write(context, reg, val);
b83a313b
MB
1470}
1471
1472/**
1473 * regmap_write(): Write a value to a single register
1474 *
1475 * @map: Register map to write to
1476 * @reg: Register to write to
1477 * @val: Value to be written
1478 *
1479 * A value of zero will be returned on success, a negative errno will
1480 * be returned in error cases.
1481 */
1482int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1483{
1484 int ret;
1485
f01ee60f
SW
1486 if (reg % map->reg_stride)
1487 return -EINVAL;
1488
0d4529c5 1489 map->lock(map->lock_arg);
b83a313b
MB
1490
1491 ret = _regmap_write(map, reg, val);
1492
0d4529c5 1493 map->unlock(map->lock_arg);
b83a313b
MB
1494
1495 return ret;
1496}
1497EXPORT_SYMBOL_GPL(regmap_write);
1498
915f441b
MB
1499/**
1500 * regmap_write_async(): Write a value to a single register asynchronously
1501 *
1502 * @map: Register map to write to
1503 * @reg: Register to write to
1504 * @val: Value to be written
1505 *
1506 * A value of zero will be returned on success, a negative errno will
1507 * be returned in error cases.
1508 */
1509int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1510{
1511 int ret;
1512
1513 if (reg % map->reg_stride)
1514 return -EINVAL;
1515
1516 map->lock(map->lock_arg);
1517
1518 map->async = true;
1519
1520 ret = _regmap_write(map, reg, val);
1521
1522 map->async = false;
1523
1524 map->unlock(map->lock_arg);
1525
1526 return ret;
1527}
1528EXPORT_SYMBOL_GPL(regmap_write_async);
1529
b83a313b
MB
1530/**
1531 * regmap_raw_write(): Write raw values to one or more registers
1532 *
1533 * @map: Register map to write to
1534 * @reg: Initial register to write to
1535 * @val: Block of data to be written, laid out for direct transmission to the
1536 * device
1537 * @val_len: Length of data pointed to by val.
1538 *
1539 * This function is intended to be used for things like firmware
1540 * download where a large block of data needs to be transferred to the
1541 * device. No formatting will be done on the data provided.
1542 *
1543 * A value of zero will be returned on success, a negative errno will
1544 * be returned in error cases.
1545 */
1546int regmap_raw_write(struct regmap *map, unsigned int reg,
1547 const void *val, size_t val_len)
1548{
1549 int ret;
1550
221ad7f2 1551 if (!regmap_can_raw_write(map))
d2a5884a 1552 return -EINVAL;
851960ba
SW
1553 if (val_len % map->format.val_bytes)
1554 return -EINVAL;
1555
0d4529c5 1556 map->lock(map->lock_arg);
b83a313b 1557
0a819809 1558 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1559
0d4529c5 1560 map->unlock(map->lock_arg);
b83a313b
MB
1561
1562 return ret;
1563}
1564EXPORT_SYMBOL_GPL(regmap_raw_write);
1565
67252287
SK
1566/**
1567 * regmap_field_write(): Write a value to a single register field
1568 *
1569 * @field: Register field to write to
1570 * @val: Value to be written
1571 *
1572 * A value of zero will be returned on success, a negative errno will
1573 * be returned in error cases.
1574 */
1575int regmap_field_write(struct regmap_field *field, unsigned int val)
1576{
1577 return regmap_update_bits(field->regmap, field->reg,
1578 field->mask, val << field->shift);
1579}
1580EXPORT_SYMBOL_GPL(regmap_field_write);
1581
fdf20029
KM
1582/**
1583 * regmap_field_update_bits(): Perform a read/modify/write cycle
1584 * on the register field
1585 *
1586 * @field: Register field to write to
1587 * @mask: Bitmask to change
1588 * @val: Value to be written
1589 *
1590 * A value of zero will be returned on success, a negative errno will
1591 * be returned in error cases.
1592 */
1593int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1594{
1595 mask = (mask << field->shift) & field->mask;
1596
1597 return regmap_update_bits(field->regmap, field->reg,
1598 mask, val << field->shift);
1599}
1600EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1601
a0102375
KM
1602/**
1603 * regmap_fields_write(): Write a value to a single register field with port ID
1604 *
1605 * @field: Register field to write to
1606 * @id: port ID
1607 * @val: Value to be written
1608 *
1609 * A value of zero will be returned on success, a negative errno will
1610 * be returned in error cases.
1611 */
1612int regmap_fields_write(struct regmap_field *field, unsigned int id,
1613 unsigned int val)
1614{
1615 if (id >= field->id_size)
1616 return -EINVAL;
1617
1618 return regmap_update_bits(field->regmap,
1619 field->reg + (field->id_offset * id),
1620 field->mask, val << field->shift);
1621}
1622EXPORT_SYMBOL_GPL(regmap_fields_write);
1623
1624/**
1625 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1626 * on the register field
1627 *
1628 * @field: Register field to write to
1629 * @id: port ID
1630 * @mask: Bitmask to change
1631 * @val: Value to be written
1632 *
1633 * A value of zero will be returned on success, a negative errno will
1634 * be returned in error cases.
1635 */
1636int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1637 unsigned int mask, unsigned int val)
1638{
1639 if (id >= field->id_size)
1640 return -EINVAL;
1641
1642 mask = (mask << field->shift) & field->mask;
1643
1644 return regmap_update_bits(field->regmap,
1645 field->reg + (field->id_offset * id),
1646 mask, val << field->shift);
1647}
1648EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1649
8eaeb219
LD
1650/*
1651 * regmap_bulk_write(): Write multiple registers to the device
1652 *
1653 * @map: Register map to write to
1654 * @reg: First register to be write from
1655 * @val: Block of data to be written, in native register size for device
1656 * @val_count: Number of registers to write
1657 *
1658 * This function is intended to be used for writing a large block of
31b35e9e 1659 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1660 *
1661 * A value of zero will be returned on success, a negative errno will
1662 * be returned in error cases.
1663 */
1664int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1665 size_t val_count)
1666{
1667 int ret = 0, i;
1668 size_t val_bytes = map->format.val_bytes;
8eaeb219 1669
f4298360 1670 if (map->bus && !map->format.parse_inplace)
8eaeb219 1671 return -EINVAL;
f01ee60f
SW
1672 if (reg % map->reg_stride)
1673 return -EINVAL;
8eaeb219 1674
f4298360
SB
1675 /*
1676 * Some devices don't support bulk write, for
1677 * them we have a series of single write operations.
1678 */
1679 if (!map->bus || map->use_single_rw) {
4999e962 1680 map->lock(map->lock_arg);
f4298360
SB
1681 for (i = 0; i < val_count; i++) {
1682 unsigned int ival;
1683
1684 switch (val_bytes) {
1685 case 1:
1686 ival = *(u8 *)(val + (i * val_bytes));
1687 break;
1688 case 2:
1689 ival = *(u16 *)(val + (i * val_bytes));
1690 break;
1691 case 4:
1692 ival = *(u32 *)(val + (i * val_bytes));
1693 break;
1694#ifdef CONFIG_64BIT
1695 case 8:
1696 ival = *(u64 *)(val + (i * val_bytes));
1697 break;
1698#endif
1699 default:
1700 ret = -EINVAL;
1701 goto out;
1702 }
8eaeb219 1703
f4298360
SB
1704 ret = _regmap_write(map, reg + (i * map->reg_stride),
1705 ival);
1706 if (ret != 0)
1707 goto out;
1708 }
4999e962
TI
1709out:
1710 map->unlock(map->lock_arg);
8eaeb219 1711 } else {
f4298360
SB
1712 void *wval;
1713
8eaeb219
LD
1714 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1715 if (!wval) {
8eaeb219 1716 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1717 return -ENOMEM;
8eaeb219
LD
1718 }
1719 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1720 map->format.parse_inplace(wval + i);
f4298360 1721
4999e962 1722 map->lock(map->lock_arg);
0a819809 1723 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1724 map->unlock(map->lock_arg);
8eaeb219 1725
8eaeb219 1726 kfree(wval);
f4298360 1727 }
8eaeb219
LD
1728 return ret;
1729}
1730EXPORT_SYMBOL_GPL(regmap_bulk_write);
1731
e894c3f4
OAO
1732/*
1733 * _regmap_raw_multi_reg_write()
1734 *
1735 * the (register,newvalue) pairs in regs have not been formatted, but
1736 * they are all in the same page and have been changed to being page
1737 * relative. The page register has been written if that was neccessary.
1738 */
1739static int _regmap_raw_multi_reg_write(struct regmap *map,
1740 const struct reg_default *regs,
1741 size_t num_regs)
1742{
1743 int ret;
1744 void *buf;
1745 int i;
1746 u8 *u8;
1747 size_t val_bytes = map->format.val_bytes;
1748 size_t reg_bytes = map->format.reg_bytes;
1749 size_t pad_bytes = map->format.pad_bytes;
1750 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1751 size_t len = pair_size * num_regs;
1752
f5727cd3
XL
1753 if (!len)
1754 return -EINVAL;
1755
e894c3f4
OAO
1756 buf = kzalloc(len, GFP_KERNEL);
1757 if (!buf)
1758 return -ENOMEM;
1759
1760 /* We have to linearise by hand. */
1761
1762 u8 = buf;
1763
1764 for (i = 0; i < num_regs; i++) {
1765 int reg = regs[i].reg;
1766 int val = regs[i].def;
1767 trace_regmap_hw_write_start(map->dev, reg, 1);
1768 map->format.format_reg(u8, reg, map->reg_shift);
1769 u8 += reg_bytes + pad_bytes;
1770 map->format.format_val(u8, val, 0);
1771 u8 += val_bytes;
1772 }
1773 u8 = buf;
1774 *u8 |= map->write_flag_mask;
1775
1776 ret = map->bus->write(map->bus_context, buf, len);
1777
1778 kfree(buf);
1779
1780 for (i = 0; i < num_regs; i++) {
1781 int reg = regs[i].reg;
1782 trace_regmap_hw_write_done(map->dev, reg, 1);
1783 }
1784 return ret;
1785}
1786
1787static unsigned int _regmap_register_page(struct regmap *map,
1788 unsigned int reg,
1789 struct regmap_range_node *range)
1790{
1791 unsigned int win_page = (reg - range->range_min) / range->window_len;
1792
1793 return win_page;
1794}
1795
1796static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1797 struct reg_default *regs,
1798 size_t num_regs)
1799{
1800 int ret;
1801 int i, n;
1802 struct reg_default *base;
b48d1398 1803 unsigned int this_page = 0;
e894c3f4
OAO
1804 /*
1805 * the set of registers are not neccessarily in order, but
1806 * since the order of write must be preserved this algorithm
1807 * chops the set each time the page changes
1808 */
1809 base = regs;
1810 for (i = 0, n = 0; i < num_regs; i++, n++) {
1811 unsigned int reg = regs[i].reg;
1812 struct regmap_range_node *range;
1813
1814 range = _regmap_range_lookup(map, reg);
1815 if (range) {
1816 unsigned int win_page = _regmap_register_page(map, reg,
1817 range);
1818
1819 if (i == 0)
1820 this_page = win_page;
1821 if (win_page != this_page) {
1822 this_page = win_page;
1823 ret = _regmap_raw_multi_reg_write(map, base, n);
1824 if (ret != 0)
1825 return ret;
1826 base += n;
1827 n = 0;
1828 }
1829 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1830 if (ret != 0)
1831 return ret;
1832 }
1833 }
1834 if (n > 0)
1835 return _regmap_raw_multi_reg_write(map, base, n);
1836 return 0;
1837}
1838
1d5b40bc
CK
1839static int _regmap_multi_reg_write(struct regmap *map,
1840 const struct reg_default *regs,
e894c3f4 1841 size_t num_regs)
1d5b40bc 1842{
e894c3f4
OAO
1843 int i;
1844 int ret;
1845
1846 if (!map->can_multi_write) {
1847 for (i = 0; i < num_regs; i++) {
1848 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1849 if (ret != 0)
1850 return ret;
1851 }
1852 return 0;
1853 }
1854
1855 if (!map->format.parse_inplace)
1856 return -EINVAL;
1857
1858 if (map->writeable_reg)
1859 for (i = 0; i < num_regs; i++) {
1860 int reg = regs[i].reg;
1861 if (!map->writeable_reg(map->dev, reg))
1862 return -EINVAL;
1863 if (reg % map->reg_stride)
1864 return -EINVAL;
1865 }
1866
1867 if (!map->cache_bypass) {
1868 for (i = 0; i < num_regs; i++) {
1869 unsigned int val = regs[i].def;
1870 unsigned int reg = regs[i].reg;
1871 ret = regcache_write(map, reg, val);
1872 if (ret) {
1873 dev_err(map->dev,
1874 "Error in caching of register: %x ret: %d\n",
1875 reg, ret);
1876 return ret;
1877 }
1878 }
1879 if (map->cache_only) {
1880 map->cache_dirty = true;
1881 return 0;
1882 }
1883 }
1884
1885 WARN_ON(!map->bus);
1d5b40bc
CK
1886
1887 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
1888 unsigned int reg = regs[i].reg;
1889 struct regmap_range_node *range;
1890 range = _regmap_range_lookup(map, reg);
1891 if (range) {
1892 size_t len = sizeof(struct reg_default)*num_regs;
1893 struct reg_default *base = kmemdup(regs, len,
1894 GFP_KERNEL);
1895 if (!base)
1896 return -ENOMEM;
1897 ret = _regmap_range_multi_paged_reg_write(map, base,
1898 num_regs);
1899 kfree(base);
1900
1d5b40bc
CK
1901 return ret;
1902 }
1903 }
e894c3f4 1904 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
1905}
1906
e33fabd3
AO
1907/*
1908 * regmap_multi_reg_write(): Write multiple registers to the device
1909 *
e894c3f4
OAO
1910 * where the set of register,value pairs are supplied in any order,
1911 * possibly not all in a single range.
e33fabd3
AO
1912 *
1913 * @map: Register map to write to
1914 * @regs: Array of structures containing register,value to be written
1915 * @num_regs: Number of registers to write
1916 *
e894c3f4
OAO
1917 * The 'normal' block write mode will send ultimately send data on the
1918 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1919 * addressed. However, this alternative block multi write mode will send
1920 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1921 * must of course support the mode.
e33fabd3 1922 *
e894c3f4
OAO
1923 * A value of zero will be returned on success, a negative errno will be
1924 * returned in error cases.
e33fabd3 1925 */
f7e2cec0
CK
1926int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1927 int num_regs)
e33fabd3 1928{
1d5b40bc 1929 int ret;
e33fabd3
AO
1930
1931 map->lock(map->lock_arg);
1932
1d5b40bc
CK
1933 ret = _regmap_multi_reg_write(map, regs, num_regs);
1934
e33fabd3
AO
1935 map->unlock(map->lock_arg);
1936
1937 return ret;
1938}
1939EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1940
1d5b40bc
CK
1941/*
1942 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1943 * device but not the cache
1944 *
e33fabd3
AO
1945 * where the set of register are supplied in any order
1946 *
1947 * @map: Register map to write to
1948 * @regs: Array of structures containing register,value to be written
1949 * @num_regs: Number of registers to write
1950 *
1951 * This function is intended to be used for writing a large block of data
1952 * atomically to the device in single transfer for those I2C client devices
1953 * that implement this alternative block write mode.
1954 *
1955 * A value of zero will be returned on success, a negative errno will
1956 * be returned in error cases.
1957 */
1d5b40bc
CK
1958int regmap_multi_reg_write_bypassed(struct regmap *map,
1959 const struct reg_default *regs,
1960 int num_regs)
e33fabd3 1961{
1d5b40bc
CK
1962 int ret;
1963 bool bypass;
e33fabd3
AO
1964
1965 map->lock(map->lock_arg);
1966
1d5b40bc
CK
1967 bypass = map->cache_bypass;
1968 map->cache_bypass = true;
1969
1970 ret = _regmap_multi_reg_write(map, regs, num_regs);
1971
1972 map->cache_bypass = bypass;
1973
e33fabd3
AO
1974 map->unlock(map->lock_arg);
1975
1976 return ret;
1977}
1d5b40bc 1978EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 1979
0d509f2b
MB
1980/**
1981 * regmap_raw_write_async(): Write raw values to one or more registers
1982 * asynchronously
1983 *
1984 * @map: Register map to write to
1985 * @reg: Initial register to write to
1986 * @val: Block of data to be written, laid out for direct transmission to the
1987 * device. Must be valid until regmap_async_complete() is called.
1988 * @val_len: Length of data pointed to by val.
1989 *
1990 * This function is intended to be used for things like firmware
1991 * download where a large block of data needs to be transferred to the
1992 * device. No formatting will be done on the data provided.
1993 *
1994 * If supported by the underlying bus the write will be scheduled
1995 * asynchronously, helping maximise I/O speed on higher speed buses
1996 * like SPI. regmap_async_complete() can be called to ensure that all
1997 * asynchrnous writes have been completed.
1998 *
1999 * A value of zero will be returned on success, a negative errno will
2000 * be returned in error cases.
2001 */
2002int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2003 const void *val, size_t val_len)
2004{
2005 int ret;
2006
2007 if (val_len % map->format.val_bytes)
2008 return -EINVAL;
2009 if (reg % map->reg_stride)
2010 return -EINVAL;
2011
2012 map->lock(map->lock_arg);
2013
0a819809
MB
2014 map->async = true;
2015
2016 ret = _regmap_raw_write(map, reg, val, val_len);
2017
2018 map->async = false;
0d509f2b
MB
2019
2020 map->unlock(map->lock_arg);
2021
2022 return ret;
2023}
2024EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2025
b83a313b
MB
2026static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2027 unsigned int val_len)
2028{
98bc7dfd 2029 struct regmap_range_node *range;
b83a313b
MB
2030 u8 *u8 = map->work_buf;
2031 int ret;
2032
f1b5c5c3 2033 WARN_ON(!map->bus);
d2a5884a 2034
98bc7dfd
MB
2035 range = _regmap_range_lookup(map, reg);
2036 if (range) {
2037 ret = _regmap_select_page(map, &reg, range,
2038 val_len / map->format.val_bytes);
0ff3e62f 2039 if (ret != 0)
98bc7dfd
MB
2040 return ret;
2041 }
6863ca62 2042
d939fb9a 2043 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
2044
2045 /*
6f306441 2046 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
2047 * register addresss; since it's always the high bits for all
2048 * current formats we can do this here rather than in
2049 * formatting. This may break if we get interesting formats.
2050 */
6f306441 2051 u8[0] |= map->read_flag_mask;
b83a313b 2052
fb2736bb
MB
2053 trace_regmap_hw_read_start(map->dev, reg,
2054 val_len / map->format.val_bytes);
2055
0135bbcc 2056 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 2057 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 2058 val, val_len);
b83a313b 2059
fb2736bb
MB
2060 trace_regmap_hw_read_done(map->dev, reg,
2061 val_len / map->format.val_bytes);
2062
2063 return ret;
b83a313b
MB
2064}
2065
3ac17037
BB
2066static int _regmap_bus_reg_read(void *context, unsigned int reg,
2067 unsigned int *val)
2068{
2069 struct regmap *map = context;
2070
2071 return map->bus->reg_read(map->bus_context, reg, val);
2072}
2073
ad278406
AS
2074static int _regmap_bus_read(void *context, unsigned int reg,
2075 unsigned int *val)
2076{
2077 int ret;
2078 struct regmap *map = context;
2079
2080 if (!map->format.parse_val)
2081 return -EINVAL;
2082
2083 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2084 if (ret == 0)
2085 *val = map->format.parse_val(map->work_buf);
2086
2087 return ret;
2088}
2089
b83a313b
MB
2090static int _regmap_read(struct regmap *map, unsigned int reg,
2091 unsigned int *val)
2092{
2093 int ret;
d2a5884a
AS
2094 void *context = _regmap_map_get_context(map);
2095
f1b5c5c3 2096 WARN_ON(!map->reg_read);
b83a313b 2097
5d1729e7
DP
2098 if (!map->cache_bypass) {
2099 ret = regcache_read(map, reg, val);
2100 if (ret == 0)
2101 return 0;
2102 }
2103
2104 if (map->cache_only)
2105 return -EBUSY;
2106
d4807ad2
MS
2107 if (!regmap_readable(map, reg))
2108 return -EIO;
2109
d2a5884a 2110 ret = map->reg_read(context, reg, val);
fb2736bb 2111 if (ret == 0) {
1044c180
MB
2112#ifdef LOG_DEVICE
2113 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2114 dev_info(map->dev, "%x => %x\n", reg, *val);
2115#endif
2116
fb2736bb 2117 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 2118
ad278406
AS
2119 if (!map->cache_bypass)
2120 regcache_write(map, reg, *val);
2121 }
f2985367 2122
b83a313b
MB
2123 return ret;
2124}
2125
2126/**
2127 * regmap_read(): Read a value from a single register
2128 *
0093380c 2129 * @map: Register map to read from
b83a313b
MB
2130 * @reg: Register to be read from
2131 * @val: Pointer to store read value
2132 *
2133 * A value of zero will be returned on success, a negative errno will
2134 * be returned in error cases.
2135 */
2136int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2137{
2138 int ret;
2139
f01ee60f
SW
2140 if (reg % map->reg_stride)
2141 return -EINVAL;
2142
0d4529c5 2143 map->lock(map->lock_arg);
b83a313b
MB
2144
2145 ret = _regmap_read(map, reg, val);
2146
0d4529c5 2147 map->unlock(map->lock_arg);
b83a313b
MB
2148
2149 return ret;
2150}
2151EXPORT_SYMBOL_GPL(regmap_read);
2152
2153/**
2154 * regmap_raw_read(): Read raw data from the device
2155 *
0093380c 2156 * @map: Register map to read from
b83a313b
MB
2157 * @reg: First register to be read from
2158 * @val: Pointer to store read value
2159 * @val_len: Size of data to read
2160 *
2161 * A value of zero will be returned on success, a negative errno will
2162 * be returned in error cases.
2163 */
2164int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2165 size_t val_len)
2166{
b8fb5ab1
MB
2167 size_t val_bytes = map->format.val_bytes;
2168 size_t val_count = val_len / val_bytes;
2169 unsigned int v;
2170 int ret, i;
04e016ad 2171
d2a5884a
AS
2172 if (!map->bus)
2173 return -EINVAL;
851960ba
SW
2174 if (val_len % map->format.val_bytes)
2175 return -EINVAL;
f01ee60f
SW
2176 if (reg % map->reg_stride)
2177 return -EINVAL;
851960ba 2178
0d4529c5 2179 map->lock(map->lock_arg);
b83a313b 2180
b8fb5ab1
MB
2181 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2182 map->cache_type == REGCACHE_NONE) {
2183 /* Physical block read if there's no cache involved */
2184 ret = _regmap_raw_read(map, reg, val, val_len);
2185
2186 } else {
2187 /* Otherwise go word by word for the cache; should be low
2188 * cost as we expect to hit the cache.
2189 */
2190 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2191 ret = _regmap_read(map, reg + (i * map->reg_stride),
2192 &v);
b8fb5ab1
MB
2193 if (ret != 0)
2194 goto out;
2195
d939fb9a 2196 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2197 }
2198 }
b83a313b 2199
b8fb5ab1 2200 out:
0d4529c5 2201 map->unlock(map->lock_arg);
b83a313b
MB
2202
2203 return ret;
2204}
2205EXPORT_SYMBOL_GPL(regmap_raw_read);
2206
67252287
SK
2207/**
2208 * regmap_field_read(): Read a value to a single register field
2209 *
2210 * @field: Register field to read from
2211 * @val: Pointer to store read value
2212 *
2213 * A value of zero will be returned on success, a negative errno will
2214 * be returned in error cases.
2215 */
2216int regmap_field_read(struct regmap_field *field, unsigned int *val)
2217{
2218 int ret;
2219 unsigned int reg_val;
2220 ret = regmap_read(field->regmap, field->reg, &reg_val);
2221 if (ret != 0)
2222 return ret;
2223
2224 reg_val &= field->mask;
2225 reg_val >>= field->shift;
2226 *val = reg_val;
2227
2228 return ret;
2229}
2230EXPORT_SYMBOL_GPL(regmap_field_read);
2231
a0102375
KM
2232/**
2233 * regmap_fields_read(): Read a value to a single register field with port ID
2234 *
2235 * @field: Register field to read from
2236 * @id: port ID
2237 * @val: Pointer to store read value
2238 *
2239 * A value of zero will be returned on success, a negative errno will
2240 * be returned in error cases.
2241 */
2242int regmap_fields_read(struct regmap_field *field, unsigned int id,
2243 unsigned int *val)
2244{
2245 int ret;
2246 unsigned int reg_val;
2247
2248 if (id >= field->id_size)
2249 return -EINVAL;
2250
2251 ret = regmap_read(field->regmap,
2252 field->reg + (field->id_offset * id),
2253 &reg_val);
2254 if (ret != 0)
2255 return ret;
2256
2257 reg_val &= field->mask;
2258 reg_val >>= field->shift;
2259 *val = reg_val;
2260
2261 return ret;
2262}
2263EXPORT_SYMBOL_GPL(regmap_fields_read);
2264
b83a313b
MB
2265/**
2266 * regmap_bulk_read(): Read multiple registers from the device
2267 *
0093380c 2268 * @map: Register map to read from
b83a313b
MB
2269 * @reg: First register to be read from
2270 * @val: Pointer to store read value, in native register size for device
2271 * @val_count: Number of registers to read
2272 *
2273 * A value of zero will be returned on success, a negative errno will
2274 * be returned in error cases.
2275 */
2276int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2277 size_t val_count)
2278{
2279 int ret, i;
2280 size_t val_bytes = map->format.val_bytes;
82cd9965 2281 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2282
f01ee60f
SW
2283 if (reg % map->reg_stride)
2284 return -EINVAL;
b83a313b 2285
3b58ee13 2286 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2287 /*
2288 * Some devices does not support bulk read, for
2289 * them we have a series of single read operations.
2290 */
2291 if (map->use_single_rw) {
2292 for (i = 0; i < val_count; i++) {
2293 ret = regmap_raw_read(map,
2294 reg + (i * map->reg_stride),
2295 val + (i * val_bytes),
2296 val_bytes);
2297 if (ret != 0)
2298 return ret;
2299 }
2300 } else {
2301 ret = regmap_raw_read(map, reg, val,
2302 val_bytes * val_count);
2303 if (ret != 0)
2304 return ret;
2305 }
de2d808f
MB
2306
2307 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2308 map->format.parse_inplace(val + i);
de2d808f
MB
2309 } else {
2310 for (i = 0; i < val_count; i++) {
6560ffd1 2311 unsigned int ival;
f01ee60f 2312 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2313 &ival);
de2d808f
MB
2314 if (ret != 0)
2315 return ret;
6560ffd1 2316 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
2317 }
2318 }
b83a313b
MB
2319
2320 return 0;
2321}
2322EXPORT_SYMBOL_GPL(regmap_bulk_read);
2323
018690d3
MB
2324static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2325 unsigned int mask, unsigned int val,
2326 bool *change)
b83a313b
MB
2327{
2328 int ret;
d91e8db2 2329 unsigned int tmp, orig;
b83a313b 2330
d91e8db2 2331 ret = _regmap_read(map, reg, &orig);
b83a313b 2332 if (ret != 0)
fc3ebd78 2333 return ret;
b83a313b 2334
d91e8db2 2335 tmp = orig & ~mask;
b83a313b
MB
2336 tmp |= val & mask;
2337
018690d3 2338 if (tmp != orig) {
d91e8db2 2339 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2340 if (change)
2341 *change = true;
018690d3 2342 } else {
e2f74dc6
XL
2343 if (change)
2344 *change = false;
018690d3 2345 }
b83a313b 2346
b83a313b
MB
2347 return ret;
2348}
018690d3
MB
2349
2350/**
2351 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2352 *
2353 * @map: Register map to update
2354 * @reg: Register to update
2355 * @mask: Bitmask to change
2356 * @val: New value for bitmask
2357 *
2358 * Returns zero for success, a negative number on error.
2359 */
2360int regmap_update_bits(struct regmap *map, unsigned int reg,
2361 unsigned int mask, unsigned int val)
2362{
fc3ebd78
KG
2363 int ret;
2364
0d4529c5 2365 map->lock(map->lock_arg);
e2f74dc6 2366 ret = _regmap_update_bits(map, reg, mask, val, NULL);
0d4529c5 2367 map->unlock(map->lock_arg);
fc3ebd78
KG
2368
2369 return ret;
018690d3 2370}
b83a313b 2371EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2372
915f441b
MB
2373/**
2374 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2375 * map asynchronously
2376 *
2377 * @map: Register map to update
2378 * @reg: Register to update
2379 * @mask: Bitmask to change
2380 * @val: New value for bitmask
2381 *
2382 * With most buses the read must be done synchronously so this is most
2383 * useful for devices with a cache which do not need to interact with
2384 * the hardware to determine the current register value.
2385 *
2386 * Returns zero for success, a negative number on error.
2387 */
2388int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2389 unsigned int mask, unsigned int val)
2390{
915f441b
MB
2391 int ret;
2392
2393 map->lock(map->lock_arg);
2394
2395 map->async = true;
2396
e2f74dc6 2397 ret = _regmap_update_bits(map, reg, mask, val, NULL);
915f441b
MB
2398
2399 map->async = false;
2400
2401 map->unlock(map->lock_arg);
2402
2403 return ret;
2404}
2405EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2406
018690d3
MB
2407/**
2408 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2409 * register map and report if updated
2410 *
2411 * @map: Register map to update
2412 * @reg: Register to update
2413 * @mask: Bitmask to change
2414 * @val: New value for bitmask
2415 * @change: Boolean indicating if a write was done
2416 *
2417 * Returns zero for success, a negative number on error.
2418 */
2419int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2420 unsigned int mask, unsigned int val,
2421 bool *change)
2422{
fc3ebd78
KG
2423 int ret;
2424
0d4529c5 2425 map->lock(map->lock_arg);
fc3ebd78 2426 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 2427 map->unlock(map->lock_arg);
fc3ebd78 2428 return ret;
018690d3
MB
2429}
2430EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2431
915f441b
MB
2432/**
2433 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2434 * register map asynchronously and report if
2435 * updated
2436 *
2437 * @map: Register map to update
2438 * @reg: Register to update
2439 * @mask: Bitmask to change
2440 * @val: New value for bitmask
2441 * @change: Boolean indicating if a write was done
2442 *
2443 * With most buses the read must be done synchronously so this is most
2444 * useful for devices with a cache which do not need to interact with
2445 * the hardware to determine the current register value.
2446 *
2447 * Returns zero for success, a negative number on error.
2448 */
2449int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2450 unsigned int mask, unsigned int val,
2451 bool *change)
2452{
2453 int ret;
2454
2455 map->lock(map->lock_arg);
2456
2457 map->async = true;
2458
2459 ret = _regmap_update_bits(map, reg, mask, val, change);
2460
2461 map->async = false;
2462
2463 map->unlock(map->lock_arg);
2464
2465 return ret;
2466}
2467EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2468
0d509f2b
MB
2469void regmap_async_complete_cb(struct regmap_async *async, int ret)
2470{
2471 struct regmap *map = async->map;
2472 bool wake;
2473
fe7d4ccd
MB
2474 trace_regmap_async_io_complete(map->dev);
2475
0d509f2b 2476 spin_lock(&map->async_lock);
7e09a979 2477 list_move(&async->list, &map->async_free);
0d509f2b
MB
2478 wake = list_empty(&map->async_list);
2479
2480 if (ret != 0)
2481 map->async_ret = ret;
2482
2483 spin_unlock(&map->async_lock);
2484
0d509f2b
MB
2485 if (wake)
2486 wake_up(&map->async_waitq);
2487}
f804fb56 2488EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2489
2490static int regmap_async_is_done(struct regmap *map)
2491{
2492 unsigned long flags;
2493 int ret;
2494
2495 spin_lock_irqsave(&map->async_lock, flags);
2496 ret = list_empty(&map->async_list);
2497 spin_unlock_irqrestore(&map->async_lock, flags);
2498
2499 return ret;
2500}
2501
2502/**
2503 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2504 *
2505 * @map: Map to operate on.
2506 *
2507 * Blocks until any pending asynchronous I/O has completed. Returns
2508 * an error code for any failed I/O operations.
2509 */
2510int regmap_async_complete(struct regmap *map)
2511{
2512 unsigned long flags;
2513 int ret;
2514
2515 /* Nothing to do with no async support */
f2e055e7 2516 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
2517 return 0;
2518
fe7d4ccd
MB
2519 trace_regmap_async_complete_start(map->dev);
2520
0d509f2b
MB
2521 wait_event(map->async_waitq, regmap_async_is_done(map));
2522
2523 spin_lock_irqsave(&map->async_lock, flags);
2524 ret = map->async_ret;
2525 map->async_ret = 0;
2526 spin_unlock_irqrestore(&map->async_lock, flags);
2527
fe7d4ccd
MB
2528 trace_regmap_async_complete_done(map->dev);
2529
0d509f2b
MB
2530 return ret;
2531}
f88948ef 2532EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2533
22f0d90a
MB
2534/**
2535 * regmap_register_patch: Register and apply register updates to be applied
2536 * on device initialistion
2537 *
2538 * @map: Register map to apply updates to.
2539 * @regs: Values to update.
2540 * @num_regs: Number of entries in regs.
2541 *
2542 * Register a set of register updates to be applied to the device
2543 * whenever the device registers are synchronised with the cache and
2544 * apply them immediately. Typically this is used to apply
2545 * corrections to be applied to the device defaults on startup, such
2546 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB
2547 *
2548 * The caller must ensure that this function cannot be called
2549 * concurrently with either itself or regcache_sync().
22f0d90a
MB
2550 */
2551int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2552 int num_regs)
2553{
aab13ebc 2554 struct reg_default *p;
6bf13103 2555 int ret;
22f0d90a
MB
2556 bool bypass;
2557
bd60e381
CZ
2558 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2559 num_regs))
2560 return 0;
2561
aab13ebc
MB
2562 p = krealloc(map->patch,
2563 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2564 GFP_KERNEL);
2565 if (p) {
2566 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2567 map->patch = p;
2568 map->patch_regs += num_regs;
22f0d90a 2569 } else {
56fb1c74 2570 return -ENOMEM;
22f0d90a
MB
2571 }
2572
0d4529c5 2573 map->lock(map->lock_arg);
22f0d90a
MB
2574
2575 bypass = map->cache_bypass;
2576
2577 map->cache_bypass = true;
1a25f261 2578 map->async = true;
22f0d90a 2579
6bf13103
CK
2580 ret = _regmap_multi_reg_write(map, regs, num_regs);
2581 if (ret != 0)
2582 goto out;
22f0d90a 2583
22f0d90a 2584out:
1a25f261 2585 map->async = false;
22f0d90a
MB
2586 map->cache_bypass = bypass;
2587
0d4529c5 2588 map->unlock(map->lock_arg);
22f0d90a 2589
1a25f261
MB
2590 regmap_async_complete(map);
2591
22f0d90a
MB
2592 return ret;
2593}
2594EXPORT_SYMBOL_GPL(regmap_register_patch);
2595
eae4b51b 2596/*
a6539c32
MB
2597 * regmap_get_val_bytes(): Report the size of a register value
2598 *
2599 * Report the size of a register value, mainly intended to for use by
2600 * generic infrastructure built on top of regmap.
2601 */
2602int regmap_get_val_bytes(struct regmap *map)
2603{
2604 if (map->format.format_write)
2605 return -EINVAL;
2606
2607 return map->format.val_bytes;
2608}
2609EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2610
13ff50c8
NC
2611int regmap_parse_val(struct regmap *map, const void *buf,
2612 unsigned int *val)
2613{
2614 if (!map->format.parse_val)
2615 return -EINVAL;
2616
2617 *val = map->format.parse_val(buf);
2618
2619 return 0;
2620}
2621EXPORT_SYMBOL_GPL(regmap_parse_val);
2622
31244e39
MB
2623static int __init regmap_initcall(void)
2624{
2625 regmap_debugfs_initcall();
2626
2627 return 0;
2628}
2629postcore_initcall(regmap_initcall);
This page took 0.302955 seconds and 5 git commands to generate.