regmap: spi: Support asynchronous I/O for SPI
[deliverable/linux.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
b83a313b 19
fb2736bb
MB
20#define CREATE_TRACE_POINTS
21#include <trace/events/regmap.h>
22
93de9124 23#include "internal.h"
b83a313b 24
1044c180
MB
25/*
26 * Sometimes for failures during very early init the trace
27 * infrastructure isn't available early enough to be used. For this
28 * sort of problem defining LOG_DEVICE will add printks for basic
29 * register I/O on a specific device.
30 */
31#undef LOG_DEVICE
32
33static int _regmap_update_bits(struct regmap *map, unsigned int reg,
34 unsigned int mask, unsigned int val,
35 bool *change);
36
ad278406
AS
37static int _regmap_bus_read(void *context, unsigned int reg,
38 unsigned int *val);
07c320dc
AS
39static int _regmap_bus_formatted_write(void *context, unsigned int reg,
40 unsigned int val);
41static int _regmap_bus_raw_write(void *context, unsigned int reg,
42 unsigned int val);
ad278406 43
0d509f2b
MB
44static void async_cleanup(struct work_struct *work)
45{
46 struct regmap_async *async = container_of(work, struct regmap_async,
47 cleanup);
48
49 kfree(async->work_buf);
50 kfree(async);
51}
52
76aad392
DC
53bool regmap_reg_in_ranges(unsigned int reg,
54 const struct regmap_range *ranges,
55 unsigned int nranges)
56{
57 const struct regmap_range *r;
58 int i;
59
60 for (i = 0, r = ranges; i < nranges; i++, r++)
61 if (regmap_reg_in_range(reg, r))
62 return true;
63 return false;
64}
65EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
66
67static bool _regmap_check_range_table(struct regmap *map,
68 unsigned int reg,
69 const struct regmap_access_table *table)
70{
71 /* Check "no ranges" first */
72 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
73 return false;
74
75 /* In case zero "yes ranges" are supplied, any reg is OK */
76 if (!table->n_yes_ranges)
77 return true;
78
79 return regmap_reg_in_ranges(reg, table->yes_ranges,
80 table->n_yes_ranges);
81}
82
8de2f081
MB
83bool regmap_writeable(struct regmap *map, unsigned int reg)
84{
85 if (map->max_register && reg > map->max_register)
86 return false;
87
88 if (map->writeable_reg)
89 return map->writeable_reg(map->dev, reg);
90
76aad392
DC
91 if (map->wr_table)
92 return _regmap_check_range_table(map, reg, map->wr_table);
93
8de2f081
MB
94 return true;
95}
96
97bool regmap_readable(struct regmap *map, unsigned int reg)
98{
99 if (map->max_register && reg > map->max_register)
100 return false;
101
4191f197
WS
102 if (map->format.format_write)
103 return false;
104
8de2f081
MB
105 if (map->readable_reg)
106 return map->readable_reg(map->dev, reg);
107
76aad392
DC
108 if (map->rd_table)
109 return _regmap_check_range_table(map, reg, map->rd_table);
110
8de2f081
MB
111 return true;
112}
113
114bool regmap_volatile(struct regmap *map, unsigned int reg)
115{
4191f197 116 if (!regmap_readable(map, reg))
8de2f081
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117 return false;
118
119 if (map->volatile_reg)
120 return map->volatile_reg(map->dev, reg);
121
76aad392
DC
122 if (map->volatile_table)
123 return _regmap_check_range_table(map, reg, map->volatile_table);
124
8de2f081
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125 return true;
126}
127
128bool regmap_precious(struct regmap *map, unsigned int reg)
129{
4191f197 130 if (!regmap_readable(map, reg))
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131 return false;
132
133 if (map->precious_reg)
134 return map->precious_reg(map->dev, reg);
135
76aad392
DC
136 if (map->precious_table)
137 return _regmap_check_range_table(map, reg, map->precious_table);
138
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139 return false;
140}
141
82cd9965 142static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 143 size_t num)
82cd9965
LPC
144{
145 unsigned int i;
146
147 for (i = 0; i < num; i++)
148 if (!regmap_volatile(map, reg + i))
149 return false;
150
151 return true;
152}
153
9aa50750
WS
154static void regmap_format_2_6_write(struct regmap *map,
155 unsigned int reg, unsigned int val)
156{
157 u8 *out = map->work_buf;
158
159 *out = (reg << 6) | val;
160}
161
b83a313b
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162static void regmap_format_4_12_write(struct regmap *map,
163 unsigned int reg, unsigned int val)
164{
165 __be16 *out = map->work_buf;
166 *out = cpu_to_be16((reg << 12) | val);
167}
168
169static void regmap_format_7_9_write(struct regmap *map,
170 unsigned int reg, unsigned int val)
171{
172 __be16 *out = map->work_buf;
173 *out = cpu_to_be16((reg << 9) | val);
174}
175
7e5ec63e
LPC
176static void regmap_format_10_14_write(struct regmap *map,
177 unsigned int reg, unsigned int val)
178{
179 u8 *out = map->work_buf;
180
181 out[2] = val;
182 out[1] = (val >> 8) | (reg << 6);
183 out[0] = reg >> 2;
184}
185
d939fb9a 186static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
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187{
188 u8 *b = buf;
189
d939fb9a 190 b[0] = val << shift;
b83a313b
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191}
192
141eba2e 193static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
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194{
195 __be16 *b = buf;
196
d939fb9a 197 b[0] = cpu_to_be16(val << shift);
b83a313b
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198}
199
141eba2e
SW
200static void regmap_format_16_native(void *buf, unsigned int val,
201 unsigned int shift)
202{
203 *(u16 *)buf = val << shift;
204}
205
d939fb9a 206static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
207{
208 u8 *b = buf;
209
d939fb9a
MR
210 val <<= shift;
211
ea279fc5
MR
212 b[0] = val >> 16;
213 b[1] = val >> 8;
214 b[2] = val;
215}
216
141eba2e 217static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
218{
219 __be32 *b = buf;
220
d939fb9a 221 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
222}
223
141eba2e
SW
224static void regmap_format_32_native(void *buf, unsigned int val,
225 unsigned int shift)
226{
227 *(u32 *)buf = val << shift;
228}
229
b83a313b
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230static unsigned int regmap_parse_8(void *buf)
231{
232 u8 *b = buf;
233
234 return b[0];
235}
236
141eba2e 237static unsigned int regmap_parse_16_be(void *buf)
b83a313b
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238{
239 __be16 *b = buf;
240
241 b[0] = be16_to_cpu(b[0]);
242
243 return b[0];
244}
245
141eba2e
SW
246static unsigned int regmap_parse_16_native(void *buf)
247{
248 return *(u16 *)buf;
249}
250
ea279fc5
MR
251static unsigned int regmap_parse_24(void *buf)
252{
253 u8 *b = buf;
254 unsigned int ret = b[2];
255 ret |= ((unsigned int)b[1]) << 8;
256 ret |= ((unsigned int)b[0]) << 16;
257
258 return ret;
259}
260
141eba2e 261static unsigned int regmap_parse_32_be(void *buf)
7d5e525b
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262{
263 __be32 *b = buf;
264
265 b[0] = be32_to_cpu(b[0]);
266
267 return b[0];
268}
269
141eba2e
SW
270static unsigned int regmap_parse_32_native(void *buf)
271{
272 return *(u32 *)buf;
273}
274
0d4529c5 275static void regmap_lock_mutex(void *__map)
bacdbe07 276{
0d4529c5 277 struct regmap *map = __map;
bacdbe07
SW
278 mutex_lock(&map->mutex);
279}
280
0d4529c5 281static void regmap_unlock_mutex(void *__map)
bacdbe07 282{
0d4529c5 283 struct regmap *map = __map;
bacdbe07
SW
284 mutex_unlock(&map->mutex);
285}
286
0d4529c5 287static void regmap_lock_spinlock(void *__map)
bacdbe07 288{
0d4529c5 289 struct regmap *map = __map;
bacdbe07
SW
290 spin_lock(&map->spinlock);
291}
292
0d4529c5 293static void regmap_unlock_spinlock(void *__map)
bacdbe07 294{
0d4529c5 295 struct regmap *map = __map;
bacdbe07
SW
296 spin_unlock(&map->spinlock);
297}
298
72b39f6f
MB
299static void dev_get_regmap_release(struct device *dev, void *res)
300{
301 /*
302 * We don't actually have anything to do here; the goal here
303 * is not to manage the regmap but to provide a simple way to
304 * get the regmap back given a struct device.
305 */
306}
307
6863ca62
KG
308static bool _regmap_range_add(struct regmap *map,
309 struct regmap_range_node *data)
310{
311 struct rb_root *root = &map->range_tree;
312 struct rb_node **new = &(root->rb_node), *parent = NULL;
313
314 while (*new) {
315 struct regmap_range_node *this =
316 container_of(*new, struct regmap_range_node, node);
317
318 parent = *new;
319 if (data->range_max < this->range_min)
320 new = &((*new)->rb_left);
321 else if (data->range_min > this->range_max)
322 new = &((*new)->rb_right);
323 else
324 return false;
325 }
326
327 rb_link_node(&data->node, parent, new);
328 rb_insert_color(&data->node, root);
329
330 return true;
331}
332
333static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
334 unsigned int reg)
335{
336 struct rb_node *node = map->range_tree.rb_node;
337
338 while (node) {
339 struct regmap_range_node *this =
340 container_of(node, struct regmap_range_node, node);
341
342 if (reg < this->range_min)
343 node = node->rb_left;
344 else if (reg > this->range_max)
345 node = node->rb_right;
346 else
347 return this;
348 }
349
350 return NULL;
351}
352
353static void regmap_range_exit(struct regmap *map)
354{
355 struct rb_node *next;
356 struct regmap_range_node *range_node;
357
358 next = rb_first(&map->range_tree);
359 while (next) {
360 range_node = rb_entry(next, struct regmap_range_node, node);
361 next = rb_next(&range_node->node);
362 rb_erase(&range_node->node, &map->range_tree);
363 kfree(range_node);
364 }
365
366 kfree(map->selector_work_buf);
367}
368
b83a313b
MB
369/**
370 * regmap_init(): Initialise register map
371 *
372 * @dev: Device that will be interacted with
373 * @bus: Bus-specific callbacks to use with device
0135bbcc 374 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
375 * @config: Configuration for register map
376 *
377 * The return value will be an ERR_PTR() on error or a valid pointer to
378 * a struct regmap. This function should generally not be called
379 * directly, it should be called by bus-specific init functions.
380 */
381struct regmap *regmap_init(struct device *dev,
382 const struct regmap_bus *bus,
0135bbcc 383 void *bus_context,
b83a313b
MB
384 const struct regmap_config *config)
385{
72b39f6f 386 struct regmap *map, **m;
b83a313b 387 int ret = -EINVAL;
141eba2e 388 enum regmap_endian reg_endian, val_endian;
6863ca62 389 int i, j;
b83a313b
MB
390
391 if (!bus || !config)
abbb18fb 392 goto err;
b83a313b
MB
393
394 map = kzalloc(sizeof(*map), GFP_KERNEL);
395 if (map == NULL) {
396 ret = -ENOMEM;
397 goto err;
398 }
399
0d4529c5
DC
400 if (config->lock && config->unlock) {
401 map->lock = config->lock;
402 map->unlock = config->unlock;
403 map->lock_arg = config->lock_arg;
bacdbe07 404 } else {
0d4529c5
DC
405 if (bus->fast_io) {
406 spin_lock_init(&map->spinlock);
407 map->lock = regmap_lock_spinlock;
408 map->unlock = regmap_unlock_spinlock;
409 } else {
410 mutex_init(&map->mutex);
411 map->lock = regmap_lock_mutex;
412 map->unlock = regmap_unlock_mutex;
413 }
414 map->lock_arg = map;
bacdbe07 415 }
c212accc 416 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 417 map->format.pad_bytes = config->pad_bits / 8;
c212accc 418 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
419 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
420 config->val_bits + config->pad_bits, 8);
d939fb9a 421 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
422 if (config->reg_stride)
423 map->reg_stride = config->reg_stride;
424 else
425 map->reg_stride = 1;
2e33caf1 426 map->use_single_rw = config->use_single_rw;
b83a313b
MB
427 map->dev = dev;
428 map->bus = bus;
0135bbcc 429 map->bus_context = bus_context;
2e2ae66d 430 map->max_register = config->max_register;
76aad392
DC
431 map->wr_table = config->wr_table;
432 map->rd_table = config->rd_table;
433 map->volatile_table = config->volatile_table;
434 map->precious_table = config->precious_table;
2e2ae66d
MB
435 map->writeable_reg = config->writeable_reg;
436 map->readable_reg = config->readable_reg;
437 map->volatile_reg = config->volatile_reg;
2efe1642 438 map->precious_reg = config->precious_reg;
5d1729e7 439 map->cache_type = config->cache_type;
72b39f6f 440 map->name = config->name;
b83a313b 441
0d509f2b
MB
442 spin_lock_init(&map->async_lock);
443 INIT_LIST_HEAD(&map->async_list);
444 init_waitqueue_head(&map->async_waitq);
445
6f306441
LPC
446 if (config->read_flag_mask || config->write_flag_mask) {
447 map->read_flag_mask = config->read_flag_mask;
448 map->write_flag_mask = config->write_flag_mask;
449 } else {
450 map->read_flag_mask = bus->read_flag_mask;
451 }
452
ad278406
AS
453 map->reg_read = _regmap_bus_read;
454
141eba2e
SW
455 reg_endian = config->reg_format_endian;
456 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
457 reg_endian = bus->reg_format_endian_default;
458 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
459 reg_endian = REGMAP_ENDIAN_BIG;
460
461 val_endian = config->val_format_endian;
462 if (val_endian == REGMAP_ENDIAN_DEFAULT)
463 val_endian = bus->val_format_endian_default;
464 if (val_endian == REGMAP_ENDIAN_DEFAULT)
465 val_endian = REGMAP_ENDIAN_BIG;
466
d939fb9a 467 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
468 case 2:
469 switch (config->val_bits) {
470 case 6:
471 map->format.format_write = regmap_format_2_6_write;
472 break;
473 default:
474 goto err_map;
475 }
476 break;
477
b83a313b
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478 case 4:
479 switch (config->val_bits) {
480 case 12:
481 map->format.format_write = regmap_format_4_12_write;
482 break;
483 default:
484 goto err_map;
485 }
486 break;
487
488 case 7:
489 switch (config->val_bits) {
490 case 9:
491 map->format.format_write = regmap_format_7_9_write;
492 break;
493 default:
494 goto err_map;
495 }
496 break;
497
7e5ec63e
LPC
498 case 10:
499 switch (config->val_bits) {
500 case 14:
501 map->format.format_write = regmap_format_10_14_write;
502 break;
503 default:
504 goto err_map;
505 }
506 break;
507
b83a313b
MB
508 case 8:
509 map->format.format_reg = regmap_format_8;
510 break;
511
512 case 16:
141eba2e
SW
513 switch (reg_endian) {
514 case REGMAP_ENDIAN_BIG:
515 map->format.format_reg = regmap_format_16_be;
516 break;
517 case REGMAP_ENDIAN_NATIVE:
518 map->format.format_reg = regmap_format_16_native;
519 break;
520 default:
521 goto err_map;
522 }
b83a313b
MB
523 break;
524
7d5e525b 525 case 32:
141eba2e
SW
526 switch (reg_endian) {
527 case REGMAP_ENDIAN_BIG:
528 map->format.format_reg = regmap_format_32_be;
529 break;
530 case REGMAP_ENDIAN_NATIVE:
531 map->format.format_reg = regmap_format_32_native;
532 break;
533 default:
534 goto err_map;
535 }
7d5e525b
MB
536 break;
537
b83a313b
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538 default:
539 goto err_map;
540 }
541
542 switch (config->val_bits) {
543 case 8:
544 map->format.format_val = regmap_format_8;
545 map->format.parse_val = regmap_parse_8;
546 break;
547 case 16:
141eba2e
SW
548 switch (val_endian) {
549 case REGMAP_ENDIAN_BIG:
550 map->format.format_val = regmap_format_16_be;
551 map->format.parse_val = regmap_parse_16_be;
552 break;
553 case REGMAP_ENDIAN_NATIVE:
554 map->format.format_val = regmap_format_16_native;
555 map->format.parse_val = regmap_parse_16_native;
556 break;
557 default:
558 goto err_map;
559 }
b83a313b 560 break;
ea279fc5 561 case 24:
141eba2e
SW
562 if (val_endian != REGMAP_ENDIAN_BIG)
563 goto err_map;
ea279fc5
MR
564 map->format.format_val = regmap_format_24;
565 map->format.parse_val = regmap_parse_24;
566 break;
7d5e525b 567 case 32:
141eba2e
SW
568 switch (val_endian) {
569 case REGMAP_ENDIAN_BIG:
570 map->format.format_val = regmap_format_32_be;
571 map->format.parse_val = regmap_parse_32_be;
572 break;
573 case REGMAP_ENDIAN_NATIVE:
574 map->format.format_val = regmap_format_32_native;
575 map->format.parse_val = regmap_parse_32_native;
576 break;
577 default:
578 goto err_map;
579 }
7d5e525b 580 break;
b83a313b
MB
581 }
582
141eba2e
SW
583 if (map->format.format_write) {
584 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
585 (val_endian != REGMAP_ENDIAN_BIG))
586 goto err_map;
7a647614 587 map->use_single_rw = true;
141eba2e 588 }
7a647614 589
b83a313b
MB
590 if (!map->format.format_write &&
591 !(map->format.format_reg && map->format.format_val))
592 goto err_map;
593
82159ba8 594 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
595 if (map->work_buf == NULL) {
596 ret = -ENOMEM;
5204f5e3 597 goto err_map;
b83a313b
MB
598 }
599
07c320dc
AS
600 if (map->format.format_write)
601 map->reg_write = _regmap_bus_formatted_write;
602 else if (map->format.format_val)
603 map->reg_write = _regmap_bus_raw_write;
604
6863ca62 605 map->range_tree = RB_ROOT;
e3549cd0 606 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
607 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
608 struct regmap_range_node *new;
609
610 /* Sanity check */
061adc06
MB
611 if (range_cfg->range_max < range_cfg->range_min) {
612 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
613 range_cfg->range_max, range_cfg->range_min);
6863ca62 614 goto err_range;
061adc06
MB
615 }
616
617 if (range_cfg->range_max > map->max_register) {
618 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
619 range_cfg->range_max, map->max_register);
620 goto err_range;
621 }
622
623 if (range_cfg->selector_reg > map->max_register) {
624 dev_err(map->dev,
625 "Invalid range %d: selector out of map\n", i);
626 goto err_range;
627 }
628
629 if (range_cfg->window_len == 0) {
630 dev_err(map->dev, "Invalid range %d: window_len 0\n",
631 i);
632 goto err_range;
633 }
6863ca62
KG
634
635 /* Make sure, that this register range has no selector
636 or data window within its boundary */
e3549cd0 637 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
638 unsigned sel_reg = config->ranges[j].selector_reg;
639 unsigned win_min = config->ranges[j].window_start;
640 unsigned win_max = win_min +
641 config->ranges[j].window_len - 1;
642
643 if (range_cfg->range_min <= sel_reg &&
644 sel_reg <= range_cfg->range_max) {
061adc06
MB
645 dev_err(map->dev,
646 "Range %d: selector for %d in window\n",
647 i, j);
6863ca62
KG
648 goto err_range;
649 }
650
651 if (!(win_max < range_cfg->range_min ||
652 win_min > range_cfg->range_max)) {
061adc06
MB
653 dev_err(map->dev,
654 "Range %d: window for %d in window\n",
655 i, j);
6863ca62
KG
656 goto err_range;
657 }
658 }
659
660 new = kzalloc(sizeof(*new), GFP_KERNEL);
661 if (new == NULL) {
662 ret = -ENOMEM;
663 goto err_range;
664 }
665
4b020b3f 666 new->map = map;
d058bb49 667 new->name = range_cfg->name;
6863ca62
KG
668 new->range_min = range_cfg->range_min;
669 new->range_max = range_cfg->range_max;
670 new->selector_reg = range_cfg->selector_reg;
671 new->selector_mask = range_cfg->selector_mask;
672 new->selector_shift = range_cfg->selector_shift;
673 new->window_start = range_cfg->window_start;
674 new->window_len = range_cfg->window_len;
675
676 if (_regmap_range_add(map, new) == false) {
061adc06 677 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
678 kfree(new);
679 goto err_range;
680 }
681
682 if (map->selector_work_buf == NULL) {
683 map->selector_work_buf =
684 kzalloc(map->format.buf_size, GFP_KERNEL);
685 if (map->selector_work_buf == NULL) {
686 ret = -ENOMEM;
687 goto err_range;
688 }
689 }
690 }
052d2cd1 691
e5e3b8ab 692 ret = regcache_init(map, config);
0ff3e62f 693 if (ret != 0)
6863ca62
KG
694 goto err_range;
695
696 regmap_debugfs_init(map, config->name);
5d1729e7 697
72b39f6f
MB
698 /* Add a devres resource for dev_get_regmap() */
699 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
700 if (!m) {
701 ret = -ENOMEM;
6863ca62 702 goto err_debugfs;
72b39f6f
MB
703 }
704 *m = map;
705 devres_add(dev, m);
706
b83a313b
MB
707 return map;
708
bfaa25f3
SW
709err_debugfs:
710 regmap_debugfs_exit(map);
72b39f6f 711 regcache_exit(map);
6863ca62
KG
712err_range:
713 regmap_range_exit(map);
58072cbf 714 kfree(map->work_buf);
b83a313b
MB
715err_map:
716 kfree(map);
717err:
718 return ERR_PTR(ret);
719}
720EXPORT_SYMBOL_GPL(regmap_init);
721
c0eb4676
MB
722static void devm_regmap_release(struct device *dev, void *res)
723{
724 regmap_exit(*(struct regmap **)res);
725}
726
727/**
728 * devm_regmap_init(): Initialise managed register map
729 *
730 * @dev: Device that will be interacted with
731 * @bus: Bus-specific callbacks to use with device
0135bbcc 732 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
733 * @config: Configuration for register map
734 *
735 * The return value will be an ERR_PTR() on error or a valid pointer
736 * to a struct regmap. This function should generally not be called
737 * directly, it should be called by bus-specific init functions. The
738 * map will be automatically freed by the device management code.
739 */
740struct regmap *devm_regmap_init(struct device *dev,
741 const struct regmap_bus *bus,
0135bbcc 742 void *bus_context,
c0eb4676
MB
743 const struct regmap_config *config)
744{
745 struct regmap **ptr, *regmap;
746
747 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
748 if (!ptr)
749 return ERR_PTR(-ENOMEM);
750
0135bbcc 751 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
752 if (!IS_ERR(regmap)) {
753 *ptr = regmap;
754 devres_add(dev, ptr);
755 } else {
756 devres_free(ptr);
757 }
758
759 return regmap;
760}
761EXPORT_SYMBOL_GPL(devm_regmap_init);
762
bf315173
MB
763/**
764 * regmap_reinit_cache(): Reinitialise the current register cache
765 *
766 * @map: Register map to operate on.
767 * @config: New configuration. Only the cache data will be used.
768 *
769 * Discard any existing register cache for the map and initialize a
770 * new cache. This can be used to restore the cache to defaults or to
771 * update the cache configuration to reflect runtime discovery of the
772 * hardware.
4d879514
DP
773 *
774 * No explicit locking is done here, the user needs to ensure that
775 * this function will not race with other calls to regmap.
bf315173
MB
776 */
777int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
778{
bf315173 779 regcache_exit(map);
a24f64a6 780 regmap_debugfs_exit(map);
bf315173
MB
781
782 map->max_register = config->max_register;
783 map->writeable_reg = config->writeable_reg;
784 map->readable_reg = config->readable_reg;
785 map->volatile_reg = config->volatile_reg;
786 map->precious_reg = config->precious_reg;
787 map->cache_type = config->cache_type;
788
d3c242e1 789 regmap_debugfs_init(map, config->name);
a24f64a6 790
421e8d2d
MB
791 map->cache_bypass = false;
792 map->cache_only = false;
793
4d879514 794 return regcache_init(map, config);
bf315173 795}
752a6a5f 796EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 797
b83a313b
MB
798/**
799 * regmap_exit(): Free a previously allocated register map
800 */
801void regmap_exit(struct regmap *map)
802{
5d1729e7 803 regcache_exit(map);
31244e39 804 regmap_debugfs_exit(map);
6863ca62 805 regmap_range_exit(map);
0135bbcc
SW
806 if (map->bus->free_context)
807 map->bus->free_context(map->bus_context);
b83a313b 808 kfree(map->work_buf);
b83a313b
MB
809 kfree(map);
810}
811EXPORT_SYMBOL_GPL(regmap_exit);
812
72b39f6f
MB
813static int dev_get_regmap_match(struct device *dev, void *res, void *data)
814{
815 struct regmap **r = res;
816 if (!r || !*r) {
817 WARN_ON(!r || !*r);
818 return 0;
819 }
820
821 /* If the user didn't specify a name match any */
822 if (data)
823 return (*r)->name == data;
824 else
825 return 1;
826}
827
828/**
829 * dev_get_regmap(): Obtain the regmap (if any) for a device
830 *
831 * @dev: Device to retrieve the map for
832 * @name: Optional name for the register map, usually NULL.
833 *
834 * Returns the regmap for the device if one is present, or NULL. If
835 * name is specified then it must match the name specified when
836 * registering the device, if it is NULL then the first regmap found
837 * will be used. Devices with multiple register maps are very rare,
838 * generic code should normally not need to specify a name.
839 */
840struct regmap *dev_get_regmap(struct device *dev, const char *name)
841{
842 struct regmap **r = devres_find(dev, dev_get_regmap_release,
843 dev_get_regmap_match, (void *)name);
844
845 if (!r)
846 return NULL;
847 return *r;
848}
849EXPORT_SYMBOL_GPL(dev_get_regmap);
850
6863ca62 851static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 852 struct regmap_range_node *range,
6863ca62
KG
853 unsigned int val_num)
854{
6863ca62
KG
855 void *orig_work_buf;
856 unsigned int win_offset;
857 unsigned int win_page;
858 bool page_chg;
859 int ret;
860
98bc7dfd
MB
861 win_offset = (*reg - range->range_min) % range->window_len;
862 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 863
98bc7dfd
MB
864 if (val_num > 1) {
865 /* Bulk write shouldn't cross range boundary */
866 if (*reg + val_num - 1 > range->range_max)
867 return -EINVAL;
6863ca62 868
98bc7dfd
MB
869 /* ... or single page boundary */
870 if (val_num > range->window_len - win_offset)
871 return -EINVAL;
872 }
6863ca62 873
98bc7dfd
MB
874 /* It is possible to have selector register inside data window.
875 In that case, selector register is located on every page and
876 it needs no page switching, when accessed alone. */
877 if (val_num > 1 ||
878 range->window_start + win_offset != range->selector_reg) {
879 /* Use separate work_buf during page switching */
880 orig_work_buf = map->work_buf;
881 map->work_buf = map->selector_work_buf;
6863ca62 882
98bc7dfd
MB
883 ret = _regmap_update_bits(map, range->selector_reg,
884 range->selector_mask,
885 win_page << range->selector_shift,
886 &page_chg);
632a5b01 887
98bc7dfd 888 map->work_buf = orig_work_buf;
6863ca62 889
0ff3e62f 890 if (ret != 0)
98bc7dfd 891 return ret;
6863ca62
KG
892 }
893
98bc7dfd
MB
894 *reg = range->window_start + win_offset;
895
6863ca62
KG
896 return 0;
897}
898
b83a313b 899static int _regmap_raw_write(struct regmap *map, unsigned int reg,
0d509f2b 900 const void *val, size_t val_len, bool async)
b83a313b 901{
98bc7dfd 902 struct regmap_range_node *range;
0d509f2b 903 unsigned long flags;
6f306441 904 u8 *u8 = map->work_buf;
0d509f2b
MB
905 void *work_val = map->work_buf + map->format.reg_bytes +
906 map->format.pad_bytes;
b83a313b
MB
907 void *buf;
908 int ret = -ENOTSUPP;
909 size_t len;
73304781
MB
910 int i;
911
912 /* Check for unwritable registers before we start */
913 if (map->writeable_reg)
914 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
915 if (!map->writeable_reg(map->dev,
916 reg + (i * map->reg_stride)))
73304781 917 return -EINVAL;
b83a313b 918
c9157198
LD
919 if (!map->cache_bypass && map->format.parse_val) {
920 unsigned int ival;
921 int val_bytes = map->format.val_bytes;
922 for (i = 0; i < val_len / val_bytes; i++) {
923 memcpy(map->work_buf, val + (i * val_bytes), val_bytes);
924 ival = map->format.parse_val(map->work_buf);
f01ee60f
SW
925 ret = regcache_write(map, reg + (i * map->reg_stride),
926 ival);
c9157198
LD
927 if (ret) {
928 dev_err(map->dev,
6d04b8ac 929 "Error in caching of register: %x ret: %d\n",
c9157198
LD
930 reg + i, ret);
931 return ret;
932 }
933 }
934 if (map->cache_only) {
935 map->cache_dirty = true;
936 return 0;
937 }
938 }
939
98bc7dfd
MB
940 range = _regmap_range_lookup(map, reg);
941 if (range) {
8a2ceac6
MB
942 int val_num = val_len / map->format.val_bytes;
943 int win_offset = (reg - range->range_min) % range->window_len;
944 int win_residue = range->window_len - win_offset;
945
946 /* If the write goes beyond the end of the window split it */
947 while (val_num > win_residue) {
1a61cfe3 948 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
949 win_residue, val_len / map->format.val_bytes);
950 ret = _regmap_raw_write(map, reg, val, win_residue *
0d509f2b 951 map->format.val_bytes, async);
8a2ceac6
MB
952 if (ret != 0)
953 return ret;
954
955 reg += win_residue;
956 val_num -= win_residue;
957 val += win_residue * map->format.val_bytes;
958 val_len -= win_residue * map->format.val_bytes;
959
960 win_offset = (reg - range->range_min) %
961 range->window_len;
962 win_residue = range->window_len - win_offset;
963 }
964
965 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 966 if (ret != 0)
98bc7dfd
MB
967 return ret;
968 }
6863ca62 969
d939fb9a 970 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 971
6f306441
LPC
972 u8[0] |= map->write_flag_mask;
973
0d509f2b
MB
974 if (async && map->bus->async_write) {
975 struct regmap_async *async = map->bus->async_alloc();
976 if (!async)
977 return -ENOMEM;
978
979 async->work_buf = kzalloc(map->format.buf_size,
980 GFP_KERNEL | GFP_DMA);
981 if (!async->work_buf) {
982 kfree(async);
983 return -ENOMEM;
984 }
985
986 INIT_WORK(&async->cleanup, async_cleanup);
987 async->map = map;
988
989 /* If the caller supplied the value we can use it safely. */
990 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
991 map->format.reg_bytes + map->format.val_bytes);
992 if (val == work_val)
993 val = async->work_buf + map->format.pad_bytes +
994 map->format.reg_bytes;
995
996 spin_lock_irqsave(&map->async_lock, flags);
997 list_add_tail(&async->list, &map->async_list);
998 spin_unlock_irqrestore(&map->async_lock, flags);
999
1000 ret = map->bus->async_write(map->bus_context, async->work_buf,
1001 map->format.reg_bytes +
1002 map->format.pad_bytes,
1003 val, val_len, async);
1004
1005 if (ret != 0) {
1006 dev_err(map->dev, "Failed to schedule write: %d\n",
1007 ret);
1008
1009 spin_lock_irqsave(&map->async_lock, flags);
1010 list_del(&async->list);
1011 spin_unlock_irqrestore(&map->async_lock, flags);
1012
1013 kfree(async->work_buf);
1014 kfree(async);
1015 }
1016 }
1017
fb2736bb
MB
1018 trace_regmap_hw_write_start(map->dev, reg,
1019 val_len / map->format.val_bytes);
1020
2547e201
MB
1021 /* If we're doing a single register write we can probably just
1022 * send the work_buf directly, otherwise try to do a gather
1023 * write.
1024 */
0d509f2b 1025 if (val == work_val)
0135bbcc 1026 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1027 map->format.reg_bytes +
1028 map->format.pad_bytes +
1029 val_len);
2547e201 1030 else if (map->bus->gather_write)
0135bbcc 1031 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1032 map->format.reg_bytes +
1033 map->format.pad_bytes,
b83a313b
MB
1034 val, val_len);
1035
2547e201 1036 /* If that didn't work fall back on linearising by hand. */
b83a313b 1037 if (ret == -ENOTSUPP) {
82159ba8
MB
1038 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1039 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1040 if (!buf)
1041 return -ENOMEM;
1042
1043 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1044 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1045 val, val_len);
0135bbcc 1046 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1047
1048 kfree(buf);
1049 }
1050
fb2736bb
MB
1051 trace_regmap_hw_write_done(map->dev, reg,
1052 val_len / map->format.val_bytes);
1053
b83a313b
MB
1054 return ret;
1055}
1056
07c320dc
AS
1057static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1058 unsigned int val)
1059{
1060 int ret;
1061 struct regmap_range_node *range;
1062 struct regmap *map = context;
1063
1064 BUG_ON(!map->format.format_write);
1065
1066 range = _regmap_range_lookup(map, reg);
1067 if (range) {
1068 ret = _regmap_select_page(map, &reg, range, 1);
1069 if (ret != 0)
1070 return ret;
1071 }
1072
1073 map->format.format_write(map, reg, val);
1074
1075 trace_regmap_hw_write_start(map->dev, reg, 1);
1076
1077 ret = map->bus->write(map->bus_context, map->work_buf,
1078 map->format.buf_size);
1079
1080 trace_regmap_hw_write_done(map->dev, reg, 1);
1081
1082 return ret;
1083}
1084
1085static int _regmap_bus_raw_write(void *context, unsigned int reg,
1086 unsigned int val)
1087{
1088 struct regmap *map = context;
1089
1090 BUG_ON(!map->format.format_val);
1091
1092 map->format.format_val(map->work_buf + map->format.reg_bytes
1093 + map->format.pad_bytes, val, 0);
1094 return _regmap_raw_write(map, reg,
1095 map->work_buf +
1096 map->format.reg_bytes +
1097 map->format.pad_bytes,
0d509f2b 1098 map->format.val_bytes, false);
07c320dc
AS
1099}
1100
4d2dc095
DP
1101int _regmap_write(struct regmap *map, unsigned int reg,
1102 unsigned int val)
b83a313b 1103{
fb2736bb 1104 int ret;
b83a313b 1105
c9157198 1106 if (!map->cache_bypass && map->format.format_write) {
5d1729e7
DP
1107 ret = regcache_write(map, reg, val);
1108 if (ret != 0)
1109 return ret;
8ae0d7e8
MB
1110 if (map->cache_only) {
1111 map->cache_dirty = true;
5d1729e7 1112 return 0;
8ae0d7e8 1113 }
5d1729e7
DP
1114 }
1115
1044c180
MB
1116#ifdef LOG_DEVICE
1117 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1118 dev_info(map->dev, "%x <= %x\n", reg, val);
1119#endif
1120
fb2736bb
MB
1121 trace_regmap_reg_write(map->dev, reg, val);
1122
07c320dc 1123 return map->reg_write(map, reg, val);
b83a313b
MB
1124}
1125
1126/**
1127 * regmap_write(): Write a value to a single register
1128 *
1129 * @map: Register map to write to
1130 * @reg: Register to write to
1131 * @val: Value to be written
1132 *
1133 * A value of zero will be returned on success, a negative errno will
1134 * be returned in error cases.
1135 */
1136int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1137{
1138 int ret;
1139
f01ee60f
SW
1140 if (reg % map->reg_stride)
1141 return -EINVAL;
1142
0d4529c5 1143 map->lock(map->lock_arg);
b83a313b
MB
1144
1145 ret = _regmap_write(map, reg, val);
1146
0d4529c5 1147 map->unlock(map->lock_arg);
b83a313b
MB
1148
1149 return ret;
1150}
1151EXPORT_SYMBOL_GPL(regmap_write);
1152
1153/**
1154 * regmap_raw_write(): Write raw values to one or more registers
1155 *
1156 * @map: Register map to write to
1157 * @reg: Initial register to write to
1158 * @val: Block of data to be written, laid out for direct transmission to the
1159 * device
1160 * @val_len: Length of data pointed to by val.
1161 *
1162 * This function is intended to be used for things like firmware
1163 * download where a large block of data needs to be transferred to the
1164 * device. No formatting will be done on the data provided.
1165 *
1166 * A value of zero will be returned on success, a negative errno will
1167 * be returned in error cases.
1168 */
1169int regmap_raw_write(struct regmap *map, unsigned int reg,
1170 const void *val, size_t val_len)
1171{
1172 int ret;
1173
851960ba
SW
1174 if (val_len % map->format.val_bytes)
1175 return -EINVAL;
f01ee60f
SW
1176 if (reg % map->reg_stride)
1177 return -EINVAL;
851960ba 1178
0d4529c5 1179 map->lock(map->lock_arg);
b83a313b 1180
0d509f2b 1181 ret = _regmap_raw_write(map, reg, val, val_len, false);
b83a313b 1182
0d4529c5 1183 map->unlock(map->lock_arg);
b83a313b
MB
1184
1185 return ret;
1186}
1187EXPORT_SYMBOL_GPL(regmap_raw_write);
1188
8eaeb219
LD
1189/*
1190 * regmap_bulk_write(): Write multiple registers to the device
1191 *
1192 * @map: Register map to write to
1193 * @reg: First register to be write from
1194 * @val: Block of data to be written, in native register size for device
1195 * @val_count: Number of registers to write
1196 *
1197 * This function is intended to be used for writing a large block of
1198 * data to be device either in single transfer or multiple transfer.
1199 *
1200 * A value of zero will be returned on success, a negative errno will
1201 * be returned in error cases.
1202 */
1203int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1204 size_t val_count)
1205{
1206 int ret = 0, i;
1207 size_t val_bytes = map->format.val_bytes;
1208 void *wval;
1209
1210 if (!map->format.parse_val)
1211 return -EINVAL;
f01ee60f
SW
1212 if (reg % map->reg_stride)
1213 return -EINVAL;
8eaeb219 1214
0d4529c5 1215 map->lock(map->lock_arg);
8eaeb219
LD
1216
1217 /* No formatting is require if val_byte is 1 */
1218 if (val_bytes == 1) {
1219 wval = (void *)val;
1220 } else {
1221 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1222 if (!wval) {
1223 ret = -ENOMEM;
1224 dev_err(map->dev, "Error in memory allocation\n");
1225 goto out;
1226 }
1227 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1228 map->format.parse_val(wval + i);
1229 }
2e33caf1
AJ
1230 /*
1231 * Some devices does not support bulk write, for
1232 * them we have a series of single write operations.
1233 */
1234 if (map->use_single_rw) {
1235 for (i = 0; i < val_count; i++) {
1236 ret = regmap_raw_write(map,
0d509f2b
MB
1237 reg + (i * map->reg_stride),
1238 val + (i * val_bytes),
1239 val_bytes);
2e33caf1
AJ
1240 if (ret != 0)
1241 return ret;
1242 }
1243 } else {
0d509f2b
MB
1244 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count,
1245 false);
2e33caf1 1246 }
8eaeb219
LD
1247
1248 if (val_bytes != 1)
1249 kfree(wval);
1250
1251out:
0d4529c5 1252 map->unlock(map->lock_arg);
8eaeb219
LD
1253 return ret;
1254}
1255EXPORT_SYMBOL_GPL(regmap_bulk_write);
1256
0d509f2b
MB
1257/**
1258 * regmap_raw_write_async(): Write raw values to one or more registers
1259 * asynchronously
1260 *
1261 * @map: Register map to write to
1262 * @reg: Initial register to write to
1263 * @val: Block of data to be written, laid out for direct transmission to the
1264 * device. Must be valid until regmap_async_complete() is called.
1265 * @val_len: Length of data pointed to by val.
1266 *
1267 * This function is intended to be used for things like firmware
1268 * download where a large block of data needs to be transferred to the
1269 * device. No formatting will be done on the data provided.
1270 *
1271 * If supported by the underlying bus the write will be scheduled
1272 * asynchronously, helping maximise I/O speed on higher speed buses
1273 * like SPI. regmap_async_complete() can be called to ensure that all
1274 * asynchrnous writes have been completed.
1275 *
1276 * A value of zero will be returned on success, a negative errno will
1277 * be returned in error cases.
1278 */
1279int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1280 const void *val, size_t val_len)
1281{
1282 int ret;
1283
1284 if (val_len % map->format.val_bytes)
1285 return -EINVAL;
1286 if (reg % map->reg_stride)
1287 return -EINVAL;
1288
1289 map->lock(map->lock_arg);
1290
1291 ret = _regmap_raw_write(map, reg, val, val_len, true);
1292
1293 map->unlock(map->lock_arg);
1294
1295 return ret;
1296}
1297EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1298
b83a313b
MB
1299static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1300 unsigned int val_len)
1301{
98bc7dfd 1302 struct regmap_range_node *range;
b83a313b
MB
1303 u8 *u8 = map->work_buf;
1304 int ret;
1305
98bc7dfd
MB
1306 range = _regmap_range_lookup(map, reg);
1307 if (range) {
1308 ret = _regmap_select_page(map, &reg, range,
1309 val_len / map->format.val_bytes);
0ff3e62f 1310 if (ret != 0)
98bc7dfd
MB
1311 return ret;
1312 }
6863ca62 1313
d939fb9a 1314 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1315
1316 /*
6f306441 1317 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1318 * register addresss; since it's always the high bits for all
1319 * current formats we can do this here rather than in
1320 * formatting. This may break if we get interesting formats.
1321 */
6f306441 1322 u8[0] |= map->read_flag_mask;
b83a313b 1323
fb2736bb
MB
1324 trace_regmap_hw_read_start(map->dev, reg,
1325 val_len / map->format.val_bytes);
1326
0135bbcc 1327 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1328 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1329 val, val_len);
b83a313b 1330
fb2736bb
MB
1331 trace_regmap_hw_read_done(map->dev, reg,
1332 val_len / map->format.val_bytes);
1333
1334 return ret;
b83a313b
MB
1335}
1336
ad278406
AS
1337static int _regmap_bus_read(void *context, unsigned int reg,
1338 unsigned int *val)
1339{
1340 int ret;
1341 struct regmap *map = context;
1342
1343 if (!map->format.parse_val)
1344 return -EINVAL;
1345
1346 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1347 if (ret == 0)
1348 *val = map->format.parse_val(map->work_buf);
1349
1350 return ret;
1351}
1352
b83a313b
MB
1353static int _regmap_read(struct regmap *map, unsigned int reg,
1354 unsigned int *val)
1355{
1356 int ret;
ad278406 1357 BUG_ON(!map->reg_read);
b83a313b 1358
5d1729e7
DP
1359 if (!map->cache_bypass) {
1360 ret = regcache_read(map, reg, val);
1361 if (ret == 0)
1362 return 0;
1363 }
1364
1365 if (map->cache_only)
1366 return -EBUSY;
1367
ad278406 1368 ret = map->reg_read(map, reg, val);
fb2736bb 1369 if (ret == 0) {
1044c180
MB
1370#ifdef LOG_DEVICE
1371 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1372 dev_info(map->dev, "%x => %x\n", reg, *val);
1373#endif
1374
fb2736bb 1375 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1376
ad278406
AS
1377 if (!map->cache_bypass)
1378 regcache_write(map, reg, *val);
1379 }
f2985367 1380
b83a313b
MB
1381 return ret;
1382}
1383
1384/**
1385 * regmap_read(): Read a value from a single register
1386 *
1387 * @map: Register map to write to
1388 * @reg: Register to be read from
1389 * @val: Pointer to store read value
1390 *
1391 * A value of zero will be returned on success, a negative errno will
1392 * be returned in error cases.
1393 */
1394int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1395{
1396 int ret;
1397
f01ee60f
SW
1398 if (reg % map->reg_stride)
1399 return -EINVAL;
1400
0d4529c5 1401 map->lock(map->lock_arg);
b83a313b
MB
1402
1403 ret = _regmap_read(map, reg, val);
1404
0d4529c5 1405 map->unlock(map->lock_arg);
b83a313b
MB
1406
1407 return ret;
1408}
1409EXPORT_SYMBOL_GPL(regmap_read);
1410
1411/**
1412 * regmap_raw_read(): Read raw data from the device
1413 *
1414 * @map: Register map to write to
1415 * @reg: First register to be read from
1416 * @val: Pointer to store read value
1417 * @val_len: Size of data to read
1418 *
1419 * A value of zero will be returned on success, a negative errno will
1420 * be returned in error cases.
1421 */
1422int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1423 size_t val_len)
1424{
b8fb5ab1
MB
1425 size_t val_bytes = map->format.val_bytes;
1426 size_t val_count = val_len / val_bytes;
1427 unsigned int v;
1428 int ret, i;
04e016ad 1429
851960ba
SW
1430 if (val_len % map->format.val_bytes)
1431 return -EINVAL;
f01ee60f
SW
1432 if (reg % map->reg_stride)
1433 return -EINVAL;
851960ba 1434
0d4529c5 1435 map->lock(map->lock_arg);
b83a313b 1436
b8fb5ab1
MB
1437 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
1438 map->cache_type == REGCACHE_NONE) {
1439 /* Physical block read if there's no cache involved */
1440 ret = _regmap_raw_read(map, reg, val, val_len);
1441
1442 } else {
1443 /* Otherwise go word by word for the cache; should be low
1444 * cost as we expect to hit the cache.
1445 */
1446 for (i = 0; i < val_count; i++) {
f01ee60f
SW
1447 ret = _regmap_read(map, reg + (i * map->reg_stride),
1448 &v);
b8fb5ab1
MB
1449 if (ret != 0)
1450 goto out;
1451
d939fb9a 1452 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
1453 }
1454 }
b83a313b 1455
b8fb5ab1 1456 out:
0d4529c5 1457 map->unlock(map->lock_arg);
b83a313b
MB
1458
1459 return ret;
1460}
1461EXPORT_SYMBOL_GPL(regmap_raw_read);
1462
1463/**
1464 * regmap_bulk_read(): Read multiple registers from the device
1465 *
1466 * @map: Register map to write to
1467 * @reg: First register to be read from
1468 * @val: Pointer to store read value, in native register size for device
1469 * @val_count: Number of registers to read
1470 *
1471 * A value of zero will be returned on success, a negative errno will
1472 * be returned in error cases.
1473 */
1474int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1475 size_t val_count)
1476{
1477 int ret, i;
1478 size_t val_bytes = map->format.val_bytes;
82cd9965 1479 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 1480
b83a313b
MB
1481 if (!map->format.parse_val)
1482 return -EINVAL;
f01ee60f
SW
1483 if (reg % map->reg_stride)
1484 return -EINVAL;
b83a313b 1485
de2d808f 1486 if (vol || map->cache_type == REGCACHE_NONE) {
2e33caf1
AJ
1487 /*
1488 * Some devices does not support bulk read, for
1489 * them we have a series of single read operations.
1490 */
1491 if (map->use_single_rw) {
1492 for (i = 0; i < val_count; i++) {
1493 ret = regmap_raw_read(map,
1494 reg + (i * map->reg_stride),
1495 val + (i * val_bytes),
1496 val_bytes);
1497 if (ret != 0)
1498 return ret;
1499 }
1500 } else {
1501 ret = regmap_raw_read(map, reg, val,
1502 val_bytes * val_count);
1503 if (ret != 0)
1504 return ret;
1505 }
de2d808f
MB
1506
1507 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1508 map->format.parse_val(val + i);
1509 } else {
1510 for (i = 0; i < val_count; i++) {
6560ffd1 1511 unsigned int ival;
f01ee60f 1512 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 1513 &ival);
de2d808f
MB
1514 if (ret != 0)
1515 return ret;
6560ffd1 1516 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
1517 }
1518 }
b83a313b
MB
1519
1520 return 0;
1521}
1522EXPORT_SYMBOL_GPL(regmap_bulk_read);
1523
018690d3
MB
1524static int _regmap_update_bits(struct regmap *map, unsigned int reg,
1525 unsigned int mask, unsigned int val,
1526 bool *change)
b83a313b
MB
1527{
1528 int ret;
d91e8db2 1529 unsigned int tmp, orig;
b83a313b 1530
d91e8db2 1531 ret = _regmap_read(map, reg, &orig);
b83a313b 1532 if (ret != 0)
fc3ebd78 1533 return ret;
b83a313b 1534
d91e8db2 1535 tmp = orig & ~mask;
b83a313b
MB
1536 tmp |= val & mask;
1537
018690d3 1538 if (tmp != orig) {
d91e8db2 1539 ret = _regmap_write(map, reg, tmp);
018690d3
MB
1540 *change = true;
1541 } else {
1542 *change = false;
1543 }
b83a313b 1544
b83a313b
MB
1545 return ret;
1546}
018690d3
MB
1547
1548/**
1549 * regmap_update_bits: Perform a read/modify/write cycle on the register map
1550 *
1551 * @map: Register map to update
1552 * @reg: Register to update
1553 * @mask: Bitmask to change
1554 * @val: New value for bitmask
1555 *
1556 * Returns zero for success, a negative number on error.
1557 */
1558int regmap_update_bits(struct regmap *map, unsigned int reg,
1559 unsigned int mask, unsigned int val)
1560{
1561 bool change;
fc3ebd78
KG
1562 int ret;
1563
0d4529c5 1564 map->lock(map->lock_arg);
fc3ebd78 1565 ret = _regmap_update_bits(map, reg, mask, val, &change);
0d4529c5 1566 map->unlock(map->lock_arg);
fc3ebd78
KG
1567
1568 return ret;
018690d3 1569}
b83a313b 1570EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 1571
018690d3
MB
1572/**
1573 * regmap_update_bits_check: Perform a read/modify/write cycle on the
1574 * register map and report if updated
1575 *
1576 * @map: Register map to update
1577 * @reg: Register to update
1578 * @mask: Bitmask to change
1579 * @val: New value for bitmask
1580 * @change: Boolean indicating if a write was done
1581 *
1582 * Returns zero for success, a negative number on error.
1583 */
1584int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1585 unsigned int mask, unsigned int val,
1586 bool *change)
1587{
fc3ebd78
KG
1588 int ret;
1589
0d4529c5 1590 map->lock(map->lock_arg);
fc3ebd78 1591 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 1592 map->unlock(map->lock_arg);
fc3ebd78 1593 return ret;
018690d3
MB
1594}
1595EXPORT_SYMBOL_GPL(regmap_update_bits_check);
1596
0d509f2b
MB
1597void regmap_async_complete_cb(struct regmap_async *async, int ret)
1598{
1599 struct regmap *map = async->map;
1600 bool wake;
1601
1602 spin_lock(&map->async_lock);
1603
1604 list_del(&async->list);
1605 wake = list_empty(&map->async_list);
1606
1607 if (ret != 0)
1608 map->async_ret = ret;
1609
1610 spin_unlock(&map->async_lock);
1611
1612 schedule_work(&async->cleanup);
1613
1614 if (wake)
1615 wake_up(&map->async_waitq);
1616}
1617
1618static int regmap_async_is_done(struct regmap *map)
1619{
1620 unsigned long flags;
1621 int ret;
1622
1623 spin_lock_irqsave(&map->async_lock, flags);
1624 ret = list_empty(&map->async_list);
1625 spin_unlock_irqrestore(&map->async_lock, flags);
1626
1627 return ret;
1628}
1629
1630/**
1631 * regmap_async_complete: Ensure all asynchronous I/O has completed.
1632 *
1633 * @map: Map to operate on.
1634 *
1635 * Blocks until any pending asynchronous I/O has completed. Returns
1636 * an error code for any failed I/O operations.
1637 */
1638int regmap_async_complete(struct regmap *map)
1639{
1640 unsigned long flags;
1641 int ret;
1642
1643 /* Nothing to do with no async support */
1644 if (!map->bus->async_write)
1645 return 0;
1646
1647 wait_event(map->async_waitq, regmap_async_is_done(map));
1648
1649 spin_lock_irqsave(&map->async_lock, flags);
1650 ret = map->async_ret;
1651 map->async_ret = 0;
1652 spin_unlock_irqrestore(&map->async_lock, flags);
1653
1654 return ret;
1655}
1656
22f0d90a
MB
1657/**
1658 * regmap_register_patch: Register and apply register updates to be applied
1659 * on device initialistion
1660 *
1661 * @map: Register map to apply updates to.
1662 * @regs: Values to update.
1663 * @num_regs: Number of entries in regs.
1664 *
1665 * Register a set of register updates to be applied to the device
1666 * whenever the device registers are synchronised with the cache and
1667 * apply them immediately. Typically this is used to apply
1668 * corrections to be applied to the device defaults on startup, such
1669 * as the updates some vendors provide to undocumented registers.
1670 */
1671int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
1672 int num_regs)
1673{
1674 int i, ret;
1675 bool bypass;
1676
1677 /* If needed the implementation can be extended to support this */
1678 if (map->patch)
1679 return -EBUSY;
1680
0d4529c5 1681 map->lock(map->lock_arg);
22f0d90a
MB
1682
1683 bypass = map->cache_bypass;
1684
1685 map->cache_bypass = true;
1686
1687 /* Write out first; it's useful to apply even if we fail later. */
1688 for (i = 0; i < num_regs; i++) {
1689 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1690 if (ret != 0) {
1691 dev_err(map->dev, "Failed to write %x = %x: %d\n",
1692 regs[i].reg, regs[i].def, ret);
1693 goto out;
1694 }
1695 }
1696
2a14d7d9 1697 map->patch = kcalloc(num_regs, sizeof(struct reg_default), GFP_KERNEL);
22f0d90a
MB
1698 if (map->patch != NULL) {
1699 memcpy(map->patch, regs,
1700 num_regs * sizeof(struct reg_default));
1701 map->patch_regs = num_regs;
1702 } else {
1703 ret = -ENOMEM;
1704 }
1705
1706out:
1707 map->cache_bypass = bypass;
1708
0d4529c5 1709 map->unlock(map->lock_arg);
22f0d90a
MB
1710
1711 return ret;
1712}
1713EXPORT_SYMBOL_GPL(regmap_register_patch);
1714
eae4b51b 1715/*
a6539c32
MB
1716 * regmap_get_val_bytes(): Report the size of a register value
1717 *
1718 * Report the size of a register value, mainly intended to for use by
1719 * generic infrastructure built on top of regmap.
1720 */
1721int regmap_get_val_bytes(struct regmap *map)
1722{
1723 if (map->format.format_write)
1724 return -EINVAL;
1725
1726 return map->format.val_bytes;
1727}
1728EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
1729
31244e39
MB
1730static int __init regmap_initcall(void)
1731{
1732 regmap_debugfs_initcall();
1733
1734 return 0;
1735}
1736postcore_initcall(regmap_initcall);
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