projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 8369ae33 RM |
1 | /* |
| 2 | * Broadcom specific AMBA | |
| 3 | * ChipCommon core driver | |
| 4 | * | |
| 5 | * Copyright 2005, Broadcom Corporation | |
| 6 | * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> | |
| 7 | * | |
| 8 | * Licensed under the GNU/GPL. See COPYING for details. | |
| 9 | */ | |
| 10 | ||
| 11 | #include "bcma_private.h" | |
| 12 | #include <linux/bcma/bcma.h> | |
| 13 | ||
| 14 | static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset, | |
| 15 | u32 mask, u32 value) | |
| 16 | { | |
| 17 | value &= mask; | |
| 18 | value |= bcma_cc_read32(cc, offset) & ~mask; | |
| 19 | bcma_cc_write32(cc, offset, value); | |
| 20 | ||
| 21 | return value; | |
| 22 | } | |
| 23 | ||
| 24 | void bcma_core_chipcommon_init(struct bcma_drv_cc *cc) | |
| 25 | { | |
| 26 | if (cc->core->id.rev >= 11) | |
| 27 | cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT); | |
| 28 | cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP); | |
| 29 | if (cc->core->id.rev >= 35) | |
| 30 | cc->capabilities_ext = bcma_cc_read32(cc, BCMA_CC_CAP_EXT); | |
| 31 | ||
| 32 | bcma_cc_write32(cc, 0x58, 0); | |
| 33 | bcma_cc_write32(cc, 0x5C, 0); | |
| 34 | ||
| 35 | if (cc->capabilities & BCMA_CC_CAP_PMU) | |
| 36 | bcma_pmu_init(cc); | |
| 37 | if (cc->capabilities & BCMA_CC_CAP_PCTL) | |
| 38 | pr_err("Power control not implemented!\n"); | |
| 39 | } | |
| 40 | ||
| 41 | /* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */ | |
| 42 | void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks) | |
| 43 | { | |
| 44 | /* instant NMI */ | |
| 45 | bcma_cc_write32(cc, BCMA_CC_WATCHDOG, ticks); | |
| 46 | } | |
| 47 | ||
| 48 | void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value) | |
| 49 | { | |
| 50 | bcma_cc_write32_masked(cc, BCMA_CC_IRQMASK, mask, value); | |
| 51 | } | |
| 52 | ||
| 53 | u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask) | |
| 54 | { | |
| 55 | return bcma_cc_read32(cc, BCMA_CC_IRQSTAT) & mask; | |
| 56 | } | |
| 57 | ||
| 58 | u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask) | |
| 59 | { | |
| 60 | return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask; | |
| 61 | } | |
| 62 | ||
| 63 | u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value) | |
| 64 | { | |
| 65 | return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value); | |
| 66 | } | |
| 67 | ||
| 68 | u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value) | |
| 69 | { | |
| 70 | return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value); | |
| 71 | } | |
| 72 | ||
| 73 | u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value) | |
| 74 | { | |
| 75 | return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value); | |
| 76 | } | |
| 77 | EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control); | |
| 78 | ||
| 79 | u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value) | |
| 80 | { | |
| 81 | return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value); | |
| 82 | } | |
| 83 | ||
| 84 | u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value) | |
| 85 | { | |
| 86 | return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value); | |
| 87 | } |