Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
bd4f36d6 MM |
2 | * Disk Array driver for HP Smart Array controllers. |
3 | * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P. | |
1da177e4 LT |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
bd4f36d6 | 7 | * the Free Software Foundation; version 2 of the License. |
1da177e4 LT |
8 | * |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
bd4f36d6 MM |
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | * General Public License for more details. | |
1da177e4 LT |
13 | * |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
bd4f36d6 MM |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
17 | * 02111-1307, USA. | |
1da177e4 LT |
18 | * |
19 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/fs.h> | |
32 | #include <linux/bio.h> | |
33 | #include <linux/blkpg.h> | |
34 | #include <linux/timer.h> | |
35 | #include <linux/proc_fs.h> | |
89b6e743 | 36 | #include <linux/seq_file.h> |
7c832835 | 37 | #include <linux/init.h> |
4d761609 | 38 | #include <linux/jiffies.h> |
1da177e4 LT |
39 | #include <linux/hdreg.h> |
40 | #include <linux/spinlock.h> | |
41 | #include <linux/compat.h> | |
b368c9dd | 42 | #include <linux/mutex.h> |
1da177e4 LT |
43 | #include <asm/uaccess.h> |
44 | #include <asm/io.h> | |
45 | ||
eb0df996 | 46 | #include <linux/dma-mapping.h> |
1da177e4 LT |
47 | #include <linux/blkdev.h> |
48 | #include <linux/genhd.h> | |
49 | #include <linux/completion.h> | |
d5d3b736 | 50 | #include <scsi/scsi.h> |
03bbfee5 MMOD |
51 | #include <scsi/sg.h> |
52 | #include <scsi/scsi_ioctl.h> | |
53 | #include <linux/cdrom.h> | |
231bc2a2 | 54 | #include <linux/scatterlist.h> |
0a9279cc | 55 | #include <linux/kthread.h> |
1da177e4 LT |
56 | |
57 | #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) | |
841fdffd MM |
58 | #define DRIVER_NAME "HP CISS Driver (v 3.6.26)" |
59 | #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26) | |
1da177e4 LT |
60 | |
61 | /* Embedded module documentation macros - see modules.h */ | |
62 | MODULE_AUTHOR("Hewlett-Packard Company"); | |
24aac480 | 63 | MODULE_DESCRIPTION("Driver for HP Smart Array Controllers"); |
841fdffd MM |
64 | MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); |
65 | MODULE_VERSION("3.6.26"); | |
1da177e4 LT |
66 | MODULE_LICENSE("GPL"); |
67 | ||
2a48fc0a | 68 | static DEFINE_MUTEX(cciss_mutex); |
2ec24ff1 | 69 | |
1da177e4 LT |
70 | #include "cciss_cmd.h" |
71 | #include "cciss.h" | |
72 | #include <linux/cciss_ioctl.h> | |
73 | ||
74 | /* define the PCI info for the cards we can control */ | |
75 | static const struct pci_device_id cciss_pci_device_id[] = { | |
f82ccdb9 BH |
76 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070}, |
77 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080}, | |
78 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082}, | |
79 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083}, | |
80 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091}, | |
81 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A}, | |
82 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B}, | |
83 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C}, | |
84 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D}, | |
85 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225}, | |
86 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223}, | |
87 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234}, | |
88 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235}, | |
89 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211}, | |
90 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212}, | |
91 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213}, | |
92 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214}, | |
93 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215}, | |
de923916 | 94 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237}, |
9cff3b38 | 95 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D}, |
1da177e4 LT |
96 | {0,} |
97 | }; | |
7c832835 | 98 | |
1da177e4 LT |
99 | MODULE_DEVICE_TABLE(pci, cciss_pci_device_id); |
100 | ||
1da177e4 LT |
101 | /* board_id = Subsystem Device ID & Vendor ID |
102 | * product = Marketing Name for the board | |
7c832835 | 103 | * access = Address of the struct of function pointers |
1da177e4 LT |
104 | */ |
105 | static struct board_type products[] = { | |
49153998 MM |
106 | {0x40700E11, "Smart Array 5300", &SA5_access}, |
107 | {0x40800E11, "Smart Array 5i", &SA5B_access}, | |
108 | {0x40820E11, "Smart Array 532", &SA5B_access}, | |
109 | {0x40830E11, "Smart Array 5312", &SA5B_access}, | |
110 | {0x409A0E11, "Smart Array 641", &SA5_access}, | |
111 | {0x409B0E11, "Smart Array 642", &SA5_access}, | |
112 | {0x409C0E11, "Smart Array 6400", &SA5_access}, | |
113 | {0x409D0E11, "Smart Array 6400 EM", &SA5_access}, | |
114 | {0x40910E11, "Smart Array 6i", &SA5_access}, | |
115 | {0x3225103C, "Smart Array P600", &SA5_access}, | |
4205df34 SC |
116 | {0x3223103C, "Smart Array P800", &SA5_access}, |
117 | {0x3234103C, "Smart Array P400", &SA5_access}, | |
49153998 MM |
118 | {0x3235103C, "Smart Array P400i", &SA5_access}, |
119 | {0x3211103C, "Smart Array E200i", &SA5_access}, | |
120 | {0x3212103C, "Smart Array E200", &SA5_access}, | |
121 | {0x3213103C, "Smart Array E200i", &SA5_access}, | |
122 | {0x3214103C, "Smart Array E200i", &SA5_access}, | |
123 | {0x3215103C, "Smart Array E200i", &SA5_access}, | |
124 | {0x3237103C, "Smart Array E500", &SA5_access}, | |
2ec24ff1 SC |
125 | {0x3223103C, "Smart Array P800", &SA5_access}, |
126 | {0x3234103C, "Smart Array P400", &SA5_access}, | |
49153998 | 127 | {0x323D103C, "Smart Array P700m", &SA5_access}, |
1da177e4 LT |
128 | }; |
129 | ||
d14c4ab5 | 130 | /* How long to wait (in milliseconds) for board to go into simple mode */ |
7c832835 | 131 | #define MAX_CONFIG_WAIT 30000 |
1da177e4 LT |
132 | #define MAX_IOCTL_CONFIG_WAIT 1000 |
133 | ||
134 | /*define how many times we will try a command because of bus resets */ | |
135 | #define MAX_CMD_RETRIES 3 | |
136 | ||
1da177e4 LT |
137 | #define MAX_CTLR 32 |
138 | ||
139 | /* Originally cciss driver only supports 8 major numbers */ | |
140 | #define MAX_CTLR_ORIG 8 | |
141 | ||
1da177e4 LT |
142 | static ctlr_info_t *hba[MAX_CTLR]; |
143 | ||
b368c9dd AP |
144 | static struct task_struct *cciss_scan_thread; |
145 | static DEFINE_MUTEX(scan_mutex); | |
146 | static LIST_HEAD(scan_q); | |
147 | ||
165125e1 | 148 | static void do_cciss_request(struct request_queue *q); |
0c2b3908 MM |
149 | static irqreturn_t do_cciss_intx(int irq, void *dev_id); |
150 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id); | |
ef7822c2 | 151 | static int cciss_open(struct block_device *bdev, fmode_t mode); |
6e9624b8 | 152 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode); |
ef7822c2 | 153 | static int cciss_release(struct gendisk *disk, fmode_t mode); |
8a6cfeb6 AB |
154 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
155 | unsigned int cmd, unsigned long arg); | |
ef7822c2 | 156 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
7c832835 | 157 | unsigned int cmd, unsigned long arg); |
a885c8c4 | 158 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo); |
1da177e4 | 159 | |
1da177e4 | 160 | static int cciss_revalidate(struct gendisk *disk); |
2d11d993 | 161 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl); |
a0ea8622 | 162 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
2d11d993 | 163 | int clear_all, int via_ioctl); |
1da177e4 | 164 | |
f70dba83 | 165 | static void cciss_read_capacity(ctlr_info_t *h, int logvol, |
00988a35 | 166 | sector_t *total_size, unsigned int *block_size); |
f70dba83 | 167 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
00988a35 | 168 | sector_t *total_size, unsigned int *block_size); |
f70dba83 | 169 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
7b838bde | 170 | sector_t total_size, |
00988a35 | 171 | unsigned int block_size, InquiryData_struct *inq_buff, |
7c832835 | 172 | drive_info_struct *drv); |
dac5488a | 173 | static void __devinit cciss_interrupt_mode(ctlr_info_t *); |
7c832835 | 174 | static void start_io(ctlr_info_t *h); |
f70dba83 | 175 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
b57695fe | 176 | __u8 page_code, unsigned char scsi3addr[], |
177 | int cmd_type); | |
85cc61ae | 178 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, |
179 | int attempt_retry); | |
180 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c); | |
1da177e4 | 181 | |
d6f4965d | 182 | static int add_to_scan_list(struct ctlr_info *h); |
0a9279cc MM |
183 | static int scan_thread(void *data); |
184 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c); | |
617e1344 SC |
185 | static void cciss_hba_release(struct device *dev); |
186 | static void cciss_device_release(struct device *dev); | |
361e9b07 | 187 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index); |
9cef0d2f | 188 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index); |
29979a71 | 189 | static inline u32 next_command(ctlr_info_t *h); |
a6528d01 SC |
190 | static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, |
191 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | |
192 | u64 *cfg_offset); | |
193 | static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, | |
194 | unsigned long *memory_bar); | |
195 | ||
33079b21 | 196 | |
5e216153 MM |
197 | /* performant mode helper functions */ |
198 | static void calc_bucket_map(int *bucket, int num_buckets, int nsgs, | |
199 | int *bucket_map); | |
200 | static void cciss_put_controller_into_performant_mode(ctlr_info_t *h); | |
33079b21 | 201 | |
1da177e4 | 202 | #ifdef CONFIG_PROC_FS |
f70dba83 | 203 | static void cciss_procinit(ctlr_info_t *h); |
1da177e4 | 204 | #else |
f70dba83 | 205 | static void cciss_procinit(ctlr_info_t *h) |
7c832835 BH |
206 | { |
207 | } | |
208 | #endif /* CONFIG_PROC_FS */ | |
1da177e4 LT |
209 | |
210 | #ifdef CONFIG_COMPAT | |
ef7822c2 AV |
211 | static int cciss_compat_ioctl(struct block_device *, fmode_t, |
212 | unsigned, unsigned long); | |
1da177e4 LT |
213 | #endif |
214 | ||
83d5cde4 | 215 | static const struct block_device_operations cciss_fops = { |
7c832835 | 216 | .owner = THIS_MODULE, |
6e9624b8 | 217 | .open = cciss_unlocked_open, |
ef7822c2 | 218 | .release = cciss_release, |
8a6cfeb6 | 219 | .ioctl = do_ioctl, |
7c832835 | 220 | .getgeo = cciss_getgeo, |
1da177e4 | 221 | #ifdef CONFIG_COMPAT |
ef7822c2 | 222 | .compat_ioctl = cciss_compat_ioctl, |
1da177e4 | 223 | #endif |
7c832835 | 224 | .revalidate_disk = cciss_revalidate, |
1da177e4 LT |
225 | }; |
226 | ||
5e216153 MM |
227 | /* set_performant_mode: Modify the tag for cciss performant |
228 | * set bit 0 for pull model, bits 3-1 for block fetch | |
229 | * register number | |
230 | */ | |
231 | static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c) | |
232 | { | |
233 | if (likely(h->transMethod == CFGTBL_Trans_Performant)) | |
234 | c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); | |
235 | } | |
236 | ||
1da177e4 LT |
237 | /* |
238 | * Enqueuing and dequeuing functions for cmdlists. | |
239 | */ | |
8a3173de | 240 | static inline void addQ(struct hlist_head *list, CommandList_struct *c) |
1da177e4 | 241 | { |
8a3173de | 242 | hlist_add_head(&c->list, list); |
1da177e4 LT |
243 | } |
244 | ||
8a3173de | 245 | static inline void removeQ(CommandList_struct *c) |
1da177e4 | 246 | { |
b59e64d0 HR |
247 | /* |
248 | * After kexec/dump some commands might still | |
249 | * be in flight, which the firmware will try | |
250 | * to complete. Resetting the firmware doesn't work | |
251 | * with old fw revisions, so we have to mark | |
252 | * them off as 'stale' to prevent the driver from | |
253 | * falling over. | |
254 | */ | |
255 | if (WARN_ON(hlist_unhashed(&c->list))) { | |
256 | c->cmd_type = CMD_MSG_STALE; | |
8a3173de | 257 | return; |
b59e64d0 | 258 | } |
8a3173de JA |
259 | |
260 | hlist_del_init(&c->list); | |
1da177e4 LT |
261 | } |
262 | ||
664a717d MM |
263 | static void enqueue_cmd_and_start_io(ctlr_info_t *h, |
264 | CommandList_struct *c) | |
265 | { | |
266 | unsigned long flags; | |
5e216153 | 267 | set_performant_mode(h, c); |
664a717d MM |
268 | spin_lock_irqsave(&h->lock, flags); |
269 | addQ(&h->reqQ, c); | |
270 | h->Qdepth++; | |
2a643ec6 SC |
271 | if (h->Qdepth > h->maxQsinceinit) |
272 | h->maxQsinceinit = h->Qdepth; | |
664a717d MM |
273 | start_io(h); |
274 | spin_unlock_irqrestore(&h->lock, flags); | |
275 | } | |
276 | ||
dccc9b56 | 277 | static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list, |
49fc5601 SC |
278 | int nr_cmds) |
279 | { | |
280 | int i; | |
281 | ||
282 | if (!cmd_sg_list) | |
283 | return; | |
284 | for (i = 0; i < nr_cmds; i++) { | |
dccc9b56 SC |
285 | kfree(cmd_sg_list[i]); |
286 | cmd_sg_list[i] = NULL; | |
49fc5601 SC |
287 | } |
288 | kfree(cmd_sg_list); | |
289 | } | |
290 | ||
dccc9b56 SC |
291 | static SGDescriptor_struct **cciss_allocate_sg_chain_blocks( |
292 | ctlr_info_t *h, int chainsize, int nr_cmds) | |
49fc5601 SC |
293 | { |
294 | int j; | |
dccc9b56 | 295 | SGDescriptor_struct **cmd_sg_list; |
49fc5601 SC |
296 | |
297 | if (chainsize <= 0) | |
298 | return NULL; | |
299 | ||
300 | cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL); | |
301 | if (!cmd_sg_list) | |
302 | return NULL; | |
303 | ||
304 | /* Build up chain blocks for each command */ | |
305 | for (j = 0; j < nr_cmds; j++) { | |
49fc5601 | 306 | /* Need a block of chainsized s/g elements. */ |
dccc9b56 SC |
307 | cmd_sg_list[j] = kmalloc((chainsize * |
308 | sizeof(*cmd_sg_list[j])), GFP_KERNEL); | |
309 | if (!cmd_sg_list[j]) { | |
49fc5601 SC |
310 | dev_err(&h->pdev->dev, "Cannot get memory " |
311 | "for s/g chains.\n"); | |
312 | goto clean; | |
313 | } | |
314 | } | |
315 | return cmd_sg_list; | |
316 | clean: | |
317 | cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds); | |
318 | return NULL; | |
319 | } | |
320 | ||
d45033ef SC |
321 | static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c) |
322 | { | |
323 | SGDescriptor_struct *chain_sg; | |
324 | u64bit temp64; | |
325 | ||
326 | if (c->Header.SGTotal <= h->max_cmd_sgentries) | |
327 | return; | |
328 | ||
329 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; | |
330 | temp64.val32.lower = chain_sg->Addr.lower; | |
331 | temp64.val32.upper = chain_sg->Addr.upper; | |
332 | pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); | |
333 | } | |
334 | ||
335 | static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c, | |
336 | SGDescriptor_struct *chain_block, int len) | |
337 | { | |
338 | SGDescriptor_struct *chain_sg; | |
339 | u64bit temp64; | |
340 | ||
341 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; | |
342 | chain_sg->Ext = CCISS_SG_CHAIN; | |
343 | chain_sg->Len = len; | |
344 | temp64.val = pci_map_single(h->pdev, chain_block, len, | |
345 | PCI_DMA_TODEVICE); | |
346 | chain_sg->Addr.lower = temp64.val32.lower; | |
347 | chain_sg->Addr.upper = temp64.val32.upper; | |
348 | } | |
349 | ||
1da177e4 LT |
350 | #include "cciss_scsi.c" /* For SCSI tape support */ |
351 | ||
1e6f2dc1 AB |
352 | static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", |
353 | "UNKNOWN" | |
354 | }; | |
0e4a9d03 | 355 | #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1) |
0f5486ec | 356 | |
1da177e4 LT |
357 | #ifdef CONFIG_PROC_FS |
358 | ||
359 | /* | |
360 | * Report information about this controller. | |
361 | */ | |
362 | #define ENG_GIG 1000000000 | |
363 | #define ENG_GIG_FACTOR (ENG_GIG/512) | |
89b6e743 | 364 | #define ENGAGE_SCSI "engage scsi" |
1da177e4 LT |
365 | |
366 | static struct proc_dir_entry *proc_cciss; | |
367 | ||
89b6e743 | 368 | static void cciss_seq_show_header(struct seq_file *seq) |
1da177e4 | 369 | { |
89b6e743 MM |
370 | ctlr_info_t *h = seq->private; |
371 | ||
372 | seq_printf(seq, "%s: HP %s Controller\n" | |
373 | "Board ID: 0x%08lx\n" | |
374 | "Firmware Version: %c%c%c%c\n" | |
375 | "IRQ: %d\n" | |
376 | "Logical drives: %d\n" | |
377 | "Current Q depth: %d\n" | |
378 | "Current # commands on controller: %d\n" | |
379 | "Max Q depth since init: %d\n" | |
380 | "Max # commands on controller since init: %d\n" | |
381 | "Max SG entries since init: %d\n", | |
382 | h->devname, | |
383 | h->product_name, | |
384 | (unsigned long)h->board_id, | |
385 | h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], | |
5e216153 | 386 | h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT], |
89b6e743 MM |
387 | h->num_luns, |
388 | h->Qdepth, h->commands_outstanding, | |
389 | h->maxQsinceinit, h->max_outstanding, h->maxSG); | |
390 | ||
391 | #ifdef CONFIG_CISS_SCSI_TAPE | |
f70dba83 | 392 | cciss_seq_tape_report(seq, h); |
89b6e743 MM |
393 | #endif /* CONFIG_CISS_SCSI_TAPE */ |
394 | } | |
1da177e4 | 395 | |
89b6e743 MM |
396 | static void *cciss_seq_start(struct seq_file *seq, loff_t *pos) |
397 | { | |
398 | ctlr_info_t *h = seq->private; | |
89b6e743 | 399 | unsigned long flags; |
1da177e4 LT |
400 | |
401 | /* prevent displaying bogus info during configuration | |
402 | * or deconfiguration of a logical volume | |
403 | */ | |
f70dba83 | 404 | spin_lock_irqsave(&h->lock, flags); |
1da177e4 | 405 | if (h->busy_configuring) { |
f70dba83 | 406 | spin_unlock_irqrestore(&h->lock, flags); |
89b6e743 | 407 | return ERR_PTR(-EBUSY); |
1da177e4 LT |
408 | } |
409 | h->busy_configuring = 1; | |
f70dba83 | 410 | spin_unlock_irqrestore(&h->lock, flags); |
1da177e4 | 411 | |
89b6e743 MM |
412 | if (*pos == 0) |
413 | cciss_seq_show_header(seq); | |
414 | ||
415 | return pos; | |
416 | } | |
417 | ||
418 | static int cciss_seq_show(struct seq_file *seq, void *v) | |
419 | { | |
420 | sector_t vol_sz, vol_sz_frac; | |
421 | ctlr_info_t *h = seq->private; | |
422 | unsigned ctlr = h->ctlr; | |
423 | loff_t *pos = v; | |
9cef0d2f | 424 | drive_info_struct *drv = h->drv[*pos]; |
89b6e743 MM |
425 | |
426 | if (*pos > h->highest_lun) | |
427 | return 0; | |
428 | ||
531c2dc7 SC |
429 | if (drv == NULL) /* it's possible for h->drv[] to have holes. */ |
430 | return 0; | |
431 | ||
89b6e743 MM |
432 | if (drv->heads == 0) |
433 | return 0; | |
434 | ||
435 | vol_sz = drv->nr_blocks; | |
436 | vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR); | |
437 | vol_sz_frac *= 100; | |
438 | sector_div(vol_sz_frac, ENG_GIG_FACTOR); | |
439 | ||
fa52bec9 | 440 | if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN) |
89b6e743 MM |
441 | drv->raid_level = RAID_UNKNOWN; |
442 | seq_printf(seq, "cciss/c%dd%d:" | |
443 | "\t%4u.%02uGB\tRAID %s\n", | |
444 | ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac, | |
445 | raid_label[drv->raid_level]); | |
446 | return 0; | |
447 | } | |
448 | ||
449 | static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |
450 | { | |
451 | ctlr_info_t *h = seq->private; | |
452 | ||
453 | if (*pos > h->highest_lun) | |
454 | return NULL; | |
455 | *pos += 1; | |
456 | ||
457 | return pos; | |
458 | } | |
459 | ||
460 | static void cciss_seq_stop(struct seq_file *seq, void *v) | |
461 | { | |
462 | ctlr_info_t *h = seq->private; | |
463 | ||
464 | /* Only reset h->busy_configuring if we succeeded in setting | |
465 | * it during cciss_seq_start. */ | |
466 | if (v == ERR_PTR(-EBUSY)) | |
467 | return; | |
7c832835 | 468 | |
1da177e4 | 469 | h->busy_configuring = 0; |
1da177e4 LT |
470 | } |
471 | ||
88e9d34c | 472 | static const struct seq_operations cciss_seq_ops = { |
89b6e743 MM |
473 | .start = cciss_seq_start, |
474 | .show = cciss_seq_show, | |
475 | .next = cciss_seq_next, | |
476 | .stop = cciss_seq_stop, | |
477 | }; | |
478 | ||
479 | static int cciss_seq_open(struct inode *inode, struct file *file) | |
480 | { | |
481 | int ret = seq_open(file, &cciss_seq_ops); | |
482 | struct seq_file *seq = file->private_data; | |
483 | ||
484 | if (!ret) | |
485 | seq->private = PDE(inode)->data; | |
486 | ||
487 | return ret; | |
488 | } | |
489 | ||
490 | static ssize_t | |
491 | cciss_proc_write(struct file *file, const char __user *buf, | |
492 | size_t length, loff_t *ppos) | |
1da177e4 | 493 | { |
89b6e743 MM |
494 | int err; |
495 | char *buffer; | |
496 | ||
497 | #ifndef CONFIG_CISS_SCSI_TAPE | |
498 | return -EINVAL; | |
1da177e4 LT |
499 | #endif |
500 | ||
89b6e743 | 501 | if (!buf || length > PAGE_SIZE - 1) |
7c832835 | 502 | return -EINVAL; |
89b6e743 MM |
503 | |
504 | buffer = (char *)__get_free_page(GFP_KERNEL); | |
505 | if (!buffer) | |
506 | return -ENOMEM; | |
507 | ||
508 | err = -EFAULT; | |
509 | if (copy_from_user(buffer, buf, length)) | |
510 | goto out; | |
511 | buffer[length] = '\0'; | |
512 | ||
513 | #ifdef CONFIG_CISS_SCSI_TAPE | |
514 | if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) { | |
515 | struct seq_file *seq = file->private_data; | |
516 | ctlr_info_t *h = seq->private; | |
89b6e743 | 517 | |
f70dba83 | 518 | err = cciss_engage_scsi(h); |
8721c81f | 519 | if (err == 0) |
89b6e743 MM |
520 | err = length; |
521 | } else | |
522 | #endif /* CONFIG_CISS_SCSI_TAPE */ | |
523 | err = -EINVAL; | |
7c832835 BH |
524 | /* might be nice to have "disengage" too, but it's not |
525 | safely possible. (only 1 module use count, lock issues.) */ | |
89b6e743 MM |
526 | |
527 | out: | |
528 | free_page((unsigned long)buffer); | |
529 | return err; | |
1da177e4 LT |
530 | } |
531 | ||
828c0950 | 532 | static const struct file_operations cciss_proc_fops = { |
89b6e743 MM |
533 | .owner = THIS_MODULE, |
534 | .open = cciss_seq_open, | |
535 | .read = seq_read, | |
536 | .llseek = seq_lseek, | |
537 | .release = seq_release, | |
538 | .write = cciss_proc_write, | |
539 | }; | |
540 | ||
f70dba83 | 541 | static void __devinit cciss_procinit(ctlr_info_t *h) |
1da177e4 LT |
542 | { |
543 | struct proc_dir_entry *pde; | |
544 | ||
89b6e743 | 545 | if (proc_cciss == NULL) |
928b4d8c | 546 | proc_cciss = proc_mkdir("driver/cciss", NULL); |
89b6e743 MM |
547 | if (!proc_cciss) |
548 | return; | |
f70dba83 | 549 | pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP | |
89b6e743 | 550 | S_IROTH, proc_cciss, |
f70dba83 | 551 | &cciss_proc_fops, h); |
1da177e4 | 552 | } |
7c832835 | 553 | #endif /* CONFIG_PROC_FS */ |
1da177e4 | 554 | |
7fe06326 AP |
555 | #define MAX_PRODUCT_NAME_LEN 19 |
556 | ||
557 | #define to_hba(n) container_of(n, struct ctlr_info, dev) | |
558 | #define to_drv(n) container_of(n, drive_info_struct, dev) | |
559 | ||
d6f4965d AP |
560 | static ssize_t host_store_rescan(struct device *dev, |
561 | struct device_attribute *attr, | |
562 | const char *buf, size_t count) | |
563 | { | |
564 | struct ctlr_info *h = to_hba(dev); | |
565 | ||
566 | add_to_scan_list(h); | |
567 | wake_up_process(cciss_scan_thread); | |
568 | wait_for_completion_interruptible(&h->scan_wait); | |
569 | ||
570 | return count; | |
571 | } | |
8ba95c69 | 572 | static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); |
7fe06326 AP |
573 | |
574 | static ssize_t dev_show_unique_id(struct device *dev, | |
575 | struct device_attribute *attr, | |
576 | char *buf) | |
577 | { | |
578 | drive_info_struct *drv = to_drv(dev); | |
579 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
580 | __u8 sn[16]; | |
581 | unsigned long flags; | |
582 | int ret = 0; | |
583 | ||
f70dba83 | 584 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
585 | if (h->busy_configuring) |
586 | ret = -EBUSY; | |
587 | else | |
588 | memcpy(sn, drv->serial_no, sizeof(sn)); | |
f70dba83 | 589 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
590 | |
591 | if (ret) | |
592 | return ret; | |
593 | else | |
594 | return snprintf(buf, 16 * 2 + 2, | |
595 | "%02X%02X%02X%02X%02X%02X%02X%02X" | |
596 | "%02X%02X%02X%02X%02X%02X%02X%02X\n", | |
597 | sn[0], sn[1], sn[2], sn[3], | |
598 | sn[4], sn[5], sn[6], sn[7], | |
599 | sn[8], sn[9], sn[10], sn[11], | |
600 | sn[12], sn[13], sn[14], sn[15]); | |
601 | } | |
8ba95c69 | 602 | static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL); |
7fe06326 AP |
603 | |
604 | static ssize_t dev_show_vendor(struct device *dev, | |
605 | struct device_attribute *attr, | |
606 | char *buf) | |
607 | { | |
608 | drive_info_struct *drv = to_drv(dev); | |
609 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
610 | char vendor[VENDOR_LEN + 1]; | |
611 | unsigned long flags; | |
612 | int ret = 0; | |
613 | ||
f70dba83 | 614 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
615 | if (h->busy_configuring) |
616 | ret = -EBUSY; | |
617 | else | |
618 | memcpy(vendor, drv->vendor, VENDOR_LEN + 1); | |
f70dba83 | 619 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
620 | |
621 | if (ret) | |
622 | return ret; | |
623 | else | |
624 | return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor); | |
625 | } | |
8ba95c69 | 626 | static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL); |
7fe06326 AP |
627 | |
628 | static ssize_t dev_show_model(struct device *dev, | |
629 | struct device_attribute *attr, | |
630 | char *buf) | |
631 | { | |
632 | drive_info_struct *drv = to_drv(dev); | |
633 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
634 | char model[MODEL_LEN + 1]; | |
635 | unsigned long flags; | |
636 | int ret = 0; | |
637 | ||
f70dba83 | 638 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
639 | if (h->busy_configuring) |
640 | ret = -EBUSY; | |
641 | else | |
642 | memcpy(model, drv->model, MODEL_LEN + 1); | |
f70dba83 | 643 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
644 | |
645 | if (ret) | |
646 | return ret; | |
647 | else | |
648 | return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model); | |
649 | } | |
8ba95c69 | 650 | static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL); |
7fe06326 AP |
651 | |
652 | static ssize_t dev_show_rev(struct device *dev, | |
653 | struct device_attribute *attr, | |
654 | char *buf) | |
655 | { | |
656 | drive_info_struct *drv = to_drv(dev); | |
657 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
658 | char rev[REV_LEN + 1]; | |
659 | unsigned long flags; | |
660 | int ret = 0; | |
661 | ||
f70dba83 | 662 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
663 | if (h->busy_configuring) |
664 | ret = -EBUSY; | |
665 | else | |
666 | memcpy(rev, drv->rev, REV_LEN + 1); | |
f70dba83 | 667 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
668 | |
669 | if (ret) | |
670 | return ret; | |
671 | else | |
672 | return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev); | |
673 | } | |
8ba95c69 | 674 | static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL); |
7fe06326 | 675 | |
ce84a8ae SC |
676 | static ssize_t cciss_show_lunid(struct device *dev, |
677 | struct device_attribute *attr, char *buf) | |
678 | { | |
9cef0d2f SC |
679 | drive_info_struct *drv = to_drv(dev); |
680 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
ce84a8ae SC |
681 | unsigned long flags; |
682 | unsigned char lunid[8]; | |
683 | ||
f70dba83 | 684 | spin_lock_irqsave(&h->lock, flags); |
ce84a8ae | 685 | if (h->busy_configuring) { |
f70dba83 | 686 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
687 | return -EBUSY; |
688 | } | |
689 | if (!drv->heads) { | |
f70dba83 | 690 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
691 | return -ENOTTY; |
692 | } | |
693 | memcpy(lunid, drv->LunID, sizeof(lunid)); | |
f70dba83 | 694 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
695 | return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", |
696 | lunid[0], lunid[1], lunid[2], lunid[3], | |
697 | lunid[4], lunid[5], lunid[6], lunid[7]); | |
698 | } | |
8ba95c69 | 699 | static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL); |
ce84a8ae | 700 | |
3ff1111d SC |
701 | static ssize_t cciss_show_raid_level(struct device *dev, |
702 | struct device_attribute *attr, char *buf) | |
703 | { | |
9cef0d2f SC |
704 | drive_info_struct *drv = to_drv(dev); |
705 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
3ff1111d SC |
706 | int raid; |
707 | unsigned long flags; | |
708 | ||
f70dba83 | 709 | spin_lock_irqsave(&h->lock, flags); |
3ff1111d | 710 | if (h->busy_configuring) { |
f70dba83 | 711 | spin_unlock_irqrestore(&h->lock, flags); |
3ff1111d SC |
712 | return -EBUSY; |
713 | } | |
714 | raid = drv->raid_level; | |
f70dba83 | 715 | spin_unlock_irqrestore(&h->lock, flags); |
3ff1111d SC |
716 | if (raid < 0 || raid > RAID_UNKNOWN) |
717 | raid = RAID_UNKNOWN; | |
718 | ||
719 | return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n", | |
720 | raid_label[raid]); | |
721 | } | |
8ba95c69 | 722 | static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL); |
3ff1111d | 723 | |
e272afec SC |
724 | static ssize_t cciss_show_usage_count(struct device *dev, |
725 | struct device_attribute *attr, char *buf) | |
726 | { | |
9cef0d2f SC |
727 | drive_info_struct *drv = to_drv(dev); |
728 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
e272afec SC |
729 | unsigned long flags; |
730 | int count; | |
731 | ||
f70dba83 | 732 | spin_lock_irqsave(&h->lock, flags); |
e272afec | 733 | if (h->busy_configuring) { |
f70dba83 | 734 | spin_unlock_irqrestore(&h->lock, flags); |
e272afec SC |
735 | return -EBUSY; |
736 | } | |
737 | count = drv->usage_count; | |
f70dba83 | 738 | spin_unlock_irqrestore(&h->lock, flags); |
e272afec SC |
739 | return snprintf(buf, 20, "%d\n", count); |
740 | } | |
8ba95c69 | 741 | static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL); |
e272afec | 742 | |
d6f4965d AP |
743 | static struct attribute *cciss_host_attrs[] = { |
744 | &dev_attr_rescan.attr, | |
745 | NULL | |
746 | }; | |
747 | ||
748 | static struct attribute_group cciss_host_attr_group = { | |
749 | .attrs = cciss_host_attrs, | |
750 | }; | |
751 | ||
9f792d9f | 752 | static const struct attribute_group *cciss_host_attr_groups[] = { |
d6f4965d AP |
753 | &cciss_host_attr_group, |
754 | NULL | |
755 | }; | |
756 | ||
757 | static struct device_type cciss_host_type = { | |
758 | .name = "cciss_host", | |
759 | .groups = cciss_host_attr_groups, | |
617e1344 | 760 | .release = cciss_hba_release, |
d6f4965d AP |
761 | }; |
762 | ||
7fe06326 AP |
763 | static struct attribute *cciss_dev_attrs[] = { |
764 | &dev_attr_unique_id.attr, | |
765 | &dev_attr_model.attr, | |
766 | &dev_attr_vendor.attr, | |
767 | &dev_attr_rev.attr, | |
ce84a8ae | 768 | &dev_attr_lunid.attr, |
3ff1111d | 769 | &dev_attr_raid_level.attr, |
e272afec | 770 | &dev_attr_usage_count.attr, |
7fe06326 AP |
771 | NULL |
772 | }; | |
773 | ||
774 | static struct attribute_group cciss_dev_attr_group = { | |
775 | .attrs = cciss_dev_attrs, | |
776 | }; | |
777 | ||
a4dbd674 | 778 | static const struct attribute_group *cciss_dev_attr_groups[] = { |
7fe06326 AP |
779 | &cciss_dev_attr_group, |
780 | NULL | |
781 | }; | |
782 | ||
783 | static struct device_type cciss_dev_type = { | |
784 | .name = "cciss_device", | |
785 | .groups = cciss_dev_attr_groups, | |
617e1344 | 786 | .release = cciss_device_release, |
7fe06326 AP |
787 | }; |
788 | ||
789 | static struct bus_type cciss_bus_type = { | |
790 | .name = "cciss", | |
791 | }; | |
792 | ||
617e1344 SC |
793 | /* |
794 | * cciss_hba_release is called when the reference count | |
795 | * of h->dev goes to zero. | |
796 | */ | |
797 | static void cciss_hba_release(struct device *dev) | |
798 | { | |
799 | /* | |
800 | * nothing to do, but need this to avoid a warning | |
801 | * about not having a release handler from lib/kref.c. | |
802 | */ | |
803 | } | |
7fe06326 AP |
804 | |
805 | /* | |
806 | * Initialize sysfs entry for each controller. This sets up and registers | |
807 | * the 'cciss#' directory for each individual controller under | |
808 | * /sys/bus/pci/devices/<dev>/. | |
809 | */ | |
810 | static int cciss_create_hba_sysfs_entry(struct ctlr_info *h) | |
811 | { | |
812 | device_initialize(&h->dev); | |
813 | h->dev.type = &cciss_host_type; | |
814 | h->dev.bus = &cciss_bus_type; | |
815 | dev_set_name(&h->dev, "%s", h->devname); | |
816 | h->dev.parent = &h->pdev->dev; | |
817 | ||
818 | return device_add(&h->dev); | |
819 | } | |
820 | ||
821 | /* | |
822 | * Remove sysfs entries for an hba. | |
823 | */ | |
824 | static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h) | |
825 | { | |
826 | device_del(&h->dev); | |
617e1344 SC |
827 | put_device(&h->dev); /* final put. */ |
828 | } | |
829 | ||
830 | /* cciss_device_release is called when the reference count | |
9cef0d2f | 831 | * of h->drv[x]dev goes to zero. |
617e1344 SC |
832 | */ |
833 | static void cciss_device_release(struct device *dev) | |
834 | { | |
9cef0d2f SC |
835 | drive_info_struct *drv = to_drv(dev); |
836 | kfree(drv); | |
7fe06326 AP |
837 | } |
838 | ||
839 | /* | |
840 | * Initialize sysfs for each logical drive. This sets up and registers | |
841 | * the 'c#d#' directory for each individual logical drive under | |
842 | * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from | |
843 | * /sys/block/cciss!c#d# to this entry. | |
844 | */ | |
617e1344 | 845 | static long cciss_create_ld_sysfs_entry(struct ctlr_info *h, |
7fe06326 AP |
846 | int drv_index) |
847 | { | |
617e1344 SC |
848 | struct device *dev; |
849 | ||
9cef0d2f | 850 | if (h->drv[drv_index]->device_initialized) |
8ce51966 SC |
851 | return 0; |
852 | ||
9cef0d2f | 853 | dev = &h->drv[drv_index]->dev; |
617e1344 SC |
854 | device_initialize(dev); |
855 | dev->type = &cciss_dev_type; | |
856 | dev->bus = &cciss_bus_type; | |
857 | dev_set_name(dev, "c%dd%d", h->ctlr, drv_index); | |
858 | dev->parent = &h->dev; | |
9cef0d2f | 859 | h->drv[drv_index]->device_initialized = 1; |
617e1344 | 860 | return device_add(dev); |
7fe06326 AP |
861 | } |
862 | ||
863 | /* | |
864 | * Remove sysfs entries for a logical drive. | |
865 | */ | |
8ce51966 SC |
866 | static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index, |
867 | int ctlr_exiting) | |
7fe06326 | 868 | { |
9cef0d2f | 869 | struct device *dev = &h->drv[drv_index]->dev; |
8ce51966 SC |
870 | |
871 | /* special case for c*d0, we only destroy it on controller exit */ | |
872 | if (drv_index == 0 && !ctlr_exiting) | |
873 | return; | |
874 | ||
617e1344 SC |
875 | device_del(dev); |
876 | put_device(dev); /* the "final" put. */ | |
9cef0d2f | 877 | h->drv[drv_index] = NULL; |
7fe06326 AP |
878 | } |
879 | ||
7c832835 BH |
880 | /* |
881 | * For operations that cannot sleep, a command block is allocated at init, | |
1da177e4 | 882 | * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track |
6b4d96b8 | 883 | * which ones are free or in use. |
7c832835 | 884 | */ |
6b4d96b8 | 885 | static CommandList_struct *cmd_alloc(ctlr_info_t *h) |
1da177e4 LT |
886 | { |
887 | CommandList_struct *c; | |
7c832835 | 888 | int i; |
1da177e4 LT |
889 | u64bit temp64; |
890 | dma_addr_t cmd_dma_handle, err_dma_handle; | |
891 | ||
6b4d96b8 SC |
892 | do { |
893 | i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); | |
894 | if (i == h->nr_cmds) | |
7c832835 | 895 | return NULL; |
6b4d96b8 SC |
896 | } while (test_and_set_bit(i & (BITS_PER_LONG - 1), |
897 | h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); | |
6b4d96b8 SC |
898 | c = h->cmd_pool + i; |
899 | memset(c, 0, sizeof(CommandList_struct)); | |
900 | cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct); | |
901 | c->err_info = h->errinfo_pool + i; | |
902 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
903 | err_dma_handle = h->errinfo_pool_dhandle | |
904 | + i * sizeof(ErrorInfo_struct); | |
905 | h->nr_allocs++; | |
1da177e4 | 906 | |
6b4d96b8 | 907 | c->cmdindex = i; |
33079b21 | 908 | |
6b4d96b8 SC |
909 | INIT_HLIST_NODE(&c->list); |
910 | c->busaddr = (__u32) cmd_dma_handle; | |
911 | temp64.val = (__u64) err_dma_handle; | |
912 | c->ErrDesc.Addr.lower = temp64.val32.lower; | |
913 | c->ErrDesc.Addr.upper = temp64.val32.upper; | |
914 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); | |
7c832835 | 915 | |
6b4d96b8 SC |
916 | c->ctlr = h->ctlr; |
917 | return c; | |
918 | } | |
33079b21 | 919 | |
6b4d96b8 SC |
920 | /* allocate a command using pci_alloc_consistent, used for ioctls, |
921 | * etc., not for the main i/o path. | |
922 | */ | |
923 | static CommandList_struct *cmd_special_alloc(ctlr_info_t *h) | |
924 | { | |
925 | CommandList_struct *c; | |
926 | u64bit temp64; | |
927 | dma_addr_t cmd_dma_handle, err_dma_handle; | |
928 | ||
929 | c = (CommandList_struct *) pci_alloc_consistent(h->pdev, | |
930 | sizeof(CommandList_struct), &cmd_dma_handle); | |
931 | if (c == NULL) | |
932 | return NULL; | |
933 | memset(c, 0, sizeof(CommandList_struct)); | |
934 | ||
935 | c->cmdindex = -1; | |
936 | ||
937 | c->err_info = (ErrorInfo_struct *) | |
938 | pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct), | |
939 | &err_dma_handle); | |
940 | ||
941 | if (c->err_info == NULL) { | |
942 | pci_free_consistent(h->pdev, | |
943 | sizeof(CommandList_struct), c, cmd_dma_handle); | |
944 | return NULL; | |
7c832835 | 945 | } |
6b4d96b8 | 946 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); |
1da177e4 | 947 | |
8a3173de | 948 | INIT_HLIST_NODE(&c->list); |
1da177e4 | 949 | c->busaddr = (__u32) cmd_dma_handle; |
7c832835 | 950 | temp64.val = (__u64) err_dma_handle; |
1da177e4 LT |
951 | c->ErrDesc.Addr.lower = temp64.val32.lower; |
952 | c->ErrDesc.Addr.upper = temp64.val32.upper; | |
953 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); | |
1da177e4 | 954 | |
7c832835 BH |
955 | c->ctlr = h->ctlr; |
956 | return c; | |
1da177e4 LT |
957 | } |
958 | ||
6b4d96b8 | 959 | static void cmd_free(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 LT |
960 | { |
961 | int i; | |
6b4d96b8 SC |
962 | |
963 | i = c - h->cmd_pool; | |
964 | clear_bit(i & (BITS_PER_LONG - 1), | |
965 | h->cmd_pool_bits + (i / BITS_PER_LONG)); | |
966 | h->nr_frees++; | |
967 | } | |
968 | ||
969 | static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c) | |
970 | { | |
1da177e4 LT |
971 | u64bit temp64; |
972 | ||
6b4d96b8 SC |
973 | temp64.val32.lower = c->ErrDesc.Addr.lower; |
974 | temp64.val32.upper = c->ErrDesc.Addr.upper; | |
975 | pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct), | |
976 | c->err_info, (dma_addr_t) temp64.val); | |
977 | pci_free_consistent(h->pdev, sizeof(CommandList_struct), | |
978 | c, (dma_addr_t) c->busaddr); | |
1da177e4 LT |
979 | } |
980 | ||
981 | static inline ctlr_info_t *get_host(struct gendisk *disk) | |
982 | { | |
7c832835 | 983 | return disk->queue->queuedata; |
1da177e4 LT |
984 | } |
985 | ||
986 | static inline drive_info_struct *get_drv(struct gendisk *disk) | |
987 | { | |
988 | return disk->private_data; | |
989 | } | |
990 | ||
991 | /* | |
992 | * Open. Make sure the device is really there. | |
993 | */ | |
ef7822c2 | 994 | static int cciss_open(struct block_device *bdev, fmode_t mode) |
1da177e4 | 995 | { |
f70dba83 | 996 | ctlr_info_t *h = get_host(bdev->bd_disk); |
ef7822c2 | 997 | drive_info_struct *drv = get_drv(bdev->bd_disk); |
1da177e4 | 998 | |
b2a4a43d | 999 | dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name); |
2e043986 | 1000 | if (drv->busy_configuring) |
ddd47442 | 1001 | return -EBUSY; |
1da177e4 LT |
1002 | /* |
1003 | * Root is allowed to open raw volume zero even if it's not configured | |
1004 | * so array config can still work. Root is also allowed to open any | |
1005 | * volume that has a LUN ID, so it can issue IOCTL to reread the | |
1006 | * disk information. I don't think I really like this | |
1007 | * but I'm already using way to many device nodes to claim another one | |
1008 | * for "raw controller". | |
1009 | */ | |
7a06f789 | 1010 | if (drv->heads == 0) { |
ef7822c2 | 1011 | if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */ |
1da177e4 | 1012 | /* if not node 0 make sure it is a partition = 0 */ |
ef7822c2 | 1013 | if (MINOR(bdev->bd_dev) & 0x0f) { |
7c832835 | 1014 | return -ENXIO; |
1da177e4 | 1015 | /* if it is, make sure we have a LUN ID */ |
39ccf9a6 SC |
1016 | } else if (memcmp(drv->LunID, CTLR_LUNID, |
1017 | sizeof(drv->LunID))) { | |
1da177e4 LT |
1018 | return -ENXIO; |
1019 | } | |
1020 | } | |
1021 | if (!capable(CAP_SYS_ADMIN)) | |
1022 | return -EPERM; | |
1023 | } | |
1024 | drv->usage_count++; | |
f70dba83 | 1025 | h->usage_count++; |
1da177e4 LT |
1026 | return 0; |
1027 | } | |
7c832835 | 1028 | |
6e9624b8 AB |
1029 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode) |
1030 | { | |
1031 | int ret; | |
1032 | ||
2a48fc0a | 1033 | mutex_lock(&cciss_mutex); |
6e9624b8 | 1034 | ret = cciss_open(bdev, mode); |
2a48fc0a | 1035 | mutex_unlock(&cciss_mutex); |
6e9624b8 AB |
1036 | |
1037 | return ret; | |
1038 | } | |
1039 | ||
1da177e4 LT |
1040 | /* |
1041 | * Close. Sync first. | |
1042 | */ | |
ef7822c2 | 1043 | static int cciss_release(struct gendisk *disk, fmode_t mode) |
1da177e4 | 1044 | { |
f70dba83 | 1045 | ctlr_info_t *h; |
6e9624b8 | 1046 | drive_info_struct *drv; |
1da177e4 | 1047 | |
2a48fc0a | 1048 | mutex_lock(&cciss_mutex); |
f70dba83 | 1049 | h = get_host(disk); |
6e9624b8 | 1050 | drv = get_drv(disk); |
b2a4a43d | 1051 | dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name); |
1da177e4 | 1052 | drv->usage_count--; |
f70dba83 | 1053 | h->usage_count--; |
2a48fc0a | 1054 | mutex_unlock(&cciss_mutex); |
1da177e4 LT |
1055 | return 0; |
1056 | } | |
1057 | ||
ef7822c2 AV |
1058 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
1059 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1060 | { |
1061 | int ret; | |
2a48fc0a | 1062 | mutex_lock(&cciss_mutex); |
ef7822c2 | 1063 | ret = cciss_ioctl(bdev, mode, cmd, arg); |
2a48fc0a | 1064 | mutex_unlock(&cciss_mutex); |
1da177e4 LT |
1065 | return ret; |
1066 | } | |
1067 | ||
8a6cfeb6 AB |
1068 | #ifdef CONFIG_COMPAT |
1069 | ||
ef7822c2 AV |
1070 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1071 | unsigned cmd, unsigned long arg); | |
1072 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, | |
1073 | unsigned cmd, unsigned long arg); | |
1da177e4 | 1074 | |
ef7822c2 AV |
1075 | static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode, |
1076 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1077 | { |
1078 | switch (cmd) { | |
1079 | case CCISS_GETPCIINFO: | |
1080 | case CCISS_GETINTINFO: | |
1081 | case CCISS_SETINTINFO: | |
1082 | case CCISS_GETNODENAME: | |
1083 | case CCISS_SETNODENAME: | |
1084 | case CCISS_GETHEARTBEAT: | |
1085 | case CCISS_GETBUSTYPES: | |
1086 | case CCISS_GETFIRMVER: | |
1087 | case CCISS_GETDRIVVER: | |
1088 | case CCISS_REVALIDVOLS: | |
1089 | case CCISS_DEREGDISK: | |
1090 | case CCISS_REGNEWDISK: | |
1091 | case CCISS_REGNEWD: | |
1092 | case CCISS_RESCANDISK: | |
1093 | case CCISS_GETLUNINFO: | |
ef7822c2 | 1094 | return do_ioctl(bdev, mode, cmd, arg); |
1da177e4 LT |
1095 | |
1096 | case CCISS_PASSTHRU32: | |
ef7822c2 | 1097 | return cciss_ioctl32_passthru(bdev, mode, cmd, arg); |
1da177e4 | 1098 | case CCISS_BIG_PASSTHRU32: |
ef7822c2 | 1099 | return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg); |
1da177e4 LT |
1100 | |
1101 | default: | |
1102 | return -ENOIOCTLCMD; | |
1103 | } | |
1104 | } | |
1105 | ||
ef7822c2 AV |
1106 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1107 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1108 | { |
1109 | IOCTL32_Command_struct __user *arg32 = | |
7c832835 | 1110 | (IOCTL32_Command_struct __user *) arg; |
1da177e4 LT |
1111 | IOCTL_Command_struct arg64; |
1112 | IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); | |
1113 | int err; | |
1114 | u32 cp; | |
1115 | ||
1116 | err = 0; | |
7c832835 BH |
1117 | err |= |
1118 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | |
1119 | sizeof(arg64.LUN_info)); | |
1120 | err |= | |
1121 | copy_from_user(&arg64.Request, &arg32->Request, | |
1122 | sizeof(arg64.Request)); | |
1123 | err |= | |
1124 | copy_from_user(&arg64.error_info, &arg32->error_info, | |
1125 | sizeof(arg64.error_info)); | |
1da177e4 LT |
1126 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1127 | err |= get_user(cp, &arg32->buf); | |
1128 | arg64.buf = compat_ptr(cp); | |
1129 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | |
1130 | ||
1131 | if (err) | |
1132 | return -EFAULT; | |
1133 | ||
ef7822c2 | 1134 | err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p); |
1da177e4 LT |
1135 | if (err) |
1136 | return err; | |
7c832835 BH |
1137 | err |= |
1138 | copy_in_user(&arg32->error_info, &p->error_info, | |
1139 | sizeof(arg32->error_info)); | |
1da177e4 LT |
1140 | if (err) |
1141 | return -EFAULT; | |
1142 | return err; | |
1143 | } | |
1144 | ||
ef7822c2 AV |
1145 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, |
1146 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1147 | { |
1148 | BIG_IOCTL32_Command_struct __user *arg32 = | |
7c832835 | 1149 | (BIG_IOCTL32_Command_struct __user *) arg; |
1da177e4 | 1150 | BIG_IOCTL_Command_struct arg64; |
7c832835 BH |
1151 | BIG_IOCTL_Command_struct __user *p = |
1152 | compat_alloc_user_space(sizeof(arg64)); | |
1da177e4 LT |
1153 | int err; |
1154 | u32 cp; | |
1155 | ||
7ab5118d | 1156 | memset(&arg64, 0, sizeof(arg64)); |
1da177e4 | 1157 | err = 0; |
7c832835 BH |
1158 | err |= |
1159 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | |
1160 | sizeof(arg64.LUN_info)); | |
1161 | err |= | |
1162 | copy_from_user(&arg64.Request, &arg32->Request, | |
1163 | sizeof(arg64.Request)); | |
1164 | err |= | |
1165 | copy_from_user(&arg64.error_info, &arg32->error_info, | |
1166 | sizeof(arg64.error_info)); | |
1da177e4 LT |
1167 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1168 | err |= get_user(arg64.malloc_size, &arg32->malloc_size); | |
1169 | err |= get_user(cp, &arg32->buf); | |
1170 | arg64.buf = compat_ptr(cp); | |
1171 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | |
1172 | ||
1173 | if (err) | |
7c832835 | 1174 | return -EFAULT; |
1da177e4 | 1175 | |
ef7822c2 | 1176 | err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p); |
1da177e4 LT |
1177 | if (err) |
1178 | return err; | |
7c832835 BH |
1179 | err |= |
1180 | copy_in_user(&arg32->error_info, &p->error_info, | |
1181 | sizeof(arg32->error_info)); | |
1da177e4 LT |
1182 | if (err) |
1183 | return -EFAULT; | |
1184 | return err; | |
1185 | } | |
1186 | #endif | |
a885c8c4 CH |
1187 | |
1188 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo) | |
1189 | { | |
1190 | drive_info_struct *drv = get_drv(bdev->bd_disk); | |
1191 | ||
1192 | if (!drv->cylinders) | |
1193 | return -ENXIO; | |
1194 | ||
1195 | geo->heads = drv->heads; | |
1196 | geo->sectors = drv->sectors; | |
1197 | geo->cylinders = drv->cylinders; | |
1198 | return 0; | |
1199 | } | |
1200 | ||
f70dba83 | 1201 | static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c) |
0a9279cc MM |
1202 | { |
1203 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && | |
1204 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) | |
f70dba83 | 1205 | (void)check_for_unit_attention(h, c); |
0a9279cc | 1206 | } |
0a25a5ae SC |
1207 | |
1208 | static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp) | |
1da177e4 | 1209 | { |
0a25a5ae | 1210 | cciss_pci_info_struct pciinfo; |
1da177e4 | 1211 | |
0a25a5ae SC |
1212 | if (!argp) |
1213 | return -EINVAL; | |
1214 | pciinfo.domain = pci_domain_nr(h->pdev->bus); | |
1215 | pciinfo.bus = h->pdev->bus->number; | |
1216 | pciinfo.dev_fn = h->pdev->devfn; | |
1217 | pciinfo.board_id = h->board_id; | |
1218 | if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct))) | |
1219 | return -EFAULT; | |
1220 | return 0; | |
1221 | } | |
1da177e4 | 1222 | |
576e661c SC |
1223 | static int cciss_getintinfo(ctlr_info_t *h, void __user *argp) |
1224 | { | |
1225 | cciss_coalint_struct intinfo; | |
1da177e4 | 1226 | |
576e661c SC |
1227 | if (!argp) |
1228 | return -EINVAL; | |
1229 | intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay); | |
1230 | intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount); | |
1231 | if (copy_to_user | |
1232 | (argp, &intinfo, sizeof(cciss_coalint_struct))) | |
1233 | return -EFAULT; | |
1234 | return 0; | |
1235 | } | |
1da177e4 | 1236 | |
4c800eed SC |
1237 | static int cciss_setintinfo(ctlr_info_t *h, void __user *argp) |
1238 | { | |
1239 | cciss_coalint_struct intinfo; | |
1240 | unsigned long flags; | |
1241 | int i; | |
1da177e4 | 1242 | |
4c800eed SC |
1243 | if (!argp) |
1244 | return -EINVAL; | |
1245 | if (!capable(CAP_SYS_ADMIN)) | |
1246 | return -EPERM; | |
1247 | if (copy_from_user(&intinfo, argp, sizeof(intinfo))) | |
1248 | return -EFAULT; | |
1249 | if ((intinfo.delay == 0) && (intinfo.count == 0)) | |
1250 | return -EINVAL; | |
1251 | spin_lock_irqsave(&h->lock, flags); | |
1252 | /* Update the field, and then ring the doorbell */ | |
1253 | writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay)); | |
1254 | writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount)); | |
1255 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | |
1256 | ||
1257 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { | |
1258 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
1259 | break; | |
1260 | udelay(1000); /* delay and try again */ | |
1261 | } | |
1262 | spin_unlock_irqrestore(&h->lock, flags); | |
1263 | if (i >= MAX_IOCTL_CONFIG_WAIT) | |
1264 | return -EAGAIN; | |
1265 | return 0; | |
1266 | } | |
1da177e4 | 1267 | |
25216109 SC |
1268 | static int cciss_getnodename(ctlr_info_t *h, void __user *argp) |
1269 | { | |
1270 | NodeName_type NodeName; | |
1271 | int i; | |
1da177e4 | 1272 | |
25216109 SC |
1273 | if (!argp) |
1274 | return -EINVAL; | |
1275 | for (i = 0; i < 16; i++) | |
1276 | NodeName[i] = readb(&h->cfgtable->ServerName[i]); | |
1277 | if (copy_to_user(argp, NodeName, sizeof(NodeName_type))) | |
1278 | return -EFAULT; | |
1279 | return 0; | |
1280 | } | |
7c832835 | 1281 | |
4f43f32c SC |
1282 | static int cciss_setnodename(ctlr_info_t *h, void __user *argp) |
1283 | { | |
1284 | NodeName_type NodeName; | |
1285 | unsigned long flags; | |
1286 | int i; | |
7c832835 | 1287 | |
4f43f32c SC |
1288 | if (!argp) |
1289 | return -EINVAL; | |
1290 | if (!capable(CAP_SYS_ADMIN)) | |
1291 | return -EPERM; | |
1292 | if (copy_from_user(NodeName, argp, sizeof(NodeName_type))) | |
1293 | return -EFAULT; | |
1294 | spin_lock_irqsave(&h->lock, flags); | |
1295 | /* Update the field, and then ring the doorbell */ | |
1296 | for (i = 0; i < 16; i++) | |
1297 | writeb(NodeName[i], &h->cfgtable->ServerName[i]); | |
1298 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | |
1299 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { | |
1300 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
1301 | break; | |
1302 | udelay(1000); /* delay and try again */ | |
1303 | } | |
1304 | spin_unlock_irqrestore(&h->lock, flags); | |
1305 | if (i >= MAX_IOCTL_CONFIG_WAIT) | |
1306 | return -EAGAIN; | |
1307 | return 0; | |
1308 | } | |
7c832835 | 1309 | |
93c74931 SC |
1310 | static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp) |
1311 | { | |
1312 | Heartbeat_type heartbeat; | |
7c832835 | 1313 | |
93c74931 SC |
1314 | if (!argp) |
1315 | return -EINVAL; | |
1316 | heartbeat = readl(&h->cfgtable->HeartBeat); | |
1317 | if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type))) | |
1318 | return -EFAULT; | |
1319 | return 0; | |
1320 | } | |
0a9279cc | 1321 | |
d18dfad4 SC |
1322 | static int cciss_getbustypes(ctlr_info_t *h, void __user *argp) |
1323 | { | |
1324 | BusTypes_type BusTypes; | |
7c832835 | 1325 | |
d18dfad4 SC |
1326 | if (!argp) |
1327 | return -EINVAL; | |
1328 | BusTypes = readl(&h->cfgtable->BusTypes); | |
1329 | if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type))) | |
1330 | return -EFAULT; | |
1331 | return 0; | |
1332 | } | |
1333 | ||
8a4f7fbf SC |
1334 | static int cciss_getfirmver(ctlr_info_t *h, void __user *argp) |
1335 | { | |
1336 | FirmwareVer_type firmware; | |
1337 | ||
1338 | if (!argp) | |
1339 | return -EINVAL; | |
1340 | memcpy(firmware, h->firm_ver, 4); | |
1341 | ||
1342 | if (copy_to_user | |
1343 | (argp, firmware, sizeof(FirmwareVer_type))) | |
1344 | return -EFAULT; | |
1345 | return 0; | |
1346 | } | |
1347 | ||
c525919d SC |
1348 | static int cciss_getdrivver(ctlr_info_t *h, void __user *argp) |
1349 | { | |
1350 | DriverVer_type DriverVer = DRIVER_VERSION; | |
1351 | ||
1352 | if (!argp) | |
1353 | return -EINVAL; | |
1354 | if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) | |
1355 | return -EFAULT; | |
1356 | return 0; | |
1357 | } | |
1358 | ||
0894b32c SC |
1359 | static int cciss_getluninfo(ctlr_info_t *h, |
1360 | struct gendisk *disk, void __user *argp) | |
1361 | { | |
1362 | LogvolInfo_struct luninfo; | |
1363 | drive_info_struct *drv = get_drv(disk); | |
1364 | ||
1365 | if (!argp) | |
1366 | return -EINVAL; | |
1367 | memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID)); | |
1368 | luninfo.num_opens = drv->usage_count; | |
1369 | luninfo.num_parts = 0; | |
1370 | if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct))) | |
1371 | return -EFAULT; | |
1372 | return 0; | |
1373 | } | |
1374 | ||
f32f125b SC |
1375 | static int cciss_passthru(ctlr_info_t *h, void __user *argp) |
1376 | { | |
1377 | IOCTL_Command_struct iocommand; | |
1378 | CommandList_struct *c; | |
1379 | char *buff = NULL; | |
1380 | u64bit temp64; | |
1381 | DECLARE_COMPLETION_ONSTACK(wait); | |
1382 | ||
1383 | if (!argp) | |
1384 | return -EINVAL; | |
1385 | ||
1386 | if (!capable(CAP_SYS_RAWIO)) | |
1387 | return -EPERM; | |
1388 | ||
1389 | if (copy_from_user | |
1390 | (&iocommand, argp, sizeof(IOCTL_Command_struct))) | |
1391 | return -EFAULT; | |
1392 | if ((iocommand.buf_size < 1) && | |
1393 | (iocommand.Request.Type.Direction != XFER_NONE)) { | |
1394 | return -EINVAL; | |
1395 | } | |
1396 | if (iocommand.buf_size > 0) { | |
1397 | buff = kmalloc(iocommand.buf_size, GFP_KERNEL); | |
1398 | if (buff == NULL) | |
1399 | return -EFAULT; | |
1400 | } | |
1401 | if (iocommand.Request.Type.Direction == XFER_WRITE) { | |
1402 | /* Copy the data into the buffer we created */ | |
1403 | if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) { | |
1404 | kfree(buff); | |
1405 | return -EFAULT; | |
1406 | } | |
1407 | } else { | |
1408 | memset(buff, 0, iocommand.buf_size); | |
1409 | } | |
1410 | c = cmd_special_alloc(h); | |
1411 | if (!c) { | |
1412 | kfree(buff); | |
1413 | return -ENOMEM; | |
1414 | } | |
1415 | /* Fill in the command type */ | |
1416 | c->cmd_type = CMD_IOCTL_PEND; | |
1417 | /* Fill in Command Header */ | |
1418 | c->Header.ReplyQueue = 0; /* unused in simple mode */ | |
1419 | if (iocommand.buf_size > 0) { /* buffer to fill */ | |
1420 | c->Header.SGList = 1; | |
1421 | c->Header.SGTotal = 1; | |
1422 | } else { /* no buffers to fill */ | |
1423 | c->Header.SGList = 0; | |
1424 | c->Header.SGTotal = 0; | |
1425 | } | |
1426 | c->Header.LUN = iocommand.LUN_info; | |
1427 | /* use the kernel address the cmd block for tag */ | |
1428 | c->Header.Tag.lower = c->busaddr; | |
1429 | ||
1430 | /* Fill in Request block */ | |
1431 | c->Request = iocommand.Request; | |
1432 | ||
1433 | /* Fill in the scatter gather information */ | |
1434 | if (iocommand.buf_size > 0) { | |
1435 | temp64.val = pci_map_single(h->pdev, buff, | |
1436 | iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); | |
1437 | c->SG[0].Addr.lower = temp64.val32.lower; | |
1438 | c->SG[0].Addr.upper = temp64.val32.upper; | |
1439 | c->SG[0].Len = iocommand.buf_size; | |
1440 | c->SG[0].Ext = 0; /* we are not chaining */ | |
1441 | } | |
1442 | c->waiting = &wait; | |
1443 | ||
1444 | enqueue_cmd_and_start_io(h, c); | |
1445 | wait_for_completion(&wait); | |
1446 | ||
1447 | /* unlock the buffers from DMA */ | |
1448 | temp64.val32.lower = c->SG[0].Addr.lower; | |
1449 | temp64.val32.upper = c->SG[0].Addr.upper; | |
1450 | pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size, | |
1451 | PCI_DMA_BIDIRECTIONAL); | |
1452 | check_ioctl_unit_attention(h, c); | |
1453 | ||
1454 | /* Copy the error information out */ | |
1455 | iocommand.error_info = *(c->err_info); | |
1456 | if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) { | |
1457 | kfree(buff); | |
1458 | cmd_special_free(h, c); | |
1459 | return -EFAULT; | |
1460 | } | |
1461 | ||
1462 | if (iocommand.Request.Type.Direction == XFER_READ) { | |
1463 | /* Copy the data out of the buffer we created */ | |
1464 | if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { | |
7c832835 | 1465 | kfree(buff); |
6b4d96b8 | 1466 | cmd_special_free(h, c); |
f32f125b | 1467 | return -EFAULT; |
1da177e4 | 1468 | } |
f32f125b SC |
1469 | } |
1470 | kfree(buff); | |
1471 | cmd_special_free(h, c); | |
1472 | return 0; | |
1473 | } | |
1474 | ||
0c9f5ba7 SC |
1475 | static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp) |
1476 | { | |
1477 | BIG_IOCTL_Command_struct *ioc; | |
1478 | CommandList_struct *c; | |
1479 | unsigned char **buff = NULL; | |
1480 | int *buff_size = NULL; | |
1481 | u64bit temp64; | |
1482 | BYTE sg_used = 0; | |
1483 | int status = 0; | |
1484 | int i; | |
1485 | DECLARE_COMPLETION_ONSTACK(wait); | |
1486 | __u32 left; | |
1487 | __u32 sz; | |
1488 | BYTE __user *data_ptr; | |
1489 | ||
1490 | if (!argp) | |
1491 | return -EINVAL; | |
1492 | if (!capable(CAP_SYS_RAWIO)) | |
1493 | return -EPERM; | |
1494 | ioc = (BIG_IOCTL_Command_struct *) | |
1495 | kmalloc(sizeof(*ioc), GFP_KERNEL); | |
1496 | if (!ioc) { | |
1497 | status = -ENOMEM; | |
1498 | goto cleanup1; | |
1499 | } | |
1500 | if (copy_from_user(ioc, argp, sizeof(*ioc))) { | |
1501 | status = -EFAULT; | |
1502 | goto cleanup1; | |
1503 | } | |
1504 | if ((ioc->buf_size < 1) && | |
1505 | (ioc->Request.Type.Direction != XFER_NONE)) { | |
1506 | status = -EINVAL; | |
1507 | goto cleanup1; | |
1508 | } | |
1509 | /* Check kmalloc limits using all SGs */ | |
1510 | if (ioc->malloc_size > MAX_KMALLOC_SIZE) { | |
1511 | status = -EINVAL; | |
1512 | goto cleanup1; | |
1513 | } | |
1514 | if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { | |
1515 | status = -EINVAL; | |
1516 | goto cleanup1; | |
1517 | } | |
1518 | buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); | |
1519 | if (!buff) { | |
1520 | status = -ENOMEM; | |
1521 | goto cleanup1; | |
1522 | } | |
1523 | buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); | |
1524 | if (!buff_size) { | |
1525 | status = -ENOMEM; | |
1526 | goto cleanup1; | |
1527 | } | |
1528 | left = ioc->buf_size; | |
1529 | data_ptr = ioc->buf; | |
1530 | while (left) { | |
1531 | sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; | |
1532 | buff_size[sg_used] = sz; | |
1533 | buff[sg_used] = kmalloc(sz, GFP_KERNEL); | |
1534 | if (buff[sg_used] == NULL) { | |
1535 | status = -ENOMEM; | |
1536 | goto cleanup1; | |
1537 | } | |
1538 | if (ioc->Request.Type.Direction == XFER_WRITE) { | |
1539 | if (copy_from_user(buff[sg_used], data_ptr, sz)) { | |
7c832835 BH |
1540 | status = -EFAULT; |
1541 | goto cleanup1; | |
1542 | } | |
0c9f5ba7 SC |
1543 | } else { |
1544 | memset(buff[sg_used], 0, sz); | |
1545 | } | |
1546 | left -= sz; | |
1547 | data_ptr += sz; | |
1548 | sg_used++; | |
1549 | } | |
1550 | c = cmd_special_alloc(h); | |
1551 | if (!c) { | |
1552 | status = -ENOMEM; | |
1553 | goto cleanup1; | |
1554 | } | |
1555 | c->cmd_type = CMD_IOCTL_PEND; | |
1556 | c->Header.ReplyQueue = 0; | |
fcfb5c0c SC |
1557 | c->Header.SGList = sg_used; |
1558 | c->Header.SGTotal = sg_used; | |
0c9f5ba7 SC |
1559 | c->Header.LUN = ioc->LUN_info; |
1560 | c->Header.Tag.lower = c->busaddr; | |
1561 | ||
1562 | c->Request = ioc->Request; | |
fcfb5c0c SC |
1563 | for (i = 0; i < sg_used; i++) { |
1564 | temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i], | |
0c9f5ba7 | 1565 | PCI_DMA_BIDIRECTIONAL); |
fcfb5c0c SC |
1566 | c->SG[i].Addr.lower = temp64.val32.lower; |
1567 | c->SG[i].Addr.upper = temp64.val32.upper; | |
1568 | c->SG[i].Len = buff_size[i]; | |
1569 | c->SG[i].Ext = 0; /* we are not chaining */ | |
0c9f5ba7 SC |
1570 | } |
1571 | c->waiting = &wait; | |
1572 | enqueue_cmd_and_start_io(h, c); | |
1573 | wait_for_completion(&wait); | |
1574 | /* unlock the buffers from DMA */ | |
1575 | for (i = 0; i < sg_used; i++) { | |
1576 | temp64.val32.lower = c->SG[i].Addr.lower; | |
1577 | temp64.val32.upper = c->SG[i].Addr.upper; | |
1578 | pci_unmap_single(h->pdev, | |
1579 | (dma_addr_t) temp64.val, buff_size[i], | |
1580 | PCI_DMA_BIDIRECTIONAL); | |
1581 | } | |
1582 | check_ioctl_unit_attention(h, c); | |
1583 | /* Copy the error information out */ | |
1584 | ioc->error_info = *(c->err_info); | |
1585 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { | |
1586 | cmd_special_free(h, c); | |
1587 | status = -EFAULT; | |
1588 | goto cleanup1; | |
1589 | } | |
1590 | if (ioc->Request.Type.Direction == XFER_READ) { | |
1591 | /* Copy the data out of the buffer we created */ | |
1592 | BYTE __user *ptr = ioc->buf; | |
1593 | for (i = 0; i < sg_used; i++) { | |
1594 | if (copy_to_user(ptr, buff[i], buff_size[i])) { | |
6b4d96b8 | 1595 | cmd_special_free(h, c); |
7c832835 BH |
1596 | status = -EFAULT; |
1597 | goto cleanup1; | |
1598 | } | |
0c9f5ba7 | 1599 | ptr += buff_size[i]; |
1da177e4 | 1600 | } |
0c9f5ba7 SC |
1601 | } |
1602 | cmd_special_free(h, c); | |
1603 | status = 0; | |
1604 | cleanup1: | |
1605 | if (buff) { | |
1606 | for (i = 0; i < sg_used; i++) | |
1607 | kfree(buff[i]); | |
1608 | kfree(buff); | |
1609 | } | |
1610 | kfree(buff_size); | |
1611 | kfree(ioc); | |
1612 | return status; | |
1613 | } | |
1614 | ||
ef7822c2 | 1615 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
c525919d | 1616 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1617 | { |
1da177e4 | 1618 | struct gendisk *disk = bdev->bd_disk; |
f70dba83 | 1619 | ctlr_info_t *h = get_host(disk); |
1da177e4 LT |
1620 | void __user *argp = (void __user *)arg; |
1621 | ||
b2a4a43d SC |
1622 | dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n", |
1623 | cmd, arg); | |
7c832835 | 1624 | switch (cmd) { |
1da177e4 | 1625 | case CCISS_GETPCIINFO: |
0a25a5ae | 1626 | return cciss_getpciinfo(h, argp); |
1da177e4 | 1627 | case CCISS_GETINTINFO: |
576e661c | 1628 | return cciss_getintinfo(h, argp); |
1da177e4 | 1629 | case CCISS_SETINTINFO: |
4c800eed | 1630 | return cciss_setintinfo(h, argp); |
1da177e4 | 1631 | case CCISS_GETNODENAME: |
25216109 | 1632 | return cciss_getnodename(h, argp); |
1da177e4 | 1633 | case CCISS_SETNODENAME: |
4f43f32c | 1634 | return cciss_setnodename(h, argp); |
1da177e4 | 1635 | case CCISS_GETHEARTBEAT: |
93c74931 | 1636 | return cciss_getheartbeat(h, argp); |
1da177e4 | 1637 | case CCISS_GETBUSTYPES: |
d18dfad4 | 1638 | return cciss_getbustypes(h, argp); |
1da177e4 | 1639 | case CCISS_GETFIRMVER: |
8a4f7fbf | 1640 | return cciss_getfirmver(h, argp); |
7c832835 | 1641 | case CCISS_GETDRIVVER: |
c525919d | 1642 | return cciss_getdrivver(h, argp); |
6ae5ce8e MM |
1643 | case CCISS_DEREGDISK: |
1644 | case CCISS_REGNEWD: | |
1da177e4 | 1645 | case CCISS_REVALIDVOLS: |
f70dba83 | 1646 | return rebuild_lun_table(h, 0, 1); |
0894b32c SC |
1647 | case CCISS_GETLUNINFO: |
1648 | return cciss_getluninfo(h, disk, argp); | |
1da177e4 | 1649 | case CCISS_PASSTHRU: |
f32f125b | 1650 | return cciss_passthru(h, argp); |
0c9f5ba7 SC |
1651 | case CCISS_BIG_PASSTHRU: |
1652 | return cciss_bigpassthru(h, argp); | |
03bbfee5 MMOD |
1653 | |
1654 | /* scsi_cmd_ioctl handles these, below, though some are not */ | |
1655 | /* very meaningful for cciss. SG_IO is the main one people want. */ | |
1656 | ||
1657 | case SG_GET_VERSION_NUM: | |
1658 | case SG_SET_TIMEOUT: | |
1659 | case SG_GET_TIMEOUT: | |
1660 | case SG_GET_RESERVED_SIZE: | |
1661 | case SG_SET_RESERVED_SIZE: | |
1662 | case SG_EMULATED_HOST: | |
1663 | case SG_IO: | |
1664 | case SCSI_IOCTL_SEND_COMMAND: | |
ef7822c2 | 1665 | return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp); |
03bbfee5 MMOD |
1666 | |
1667 | /* scsi_cmd_ioctl would normally handle these, below, but */ | |
1668 | /* they aren't a good fit for cciss, as CD-ROMs are */ | |
1669 | /* not supported, and we don't have any bus/target/lun */ | |
1670 | /* which we present to the kernel. */ | |
1671 | ||
1672 | case CDROM_SEND_PACKET: | |
1673 | case CDROMCLOSETRAY: | |
1674 | case CDROMEJECT: | |
1675 | case SCSI_IOCTL_GET_IDLUN: | |
1676 | case SCSI_IOCTL_GET_BUS_NUMBER: | |
1da177e4 LT |
1677 | default: |
1678 | return -ENOTTY; | |
1679 | } | |
1da177e4 LT |
1680 | } |
1681 | ||
7b30f092 JA |
1682 | static void cciss_check_queues(ctlr_info_t *h) |
1683 | { | |
1684 | int start_queue = h->next_to_run; | |
1685 | int i; | |
1686 | ||
1687 | /* check to see if we have maxed out the number of commands that can | |
1688 | * be placed on the queue. If so then exit. We do this check here | |
1689 | * in case the interrupt we serviced was from an ioctl and did not | |
1690 | * free any new commands. | |
1691 | */ | |
f880632f | 1692 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) |
7b30f092 JA |
1693 | return; |
1694 | ||
1695 | /* We have room on the queue for more commands. Now we need to queue | |
1696 | * them up. We will also keep track of the next queue to run so | |
1697 | * that every queue gets a chance to be started first. | |
1698 | */ | |
1699 | for (i = 0; i < h->highest_lun + 1; i++) { | |
1700 | int curr_queue = (start_queue + i) % (h->highest_lun + 1); | |
1701 | /* make sure the disk has been added and the drive is real | |
1702 | * because this can be called from the middle of init_one. | |
1703 | */ | |
9cef0d2f SC |
1704 | if (!h->drv[curr_queue]) |
1705 | continue; | |
1706 | if (!(h->drv[curr_queue]->queue) || | |
1707 | !(h->drv[curr_queue]->heads)) | |
7b30f092 JA |
1708 | continue; |
1709 | blk_start_queue(h->gendisk[curr_queue]->queue); | |
1710 | ||
1711 | /* check to see if we have maxed out the number of commands | |
1712 | * that can be placed on the queue. | |
1713 | */ | |
f880632f | 1714 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) { |
7b30f092 JA |
1715 | if (curr_queue == start_queue) { |
1716 | h->next_to_run = | |
1717 | (start_queue + 1) % (h->highest_lun + 1); | |
1718 | break; | |
1719 | } else { | |
1720 | h->next_to_run = curr_queue; | |
1721 | break; | |
1722 | } | |
7b30f092 JA |
1723 | } |
1724 | } | |
1725 | } | |
1726 | ||
ca1e0484 MM |
1727 | static void cciss_softirq_done(struct request *rq) |
1728 | { | |
f70dba83 SC |
1729 | CommandList_struct *c = rq->completion_data; |
1730 | ctlr_info_t *h = hba[c->ctlr]; | |
1731 | SGDescriptor_struct *curr_sg = c->SG; | |
ca1e0484 | 1732 | u64bit temp64; |
664a717d | 1733 | unsigned long flags; |
ca1e0484 | 1734 | int i, ddir; |
5c07a311 | 1735 | int sg_index = 0; |
ca1e0484 | 1736 | |
f70dba83 | 1737 | if (c->Request.Type.Direction == XFER_READ) |
ca1e0484 MM |
1738 | ddir = PCI_DMA_FROMDEVICE; |
1739 | else | |
1740 | ddir = PCI_DMA_TODEVICE; | |
1741 | ||
1742 | /* command did not need to be retried */ | |
1743 | /* unmap the DMA mapping for all the scatter gather elements */ | |
f70dba83 | 1744 | for (i = 0; i < c->Header.SGList; i++) { |
5c07a311 | 1745 | if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) { |
f70dba83 | 1746 | cciss_unmap_sg_chain_block(h, c); |
5c07a311 | 1747 | /* Point to the next block */ |
f70dba83 | 1748 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
5c07a311 DB |
1749 | sg_index = 0; |
1750 | } | |
1751 | temp64.val32.lower = curr_sg[sg_index].Addr.lower; | |
1752 | temp64.val32.upper = curr_sg[sg_index].Addr.upper; | |
1753 | pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len, | |
1754 | ddir); | |
1755 | ++sg_index; | |
ca1e0484 MM |
1756 | } |
1757 | ||
b2a4a43d | 1758 | dev_dbg(&h->pdev->dev, "Done with %p\n", rq); |
ca1e0484 | 1759 | |
c3a4d78c | 1760 | /* set the residual count for pc requests */ |
33659ebb | 1761 | if (rq->cmd_type == REQ_TYPE_BLOCK_PC) |
f70dba83 | 1762 | rq->resid_len = c->err_info->ResidualCnt; |
ac44e5b2 | 1763 | |
c3a4d78c | 1764 | blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO); |
3daeea29 | 1765 | |
ca1e0484 | 1766 | spin_lock_irqsave(&h->lock, flags); |
6b4d96b8 | 1767 | cmd_free(h, c); |
7b30f092 | 1768 | cciss_check_queues(h); |
ca1e0484 MM |
1769 | spin_unlock_irqrestore(&h->lock, flags); |
1770 | } | |
1771 | ||
39ccf9a6 SC |
1772 | static inline void log_unit_to_scsi3addr(ctlr_info_t *h, |
1773 | unsigned char scsi3addr[], uint32_t log_unit) | |
b57695fe | 1774 | { |
9cef0d2f SC |
1775 | memcpy(scsi3addr, h->drv[log_unit]->LunID, |
1776 | sizeof(h->drv[log_unit]->LunID)); | |
b57695fe | 1777 | } |
1778 | ||
7fe06326 AP |
1779 | /* This function gets the SCSI vendor, model, and revision of a logical drive |
1780 | * via the inquiry page 0. Model, vendor, and rev are set to empty strings if | |
1781 | * they cannot be read. | |
1782 | */ | |
f70dba83 | 1783 | static void cciss_get_device_descr(ctlr_info_t *h, int logvol, |
7fe06326 AP |
1784 | char *vendor, char *model, char *rev) |
1785 | { | |
1786 | int rc; | |
1787 | InquiryData_struct *inq_buf; | |
b57695fe | 1788 | unsigned char scsi3addr[8]; |
7fe06326 AP |
1789 | |
1790 | *vendor = '\0'; | |
1791 | *model = '\0'; | |
1792 | *rev = '\0'; | |
1793 | ||
1794 | inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
1795 | if (!inq_buf) | |
1796 | return; | |
1797 | ||
f70dba83 SC |
1798 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1799 | rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0, | |
7b838bde | 1800 | scsi3addr, TYPE_CMD); |
7fe06326 AP |
1801 | if (rc == IO_OK) { |
1802 | memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN); | |
1803 | vendor[VENDOR_LEN] = '\0'; | |
1804 | memcpy(model, &inq_buf->data_byte[16], MODEL_LEN); | |
1805 | model[MODEL_LEN] = '\0'; | |
1806 | memcpy(rev, &inq_buf->data_byte[32], REV_LEN); | |
1807 | rev[REV_LEN] = '\0'; | |
1808 | } | |
1809 | ||
1810 | kfree(inq_buf); | |
1811 | return; | |
1812 | } | |
1813 | ||
a72da29b MM |
1814 | /* This function gets the serial number of a logical drive via |
1815 | * inquiry page 0x83. Serial no. is 16 bytes. If the serial | |
1816 | * number cannot be had, for whatever reason, 16 bytes of 0xff | |
1817 | * are returned instead. | |
1818 | */ | |
f70dba83 | 1819 | static void cciss_get_serial_no(ctlr_info_t *h, int logvol, |
a72da29b MM |
1820 | unsigned char *serial_no, int buflen) |
1821 | { | |
1822 | #define PAGE_83_INQ_BYTES 64 | |
1823 | int rc; | |
1824 | unsigned char *buf; | |
b57695fe | 1825 | unsigned char scsi3addr[8]; |
a72da29b MM |
1826 | |
1827 | if (buflen > 16) | |
1828 | buflen = 16; | |
1829 | memset(serial_no, 0xff, buflen); | |
1830 | buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL); | |
1831 | if (!buf) | |
1832 | return; | |
1833 | memset(serial_no, 0, buflen); | |
f70dba83 SC |
1834 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1835 | rc = sendcmd_withirq(h, CISS_INQUIRY, buf, | |
7b838bde | 1836 | PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD); |
a72da29b MM |
1837 | if (rc == IO_OK) |
1838 | memcpy(serial_no, &buf[8], buflen); | |
1839 | kfree(buf); | |
1840 | return; | |
1841 | } | |
1842 | ||
617e1344 SC |
1843 | /* |
1844 | * cciss_add_disk sets up the block device queue for a logical drive | |
1845 | */ | |
1846 | static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk, | |
6ae5ce8e MM |
1847 | int drv_index) |
1848 | { | |
1849 | disk->queue = blk_init_queue(do_cciss_request, &h->lock); | |
e8074f79 SC |
1850 | if (!disk->queue) |
1851 | goto init_queue_failure; | |
6ae5ce8e MM |
1852 | sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index); |
1853 | disk->major = h->major; | |
1854 | disk->first_minor = drv_index << NWD_SHIFT; | |
1855 | disk->fops = &cciss_fops; | |
9cef0d2f SC |
1856 | if (cciss_create_ld_sysfs_entry(h, drv_index)) |
1857 | goto cleanup_queue; | |
1858 | disk->private_data = h->drv[drv_index]; | |
1859 | disk->driverfs_dev = &h->drv[drv_index]->dev; | |
6ae5ce8e MM |
1860 | |
1861 | /* Set up queue information */ | |
1862 | blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); | |
1863 | ||
1864 | /* This is a hardware imposed limit. */ | |
8a78362c | 1865 | blk_queue_max_segments(disk->queue, h->maxsgentries); |
6ae5ce8e | 1866 | |
086fa5ff | 1867 | blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors); |
6ae5ce8e MM |
1868 | |
1869 | blk_queue_softirq_done(disk->queue, cciss_softirq_done); | |
1870 | ||
1871 | disk->queue->queuedata = h; | |
1872 | ||
e1defc4f | 1873 | blk_queue_logical_block_size(disk->queue, |
9cef0d2f | 1874 | h->drv[drv_index]->block_size); |
6ae5ce8e MM |
1875 | |
1876 | /* Make sure all queue data is written out before */ | |
9cef0d2f | 1877 | /* setting h->drv[drv_index]->queue, as setting this */ |
6ae5ce8e MM |
1878 | /* allows the interrupt handler to start the queue */ |
1879 | wmb(); | |
9cef0d2f | 1880 | h->drv[drv_index]->queue = disk->queue; |
6ae5ce8e | 1881 | add_disk(disk); |
617e1344 SC |
1882 | return 0; |
1883 | ||
1884 | cleanup_queue: | |
1885 | blk_cleanup_queue(disk->queue); | |
1886 | disk->queue = NULL; | |
e8074f79 | 1887 | init_queue_failure: |
617e1344 | 1888 | return -1; |
6ae5ce8e MM |
1889 | } |
1890 | ||
ddd47442 | 1891 | /* This function will check the usage_count of the drive to be updated/added. |
a72da29b MM |
1892 | * If the usage_count is zero and it is a heretofore unknown drive, or, |
1893 | * the drive's capacity, geometry, or serial number has changed, | |
1894 | * then the drive information will be updated and the disk will be | |
1895 | * re-registered with the kernel. If these conditions don't hold, | |
1896 | * then it will be left alone for the next reboot. The exception to this | |
1897 | * is disk 0 which will always be left registered with the kernel since it | |
1898 | * is also the controller node. Any changes to disk 0 will show up on | |
1899 | * the next reboot. | |
7c832835 | 1900 | */ |
f70dba83 SC |
1901 | static void cciss_update_drive_info(ctlr_info_t *h, int drv_index, |
1902 | int first_time, int via_ioctl) | |
7c832835 | 1903 | { |
ddd47442 | 1904 | struct gendisk *disk; |
ddd47442 MM |
1905 | InquiryData_struct *inq_buff = NULL; |
1906 | unsigned int block_size; | |
00988a35 | 1907 | sector_t total_size; |
ddd47442 MM |
1908 | unsigned long flags = 0; |
1909 | int ret = 0; | |
a72da29b MM |
1910 | drive_info_struct *drvinfo; |
1911 | ||
1912 | /* Get information about the disk and modify the driver structure */ | |
1913 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
9cef0d2f | 1914 | drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL); |
a72da29b MM |
1915 | if (inq_buff == NULL || drvinfo == NULL) |
1916 | goto mem_msg; | |
1917 | ||
1918 | /* testing to see if 16-byte CDBs are already being used */ | |
1919 | if (h->cciss_read == CCISS_READ_16) { | |
f70dba83 | 1920 | cciss_read_capacity_16(h, drv_index, |
a72da29b MM |
1921 | &total_size, &block_size); |
1922 | ||
1923 | } else { | |
f70dba83 | 1924 | cciss_read_capacity(h, drv_index, &total_size, &block_size); |
a72da29b MM |
1925 | /* if read_capacity returns all F's this volume is >2TB */ |
1926 | /* in size so we switch to 16-byte CDB's for all */ | |
1927 | /* read/write ops */ | |
1928 | if (total_size == 0xFFFFFFFFULL) { | |
f70dba83 | 1929 | cciss_read_capacity_16(h, drv_index, |
a72da29b MM |
1930 | &total_size, &block_size); |
1931 | h->cciss_read = CCISS_READ_16; | |
1932 | h->cciss_write = CCISS_WRITE_16; | |
1933 | } else { | |
1934 | h->cciss_read = CCISS_READ_10; | |
1935 | h->cciss_write = CCISS_WRITE_10; | |
1936 | } | |
1937 | } | |
1938 | ||
f70dba83 | 1939 | cciss_geometry_inquiry(h, drv_index, total_size, block_size, |
a72da29b MM |
1940 | inq_buff, drvinfo); |
1941 | drvinfo->block_size = block_size; | |
1942 | drvinfo->nr_blocks = total_size + 1; | |
1943 | ||
f70dba83 | 1944 | cciss_get_device_descr(h, drv_index, drvinfo->vendor, |
7fe06326 | 1945 | drvinfo->model, drvinfo->rev); |
f70dba83 | 1946 | cciss_get_serial_no(h, drv_index, drvinfo->serial_no, |
a72da29b | 1947 | sizeof(drvinfo->serial_no)); |
9cef0d2f SC |
1948 | /* Save the lunid in case we deregister the disk, below. */ |
1949 | memcpy(drvinfo->LunID, h->drv[drv_index]->LunID, | |
1950 | sizeof(drvinfo->LunID)); | |
a72da29b MM |
1951 | |
1952 | /* Is it the same disk we already know, and nothing's changed? */ | |
9cef0d2f | 1953 | if (h->drv[drv_index]->raid_level != -1 && |
a72da29b | 1954 | ((memcmp(drvinfo->serial_no, |
9cef0d2f SC |
1955 | h->drv[drv_index]->serial_no, 16) == 0) && |
1956 | drvinfo->block_size == h->drv[drv_index]->block_size && | |
1957 | drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks && | |
1958 | drvinfo->heads == h->drv[drv_index]->heads && | |
1959 | drvinfo->sectors == h->drv[drv_index]->sectors && | |
1960 | drvinfo->cylinders == h->drv[drv_index]->cylinders)) | |
a72da29b MM |
1961 | /* The disk is unchanged, nothing to update */ |
1962 | goto freeret; | |
a72da29b | 1963 | |
6ae5ce8e MM |
1964 | /* If we get here it's not the same disk, or something's changed, |
1965 | * so we need to * deregister it, and re-register it, if it's not | |
1966 | * in use. | |
1967 | * If the disk already exists then deregister it before proceeding | |
1968 | * (unless it's the first disk (for the controller node). | |
1969 | */ | |
9cef0d2f | 1970 | if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) { |
b2a4a43d | 1971 | dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index); |
f70dba83 | 1972 | spin_lock_irqsave(&h->lock, flags); |
9cef0d2f | 1973 | h->drv[drv_index]->busy_configuring = 1; |
f70dba83 | 1974 | spin_unlock_irqrestore(&h->lock, flags); |
e14ac670 | 1975 | |
9cef0d2f | 1976 | /* deregister_disk sets h->drv[drv_index]->queue = NULL |
6ae5ce8e MM |
1977 | * which keeps the interrupt handler from starting |
1978 | * the queue. | |
1979 | */ | |
2d11d993 | 1980 | ret = deregister_disk(h, drv_index, 0, via_ioctl); |
ddd47442 MM |
1981 | } |
1982 | ||
1983 | /* If the disk is in use return */ | |
1984 | if (ret) | |
a72da29b MM |
1985 | goto freeret; |
1986 | ||
6ae5ce8e | 1987 | /* Save the new information from cciss_geometry_inquiry |
9cef0d2f SC |
1988 | * and serial number inquiry. If the disk was deregistered |
1989 | * above, then h->drv[drv_index] will be NULL. | |
6ae5ce8e | 1990 | */ |
9cef0d2f SC |
1991 | if (h->drv[drv_index] == NULL) { |
1992 | drvinfo->device_initialized = 0; | |
1993 | h->drv[drv_index] = drvinfo; | |
1994 | drvinfo = NULL; /* so it won't be freed below. */ | |
1995 | } else { | |
1996 | /* special case for cxd0 */ | |
1997 | h->drv[drv_index]->block_size = drvinfo->block_size; | |
1998 | h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks; | |
1999 | h->drv[drv_index]->heads = drvinfo->heads; | |
2000 | h->drv[drv_index]->sectors = drvinfo->sectors; | |
2001 | h->drv[drv_index]->cylinders = drvinfo->cylinders; | |
2002 | h->drv[drv_index]->raid_level = drvinfo->raid_level; | |
2003 | memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16); | |
2004 | memcpy(h->drv[drv_index]->vendor, drvinfo->vendor, | |
2005 | VENDOR_LEN + 1); | |
2006 | memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1); | |
2007 | memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1); | |
2008 | } | |
ddd47442 MM |
2009 | |
2010 | ++h->num_luns; | |
2011 | disk = h->gendisk[drv_index]; | |
9cef0d2f | 2012 | set_capacity(disk, h->drv[drv_index]->nr_blocks); |
ddd47442 | 2013 | |
6ae5ce8e MM |
2014 | /* If it's not disk 0 (drv_index != 0) |
2015 | * or if it was disk 0, but there was previously | |
2016 | * no actual corresponding configured logical drive | |
2017 | * (raid_leve == -1) then we want to update the | |
2018 | * logical drive's information. | |
2019 | */ | |
361e9b07 SC |
2020 | if (drv_index || first_time) { |
2021 | if (cciss_add_disk(h, disk, drv_index) != 0) { | |
2022 | cciss_free_gendisk(h, drv_index); | |
9cef0d2f | 2023 | cciss_free_drive_info(h, drv_index); |
b2a4a43d SC |
2024 | dev_warn(&h->pdev->dev, "could not update disk %d\n", |
2025 | drv_index); | |
361e9b07 SC |
2026 | --h->num_luns; |
2027 | } | |
2028 | } | |
ddd47442 | 2029 | |
6ae5ce8e | 2030 | freeret: |
ddd47442 | 2031 | kfree(inq_buff); |
a72da29b | 2032 | kfree(drvinfo); |
ddd47442 | 2033 | return; |
6ae5ce8e | 2034 | mem_msg: |
b2a4a43d | 2035 | dev_err(&h->pdev->dev, "out of memory\n"); |
ddd47442 MM |
2036 | goto freeret; |
2037 | } | |
2038 | ||
2039 | /* This function will find the first index of the controllers drive array | |
9cef0d2f SC |
2040 | * that has a null drv pointer and allocate the drive info struct and |
2041 | * will return that index This is where new drives will be added. | |
2042 | * If the index to be returned is greater than the highest_lun index for | |
2043 | * the controller then highest_lun is set * to this new index. | |
2044 | * If there are no available indexes or if tha allocation fails, then -1 | |
2045 | * is returned. * "controller_node" is used to know if this is a real | |
2046 | * logical drive, or just the controller node, which determines if this | |
2047 | * counts towards highest_lun. | |
7c832835 | 2048 | */ |
9cef0d2f | 2049 | static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node) |
ddd47442 MM |
2050 | { |
2051 | int i; | |
9cef0d2f | 2052 | drive_info_struct *drv; |
ddd47442 | 2053 | |
9cef0d2f | 2054 | /* Search for an empty slot for our drive info */ |
7c832835 | 2055 | for (i = 0; i < CISS_MAX_LUN; i++) { |
9cef0d2f SC |
2056 | |
2057 | /* if not cxd0 case, and it's occupied, skip it. */ | |
2058 | if (h->drv[i] && i != 0) | |
2059 | continue; | |
2060 | /* | |
2061 | * If it's cxd0 case, and drv is alloc'ed already, and a | |
2062 | * disk is configured there, skip it. | |
2063 | */ | |
2064 | if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1) | |
2065 | continue; | |
2066 | ||
2067 | /* | |
2068 | * We've found an empty slot. Update highest_lun | |
2069 | * provided this isn't just the fake cxd0 controller node. | |
2070 | */ | |
2071 | if (i > h->highest_lun && !controller_node) | |
2072 | h->highest_lun = i; | |
2073 | ||
2074 | /* If adding a real disk at cxd0, and it's already alloc'ed */ | |
2075 | if (i == 0 && h->drv[i] != NULL) | |
ddd47442 | 2076 | return i; |
9cef0d2f SC |
2077 | |
2078 | /* | |
2079 | * Found an empty slot, not already alloc'ed. Allocate it. | |
2080 | * Mark it with raid_level == -1, so we know it's new later on. | |
2081 | */ | |
2082 | drv = kzalloc(sizeof(*drv), GFP_KERNEL); | |
2083 | if (!drv) | |
2084 | return -1; | |
2085 | drv->raid_level = -1; /* so we know it's new */ | |
2086 | h->drv[i] = drv; | |
2087 | return i; | |
ddd47442 MM |
2088 | } |
2089 | return -1; | |
2090 | } | |
2091 | ||
9cef0d2f SC |
2092 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index) |
2093 | { | |
2094 | kfree(h->drv[drv_index]); | |
2095 | h->drv[drv_index] = NULL; | |
2096 | } | |
2097 | ||
361e9b07 SC |
2098 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index) |
2099 | { | |
2100 | put_disk(h->gendisk[drv_index]); | |
2101 | h->gendisk[drv_index] = NULL; | |
2102 | } | |
2103 | ||
6ae5ce8e MM |
2104 | /* cciss_add_gendisk finds a free hba[]->drv structure |
2105 | * and allocates a gendisk if needed, and sets the lunid | |
2106 | * in the drvinfo structure. It returns the index into | |
2107 | * the ->drv[] array, or -1 if none are free. | |
2108 | * is_controller_node indicates whether highest_lun should | |
2109 | * count this disk, or if it's only being added to provide | |
2110 | * a means to talk to the controller in case no logical | |
2111 | * drives have yet been configured. | |
2112 | */ | |
39ccf9a6 SC |
2113 | static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[], |
2114 | int controller_node) | |
6ae5ce8e MM |
2115 | { |
2116 | int drv_index; | |
2117 | ||
9cef0d2f | 2118 | drv_index = cciss_alloc_drive_info(h, controller_node); |
6ae5ce8e MM |
2119 | if (drv_index == -1) |
2120 | return -1; | |
8ce51966 | 2121 | |
6ae5ce8e MM |
2122 | /*Check if the gendisk needs to be allocated */ |
2123 | if (!h->gendisk[drv_index]) { | |
2124 | h->gendisk[drv_index] = | |
2125 | alloc_disk(1 << NWD_SHIFT); | |
2126 | if (!h->gendisk[drv_index]) { | |
b2a4a43d SC |
2127 | dev_err(&h->pdev->dev, |
2128 | "could not allocate a new disk %d\n", | |
2129 | drv_index); | |
9cef0d2f | 2130 | goto err_free_drive_info; |
6ae5ce8e MM |
2131 | } |
2132 | } | |
9cef0d2f SC |
2133 | memcpy(h->drv[drv_index]->LunID, lunid, |
2134 | sizeof(h->drv[drv_index]->LunID)); | |
2135 | if (cciss_create_ld_sysfs_entry(h, drv_index)) | |
7fe06326 | 2136 | goto err_free_disk; |
6ae5ce8e MM |
2137 | /* Don't need to mark this busy because nobody */ |
2138 | /* else knows about this disk yet to contend */ | |
2139 | /* for access to it. */ | |
9cef0d2f | 2140 | h->drv[drv_index]->busy_configuring = 0; |
6ae5ce8e MM |
2141 | wmb(); |
2142 | return drv_index; | |
7fe06326 AP |
2143 | |
2144 | err_free_disk: | |
361e9b07 | 2145 | cciss_free_gendisk(h, drv_index); |
9cef0d2f SC |
2146 | err_free_drive_info: |
2147 | cciss_free_drive_info(h, drv_index); | |
7fe06326 | 2148 | return -1; |
6ae5ce8e MM |
2149 | } |
2150 | ||
2151 | /* This is for the special case of a controller which | |
2152 | * has no logical drives. In this case, we still need | |
2153 | * to register a disk so the controller can be accessed | |
2154 | * by the Array Config Utility. | |
2155 | */ | |
2156 | static void cciss_add_controller_node(ctlr_info_t *h) | |
2157 | { | |
2158 | struct gendisk *disk; | |
2159 | int drv_index; | |
2160 | ||
2161 | if (h->gendisk[0] != NULL) /* already did this? Then bail. */ | |
2162 | return; | |
2163 | ||
39ccf9a6 | 2164 | drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1); |
361e9b07 SC |
2165 | if (drv_index == -1) |
2166 | goto error; | |
9cef0d2f SC |
2167 | h->drv[drv_index]->block_size = 512; |
2168 | h->drv[drv_index]->nr_blocks = 0; | |
2169 | h->drv[drv_index]->heads = 0; | |
2170 | h->drv[drv_index]->sectors = 0; | |
2171 | h->drv[drv_index]->cylinders = 0; | |
2172 | h->drv[drv_index]->raid_level = -1; | |
2173 | memset(h->drv[drv_index]->serial_no, 0, 16); | |
6ae5ce8e | 2174 | disk = h->gendisk[drv_index]; |
361e9b07 SC |
2175 | if (cciss_add_disk(h, disk, drv_index) == 0) |
2176 | return; | |
2177 | cciss_free_gendisk(h, drv_index); | |
9cef0d2f | 2178 | cciss_free_drive_info(h, drv_index); |
361e9b07 | 2179 | error: |
b2a4a43d | 2180 | dev_warn(&h->pdev->dev, "could not add disk 0.\n"); |
361e9b07 | 2181 | return; |
6ae5ce8e MM |
2182 | } |
2183 | ||
ddd47442 | 2184 | /* This function will add and remove logical drives from the Logical |
d14c4ab5 | 2185 | * drive array of the controller and maintain persistency of ordering |
ddd47442 MM |
2186 | * so that mount points are preserved until the next reboot. This allows |
2187 | * for the removal of logical drives in the middle of the drive array | |
2188 | * without a re-ordering of those drives. | |
2189 | * INPUT | |
2190 | * h = The controller to perform the operations on | |
7c832835 | 2191 | */ |
2d11d993 SC |
2192 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, |
2193 | int via_ioctl) | |
1da177e4 | 2194 | { |
ddd47442 MM |
2195 | int num_luns; |
2196 | ReportLunData_struct *ld_buff = NULL; | |
ddd47442 MM |
2197 | int return_code; |
2198 | int listlength = 0; | |
2199 | int i; | |
2200 | int drv_found; | |
2201 | int drv_index = 0; | |
39ccf9a6 | 2202 | unsigned char lunid[8] = CTLR_LUNID; |
1da177e4 | 2203 | unsigned long flags; |
ddd47442 | 2204 | |
6ae5ce8e MM |
2205 | if (!capable(CAP_SYS_RAWIO)) |
2206 | return -EPERM; | |
2207 | ||
ddd47442 | 2208 | /* Set busy_configuring flag for this operation */ |
f70dba83 | 2209 | spin_lock_irqsave(&h->lock, flags); |
7c832835 | 2210 | if (h->busy_configuring) { |
f70dba83 | 2211 | spin_unlock_irqrestore(&h->lock, flags); |
ddd47442 MM |
2212 | return -EBUSY; |
2213 | } | |
2214 | h->busy_configuring = 1; | |
f70dba83 | 2215 | spin_unlock_irqrestore(&h->lock, flags); |
ddd47442 | 2216 | |
a72da29b MM |
2217 | ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL); |
2218 | if (ld_buff == NULL) | |
2219 | goto mem_msg; | |
2220 | ||
f70dba83 | 2221 | return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff, |
b57695fe | 2222 | sizeof(ReportLunData_struct), |
2223 | 0, CTLR_LUNID, TYPE_CMD); | |
ddd47442 | 2224 | |
a72da29b MM |
2225 | if (return_code == IO_OK) |
2226 | listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength); | |
2227 | else { /* reading number of logical volumes failed */ | |
b2a4a43d SC |
2228 | dev_warn(&h->pdev->dev, |
2229 | "report logical volume command failed\n"); | |
a72da29b MM |
2230 | listlength = 0; |
2231 | goto freeret; | |
2232 | } | |
2233 | ||
2234 | num_luns = listlength / 8; /* 8 bytes per entry */ | |
2235 | if (num_luns > CISS_MAX_LUN) { | |
2236 | num_luns = CISS_MAX_LUN; | |
b2a4a43d | 2237 | dev_warn(&h->pdev->dev, "more luns configured" |
a72da29b MM |
2238 | " on controller than can be handled by" |
2239 | " this driver.\n"); | |
2240 | } | |
2241 | ||
6ae5ce8e MM |
2242 | if (num_luns == 0) |
2243 | cciss_add_controller_node(h); | |
2244 | ||
2245 | /* Compare controller drive array to driver's drive array | |
2246 | * to see if any drives are missing on the controller due | |
2247 | * to action of Array Config Utility (user deletes drive) | |
2248 | * and deregister logical drives which have disappeared. | |
2249 | */ | |
a72da29b MM |
2250 | for (i = 0; i <= h->highest_lun; i++) { |
2251 | int j; | |
2252 | drv_found = 0; | |
d8a0be6a SC |
2253 | |
2254 | /* skip holes in the array from already deleted drives */ | |
9cef0d2f | 2255 | if (h->drv[i] == NULL) |
d8a0be6a SC |
2256 | continue; |
2257 | ||
a72da29b | 2258 | for (j = 0; j < num_luns; j++) { |
39ccf9a6 | 2259 | memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid)); |
9cef0d2f | 2260 | if (memcmp(h->drv[i]->LunID, lunid, |
39ccf9a6 | 2261 | sizeof(lunid)) == 0) { |
a72da29b MM |
2262 | drv_found = 1; |
2263 | break; | |
2264 | } | |
2265 | } | |
2266 | if (!drv_found) { | |
2267 | /* Deregister it from the OS, it's gone. */ | |
f70dba83 | 2268 | spin_lock_irqsave(&h->lock, flags); |
9cef0d2f | 2269 | h->drv[i]->busy_configuring = 1; |
f70dba83 | 2270 | spin_unlock_irqrestore(&h->lock, flags); |
2d11d993 | 2271 | return_code = deregister_disk(h, i, 1, via_ioctl); |
9cef0d2f SC |
2272 | if (h->drv[i] != NULL) |
2273 | h->drv[i]->busy_configuring = 0; | |
ddd47442 | 2274 | } |
a72da29b | 2275 | } |
ddd47442 | 2276 | |
a72da29b MM |
2277 | /* Compare controller drive array to driver's drive array. |
2278 | * Check for updates in the drive information and any new drives | |
2279 | * on the controller due to ACU adding logical drives, or changing | |
2280 | * a logical drive's size, etc. Reregister any new/changed drives | |
2281 | */ | |
2282 | for (i = 0; i < num_luns; i++) { | |
2283 | int j; | |
ddd47442 | 2284 | |
a72da29b | 2285 | drv_found = 0; |
ddd47442 | 2286 | |
39ccf9a6 | 2287 | memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid)); |
a72da29b MM |
2288 | /* Find if the LUN is already in the drive array |
2289 | * of the driver. If so then update its info | |
2290 | * if not in use. If it does not exist then find | |
2291 | * the first free index and add it. | |
2292 | */ | |
2293 | for (j = 0; j <= h->highest_lun; j++) { | |
9cef0d2f SC |
2294 | if (h->drv[j] != NULL && |
2295 | memcmp(h->drv[j]->LunID, lunid, | |
2296 | sizeof(h->drv[j]->LunID)) == 0) { | |
a72da29b MM |
2297 | drv_index = j; |
2298 | drv_found = 1; | |
2299 | break; | |
ddd47442 | 2300 | } |
a72da29b | 2301 | } |
ddd47442 | 2302 | |
a72da29b MM |
2303 | /* check if the drive was found already in the array */ |
2304 | if (!drv_found) { | |
eece695f | 2305 | drv_index = cciss_add_gendisk(h, lunid, 0); |
a72da29b MM |
2306 | if (drv_index == -1) |
2307 | goto freeret; | |
a72da29b | 2308 | } |
f70dba83 | 2309 | cciss_update_drive_info(h, drv_index, first_time, via_ioctl); |
a72da29b | 2310 | } /* end for */ |
ddd47442 | 2311 | |
6ae5ce8e | 2312 | freeret: |
ddd47442 MM |
2313 | kfree(ld_buff); |
2314 | h->busy_configuring = 0; | |
2315 | /* We return -1 here to tell the ACU that we have registered/updated | |
2316 | * all of the drives that we can and to keep it from calling us | |
2317 | * additional times. | |
7c832835 | 2318 | */ |
ddd47442 | 2319 | return -1; |
6ae5ce8e | 2320 | mem_msg: |
b2a4a43d | 2321 | dev_err(&h->pdev->dev, "out of memory\n"); |
a72da29b | 2322 | h->busy_configuring = 0; |
ddd47442 MM |
2323 | goto freeret; |
2324 | } | |
2325 | ||
9ddb27b4 SC |
2326 | static void cciss_clear_drive_info(drive_info_struct *drive_info) |
2327 | { | |
2328 | /* zero out the disk size info */ | |
2329 | drive_info->nr_blocks = 0; | |
2330 | drive_info->block_size = 0; | |
2331 | drive_info->heads = 0; | |
2332 | drive_info->sectors = 0; | |
2333 | drive_info->cylinders = 0; | |
2334 | drive_info->raid_level = -1; | |
2335 | memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no)); | |
2336 | memset(drive_info->model, 0, sizeof(drive_info->model)); | |
2337 | memset(drive_info->rev, 0, sizeof(drive_info->rev)); | |
2338 | memset(drive_info->vendor, 0, sizeof(drive_info->vendor)); | |
2339 | /* | |
2340 | * don't clear the LUNID though, we need to remember which | |
2341 | * one this one is. | |
2342 | */ | |
2343 | } | |
2344 | ||
ddd47442 MM |
2345 | /* This function will deregister the disk and it's queue from the |
2346 | * kernel. It must be called with the controller lock held and the | |
2347 | * drv structures busy_configuring flag set. It's parameters are: | |
2348 | * | |
2349 | * disk = This is the disk to be deregistered | |
2350 | * drv = This is the drive_info_struct associated with the disk to be | |
2351 | * deregistered. It contains information about the disk used | |
2352 | * by the driver. | |
2353 | * clear_all = This flag determines whether or not the disk information | |
2354 | * is going to be completely cleared out and the highest_lun | |
2355 | * reset. Sometimes we want to clear out information about | |
d14c4ab5 | 2356 | * the disk in preparation for re-adding it. In this case |
ddd47442 MM |
2357 | * the highest_lun should be left unchanged and the LunID |
2358 | * should not be cleared. | |
2d11d993 SC |
2359 | * via_ioctl |
2360 | * This indicates whether we've reached this path via ioctl. | |
2361 | * This affects the maximum usage count allowed for c0d0 to be messed with. | |
2362 | * If this path is reached via ioctl(), then the max_usage_count will | |
2363 | * be 1, as the process calling ioctl() has got to have the device open. | |
2364 | * If we get here via sysfs, then the max usage count will be zero. | |
ddd47442 | 2365 | */ |
a0ea8622 | 2366 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
2d11d993 | 2367 | int clear_all, int via_ioctl) |
ddd47442 | 2368 | { |
799202cb | 2369 | int i; |
a0ea8622 SC |
2370 | struct gendisk *disk; |
2371 | drive_info_struct *drv; | |
9cef0d2f | 2372 | int recalculate_highest_lun; |
1da177e4 LT |
2373 | |
2374 | if (!capable(CAP_SYS_RAWIO)) | |
2375 | return -EPERM; | |
2376 | ||
9cef0d2f | 2377 | drv = h->drv[drv_index]; |
a0ea8622 SC |
2378 | disk = h->gendisk[drv_index]; |
2379 | ||
1da177e4 | 2380 | /* make sure logical volume is NOT is use */ |
7c832835 | 2381 | if (clear_all || (h->gendisk[0] == disk)) { |
2d11d993 | 2382 | if (drv->usage_count > via_ioctl) |
7c832835 BH |
2383 | return -EBUSY; |
2384 | } else if (drv->usage_count > 0) | |
2385 | return -EBUSY; | |
1da177e4 | 2386 | |
9cef0d2f SC |
2387 | recalculate_highest_lun = (drv == h->drv[h->highest_lun]); |
2388 | ||
ddd47442 MM |
2389 | /* invalidate the devices and deregister the disk. If it is disk |
2390 | * zero do not deregister it but just zero out it's values. This | |
2391 | * allows us to delete disk zero but keep the controller registered. | |
7c832835 BH |
2392 | */ |
2393 | if (h->gendisk[0] != disk) { | |
5a9df732 | 2394 | struct request_queue *q = disk->queue; |
097d0264 | 2395 | if (disk->flags & GENHD_FL_UP) { |
8ce51966 | 2396 | cciss_destroy_ld_sysfs_entry(h, drv_index, 0); |
5a9df732 | 2397 | del_gendisk(disk); |
5a9df732 | 2398 | } |
9cef0d2f | 2399 | if (q) |
5a9df732 | 2400 | blk_cleanup_queue(q); |
5a9df732 AB |
2401 | /* If clear_all is set then we are deleting the logical |
2402 | * drive, not just refreshing its info. For drives | |
2403 | * other than disk 0 we will call put_disk. We do not | |
2404 | * do this for disk 0 as we need it to be able to | |
2405 | * configure the controller. | |
a72da29b | 2406 | */ |
5a9df732 AB |
2407 | if (clear_all){ |
2408 | /* This isn't pretty, but we need to find the | |
2409 | * disk in our array and NULL our the pointer. | |
2410 | * This is so that we will call alloc_disk if | |
2411 | * this index is used again later. | |
a72da29b | 2412 | */ |
5a9df732 | 2413 | for (i=0; i < CISS_MAX_LUN; i++){ |
a72da29b | 2414 | if (h->gendisk[i] == disk) { |
5a9df732 AB |
2415 | h->gendisk[i] = NULL; |
2416 | break; | |
799202cb | 2417 | } |
799202cb | 2418 | } |
5a9df732 | 2419 | put_disk(disk); |
ddd47442 | 2420 | } |
799202cb MM |
2421 | } else { |
2422 | set_capacity(disk, 0); | |
9cef0d2f | 2423 | cciss_clear_drive_info(drv); |
ddd47442 MM |
2424 | } |
2425 | ||
2426 | --h->num_luns; | |
ddd47442 | 2427 | |
9cef0d2f SC |
2428 | /* if it was the last disk, find the new hightest lun */ |
2429 | if (clear_all && recalculate_highest_lun) { | |
c2d45b4d | 2430 | int newhighest = -1; |
9cef0d2f SC |
2431 | for (i = 0; i <= h->highest_lun; i++) { |
2432 | /* if the disk has size > 0, it is available */ | |
2433 | if (h->drv[i] && h->drv[i]->heads) | |
2434 | newhighest = i; | |
1da177e4 | 2435 | } |
9cef0d2f | 2436 | h->highest_lun = newhighest; |
ddd47442 | 2437 | } |
e2019b58 | 2438 | return 0; |
1da177e4 | 2439 | } |
ddd47442 | 2440 | |
f70dba83 | 2441 | static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff, |
b57695fe | 2442 | size_t size, __u8 page_code, unsigned char *scsi3addr, |
2443 | int cmd_type) | |
1da177e4 | 2444 | { |
1da177e4 LT |
2445 | u64bit buff_dma_handle; |
2446 | int status = IO_OK; | |
2447 | ||
2448 | c->cmd_type = CMD_IOCTL_PEND; | |
2449 | c->Header.ReplyQueue = 0; | |
7c832835 | 2450 | if (buff != NULL) { |
1da177e4 | 2451 | c->Header.SGList = 1; |
7c832835 | 2452 | c->Header.SGTotal = 1; |
1da177e4 LT |
2453 | } else { |
2454 | c->Header.SGList = 0; | |
7c832835 | 2455 | c->Header.SGTotal = 0; |
1da177e4 LT |
2456 | } |
2457 | c->Header.Tag.lower = c->busaddr; | |
b57695fe | 2458 | memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); |
1da177e4 LT |
2459 | |
2460 | c->Request.Type.Type = cmd_type; | |
2461 | if (cmd_type == TYPE_CMD) { | |
7c832835 BH |
2462 | switch (cmd) { |
2463 | case CISS_INQUIRY: | |
1da177e4 | 2464 | /* are we trying to read a vital product page */ |
7c832835 | 2465 | if (page_code != 0) { |
1da177e4 LT |
2466 | c->Request.CDB[1] = 0x01; |
2467 | c->Request.CDB[2] = page_code; | |
2468 | } | |
2469 | c->Request.CDBLen = 6; | |
7c832835 | 2470 | c->Request.Type.Attribute = ATTR_SIMPLE; |
1da177e4 LT |
2471 | c->Request.Type.Direction = XFER_READ; |
2472 | c->Request.Timeout = 0; | |
7c832835 BH |
2473 | c->Request.CDB[0] = CISS_INQUIRY; |
2474 | c->Request.CDB[4] = size & 0xFF; | |
2475 | break; | |
1da177e4 LT |
2476 | case CISS_REPORT_LOG: |
2477 | case CISS_REPORT_PHYS: | |
7c832835 | 2478 | /* Talking to controller so It's a physical command |
1da177e4 | 2479 | mode = 00 target = 0. Nothing to write. |
7c832835 | 2480 | */ |
1da177e4 LT |
2481 | c->Request.CDBLen = 12; |
2482 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2483 | c->Request.Type.Direction = XFER_READ; | |
2484 | c->Request.Timeout = 0; | |
2485 | c->Request.CDB[0] = cmd; | |
b028461d | 2486 | c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ |
1da177e4 LT |
2487 | c->Request.CDB[7] = (size >> 16) & 0xFF; |
2488 | c->Request.CDB[8] = (size >> 8) & 0xFF; | |
2489 | c->Request.CDB[9] = size & 0xFF; | |
2490 | break; | |
2491 | ||
2492 | case CCISS_READ_CAPACITY: | |
1da177e4 LT |
2493 | c->Request.CDBLen = 10; |
2494 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2495 | c->Request.Type.Direction = XFER_READ; | |
2496 | c->Request.Timeout = 0; | |
2497 | c->Request.CDB[0] = cmd; | |
7c832835 | 2498 | break; |
00988a35 | 2499 | case CCISS_READ_CAPACITY_16: |
00988a35 MMOD |
2500 | c->Request.CDBLen = 16; |
2501 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2502 | c->Request.Type.Direction = XFER_READ; | |
2503 | c->Request.Timeout = 0; | |
2504 | c->Request.CDB[0] = cmd; | |
2505 | c->Request.CDB[1] = 0x10; | |
2506 | c->Request.CDB[10] = (size >> 24) & 0xFF; | |
2507 | c->Request.CDB[11] = (size >> 16) & 0xFF; | |
2508 | c->Request.CDB[12] = (size >> 8) & 0xFF; | |
2509 | c->Request.CDB[13] = size & 0xFF; | |
2510 | c->Request.Timeout = 0; | |
2511 | c->Request.CDB[0] = cmd; | |
2512 | break; | |
1da177e4 LT |
2513 | case CCISS_CACHE_FLUSH: |
2514 | c->Request.CDBLen = 12; | |
2515 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2516 | c->Request.Type.Direction = XFER_WRITE; | |
2517 | c->Request.Timeout = 0; | |
2518 | c->Request.CDB[0] = BMIC_WRITE; | |
2519 | c->Request.CDB[6] = BMIC_CACHE_FLUSH; | |
7c832835 | 2520 | break; |
88f627ae | 2521 | case TEST_UNIT_READY: |
88f627ae SC |
2522 | c->Request.CDBLen = 6; |
2523 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2524 | c->Request.Type.Direction = XFER_NONE; | |
2525 | c->Request.Timeout = 0; | |
2526 | break; | |
1da177e4 | 2527 | default: |
b2a4a43d | 2528 | dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd); |
e2019b58 | 2529 | return IO_ERROR; |
1da177e4 LT |
2530 | } |
2531 | } else if (cmd_type == TYPE_MSG) { | |
2532 | switch (cmd) { | |
7c832835 | 2533 | case 0: /* ABORT message */ |
3da8b713 | 2534 | c->Request.CDBLen = 12; |
2535 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2536 | c->Request.Type.Direction = XFER_WRITE; | |
2537 | c->Request.Timeout = 0; | |
7c832835 BH |
2538 | c->Request.CDB[0] = cmd; /* abort */ |
2539 | c->Request.CDB[1] = 0; /* abort a command */ | |
3da8b713 | 2540 | /* buff contains the tag of the command to abort */ |
2541 | memcpy(&c->Request.CDB[4], buff, 8); | |
2542 | break; | |
7c832835 | 2543 | case 1: /* RESET message */ |
88f627ae | 2544 | c->Request.CDBLen = 16; |
3da8b713 | 2545 | c->Request.Type.Attribute = ATTR_SIMPLE; |
88f627ae | 2546 | c->Request.Type.Direction = XFER_NONE; |
3da8b713 | 2547 | c->Request.Timeout = 0; |
2548 | memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); | |
7c832835 | 2549 | c->Request.CDB[0] = cmd; /* reset */ |
88f627ae | 2550 | c->Request.CDB[1] = 0x03; /* reset a target */ |
00988a35 | 2551 | break; |
1da177e4 LT |
2552 | case 3: /* No-Op message */ |
2553 | c->Request.CDBLen = 1; | |
2554 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2555 | c->Request.Type.Direction = XFER_WRITE; | |
2556 | c->Request.Timeout = 0; | |
2557 | c->Request.CDB[0] = cmd; | |
2558 | break; | |
2559 | default: | |
b2a4a43d SC |
2560 | dev_warn(&h->pdev->dev, |
2561 | "unknown message type %d\n", cmd); | |
1da177e4 LT |
2562 | return IO_ERROR; |
2563 | } | |
2564 | } else { | |
b2a4a43d | 2565 | dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); |
1da177e4 LT |
2566 | return IO_ERROR; |
2567 | } | |
2568 | /* Fill in the scatter gather information */ | |
2569 | if (size > 0) { | |
2570 | buff_dma_handle.val = (__u64) pci_map_single(h->pdev, | |
7c832835 BH |
2571 | buff, size, |
2572 | PCI_DMA_BIDIRECTIONAL); | |
1da177e4 LT |
2573 | c->SG[0].Addr.lower = buff_dma_handle.val32.lower; |
2574 | c->SG[0].Addr.upper = buff_dma_handle.val32.upper; | |
2575 | c->SG[0].Len = size; | |
7c832835 | 2576 | c->SG[0].Ext = 0; /* we are not chaining */ |
1da177e4 LT |
2577 | } |
2578 | return status; | |
2579 | } | |
7c832835 | 2580 | |
3c2ab402 | 2581 | static int check_target_status(ctlr_info_t *h, CommandList_struct *c) |
2582 | { | |
2583 | switch (c->err_info->ScsiStatus) { | |
2584 | case SAM_STAT_GOOD: | |
2585 | return IO_OK; | |
2586 | case SAM_STAT_CHECK_CONDITION: | |
2587 | switch (0xf & c->err_info->SenseInfo[2]) { | |
2588 | case 0: return IO_OK; /* no sense */ | |
2589 | case 1: return IO_OK; /* recovered error */ | |
2590 | default: | |
c08fac65 SC |
2591 | if (check_for_unit_attention(h, c)) |
2592 | return IO_NEEDS_RETRY; | |
b2a4a43d | 2593 | dev_warn(&h->pdev->dev, "cmd 0x%02x " |
3c2ab402 | 2594 | "check condition, sense key = 0x%02x\n", |
b2a4a43d | 2595 | c->Request.CDB[0], c->err_info->SenseInfo[2]); |
3c2ab402 | 2596 | } |
2597 | break; | |
2598 | default: | |
b2a4a43d SC |
2599 | dev_warn(&h->pdev->dev, "cmd 0x%02x" |
2600 | "scsi status = 0x%02x\n", | |
3c2ab402 | 2601 | c->Request.CDB[0], c->err_info->ScsiStatus); |
2602 | break; | |
2603 | } | |
2604 | return IO_ERROR; | |
2605 | } | |
2606 | ||
789a424a | 2607 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 | 2608 | { |
5390cfc3 | 2609 | int return_status = IO_OK; |
7c832835 | 2610 | |
789a424a | 2611 | if (c->err_info->CommandStatus == CMD_SUCCESS) |
2612 | return IO_OK; | |
5390cfc3 | 2613 | |
2614 | switch (c->err_info->CommandStatus) { | |
2615 | case CMD_TARGET_STATUS: | |
3c2ab402 | 2616 | return_status = check_target_status(h, c); |
5390cfc3 | 2617 | break; |
2618 | case CMD_DATA_UNDERRUN: | |
2619 | case CMD_DATA_OVERRUN: | |
2620 | /* expected for inquiry and report lun commands */ | |
2621 | break; | |
2622 | case CMD_INVALID: | |
b2a4a43d | 2623 | dev_warn(&h->pdev->dev, "cmd 0x%02x is " |
5390cfc3 | 2624 | "reported invalid\n", c->Request.CDB[0]); |
2625 | return_status = IO_ERROR; | |
2626 | break; | |
2627 | case CMD_PROTOCOL_ERR: | |
b2a4a43d SC |
2628 | dev_warn(&h->pdev->dev, "cmd 0x%02x has " |
2629 | "protocol error\n", c->Request.CDB[0]); | |
5390cfc3 | 2630 | return_status = IO_ERROR; |
2631 | break; | |
2632 | case CMD_HARDWARE_ERR: | |
b2a4a43d | 2633 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
5390cfc3 | 2634 | " hardware error\n", c->Request.CDB[0]); |
2635 | return_status = IO_ERROR; | |
2636 | break; | |
2637 | case CMD_CONNECTION_LOST: | |
b2a4a43d | 2638 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
5390cfc3 | 2639 | "connection lost\n", c->Request.CDB[0]); |
2640 | return_status = IO_ERROR; | |
2641 | break; | |
2642 | case CMD_ABORTED: | |
b2a4a43d | 2643 | dev_warn(&h->pdev->dev, "cmd 0x%02x was " |
5390cfc3 | 2644 | "aborted\n", c->Request.CDB[0]); |
2645 | return_status = IO_ERROR; | |
2646 | break; | |
2647 | case CMD_ABORT_FAILED: | |
b2a4a43d | 2648 | dev_warn(&h->pdev->dev, "cmd 0x%02x reports " |
5390cfc3 | 2649 | "abort failed\n", c->Request.CDB[0]); |
2650 | return_status = IO_ERROR; | |
2651 | break; | |
2652 | case CMD_UNSOLICITED_ABORT: | |
b2a4a43d | 2653 | dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n", |
5390cfc3 | 2654 | c->Request.CDB[0]); |
789a424a | 2655 | return_status = IO_NEEDS_RETRY; |
5390cfc3 | 2656 | break; |
2657 | default: | |
b2a4a43d | 2658 | dev_warn(&h->pdev->dev, "cmd 0x%02x returned " |
5390cfc3 | 2659 | "unknown status %x\n", c->Request.CDB[0], |
2660 | c->err_info->CommandStatus); | |
2661 | return_status = IO_ERROR; | |
7c832835 | 2662 | } |
789a424a | 2663 | return return_status; |
2664 | } | |
2665 | ||
2666 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, | |
2667 | int attempt_retry) | |
2668 | { | |
2669 | DECLARE_COMPLETION_ONSTACK(wait); | |
2670 | u64bit buff_dma_handle; | |
789a424a | 2671 | int return_status = IO_OK; |
2672 | ||
2673 | resend_cmd2: | |
2674 | c->waiting = &wait; | |
664a717d | 2675 | enqueue_cmd_and_start_io(h, c); |
789a424a | 2676 | |
2677 | wait_for_completion(&wait); | |
2678 | ||
2679 | if (c->err_info->CommandStatus == 0 || !attempt_retry) | |
2680 | goto command_done; | |
2681 | ||
2682 | return_status = process_sendcmd_error(h, c); | |
2683 | ||
2684 | if (return_status == IO_NEEDS_RETRY && | |
2685 | c->retry_count < MAX_CMD_RETRIES) { | |
b2a4a43d | 2686 | dev_warn(&h->pdev->dev, "retrying 0x%02x\n", |
789a424a | 2687 | c->Request.CDB[0]); |
2688 | c->retry_count++; | |
2689 | /* erase the old error information */ | |
2690 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
2691 | return_status = IO_OK; | |
2692 | INIT_COMPLETION(wait); | |
2693 | goto resend_cmd2; | |
2694 | } | |
5390cfc3 | 2695 | |
2696 | command_done: | |
1da177e4 | 2697 | /* unlock the buffers from DMA */ |
bb2a37bf MM |
2698 | buff_dma_handle.val32.lower = c->SG[0].Addr.lower; |
2699 | buff_dma_handle.val32.upper = c->SG[0].Addr.upper; | |
7c832835 BH |
2700 | pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val, |
2701 | c->SG[0].Len, PCI_DMA_BIDIRECTIONAL); | |
5390cfc3 | 2702 | return return_status; |
2703 | } | |
2704 | ||
f70dba83 | 2705 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
b57695fe | 2706 | __u8 page_code, unsigned char scsi3addr[], |
2707 | int cmd_type) | |
5390cfc3 | 2708 | { |
5390cfc3 | 2709 | CommandList_struct *c; |
2710 | int return_status; | |
2711 | ||
6b4d96b8 | 2712 | c = cmd_special_alloc(h); |
5390cfc3 | 2713 | if (!c) |
2714 | return -ENOMEM; | |
f70dba83 | 2715 | return_status = fill_cmd(h, c, cmd, buff, size, page_code, |
b57695fe | 2716 | scsi3addr, cmd_type); |
5390cfc3 | 2717 | if (return_status == IO_OK) |
789a424a | 2718 | return_status = sendcmd_withirq_core(h, c, 1); |
2719 | ||
6b4d96b8 | 2720 | cmd_special_free(h, c); |
7c832835 | 2721 | return return_status; |
1da177e4 | 2722 | } |
7c832835 | 2723 | |
f70dba83 | 2724 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
7b838bde | 2725 | sector_t total_size, |
7c832835 BH |
2726 | unsigned int block_size, |
2727 | InquiryData_struct *inq_buff, | |
2728 | drive_info_struct *drv) | |
1da177e4 LT |
2729 | { |
2730 | int return_code; | |
00988a35 | 2731 | unsigned long t; |
b57695fe | 2732 | unsigned char scsi3addr[8]; |
00988a35 | 2733 | |
1da177e4 | 2734 | memset(inq_buff, 0, sizeof(InquiryData_struct)); |
f70dba83 SC |
2735 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2736 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, | |
7b838bde | 2737 | sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD); |
1da177e4 | 2738 | if (return_code == IO_OK) { |
7c832835 | 2739 | if (inq_buff->data_byte[8] == 0xFF) { |
b2a4a43d SC |
2740 | dev_warn(&h->pdev->dev, |
2741 | "reading geometry failed, volume " | |
7c832835 | 2742 | "does not support reading geometry\n"); |
1da177e4 | 2743 | drv->heads = 255; |
b028461d | 2744 | drv->sectors = 32; /* Sectors per track */ |
7f42d3b8 | 2745 | drv->cylinders = total_size + 1; |
89f97ad1 | 2746 | drv->raid_level = RAID_UNKNOWN; |
1da177e4 | 2747 | } else { |
1da177e4 LT |
2748 | drv->heads = inq_buff->data_byte[6]; |
2749 | drv->sectors = inq_buff->data_byte[7]; | |
2750 | drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8; | |
2751 | drv->cylinders += inq_buff->data_byte[5]; | |
2752 | drv->raid_level = inq_buff->data_byte[8]; | |
3f7705ea MW |
2753 | } |
2754 | drv->block_size = block_size; | |
97c06978 | 2755 | drv->nr_blocks = total_size + 1; |
3f7705ea MW |
2756 | t = drv->heads * drv->sectors; |
2757 | if (t > 1) { | |
97c06978 MMOD |
2758 | sector_t real_size = total_size + 1; |
2759 | unsigned long rem = sector_div(real_size, t); | |
3f7705ea | 2760 | if (rem) |
97c06978 MMOD |
2761 | real_size++; |
2762 | drv->cylinders = real_size; | |
1da177e4 | 2763 | } |
7c832835 | 2764 | } else { /* Get geometry failed */ |
b2a4a43d | 2765 | dev_warn(&h->pdev->dev, "reading geometry failed\n"); |
1da177e4 | 2766 | } |
1da177e4 | 2767 | } |
7c832835 | 2768 | |
1da177e4 | 2769 | static void |
f70dba83 | 2770 | cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size, |
7c832835 | 2771 | unsigned int *block_size) |
1da177e4 | 2772 | { |
00988a35 | 2773 | ReadCapdata_struct *buf; |
1da177e4 | 2774 | int return_code; |
b57695fe | 2775 | unsigned char scsi3addr[8]; |
1aebe187 MK |
2776 | |
2777 | buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL); | |
2778 | if (!buf) { | |
b2a4a43d | 2779 | dev_warn(&h->pdev->dev, "out of memory\n"); |
00988a35 MMOD |
2780 | return; |
2781 | } | |
1aebe187 | 2782 | |
f70dba83 SC |
2783 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2784 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf, | |
7b838bde | 2785 | sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD); |
1da177e4 | 2786 | if (return_code == IO_OK) { |
4c1f2b31 AV |
2787 | *total_size = be32_to_cpu(*(__be32 *) buf->total_size); |
2788 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); | |
7c832835 | 2789 | } else { /* read capacity command failed */ |
b2a4a43d | 2790 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
1da177e4 LT |
2791 | *total_size = 0; |
2792 | *block_size = BLOCK_SIZE; | |
2793 | } | |
00988a35 | 2794 | kfree(buf); |
00988a35 MMOD |
2795 | } |
2796 | ||
f70dba83 | 2797 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
7b838bde | 2798 | sector_t *total_size, unsigned int *block_size) |
00988a35 MMOD |
2799 | { |
2800 | ReadCapdata_struct_16 *buf; | |
2801 | int return_code; | |
b57695fe | 2802 | unsigned char scsi3addr[8]; |
1aebe187 MK |
2803 | |
2804 | buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL); | |
2805 | if (!buf) { | |
b2a4a43d | 2806 | dev_warn(&h->pdev->dev, "out of memory\n"); |
00988a35 MMOD |
2807 | return; |
2808 | } | |
1aebe187 | 2809 | |
f70dba83 SC |
2810 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2811 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16, | |
2812 | buf, sizeof(ReadCapdata_struct_16), | |
7b838bde | 2813 | 0, scsi3addr, TYPE_CMD); |
00988a35 | 2814 | if (return_code == IO_OK) { |
4c1f2b31 AV |
2815 | *total_size = be64_to_cpu(*(__be64 *) buf->total_size); |
2816 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); | |
00988a35 | 2817 | } else { /* read capacity command failed */ |
b2a4a43d | 2818 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
00988a35 MMOD |
2819 | *total_size = 0; |
2820 | *block_size = BLOCK_SIZE; | |
2821 | } | |
b2a4a43d | 2822 | dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n", |
97c06978 | 2823 | (unsigned long long)*total_size+1, *block_size); |
00988a35 | 2824 | kfree(buf); |
1da177e4 LT |
2825 | } |
2826 | ||
1da177e4 LT |
2827 | static int cciss_revalidate(struct gendisk *disk) |
2828 | { | |
2829 | ctlr_info_t *h = get_host(disk); | |
2830 | drive_info_struct *drv = get_drv(disk); | |
2831 | int logvol; | |
7c832835 | 2832 | int FOUND = 0; |
1da177e4 | 2833 | unsigned int block_size; |
00988a35 | 2834 | sector_t total_size; |
1da177e4 LT |
2835 | InquiryData_struct *inq_buff = NULL; |
2836 | ||
7c832835 | 2837 | for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) { |
9cef0d2f | 2838 | if (memcmp(h->drv[logvol]->LunID, drv->LunID, |
39ccf9a6 | 2839 | sizeof(drv->LunID)) == 0) { |
7c832835 | 2840 | FOUND = 1; |
1da177e4 LT |
2841 | break; |
2842 | } | |
2843 | } | |
2844 | ||
7c832835 BH |
2845 | if (!FOUND) |
2846 | return 1; | |
1da177e4 | 2847 | |
7c832835 BH |
2848 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); |
2849 | if (inq_buff == NULL) { | |
b2a4a43d | 2850 | dev_warn(&h->pdev->dev, "out of memory\n"); |
7c832835 BH |
2851 | return 1; |
2852 | } | |
00988a35 | 2853 | if (h->cciss_read == CCISS_READ_10) { |
f70dba83 | 2854 | cciss_read_capacity(h, logvol, |
00988a35 MMOD |
2855 | &total_size, &block_size); |
2856 | } else { | |
f70dba83 | 2857 | cciss_read_capacity_16(h, logvol, |
00988a35 MMOD |
2858 | &total_size, &block_size); |
2859 | } | |
f70dba83 | 2860 | cciss_geometry_inquiry(h, logvol, total_size, block_size, |
7c832835 | 2861 | inq_buff, drv); |
1da177e4 | 2862 | |
e1defc4f | 2863 | blk_queue_logical_block_size(drv->queue, drv->block_size); |
1da177e4 LT |
2864 | set_capacity(disk, drv->nr_blocks); |
2865 | ||
1da177e4 LT |
2866 | kfree(inq_buff); |
2867 | return 0; | |
2868 | } | |
2869 | ||
1da177e4 LT |
2870 | /* |
2871 | * Map (physical) PCI mem into (virtual) kernel space | |
2872 | */ | |
2873 | static void __iomem *remap_pci_mem(ulong base, ulong size) | |
2874 | { | |
7c832835 BH |
2875 | ulong page_base = ((ulong) base) & PAGE_MASK; |
2876 | ulong page_offs = ((ulong) base) - page_base; | |
2877 | void __iomem *page_remapped = ioremap(page_base, page_offs + size); | |
1da177e4 | 2878 | |
7c832835 | 2879 | return page_remapped ? (page_remapped + page_offs) : NULL; |
1da177e4 LT |
2880 | } |
2881 | ||
7c832835 BH |
2882 | /* |
2883 | * Takes jobs of the Q and sends them to the hardware, then puts it on | |
2884 | * the Q to wait for completion. | |
2885 | */ | |
2886 | static void start_io(ctlr_info_t *h) | |
1da177e4 LT |
2887 | { |
2888 | CommandList_struct *c; | |
7c832835 | 2889 | |
8a3173de JA |
2890 | while (!hlist_empty(&h->reqQ)) { |
2891 | c = hlist_entry(h->reqQ.first, CommandList_struct, list); | |
1da177e4 LT |
2892 | /* can't do anything if fifo is full */ |
2893 | if ((h->access.fifo_full(h))) { | |
b2a4a43d | 2894 | dev_warn(&h->pdev->dev, "fifo full\n"); |
1da177e4 LT |
2895 | break; |
2896 | } | |
2897 | ||
7c832835 | 2898 | /* Get the first entry from the Request Q */ |
8a3173de | 2899 | removeQ(c); |
1da177e4 | 2900 | h->Qdepth--; |
7c832835 BH |
2901 | |
2902 | /* Tell the controller execute command */ | |
1da177e4 | 2903 | h->access.submit_command(h, c); |
7c832835 BH |
2904 | |
2905 | /* Put job onto the completed Q */ | |
8a3173de | 2906 | addQ(&h->cmpQ, c); |
1da177e4 LT |
2907 | } |
2908 | } | |
7c832835 | 2909 | |
f70dba83 | 2910 | /* Assumes that h->lock is held. */ |
1da177e4 LT |
2911 | /* Zeros out the error record and then resends the command back */ |
2912 | /* to the controller */ | |
7c832835 | 2913 | static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 LT |
2914 | { |
2915 | /* erase the old error information */ | |
2916 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
2917 | ||
2918 | /* add it to software queue and then send it to the controller */ | |
8a3173de | 2919 | addQ(&h->reqQ, c); |
1da177e4 | 2920 | h->Qdepth++; |
7c832835 | 2921 | if (h->Qdepth > h->maxQsinceinit) |
1da177e4 LT |
2922 | h->maxQsinceinit = h->Qdepth; |
2923 | ||
2924 | start_io(h); | |
2925 | } | |
a9925a06 | 2926 | |
1a614f50 SC |
2927 | static inline unsigned int make_status_bytes(unsigned int scsi_status_byte, |
2928 | unsigned int msg_byte, unsigned int host_byte, | |
2929 | unsigned int driver_byte) | |
2930 | { | |
2931 | /* inverse of macros in scsi.h */ | |
2932 | return (scsi_status_byte & 0xff) | | |
2933 | ((msg_byte & 0xff) << 8) | | |
2934 | ((host_byte & 0xff) << 16) | | |
2935 | ((driver_byte & 0xff) << 24); | |
2936 | } | |
2937 | ||
0a9279cc MM |
2938 | static inline int evaluate_target_status(ctlr_info_t *h, |
2939 | CommandList_struct *cmd, int *retry_cmd) | |
03bbfee5 MMOD |
2940 | { |
2941 | unsigned char sense_key; | |
1a614f50 SC |
2942 | unsigned char status_byte, msg_byte, host_byte, driver_byte; |
2943 | int error_value; | |
2944 | ||
0a9279cc | 2945 | *retry_cmd = 0; |
1a614f50 SC |
2946 | /* If we get in here, it means we got "target status", that is, scsi status */ |
2947 | status_byte = cmd->err_info->ScsiStatus; | |
2948 | driver_byte = DRIVER_OK; | |
2949 | msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */ | |
2950 | ||
33659ebb | 2951 | if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) |
1a614f50 SC |
2952 | host_byte = DID_PASSTHROUGH; |
2953 | else | |
2954 | host_byte = DID_OK; | |
2955 | ||
2956 | error_value = make_status_bytes(status_byte, msg_byte, | |
2957 | host_byte, driver_byte); | |
03bbfee5 | 2958 | |
1a614f50 | 2959 | if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) { |
33659ebb | 2960 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) |
b2a4a43d | 2961 | dev_warn(&h->pdev->dev, "cmd %p " |
03bbfee5 MMOD |
2962 | "has SCSI Status 0x%x\n", |
2963 | cmd, cmd->err_info->ScsiStatus); | |
1a614f50 | 2964 | return error_value; |
03bbfee5 MMOD |
2965 | } |
2966 | ||
2967 | /* check the sense key */ | |
2968 | sense_key = 0xf & cmd->err_info->SenseInfo[2]; | |
2969 | /* no status or recovered error */ | |
33659ebb CH |
2970 | if (((sense_key == 0x0) || (sense_key == 0x1)) && |
2971 | (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)) | |
1a614f50 | 2972 | error_value = 0; |
03bbfee5 | 2973 | |
0a9279cc | 2974 | if (check_for_unit_attention(h, cmd)) { |
33659ebb | 2975 | *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC); |
0a9279cc MM |
2976 | return 0; |
2977 | } | |
2978 | ||
33659ebb CH |
2979 | /* Not SG_IO or similar? */ |
2980 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) { | |
1a614f50 | 2981 | if (error_value != 0) |
b2a4a43d | 2982 | dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION" |
03bbfee5 | 2983 | " sense key = 0x%x\n", cmd, sense_key); |
1a614f50 | 2984 | return error_value; |
03bbfee5 MMOD |
2985 | } |
2986 | ||
2987 | /* SG_IO or similar, copy sense data back */ | |
2988 | if (cmd->rq->sense) { | |
2989 | if (cmd->rq->sense_len > cmd->err_info->SenseLen) | |
2990 | cmd->rq->sense_len = cmd->err_info->SenseLen; | |
2991 | memcpy(cmd->rq->sense, cmd->err_info->SenseInfo, | |
2992 | cmd->rq->sense_len); | |
2993 | } else | |
2994 | cmd->rq->sense_len = 0; | |
2995 | ||
1a614f50 | 2996 | return error_value; |
03bbfee5 MMOD |
2997 | } |
2998 | ||
7c832835 | 2999 | /* checks the status of the job and calls complete buffers to mark all |
a9925a06 JA |
3000 | * buffers for the completed job. Note that this function does not need |
3001 | * to hold the hba/queue lock. | |
7c832835 BH |
3002 | */ |
3003 | static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd, | |
3004 | int timeout) | |
1da177e4 | 3005 | { |
1da177e4 | 3006 | int retry_cmd = 0; |
198b7660 MMOD |
3007 | struct request *rq = cmd->rq; |
3008 | ||
3009 | rq->errors = 0; | |
7c832835 | 3010 | |
1da177e4 | 3011 | if (timeout) |
1a614f50 | 3012 | rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT); |
1da177e4 | 3013 | |
d38ae168 MMOD |
3014 | if (cmd->err_info->CommandStatus == 0) /* no error has occurred */ |
3015 | goto after_error_processing; | |
7c832835 | 3016 | |
d38ae168 | 3017 | switch (cmd->err_info->CommandStatus) { |
d38ae168 | 3018 | case CMD_TARGET_STATUS: |
0a9279cc | 3019 | rq->errors = evaluate_target_status(h, cmd, &retry_cmd); |
d38ae168 MMOD |
3020 | break; |
3021 | case CMD_DATA_UNDERRUN: | |
33659ebb | 3022 | if (cmd->rq->cmd_type == REQ_TYPE_FS) { |
b2a4a43d | 3023 | dev_warn(&h->pdev->dev, "cmd %p has" |
03bbfee5 MMOD |
3024 | " completed with data underrun " |
3025 | "reported\n", cmd); | |
c3a4d78c | 3026 | cmd->rq->resid_len = cmd->err_info->ResidualCnt; |
03bbfee5 | 3027 | } |
d38ae168 MMOD |
3028 | break; |
3029 | case CMD_DATA_OVERRUN: | |
33659ebb | 3030 | if (cmd->rq->cmd_type == REQ_TYPE_FS) |
b2a4a43d | 3031 | dev_warn(&h->pdev->dev, "cciss: cmd %p has" |
03bbfee5 MMOD |
3032 | " completed with data overrun " |
3033 | "reported\n", cmd); | |
d38ae168 MMOD |
3034 | break; |
3035 | case CMD_INVALID: | |
b2a4a43d | 3036 | dev_warn(&h->pdev->dev, "cciss: cmd %p is " |
d38ae168 | 3037 | "reported invalid\n", cmd); |
1a614f50 SC |
3038 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3039 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3040 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3041 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3042 | break; |
3043 | case CMD_PROTOCOL_ERR: | |
b2a4a43d SC |
3044 | dev_warn(&h->pdev->dev, "cciss: cmd %p has " |
3045 | "protocol error\n", cmd); | |
1a614f50 SC |
3046 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3047 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3048 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3049 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3050 | break; |
3051 | case CMD_HARDWARE_ERR: | |
b2a4a43d | 3052 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
d38ae168 | 3053 | " hardware error\n", cmd); |
1a614f50 SC |
3054 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3055 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3056 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3057 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3058 | break; |
3059 | case CMD_CONNECTION_LOST: | |
b2a4a43d | 3060 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
d38ae168 | 3061 | "connection lost\n", cmd); |
1a614f50 SC |
3062 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3063 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3064 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3065 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3066 | break; |
3067 | case CMD_ABORTED: | |
b2a4a43d | 3068 | dev_warn(&h->pdev->dev, "cciss: cmd %p was " |
d38ae168 | 3069 | "aborted\n", cmd); |
1a614f50 SC |
3070 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3071 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3072 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3073 | DID_PASSTHROUGH : DID_ABORT); | |
d38ae168 MMOD |
3074 | break; |
3075 | case CMD_ABORT_FAILED: | |
b2a4a43d | 3076 | dev_warn(&h->pdev->dev, "cciss: cmd %p reports " |
d38ae168 | 3077 | "abort failed\n", cmd); |
1a614f50 SC |
3078 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3079 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3080 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3081 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3082 | break; |
3083 | case CMD_UNSOLICITED_ABORT: | |
b2a4a43d | 3084 | dev_warn(&h->pdev->dev, "cciss%d: unsolicited " |
d38ae168 MMOD |
3085 | "abort %p\n", h->ctlr, cmd); |
3086 | if (cmd->retry_count < MAX_CMD_RETRIES) { | |
3087 | retry_cmd = 1; | |
b2a4a43d | 3088 | dev_warn(&h->pdev->dev, "retrying %p\n", cmd); |
d38ae168 MMOD |
3089 | cmd->retry_count++; |
3090 | } else | |
b2a4a43d SC |
3091 | dev_warn(&h->pdev->dev, |
3092 | "%p retried too many times\n", cmd); | |
1a614f50 SC |
3093 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3094 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3095 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3096 | DID_PASSTHROUGH : DID_ABORT); | |
d38ae168 MMOD |
3097 | break; |
3098 | case CMD_TIMEOUT: | |
b2a4a43d | 3099 | dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd); |
1a614f50 SC |
3100 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3101 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3102 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3103 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3104 | break; |
3105 | default: | |
b2a4a43d | 3106 | dev_warn(&h->pdev->dev, "cmd %p returned " |
d38ae168 MMOD |
3107 | "unknown status %x\n", cmd, |
3108 | cmd->err_info->CommandStatus); | |
1a614f50 SC |
3109 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3110 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3111 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3112 | DID_PASSTHROUGH : DID_ERROR); | |
1da177e4 | 3113 | } |
d38ae168 MMOD |
3114 | |
3115 | after_error_processing: | |
3116 | ||
1da177e4 | 3117 | /* We need to return this command */ |
7c832835 BH |
3118 | if (retry_cmd) { |
3119 | resend_cciss_cmd(h, cmd); | |
1da177e4 | 3120 | return; |
7c832835 | 3121 | } |
03bbfee5 | 3122 | cmd->rq->completion_data = cmd; |
a9925a06 | 3123 | blk_complete_request(cmd->rq); |
1da177e4 LT |
3124 | } |
3125 | ||
0c2b3908 MM |
3126 | static inline u32 cciss_tag_contains_index(u32 tag) |
3127 | { | |
5e216153 | 3128 | #define DIRECT_LOOKUP_BIT 0x10 |
0c2b3908 MM |
3129 | return tag & DIRECT_LOOKUP_BIT; |
3130 | } | |
3131 | ||
3132 | static inline u32 cciss_tag_to_index(u32 tag) | |
3133 | { | |
5e216153 | 3134 | #define DIRECT_LOOKUP_SHIFT 5 |
0c2b3908 MM |
3135 | return tag >> DIRECT_LOOKUP_SHIFT; |
3136 | } | |
3137 | ||
3138 | static inline u32 cciss_tag_discard_error_bits(u32 tag) | |
3139 | { | |
3140 | #define CCISS_ERROR_BITS 0x03 | |
3141 | return tag & ~CCISS_ERROR_BITS; | |
3142 | } | |
3143 | ||
3144 | static inline void cciss_mark_tag_indexed(u32 *tag) | |
3145 | { | |
3146 | *tag |= DIRECT_LOOKUP_BIT; | |
3147 | } | |
3148 | ||
3149 | static inline void cciss_set_tag_index(u32 *tag, u32 index) | |
3150 | { | |
3151 | *tag |= (index << DIRECT_LOOKUP_SHIFT); | |
3152 | } | |
3153 | ||
7c832835 BH |
3154 | /* |
3155 | * Get a request and submit it to the controller. | |
1da177e4 | 3156 | */ |
165125e1 | 3157 | static void do_cciss_request(struct request_queue *q) |
1da177e4 | 3158 | { |
7c832835 | 3159 | ctlr_info_t *h = q->queuedata; |
1da177e4 | 3160 | CommandList_struct *c; |
00988a35 MMOD |
3161 | sector_t start_blk; |
3162 | int seg; | |
1da177e4 LT |
3163 | struct request *creq; |
3164 | u64bit temp64; | |
5c07a311 DB |
3165 | struct scatterlist *tmp_sg; |
3166 | SGDescriptor_struct *curr_sg; | |
1da177e4 LT |
3167 | drive_info_struct *drv; |
3168 | int i, dir; | |
5c07a311 DB |
3169 | int sg_index = 0; |
3170 | int chained = 0; | |
1da177e4 LT |
3171 | |
3172 | /* We call start_io here in case there is a command waiting on the | |
3173 | * queue that has not been sent. | |
7c832835 | 3174 | */ |
1da177e4 LT |
3175 | if (blk_queue_plugged(q)) |
3176 | goto startio; | |
3177 | ||
7c832835 | 3178 | queue: |
9934c8c0 | 3179 | creq = blk_peek_request(q); |
1da177e4 LT |
3180 | if (!creq) |
3181 | goto startio; | |
3182 | ||
5c07a311 | 3183 | BUG_ON(creq->nr_phys_segments > h->maxsgentries); |
1da177e4 | 3184 | |
6b4d96b8 SC |
3185 | c = cmd_alloc(h); |
3186 | if (!c) | |
1da177e4 LT |
3187 | goto full; |
3188 | ||
9934c8c0 | 3189 | blk_start_request(creq); |
1da177e4 | 3190 | |
5c07a311 | 3191 | tmp_sg = h->scatter_list[c->cmdindex]; |
1da177e4 LT |
3192 | spin_unlock_irq(q->queue_lock); |
3193 | ||
3194 | c->cmd_type = CMD_RWREQ; | |
3195 | c->rq = creq; | |
7c832835 BH |
3196 | |
3197 | /* fill in the request */ | |
1da177e4 | 3198 | drv = creq->rq_disk->private_data; |
b028461d | 3199 | c->Header.ReplyQueue = 0; /* unused in simple mode */ |
33079b21 MM |
3200 | /* got command from pool, so use the command block index instead */ |
3201 | /* for direct lookups. */ | |
3202 | /* The first 2 bits are reserved for controller error reporting. */ | |
0c2b3908 MM |
3203 | cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex); |
3204 | cciss_mark_tag_indexed(&c->Header.Tag.lower); | |
39ccf9a6 | 3205 | memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID)); |
b028461d | 3206 | c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */ |
3207 | c->Request.Type.Type = TYPE_CMD; /* It is a command. */ | |
7c832835 BH |
3208 | c->Request.Type.Attribute = ATTR_SIMPLE; |
3209 | c->Request.Type.Direction = | |
a52de245 | 3210 | (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE; |
b028461d | 3211 | c->Request.Timeout = 0; /* Don't time out */ |
7c832835 | 3212 | c->Request.CDB[0] = |
00988a35 | 3213 | (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write; |
83096ebf | 3214 | start_blk = blk_rq_pos(creq); |
b2a4a43d | 3215 | dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n", |
83096ebf | 3216 | (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq)); |
5c07a311 | 3217 | sg_init_table(tmp_sg, h->maxsgentries); |
1da177e4 LT |
3218 | seg = blk_rq_map_sg(q, creq, tmp_sg); |
3219 | ||
7c832835 | 3220 | /* get the DMA records for the setup */ |
1da177e4 LT |
3221 | if (c->Request.Type.Direction == XFER_READ) |
3222 | dir = PCI_DMA_FROMDEVICE; | |
3223 | else | |
3224 | dir = PCI_DMA_TODEVICE; | |
3225 | ||
5c07a311 DB |
3226 | curr_sg = c->SG; |
3227 | sg_index = 0; | |
3228 | chained = 0; | |
3229 | ||
7c832835 | 3230 | for (i = 0; i < seg; i++) { |
5c07a311 DB |
3231 | if (((sg_index+1) == (h->max_cmd_sgentries)) && |
3232 | !chained && ((seg - i) > 1)) { | |
5c07a311 | 3233 | /* Point to next chain block. */ |
dccc9b56 | 3234 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
5c07a311 DB |
3235 | sg_index = 0; |
3236 | chained = 1; | |
3237 | } | |
3238 | curr_sg[sg_index].Len = tmp_sg[i].length; | |
45711f1a | 3239 | temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]), |
5c07a311 DB |
3240 | tmp_sg[i].offset, |
3241 | tmp_sg[i].length, dir); | |
3242 | curr_sg[sg_index].Addr.lower = temp64.val32.lower; | |
3243 | curr_sg[sg_index].Addr.upper = temp64.val32.upper; | |
3244 | curr_sg[sg_index].Ext = 0; /* we are not chaining */ | |
5c07a311 | 3245 | ++sg_index; |
1da177e4 | 3246 | } |
d45033ef SC |
3247 | if (chained) |
3248 | cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex], | |
3249 | (seg - (h->max_cmd_sgentries - 1)) * | |
3250 | sizeof(SGDescriptor_struct)); | |
5c07a311 | 3251 | |
7c832835 BH |
3252 | /* track how many SG entries we are using */ |
3253 | if (seg > h->maxSG) | |
3254 | h->maxSG = seg; | |
1da177e4 | 3255 | |
b2a4a43d | 3256 | dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments " |
5c07a311 DB |
3257 | "chained[%d]\n", |
3258 | blk_rq_sectors(creq), seg, chained); | |
1da177e4 | 3259 | |
5e216153 MM |
3260 | c->Header.SGTotal = seg + chained; |
3261 | if (seg <= h->max_cmd_sgentries) | |
3262 | c->Header.SGList = c->Header.SGTotal; | |
3263 | else | |
5c07a311 | 3264 | c->Header.SGList = h->max_cmd_sgentries; |
5e216153 | 3265 | set_performant_mode(h, c); |
5c07a311 | 3266 | |
33659ebb | 3267 | if (likely(creq->cmd_type == REQ_TYPE_FS)) { |
03bbfee5 MMOD |
3268 | if(h->cciss_read == CCISS_READ_10) { |
3269 | c->Request.CDB[1] = 0; | |
b028461d | 3270 | c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */ |
03bbfee5 MMOD |
3271 | c->Request.CDB[3] = (start_blk >> 16) & 0xff; |
3272 | c->Request.CDB[4] = (start_blk >> 8) & 0xff; | |
3273 | c->Request.CDB[5] = start_blk & 0xff; | |
b028461d | 3274 | c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */ |
83096ebf TH |
3275 | c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff; |
3276 | c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff; | |
03bbfee5 MMOD |
3277 | c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0; |
3278 | } else { | |
582539e5 RD |
3279 | u32 upper32 = upper_32_bits(start_blk); |
3280 | ||
03bbfee5 MMOD |
3281 | c->Request.CDBLen = 16; |
3282 | c->Request.CDB[1]= 0; | |
b028461d | 3283 | c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */ |
582539e5 RD |
3284 | c->Request.CDB[3]= (upper32 >> 16) & 0xff; |
3285 | c->Request.CDB[4]= (upper32 >> 8) & 0xff; | |
3286 | c->Request.CDB[5]= upper32 & 0xff; | |
03bbfee5 MMOD |
3287 | c->Request.CDB[6]= (start_blk >> 24) & 0xff; |
3288 | c->Request.CDB[7]= (start_blk >> 16) & 0xff; | |
3289 | c->Request.CDB[8]= (start_blk >> 8) & 0xff; | |
3290 | c->Request.CDB[9]= start_blk & 0xff; | |
83096ebf TH |
3291 | c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff; |
3292 | c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff; | |
3293 | c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff; | |
3294 | c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff; | |
03bbfee5 MMOD |
3295 | c->Request.CDB[14] = c->Request.CDB[15] = 0; |
3296 | } | |
33659ebb | 3297 | } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) { |
03bbfee5 MMOD |
3298 | c->Request.CDBLen = creq->cmd_len; |
3299 | memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB); | |
00988a35 | 3300 | } else { |
b2a4a43d SC |
3301 | dev_warn(&h->pdev->dev, "bad request type %d\n", |
3302 | creq->cmd_type); | |
03bbfee5 | 3303 | BUG(); |
00988a35 | 3304 | } |
1da177e4 LT |
3305 | |
3306 | spin_lock_irq(q->queue_lock); | |
3307 | ||
8a3173de | 3308 | addQ(&h->reqQ, c); |
1da177e4 | 3309 | h->Qdepth++; |
7c832835 BH |
3310 | if (h->Qdepth > h->maxQsinceinit) |
3311 | h->maxQsinceinit = h->Qdepth; | |
1da177e4 LT |
3312 | |
3313 | goto queue; | |
00988a35 | 3314 | full: |
1da177e4 | 3315 | blk_stop_queue(q); |
00988a35 | 3316 | startio: |
1da177e4 LT |
3317 | /* We will already have the driver lock here so not need |
3318 | * to lock it. | |
7c832835 | 3319 | */ |
1da177e4 LT |
3320 | start_io(h); |
3321 | } | |
3322 | ||
3da8b713 | 3323 | static inline unsigned long get_next_completion(ctlr_info_t *h) |
3324 | { | |
3da8b713 | 3325 | return h->access.command_completed(h); |
3da8b713 | 3326 | } |
3327 | ||
3328 | static inline int interrupt_pending(ctlr_info_t *h) | |
3329 | { | |
3da8b713 | 3330 | return h->access.intr_pending(h); |
3da8b713 | 3331 | } |
3332 | ||
3333 | static inline long interrupt_not_for_us(ctlr_info_t *h) | |
3334 | { | |
81125860 | 3335 | return ((h->access.intr_pending(h) == 0) || |
2cf3af1c | 3336 | (h->interrupts_enabled == 0)); |
3da8b713 | 3337 | } |
3338 | ||
0c2b3908 MM |
3339 | static inline int bad_tag(ctlr_info_t *h, u32 tag_index, |
3340 | u32 raw_tag) | |
1da177e4 | 3341 | { |
0c2b3908 MM |
3342 | if (unlikely(tag_index >= h->nr_cmds)) { |
3343 | dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); | |
3344 | return 1; | |
3345 | } | |
3346 | return 0; | |
3347 | } | |
3348 | ||
3349 | static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c, | |
3350 | u32 raw_tag) | |
3351 | { | |
3352 | removeQ(c); | |
3353 | if (likely(c->cmd_type == CMD_RWREQ)) | |
3354 | complete_command(h, c, 0); | |
3355 | else if (c->cmd_type == CMD_IOCTL_PEND) | |
3356 | complete(c->waiting); | |
3357 | #ifdef CONFIG_CISS_SCSI_TAPE | |
3358 | else if (c->cmd_type == CMD_SCSI) | |
3359 | complete_scsi_command(c, 0, raw_tag); | |
3360 | #endif | |
3361 | } | |
3362 | ||
29979a71 MM |
3363 | static inline u32 next_command(ctlr_info_t *h) |
3364 | { | |
3365 | u32 a; | |
3366 | ||
3367 | if (unlikely(h->transMethod != CFGTBL_Trans_Performant)) | |
3368 | return h->access.command_completed(h); | |
3369 | ||
3370 | if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { | |
3371 | a = *(h->reply_pool_head); /* Next cmd in ring buffer */ | |
3372 | (h->reply_pool_head)++; | |
3373 | h->commands_outstanding--; | |
3374 | } else { | |
3375 | a = FIFO_EMPTY; | |
3376 | } | |
3377 | /* Check for wraparound */ | |
3378 | if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { | |
3379 | h->reply_pool_head = h->reply_pool; | |
3380 | h->reply_pool_wraparound ^= 1; | |
3381 | } | |
3382 | return a; | |
3383 | } | |
3384 | ||
0c2b3908 MM |
3385 | /* process completion of an indexed ("direct lookup") command */ |
3386 | static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag) | |
3387 | { | |
3388 | u32 tag_index; | |
1da177e4 | 3389 | CommandList_struct *c; |
0c2b3908 MM |
3390 | |
3391 | tag_index = cciss_tag_to_index(raw_tag); | |
3392 | if (bad_tag(h, tag_index, raw_tag)) | |
5e216153 | 3393 | return next_command(h); |
0c2b3908 MM |
3394 | c = h->cmd_pool + tag_index; |
3395 | finish_cmd(h, c, raw_tag); | |
5e216153 | 3396 | return next_command(h); |
0c2b3908 MM |
3397 | } |
3398 | ||
3399 | /* process completion of a non-indexed command */ | |
3400 | static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag) | |
3401 | { | |
3402 | u32 tag; | |
3403 | CommandList_struct *c = NULL; | |
3404 | struct hlist_node *tmp; | |
3405 | __u32 busaddr_masked, tag_masked; | |
3406 | ||
3407 | tag = cciss_tag_discard_error_bits(raw_tag); | |
3408 | hlist_for_each_entry(c, tmp, &h->cmpQ, list) { | |
3409 | busaddr_masked = cciss_tag_discard_error_bits(c->busaddr); | |
3410 | tag_masked = cciss_tag_discard_error_bits(tag); | |
3411 | if (busaddr_masked == tag_masked) { | |
3412 | finish_cmd(h, c, raw_tag); | |
5e216153 | 3413 | return next_command(h); |
0c2b3908 MM |
3414 | } |
3415 | } | |
3416 | bad_tag(h, h->nr_cmds + 1, raw_tag); | |
5e216153 | 3417 | return next_command(h); |
0c2b3908 MM |
3418 | } |
3419 | ||
3420 | static irqreturn_t do_cciss_intx(int irq, void *dev_id) | |
3421 | { | |
3422 | ctlr_info_t *h = dev_id; | |
1da177e4 | 3423 | unsigned long flags; |
0c2b3908 | 3424 | u32 raw_tag; |
1da177e4 | 3425 | |
3da8b713 | 3426 | if (interrupt_not_for_us(h)) |
1da177e4 | 3427 | return IRQ_NONE; |
f70dba83 | 3428 | spin_lock_irqsave(&h->lock, flags); |
3da8b713 | 3429 | while (interrupt_pending(h)) { |
0c2b3908 MM |
3430 | raw_tag = get_next_completion(h); |
3431 | while (raw_tag != FIFO_EMPTY) { | |
3432 | if (cciss_tag_contains_index(raw_tag)) | |
3433 | raw_tag = process_indexed_cmd(h, raw_tag); | |
3434 | else | |
3435 | raw_tag = process_nonindexed_cmd(h, raw_tag); | |
1da177e4 LT |
3436 | } |
3437 | } | |
f70dba83 | 3438 | spin_unlock_irqrestore(&h->lock, flags); |
0c2b3908 MM |
3439 | return IRQ_HANDLED; |
3440 | } | |
1da177e4 | 3441 | |
0c2b3908 MM |
3442 | /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never |
3443 | * check the interrupt pending register because it is not set. | |
3444 | */ | |
3445 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id) | |
3446 | { | |
3447 | ctlr_info_t *h = dev_id; | |
3448 | unsigned long flags; | |
3449 | u32 raw_tag; | |
8a3173de | 3450 | |
f70dba83 | 3451 | spin_lock_irqsave(&h->lock, flags); |
0c2b3908 MM |
3452 | raw_tag = get_next_completion(h); |
3453 | while (raw_tag != FIFO_EMPTY) { | |
3454 | if (cciss_tag_contains_index(raw_tag)) | |
3455 | raw_tag = process_indexed_cmd(h, raw_tag); | |
3456 | else | |
3457 | raw_tag = process_nonindexed_cmd(h, raw_tag); | |
1da177e4 | 3458 | } |
f70dba83 | 3459 | spin_unlock_irqrestore(&h->lock, flags); |
1da177e4 LT |
3460 | return IRQ_HANDLED; |
3461 | } | |
7c832835 | 3462 | |
b368c9dd AP |
3463 | /** |
3464 | * add_to_scan_list() - add controller to rescan queue | |
3465 | * @h: Pointer to the controller. | |
3466 | * | |
3467 | * Adds the controller to the rescan queue if not already on the queue. | |
3468 | * | |
3469 | * returns 1 if added to the queue, 0 if skipped (could be on the | |
3470 | * queue already, or the controller could be initializing or shutting | |
3471 | * down). | |
3472 | **/ | |
3473 | static int add_to_scan_list(struct ctlr_info *h) | |
3474 | { | |
3475 | struct ctlr_info *test_h; | |
3476 | int found = 0; | |
3477 | int ret = 0; | |
3478 | ||
3479 | if (h->busy_initializing) | |
3480 | return 0; | |
3481 | ||
3482 | if (!mutex_trylock(&h->busy_shutting_down)) | |
3483 | return 0; | |
3484 | ||
3485 | mutex_lock(&scan_mutex); | |
3486 | list_for_each_entry(test_h, &scan_q, scan_list) { | |
3487 | if (test_h == h) { | |
3488 | found = 1; | |
3489 | break; | |
3490 | } | |
3491 | } | |
3492 | if (!found && !h->busy_scanning) { | |
3493 | INIT_COMPLETION(h->scan_wait); | |
3494 | list_add_tail(&h->scan_list, &scan_q); | |
3495 | ret = 1; | |
3496 | } | |
3497 | mutex_unlock(&scan_mutex); | |
3498 | mutex_unlock(&h->busy_shutting_down); | |
3499 | ||
3500 | return ret; | |
3501 | } | |
3502 | ||
3503 | /** | |
3504 | * remove_from_scan_list() - remove controller from rescan queue | |
3505 | * @h: Pointer to the controller. | |
3506 | * | |
3507 | * Removes the controller from the rescan queue if present. Blocks if | |
fd8489cf SC |
3508 | * the controller is currently conducting a rescan. The controller |
3509 | * can be in one of three states: | |
3510 | * 1. Doesn't need a scan | |
3511 | * 2. On the scan list, but not scanning yet (we remove it) | |
3512 | * 3. Busy scanning (and not on the list). In this case we want to wait for | |
3513 | * the scan to complete to make sure the scanning thread for this | |
3514 | * controller is completely idle. | |
b368c9dd AP |
3515 | **/ |
3516 | static void remove_from_scan_list(struct ctlr_info *h) | |
3517 | { | |
3518 | struct ctlr_info *test_h, *tmp_h; | |
b368c9dd AP |
3519 | |
3520 | mutex_lock(&scan_mutex); | |
3521 | list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) { | |
fd8489cf | 3522 | if (test_h == h) { /* state 2. */ |
b368c9dd AP |
3523 | list_del(&h->scan_list); |
3524 | complete_all(&h->scan_wait); | |
3525 | mutex_unlock(&scan_mutex); | |
3526 | return; | |
3527 | } | |
3528 | } | |
fd8489cf SC |
3529 | if (h->busy_scanning) { /* state 3. */ |
3530 | mutex_unlock(&scan_mutex); | |
b368c9dd | 3531 | wait_for_completion(&h->scan_wait); |
fd8489cf SC |
3532 | } else { /* state 1, nothing to do. */ |
3533 | mutex_unlock(&scan_mutex); | |
3534 | } | |
b368c9dd AP |
3535 | } |
3536 | ||
3537 | /** | |
3538 | * scan_thread() - kernel thread used to rescan controllers | |
3539 | * @data: Ignored. | |
3540 | * | |
3541 | * A kernel thread used scan for drive topology changes on | |
3542 | * controllers. The thread processes only one controller at a time | |
3543 | * using a queue. Controllers are added to the queue using | |
3544 | * add_to_scan_list() and removed from the queue either after done | |
3545 | * processing or using remove_from_scan_list(). | |
3546 | * | |
3547 | * returns 0. | |
3548 | **/ | |
0a9279cc MM |
3549 | static int scan_thread(void *data) |
3550 | { | |
b368c9dd | 3551 | struct ctlr_info *h; |
0a9279cc | 3552 | |
b368c9dd AP |
3553 | while (1) { |
3554 | set_current_state(TASK_INTERRUPTIBLE); | |
3555 | schedule(); | |
0a9279cc MM |
3556 | if (kthread_should_stop()) |
3557 | break; | |
b368c9dd AP |
3558 | |
3559 | while (1) { | |
3560 | mutex_lock(&scan_mutex); | |
3561 | if (list_empty(&scan_q)) { | |
3562 | mutex_unlock(&scan_mutex); | |
3563 | break; | |
3564 | } | |
3565 | ||
3566 | h = list_entry(scan_q.next, | |
3567 | struct ctlr_info, | |
3568 | scan_list); | |
3569 | list_del(&h->scan_list); | |
3570 | h->busy_scanning = 1; | |
3571 | mutex_unlock(&scan_mutex); | |
3572 | ||
d06dfbd2 SC |
3573 | rebuild_lun_table(h, 0, 0); |
3574 | complete_all(&h->scan_wait); | |
3575 | mutex_lock(&scan_mutex); | |
3576 | h->busy_scanning = 0; | |
3577 | mutex_unlock(&scan_mutex); | |
b368c9dd | 3578 | } |
0a9279cc | 3579 | } |
b368c9dd | 3580 | |
0a9279cc MM |
3581 | return 0; |
3582 | } | |
3583 | ||
3584 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c) | |
3585 | { | |
3586 | if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) | |
3587 | return 0; | |
3588 | ||
3589 | switch (c->err_info->SenseInfo[12]) { | |
3590 | case STATE_CHANGED: | |
b2a4a43d SC |
3591 | dev_warn(&h->pdev->dev, "a state change " |
3592 | "detected, command retried\n"); | |
0a9279cc MM |
3593 | return 1; |
3594 | break; | |
3595 | case LUN_FAILED: | |
b2a4a43d SC |
3596 | dev_warn(&h->pdev->dev, "LUN failure " |
3597 | "detected, action required\n"); | |
0a9279cc MM |
3598 | return 1; |
3599 | break; | |
3600 | case REPORT_LUNS_CHANGED: | |
b2a4a43d | 3601 | dev_warn(&h->pdev->dev, "report LUN data changed\n"); |
da002184 SC |
3602 | /* |
3603 | * Here, we could call add_to_scan_list and wake up the scan thread, | |
3604 | * except that it's quite likely that we will get more than one | |
3605 | * REPORT_LUNS_CHANGED condition in quick succession, which means | |
3606 | * that those which occur after the first one will likely happen | |
3607 | * *during* the scan_thread's rescan. And the rescan code is not | |
3608 | * robust enough to restart in the middle, undoing what it has already | |
3609 | * done, and it's not clear that it's even possible to do this, since | |
3610 | * part of what it does is notify the block layer, which starts | |
3611 | * doing it's own i/o to read partition tables and so on, and the | |
3612 | * driver doesn't have visibility to know what might need undoing. | |
3613 | * In any event, if possible, it is horribly complicated to get right | |
3614 | * so we just don't do it for now. | |
3615 | * | |
3616 | * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. | |
3617 | */ | |
0a9279cc MM |
3618 | return 1; |
3619 | break; | |
3620 | case POWER_OR_RESET: | |
b2a4a43d SC |
3621 | dev_warn(&h->pdev->dev, |
3622 | "a power on or device reset detected\n"); | |
0a9279cc MM |
3623 | return 1; |
3624 | break; | |
3625 | case UNIT_ATTENTION_CLEARED: | |
b2a4a43d SC |
3626 | dev_warn(&h->pdev->dev, |
3627 | "unit attention cleared by another initiator\n"); | |
0a9279cc MM |
3628 | return 1; |
3629 | break; | |
3630 | default: | |
b2a4a43d SC |
3631 | dev_warn(&h->pdev->dev, "unknown unit attention detected\n"); |
3632 | return 1; | |
0a9279cc MM |
3633 | } |
3634 | } | |
3635 | ||
7c832835 | 3636 | /* |
d14c4ab5 | 3637 | * We cannot read the structure directly, for portability we must use |
1da177e4 | 3638 | * the io functions. |
7c832835 | 3639 | * This is for debug only. |
1da177e4 | 3640 | */ |
b2a4a43d | 3641 | static void print_cfg_table(ctlr_info_t *h) |
1da177e4 LT |
3642 | { |
3643 | int i; | |
3644 | char temp_name[17]; | |
b2a4a43d | 3645 | CfgTable_struct *tb = h->cfgtable; |
1da177e4 | 3646 | |
b2a4a43d SC |
3647 | dev_dbg(&h->pdev->dev, "Controller Configuration information\n"); |
3648 | dev_dbg(&h->pdev->dev, "------------------------------------\n"); | |
7c832835 | 3649 | for (i = 0; i < 4; i++) |
1da177e4 | 3650 | temp_name[i] = readb(&(tb->Signature[i])); |
7c832835 | 3651 | temp_name[4] = '\0'; |
b2a4a43d SC |
3652 | dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name); |
3653 | dev_dbg(&h->pdev->dev, " Spec Number = %d\n", | |
3654 | readl(&(tb->SpecValence))); | |
3655 | dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n", | |
7c832835 | 3656 | readl(&(tb->TransportSupport))); |
b2a4a43d | 3657 | dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n", |
7c832835 | 3658 | readl(&(tb->TransportActive))); |
b2a4a43d | 3659 | dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n", |
7c832835 | 3660 | readl(&(tb->HostWrite.TransportRequest))); |
b2a4a43d | 3661 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n", |
7c832835 | 3662 | readl(&(tb->HostWrite.CoalIntDelay))); |
b2a4a43d | 3663 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n", |
7c832835 | 3664 | readl(&(tb->HostWrite.CoalIntCount))); |
b2a4a43d | 3665 | dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n", |
7c832835 | 3666 | readl(&(tb->CmdsOutMax))); |
b2a4a43d SC |
3667 | dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n", |
3668 | readl(&(tb->BusTypes))); | |
7c832835 | 3669 | for (i = 0; i < 16; i++) |
1da177e4 LT |
3670 | temp_name[i] = readb(&(tb->ServerName[i])); |
3671 | temp_name[16] = '\0'; | |
b2a4a43d SC |
3672 | dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name); |
3673 | dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n", | |
3674 | readl(&(tb->HeartBeat))); | |
1da177e4 | 3675 | } |
1da177e4 | 3676 | |
7c832835 | 3677 | static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) |
1da177e4 LT |
3678 | { |
3679 | int i, offset, mem_type, bar_type; | |
7c832835 | 3680 | if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ |
1da177e4 LT |
3681 | return 0; |
3682 | offset = 0; | |
7c832835 BH |
3683 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
3684 | bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; | |
1da177e4 LT |
3685 | if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) |
3686 | offset += 4; | |
3687 | else { | |
3688 | mem_type = pci_resource_flags(pdev, i) & | |
7c832835 | 3689 | PCI_BASE_ADDRESS_MEM_TYPE_MASK; |
1da177e4 | 3690 | switch (mem_type) { |
7c832835 BH |
3691 | case PCI_BASE_ADDRESS_MEM_TYPE_32: |
3692 | case PCI_BASE_ADDRESS_MEM_TYPE_1M: | |
3693 | offset += 4; /* 32 bit */ | |
3694 | break; | |
3695 | case PCI_BASE_ADDRESS_MEM_TYPE_64: | |
3696 | offset += 8; | |
3697 | break; | |
3698 | default: /* reserved in PCI 2.2 */ | |
b2a4a43d | 3699 | dev_warn(&pdev->dev, |
7c832835 BH |
3700 | "Base address is invalid\n"); |
3701 | return -1; | |
1da177e4 LT |
3702 | break; |
3703 | } | |
3704 | } | |
7c832835 BH |
3705 | if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) |
3706 | return i + 1; | |
1da177e4 LT |
3707 | } |
3708 | return -1; | |
3709 | } | |
3710 | ||
5e216153 MM |
3711 | /* Fill in bucket_map[], given nsgs (the max number of |
3712 | * scatter gather elements supported) and bucket[], | |
3713 | * which is an array of 8 integers. The bucket[] array | |
3714 | * contains 8 different DMA transfer sizes (in 16 | |
3715 | * byte increments) which the controller uses to fetch | |
3716 | * commands. This function fills in bucket_map[], which | |
3717 | * maps a given number of scatter gather elements to one of | |
3718 | * the 8 DMA transfer sizes. The point of it is to allow the | |
3719 | * controller to only do as much DMA as needed to fetch the | |
3720 | * command, with the DMA transfer size encoded in the lower | |
3721 | * bits of the command address. | |
3722 | */ | |
3723 | static void calc_bucket_map(int bucket[], int num_buckets, | |
3724 | int nsgs, int *bucket_map) | |
3725 | { | |
3726 | int i, j, b, size; | |
3727 | ||
3728 | /* even a command with 0 SGs requires 4 blocks */ | |
3729 | #define MINIMUM_TRANSFER_BLOCKS 4 | |
3730 | #define NUM_BUCKETS 8 | |
3731 | /* Note, bucket_map must have nsgs+1 entries. */ | |
3732 | for (i = 0; i <= nsgs; i++) { | |
3733 | /* Compute size of a command with i SG entries */ | |
3734 | size = i + MINIMUM_TRANSFER_BLOCKS; | |
3735 | b = num_buckets; /* Assume the biggest bucket */ | |
3736 | /* Find the bucket that is just big enough */ | |
3737 | for (j = 0; j < 8; j++) { | |
3738 | if (bucket[j] >= size) { | |
3739 | b = j; | |
3740 | break; | |
3741 | } | |
3742 | } | |
3743 | /* for a command with i SG entries, use bucket b. */ | |
3744 | bucket_map[i] = b; | |
3745 | } | |
3746 | } | |
3747 | ||
0f8a6a1e SC |
3748 | static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h) |
3749 | { | |
3750 | int i; | |
3751 | ||
3752 | /* under certain very rare conditions, this can take awhile. | |
3753 | * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right | |
3754 | * as we enter this code.) */ | |
3755 | for (i = 0; i < MAX_CONFIG_WAIT; i++) { | |
3756 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
3757 | break; | |
332c2f80 | 3758 | usleep_range(10000, 20000); |
0f8a6a1e SC |
3759 | } |
3760 | } | |
3761 | ||
b9933135 SC |
3762 | static __devinit void cciss_enter_performant_mode(ctlr_info_t *h) |
3763 | { | |
3764 | /* This is a bit complicated. There are 8 registers on | |
3765 | * the controller which we write to to tell it 8 different | |
3766 | * sizes of commands which there may be. It's a way of | |
3767 | * reducing the DMA done to fetch each command. Encoded into | |
3768 | * each command's tag are 3 bits which communicate to the controller | |
3769 | * which of the eight sizes that command fits within. The size of | |
3770 | * each command depends on how many scatter gather entries there are. | |
3771 | * Each SG entry requires 16 bytes. The eight registers are programmed | |
3772 | * with the number of 16-byte blocks a command of that size requires. | |
3773 | * The smallest command possible requires 5 such 16 byte blocks. | |
3774 | * the largest command possible requires MAXSGENTRIES + 4 16-byte | |
3775 | * blocks. Note, this only extends to the SG entries contained | |
3776 | * within the command block, and does not extend to chained blocks | |
3777 | * of SG elements. bft[] contains the eight values we write to | |
3778 | * the registers. They are not evenly distributed, but have more | |
3779 | * sizes for small commands, and fewer sizes for larger commands. | |
3780 | */ | |
5e216153 | 3781 | __u32 trans_offset; |
b9933135 | 3782 | int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4}; |
5e216153 MM |
3783 | /* |
3784 | * 5 = 1 s/g entry or 4k | |
3785 | * 6 = 2 s/g entry or 8k | |
3786 | * 8 = 4 s/g entry or 16k | |
3787 | * 10 = 6 s/g entry or 24k | |
3788 | */ | |
5e216153 | 3789 | unsigned long register_value; |
5e216153 MM |
3790 | BUILD_BUG_ON(28 > MAXSGENTRIES + 4); |
3791 | ||
5e216153 MM |
3792 | h->reply_pool_wraparound = 1; /* spec: init to 1 */ |
3793 | ||
3794 | /* Controller spec: zero out this buffer. */ | |
3795 | memset(h->reply_pool, 0, h->max_commands * sizeof(__u64)); | |
3796 | h->reply_pool_head = h->reply_pool; | |
3797 | ||
3798 | trans_offset = readl(&(h->cfgtable->TransMethodOffset)); | |
3799 | calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries, | |
3800 | h->blockFetchTable); | |
3801 | writel(bft[0], &h->transtable->BlockFetch0); | |
3802 | writel(bft[1], &h->transtable->BlockFetch1); | |
3803 | writel(bft[2], &h->transtable->BlockFetch2); | |
3804 | writel(bft[3], &h->transtable->BlockFetch3); | |
3805 | writel(bft[4], &h->transtable->BlockFetch4); | |
3806 | writel(bft[5], &h->transtable->BlockFetch5); | |
3807 | writel(bft[6], &h->transtable->BlockFetch6); | |
3808 | writel(bft[7], &h->transtable->BlockFetch7); | |
3809 | ||
3810 | /* size of controller ring buffer */ | |
3811 | writel(h->max_commands, &h->transtable->RepQSize); | |
3812 | writel(1, &h->transtable->RepQCount); | |
3813 | writel(0, &h->transtable->RepQCtrAddrLow32); | |
3814 | writel(0, &h->transtable->RepQCtrAddrHigh32); | |
3815 | writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); | |
3816 | writel(0, &h->transtable->RepQAddr0High32); | |
3817 | writel(CFGTBL_Trans_Performant, | |
3818 | &(h->cfgtable->HostWrite.TransportRequest)); | |
3819 | ||
5e216153 | 3820 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); |
0f8a6a1e | 3821 | cciss_wait_for_mode_change_ack(h); |
5e216153 | 3822 | register_value = readl(&(h->cfgtable->TransportActive)); |
b9933135 | 3823 | if (!(register_value & CFGTBL_Trans_Performant)) |
b2a4a43d | 3824 | dev_warn(&h->pdev->dev, "cciss: unable to get board into" |
5e216153 | 3825 | " performant mode\n"); |
b9933135 SC |
3826 | } |
3827 | ||
3828 | static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h) | |
3829 | { | |
3830 | __u32 trans_support; | |
3831 | ||
3832 | dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n"); | |
3833 | /* Attempt to put controller into performant mode if supported */ | |
3834 | /* Does board support performant mode? */ | |
3835 | trans_support = readl(&(h->cfgtable->TransportSupport)); | |
3836 | if (!(trans_support & PERFORMANT_MODE)) | |
3837 | return; | |
3838 | ||
b2a4a43d | 3839 | dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n"); |
b9933135 SC |
3840 | /* Performant mode demands commands on a 32 byte boundary |
3841 | * pci_alloc_consistent aligns on page boundarys already. | |
3842 | * Just need to check if divisible by 32 | |
3843 | */ | |
3844 | if ((sizeof(CommandList_struct) % 32) != 0) { | |
b2a4a43d | 3845 | dev_warn(&h->pdev->dev, "%s %d %s\n", |
b9933135 SC |
3846 | "cciss info: command size[", |
3847 | (int)sizeof(CommandList_struct), | |
3848 | "] not divisible by 32, no performant mode..\n"); | |
5e216153 MM |
3849 | return; |
3850 | } | |
3851 | ||
b9933135 SC |
3852 | /* Performant mode ring buffer and supporting data structures */ |
3853 | h->reply_pool = (__u64 *)pci_alloc_consistent( | |
3854 | h->pdev, h->max_commands * sizeof(__u64), | |
3855 | &(h->reply_pool_dhandle)); | |
3856 | ||
3857 | /* Need a block fetch table for performant mode */ | |
3858 | h->blockFetchTable = kmalloc(((h->maxsgentries+1) * | |
3859 | sizeof(__u32)), GFP_KERNEL); | |
3860 | ||
3861 | if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL)) | |
3862 | goto clean_up; | |
3863 | ||
3864 | cciss_enter_performant_mode(h); | |
3865 | ||
5e216153 MM |
3866 | /* Change the access methods to the performant access methods */ |
3867 | h->access = SA5_performant_access; | |
b9933135 | 3868 | h->transMethod = CFGTBL_Trans_Performant; |
5e216153 MM |
3869 | |
3870 | return; | |
3871 | clean_up: | |
3872 | kfree(h->blockFetchTable); | |
3873 | if (h->reply_pool) | |
3874 | pci_free_consistent(h->pdev, | |
3875 | h->max_commands * sizeof(__u64), | |
3876 | h->reply_pool, | |
3877 | h->reply_pool_dhandle); | |
3878 | return; | |
3879 | ||
3880 | } /* cciss_put_controller_into_performant_mode */ | |
3881 | ||
fb86a35b MM |
3882 | /* If MSI/MSI-X is supported by the kernel we will try to enable it on |
3883 | * controllers that are capable. If not, we use IO-APIC mode. | |
3884 | */ | |
3885 | ||
f70dba83 | 3886 | static void __devinit cciss_interrupt_mode(ctlr_info_t *h) |
fb86a35b MM |
3887 | { |
3888 | #ifdef CONFIG_PCI_MSI | |
7c832835 BH |
3889 | int err; |
3890 | struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1}, | |
3891 | {0, 2}, {0, 3} | |
3892 | }; | |
fb86a35b MM |
3893 | |
3894 | /* Some boards advertise MSI but don't really support it */ | |
f70dba83 SC |
3895 | if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || |
3896 | (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) | |
fb86a35b MM |
3897 | goto default_int_mode; |
3898 | ||
f70dba83 SC |
3899 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { |
3900 | err = pci_enable_msix(h->pdev, cciss_msix_entries, 4); | |
7c832835 | 3901 | if (!err) { |
f70dba83 SC |
3902 | h->intr[0] = cciss_msix_entries[0].vector; |
3903 | h->intr[1] = cciss_msix_entries[1].vector; | |
3904 | h->intr[2] = cciss_msix_entries[2].vector; | |
3905 | h->intr[3] = cciss_msix_entries[3].vector; | |
3906 | h->msix_vector = 1; | |
7c832835 BH |
3907 | return; |
3908 | } | |
3909 | if (err > 0) { | |
b2a4a43d SC |
3910 | dev_warn(&h->pdev->dev, |
3911 | "only %d MSI-X vectors available\n", err); | |
1ecb9c0f | 3912 | goto default_int_mode; |
7c832835 | 3913 | } else { |
b2a4a43d SC |
3914 | dev_warn(&h->pdev->dev, |
3915 | "MSI-X init failed %d\n", err); | |
1ecb9c0f | 3916 | goto default_int_mode; |
7c832835 BH |
3917 | } |
3918 | } | |
f70dba83 SC |
3919 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { |
3920 | if (!pci_enable_msi(h->pdev)) | |
3921 | h->msi_vector = 1; | |
3922 | else | |
b2a4a43d | 3923 | dev_warn(&h->pdev->dev, "MSI init failed\n"); |
7c832835 | 3924 | } |
1ecb9c0f | 3925 | default_int_mode: |
7c832835 | 3926 | #endif /* CONFIG_PCI_MSI */ |
fb86a35b | 3927 | /* if we get here we're going to use the default interrupt mode */ |
f70dba83 | 3928 | h->intr[PERF_MODE_INT] = h->pdev->irq; |
fb86a35b MM |
3929 | return; |
3930 | } | |
3931 | ||
6539fa9b | 3932 | static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id) |
1da177e4 | 3933 | { |
6539fa9b SC |
3934 | int i; |
3935 | u32 subsystem_vendor_id, subsystem_device_id; | |
2ec24ff1 SC |
3936 | |
3937 | subsystem_vendor_id = pdev->subsystem_vendor; | |
3938 | subsystem_device_id = pdev->subsystem_device; | |
6539fa9b SC |
3939 | *board_id = ((subsystem_device_id << 16) & 0xffff0000) | |
3940 | subsystem_vendor_id; | |
2ec24ff1 | 3941 | |
4205df34 | 3942 | for (i = 0; i < ARRAY_SIZE(products); i++) |
6539fa9b SC |
3943 | if (*board_id == products[i].board_id) |
3944 | return i; | |
6539fa9b SC |
3945 | dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n", |
3946 | *board_id); | |
3947 | return -ENODEV; | |
3948 | } | |
1da177e4 | 3949 | |
dd9c426e SC |
3950 | static inline bool cciss_board_disabled(ctlr_info_t *h) |
3951 | { | |
3952 | u16 command; | |
1da177e4 | 3953 | |
dd9c426e SC |
3954 | (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command); |
3955 | return ((command & PCI_COMMAND_MEMORY) == 0); | |
3956 | } | |
1da177e4 | 3957 | |
d474830d SC |
3958 | static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, |
3959 | unsigned long *memory_bar) | |
3960 | { | |
3961 | int i; | |
4e570309 | 3962 | |
d474830d SC |
3963 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) |
3964 | if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { | |
3965 | /* addressing mode bits already removed */ | |
3966 | *memory_bar = pci_resource_start(pdev, i); | |
3967 | dev_dbg(&pdev->dev, "memory BAR = %lx\n", | |
3968 | *memory_bar); | |
3969 | return 0; | |
3970 | } | |
3971 | dev_warn(&pdev->dev, "no memory BAR found\n"); | |
3972 | return -ENODEV; | |
3973 | } | |
1da177e4 | 3974 | |
afa842fa SC |
3975 | static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev, |
3976 | void __iomem *vaddr, int wait_for_ready) | |
3977 | #define BOARD_READY 1 | |
3978 | #define BOARD_NOT_READY 0 | |
e99ba136 | 3979 | { |
afa842fa | 3980 | int i, iterations; |
e99ba136 | 3981 | u32 scratchpad; |
1da177e4 | 3982 | |
afa842fa SC |
3983 | if (wait_for_ready) |
3984 | iterations = CCISS_BOARD_READY_ITERATIONS; | |
3985 | else | |
3986 | iterations = CCISS_BOARD_NOT_READY_ITERATIONS; | |
3987 | ||
3988 | for (i = 0; i < iterations; i++) { | |
3989 | scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); | |
3990 | if (wait_for_ready) { | |
3991 | if (scratchpad == CCISS_FIRMWARE_READY) | |
3992 | return 0; | |
3993 | } else { | |
3994 | if (scratchpad != CCISS_FIRMWARE_READY) | |
3995 | return 0; | |
3996 | } | |
e99ba136 | 3997 | msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS); |
e1438581 | 3998 | } |
afa842fa | 3999 | dev_warn(&pdev->dev, "board not ready, timed out.\n"); |
e99ba136 SC |
4000 | return -ENODEV; |
4001 | } | |
e1438581 | 4002 | |
8e93bf6d SC |
4003 | static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, |
4004 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | |
4005 | u64 *cfg_offset) | |
4006 | { | |
4007 | *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); | |
4008 | *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); | |
4009 | *cfg_base_addr &= (u32) 0x0000ffff; | |
4010 | *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); | |
4011 | if (*cfg_base_addr_index == -1) { | |
4012 | dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, " | |
4013 | "*cfg_base_addr = 0x%08x\n", *cfg_base_addr); | |
4014 | return -ENODEV; | |
4015 | } | |
4016 | return 0; | |
4017 | } | |
1da177e4 | 4018 | |
4809d098 SC |
4019 | static int __devinit cciss_find_cfgtables(ctlr_info_t *h) |
4020 | { | |
4021 | u64 cfg_offset; | |
4022 | u32 cfg_base_addr; | |
4023 | u64 cfg_base_addr_index; | |
4024 | u32 trans_offset; | |
8e93bf6d | 4025 | int rc; |
1da177e4 | 4026 | |
8e93bf6d SC |
4027 | rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, |
4028 | &cfg_base_addr_index, &cfg_offset); | |
4029 | if (rc) | |
4030 | return rc; | |
4809d098 | 4031 | h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, |
8e93bf6d | 4032 | cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable)); |
4809d098 SC |
4033 | if (!h->cfgtable) |
4034 | return -ENOMEM; | |
4035 | /* Find performant mode table. */ | |
8e93bf6d | 4036 | trans_offset = readl(&h->cfgtable->TransMethodOffset); |
4809d098 SC |
4037 | h->transtable = remap_pci_mem(pci_resource_start(h->pdev, |
4038 | cfg_base_addr_index)+cfg_offset+trans_offset, | |
4039 | sizeof(*h->transtable)); | |
4040 | if (!h->transtable) | |
4041 | return -ENOMEM; | |
4042 | return 0; | |
4043 | } | |
1da177e4 | 4044 | |
adfbc1ff SC |
4045 | static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h) |
4046 | { | |
4047 | h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); | |
186fb9cf SC |
4048 | |
4049 | /* Limit commands in memory limited kdump scenario. */ | |
4050 | if (reset_devices && h->max_commands > 32) | |
4051 | h->max_commands = 32; | |
4052 | ||
adfbc1ff SC |
4053 | if (h->max_commands < 16) { |
4054 | dev_warn(&h->pdev->dev, "Controller reports " | |
4055 | "max supported commands of %d, an obvious lie. " | |
4056 | "Using 16. Ensure that firmware is up to date.\n", | |
4057 | h->max_commands); | |
4058 | h->max_commands = 16; | |
1da177e4 | 4059 | } |
adfbc1ff | 4060 | } |
1da177e4 | 4061 | |
afadbf4b SC |
4062 | /* Interrogate the hardware for some limits: |
4063 | * max commands, max SG elements without chaining, and with chaining, | |
4064 | * SG chain block size, etc. | |
4065 | */ | |
4066 | static void __devinit cciss_find_board_params(ctlr_info_t *h) | |
4067 | { | |
adfbc1ff | 4068 | cciss_get_max_perf_mode_cmds(h); |
afadbf4b SC |
4069 | h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ |
4070 | h->maxsgentries = readl(&(h->cfgtable->MaxSGElements)); | |
5c07a311 | 4071 | /* |
afadbf4b | 4072 | * Limit in-command s/g elements to 32 save dma'able memory. |
5c07a311 DB |
4073 | * Howvever spec says if 0, use 31 |
4074 | */ | |
afadbf4b SC |
4075 | h->max_cmd_sgentries = 31; |
4076 | if (h->maxsgentries > 512) { | |
4077 | h->max_cmd_sgentries = 32; | |
4078 | h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1; | |
4079 | h->maxsgentries--; /* save one for chain pointer */ | |
5c07a311 | 4080 | } else { |
afadbf4b SC |
4081 | h->maxsgentries = 31; /* default to traditional values */ |
4082 | h->chainsize = 0; | |
5c07a311 | 4083 | } |
afadbf4b | 4084 | } |
5c07a311 | 4085 | |
501b92cd SC |
4086 | static inline bool CISS_signature_present(ctlr_info_t *h) |
4087 | { | |
4088 | if ((readb(&h->cfgtable->Signature[0]) != 'C') || | |
4089 | (readb(&h->cfgtable->Signature[1]) != 'I') || | |
4090 | (readb(&h->cfgtable->Signature[2]) != 'S') || | |
4091 | (readb(&h->cfgtable->Signature[3]) != 'S')) { | |
4092 | dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); | |
4093 | return false; | |
1da177e4 | 4094 | } |
501b92cd SC |
4095 | return true; |
4096 | } | |
4097 | ||
322e304c SC |
4098 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ |
4099 | static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h) | |
4100 | { | |
1da177e4 | 4101 | #ifdef CONFIG_X86 |
322e304c SC |
4102 | u32 prefetch; |
4103 | ||
4104 | prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); | |
4105 | prefetch |= 0x100; | |
4106 | writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); | |
1da177e4 | 4107 | #endif |
322e304c | 4108 | } |
1da177e4 | 4109 | |
bfd63ee5 SC |
4110 | /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result |
4111 | * in a prefetch beyond physical memory. | |
4112 | */ | |
4113 | static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h) | |
4114 | { | |
4115 | u32 dma_prefetch; | |
4116 | __u32 dma_refetch; | |
4117 | ||
4118 | if (h->board_id != 0x3225103C) | |
4119 | return; | |
4120 | dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); | |
4121 | dma_prefetch |= 0x8000; | |
4122 | writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); | |
4123 | pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch); | |
4124 | dma_refetch |= 0x1; | |
4125 | pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch); | |
4126 | } | |
4127 | ||
f70dba83 | 4128 | static int __devinit cciss_pci_init(ctlr_info_t *h) |
6539fa9b | 4129 | { |
4809d098 | 4130 | int prod_index, err; |
6539fa9b | 4131 | |
f70dba83 | 4132 | prod_index = cciss_lookup_board_id(h->pdev, &h->board_id); |
6539fa9b | 4133 | if (prod_index < 0) |
2ec24ff1 | 4134 | return -ENODEV; |
f70dba83 SC |
4135 | h->product_name = products[prod_index].product_name; |
4136 | h->access = *(products[prod_index].access); | |
1da177e4 | 4137 | |
f70dba83 | 4138 | if (cciss_board_disabled(h)) { |
b2a4a43d | 4139 | dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); |
c33ac89b | 4140 | return -ENODEV; |
1da177e4 | 4141 | } |
f70dba83 | 4142 | err = pci_enable_device(h->pdev); |
7c832835 | 4143 | if (err) { |
b2a4a43d | 4144 | dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n"); |
c33ac89b | 4145 | return err; |
f92e2f5f MM |
4146 | } |
4147 | ||
f70dba83 | 4148 | err = pci_request_regions(h->pdev, "cciss"); |
4e570309 | 4149 | if (err) { |
b2a4a43d SC |
4150 | dev_warn(&h->pdev->dev, |
4151 | "Cannot obtain PCI resources, aborting\n"); | |
872225ca | 4152 | return err; |
4e570309 | 4153 | } |
1da177e4 | 4154 | |
b2a4a43d SC |
4155 | dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq); |
4156 | dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id); | |
1da177e4 | 4157 | |
fb86a35b MM |
4158 | /* If the kernel supports MSI/MSI-X we will try to enable that functionality, |
4159 | * else we use the IO-APIC interrupt assigned to us by system ROM. | |
4160 | */ | |
f70dba83 SC |
4161 | cciss_interrupt_mode(h); |
4162 | err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr); | |
d474830d | 4163 | if (err) |
e1438581 | 4164 | goto err_out_free_res; |
f70dba83 SC |
4165 | h->vaddr = remap_pci_mem(h->paddr, 0x250); |
4166 | if (!h->vaddr) { | |
da550321 SC |
4167 | err = -ENOMEM; |
4168 | goto err_out_free_res; | |
7c832835 | 4169 | } |
afa842fa | 4170 | err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); |
e99ba136 | 4171 | if (err) |
4e570309 | 4172 | goto err_out_free_res; |
f70dba83 | 4173 | err = cciss_find_cfgtables(h); |
4809d098 | 4174 | if (err) |
4e570309 | 4175 | goto err_out_free_res; |
b2a4a43d | 4176 | print_cfg_table(h); |
f70dba83 | 4177 | cciss_find_board_params(h); |
1da177e4 | 4178 | |
f70dba83 | 4179 | if (!CISS_signature_present(h)) { |
c33ac89b | 4180 | err = -ENODEV; |
4e570309 | 4181 | goto err_out_free_res; |
1da177e4 | 4182 | } |
f70dba83 SC |
4183 | cciss_enable_scsi_prefetch(h); |
4184 | cciss_p600_dma_prefetch_quirk(h); | |
4185 | cciss_put_controller_into_performant_mode(h); | |
1da177e4 LT |
4186 | return 0; |
4187 | ||
5faad620 | 4188 | err_out_free_res: |
872225ca MM |
4189 | /* |
4190 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4191 | * Smart Array controllers that pci_enable_device does not undo | |
4192 | */ | |
f70dba83 SC |
4193 | if (h->transtable) |
4194 | iounmap(h->transtable); | |
4195 | if (h->cfgtable) | |
4196 | iounmap(h->cfgtable); | |
4197 | if (h->vaddr) | |
4198 | iounmap(h->vaddr); | |
4199 | pci_release_regions(h->pdev); | |
c33ac89b | 4200 | return err; |
1da177e4 LT |
4201 | } |
4202 | ||
6ae5ce8e MM |
4203 | /* Function to find the first free pointer into our hba[] array |
4204 | * Returns -1 if no free entries are left. | |
7c832835 | 4205 | */ |
b2a4a43d | 4206 | static int alloc_cciss_hba(struct pci_dev *pdev) |
1da177e4 | 4207 | { |
799202cb | 4208 | int i; |
1da177e4 | 4209 | |
7c832835 | 4210 | for (i = 0; i < MAX_CTLR; i++) { |
1da177e4 | 4211 | if (!hba[i]) { |
f70dba83 | 4212 | ctlr_info_t *h; |
f2912a12 | 4213 | |
f70dba83 SC |
4214 | h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL); |
4215 | if (!h) | |
1da177e4 | 4216 | goto Enomem; |
f70dba83 | 4217 | hba[i] = h; |
1da177e4 LT |
4218 | return i; |
4219 | } | |
4220 | } | |
b2a4a43d | 4221 | dev_warn(&pdev->dev, "This driver supports a maximum" |
7c832835 | 4222 | " of %d controllers.\n", MAX_CTLR); |
799202cb MM |
4223 | return -1; |
4224 | Enomem: | |
b2a4a43d | 4225 | dev_warn(&pdev->dev, "out of memory.\n"); |
1da177e4 LT |
4226 | return -1; |
4227 | } | |
4228 | ||
f70dba83 | 4229 | static void free_hba(ctlr_info_t *h) |
1da177e4 | 4230 | { |
2c935593 | 4231 | int i; |
1da177e4 | 4232 | |
f70dba83 | 4233 | hba[h->ctlr] = NULL; |
2c935593 SC |
4234 | for (i = 0; i < h->highest_lun + 1; i++) |
4235 | if (h->gendisk[i] != NULL) | |
4236 | put_disk(h->gendisk[i]); | |
4237 | kfree(h); | |
1da177e4 LT |
4238 | } |
4239 | ||
82eb03cf CC |
4240 | /* Send a message CDB to the firmware. */ |
4241 | static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type) | |
4242 | { | |
4243 | typedef struct { | |
4244 | CommandListHeader_struct CommandHeader; | |
4245 | RequestBlock_struct Request; | |
4246 | ErrDescriptor_struct ErrorDescriptor; | |
4247 | } Command; | |
4248 | static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct); | |
4249 | Command *cmd; | |
4250 | dma_addr_t paddr64; | |
4251 | uint32_t paddr32, tag; | |
4252 | void __iomem *vaddr; | |
4253 | int i, err; | |
4254 | ||
4255 | vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); | |
4256 | if (vaddr == NULL) | |
4257 | return -ENOMEM; | |
4258 | ||
4259 | /* The Inbound Post Queue only accepts 32-bit physical addresses for the | |
4260 | CCISS commands, so they must be allocated from the lower 4GiB of | |
4261 | memory. */ | |
e930438c | 4262 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
82eb03cf CC |
4263 | if (err) { |
4264 | iounmap(vaddr); | |
4265 | return -ENOMEM; | |
4266 | } | |
4267 | ||
4268 | cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); | |
4269 | if (cmd == NULL) { | |
4270 | iounmap(vaddr); | |
4271 | return -ENOMEM; | |
4272 | } | |
4273 | ||
4274 | /* This must fit, because of the 32-bit consistent DMA mask. Also, | |
4275 | although there's no guarantee, we assume that the address is at | |
4276 | least 4-byte aligned (most likely, it's page-aligned). */ | |
4277 | paddr32 = paddr64; | |
4278 | ||
4279 | cmd->CommandHeader.ReplyQueue = 0; | |
4280 | cmd->CommandHeader.SGList = 0; | |
4281 | cmd->CommandHeader.SGTotal = 0; | |
4282 | cmd->CommandHeader.Tag.lower = paddr32; | |
4283 | cmd->CommandHeader.Tag.upper = 0; | |
4284 | memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); | |
4285 | ||
4286 | cmd->Request.CDBLen = 16; | |
4287 | cmd->Request.Type.Type = TYPE_MSG; | |
4288 | cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; | |
4289 | cmd->Request.Type.Direction = XFER_NONE; | |
4290 | cmd->Request.Timeout = 0; /* Don't time out */ | |
4291 | cmd->Request.CDB[0] = opcode; | |
4292 | cmd->Request.CDB[1] = type; | |
4293 | memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */ | |
4294 | ||
4295 | cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command); | |
4296 | cmd->ErrorDescriptor.Addr.upper = 0; | |
4297 | cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct); | |
4298 | ||
4299 | writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); | |
4300 | ||
4301 | for (i = 0; i < 10; i++) { | |
4302 | tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); | |
4303 | if ((tag & ~3) == paddr32) | |
4304 | break; | |
4305 | schedule_timeout_uninterruptible(HZ); | |
4306 | } | |
4307 | ||
4308 | iounmap(vaddr); | |
4309 | ||
4310 | /* we leak the DMA buffer here ... no choice since the controller could | |
4311 | still complete the command. */ | |
4312 | if (i == 10) { | |
b2a4a43d SC |
4313 | dev_err(&pdev->dev, |
4314 | "controller message %02x:%02x timed out\n", | |
82eb03cf CC |
4315 | opcode, type); |
4316 | return -ETIMEDOUT; | |
4317 | } | |
4318 | ||
4319 | pci_free_consistent(pdev, cmd_sz, cmd, paddr64); | |
4320 | ||
4321 | if (tag & 2) { | |
b2a4a43d | 4322 | dev_err(&pdev->dev, "controller message %02x:%02x failed\n", |
82eb03cf CC |
4323 | opcode, type); |
4324 | return -EIO; | |
4325 | } | |
4326 | ||
b2a4a43d | 4327 | dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", |
82eb03cf CC |
4328 | opcode, type); |
4329 | return 0; | |
4330 | } | |
4331 | ||
4332 | #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0) | |
4333 | #define cciss_noop(p) cciss_message(p, 3, 0) | |
4334 | ||
a6528d01 SC |
4335 | static int cciss_controller_hard_reset(struct pci_dev *pdev, |
4336 | void * __iomem vaddr, bool use_doorbell) | |
82eb03cf | 4337 | { |
a6528d01 SC |
4338 | u16 pmcsr; |
4339 | int pos; | |
82eb03cf | 4340 | |
a6528d01 SC |
4341 | if (use_doorbell) { |
4342 | /* For everything after the P600, the PCI power state method | |
4343 | * of resetting the controller doesn't work, so we have this | |
4344 | * other way using the doorbell register. | |
4345 | */ | |
4346 | dev_info(&pdev->dev, "using doorbell to reset controller\n"); | |
4347 | writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL); | |
4348 | msleep(1000); | |
4349 | } else { /* Try to do it the PCI power state way */ | |
4350 | ||
4351 | /* Quoting from the Open CISS Specification: "The Power | |
4352 | * Management Control/Status Register (CSR) controls the power | |
4353 | * state of the device. The normal operating state is D0, | |
4354 | * CSR=00h. The software off state is D3, CSR=03h. To reset | |
4355 | * the controller, place the interface device in D3 then to D0, | |
4356 | * this causes a secondary PCI reset which will reset the | |
4357 | * controller." */ | |
4358 | ||
4359 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); | |
4360 | if (pos == 0) { | |
4361 | dev_err(&pdev->dev, | |
4362 | "cciss_controller_hard_reset: " | |
4363 | "PCI PM not supported\n"); | |
4364 | return -ENODEV; | |
4365 | } | |
4366 | dev_info(&pdev->dev, "using PCI PM to reset controller\n"); | |
4367 | /* enter the D3hot power management state */ | |
4368 | pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); | |
4369 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | |
4370 | pmcsr |= PCI_D3hot; | |
4371 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | |
82eb03cf | 4372 | |
a6528d01 | 4373 | msleep(500); |
82eb03cf | 4374 | |
a6528d01 SC |
4375 | /* enter the D0 power management state */ |
4376 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | |
4377 | pmcsr |= PCI_D0; | |
4378 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | |
82eb03cf | 4379 | |
a6528d01 SC |
4380 | msleep(500); |
4381 | } | |
4382 | return 0; | |
4383 | } | |
82eb03cf | 4384 | |
a6528d01 SC |
4385 | /* This does a hard reset of the controller using PCI power management |
4386 | * states or using the doorbell register. */ | |
4387 | static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev) | |
4388 | { | |
a6528d01 SC |
4389 | u64 cfg_offset; |
4390 | u32 cfg_base_addr; | |
4391 | u64 cfg_base_addr_index; | |
4392 | void __iomem *vaddr; | |
4393 | unsigned long paddr; | |
4394 | u32 misc_fw_support, active_transport; | |
f442e64b | 4395 | int rc; |
a6528d01 SC |
4396 | CfgTable_struct __iomem *cfgtable; |
4397 | bool use_doorbell; | |
058a0f9f | 4398 | u32 board_id; |
f442e64b | 4399 | u16 command_register; |
a6528d01 SC |
4400 | |
4401 | /* For controllers as old a the p600, this is very nearly | |
4402 | * the same thing as | |
4403 | * | |
4404 | * pci_save_state(pci_dev); | |
4405 | * pci_set_power_state(pci_dev, PCI_D3hot); | |
4406 | * pci_set_power_state(pci_dev, PCI_D0); | |
4407 | * pci_restore_state(pci_dev); | |
4408 | * | |
a6528d01 SC |
4409 | * For controllers newer than the P600, the pci power state |
4410 | * method of resetting doesn't work so we have another way | |
4411 | * using the doorbell register. | |
4412 | */ | |
82eb03cf | 4413 | |
058a0f9f SC |
4414 | /* Exclude 640x boards. These are two pci devices in one slot |
4415 | * which share a battery backed cache module. One controls the | |
4416 | * cache, the other accesses the cache through the one that controls | |
4417 | * it. If we reset the one controlling the cache, the other will | |
4418 | * likely not be happy. Just forbid resetting this conjoined mess. | |
4419 | */ | |
4420 | cciss_lookup_board_id(pdev, &board_id); | |
4421 | if (board_id == 0x409C0E11 || board_id == 0x409D0E11) { | |
4422 | dev_warn(&pdev->dev, "Cannot reset Smart Array 640x " | |
4423 | "due to shared cache module."); | |
82eb03cf CC |
4424 | return -ENODEV; |
4425 | } | |
4426 | ||
f442e64b SC |
4427 | /* Save the PCI command register */ |
4428 | pci_read_config_word(pdev, 4, &command_register); | |
4429 | /* Turn the board off. This is so that later pci_restore_state() | |
4430 | * won't turn the board on before the rest of config space is ready. | |
4431 | */ | |
4432 | pci_disable_device(pdev); | |
4433 | pci_save_state(pdev); | |
82eb03cf | 4434 | |
a6528d01 SC |
4435 | /* find the first memory BAR, so we can find the cfg table */ |
4436 | rc = cciss_pci_find_memory_BAR(pdev, &paddr); | |
4437 | if (rc) | |
4438 | return rc; | |
4439 | vaddr = remap_pci_mem(paddr, 0x250); | |
4440 | if (!vaddr) | |
4441 | return -ENOMEM; | |
82eb03cf | 4442 | |
a6528d01 SC |
4443 | /* find cfgtable in order to check if reset via doorbell is supported */ |
4444 | rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, | |
4445 | &cfg_base_addr_index, &cfg_offset); | |
4446 | if (rc) | |
4447 | goto unmap_vaddr; | |
4448 | cfgtable = remap_pci_mem(pci_resource_start(pdev, | |
4449 | cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); | |
4450 | if (!cfgtable) { | |
4451 | rc = -ENOMEM; | |
4452 | goto unmap_vaddr; | |
4453 | } | |
82eb03cf | 4454 | |
a6528d01 SC |
4455 | /* If reset via doorbell register is supported, use that. */ |
4456 | misc_fw_support = readl(&cfgtable->misc_fw_support); | |
4457 | use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; | |
82eb03cf | 4458 | |
75230ff2 SC |
4459 | /* The doorbell reset seems to cause lockups on some Smart |
4460 | * Arrays (e.g. P410, P410i, maybe others). Until this is | |
4461 | * fixed or at least isolated, avoid the doorbell reset. | |
4462 | */ | |
4463 | use_doorbell = 0; | |
4464 | ||
a6528d01 SC |
4465 | rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell); |
4466 | if (rc) | |
4467 | goto unmap_cfgtable; | |
f442e64b SC |
4468 | pci_restore_state(pdev); |
4469 | rc = pci_enable_device(pdev); | |
4470 | if (rc) { | |
4471 | dev_warn(&pdev->dev, "failed to enable device.\n"); | |
4472 | goto unmap_cfgtable; | |
82eb03cf | 4473 | } |
f442e64b | 4474 | pci_write_config_word(pdev, 4, command_register); |
82eb03cf | 4475 | |
a6528d01 SC |
4476 | /* Some devices (notably the HP Smart Array 5i Controller) |
4477 | need a little pause here */ | |
4478 | msleep(CCISS_POST_RESET_PAUSE_MSECS); | |
4479 | ||
afa842fa SC |
4480 | /* Wait for board to become not ready, then ready. */ |
4481 | dev_info(&pdev->dev, "Waiting for board to become ready.\n"); | |
4482 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); | |
4483 | if (rc) /* Don't bail, might be E500, etc. which can't be reset */ | |
4484 | dev_warn(&pdev->dev, | |
4485 | "failed waiting for board to become not ready\n"); | |
4486 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY); | |
4487 | if (rc) { | |
4488 | dev_warn(&pdev->dev, | |
4489 | "failed waiting for board to become ready\n"); | |
4490 | goto unmap_cfgtable; | |
4491 | } | |
4492 | dev_info(&pdev->dev, "board ready.\n"); | |
4493 | ||
a6528d01 SC |
4494 | /* Controller should be in simple mode at this point. If it's not, |
4495 | * It means we're on one of those controllers which doesn't support | |
4496 | * the doorbell reset method and on which the PCI power management reset | |
4497 | * method doesn't work (P800, for example.) | |
4498 | * In those cases, don't try to proceed, as it generally doesn't work. | |
4499 | */ | |
4500 | active_transport = readl(&cfgtable->TransportActive); | |
4501 | if (active_transport & PERFORMANT_MODE) { | |
4502 | dev_warn(&pdev->dev, "Unable to successfully reset controller," | |
4503 | " Ignoring controller.\n"); | |
4504 | rc = -ENODEV; | |
4505 | } | |
4506 | ||
4507 | unmap_cfgtable: | |
4508 | iounmap(cfgtable); | |
4509 | ||
4510 | unmap_vaddr: | |
4511 | iounmap(vaddr); | |
4512 | return rc; | |
82eb03cf CC |
4513 | } |
4514 | ||
83123cb1 SC |
4515 | static __devinit int cciss_init_reset_devices(struct pci_dev *pdev) |
4516 | { | |
a6528d01 | 4517 | int rc, i; |
83123cb1 SC |
4518 | |
4519 | if (!reset_devices) | |
4520 | return 0; | |
4521 | ||
a6528d01 SC |
4522 | /* Reset the controller with a PCI power-cycle or via doorbell */ |
4523 | rc = cciss_kdump_hard_reset_controller(pdev); | |
83123cb1 | 4524 | |
a6528d01 SC |
4525 | /* -ENOTSUPP here means we cannot reset the controller |
4526 | * but it's already (and still) up and running in | |
058a0f9f SC |
4527 | * "performant mode". Or, it might be 640x, which can't reset |
4528 | * due to concerns about shared bbwc between 6402/6404 pair. | |
a6528d01 SC |
4529 | */ |
4530 | if (rc == -ENOTSUPP) | |
4531 | return 0; /* just try to do the kdump anyhow. */ | |
4532 | if (rc) | |
4533 | return -ENODEV; | |
83123cb1 SC |
4534 | |
4535 | /* Now try to get the controller to respond to a no-op */ | |
4536 | for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) { | |
4537 | if (cciss_noop(pdev) == 0) | |
4538 | break; | |
4539 | else | |
4540 | dev_warn(&pdev->dev, "no-op failed%s\n", | |
4541 | (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ? | |
4542 | "; re-trying" : "")); | |
4543 | msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS); | |
4544 | } | |
82eb03cf CC |
4545 | return 0; |
4546 | } | |
4547 | ||
1da177e4 LT |
4548 | /* |
4549 | * This is it. Find all the controllers and register them. I really hate | |
4550 | * stealing all these major device numbers. | |
4551 | * returns the number of block devices registered. | |
4552 | */ | |
4553 | static int __devinit cciss_init_one(struct pci_dev *pdev, | |
7c832835 | 4554 | const struct pci_device_id *ent) |
1da177e4 | 4555 | { |
1da177e4 | 4556 | int i; |
799202cb | 4557 | int j = 0; |
5c07a311 | 4558 | int k = 0; |
1da177e4 | 4559 | int rc; |
22bece00 | 4560 | int dac, return_code; |
212a5026 | 4561 | InquiryData_struct *inq_buff; |
f70dba83 | 4562 | ctlr_info_t *h; |
1da177e4 | 4563 | |
83123cb1 SC |
4564 | rc = cciss_init_reset_devices(pdev); |
4565 | if (rc) | |
4566 | return rc; | |
b2a4a43d | 4567 | i = alloc_cciss_hba(pdev); |
7c832835 | 4568 | if (i < 0) |
e2019b58 | 4569 | return -1; |
1f8ef380 | 4570 | |
f70dba83 SC |
4571 | h = hba[i]; |
4572 | h->pdev = pdev; | |
4573 | h->busy_initializing = 1; | |
4574 | INIT_HLIST_HEAD(&h->cmpQ); | |
4575 | INIT_HLIST_HEAD(&h->reqQ); | |
4576 | mutex_init(&h->busy_shutting_down); | |
1f8ef380 | 4577 | |
f70dba83 | 4578 | if (cciss_pci_init(h) != 0) |
2cfa948c | 4579 | goto clean_no_release_regions; |
1da177e4 | 4580 | |
f70dba83 SC |
4581 | sprintf(h->devname, "cciss%d", i); |
4582 | h->ctlr = i; | |
1da177e4 | 4583 | |
f70dba83 | 4584 | init_completion(&h->scan_wait); |
b368c9dd | 4585 | |
f70dba83 | 4586 | if (cciss_create_hba_sysfs_entry(h)) |
7fe06326 AP |
4587 | goto clean0; |
4588 | ||
1da177e4 | 4589 | /* configure PCI DMA stuff */ |
6a35528a | 4590 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
40aabb58 | 4591 | dac = 1; |
284901a9 | 4592 | else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
40aabb58 | 4593 | dac = 0; |
1da177e4 | 4594 | else { |
b2a4a43d | 4595 | dev_err(&h->pdev->dev, "no suitable DMA available\n"); |
1da177e4 LT |
4596 | goto clean1; |
4597 | } | |
4598 | ||
4599 | /* | |
4600 | * register with the major number, or get a dynamic major number | |
4601 | * by passing 0 as argument. This is done for greater than | |
4602 | * 8 controller support. | |
4603 | */ | |
4604 | if (i < MAX_CTLR_ORIG) | |
f70dba83 SC |
4605 | h->major = COMPAQ_CISS_MAJOR + i; |
4606 | rc = register_blkdev(h->major, h->devname); | |
7c832835 | 4607 | if (rc == -EBUSY || rc == -EINVAL) { |
b2a4a43d SC |
4608 | dev_err(&h->pdev->dev, |
4609 | "Unable to get major number %d for %s " | |
f70dba83 | 4610 | "on hba %d\n", h->major, h->devname, i); |
1da177e4 | 4611 | goto clean1; |
7c832835 | 4612 | } else { |
1da177e4 | 4613 | if (i >= MAX_CTLR_ORIG) |
f70dba83 | 4614 | h->major = rc; |
1da177e4 LT |
4615 | } |
4616 | ||
4617 | /* make sure the board interrupts are off */ | |
f70dba83 SC |
4618 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
4619 | if (h->msi_vector || h->msix_vector) { | |
4620 | if (request_irq(h->intr[PERF_MODE_INT], | |
0c2b3908 | 4621 | do_cciss_msix_intr, |
f70dba83 | 4622 | IRQF_DISABLED, h->devname, h)) { |
b2a4a43d | 4623 | dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", |
f70dba83 | 4624 | h->intr[PERF_MODE_INT], h->devname); |
0c2b3908 MM |
4625 | goto clean2; |
4626 | } | |
4627 | } else { | |
f70dba83 SC |
4628 | if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx, |
4629 | IRQF_DISABLED, h->devname, h)) { | |
b2a4a43d | 4630 | dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", |
f70dba83 | 4631 | h->intr[PERF_MODE_INT], h->devname); |
0c2b3908 MM |
4632 | goto clean2; |
4633 | } | |
1da177e4 | 4634 | } |
40aabb58 | 4635 | |
b2a4a43d | 4636 | dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", |
f70dba83 SC |
4637 | h->devname, pdev->device, pci_name(pdev), |
4638 | h->intr[PERF_MODE_INT], dac ? "" : " not"); | |
7c832835 | 4639 | |
f70dba83 SC |
4640 | h->cmd_pool_bits = |
4641 | kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) | |
061837bc | 4642 | * sizeof(unsigned long), GFP_KERNEL); |
f70dba83 SC |
4643 | h->cmd_pool = (CommandList_struct *) |
4644 | pci_alloc_consistent(h->pdev, | |
4645 | h->nr_cmds * sizeof(CommandList_struct), | |
4646 | &(h->cmd_pool_dhandle)); | |
4647 | h->errinfo_pool = (ErrorInfo_struct *) | |
4648 | pci_alloc_consistent(h->pdev, | |
4649 | h->nr_cmds * sizeof(ErrorInfo_struct), | |
4650 | &(h->errinfo_pool_dhandle)); | |
4651 | if ((h->cmd_pool_bits == NULL) | |
4652 | || (h->cmd_pool == NULL) | |
4653 | || (h->errinfo_pool == NULL)) { | |
b2a4a43d | 4654 | dev_err(&h->pdev->dev, "out of memory"); |
1da177e4 LT |
4655 | goto clean4; |
4656 | } | |
5c07a311 DB |
4657 | |
4658 | /* Need space for temp scatter list */ | |
f70dba83 | 4659 | h->scatter_list = kmalloc(h->max_commands * |
5c07a311 DB |
4660 | sizeof(struct scatterlist *), |
4661 | GFP_KERNEL); | |
4ee69851 DC |
4662 | if (!h->scatter_list) |
4663 | goto clean4; | |
4664 | ||
f70dba83 SC |
4665 | for (k = 0; k < h->nr_cmds; k++) { |
4666 | h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) * | |
4667 | h->maxsgentries, | |
5c07a311 | 4668 | GFP_KERNEL); |
f70dba83 | 4669 | if (h->scatter_list[k] == NULL) { |
b2a4a43d SC |
4670 | dev_err(&h->pdev->dev, |
4671 | "could not allocate s/g lists\n"); | |
5c07a311 DB |
4672 | goto clean4; |
4673 | } | |
4674 | } | |
f70dba83 SC |
4675 | h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h, |
4676 | h->chainsize, h->nr_cmds); | |
4677 | if (!h->cmd_sg_list && h->chainsize > 0) | |
5c07a311 | 4678 | goto clean4; |
5c07a311 | 4679 | |
f70dba83 | 4680 | spin_lock_init(&h->lock); |
1da177e4 | 4681 | |
7c832835 | 4682 | /* Initialize the pdev driver private data. |
f70dba83 SC |
4683 | have it point to h. */ |
4684 | pci_set_drvdata(pdev, h); | |
7c832835 BH |
4685 | /* command and error info recs zeroed out before |
4686 | they are used */ | |
f70dba83 SC |
4687 | memset(h->cmd_pool_bits, 0, |
4688 | DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) | |
061837bc | 4689 | * sizeof(unsigned long)); |
1da177e4 | 4690 | |
f70dba83 SC |
4691 | h->num_luns = 0; |
4692 | h->highest_lun = -1; | |
6ae5ce8e | 4693 | for (j = 0; j < CISS_MAX_LUN; j++) { |
f70dba83 SC |
4694 | h->drv[j] = NULL; |
4695 | h->gendisk[j] = NULL; | |
6ae5ce8e | 4696 | } |
1da177e4 | 4697 | |
f70dba83 | 4698 | cciss_scsi_setup(h); |
1da177e4 LT |
4699 | |
4700 | /* Turn the interrupts on so we can service requests */ | |
f70dba83 | 4701 | h->access.set_intr_mask(h, CCISS_INTR_ON); |
1da177e4 | 4702 | |
22bece00 MM |
4703 | /* Get the firmware version */ |
4704 | inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
4705 | if (inq_buff == NULL) { | |
b2a4a43d | 4706 | dev_err(&h->pdev->dev, "out of memory\n"); |
22bece00 MM |
4707 | goto clean4; |
4708 | } | |
4709 | ||
f70dba83 | 4710 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, |
b57695fe | 4711 | sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD); |
22bece00 | 4712 | if (return_code == IO_OK) { |
f70dba83 SC |
4713 | h->firm_ver[0] = inq_buff->data_byte[32]; |
4714 | h->firm_ver[1] = inq_buff->data_byte[33]; | |
4715 | h->firm_ver[2] = inq_buff->data_byte[34]; | |
4716 | h->firm_ver[3] = inq_buff->data_byte[35]; | |
22bece00 | 4717 | } else { /* send command failed */ |
b2a4a43d | 4718 | dev_warn(&h->pdev->dev, "unable to determine firmware" |
22bece00 MM |
4719 | " version of controller\n"); |
4720 | } | |
212a5026 | 4721 | kfree(inq_buff); |
22bece00 | 4722 | |
f70dba83 | 4723 | cciss_procinit(h); |
92c4231a | 4724 | |
f70dba83 | 4725 | h->cciss_max_sectors = 8192; |
92c4231a | 4726 | |
f70dba83 SC |
4727 | rebuild_lun_table(h, 1, 0); |
4728 | h->busy_initializing = 0; | |
e2019b58 | 4729 | return 1; |
1da177e4 | 4730 | |
6ae5ce8e | 4731 | clean4: |
f70dba83 | 4732 | kfree(h->cmd_pool_bits); |
5c07a311 | 4733 | /* Free up sg elements */ |
b0722cb1 | 4734 | for (k-- ; k >= 0; k--) |
f70dba83 SC |
4735 | kfree(h->scatter_list[k]); |
4736 | kfree(h->scatter_list); | |
4737 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); | |
4738 | if (h->cmd_pool) | |
4739 | pci_free_consistent(h->pdev, | |
4740 | h->nr_cmds * sizeof(CommandList_struct), | |
4741 | h->cmd_pool, h->cmd_pool_dhandle); | |
4742 | if (h->errinfo_pool) | |
4743 | pci_free_consistent(h->pdev, | |
4744 | h->nr_cmds * sizeof(ErrorInfo_struct), | |
4745 | h->errinfo_pool, | |
4746 | h->errinfo_pool_dhandle); | |
4747 | free_irq(h->intr[PERF_MODE_INT], h); | |
6ae5ce8e | 4748 | clean2: |
f70dba83 | 4749 | unregister_blkdev(h->major, h->devname); |
6ae5ce8e | 4750 | clean1: |
f70dba83 | 4751 | cciss_destroy_hba_sysfs_entry(h); |
7fe06326 | 4752 | clean0: |
2cfa948c SC |
4753 | pci_release_regions(pdev); |
4754 | clean_no_release_regions: | |
f70dba83 | 4755 | h->busy_initializing = 0; |
9cef0d2f | 4756 | |
872225ca MM |
4757 | /* |
4758 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4759 | * Smart Array controllers that pci_enable_device does not undo | |
4760 | */ | |
799202cb | 4761 | pci_set_drvdata(pdev, NULL); |
f70dba83 | 4762 | free_hba(h); |
e2019b58 | 4763 | return -1; |
1da177e4 LT |
4764 | } |
4765 | ||
e9ca75b5 | 4766 | static void cciss_shutdown(struct pci_dev *pdev) |
1da177e4 | 4767 | { |
29009a03 SC |
4768 | ctlr_info_t *h; |
4769 | char *flush_buf; | |
7c832835 | 4770 | int return_code; |
1da177e4 | 4771 | |
29009a03 SC |
4772 | h = pci_get_drvdata(pdev); |
4773 | flush_buf = kzalloc(4, GFP_KERNEL); | |
4774 | if (!flush_buf) { | |
b2a4a43d | 4775 | dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n"); |
e9ca75b5 | 4776 | return; |
e9ca75b5 | 4777 | } |
29009a03 SC |
4778 | /* write all data in the battery backed cache to disk */ |
4779 | memset(flush_buf, 0, 4); | |
f70dba83 | 4780 | return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, |
29009a03 SC |
4781 | 4, 0, CTLR_LUNID, TYPE_CMD); |
4782 | kfree(flush_buf); | |
4783 | if (return_code != IO_OK) | |
b2a4a43d | 4784 | dev_warn(&h->pdev->dev, "Error flushing cache\n"); |
29009a03 | 4785 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
5e216153 | 4786 | free_irq(h->intr[PERF_MODE_INT], h); |
e9ca75b5 GB |
4787 | } |
4788 | ||
4789 | static void __devexit cciss_remove_one(struct pci_dev *pdev) | |
4790 | { | |
f70dba83 | 4791 | ctlr_info_t *h; |
e9ca75b5 GB |
4792 | int i, j; |
4793 | ||
7c832835 | 4794 | if (pci_get_drvdata(pdev) == NULL) { |
b2a4a43d | 4795 | dev_err(&pdev->dev, "Unable to remove device\n"); |
1da177e4 LT |
4796 | return; |
4797 | } | |
0a9279cc | 4798 | |
f70dba83 SC |
4799 | h = pci_get_drvdata(pdev); |
4800 | i = h->ctlr; | |
7c832835 | 4801 | if (hba[i] == NULL) { |
b2a4a43d | 4802 | dev_err(&pdev->dev, "device appears to already be removed\n"); |
1da177e4 LT |
4803 | return; |
4804 | } | |
b6550777 | 4805 | |
f70dba83 | 4806 | mutex_lock(&h->busy_shutting_down); |
0a9279cc | 4807 | |
f70dba83 SC |
4808 | remove_from_scan_list(h); |
4809 | remove_proc_entry(h->devname, proc_cciss); | |
4810 | unregister_blkdev(h->major, h->devname); | |
b6550777 BH |
4811 | |
4812 | /* remove it from the disk list */ | |
4813 | for (j = 0; j < CISS_MAX_LUN; j++) { | |
f70dba83 | 4814 | struct gendisk *disk = h->gendisk[j]; |
b6550777 | 4815 | if (disk) { |
165125e1 | 4816 | struct request_queue *q = disk->queue; |
b6550777 | 4817 | |
097d0264 | 4818 | if (disk->flags & GENHD_FL_UP) { |
f70dba83 | 4819 | cciss_destroy_ld_sysfs_entry(h, j, 1); |
b6550777 | 4820 | del_gendisk(disk); |
097d0264 | 4821 | } |
b6550777 BH |
4822 | if (q) |
4823 | blk_cleanup_queue(q); | |
4824 | } | |
4825 | } | |
4826 | ||
ba198efb | 4827 | #ifdef CONFIG_CISS_SCSI_TAPE |
f70dba83 | 4828 | cciss_unregister_scsi(h); /* unhook from SCSI subsystem */ |
ba198efb | 4829 | #endif |
b6550777 | 4830 | |
e9ca75b5 | 4831 | cciss_shutdown(pdev); |
fb86a35b MM |
4832 | |
4833 | #ifdef CONFIG_PCI_MSI | |
f70dba83 SC |
4834 | if (h->msix_vector) |
4835 | pci_disable_msix(h->pdev); | |
4836 | else if (h->msi_vector) | |
4837 | pci_disable_msi(h->pdev); | |
7c832835 | 4838 | #endif /* CONFIG_PCI_MSI */ |
fb86a35b | 4839 | |
f70dba83 SC |
4840 | iounmap(h->transtable); |
4841 | iounmap(h->cfgtable); | |
4842 | iounmap(h->vaddr); | |
1da177e4 | 4843 | |
f70dba83 SC |
4844 | pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct), |
4845 | h->cmd_pool, h->cmd_pool_dhandle); | |
4846 | pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct), | |
4847 | h->errinfo_pool, h->errinfo_pool_dhandle); | |
4848 | kfree(h->cmd_pool_bits); | |
5c07a311 | 4849 | /* Free up sg elements */ |
f70dba83 SC |
4850 | for (j = 0; j < h->nr_cmds; j++) |
4851 | kfree(h->scatter_list[j]); | |
4852 | kfree(h->scatter_list); | |
4853 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); | |
872225ca MM |
4854 | /* |
4855 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4856 | * Smart Array controllers that pci_enable_device does not undo | |
4857 | */ | |
7c832835 | 4858 | pci_release_regions(pdev); |
4e570309 | 4859 | pci_set_drvdata(pdev, NULL); |
f70dba83 SC |
4860 | cciss_destroy_hba_sysfs_entry(h); |
4861 | mutex_unlock(&h->busy_shutting_down); | |
4862 | free_hba(h); | |
7c832835 | 4863 | } |
1da177e4 LT |
4864 | |
4865 | static struct pci_driver cciss_pci_driver = { | |
7c832835 BH |
4866 | .name = "cciss", |
4867 | .probe = cciss_init_one, | |
4868 | .remove = __devexit_p(cciss_remove_one), | |
4869 | .id_table = cciss_pci_device_id, /* id_table */ | |
e9ca75b5 | 4870 | .shutdown = cciss_shutdown, |
1da177e4 LT |
4871 | }; |
4872 | ||
4873 | /* | |
4874 | * This is it. Register the PCI driver information for the cards we control | |
7c832835 | 4875 | * the OS will call our registered routines when it finds one of our cards. |
1da177e4 LT |
4876 | */ |
4877 | static int __init cciss_init(void) | |
4878 | { | |
7fe06326 AP |
4879 | int err; |
4880 | ||
10cbda97 JA |
4881 | /* |
4882 | * The hardware requires that commands are aligned on a 64-bit | |
4883 | * boundary. Given that we use pci_alloc_consistent() to allocate an | |
4884 | * array of them, the size must be a multiple of 8 bytes. | |
4885 | */ | |
1b7d0d28 | 4886 | BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT); |
1da177e4 LT |
4887 | printk(KERN_INFO DRIVER_NAME "\n"); |
4888 | ||
7fe06326 AP |
4889 | err = bus_register(&cciss_bus_type); |
4890 | if (err) | |
4891 | return err; | |
4892 | ||
b368c9dd AP |
4893 | /* Start the scan thread */ |
4894 | cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan"); | |
4895 | if (IS_ERR(cciss_scan_thread)) { | |
4896 | err = PTR_ERR(cciss_scan_thread); | |
4897 | goto err_bus_unregister; | |
4898 | } | |
4899 | ||
1da177e4 | 4900 | /* Register for our PCI devices */ |
7fe06326 AP |
4901 | err = pci_register_driver(&cciss_pci_driver); |
4902 | if (err) | |
b368c9dd | 4903 | goto err_thread_stop; |
7fe06326 | 4904 | |
617e1344 | 4905 | return err; |
7fe06326 | 4906 | |
b368c9dd AP |
4907 | err_thread_stop: |
4908 | kthread_stop(cciss_scan_thread); | |
4909 | err_bus_unregister: | |
7fe06326 | 4910 | bus_unregister(&cciss_bus_type); |
b368c9dd | 4911 | |
7fe06326 | 4912 | return err; |
1da177e4 LT |
4913 | } |
4914 | ||
4915 | static void __exit cciss_cleanup(void) | |
4916 | { | |
4917 | int i; | |
4918 | ||
4919 | pci_unregister_driver(&cciss_pci_driver); | |
4920 | /* double check that all controller entrys have been removed */ | |
7c832835 BH |
4921 | for (i = 0; i < MAX_CTLR; i++) { |
4922 | if (hba[i] != NULL) { | |
b2a4a43d SC |
4923 | dev_warn(&hba[i]->pdev->dev, |
4924 | "had to remove controller\n"); | |
1da177e4 LT |
4925 | cciss_remove_one(hba[i]->pdev); |
4926 | } | |
4927 | } | |
b368c9dd | 4928 | kthread_stop(cciss_scan_thread); |
90fdb0b9 JA |
4929 | if (proc_cciss) |
4930 | remove_proc_entry("driver/cciss", NULL); | |
7fe06326 | 4931 | bus_unregister(&cciss_bus_type); |
1da177e4 LT |
4932 | } |
4933 | ||
4934 | module_init(cciss_init); | |
4935 | module_exit(cciss_cleanup); |