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cciss: factor out cciss_getluninfo
[deliverable/linux.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
405f5571 29#include <linux/smp_lock.h>
1da177e4
LT		 30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1da177e4
LT		 44#include <asm/uaccess.h>
45#include <asm/io.h>
46
eb0df996 47#include <linux/dma-mapping.h>
1da177e4
LT		 48#include <linux/blkdev.h>
49#include <linux/genhd.h>
50#include <linux/completion.h>
d5d3b736 51#include <scsi/scsi.h>
03bbfee5
MMOD		 52#include <scsi/sg.h>
53#include <scsi/scsi_ioctl.h>
54#include <linux/cdrom.h>
231bc2a2 55#include <linux/scatterlist.h>
0a9279cc 56#include <linux/kthread.h>
1da177e4
LT		 57
58#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 59#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 61
62/* Embedded module documentation macros - see modules.h */
63MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 64MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 65MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66MODULE_VERSION("3.6.26");
1da177e4
LT		 67MODULE_LICENSE("GPL");
68
2ec24ff1
SC		 69static int cciss_allow_hpsa;
70module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
71MODULE_PARM_DESC(cciss_allow_hpsa,
72 "Prevent cciss driver from accessing hardware known to be "
73 " supported by the hpsa driver");
74
1da177e4
LT		 75#include "cciss_cmd.h"
76#include "cciss.h"
77#include <linux/cciss_ioctl.h>
78
79/* define the PCI info for the cards we can control */
80static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
24aac480
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
77ca7286
MM		 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
841fdffd
MM		 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
1da177e4
LT		 113 {0,}
114};
7c832835 115
1da177e4
LT		 116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
1da177e4
LT		 118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
7c832835 120 * access = Address of the struct of function pointers
1da177e4
LT		 121 */
122static struct board_type products[] = {
49153998
MM		 123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
49153998
MM		 133 {0x3235103C, "Smart Array P400i", &SA5_access},
134 {0x3211103C, "Smart Array E200i", &SA5_access},
135 {0x3212103C, "Smart Array E200", &SA5_access},
136 {0x3213103C, "Smart Array E200i", &SA5_access},
137 {0x3214103C, "Smart Array E200i", &SA5_access},
138 {0x3215103C, "Smart Array E200i", &SA5_access},
139 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 140/* controllers below this line are also supported by the hpsa driver. */
141#define HPSA_BOUNDARY 0x3223103C
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 {0x3241103C, "Smart Array P212", &SA5_access},
146 {0x3243103C, "Smart Array P410", &SA5_access},
147 {0x3245103C, "Smart Array P410i", &SA5_access},
148 {0x3247103C, "Smart Array P411", &SA5_access},
149 {0x3249103C, "Smart Array P812", &SA5_access},
77ca7286
MM		 150 {0x324A103C, "Smart Array P712m", &SA5_access},
151 {0x324B103C, "Smart Array P711m", &SA5_access},
841fdffd
MM		 152 {0x3250103C, "Smart Array", &SA5_access},
153 {0x3251103C, "Smart Array", &SA5_access},
154 {0x3252103C, "Smart Array", &SA5_access},
155 {0x3253103C, "Smart Array", &SA5_access},
156 {0x3254103C, "Smart Array", &SA5_access},
1da177e4
LT		 157};
158
d14c4ab5 159/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 160#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 161#define MAX_IOCTL_CONFIG_WAIT 1000
162
163/*define how many times we will try a command because of bus resets */
164#define MAX_CMD_RETRIES 3
165
1da177e4
LT		 166#define MAX_CTLR 32
167
168/* Originally cciss driver only supports 8 major numbers */
169#define MAX_CTLR_ORIG 8
170
1da177e4
LT		 171static ctlr_info_t *hba[MAX_CTLR];
172
b368c9dd
AP		 173static struct task_struct *cciss_scan_thread;
174static DEFINE_MUTEX(scan_mutex);
175static LIST_HEAD(scan_q);
176
165125e1 177static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 178static irqreturn_t do_cciss_intx(int irq, void *dev_id);
179static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 180static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 181static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 182static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 183static int do_ioctl(struct block_device *bdev, fmode_t mode,
184 unsigned int cmd, unsigned long arg);
ef7822c2 185static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 186 unsigned int cmd, unsigned long arg);
a885c8c4 187static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 188
1da177e4 189static int cciss_revalidate(struct gendisk *disk);
2d11d993 190static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 191static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 192 int clear_all, int via_ioctl);
1da177e4 193
f70dba83 194static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 195 sector_t *total_size, unsigned int *block_size);
f70dba83 196static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 197 sector_t *total_size, unsigned int *block_size);
f70dba83 198static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 199 sector_t total_size,
00988a35 200 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 201 drive_info_struct *drv);
dac5488a 202static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 203static void start_io(ctlr_info_t *h);
f70dba83 204static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 205 __u8 page_code, unsigned char scsi3addr[],
206 int cmd_type);
85cc61ae 207static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
208 int attempt_retry);
209static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 210
d6f4965d 211static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 212static int scan_thread(void *data);
213static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 214static void cciss_hba_release(struct device *dev);
215static void cciss_device_release(struct device *dev);
361e9b07 216static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 217static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 218static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 219static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
220 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
221 u64 *cfg_offset);
222static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
223 unsigned long *memory_bar);
224
33079b21 225
5e216153
MM		 226/* performant mode helper functions */
227static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
228 int *bucket_map);
229static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 230
1da177e4 231#ifdef CONFIG_PROC_FS
f70dba83 232static void cciss_procinit(ctlr_info_t *h);
1da177e4 233#else
f70dba83 234static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 235{
236}
237#endif /* CONFIG_PROC_FS */
1da177e4
LT		 238
239#ifdef CONFIG_COMPAT
ef7822c2
AV		 240static int cciss_compat_ioctl(struct block_device *, fmode_t,
241 unsigned, unsigned long);
1da177e4
LT		 242#endif
243
83d5cde4 244static const struct block_device_operations cciss_fops = {
7c832835 245 .owner = THIS_MODULE,
6e9624b8 246 .open = cciss_unlocked_open,
ef7822c2 247 .release = cciss_release,
8a6cfeb6 248 .ioctl = do_ioctl,
7c832835 249 .getgeo = cciss_getgeo,
1da177e4 250#ifdef CONFIG_COMPAT
ef7822c2 251 .compat_ioctl = cciss_compat_ioctl,
1da177e4 252#endif
7c832835 253 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 254};
255
5e216153
MM		 256/* set_performant_mode: Modify the tag for cciss performant
257 * set bit 0 for pull model, bits 3-1 for block fetch
258 * register number
259 */
260static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
261{
262 if (likely(h->transMethod == CFGTBL_Trans_Performant))
263 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
264}
265
1da177e4
LT		 266/*
267 * Enqueuing and dequeuing functions for cmdlists.
268 */
8a3173de 269static inline void addQ(struct hlist_head *list, CommandList_struct *c)
1da177e4 270{
8a3173de 271 hlist_add_head(&c->list, list);
1da177e4
LT		 272}
273
8a3173de 274static inline void removeQ(CommandList_struct *c)
1da177e4 275{
b59e64d0
HR		 276 /*
277 * After kexec/dump some commands might still
278 * be in flight, which the firmware will try
279 * to complete. Resetting the firmware doesn't work
280 * with old fw revisions, so we have to mark
281 * them off as 'stale' to prevent the driver from
282 * falling over.
283 */
284 if (WARN_ON(hlist_unhashed(&c->list))) {
285 c->cmd_type = CMD_MSG_STALE;
8a3173de 286 return;
b59e64d0 287 }
8a3173de
JA		 288
289 hlist_del_init(&c->list);
1da177e4
LT		 290}
291
664a717d
MM		 292static void enqueue_cmd_and_start_io(ctlr_info_t *h,
293 CommandList_struct *c)
294{
295 unsigned long flags;
5e216153 296 set_performant_mode(h, c);
664a717d
MM		 297 spin_lock_irqsave(&h->lock, flags);
298 addQ(&h->reqQ, c);
299 h->Qdepth++;
300 start_io(h);
301 spin_unlock_irqrestore(&h->lock, flags);
302}
303
dccc9b56 304static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 305 int nr_cmds)
306{
307 int i;
308
309 if (!cmd_sg_list)
310 return;
311 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 312 kfree(cmd_sg_list[i]);
313 cmd_sg_list[i] = NULL;
49fc5601
SC		 314 }
315 kfree(cmd_sg_list);
316}
317
dccc9b56
SC		 318static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
319 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 320{
321 int j;
dccc9b56 322 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 323
324 if (chainsize <= 0)
325 return NULL;
326
327 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
328 if (!cmd_sg_list)
329 return NULL;
330
331 /* Build up chain blocks for each command */
332 for (j = 0; j < nr_cmds; j++) {
49fc5601 333 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 334 cmd_sg_list[j] = kmalloc((chainsize *
335 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
336 if (!cmd_sg_list[j]) {
49fc5601
SC		 337 dev_err(&h->pdev->dev, "Cannot get memory "
338 "for s/g chains.\n");
339 goto clean;
340 }
341 }
342 return cmd_sg_list;
343clean:
344 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
345 return NULL;
346}
347
d45033ef
SC		 348static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
349{
350 SGDescriptor_struct *chain_sg;
351 u64bit temp64;
352
353 if (c->Header.SGTotal <= h->max_cmd_sgentries)
354 return;
355
356 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
357 temp64.val32.lower = chain_sg->Addr.lower;
358 temp64.val32.upper = chain_sg->Addr.upper;
359 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
360}
361
362static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
363 SGDescriptor_struct *chain_block, int len)
364{
365 SGDescriptor_struct *chain_sg;
366 u64bit temp64;
367
368 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
369 chain_sg->Ext = CCISS_SG_CHAIN;
370 chain_sg->Len = len;
371 temp64.val = pci_map_single(h->pdev, chain_block, len,
372 PCI_DMA_TODEVICE);
373 chain_sg->Addr.lower = temp64.val32.lower;
374 chain_sg->Addr.upper = temp64.val32.upper;
375}
376
1da177e4
LT		 377#include "cciss_scsi.c" /* For SCSI tape support */
378
1e6f2dc1
AB		 379static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
380 "UNKNOWN"
381};
0e4a9d03 382#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 383
1da177e4
LT		 384#ifdef CONFIG_PROC_FS
385
386/*
387 * Report information about this controller.
388 */
389#define ENG_GIG 1000000000
390#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 391#define ENGAGE_SCSI "engage scsi"
1da177e4
LT		 392
393static struct proc_dir_entry *proc_cciss;
394
89b6e743 395static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 396{
89b6e743
MM		 397 ctlr_info_t *h = seq->private;
398
399 seq_printf(seq, "%s: HP %s Controller\n"
400 "Board ID: 0x%08lx\n"
401 "Firmware Version: %c%c%c%c\n"
402 "IRQ: %d\n"
403 "Logical drives: %d\n"
404 "Current Q depth: %d\n"
405 "Current # commands on controller: %d\n"
406 "Max Q depth since init: %d\n"
407 "Max # commands on controller since init: %d\n"
408 "Max SG entries since init: %d\n",
409 h->devname,
410 h->product_name,
411 (unsigned long)h->board_id,
412 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 413 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 414 h->num_luns,
415 h->Qdepth, h->commands_outstanding,
416 h->maxQsinceinit, h->max_outstanding, h->maxSG);
417
418#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 419 cciss_seq_tape_report(seq, h);
89b6e743
MM		 420#endif /* CONFIG_CISS_SCSI_TAPE */
421}
1da177e4 422
89b6e743
MM		 423static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
424{
425 ctlr_info_t *h = seq->private;
89b6e743 426 unsigned long flags;
1da177e4
LT		 427
428 /* prevent displaying bogus info during configuration
429 * or deconfiguration of a logical volume
430 */
f70dba83 431 spin_lock_irqsave(&h->lock, flags);
1da177e4 432 if (h->busy_configuring) {
f70dba83 433 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 434 return ERR_PTR(-EBUSY);
1da177e4
LT		 435 }
436 h->busy_configuring = 1;
f70dba83 437 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 438
89b6e743
MM		 439 if (*pos == 0)
440 cciss_seq_show_header(seq);
441
442 return pos;
443}
444
445static int cciss_seq_show(struct seq_file *seq, void *v)
446{
447 sector_t vol_sz, vol_sz_frac;
448 ctlr_info_t *h = seq->private;
449 unsigned ctlr = h->ctlr;
450 loff_t *pos = v;
9cef0d2f 451 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 452
453 if (*pos > h->highest_lun)
454 return 0;
455
531c2dc7
SC		 456 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
457 return 0;
458
89b6e743
MM		 459 if (drv->heads == 0)
460 return 0;
461
462 vol_sz = drv->nr_blocks;
463 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
464 vol_sz_frac *= 100;
465 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
466
fa52bec9 467 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 468 drv->raid_level = RAID_UNKNOWN;
469 seq_printf(seq, "cciss/c%dd%d:"
470 "\t%4u.%02uGB\tRAID %s\n",
471 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
472 raid_label[drv->raid_level]);
473 return 0;
474}
475
476static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
477{
478 ctlr_info_t *h = seq->private;
479
480 if (*pos > h->highest_lun)
481 return NULL;
482 *pos += 1;
483
484 return pos;
485}
486
487static void cciss_seq_stop(struct seq_file *seq, void *v)
488{
489 ctlr_info_t *h = seq->private;
490
491 /* Only reset h->busy_configuring if we succeeded in setting
492 * it during cciss_seq_start. */
493 if (v == ERR_PTR(-EBUSY))
494 return;
7c832835 495
1da177e4 496 h->busy_configuring = 0;
1da177e4
LT		 497}
498
88e9d34c 499static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 500 .start = cciss_seq_start,
501 .show = cciss_seq_show,
502 .next = cciss_seq_next,
503 .stop = cciss_seq_stop,
504};
505
506static int cciss_seq_open(struct inode *inode, struct file *file)
507{
508 int ret = seq_open(file, &cciss_seq_ops);
509 struct seq_file *seq = file->private_data;
510
511 if (!ret)
512 seq->private = PDE(inode)->data;
513
514 return ret;
515}
516
517static ssize_t
518cciss_proc_write(struct file *file, const char __user *buf,
519 size_t length, loff_t *ppos)
1da177e4 520{
89b6e743
MM		 521 int err;
522 char *buffer;
523
524#ifndef CONFIG_CISS_SCSI_TAPE
525 return -EINVAL;
1da177e4
LT		 526#endif
527
89b6e743 528 if (!buf || length > PAGE_SIZE - 1)
7c832835 529 return -EINVAL;
89b6e743
MM		 530
531 buffer = (char *)__get_free_page(GFP_KERNEL);
532 if (!buffer)
533 return -ENOMEM;
534
535 err = -EFAULT;
536 if (copy_from_user(buffer, buf, length))
537 goto out;
538 buffer[length] = '\0';
539
540#ifdef CONFIG_CISS_SCSI_TAPE
541 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
542 struct seq_file *seq = file->private_data;
543 ctlr_info_t *h = seq->private;
89b6e743 544
f70dba83 545 err = cciss_engage_scsi(h);
8721c81f 546 if (err == 0)
89b6e743
MM		 547 err = length;
548 } else
549#endif /* CONFIG_CISS_SCSI_TAPE */
550 err = -EINVAL;
7c832835
BH		 551 /* might be nice to have "disengage" too, but it's not
552 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 553
554out:
555 free_page((unsigned long)buffer);
556 return err;
1da177e4
LT		 557}
558
828c0950 559static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 560 .owner = THIS_MODULE,
561 .open = cciss_seq_open,
562 .read = seq_read,
563 .llseek = seq_lseek,
564 .release = seq_release,
565 .write = cciss_proc_write,
566};
567
f70dba83 568static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 569{
570 struct proc_dir_entry *pde;
571
89b6e743 572 if (proc_cciss == NULL)
928b4d8c 573 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 574 if (!proc_cciss)
575 return;
f70dba83 576 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 577 S_IROTH, proc_cciss,
f70dba83 578 &cciss_proc_fops, h);
1da177e4 579}
7c832835 580#endif /* CONFIG_PROC_FS */
1da177e4 581
7fe06326
AP		 582#define MAX_PRODUCT_NAME_LEN 19
583
584#define to_hba(n) container_of(n, struct ctlr_info, dev)
585#define to_drv(n) container_of(n, drive_info_struct, dev)
586
d6f4965d
AP		 587static ssize_t host_store_rescan(struct device *dev,
588 struct device_attribute *attr,
589 const char *buf, size_t count)
590{
591 struct ctlr_info *h = to_hba(dev);
592
593 add_to_scan_list(h);
594 wake_up_process(cciss_scan_thread);
595 wait_for_completion_interruptible(&h->scan_wait);
596
597 return count;
598}
8ba95c69 599static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 600
601static ssize_t dev_show_unique_id(struct device *dev,
602 struct device_attribute *attr,
603 char *buf)
604{
605 drive_info_struct *drv = to_drv(dev);
606 struct ctlr_info *h = to_hba(drv->dev.parent);
607 __u8 sn[16];
608 unsigned long flags;
609 int ret = 0;
610
f70dba83 611 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 612 if (h->busy_configuring)
613 ret = -EBUSY;
614 else
615 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 616 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 617
618 if (ret)
619 return ret;
620 else
621 return snprintf(buf, 16 * 2 + 2,
622 "%02X%02X%02X%02X%02X%02X%02X%02X"
623 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
624 sn[0], sn[1], sn[2], sn[3],
625 sn[4], sn[5], sn[6], sn[7],
626 sn[8], sn[9], sn[10], sn[11],
627 sn[12], sn[13], sn[14], sn[15]);
628}
8ba95c69 629static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 630
631static ssize_t dev_show_vendor(struct device *dev,
632 struct device_attribute *attr,
633 char *buf)
634{
635 drive_info_struct *drv = to_drv(dev);
636 struct ctlr_info *h = to_hba(drv->dev.parent);
637 char vendor[VENDOR_LEN + 1];
638 unsigned long flags;
639 int ret = 0;
640
f70dba83 641 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 642 if (h->busy_configuring)
643 ret = -EBUSY;
644 else
645 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 646 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 647
648 if (ret)
649 return ret;
650 else
651 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
652}
8ba95c69 653static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 654
655static ssize_t dev_show_model(struct device *dev,
656 struct device_attribute *attr,
657 char *buf)
658{
659 drive_info_struct *drv = to_drv(dev);
660 struct ctlr_info *h = to_hba(drv->dev.parent);
661 char model[MODEL_LEN + 1];
662 unsigned long flags;
663 int ret = 0;
664
f70dba83 665 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 666 if (h->busy_configuring)
667 ret = -EBUSY;
668 else
669 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 670 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 671
672 if (ret)
673 return ret;
674 else
675 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
676}
8ba95c69 677static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 678
679static ssize_t dev_show_rev(struct device *dev,
680 struct device_attribute *attr,
681 char *buf)
682{
683 drive_info_struct *drv = to_drv(dev);
684 struct ctlr_info *h = to_hba(drv->dev.parent);
685 char rev[REV_LEN + 1];
686 unsigned long flags;
687 int ret = 0;
688
f70dba83 689 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 690 if (h->busy_configuring)
691 ret = -EBUSY;
692 else
693 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 694 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 695
696 if (ret)
697 return ret;
698 else
699 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
700}
8ba95c69 701static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 702
ce84a8ae
SC		 703static ssize_t cciss_show_lunid(struct device *dev,
704 struct device_attribute *attr, char *buf)
705{
9cef0d2f
SC		 706 drive_info_struct *drv = to_drv(dev);
707 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 708 unsigned long flags;
709 unsigned char lunid[8];
710
f70dba83 711 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 712 if (h->busy_configuring) {
f70dba83 713 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 714 return -EBUSY;
715 }
716 if (!drv->heads) {
f70dba83 717 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 718 return -ENOTTY;
719 }
720 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 721 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 722 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
723 lunid[0], lunid[1], lunid[2], lunid[3],
724 lunid[4], lunid[5], lunid[6], lunid[7]);
725}
8ba95c69 726static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 727
3ff1111d
SC		 728static ssize_t cciss_show_raid_level(struct device *dev,
729 struct device_attribute *attr, char *buf)
730{
9cef0d2f
SC		 731 drive_info_struct *drv = to_drv(dev);
732 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 733 int raid;
734 unsigned long flags;
735
f70dba83 736 spin_lock_irqsave(&h->lock, flags);
3ff1111d 737 if (h->busy_configuring) {
f70dba83 738 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 739 return -EBUSY;
740 }
741 raid = drv->raid_level;
f70dba83 742 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 743 if (raid < 0 || raid > RAID_UNKNOWN)
744 raid = RAID_UNKNOWN;
745
746 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
747 raid_label[raid]);
748}
8ba95c69 749static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 750
e272afec
SC		 751static ssize_t cciss_show_usage_count(struct device *dev,
752 struct device_attribute *attr, char *buf)
753{
9cef0d2f
SC		 754 drive_info_struct *drv = to_drv(dev);
755 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 756 unsigned long flags;
757 int count;
758
f70dba83 759 spin_lock_irqsave(&h->lock, flags);
e272afec 760 if (h->busy_configuring) {
f70dba83 761 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 762 return -EBUSY;
763 }
764 count = drv->usage_count;
f70dba83 765 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 766 return snprintf(buf, 20, "%d\n", count);
767}
8ba95c69 768static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 769
d6f4965d
AP		 770static struct attribute *cciss_host_attrs[] = {
771 &dev_attr_rescan.attr,
772 NULL
773};
774
775static struct attribute_group cciss_host_attr_group = {
776 .attrs = cciss_host_attrs,
777};
778
9f792d9f 779static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 780 &cciss_host_attr_group,
781 NULL
782};
783
784static struct device_type cciss_host_type = {
785 .name = "cciss_host",
786 .groups = cciss_host_attr_groups,
617e1344 787 .release = cciss_hba_release,
d6f4965d
AP		 788};
789
7fe06326
AP		 790static struct attribute *cciss_dev_attrs[] = {
791 &dev_attr_unique_id.attr,
792 &dev_attr_model.attr,
793 &dev_attr_vendor.attr,
794 &dev_attr_rev.attr,
ce84a8ae 795 &dev_attr_lunid.attr,
3ff1111d 796 &dev_attr_raid_level.attr,
e272afec 797 &dev_attr_usage_count.attr,
7fe06326
AP		 798 NULL
799};
800
801static struct attribute_group cciss_dev_attr_group = {
802 .attrs = cciss_dev_attrs,
803};
804
a4dbd674 805static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 806 &cciss_dev_attr_group,
807 NULL
808};
809
810static struct device_type cciss_dev_type = {
811 .name = "cciss_device",
812 .groups = cciss_dev_attr_groups,
617e1344 813 .release = cciss_device_release,
7fe06326
AP		 814};
815
816static struct bus_type cciss_bus_type = {
817 .name = "cciss",
818};
819
617e1344
SC		 820/*
821 * cciss_hba_release is called when the reference count
822 * of h->dev goes to zero.
823 */
824static void cciss_hba_release(struct device *dev)
825{
826 /*
827 * nothing to do, but need this to avoid a warning
828 * about not having a release handler from lib/kref.c.
829 */
830}
7fe06326
AP		 831
832/*
833 * Initialize sysfs entry for each controller. This sets up and registers
834 * the 'cciss#' directory for each individual controller under
835 * /sys/bus/pci/devices/<dev>/.
836 */
837static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
838{
839 device_initialize(&h->dev);
840 h->dev.type = &cciss_host_type;
841 h->dev.bus = &cciss_bus_type;
842 dev_set_name(&h->dev, "%s", h->devname);
843 h->dev.parent = &h->pdev->dev;
844
845 return device_add(&h->dev);
846}
847
848/*
849 * Remove sysfs entries for an hba.
850 */
851static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
852{
853 device_del(&h->dev);
617e1344
SC		 854 put_device(&h->dev); /* final put. */
855}
856
857/* cciss_device_release is called when the reference count
9cef0d2f 858 * of h->drv[x]dev goes to zero.
617e1344
SC		 859 */
860static void cciss_device_release(struct device *dev)
861{
9cef0d2f
SC		 862 drive_info_struct *drv = to_drv(dev);
863 kfree(drv);
7fe06326
AP		 864}
865
866/*
867 * Initialize sysfs for each logical drive. This sets up and registers
868 * the 'c#d#' directory for each individual logical drive under
869 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
870 * /sys/block/cciss!c#d# to this entry.
871 */
617e1344 872static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 873 int drv_index)
874{
617e1344
SC		 875 struct device *dev;
876
9cef0d2f 877 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 878 return 0;
879
9cef0d2f 880 dev = &h->drv[drv_index]->dev;
617e1344
SC		 881 device_initialize(dev);
882 dev->type = &cciss_dev_type;
883 dev->bus = &cciss_bus_type;
884 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
885 dev->parent = &h->dev;
9cef0d2f 886 h->drv[drv_index]->device_initialized = 1;
617e1344 887 return device_add(dev);
7fe06326
AP		 888}
889
890/*
891 * Remove sysfs entries for a logical drive.
892 */
8ce51966
SC		 893static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
894 int ctlr_exiting)
7fe06326 895{
9cef0d2f 896 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 897
898 /* special case for c*d0, we only destroy it on controller exit */
899 if (drv_index == 0 && !ctlr_exiting)
900 return;
901
617e1344
SC		 902 device_del(dev);
903 put_device(dev); /* the "final" put. */
9cef0d2f 904 h->drv[drv_index] = NULL;
7fe06326
AP		 905}
906
7c832835
BH		 907/*
908 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 909 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 910 * which ones are free or in use.
7c832835 911 */
6b4d96b8 912static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 913{
914 CommandList_struct *c;
7c832835 915 int i;
1da177e4
LT		 916 u64bit temp64;
917 dma_addr_t cmd_dma_handle, err_dma_handle;
918
6b4d96b8
SC		 919 do {
920 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
921 if (i == h->nr_cmds)
7c832835 922 return NULL;
6b4d96b8
SC		 923 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
924 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 925 c = h->cmd_pool + i;
926 memset(c, 0, sizeof(CommandList_struct));
927 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
928 c->err_info = h->errinfo_pool + i;
929 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
930 err_dma_handle = h->errinfo_pool_dhandle
931 + i * sizeof(ErrorInfo_struct);
932 h->nr_allocs++;
1da177e4 933
6b4d96b8 934 c->cmdindex = i;
33079b21 935
6b4d96b8
SC		 936 INIT_HLIST_NODE(&c->list);
937 c->busaddr = (__u32) cmd_dma_handle;
938 temp64.val = (__u64) err_dma_handle;
939 c->ErrDesc.Addr.lower = temp64.val32.lower;
940 c->ErrDesc.Addr.upper = temp64.val32.upper;
941 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 942
6b4d96b8
SC		 943 c->ctlr = h->ctlr;
944 return c;
945}
33079b21 946
6b4d96b8
SC		 947/* allocate a command using pci_alloc_consistent, used for ioctls,
948 * etc., not for the main i/o path.
949 */
950static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
951{
952 CommandList_struct *c;
953 u64bit temp64;
954 dma_addr_t cmd_dma_handle, err_dma_handle;
955
956 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
957 sizeof(CommandList_struct), &cmd_dma_handle);
958 if (c == NULL)
959 return NULL;
960 memset(c, 0, sizeof(CommandList_struct));
961
962 c->cmdindex = -1;
963
964 c->err_info = (ErrorInfo_struct *)
965 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
966 &err_dma_handle);
967
968 if (c->err_info == NULL) {
969 pci_free_consistent(h->pdev,
970 sizeof(CommandList_struct), c, cmd_dma_handle);
971 return NULL;
7c832835 972 }
6b4d96b8 973 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 974
8a3173de 975 INIT_HLIST_NODE(&c->list);
1da177e4 976 c->busaddr = (__u32) cmd_dma_handle;
7c832835 977 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 978 c->ErrDesc.Addr.lower = temp64.val32.lower;
979 c->ErrDesc.Addr.upper = temp64.val32.upper;
980 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 981
7c832835
BH		 982 c->ctlr = h->ctlr;
983 return c;
1da177e4
LT		 984}
985
6b4d96b8 986static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 987{
988 int i;
6b4d96b8
SC		 989
990 i = c - h->cmd_pool;
991 clear_bit(i & (BITS_PER_LONG - 1),
992 h->cmd_pool_bits + (i / BITS_PER_LONG));
993 h->nr_frees++;
994}
995
996static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
997{
1da177e4
LT		 998 u64bit temp64;
999
6b4d96b8
SC		 1000 temp64.val32.lower = c->ErrDesc.Addr.lower;
1001 temp64.val32.upper = c->ErrDesc.Addr.upper;
1002 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1003 c->err_info, (dma_addr_t) temp64.val);
1004 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
1005 c, (dma_addr_t) c->busaddr);
1da177e4
LT		 1006}
1007
1008static inline ctlr_info_t *get_host(struct gendisk *disk)
1009{
7c832835 1010 return disk->queue->queuedata;
1da177e4
LT		 1011}
1012
1013static inline drive_info_struct *get_drv(struct gendisk *disk)
1014{
1015 return disk->private_data;
1016}
1017
1018/*
1019 * Open. Make sure the device is really there.
1020 */
ef7822c2 1021static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1022{
f70dba83 1023 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1024 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1025
b2a4a43d 1026 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1027 if (drv->busy_configuring)
ddd47442 1028 return -EBUSY;
1da177e4
LT		 1029 /*
1030 * Root is allowed to open raw volume zero even if it's not configured
1031 * so array config can still work. Root is also allowed to open any
1032 * volume that has a LUN ID, so it can issue IOCTL to reread the
1033 * disk information. I don't think I really like this
1034 * but I'm already using way to many device nodes to claim another one
1035 * for "raw controller".
1036 */
7a06f789 1037 if (drv->heads == 0) {
ef7822c2 1038 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1039 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1040 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1041 return -ENXIO;
1da177e4 1042 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1043 } else if (memcmp(drv->LunID, CTLR_LUNID,
1044 sizeof(drv->LunID))) {
1da177e4
LT		 1045 return -ENXIO;
1046 }
1047 }
1048 if (!capable(CAP_SYS_ADMIN))
1049 return -EPERM;
1050 }
1051 drv->usage_count++;
f70dba83 1052 h->usage_count++;
1da177e4
LT		 1053 return 0;
1054}
7c832835 1055
6e9624b8
AB		 1056static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1057{
1058 int ret;
1059
1060 lock_kernel();
1061 ret = cciss_open(bdev, mode);
1062 unlock_kernel();
1063
1064 return ret;
1065}
1066
1da177e4
LT		 1067/*
1068 * Close. Sync first.
1069 */
ef7822c2 1070static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1071{
f70dba83 1072 ctlr_info_t *h;
6e9624b8 1073 drive_info_struct *drv;
1da177e4 1074
6e9624b8 1075 lock_kernel();
f70dba83 1076 h = get_host(disk);
6e9624b8 1077 drv = get_drv(disk);
b2a4a43d 1078 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1079 drv->usage_count--;
f70dba83 1080 h->usage_count--;
6e9624b8 1081 unlock_kernel();
1da177e4
LT		 1082 return 0;
1083}
1084
ef7822c2
AV		 1085static int do_ioctl(struct block_device *bdev, fmode_t mode,
1086 unsigned cmd, unsigned long arg)
1da177e4
LT		 1087{
1088 int ret;
1089 lock_kernel();
ef7822c2 1090 ret = cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1091 unlock_kernel();
1092 return ret;
1093}
1094
8a6cfeb6
AB		 1095#ifdef CONFIG_COMPAT
1096
ef7822c2
AV		 1097static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1098 unsigned cmd, unsigned long arg);
1099static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1100 unsigned cmd, unsigned long arg);
1da177e4 1101
ef7822c2
AV		 1102static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1103 unsigned cmd, unsigned long arg)
1da177e4
LT		 1104{
1105 switch (cmd) {
1106 case CCISS_GETPCIINFO:
1107 case CCISS_GETINTINFO:
1108 case CCISS_SETINTINFO:
1109 case CCISS_GETNODENAME:
1110 case CCISS_SETNODENAME:
1111 case CCISS_GETHEARTBEAT:
1112 case CCISS_GETBUSTYPES:
1113 case CCISS_GETFIRMVER:
1114 case CCISS_GETDRIVVER:
1115 case CCISS_REVALIDVOLS:
1116 case CCISS_DEREGDISK:
1117 case CCISS_REGNEWDISK:
1118 case CCISS_REGNEWD:
1119 case CCISS_RESCANDISK:
1120 case CCISS_GETLUNINFO:
ef7822c2 1121 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1122
1123 case CCISS_PASSTHRU32:
ef7822c2 1124 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1125 case CCISS_BIG_PASSTHRU32:
ef7822c2 1126 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1127
1128 default:
1129 return -ENOIOCTLCMD;
1130 }
1131}
1132
ef7822c2
AV		 1133static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1134 unsigned cmd, unsigned long arg)
1da177e4
LT		 1135{
1136 IOCTL32_Command_struct __user *arg32 =
7c832835 1137 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1138 IOCTL_Command_struct arg64;
1139 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1140 int err;
1141 u32 cp;
1142
1143 err = 0;
7c832835
BH		 1144 err |=
1145 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1146 sizeof(arg64.LUN_info));
1147 err |=
1148 copy_from_user(&arg64.Request, &arg32->Request,
1149 sizeof(arg64.Request));
1150 err |=
1151 copy_from_user(&arg64.error_info, &arg32->error_info,
1152 sizeof(arg64.error_info));
1da177e4
LT		 1153 err |= get_user(arg64.buf_size, &arg32->buf_size);
1154 err |= get_user(cp, &arg32->buf);
1155 arg64.buf = compat_ptr(cp);
1156 err |= copy_to_user(p, &arg64, sizeof(arg64));
1157
1158 if (err)
1159 return -EFAULT;
1160
ef7822c2 1161 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1162 if (err)
1163 return err;
7c832835
BH		 1164 err |=
1165 copy_in_user(&arg32->error_info, &p->error_info,
1166 sizeof(arg32->error_info));
1da177e4
LT		 1167 if (err)
1168 return -EFAULT;
1169 return err;
1170}
1171
ef7822c2
AV		 1172static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1173 unsigned cmd, unsigned long arg)
1da177e4
LT		 1174{
1175 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1176 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1177 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1178 BIG_IOCTL_Command_struct __user *p =
1179 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1180 int err;
1181 u32 cp;
1182
1183 err = 0;
7c832835
BH		 1184 err |=
1185 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1186 sizeof(arg64.LUN_info));
1187 err |=
1188 copy_from_user(&arg64.Request, &arg32->Request,
1189 sizeof(arg64.Request));
1190 err |=
1191 copy_from_user(&arg64.error_info, &arg32->error_info,
1192 sizeof(arg64.error_info));
1da177e4
LT		 1193 err |= get_user(arg64.buf_size, &arg32->buf_size);
1194 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1195 err |= get_user(cp, &arg32->buf);
1196 arg64.buf = compat_ptr(cp);
1197 err |= copy_to_user(p, &arg64, sizeof(arg64));
1198
1199 if (err)
7c832835 1200 return -EFAULT;
1da177e4 1201
ef7822c2 1202 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1203 if (err)
1204 return err;
7c832835
BH		 1205 err |=
1206 copy_in_user(&arg32->error_info, &p->error_info,
1207 sizeof(arg32->error_info));
1da177e4
LT		 1208 if (err)
1209 return -EFAULT;
1210 return err;
1211}
1212#endif
a885c8c4
CH		 1213
1214static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1215{
1216 drive_info_struct *drv = get_drv(bdev->bd_disk);
1217
1218 if (!drv->cylinders)
1219 return -ENXIO;
1220
1221 geo->heads = drv->heads;
1222 geo->sectors = drv->sectors;
1223 geo->cylinders = drv->cylinders;
1224 return 0;
1225}
1226
f70dba83 1227static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1228{
1229 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1230 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1231 (void)check_for_unit_attention(h, c);
0a9279cc 1232}
0a25a5ae
SC		 1233
1234static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1235{
1236 cciss_pci_info_struct pciinfo;
1237
1238 if (!argp)
1239 return -EINVAL;
1240 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1241 pciinfo.bus = h->pdev->bus->number;
1242 pciinfo.dev_fn = h->pdev->devfn;
1243 pciinfo.board_id = h->board_id;
1244 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1245 return -EFAULT;
1246 return 0;
1247}
1248
576e661c
SC		 1249static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1250{
1251 cciss_coalint_struct intinfo;
1252
1253 if (!argp)
1254 return -EINVAL;
1255 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1256 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1257 if (copy_to_user
1258 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1259 return -EFAULT;
1260 return 0;
1261}
1262
4c800eed
SC		 1263static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1264{
1265 cciss_coalint_struct intinfo;
1266 unsigned long flags;
1267 int i;
1268
1269 if (!argp)
1270 return -EINVAL;
1271 if (!capable(CAP_SYS_ADMIN))
1272 return -EPERM;
1273 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1274 return -EFAULT;
1275 if ((intinfo.delay == 0) && (intinfo.count == 0))
1276 return -EINVAL;
1277 spin_lock_irqsave(&h->lock, flags);
1278 /* Update the field, and then ring the doorbell */
1279 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1280 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1281 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1282
1283 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1284 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1285 break;
1286 udelay(1000); /* delay and try again */
1287 }
1288 spin_unlock_irqrestore(&h->lock, flags);
1289 if (i >= MAX_IOCTL_CONFIG_WAIT)
1290 return -EAGAIN;
1291 return 0;
1292}
1293
25216109
SC		 1294static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1295{
1296 NodeName_type NodeName;
1297 int i;
1298
1299 if (!argp)
1300 return -EINVAL;
1301 for (i = 0; i < 16; i++)
1302 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1303 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1304 return -EFAULT;
1305 return 0;
1306}
1307
4f43f32c
SC		 1308static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1309{
1310 NodeName_type NodeName;
1311 unsigned long flags;
1312 int i;
1313
1314 if (!argp)
1315 return -EINVAL;
1316 if (!capable(CAP_SYS_ADMIN))
1317 return -EPERM;
1318 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1319 return -EFAULT;
1320 spin_lock_irqsave(&h->lock, flags);
1321 /* Update the field, and then ring the doorbell */
1322 for (i = 0; i < 16; i++)
1323 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1324 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1325 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1326 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1327 break;
1328 udelay(1000); /* delay and try again */
1329 }
1330 spin_unlock_irqrestore(&h->lock, flags);
1331 if (i >= MAX_IOCTL_CONFIG_WAIT)
1332 return -EAGAIN;
1333 return 0;
1334}
1335
93c74931
SC		 1336static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1337{
1338 Heartbeat_type heartbeat;
1339
1340 if (!argp)
1341 return -EINVAL;
1342 heartbeat = readl(&h->cfgtable->HeartBeat);
1343 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1344 return -EFAULT;
1345 return 0;
1346}
1347
d18dfad4
SC		 1348static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1349{
1350 BusTypes_type BusTypes;
1351
1352 if (!argp)
1353 return -EINVAL;
1354 BusTypes = readl(&h->cfgtable->BusTypes);
1355 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1356 return -EFAULT;
1357 return 0;
1358}
1359
8a4f7fbf
SC		 1360static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1361{
1362 FirmwareVer_type firmware;
1363
1364 if (!argp)
1365 return -EINVAL;
1366 memcpy(firmware, h->firm_ver, 4);
1367
1368 if (copy_to_user
1369 (argp, firmware, sizeof(FirmwareVer_type)))
1370 return -EFAULT;
1371 return 0;
1372}
1373
c525919d
SC		 1374static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1375{
1376 DriverVer_type DriverVer = DRIVER_VERSION;
1377
1378 if (!argp)
1379 return -EINVAL;
1380 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1381 return -EFAULT;
1382 return 0;
1383}
1384
0894b32c
SC		 1385static int cciss_getluninfo(ctlr_info_t *h,
1386 struct gendisk *disk, void __user *argp)
1387{
1388 LogvolInfo_struct luninfo;
1389 drive_info_struct *drv = get_drv(disk);
1390
1391 if (!argp)
1392 return -EINVAL;
1393 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1394 luninfo.num_opens = drv->usage_count;
1395 luninfo.num_parts = 0;
1396 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1397 return -EFAULT;
1398 return 0;
1399}
1400
ef7822c2 1401static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1402 unsigned int cmd, unsigned long arg)
1da177e4 1403{
1da177e4 1404 struct gendisk *disk = bdev->bd_disk;
f70dba83 1405 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1406 void __user *argp = (void __user *)arg;
1407
b2a4a43d
SC		 1408 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1409 cmd, arg);
7c832835 1410 switch (cmd) {
1da177e4 1411 case CCISS_GETPCIINFO:
0a25a5ae 1412 return cciss_getpciinfo(h, argp);
1da177e4 1413 case CCISS_GETINTINFO:
576e661c 1414 return cciss_getintinfo(h, argp);
1da177e4 1415 case CCISS_SETINTINFO:
4c800eed 1416 return cciss_setintinfo(h, argp);
1da177e4 1417 case CCISS_GETNODENAME:
25216109 1418 return cciss_getnodename(h, argp);
1da177e4 1419 case CCISS_SETNODENAME:
4f43f32c 1420 return cciss_setnodename(h, argp);
1da177e4 1421 case CCISS_GETHEARTBEAT:
93c74931 1422 return cciss_getheartbeat(h, argp);
1da177e4 1423 case CCISS_GETBUSTYPES:
d18dfad4 1424 return cciss_getbustypes(h, argp);
1da177e4 1425 case CCISS_GETFIRMVER:
8a4f7fbf 1426 return cciss_getfirmver(h, argp);
7c832835 1427 case CCISS_GETDRIVVER:
c525919d 1428 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1429 case CCISS_DEREGDISK:
1430 case CCISS_REGNEWD:
1da177e4 1431 case CCISS_REVALIDVOLS:
f70dba83 1432 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1433 case CCISS_GETLUNINFO:
1434 return cciss_getluninfo(h, disk, argp);
1da177e4 1435 case CCISS_PASSTHRU:
1da177e4 1436 {
7c832835
BH		 1437 IOCTL_Command_struct iocommand;
1438 CommandList_struct *c;
1439 char *buff = NULL;
1440 u64bit temp64;
6e9a4738 1441 DECLARE_COMPLETION_ONSTACK(wait);
1da177e4 1442
7c832835
BH		 1443 if (!arg)
1444 return -EINVAL;
1da177e4 1445
7c832835
BH		 1446 if (!capable(CAP_SYS_RAWIO))
1447 return -EPERM;
1da177e4 1448
7c832835
BH		 1449 if (copy_from_user
1450 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1451 return -EFAULT;
1452 if ((iocommand.buf_size < 1) &&
1453 (iocommand.Request.Type.Direction != XFER_NONE)) {
1454 return -EINVAL;
1455 }
1456#if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
1457 /* Check kmalloc limits */
1458 if (iocommand.buf_size > 128000)
1459 return -EINVAL;
1460#endif
1461 if (iocommand.buf_size > 0) {
1462 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1463 if (buff == NULL)
1464 return -EFAULT;
1465 }
1466 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1467 /* Copy the data into the buffer we created */
1468 if (copy_from_user
1469 (buff, iocommand.buf, iocommand.buf_size)) {
1470 kfree(buff);
1471 return -EFAULT;
1472 }
1473 } else {
1474 memset(buff, 0, iocommand.buf_size);
1475 }
6b4d96b8 1476 c = cmd_special_alloc(h);
f70dba83 1477 if (!c) {
7c832835
BH		 1478 kfree(buff);
1479 return -ENOMEM;
1480 }
b028461d 1481 /* Fill in the command type */
7c832835 1482 c->cmd_type = CMD_IOCTL_PEND;
b028461d 1483 /* Fill in Command Header */
1484 c->Header.ReplyQueue = 0; /* unused in simple mode */
1485 if (iocommand.buf_size > 0) /* buffer to fill */
7c832835
BH		 1486 {
1487 c->Header.SGList = 1;
1488 c->Header.SGTotal = 1;
b028461d 1489 } else /* no buffers to fill */
7c832835
BH		 1490 {
1491 c->Header.SGList = 0;
1492 c->Header.SGTotal = 0;
1493 }
1494 c->Header.LUN = iocommand.LUN_info;
b028461d 1495 /* use the kernel address the cmd block for tag */
1496 c->Header.Tag.lower = c->busaddr;
1da177e4 1497
b028461d 1498 /* Fill in Request block */
7c832835 1499 c->Request = iocommand.Request;
1da177e4 1500
b028461d 1501 /* Fill in the scatter gather information */
7c832835 1502 if (iocommand.buf_size > 0) {
f70dba83 1503 temp64.val = pci_map_single(h->pdev, buff,
7c832835
BH		 1504 iocommand.buf_size,
1505 PCI_DMA_BIDIRECTIONAL);
1506 c->SG[0].Addr.lower = temp64.val32.lower;
1507 c->SG[0].Addr.upper = temp64.val32.upper;
1508 c->SG[0].Len = iocommand.buf_size;
b028461d 1509 c->SG[0].Ext = 0; /* we are not chaining */
7c832835
BH		 1510 }
1511 c->waiting = &wait;
1512
f70dba83 1513 enqueue_cmd_and_start_io(h, c);
7c832835
BH		 1514 wait_for_completion(&wait);
1515
1516 /* unlock the buffers from DMA */
1517 temp64.val32.lower = c->SG[0].Addr.lower;
1518 temp64.val32.upper = c->SG[0].Addr.upper;
f70dba83 1519 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val,
7c832835
BH		 1520 iocommand.buf_size,
1521 PCI_DMA_BIDIRECTIONAL);
1522
f70dba83 1523 check_ioctl_unit_attention(h, c);
0a9279cc 1524
7c832835
BH		 1525 /* Copy the error information out */
1526 iocommand.error_info = *(c->err_info);
1527 if (copy_to_user
1528 (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1529 kfree(buff);
6b4d96b8 1530 cmd_special_free(h, c);
1da177e4
LT		 1531 return -EFAULT;
1532 }
7c832835
BH		 1533
1534 if (iocommand.Request.Type.Direction == XFER_READ) {
1535 /* Copy the data out of the buffer we created */
1536 if (copy_to_user
1537 (iocommand.buf, buff, iocommand.buf_size)) {
1538 kfree(buff);
6b4d96b8 1539 cmd_special_free(h, c);
7c832835
BH		 1540 return -EFAULT;
1541 }
1542 }
1543 kfree(buff);
6b4d96b8 1544 cmd_special_free(h, c);
7c832835 1545 return 0;
1da177e4 1546 }
7c832835
BH		 1547 case CCISS_BIG_PASSTHRU:{
1548 BIG_IOCTL_Command_struct *ioc;
1549 CommandList_struct *c;
1550 unsigned char **buff = NULL;
1551 int *buff_size = NULL;
1552 u64bit temp64;
7c832835
BH		 1553 BYTE sg_used = 0;
1554 int status = 0;
1555 int i;
6e9a4738 1556 DECLARE_COMPLETION_ONSTACK(wait);
7c832835
BH		 1557 __u32 left;
1558 __u32 sz;
1559 BYTE __user *data_ptr;
1560
1561 if (!arg)
1562 return -EINVAL;
1563 if (!capable(CAP_SYS_RAWIO))
1564 return -EPERM;
1565 ioc = (BIG_IOCTL_Command_struct *)
1566 kmalloc(sizeof(*ioc), GFP_KERNEL);
1567 if (!ioc) {
1568 status = -ENOMEM;
1569 goto cleanup1;
1570 }
1571 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1572 status = -EFAULT;
1573 goto cleanup1;
1574 }
1575 if ((ioc->buf_size < 1) &&
1576 (ioc->Request.Type.Direction != XFER_NONE)) {
1da177e4
LT		 1577 status = -EINVAL;
1578 goto cleanup1;
7c832835
BH		 1579 }
1580 /* Check kmalloc limits using all SGs */
1581 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1582 status = -EINVAL;
1583 goto cleanup1;
1584 }
1585 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1586 status = -EINVAL;
1587 goto cleanup1;
1588 }
1589 buff =
1590 kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1591 if (!buff) {
1da177e4
LT		 1592 status = -ENOMEM;
1593 goto cleanup1;
1594 }
5cbded58 1595 buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
7c832835
BH		 1596 GFP_KERNEL);
1597 if (!buff_size) {
1598 status = -ENOMEM;
1599 goto cleanup1;
1600 }
1601 left = ioc->buf_size;
1602 data_ptr = ioc->buf;
1603 while (left) {
1604 sz = (left >
1605 ioc->malloc_size) ? ioc->
1606 malloc_size : left;
1607 buff_size[sg_used] = sz;
1608 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1609 if (buff[sg_used] == NULL) {
1da177e4 1610 status = -ENOMEM;
15534d38
JA		 1611 goto cleanup1;
1612 }
7c832835
BH		 1613 if (ioc->Request.Type.Direction == XFER_WRITE) {
1614 if (copy_from_user
1615 (buff[sg_used], data_ptr, sz)) {
f7108f91 1616 status = -EFAULT;
7c832835
BH		 1617 goto cleanup1;
1618 }
1619 } else {
1620 memset(buff[sg_used], 0, sz);
1621 }
1622 left -= sz;
1623 data_ptr += sz;
1624 sg_used++;
1625 }
6b4d96b8 1626 c = cmd_special_alloc(h);
f70dba83 1627 if (!c) {
7c832835
BH		 1628 status = -ENOMEM;
1629 goto cleanup1;
1630 }
1631 c->cmd_type = CMD_IOCTL_PEND;
1632 c->Header.ReplyQueue = 0;
1633
1634 if (ioc->buf_size > 0) {
1635 c->Header.SGList = sg_used;
1636 c->Header.SGTotal = sg_used;
1da177e4 1637 } else {
7c832835
BH		 1638 c->Header.SGList = 0;
1639 c->Header.SGTotal = 0;
1da177e4 1640 }
7c832835
BH		 1641 c->Header.LUN = ioc->LUN_info;
1642 c->Header.Tag.lower = c->busaddr;
1643
1644 c->Request = ioc->Request;
1645 if (ioc->buf_size > 0) {
7c832835
BH		 1646 for (i = 0; i < sg_used; i++) {
1647 temp64.val =
f70dba83 1648 pci_map_single(h->pdev, buff[i],
7c832835
BH		 1649 buff_size[i],
1650 PCI_DMA_BIDIRECTIONAL);
1651 c->SG[i].Addr.lower =
1652 temp64.val32.lower;
1653 c->SG[i].Addr.upper =
1654 temp64.val32.upper;
1655 c->SG[i].Len = buff_size[i];
1656 c->SG[i].Ext = 0; /* we are not chaining */
1657 }
1658 }
1659 c->waiting = &wait;
f70dba83 1660 enqueue_cmd_and_start_io(h, c);
7c832835
BH		 1661 wait_for_completion(&wait);
1662 /* unlock the buffers from DMA */
1663 for (i = 0; i < sg_used; i++) {
1664 temp64.val32.lower = c->SG[i].Addr.lower;
1665 temp64.val32.upper = c->SG[i].Addr.upper;
f70dba83 1666 pci_unmap_single(h->pdev,
7c832835 1667 (dma_addr_t) temp64.val, buff_size[i],
1da177e4 1668 PCI_DMA_BIDIRECTIONAL);
1da177e4 1669 }
f70dba83 1670 check_ioctl_unit_attention(h, c);
7c832835
BH		 1671 /* Copy the error information out */
1672 ioc->error_info = *(c->err_info);
1673 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6b4d96b8 1674 cmd_special_free(h, c);
7c832835
BH		 1675 status = -EFAULT;
1676 goto cleanup1;
1677 }
1678 if (ioc->Request.Type.Direction == XFER_READ) {
1679 /* Copy the data out of the buffer we created */
1680 BYTE __user *ptr = ioc->buf;
1681 for (i = 0; i < sg_used; i++) {
1682 if (copy_to_user
1683 (ptr, buff[i], buff_size[i])) {
6b4d96b8 1684 cmd_special_free(h, c);
7c832835
BH		 1685 status = -EFAULT;
1686 goto cleanup1;
1687 }
1688 ptr += buff_size[i];
1da177e4 1689 }
1da177e4 1690 }
6b4d96b8 1691 cmd_special_free(h, c);
7c832835
BH		 1692 status = 0;
1693 cleanup1:
1694 if (buff) {
1695 for (i = 0; i < sg_used; i++)
1696 kfree(buff[i]);
1697 kfree(buff);
1698 }
1699 kfree(buff_size);
1700 kfree(ioc);
1701 return status;
1da177e4 1702 }
03bbfee5
MMOD		 1703
1704 /* scsi_cmd_ioctl handles these, below, though some are not */
1705 /* very meaningful for cciss. SG_IO is the main one people want. */
1706
1707 case SG_GET_VERSION_NUM:
1708 case SG_SET_TIMEOUT:
1709 case SG_GET_TIMEOUT:
1710 case SG_GET_RESERVED_SIZE:
1711 case SG_SET_RESERVED_SIZE:
1712 case SG_EMULATED_HOST:
1713 case SG_IO:
1714 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1715 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1716
1717 /* scsi_cmd_ioctl would normally handle these, below, but */
1718 /* they aren't a good fit for cciss, as CD-ROMs are */
1719 /* not supported, and we don't have any bus/target/lun */
1720 /* which we present to the kernel. */
1721
1722 case CDROM_SEND_PACKET:
1723 case CDROMCLOSETRAY:
1724 case CDROMEJECT:
1725 case SCSI_IOCTL_GET_IDLUN:
1726 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1727 default:
1728 return -ENOTTY;
1729 }
1da177e4
LT		 1730}
1731
7b30f092
JA		 1732static void cciss_check_queues(ctlr_info_t *h)
1733{
1734 int start_queue = h->next_to_run;
1735 int i;
1736
1737 /* check to see if we have maxed out the number of commands that can
1738 * be placed on the queue. If so then exit. We do this check here
1739 * in case the interrupt we serviced was from an ioctl and did not
1740 * free any new commands.
1741 */
f880632f 1742 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1743 return;
1744
1745 /* We have room on the queue for more commands. Now we need to queue
1746 * them up. We will also keep track of the next queue to run so
1747 * that every queue gets a chance to be started first.
1748 */
1749 for (i = 0; i < h->highest_lun + 1; i++) {
1750 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1751 /* make sure the disk has been added and the drive is real
1752 * because this can be called from the middle of init_one.
1753 */
9cef0d2f
SC		 1754 if (!h->drv[curr_queue])
1755 continue;
1756 if (!(h->drv[curr_queue]->queue) ||
1757 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1758 continue;
1759 blk_start_queue(h->gendisk[curr_queue]->queue);
1760
1761 /* check to see if we have maxed out the number of commands
1762 * that can be placed on the queue.
1763 */
f880632f 1764 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1765 if (curr_queue == start_queue) {
1766 h->next_to_run =
1767 (start_queue + 1) % (h->highest_lun + 1);
1768 break;
1769 } else {
1770 h->next_to_run = curr_queue;
1771 break;
1772 }
7b30f092
JA		 1773 }
1774 }
1775}
1776
ca1e0484
MM		 1777static void cciss_softirq_done(struct request *rq)
1778{
f70dba83
SC		 1779 CommandList_struct *c = rq->completion_data;
1780 ctlr_info_t *h = hba[c->ctlr];
1781 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1782 u64bit temp64;
664a717d 1783 unsigned long flags;
ca1e0484 1784 int i, ddir;
5c07a311 1785 int sg_index = 0;
ca1e0484 1786
f70dba83 1787 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1788 ddir = PCI_DMA_FROMDEVICE;
1789 else
1790 ddir = PCI_DMA_TODEVICE;
1791
1792 /* command did not need to be retried */
1793 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1794 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1795 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1796 cciss_unmap_sg_chain_block(h, c);
5c07a311 1797 /* Point to the next block */
f70dba83 1798 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1799 sg_index = 0;
1800 }
1801 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1802 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1803 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1804 ddir);
1805 ++sg_index;
ca1e0484
MM		 1806 }
1807
b2a4a43d 1808 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1809
c3a4d78c 1810 /* set the residual count for pc requests */
33659ebb 1811 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1812 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1813
c3a4d78c 1814 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1815
ca1e0484 1816 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1817 cmd_free(h, c);
7b30f092 1818 cciss_check_queues(h);
ca1e0484
MM		 1819 spin_unlock_irqrestore(&h->lock, flags);
1820}
1821
39ccf9a6
SC		 1822static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1823 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1824{
9cef0d2f
SC		 1825 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1826 sizeof(h->drv[log_unit]->LunID));
b57695fe 1827}
1828
7fe06326
AP		 1829/* This function gets the SCSI vendor, model, and revision of a logical drive
1830 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1831 * they cannot be read.
1832 */
f70dba83 1833static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1834 char *vendor, char *model, char *rev)
1835{
1836 int rc;
1837 InquiryData_struct *inq_buf;
b57695fe 1838 unsigned char scsi3addr[8];
7fe06326
AP		 1839
1840 *vendor = '\0';
1841 *model = '\0';
1842 *rev = '\0';
1843
1844 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1845 if (!inq_buf)
1846 return;
1847
f70dba83
SC		 1848 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1849 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1850 scsi3addr, TYPE_CMD);
7fe06326
AP		 1851 if (rc == IO_OK) {
1852 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1853 vendor[VENDOR_LEN] = '\0';
1854 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1855 model[MODEL_LEN] = '\0';
1856 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1857 rev[REV_LEN] = '\0';
1858 }
1859
1860 kfree(inq_buf);
1861 return;
1862}
1863
a72da29b
MM		 1864/* This function gets the serial number of a logical drive via
1865 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1866 * number cannot be had, for whatever reason, 16 bytes of 0xff
1867 * are returned instead.
1868 */
f70dba83 1869static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1870 unsigned char *serial_no, int buflen)
1871{
1872#define PAGE_83_INQ_BYTES 64
1873 int rc;
1874 unsigned char *buf;
b57695fe 1875 unsigned char scsi3addr[8];
a72da29b
MM		 1876
1877 if (buflen > 16)
1878 buflen = 16;
1879 memset(serial_no, 0xff, buflen);
1880 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1881 if (!buf)
1882 return;
1883 memset(serial_no, 0, buflen);
f70dba83
SC		 1884 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1885 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1886 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1887 if (rc == IO_OK)
1888 memcpy(serial_no, &buf[8], buflen);
1889 kfree(buf);
1890 return;
1891}
1892
617e1344
SC		 1893/*
1894 * cciss_add_disk sets up the block device queue for a logical drive
1895 */
1896static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1897 int drv_index)
1898{
1899 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1900 if (!disk->queue)
1901 goto init_queue_failure;
6ae5ce8e
MM		 1902 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1903 disk->major = h->major;
1904 disk->first_minor = drv_index << NWD_SHIFT;
1905 disk->fops = &cciss_fops;
9cef0d2f
SC		 1906 if (cciss_create_ld_sysfs_entry(h, drv_index))
1907 goto cleanup_queue;
1908 disk->private_data = h->drv[drv_index];
1909 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1910
1911 /* Set up queue information */
1912 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1913
1914 /* This is a hardware imposed limit. */
8a78362c 1915 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1916
086fa5ff 1917 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1918
1919 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1920
1921 disk->queue->queuedata = h;
1922
e1defc4f 1923 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1924 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1925
1926 /* Make sure all queue data is written out before */
9cef0d2f 1927 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1928 /* allows the interrupt handler to start the queue */
1929 wmb();
9cef0d2f 1930 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1931 add_disk(disk);
617e1344
SC		 1932 return 0;
1933
1934cleanup_queue:
1935 blk_cleanup_queue(disk->queue);
1936 disk->queue = NULL;
e8074f79 1937init_queue_failure:
617e1344 1938 return -1;
6ae5ce8e
MM		 1939}
1940
ddd47442 1941/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1942 * If the usage_count is zero and it is a heretofore unknown drive, or,
1943 * the drive's capacity, geometry, or serial number has changed,
1944 * then the drive information will be updated and the disk will be
1945 * re-registered with the kernel. If these conditions don't hold,
1946 * then it will be left alone for the next reboot. The exception to this
1947 * is disk 0 which will always be left registered with the kernel since it
1948 * is also the controller node. Any changes to disk 0 will show up on
1949 * the next reboot.
7c832835 1950 */
f70dba83
SC		 1951static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1952 int first_time, int via_ioctl)
7c832835 1953{
ddd47442 1954 struct gendisk *disk;
ddd47442
MM		 1955 InquiryData_struct *inq_buff = NULL;
1956 unsigned int block_size;
00988a35 1957 sector_t total_size;
ddd47442
MM		 1958 unsigned long flags = 0;
1959 int ret = 0;
a72da29b
MM		 1960 drive_info_struct *drvinfo;
1961
1962 /* Get information about the disk and modify the driver structure */
1963 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1964 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1965 if (inq_buff == NULL || drvinfo == NULL)
1966 goto mem_msg;
1967
1968 /* testing to see if 16-byte CDBs are already being used */
1969 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1970 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1971 &total_size, &block_size);
1972
1973 } else {
f70dba83 1974 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1975 /* if read_capacity returns all F's this volume is >2TB */
1976 /* in size so we switch to 16-byte CDB's for all */
1977 /* read/write ops */
1978 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1979 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1980 &total_size, &block_size);
1981 h->cciss_read = CCISS_READ_16;
1982 h->cciss_write = CCISS_WRITE_16;
1983 } else {
1984 h->cciss_read = CCISS_READ_10;
1985 h->cciss_write = CCISS_WRITE_10;
1986 }
1987 }
1988
f70dba83 1989 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 1990 inq_buff, drvinfo);
1991 drvinfo->block_size = block_size;
1992 drvinfo->nr_blocks = total_size + 1;
1993
f70dba83 1994 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1995 drvinfo->model, drvinfo->rev);
f70dba83 1996 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1997 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 1998 /* Save the lunid in case we deregister the disk, below. */
1999 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2000 sizeof(drvinfo->LunID));
a72da29b
MM		 2001
2002 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 2003 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 2004 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 2005 h->drv[drv_index]->serial_no, 16) == 0) &&
2006 drvinfo->block_size == h->drv[drv_index]->block_size &&
2007 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2008 drvinfo->heads == h->drv[drv_index]->heads &&
2009 drvinfo->sectors == h->drv[drv_index]->sectors &&
2010 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2011 /* The disk is unchanged, nothing to update */
2012 goto freeret;
a72da29b 2013
6ae5ce8e
MM		 2014 /* If we get here it's not the same disk, or something's changed,
2015 * so we need to * deregister it, and re-register it, if it's not
2016 * in use.
2017 * If the disk already exists then deregister it before proceeding
2018 * (unless it's the first disk (for the controller node).
2019 */
9cef0d2f 2020 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2021 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2022 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2023 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2024 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2025
9cef0d2f 2026 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2027 * which keeps the interrupt handler from starting
2028 * the queue.
2029 */
2d11d993 2030 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2031 }
2032
2033 /* If the disk is in use return */
2034 if (ret)
a72da29b
MM		 2035 goto freeret;
2036
6ae5ce8e 2037 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2038 * and serial number inquiry. If the disk was deregistered
2039 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2040 */
9cef0d2f
SC		 2041 if (h->drv[drv_index] == NULL) {
2042 drvinfo->device_initialized = 0;
2043 h->drv[drv_index] = drvinfo;
2044 drvinfo = NULL; /* so it won't be freed below. */
2045 } else {
2046 /* special case for cxd0 */
2047 h->drv[drv_index]->block_size = drvinfo->block_size;
2048 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2049 h->drv[drv_index]->heads = drvinfo->heads;
2050 h->drv[drv_index]->sectors = drvinfo->sectors;
2051 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2052 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2053 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2054 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2055 VENDOR_LEN + 1);
2056 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2057 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2058 }
ddd47442
MM		 2059
2060 ++h->num_luns;
2061 disk = h->gendisk[drv_index];
9cef0d2f 2062 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2063
6ae5ce8e
MM		 2064 /* If it's not disk 0 (drv_index != 0)
2065 * or if it was disk 0, but there was previously
2066 * no actual corresponding configured logical drive
2067 * (raid_leve == -1) then we want to update the
2068 * logical drive's information.
2069 */
361e9b07
SC		 2070 if (drv_index || first_time) {
2071 if (cciss_add_disk(h, disk, drv_index) != 0) {
2072 cciss_free_gendisk(h, drv_index);
9cef0d2f 2073 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2074 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2075 drv_index);
361e9b07
SC		 2076 --h->num_luns;
2077 }
2078 }
ddd47442 2079
6ae5ce8e 2080freeret:
ddd47442 2081 kfree(inq_buff);
a72da29b 2082 kfree(drvinfo);
ddd47442 2083 return;
6ae5ce8e 2084mem_msg:
b2a4a43d 2085 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2086 goto freeret;
2087}
2088
2089/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2090 * that has a null drv pointer and allocate the drive info struct and
2091 * will return that index This is where new drives will be added.
2092 * If the index to be returned is greater than the highest_lun index for
2093 * the controller then highest_lun is set * to this new index.
2094 * If there are no available indexes or if tha allocation fails, then -1
2095 * is returned. * "controller_node" is used to know if this is a real
2096 * logical drive, or just the controller node, which determines if this
2097 * counts towards highest_lun.
7c832835 2098 */
9cef0d2f 2099static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2100{
2101 int i;
9cef0d2f 2102 drive_info_struct *drv;
ddd47442 2103
9cef0d2f 2104 /* Search for an empty slot for our drive info */
7c832835 2105 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2106
2107 /* if not cxd0 case, and it's occupied, skip it. */
2108 if (h->drv[i] && i != 0)
2109 continue;
2110 /*
2111 * If it's cxd0 case, and drv is alloc'ed already, and a
2112 * disk is configured there, skip it.
2113 */
2114 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2115 continue;
2116
2117 /*
2118 * We've found an empty slot. Update highest_lun
2119 * provided this isn't just the fake cxd0 controller node.
2120 */
2121 if (i > h->highest_lun && !controller_node)
2122 h->highest_lun = i;
2123
2124 /* If adding a real disk at cxd0, and it's already alloc'ed */
2125 if (i == 0 && h->drv[i] != NULL)
ddd47442 2126 return i;
9cef0d2f
SC		 2127
2128 /*
2129 * Found an empty slot, not already alloc'ed. Allocate it.
2130 * Mark it with raid_level == -1, so we know it's new later on.
2131 */
2132 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2133 if (!drv)
2134 return -1;
2135 drv->raid_level = -1; /* so we know it's new */
2136 h->drv[i] = drv;
2137 return i;
ddd47442
MM		 2138 }
2139 return -1;
2140}
2141
9cef0d2f
SC		 2142static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2143{
2144 kfree(h->drv[drv_index]);
2145 h->drv[drv_index] = NULL;
2146}
2147
361e9b07
SC		 2148static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2149{
2150 put_disk(h->gendisk[drv_index]);
2151 h->gendisk[drv_index] = NULL;
2152}
2153
6ae5ce8e
MM		 2154/* cciss_add_gendisk finds a free hba[]->drv structure
2155 * and allocates a gendisk if needed, and sets the lunid
2156 * in the drvinfo structure. It returns the index into
2157 * the ->drv[] array, or -1 if none are free.
2158 * is_controller_node indicates whether highest_lun should
2159 * count this disk, or if it's only being added to provide
2160 * a means to talk to the controller in case no logical
2161 * drives have yet been configured.
2162 */
39ccf9a6
SC		 2163static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2164 int controller_node)
6ae5ce8e
MM		 2165{
2166 int drv_index;
2167
9cef0d2f 2168 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2169 if (drv_index == -1)
2170 return -1;
8ce51966 2171
6ae5ce8e
MM		 2172 /*Check if the gendisk needs to be allocated */
2173 if (!h->gendisk[drv_index]) {
2174 h->gendisk[drv_index] =
2175 alloc_disk(1 << NWD_SHIFT);
2176 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2177 dev_err(&h->pdev->dev,
2178 "could not allocate a new disk %d\n",
2179 drv_index);
9cef0d2f 2180 goto err_free_drive_info;
6ae5ce8e
MM		 2181 }
2182 }
9cef0d2f
SC		 2183 memcpy(h->drv[drv_index]->LunID, lunid,
2184 sizeof(h->drv[drv_index]->LunID));
2185 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2186 goto err_free_disk;
6ae5ce8e
MM		 2187 /* Don't need to mark this busy because nobody */
2188 /* else knows about this disk yet to contend */
2189 /* for access to it. */
9cef0d2f 2190 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2191 wmb();
2192 return drv_index;
7fe06326
AP		 2193
2194err_free_disk:
361e9b07 2195 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2196err_free_drive_info:
2197 cciss_free_drive_info(h, drv_index);
7fe06326 2198 return -1;
6ae5ce8e
MM		 2199}
2200
2201/* This is for the special case of a controller which
2202 * has no logical drives. In this case, we still need
2203 * to register a disk so the controller can be accessed
2204 * by the Array Config Utility.
2205 */
2206static void cciss_add_controller_node(ctlr_info_t *h)
2207{
2208 struct gendisk *disk;
2209 int drv_index;
2210
2211 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2212 return;
2213
39ccf9a6 2214 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2215 if (drv_index == -1)
2216 goto error;
9cef0d2f
SC		 2217 h->drv[drv_index]->block_size = 512;
2218 h->drv[drv_index]->nr_blocks = 0;
2219 h->drv[drv_index]->heads = 0;
2220 h->drv[drv_index]->sectors = 0;
2221 h->drv[drv_index]->cylinders = 0;
2222 h->drv[drv_index]->raid_level = -1;
2223 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2224 disk = h->gendisk[drv_index];
361e9b07
SC		 2225 if (cciss_add_disk(h, disk, drv_index) == 0)
2226 return;
2227 cciss_free_gendisk(h, drv_index);
9cef0d2f 2228 cciss_free_drive_info(h, drv_index);
361e9b07 2229error:
b2a4a43d 2230 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2231 return;
6ae5ce8e
MM		 2232}
2233
ddd47442 2234/* This function will add and remove logical drives from the Logical
d14c4ab5 2235 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2236 * so that mount points are preserved until the next reboot. This allows
2237 * for the removal of logical drives in the middle of the drive array
2238 * without a re-ordering of those drives.
2239 * INPUT
2240 * h = The controller to perform the operations on
7c832835 2241 */
2d11d993
SC		 2242static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2243 int via_ioctl)
1da177e4 2244{
ddd47442
MM		 2245 int num_luns;
2246 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2247 int return_code;
2248 int listlength = 0;
2249 int i;
2250 int drv_found;
2251 int drv_index = 0;
39ccf9a6 2252 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2253 unsigned long flags;
ddd47442 2254
6ae5ce8e
MM		 2255 if (!capable(CAP_SYS_RAWIO))
2256 return -EPERM;
2257
ddd47442 2258 /* Set busy_configuring flag for this operation */
f70dba83 2259 spin_lock_irqsave(&h->lock, flags);
7c832835 2260 if (h->busy_configuring) {
f70dba83 2261 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2262 return -EBUSY;
2263 }
2264 h->busy_configuring = 1;
f70dba83 2265 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2266
a72da29b
MM		 2267 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2268 if (ld_buff == NULL)
2269 goto mem_msg;
2270
f70dba83 2271 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2272 sizeof(ReportLunData_struct),
2273 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2274
a72da29b
MM		 2275 if (return_code == IO_OK)
2276 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2277 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2278 dev_warn(&h->pdev->dev,
2279 "report logical volume command failed\n");
a72da29b
MM		 2280 listlength = 0;
2281 goto freeret;
2282 }
2283
2284 num_luns = listlength / 8; /* 8 bytes per entry */
2285 if (num_luns > CISS_MAX_LUN) {
2286 num_luns = CISS_MAX_LUN;
b2a4a43d 2287 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2288 " on controller than can be handled by"
2289 " this driver.\n");
2290 }
2291
6ae5ce8e
MM		 2292 if (num_luns == 0)
2293 cciss_add_controller_node(h);
2294
2295 /* Compare controller drive array to driver's drive array
2296 * to see if any drives are missing on the controller due
2297 * to action of Array Config Utility (user deletes drive)
2298 * and deregister logical drives which have disappeared.
2299 */
a72da29b
MM		 2300 for (i = 0; i <= h->highest_lun; i++) {
2301 int j;
2302 drv_found = 0;
d8a0be6a
SC		 2303
2304 /* skip holes in the array from already deleted drives */
9cef0d2f 2305 if (h->drv[i] == NULL)
d8a0be6a
SC		 2306 continue;
2307
a72da29b 2308 for (j = 0; j < num_luns; j++) {
39ccf9a6 2309 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2310 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2311 sizeof(lunid)) == 0) {
a72da29b
MM		 2312 drv_found = 1;
2313 break;
2314 }
2315 }
2316 if (!drv_found) {
2317 /* Deregister it from the OS, it's gone. */
f70dba83 2318 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2319 h->drv[i]->busy_configuring = 1;
f70dba83 2320 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2321 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2322 if (h->drv[i] != NULL)
2323 h->drv[i]->busy_configuring = 0;
ddd47442 2324 }
a72da29b 2325 }
ddd47442 2326
a72da29b
MM		 2327 /* Compare controller drive array to driver's drive array.
2328 * Check for updates in the drive information and any new drives
2329 * on the controller due to ACU adding logical drives, or changing
2330 * a logical drive's size, etc. Reregister any new/changed drives
2331 */
2332 for (i = 0; i < num_luns; i++) {
2333 int j;
ddd47442 2334
a72da29b 2335 drv_found = 0;
ddd47442 2336
39ccf9a6 2337 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2338 /* Find if the LUN is already in the drive array
2339 * of the driver. If so then update its info
2340 * if not in use. If it does not exist then find
2341 * the first free index and add it.
2342 */
2343 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2344 if (h->drv[j] != NULL &&
2345 memcmp(h->drv[j]->LunID, lunid,
2346 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2347 drv_index = j;
2348 drv_found = 1;
2349 break;
ddd47442 2350 }
a72da29b 2351 }
ddd47442 2352
a72da29b
MM		 2353 /* check if the drive was found already in the array */
2354 if (!drv_found) {
eece695f 2355 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2356 if (drv_index == -1)
2357 goto freeret;
a72da29b 2358 }
f70dba83 2359 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2360 } /* end for */
ddd47442 2361
6ae5ce8e 2362freeret:
ddd47442
MM		 2363 kfree(ld_buff);
2364 h->busy_configuring = 0;
2365 /* We return -1 here to tell the ACU that we have registered/updated
2366 * all of the drives that we can and to keep it from calling us
2367 * additional times.
7c832835 2368 */
ddd47442 2369 return -1;
6ae5ce8e 2370mem_msg:
b2a4a43d 2371 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2372 h->busy_configuring = 0;
ddd47442
MM		 2373 goto freeret;
2374}
2375
9ddb27b4
SC		 2376static void cciss_clear_drive_info(drive_info_struct *drive_info)
2377{
2378 /* zero out the disk size info */
2379 drive_info->nr_blocks = 0;
2380 drive_info->block_size = 0;
2381 drive_info->heads = 0;
2382 drive_info->sectors = 0;
2383 drive_info->cylinders = 0;
2384 drive_info->raid_level = -1;
2385 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2386 memset(drive_info->model, 0, sizeof(drive_info->model));
2387 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2388 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2389 /*
2390 * don't clear the LUNID though, we need to remember which
2391 * one this one is.
2392 */
2393}
2394
ddd47442
MM		 2395/* This function will deregister the disk and it's queue from the
2396 * kernel. It must be called with the controller lock held and the
2397 * drv structures busy_configuring flag set. It's parameters are:
2398 *
2399 * disk = This is the disk to be deregistered
2400 * drv = This is the drive_info_struct associated with the disk to be
2401 * deregistered. It contains information about the disk used
2402 * by the driver.
2403 * clear_all = This flag determines whether or not the disk information
2404 * is going to be completely cleared out and the highest_lun
2405 * reset. Sometimes we want to clear out information about
d14c4ab5 2406 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2407 * the highest_lun should be left unchanged and the LunID
2408 * should not be cleared.
2d11d993
SC		 2409 * via_ioctl
2410 * This indicates whether we've reached this path via ioctl.
2411 * This affects the maximum usage count allowed for c0d0 to be messed with.
2412 * If this path is reached via ioctl(), then the max_usage_count will
2413 * be 1, as the process calling ioctl() has got to have the device open.
2414 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2415*/
a0ea8622 2416static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2417 int clear_all, int via_ioctl)
ddd47442 2418{
799202cb 2419 int i;
a0ea8622
SC		 2420 struct gendisk *disk;
2421 drive_info_struct *drv;
9cef0d2f 2422 int recalculate_highest_lun;
1da177e4
LT		 2423
2424 if (!capable(CAP_SYS_RAWIO))
2425 return -EPERM;
2426
9cef0d2f 2427 drv = h->drv[drv_index];
a0ea8622
SC		 2428 disk = h->gendisk[drv_index];
2429
1da177e4 2430 /* make sure logical volume is NOT is use */
7c832835 2431 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2432 if (drv->usage_count > via_ioctl)
7c832835
BH		 2433 return -EBUSY;
2434 } else if (drv->usage_count > 0)
2435 return -EBUSY;
1da177e4 2436
9cef0d2f
SC		 2437 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2438
ddd47442
MM		 2439 /* invalidate the devices and deregister the disk. If it is disk
2440 * zero do not deregister it but just zero out it's values. This
2441 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2442 */
2443 if (h->gendisk[0] != disk) {
5a9df732 2444 struct request_queue *q = disk->queue;
097d0264 2445 if (disk->flags & GENHD_FL_UP) {
8ce51966 2446 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2447 del_gendisk(disk);
5a9df732 2448 }
9cef0d2f 2449 if (q)
5a9df732 2450 blk_cleanup_queue(q);
5a9df732
AB		 2451 /* If clear_all is set then we are deleting the logical
2452 * drive, not just refreshing its info. For drives
2453 * other than disk 0 we will call put_disk. We do not
2454 * do this for disk 0 as we need it to be able to
2455 * configure the controller.
a72da29b 2456 */
5a9df732
AB		 2457 if (clear_all){
2458 /* This isn't pretty, but we need to find the
2459 * disk in our array and NULL our the pointer.
2460 * This is so that we will call alloc_disk if
2461 * this index is used again later.
a72da29b 2462 */
5a9df732 2463 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2464 if (h->gendisk[i] == disk) {
5a9df732
AB		 2465 h->gendisk[i] = NULL;
2466 break;
799202cb 2467 }
799202cb 2468 }
5a9df732 2469 put_disk(disk);
ddd47442 2470 }
799202cb
MM		 2471 } else {
2472 set_capacity(disk, 0);
9cef0d2f 2473 cciss_clear_drive_info(drv);
ddd47442
MM		 2474 }
2475
2476 --h->num_luns;
ddd47442 2477
9cef0d2f
SC		 2478 /* if it was the last disk, find the new hightest lun */
2479 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2480 int newhighest = -1;
9cef0d2f
SC		 2481 for (i = 0; i <= h->highest_lun; i++) {
2482 /* if the disk has size > 0, it is available */
2483 if (h->drv[i] && h->drv[i]->heads)
2484 newhighest = i;
1da177e4 2485 }
9cef0d2f 2486 h->highest_lun = newhighest;
ddd47442 2487 }
e2019b58 2488 return 0;
1da177e4 2489}
ddd47442 2490
f70dba83 2491static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2492 size_t size, __u8 page_code, unsigned char *scsi3addr,
2493 int cmd_type)
1da177e4 2494{
1da177e4
LT		 2495 u64bit buff_dma_handle;
2496 int status = IO_OK;
2497
2498 c->cmd_type = CMD_IOCTL_PEND;
2499 c->Header.ReplyQueue = 0;
7c832835 2500 if (buff != NULL) {
1da177e4 2501 c->Header.SGList = 1;
7c832835 2502 c->Header.SGTotal = 1;
1da177e4
LT		 2503 } else {
2504 c->Header.SGList = 0;
7c832835 2505 c->Header.SGTotal = 0;
1da177e4
LT		 2506 }
2507 c->Header.Tag.lower = c->busaddr;
b57695fe 2508 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2509
2510 c->Request.Type.Type = cmd_type;
2511 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2512 switch (cmd) {
2513 case CISS_INQUIRY:
1da177e4 2514 /* are we trying to read a vital product page */
7c832835 2515 if (page_code != 0) {
1da177e4
LT		 2516 c->Request.CDB[1] = 0x01;
2517 c->Request.CDB[2] = page_code;
2518 }
2519 c->Request.CDBLen = 6;
7c832835 2520 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2521 c->Request.Type.Direction = XFER_READ;
2522 c->Request.Timeout = 0;
7c832835
BH		 2523 c->Request.CDB[0] = CISS_INQUIRY;
2524 c->Request.CDB[4] = size & 0xFF;
2525 break;
1da177e4
LT		 2526 case CISS_REPORT_LOG:
2527 case CISS_REPORT_PHYS:
7c832835 2528 /* Talking to controller so It's a physical command
1da177e4 2529 mode = 00 target = 0. Nothing to write.
7c832835 2530 */
1da177e4
LT		 2531 c->Request.CDBLen = 12;
2532 c->Request.Type.Attribute = ATTR_SIMPLE;
2533 c->Request.Type.Direction = XFER_READ;
2534 c->Request.Timeout = 0;
2535 c->Request.CDB[0] = cmd;
b028461d 2536 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2537 c->Request.CDB[7] = (size >> 16) & 0xFF;
2538 c->Request.CDB[8] = (size >> 8) & 0xFF;
2539 c->Request.CDB[9] = size & 0xFF;
2540 break;
2541
2542 case CCISS_READ_CAPACITY:
1da177e4
LT		 2543 c->Request.CDBLen = 10;
2544 c->Request.Type.Attribute = ATTR_SIMPLE;
2545 c->Request.Type.Direction = XFER_READ;
2546 c->Request.Timeout = 0;
2547 c->Request.CDB[0] = cmd;
7c832835 2548 break;
00988a35 2549 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2550 c->Request.CDBLen = 16;
2551 c->Request.Type.Attribute = ATTR_SIMPLE;
2552 c->Request.Type.Direction = XFER_READ;
2553 c->Request.Timeout = 0;
2554 c->Request.CDB[0] = cmd;
2555 c->Request.CDB[1] = 0x10;
2556 c->Request.CDB[10] = (size >> 24) & 0xFF;
2557 c->Request.CDB[11] = (size >> 16) & 0xFF;
2558 c->Request.CDB[12] = (size >> 8) & 0xFF;
2559 c->Request.CDB[13] = size & 0xFF;
2560 c->Request.Timeout = 0;
2561 c->Request.CDB[0] = cmd;
2562 break;
1da177e4
LT		 2563 case CCISS_CACHE_FLUSH:
2564 c->Request.CDBLen = 12;
2565 c->Request.Type.Attribute = ATTR_SIMPLE;
2566 c->Request.Type.Direction = XFER_WRITE;
2567 c->Request.Timeout = 0;
2568 c->Request.CDB[0] = BMIC_WRITE;
2569 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2570 break;
88f627ae 2571 case TEST_UNIT_READY:
88f627ae
SC		 2572 c->Request.CDBLen = 6;
2573 c->Request.Type.Attribute = ATTR_SIMPLE;
2574 c->Request.Type.Direction = XFER_NONE;
2575 c->Request.Timeout = 0;
2576 break;
1da177e4 2577 default:
b2a4a43d 2578 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2579 return IO_ERROR;
1da177e4
LT		 2580 }
2581 } else if (cmd_type == TYPE_MSG) {
2582 switch (cmd) {
7c832835 2583 case 0: /* ABORT message */
3da8b713 2584 c->Request.CDBLen = 12;
2585 c->Request.Type.Attribute = ATTR_SIMPLE;
2586 c->Request.Type.Direction = XFER_WRITE;
2587 c->Request.Timeout = 0;
7c832835
BH		 2588 c->Request.CDB[0] = cmd; /* abort */
2589 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2590 /* buff contains the tag of the command to abort */
2591 memcpy(&c->Request.CDB[4], buff, 8);
2592 break;
7c832835 2593 case 1: /* RESET message */
88f627ae 2594 c->Request.CDBLen = 16;
3da8b713 2595 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2596 c->Request.Type.Direction = XFER_NONE;
3da8b713 2597 c->Request.Timeout = 0;
2598 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2599 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2600 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2601 break;
1da177e4
LT		 2602 case 3: /* No-Op message */
2603 c->Request.CDBLen = 1;
2604 c->Request.Type.Attribute = ATTR_SIMPLE;
2605 c->Request.Type.Direction = XFER_WRITE;
2606 c->Request.Timeout = 0;
2607 c->Request.CDB[0] = cmd;
2608 break;
2609 default:
b2a4a43d
SC		 2610 dev_warn(&h->pdev->dev,
2611 "unknown message type %d\n", cmd);
1da177e4
LT		 2612 return IO_ERROR;
2613 }
2614 } else {
b2a4a43d 2615 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2616 return IO_ERROR;
2617 }
2618 /* Fill in the scatter gather information */
2619 if (size > 0) {
2620 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2621 buff, size,
2622 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2623 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2624 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2625 c->SG[0].Len = size;
7c832835 2626 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2627 }
2628 return status;
2629}
7c832835 2630
3c2ab402 2631static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2632{
2633 switch (c->err_info->ScsiStatus) {
2634 case SAM_STAT_GOOD:
2635 return IO_OK;
2636 case SAM_STAT_CHECK_CONDITION:
2637 switch (0xf & c->err_info->SenseInfo[2]) {
2638 case 0: return IO_OK; /* no sense */
2639 case 1: return IO_OK; /* recovered error */
2640 default:
c08fac65
SC		 2641 if (check_for_unit_attention(h, c))
2642 return IO_NEEDS_RETRY;
b2a4a43d 2643 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2644 "check condition, sense key = 0x%02x\n",
b2a4a43d 2645 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2646 }
2647 break;
2648 default:
b2a4a43d
SC		 2649 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2650 "scsi status = 0x%02x\n",
3c2ab402 2651 c->Request.CDB[0], c->err_info->ScsiStatus);
2652 break;
2653 }
2654 return IO_ERROR;
2655}
2656
789a424a 2657static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2658{
5390cfc3 2659 int return_status = IO_OK;
7c832835 2660
789a424a 2661 if (c->err_info->CommandStatus == CMD_SUCCESS)
2662 return IO_OK;
5390cfc3 2663
2664 switch (c->err_info->CommandStatus) {
2665 case CMD_TARGET_STATUS:
3c2ab402 2666 return_status = check_target_status(h, c);
5390cfc3 2667 break;
2668 case CMD_DATA_UNDERRUN:
2669 case CMD_DATA_OVERRUN:
2670 /* expected for inquiry and report lun commands */
2671 break;
2672 case CMD_INVALID:
b2a4a43d 2673 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2674 "reported invalid\n", c->Request.CDB[0]);
2675 return_status = IO_ERROR;
2676 break;
2677 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2678 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2679 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2680 return_status = IO_ERROR;
2681 break;
2682 case CMD_HARDWARE_ERR:
b2a4a43d 2683 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2684 " hardware error\n", c->Request.CDB[0]);
2685 return_status = IO_ERROR;
2686 break;
2687 case CMD_CONNECTION_LOST:
b2a4a43d 2688 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2689 "connection lost\n", c->Request.CDB[0]);
2690 return_status = IO_ERROR;
2691 break;
2692 case CMD_ABORTED:
b2a4a43d 2693 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2694 "aborted\n", c->Request.CDB[0]);
2695 return_status = IO_ERROR;
2696 break;
2697 case CMD_ABORT_FAILED:
b2a4a43d 2698 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2699 "abort failed\n", c->Request.CDB[0]);
2700 return_status = IO_ERROR;
2701 break;
2702 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2703 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2704 c->Request.CDB[0]);
789a424a 2705 return_status = IO_NEEDS_RETRY;
5390cfc3 2706 break;
2707 default:
b2a4a43d 2708 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2709 "unknown status %x\n", c->Request.CDB[0],
2710 c->err_info->CommandStatus);
2711 return_status = IO_ERROR;
7c832835 2712 }
789a424a 2713 return return_status;
2714}
2715
2716static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2717 int attempt_retry)
2718{
2719 DECLARE_COMPLETION_ONSTACK(wait);
2720 u64bit buff_dma_handle;
789a424a 2721 int return_status = IO_OK;
2722
2723resend_cmd2:
2724 c->waiting = &wait;
664a717d 2725 enqueue_cmd_and_start_io(h, c);
789a424a 2726
2727 wait_for_completion(&wait);
2728
2729 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2730 goto command_done;
2731
2732 return_status = process_sendcmd_error(h, c);
2733
2734 if (return_status == IO_NEEDS_RETRY &&
2735 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2736 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2737 c->Request.CDB[0]);
2738 c->retry_count++;
2739 /* erase the old error information */
2740 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2741 return_status = IO_OK;
2742 INIT_COMPLETION(wait);
2743 goto resend_cmd2;
2744 }
5390cfc3 2745
2746command_done:
1da177e4 2747 /* unlock the buffers from DMA */
bb2a37bf
MM		 2748 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2749 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2750 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2751 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2752 return return_status;
2753}
2754
f70dba83 2755static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2756 __u8 page_code, unsigned char scsi3addr[],
2757 int cmd_type)
5390cfc3 2758{
5390cfc3 2759 CommandList_struct *c;
2760 int return_status;
2761
6b4d96b8 2762 c = cmd_special_alloc(h);
5390cfc3 2763 if (!c)
2764 return -ENOMEM;
f70dba83 2765 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2766 scsi3addr, cmd_type);
5390cfc3 2767 if (return_status == IO_OK)
789a424a 2768 return_status = sendcmd_withirq_core(h, c, 1);
2769
6b4d96b8 2770 cmd_special_free(h, c);
7c832835 2771 return return_status;
1da177e4 2772}
7c832835 2773
f70dba83 2774static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2775 sector_t total_size,
7c832835
BH		 2776 unsigned int block_size,
2777 InquiryData_struct *inq_buff,
2778 drive_info_struct *drv)
1da177e4
LT		 2779{
2780 int return_code;
00988a35 2781 unsigned long t;
b57695fe 2782 unsigned char scsi3addr[8];
00988a35 2783
1da177e4 2784 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2785 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2786 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2787 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2788 if (return_code == IO_OK) {
7c832835 2789 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2790 dev_warn(&h->pdev->dev,
2791 "reading geometry failed, volume "
7c832835 2792 "does not support reading geometry\n");
1da177e4 2793 drv->heads = 255;
b028461d 2794 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2795 drv->cylinders = total_size + 1;
89f97ad1 2796 drv->raid_level = RAID_UNKNOWN;
1da177e4 2797 } else {
1da177e4
LT		 2798 drv->heads = inq_buff->data_byte[6];
2799 drv->sectors = inq_buff->data_byte[7];
2800 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2801 drv->cylinders += inq_buff->data_byte[5];
2802 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2803 }
2804 drv->block_size = block_size;
97c06978 2805 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2806 t = drv->heads * drv->sectors;
2807 if (t > 1) {
97c06978
MMOD		 2808 sector_t real_size = total_size + 1;
2809 unsigned long rem = sector_div(real_size, t);
3f7705ea 2810 if (rem)
97c06978
MMOD		 2811 real_size++;
2812 drv->cylinders = real_size;
1da177e4 2813 }
7c832835 2814 } else { /* Get geometry failed */
b2a4a43d 2815 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2816 }
1da177e4 2817}
7c832835 2818
1da177e4 2819static void
f70dba83 2820cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2821 unsigned int *block_size)
1da177e4 2822{
00988a35 2823 ReadCapdata_struct *buf;
1da177e4 2824 int return_code;
b57695fe 2825 unsigned char scsi3addr[8];
1aebe187
MK		 2826
2827 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2828 if (!buf) {
b2a4a43d 2829 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2830 return;
2831 }
1aebe187 2832
f70dba83
SC		 2833 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2834 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2835 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2836 if (return_code == IO_OK) {
4c1f2b31
AV		 2837 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2838 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2839 } else { /* read capacity command failed */
b2a4a43d 2840 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2841 *total_size = 0;
2842 *block_size = BLOCK_SIZE;
2843 }
00988a35 2844 kfree(buf);
00988a35
MMOD		 2845}
2846
f70dba83 2847static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2848 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2849{
2850 ReadCapdata_struct_16 *buf;
2851 int return_code;
b57695fe 2852 unsigned char scsi3addr[8];
1aebe187
MK		 2853
2854 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2855 if (!buf) {
b2a4a43d 2856 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2857 return;
2858 }
1aebe187 2859
f70dba83
SC		 2860 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2861 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2862 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2863 0, scsi3addr, TYPE_CMD);
00988a35 2864 if (return_code == IO_OK) {
4c1f2b31
AV		 2865 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2866 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2867 } else { /* read capacity command failed */
b2a4a43d 2868 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2869 *total_size = 0;
2870 *block_size = BLOCK_SIZE;
2871 }
b2a4a43d 2872 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2873 (unsigned long long)*total_size+1, *block_size);
00988a35 2874 kfree(buf);
1da177e4
LT		 2875}
2876
1da177e4
LT		 2877static int cciss_revalidate(struct gendisk *disk)
2878{
2879 ctlr_info_t *h = get_host(disk);
2880 drive_info_struct *drv = get_drv(disk);
2881 int logvol;
7c832835 2882 int FOUND = 0;
1da177e4 2883 unsigned int block_size;
00988a35 2884 sector_t total_size;
1da177e4
LT		 2885 InquiryData_struct *inq_buff = NULL;
2886
7c832835 2887 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
9cef0d2f 2888 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2889 sizeof(drv->LunID)) == 0) {
7c832835 2890 FOUND = 1;
1da177e4
LT		 2891 break;
2892 }
2893 }
2894
7c832835
BH		 2895 if (!FOUND)
2896 return 1;
1da177e4 2897
7c832835
BH		 2898 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2899 if (inq_buff == NULL) {
b2a4a43d 2900 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2901 return 1;
2902 }
00988a35 2903 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2904 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2905 &total_size, &block_size);
2906 } else {
f70dba83 2907 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2908 &total_size, &block_size);
2909 }
f70dba83 2910 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2911 inq_buff, drv);
1da177e4 2912
e1defc4f 2913 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2914 set_capacity(disk, drv->nr_blocks);
2915
1da177e4
LT		 2916 kfree(inq_buff);
2917 return 0;
2918}
2919
1da177e4
LT		 2920/*
2921 * Map (physical) PCI mem into (virtual) kernel space
2922 */
2923static void __iomem *remap_pci_mem(ulong base, ulong size)
2924{
7c832835
BH		 2925 ulong page_base = ((ulong) base) & PAGE_MASK;
2926 ulong page_offs = ((ulong) base) - page_base;
2927 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2928
7c832835 2929 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2930}
2931
7c832835
BH		 2932/*
2933 * Takes jobs of the Q and sends them to the hardware, then puts it on
2934 * the Q to wait for completion.
2935 */
2936static void start_io(ctlr_info_t *h)
1da177e4
LT		 2937{
2938 CommandList_struct *c;
7c832835 2939
8a3173de
JA		 2940 while (!hlist_empty(&h->reqQ)) {
2941 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
1da177e4
LT		 2942 /* can't do anything if fifo is full */
2943 if ((h->access.fifo_full(h))) {
b2a4a43d 2944 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2945 break;
2946 }
2947
7c832835 2948 /* Get the first entry from the Request Q */
8a3173de 2949 removeQ(c);
1da177e4 2950 h->Qdepth--;
7c832835
BH		 2951
2952 /* Tell the controller execute command */
1da177e4 2953 h->access.submit_command(h, c);
7c832835
BH		 2954
2955 /* Put job onto the completed Q */
8a3173de 2956 addQ(&h->cmpQ, c);
1da177e4
LT		 2957 }
2958}
7c832835 2959
f70dba83 2960/* Assumes that h->lock is held. */
1da177e4
LT		 2961/* Zeros out the error record and then resends the command back */
2962/* to the controller */
7c832835 2963static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 2964{
2965 /* erase the old error information */
2966 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2967
2968 /* add it to software queue and then send it to the controller */
8a3173de 2969 addQ(&h->reqQ, c);
1da177e4 2970 h->Qdepth++;
7c832835 2971 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 2972 h->maxQsinceinit = h->Qdepth;
2973
2974 start_io(h);
2975}
a9925a06 2976
1a614f50
SC		 2977static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2978 unsigned int msg_byte, unsigned int host_byte,
2979 unsigned int driver_byte)
2980{
2981 /* inverse of macros in scsi.h */
2982 return (scsi_status_byte & 0xff) |
2983 ((msg_byte & 0xff) << 8) |
2984 ((host_byte & 0xff) << 16) |
2985 ((driver_byte & 0xff) << 24);
2986}
2987
0a9279cc
MM		 2988static inline int evaluate_target_status(ctlr_info_t *h,
2989 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 2990{
2991 unsigned char sense_key;
1a614f50
SC		 2992 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2993 int error_value;
2994
0a9279cc 2995 *retry_cmd = 0;
1a614f50
SC		 2996 /* If we get in here, it means we got "target status", that is, scsi status */
2997 status_byte = cmd->err_info->ScsiStatus;
2998 driver_byte = DRIVER_OK;
2999 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3000
33659ebb 3001 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 3002 host_byte = DID_PASSTHROUGH;
3003 else
3004 host_byte = DID_OK;
3005
3006 error_value = make_status_bytes(status_byte, msg_byte,
3007 host_byte, driver_byte);
03bbfee5 3008
1a614f50 3009 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3010 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3011 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3012 "has SCSI Status 0x%x\n",
3013 cmd, cmd->err_info->ScsiStatus);
1a614f50 3014 return error_value;
03bbfee5
MMOD		 3015 }
3016
3017 /* check the sense key */
3018 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3019 /* no status or recovered error */
33659ebb
CH		 3020 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3021 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3022 error_value = 0;
03bbfee5 3023
0a9279cc 3024 if (check_for_unit_attention(h, cmd)) {
33659ebb 3025 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3026 return 0;
3027 }
3028
33659ebb
CH		 3029 /* Not SG_IO or similar? */
3030 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3031 if (error_value != 0)
b2a4a43d 3032 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3033 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3034 return error_value;
03bbfee5
MMOD		 3035 }
3036
3037 /* SG_IO or similar, copy sense data back */
3038 if (cmd->rq->sense) {
3039 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3040 cmd->rq->sense_len = cmd->err_info->SenseLen;
3041 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3042 cmd->rq->sense_len);
3043 } else
3044 cmd->rq->sense_len = 0;
3045
1a614f50 3046 return error_value;
03bbfee5
MMOD		 3047}
3048
7c832835 3049/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3050 * buffers for the completed job. Note that this function does not need
3051 * to hold the hba/queue lock.
7c832835
BH		 3052 */
3053static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3054 int timeout)
1da177e4 3055{
1da177e4 3056 int retry_cmd = 0;
198b7660
MMOD		 3057 struct request *rq = cmd->rq;
3058
3059 rq->errors = 0;
7c832835 3060
1da177e4 3061 if (timeout)
1a614f50 3062 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3063
d38ae168
MMOD		 3064 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3065 goto after_error_processing;
7c832835 3066
d38ae168 3067 switch (cmd->err_info->CommandStatus) {
d38ae168 3068 case CMD_TARGET_STATUS:
0a9279cc 3069 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3070 break;
3071 case CMD_DATA_UNDERRUN:
33659ebb 3072 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3073 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3074 " completed with data underrun "
3075 "reported\n", cmd);
c3a4d78c 3076 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3077 }
d38ae168
MMOD		 3078 break;
3079 case CMD_DATA_OVERRUN:
33659ebb 3080 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3081 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3082 " completed with data overrun "
3083 "reported\n", cmd);
d38ae168
MMOD		 3084 break;
3085 case CMD_INVALID:
b2a4a43d 3086 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3087 "reported invalid\n", cmd);
1a614f50
SC		 3088 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3089 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3090 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3091 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3092 break;
3093 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3094 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3095 "protocol error\n", cmd);
1a614f50
SC		 3096 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3097 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3098 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3099 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3100 break;
3101 case CMD_HARDWARE_ERR:
b2a4a43d 3102 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3103 " hardware error\n", cmd);
1a614f50
SC		 3104 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3105 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3106 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3107 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3108 break;
3109 case CMD_CONNECTION_LOST:
b2a4a43d 3110 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3111 "connection lost\n", cmd);
1a614f50
SC		 3112 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3113 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3114 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3115 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3116 break;
3117 case CMD_ABORTED:
b2a4a43d 3118 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3119 "aborted\n", cmd);
1a614f50
SC		 3120 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3121 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3122 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3123 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3124 break;
3125 case CMD_ABORT_FAILED:
b2a4a43d 3126 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3127 "abort failed\n", cmd);
1a614f50
SC		 3128 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3129 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3130 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3131 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3132 break;
3133 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3134 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3135 "abort %p\n", h->ctlr, cmd);
3136 if (cmd->retry_count < MAX_CMD_RETRIES) {
3137 retry_cmd = 1;
b2a4a43d 3138 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3139 cmd->retry_count++;
3140 } else
b2a4a43d
SC		 3141 dev_warn(&h->pdev->dev,
3142 "%p retried too many times\n", cmd);
1a614f50
SC		 3143 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3144 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3145 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3146 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3147 break;
3148 case CMD_TIMEOUT:
b2a4a43d 3149 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3150 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3151 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3152 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3153 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3154 break;
3155 default:
b2a4a43d 3156 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3157 "unknown status %x\n", cmd,
3158 cmd->err_info->CommandStatus);
1a614f50
SC		 3159 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3160 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3161 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3162 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3163 }
d38ae168
MMOD		 3164
3165after_error_processing:
3166
1da177e4 3167 /* We need to return this command */
7c832835
BH		 3168 if (retry_cmd) {
3169 resend_cciss_cmd(h, cmd);
1da177e4 3170 return;
7c832835 3171 }
03bbfee5 3172 cmd->rq->completion_data = cmd;
a9925a06 3173 blk_complete_request(cmd->rq);
1da177e4
LT		 3174}
3175
0c2b3908
MM		 3176static inline u32 cciss_tag_contains_index(u32 tag)
3177{
5e216153 3178#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3179 return tag & DIRECT_LOOKUP_BIT;
3180}
3181
3182static inline u32 cciss_tag_to_index(u32 tag)
3183{
5e216153 3184#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3185 return tag >> DIRECT_LOOKUP_SHIFT;
3186}
3187
3188static inline u32 cciss_tag_discard_error_bits(u32 tag)
3189{
3190#define CCISS_ERROR_BITS 0x03
3191 return tag & ~CCISS_ERROR_BITS;
3192}
3193
3194static inline void cciss_mark_tag_indexed(u32 *tag)
3195{
3196 *tag |= DIRECT_LOOKUP_BIT;
3197}
3198
3199static inline void cciss_set_tag_index(u32 *tag, u32 index)
3200{
3201 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3202}
3203
7c832835
BH		 3204/*
3205 * Get a request and submit it to the controller.
1da177e4 3206 */
165125e1 3207static void do_cciss_request(struct request_queue *q)
1da177e4 3208{
7c832835 3209 ctlr_info_t *h = q->queuedata;
1da177e4 3210 CommandList_struct *c;
00988a35
MMOD		 3211 sector_t start_blk;
3212 int seg;
1da177e4
LT		 3213 struct request *creq;
3214 u64bit temp64;
5c07a311
DB		 3215 struct scatterlist *tmp_sg;
3216 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3217 drive_info_struct *drv;
3218 int i, dir;
5c07a311
DB		 3219 int sg_index = 0;
3220 int chained = 0;
1da177e4
LT		 3221
3222 /* We call start_io here in case there is a command waiting on the
3223 * queue that has not been sent.
7c832835 3224 */
1da177e4
LT		 3225 if (blk_queue_plugged(q))
3226 goto startio;
3227
7c832835 3228 queue:
9934c8c0 3229 creq = blk_peek_request(q);
1da177e4
LT		 3230 if (!creq)
3231 goto startio;
3232
5c07a311 3233 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3234
6b4d96b8
SC		 3235 c = cmd_alloc(h);
3236 if (!c)
1da177e4
LT		 3237 goto full;
3238
9934c8c0 3239 blk_start_request(creq);
1da177e4 3240
5c07a311 3241 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3242 spin_unlock_irq(q->queue_lock);
3243
3244 c->cmd_type = CMD_RWREQ;
3245 c->rq = creq;
7c832835
BH		 3246
3247 /* fill in the request */
1da177e4 3248 drv = creq->rq_disk->private_data;
b028461d 3249 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3250 /* got command from pool, so use the command block index instead */
3251 /* for direct lookups. */
3252 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3253 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3254 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3255 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3256 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3257 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3258 c->Request.Type.Attribute = ATTR_SIMPLE;
3259 c->Request.Type.Direction =
a52de245 3260 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3261 c->Request.Timeout = 0; /* Don't time out */
7c832835 3262 c->Request.CDB[0] =
00988a35 3263 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3264 start_blk = blk_rq_pos(creq);
b2a4a43d 3265 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3266 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3267 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3268 seg = blk_rq_map_sg(q, creq, tmp_sg);
3269
7c832835 3270 /* get the DMA records for the setup */
1da177e4
LT		 3271 if (c->Request.Type.Direction == XFER_READ)
3272 dir = PCI_DMA_FROMDEVICE;
3273 else
3274 dir = PCI_DMA_TODEVICE;
3275
5c07a311
DB		 3276 curr_sg = c->SG;
3277 sg_index = 0;
3278 chained = 0;
3279
7c832835 3280 for (i = 0; i < seg; i++) {
5c07a311
DB		 3281 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3282 !chained && ((seg - i) > 1)) {
5c07a311 3283 /* Point to next chain block. */
dccc9b56 3284 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3285 sg_index = 0;
3286 chained = 1;
3287 }
3288 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3289 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3290 tmp_sg[i].offset,
3291 tmp_sg[i].length, dir);
3292 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3293 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3294 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3295 ++sg_index;
1da177e4 3296 }
d45033ef
SC		 3297 if (chained)
3298 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3299 (seg - (h->max_cmd_sgentries - 1)) *
3300 sizeof(SGDescriptor_struct));
5c07a311 3301
7c832835
BH		 3302 /* track how many SG entries we are using */
3303 if (seg > h->maxSG)
3304 h->maxSG = seg;
1da177e4 3305
b2a4a43d 3306 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3307 "chained[%d]\n",
3308 blk_rq_sectors(creq), seg, chained);
1da177e4 3309
5e216153
MM		 3310 c->Header.SGTotal = seg + chained;
3311 if (seg <= h->max_cmd_sgentries)
3312 c->Header.SGList = c->Header.SGTotal;
3313 else
5c07a311 3314 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3315 set_performant_mode(h, c);
5c07a311 3316
33659ebb 3317 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3318 if(h->cciss_read == CCISS_READ_10) {
3319 c->Request.CDB[1] = 0;
b028461d 3320 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3321 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3322 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3323 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3324 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3325 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3326 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3327 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3328 } else {
582539e5
RD		 3329 u32 upper32 = upper_32_bits(start_blk);
3330
03bbfee5
MMOD		 3331 c->Request.CDBLen = 16;
3332 c->Request.CDB[1]= 0;
b028461d 3333 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3334 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3335 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3336 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3337 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3338 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3339 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3340 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3341 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3342 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3343 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3344 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3345 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3346 }
33659ebb 3347 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3348 c->Request.CDBLen = creq->cmd_len;
3349 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3350 } else {
b2a4a43d
SC		 3351 dev_warn(&h->pdev->dev, "bad request type %d\n",
3352 creq->cmd_type);
03bbfee5 3353 BUG();
00988a35 3354 }
1da177e4
LT		 3355
3356 spin_lock_irq(q->queue_lock);
3357
8a3173de 3358 addQ(&h->reqQ, c);
1da177e4 3359 h->Qdepth++;
7c832835
BH		 3360 if (h->Qdepth > h->maxQsinceinit)
3361 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3362
3363 goto queue;
00988a35 3364full:
1da177e4 3365 blk_stop_queue(q);
00988a35 3366startio:
1da177e4
LT		 3367 /* We will already have the driver lock here so not need
3368 * to lock it.
7c832835 3369 */
1da177e4
LT		 3370 start_io(h);
3371}
3372
3da8b713 3373static inline unsigned long get_next_completion(ctlr_info_t *h)
3374{
3da8b713 3375 return h->access.command_completed(h);
3da8b713 3376}
3377
3378static inline int interrupt_pending(ctlr_info_t *h)
3379{
3da8b713 3380 return h->access.intr_pending(h);
3da8b713 3381}
3382
3383static inline long interrupt_not_for_us(ctlr_info_t *h)
3384{
81125860 3385 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3386 (h->interrupts_enabled == 0));
3da8b713 3387}
3388
0c2b3908
MM		 3389static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3390 u32 raw_tag)
1da177e4 3391{
0c2b3908
MM		 3392 if (unlikely(tag_index >= h->nr_cmds)) {
3393 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3394 return 1;
3395 }
3396 return 0;
3397}
3398
3399static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3400 u32 raw_tag)
3401{
3402 removeQ(c);
3403 if (likely(c->cmd_type == CMD_RWREQ))
3404 complete_command(h, c, 0);
3405 else if (c->cmd_type == CMD_IOCTL_PEND)
3406 complete(c->waiting);
3407#ifdef CONFIG_CISS_SCSI_TAPE
3408 else if (c->cmd_type == CMD_SCSI)
3409 complete_scsi_command(c, 0, raw_tag);
3410#endif
3411}
3412
29979a71
MM		 3413static inline u32 next_command(ctlr_info_t *h)
3414{
3415 u32 a;
3416
3417 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3418 return h->access.command_completed(h);
3419
3420 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3421 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3422 (h->reply_pool_head)++;
3423 h->commands_outstanding--;
3424 } else {
3425 a = FIFO_EMPTY;
3426 }
3427 /* Check for wraparound */
3428 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3429 h->reply_pool_head = h->reply_pool;
3430 h->reply_pool_wraparound ^= 1;
3431 }
3432 return a;
3433}
3434
0c2b3908
MM		 3435/* process completion of an indexed ("direct lookup") command */
3436static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3437{
3438 u32 tag_index;
1da177e4 3439 CommandList_struct *c;
0c2b3908
MM		 3440
3441 tag_index = cciss_tag_to_index(raw_tag);
3442 if (bad_tag(h, tag_index, raw_tag))
5e216153 3443 return next_command(h);
0c2b3908
MM		 3444 c = h->cmd_pool + tag_index;
3445 finish_cmd(h, c, raw_tag);
5e216153 3446 return next_command(h);
0c2b3908
MM		 3447}
3448
3449/* process completion of a non-indexed command */
3450static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3451{
3452 u32 tag;
3453 CommandList_struct *c = NULL;
3454 struct hlist_node *tmp;
3455 __u32 busaddr_masked, tag_masked;
3456
3457 tag = cciss_tag_discard_error_bits(raw_tag);
3458 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3459 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3460 tag_masked = cciss_tag_discard_error_bits(tag);
3461 if (busaddr_masked == tag_masked) {
3462 finish_cmd(h, c, raw_tag);
5e216153 3463 return next_command(h);
0c2b3908
MM		 3464 }
3465 }
3466 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3467 return next_command(h);
0c2b3908
MM		 3468}
3469
3470static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3471{
3472 ctlr_info_t *h = dev_id;
1da177e4 3473 unsigned long flags;
0c2b3908 3474 u32 raw_tag;
1da177e4 3475
3da8b713 3476 if (interrupt_not_for_us(h))
1da177e4 3477 return IRQ_NONE;
f70dba83 3478 spin_lock_irqsave(&h->lock, flags);
3da8b713 3479 while (interrupt_pending(h)) {
0c2b3908
MM		 3480 raw_tag = get_next_completion(h);
3481 while (raw_tag != FIFO_EMPTY) {
3482 if (cciss_tag_contains_index(raw_tag))
3483 raw_tag = process_indexed_cmd(h, raw_tag);
3484 else
3485 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3486 }
3487 }
f70dba83 3488 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3489 return IRQ_HANDLED;
3490}
1da177e4 3491
0c2b3908
MM		 3492/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3493 * check the interrupt pending register because it is not set.
3494 */
3495static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3496{
3497 ctlr_info_t *h = dev_id;
3498 unsigned long flags;
3499 u32 raw_tag;
8a3173de 3500
f70dba83 3501 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3502 raw_tag = get_next_completion(h);
3503 while (raw_tag != FIFO_EMPTY) {
3504 if (cciss_tag_contains_index(raw_tag))
3505 raw_tag = process_indexed_cmd(h, raw_tag);
3506 else
3507 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3508 }
f70dba83 3509 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3510 return IRQ_HANDLED;
3511}
7c832835 3512
b368c9dd
AP		 3513/**
3514 * add_to_scan_list() - add controller to rescan queue
3515 * @h: Pointer to the controller.
3516 *
3517 * Adds the controller to the rescan queue if not already on the queue.
3518 *
3519 * returns 1 if added to the queue, 0 if skipped (could be on the
3520 * queue already, or the controller could be initializing or shutting
3521 * down).
3522 **/
3523static int add_to_scan_list(struct ctlr_info *h)
3524{
3525 struct ctlr_info *test_h;
3526 int found = 0;
3527 int ret = 0;
3528
3529 if (h->busy_initializing)
3530 return 0;
3531
3532 if (!mutex_trylock(&h->busy_shutting_down))
3533 return 0;
3534
3535 mutex_lock(&scan_mutex);
3536 list_for_each_entry(test_h, &scan_q, scan_list) {
3537 if (test_h == h) {
3538 found = 1;
3539 break;
3540 }
3541 }
3542 if (!found && !h->busy_scanning) {
3543 INIT_COMPLETION(h->scan_wait);
3544 list_add_tail(&h->scan_list, &scan_q);
3545 ret = 1;
3546 }
3547 mutex_unlock(&scan_mutex);
3548 mutex_unlock(&h->busy_shutting_down);
3549
3550 return ret;
3551}
3552
3553/**
3554 * remove_from_scan_list() - remove controller from rescan queue
3555 * @h: Pointer to the controller.
3556 *
3557 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3558 * the controller is currently conducting a rescan. The controller
3559 * can be in one of three states:
3560 * 1. Doesn't need a scan
3561 * 2. On the scan list, but not scanning yet (we remove it)
3562 * 3. Busy scanning (and not on the list). In this case we want to wait for
3563 * the scan to complete to make sure the scanning thread for this
3564 * controller is completely idle.
b368c9dd
AP		 3565 **/
3566static void remove_from_scan_list(struct ctlr_info *h)
3567{
3568 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3569
3570 mutex_lock(&scan_mutex);
3571 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3572 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3573 list_del(&h->scan_list);
3574 complete_all(&h->scan_wait);
3575 mutex_unlock(&scan_mutex);
3576 return;
3577 }
3578 }
fd8489cf
SC		 3579 if (h->busy_scanning) { /* state 3. */
3580 mutex_unlock(&scan_mutex);
b368c9dd 3581 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3582 } else { /* state 1, nothing to do. */
3583 mutex_unlock(&scan_mutex);
3584 }
b368c9dd
AP		 3585}
3586
3587/**
3588 * scan_thread() - kernel thread used to rescan controllers
3589 * @data: Ignored.
3590 *
3591 * A kernel thread used scan for drive topology changes on
3592 * controllers. The thread processes only one controller at a time
3593 * using a queue. Controllers are added to the queue using
3594 * add_to_scan_list() and removed from the queue either after done
3595 * processing or using remove_from_scan_list().
3596 *
3597 * returns 0.
3598 **/
0a9279cc
MM		 3599static int scan_thread(void *data)
3600{
b368c9dd 3601 struct ctlr_info *h;
0a9279cc 3602
b368c9dd
AP		 3603 while (1) {
3604 set_current_state(TASK_INTERRUPTIBLE);
3605 schedule();
0a9279cc
MM		 3606 if (kthread_should_stop())
3607 break;
b368c9dd
AP		 3608
3609 while (1) {
3610 mutex_lock(&scan_mutex);
3611 if (list_empty(&scan_q)) {
3612 mutex_unlock(&scan_mutex);
3613 break;
3614 }
3615
3616 h = list_entry(scan_q.next,
3617 struct ctlr_info,
3618 scan_list);
3619 list_del(&h->scan_list);
3620 h->busy_scanning = 1;
3621 mutex_unlock(&scan_mutex);
3622
d06dfbd2
SC		 3623 rebuild_lun_table(h, 0, 0);
3624 complete_all(&h->scan_wait);
3625 mutex_lock(&scan_mutex);
3626 h->busy_scanning = 0;
3627 mutex_unlock(&scan_mutex);
b368c9dd 3628 }
0a9279cc 3629 }
b368c9dd 3630
0a9279cc
MM		 3631 return 0;
3632}
3633
3634static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3635{
3636 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3637 return 0;
3638
3639 switch (c->err_info->SenseInfo[12]) {
3640 case STATE_CHANGED:
b2a4a43d
SC		 3641 dev_warn(&h->pdev->dev, "a state change "
3642 "detected, command retried\n");
0a9279cc
MM		 3643 return 1;
3644 break;
3645 case LUN_FAILED:
b2a4a43d
SC		 3646 dev_warn(&h->pdev->dev, "LUN failure "
3647 "detected, action required\n");
0a9279cc
MM		 3648 return 1;
3649 break;
3650 case REPORT_LUNS_CHANGED:
b2a4a43d 3651 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3652 /*
3653 * Here, we could call add_to_scan_list and wake up the scan thread,
3654 * except that it's quite likely that we will get more than one
3655 * REPORT_LUNS_CHANGED condition in quick succession, which means
3656 * that those which occur after the first one will likely happen
3657 * *during* the scan_thread's rescan. And the rescan code is not
3658 * robust enough to restart in the middle, undoing what it has already
3659 * done, and it's not clear that it's even possible to do this, since
3660 * part of what it does is notify the block layer, which starts
3661 * doing it's own i/o to read partition tables and so on, and the
3662 * driver doesn't have visibility to know what might need undoing.
3663 * In any event, if possible, it is horribly complicated to get right
3664 * so we just don't do it for now.
3665 *
3666 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3667 */
0a9279cc
MM		 3668 return 1;
3669 break;
3670 case POWER_OR_RESET:
b2a4a43d
SC		 3671 dev_warn(&h->pdev->dev,
3672 "a power on or device reset detected\n");
0a9279cc
MM		 3673 return 1;
3674 break;
3675 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3676 dev_warn(&h->pdev->dev,
3677 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3678 return 1;
3679 break;
3680 default:
b2a4a43d
SC		 3681 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3682 return 1;
0a9279cc
MM		 3683 }
3684}
3685
7c832835 3686/*
d14c4ab5 3687 * We cannot read the structure directly, for portability we must use
1da177e4 3688 * the io functions.
7c832835 3689 * This is for debug only.
1da177e4 3690 */
b2a4a43d 3691static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3692{
3693 int i;
3694 char temp_name[17];
b2a4a43d 3695 CfgTable_struct *tb = h->cfgtable;
1da177e4 3696
b2a4a43d
SC		 3697 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3698 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3699 for (i = 0; i < 4; i++)
1da177e4 3700 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3701 temp_name[4] = '\0';
b2a4a43d
SC		 3702 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3703 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3704 readl(&(tb->SpecValence)));
3705 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3706 readl(&(tb->TransportSupport)));
b2a4a43d 3707 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3708 readl(&(tb->TransportActive)));
b2a4a43d 3709 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3710 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3711 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3712 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3713 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3714 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3715 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3716 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3717 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3718 readl(&(tb->BusTypes)));
7c832835 3719 for (i = 0; i < 16; i++)
1da177e4
LT		 3720 temp_name[i] = readb(&(tb->ServerName[i]));
3721 temp_name[16] = '\0';
b2a4a43d
SC		 3722 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3723 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3724 readl(&(tb->HeartBeat)));
1da177e4 3725}
1da177e4 3726
7c832835 3727static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3728{
3729 int i, offset, mem_type, bar_type;
7c832835 3730 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3731 return 0;
3732 offset = 0;
7c832835
BH		 3733 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3734 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3735 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3736 offset += 4;
3737 else {
3738 mem_type = pci_resource_flags(pdev, i) &
7c832835 3739 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3740 switch (mem_type) {
7c832835
BH		 3741 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3742 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3743 offset += 4; /* 32 bit */
3744 break;
3745 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3746 offset += 8;
3747 break;
3748 default: /* reserved in PCI 2.2 */
b2a4a43d 3749 dev_warn(&pdev->dev,
7c832835
BH		 3750 "Base address is invalid\n");
3751 return -1;
1da177e4
LT		 3752 break;
3753 }
3754 }
7c832835
BH		 3755 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3756 return i + 1;
1da177e4
LT		 3757 }
3758 return -1;
3759}
3760
5e216153
MM		 3761/* Fill in bucket_map[], given nsgs (the max number of
3762 * scatter gather elements supported) and bucket[],
3763 * which is an array of 8 integers. The bucket[] array
3764 * contains 8 different DMA transfer sizes (in 16
3765 * byte increments) which the controller uses to fetch
3766 * commands. This function fills in bucket_map[], which
3767 * maps a given number of scatter gather elements to one of
3768 * the 8 DMA transfer sizes. The point of it is to allow the
3769 * controller to only do as much DMA as needed to fetch the
3770 * command, with the DMA transfer size encoded in the lower
3771 * bits of the command address.
3772 */
3773static void calc_bucket_map(int bucket[], int num_buckets,
3774 int nsgs, int *bucket_map)
3775{
3776 int i, j, b, size;
3777
3778 /* even a command with 0 SGs requires 4 blocks */
3779#define MINIMUM_TRANSFER_BLOCKS 4
3780#define NUM_BUCKETS 8
3781 /* Note, bucket_map must have nsgs+1 entries. */
3782 for (i = 0; i <= nsgs; i++) {
3783 /* Compute size of a command with i SG entries */
3784 size = i + MINIMUM_TRANSFER_BLOCKS;
3785 b = num_buckets; /* Assume the biggest bucket */
3786 /* Find the bucket that is just big enough */
3787 for (j = 0; j < 8; j++) {
3788 if (bucket[j] >= size) {
3789 b = j;
3790 break;
3791 }
3792 }
3793 /* for a command with i SG entries, use bucket b. */
3794 bucket_map[i] = b;
3795 }
3796}
3797
0f8a6a1e
SC		 3798static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3799{
3800 int i;
3801
3802 /* under certain very rare conditions, this can take awhile.
3803 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3804 * as we enter this code.) */
3805 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3806 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3807 break;
3808 msleep(10);
3809 }
3810}
3811
b9933135
SC		 3812static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3813{
3814 /* This is a bit complicated. There are 8 registers on
3815 * the controller which we write to to tell it 8 different
3816 * sizes of commands which there may be. It's a way of
3817 * reducing the DMA done to fetch each command. Encoded into
3818 * each command's tag are 3 bits which communicate to the controller
3819 * which of the eight sizes that command fits within. The size of
3820 * each command depends on how many scatter gather entries there are.
3821 * Each SG entry requires 16 bytes. The eight registers are programmed
3822 * with the number of 16-byte blocks a command of that size requires.
3823 * The smallest command possible requires 5 such 16 byte blocks.
3824 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3825 * blocks. Note, this only extends to the SG entries contained
3826 * within the command block, and does not extend to chained blocks
3827 * of SG elements. bft[] contains the eight values we write to
3828 * the registers. They are not evenly distributed, but have more
3829 * sizes for small commands, and fewer sizes for larger commands.
3830 */
5e216153 3831 __u32 trans_offset;
b9933135 3832 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3833 /*
3834 * 5 = 1 s/g entry or 4k
3835 * 6 = 2 s/g entry or 8k
3836 * 8 = 4 s/g entry or 16k
3837 * 10 = 6 s/g entry or 24k
3838 */
5e216153 3839 unsigned long register_value;
5e216153
MM		 3840 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3841
5e216153
MM		 3842 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3843
3844 /* Controller spec: zero out this buffer. */
3845 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3846 h->reply_pool_head = h->reply_pool;
3847
3848 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3849 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3850 h->blockFetchTable);
3851 writel(bft[0], &h->transtable->BlockFetch0);
3852 writel(bft[1], &h->transtable->BlockFetch1);
3853 writel(bft[2], &h->transtable->BlockFetch2);
3854 writel(bft[3], &h->transtable->BlockFetch3);
3855 writel(bft[4], &h->transtable->BlockFetch4);
3856 writel(bft[5], &h->transtable->BlockFetch5);
3857 writel(bft[6], &h->transtable->BlockFetch6);
3858 writel(bft[7], &h->transtable->BlockFetch7);
3859
3860 /* size of controller ring buffer */
3861 writel(h->max_commands, &h->transtable->RepQSize);
3862 writel(1, &h->transtable->RepQCount);
3863 writel(0, &h->transtable->RepQCtrAddrLow32);
3864 writel(0, &h->transtable->RepQCtrAddrHigh32);
3865 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3866 writel(0, &h->transtable->RepQAddr0High32);
3867 writel(CFGTBL_Trans_Performant,
3868 &(h->cfgtable->HostWrite.TransportRequest));
3869
5e216153 3870 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3871 cciss_wait_for_mode_change_ack(h);
5e216153 3872 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3873 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3874 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3875 " performant mode\n");
b9933135
SC		 3876}
3877
3878static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3879{
3880 __u32 trans_support;
3881
3882 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3883 /* Attempt to put controller into performant mode if supported */
3884 /* Does board support performant mode? */
3885 trans_support = readl(&(h->cfgtable->TransportSupport));
3886 if (!(trans_support & PERFORMANT_MODE))
3887 return;
3888
b2a4a43d 3889 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3890 /* Performant mode demands commands on a 32 byte boundary
3891 * pci_alloc_consistent aligns on page boundarys already.
3892 * Just need to check if divisible by 32
3893 */
3894 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3895 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3896 "cciss info: command size[",
3897 (int)sizeof(CommandList_struct),
3898 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 3899 return;
3900 }
3901
b9933135
SC		 3902 /* Performant mode ring buffer and supporting data structures */
3903 h->reply_pool = (__u64 *)pci_alloc_consistent(
3904 h->pdev, h->max_commands * sizeof(__u64),
3905 &(h->reply_pool_dhandle));
3906
3907 /* Need a block fetch table for performant mode */
3908 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3909 sizeof(__u32)), GFP_KERNEL);
3910
3911 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3912 goto clean_up;
3913
3914 cciss_enter_performant_mode(h);
3915
5e216153
MM		 3916 /* Change the access methods to the performant access methods */
3917 h->access = SA5_performant_access;
b9933135 3918 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 3919
3920 return;
3921clean_up:
3922 kfree(h->blockFetchTable);
3923 if (h->reply_pool)
3924 pci_free_consistent(h->pdev,
3925 h->max_commands * sizeof(__u64),
3926 h->reply_pool,
3927 h->reply_pool_dhandle);
3928 return;
3929
3930} /* cciss_put_controller_into_performant_mode */
3931
fb86a35b
MM		 3932/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3933 * controllers that are capable. If not, we use IO-APIC mode.
3934 */
3935
f70dba83 3936static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 3937{
3938#ifdef CONFIG_PCI_MSI
7c832835
BH		 3939 int err;
3940 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3941 {0, 2}, {0, 3}
3942 };
fb86a35b
MM		 3943
3944 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 3945 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3946 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 3947 goto default_int_mode;
3948
f70dba83
SC		 3949 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3950 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3951 if (!err) {
f70dba83
SC		 3952 h->intr[0] = cciss_msix_entries[0].vector;
3953 h->intr[1] = cciss_msix_entries[1].vector;
3954 h->intr[2] = cciss_msix_entries[2].vector;
3955 h->intr[3] = cciss_msix_entries[3].vector;
3956 h->msix_vector = 1;
7c832835
BH		 3957 return;
3958 }
3959 if (err > 0) {
b2a4a43d
SC		 3960 dev_warn(&h->pdev->dev,
3961 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3962 goto default_int_mode;
7c832835 3963 } else {
b2a4a43d
SC		 3964 dev_warn(&h->pdev->dev,
3965 "MSI-X init failed %d\n", err);
1ecb9c0f 3966 goto default_int_mode;
7c832835
BH		 3967 }
3968 }
f70dba83
SC		 3969 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3970 if (!pci_enable_msi(h->pdev))
3971 h->msi_vector = 1;
3972 else
b2a4a43d 3973 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3974 }
1ecb9c0f 3975default_int_mode:
7c832835 3976#endif /* CONFIG_PCI_MSI */
fb86a35b 3977 /* if we get here we're going to use the default interrupt mode */
f70dba83 3978 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 3979 return;
3980}
3981
6539fa9b 3982static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3983{
6539fa9b
SC		 3984 int i;
3985 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 3986
3987 subsystem_vendor_id = pdev->subsystem_vendor;
3988 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 3989 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3990 subsystem_vendor_id;
2ec24ff1
SC		 3991
3992 for (i = 0; i < ARRAY_SIZE(products); i++) {
3993 /* Stand aside for hpsa driver on request */
3994 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
3995 return -ENODEV;
6539fa9b
SC		 3996 if (*board_id == products[i].board_id)
3997 return i;
2ec24ff1 3998 }
6539fa9b
SC		 3999 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4000 *board_id);
4001 return -ENODEV;
4002}
1da177e4 4003
dd9c426e
SC		 4004static inline bool cciss_board_disabled(ctlr_info_t *h)
4005{
4006 u16 command;
1da177e4 4007
dd9c426e
SC		 4008 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4009 return ((command & PCI_COMMAND_MEMORY) == 0);
4010}
1da177e4 4011
d474830d
SC		 4012static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4013 unsigned long *memory_bar)
4014{
4015 int i;
4e570309 4016
d474830d
SC		 4017 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4018 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4019 /* addressing mode bits already removed */
4020 *memory_bar = pci_resource_start(pdev, i);
4021 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4022 *memory_bar);
4023 return 0;
4024 }
4025 dev_warn(&pdev->dev, "no memory BAR found\n");
4026 return -ENODEV;
4027}
1da177e4 4028
e99ba136
SC		 4029static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4030{
4031 int i;
4032 u32 scratchpad;
1da177e4 4033
e99ba136
SC		 4034 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
4035 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4036 if (scratchpad == CCISS_FIRMWARE_READY)
4037 return 0;
4038 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4039 }
e99ba136
SC		 4040 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
4041 return -ENODEV;
4042}
e1438581 4043
8e93bf6d
SC		 4044static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4045 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4046 u64 *cfg_offset)
4047{
4048 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4049 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4050 *cfg_base_addr &= (u32) 0x0000ffff;
4051 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4052 if (*cfg_base_addr_index == -1) {
4053 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4054 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4055 return -ENODEV;
4056 }
4057 return 0;
4058}
1da177e4 4059
4809d098
SC		 4060static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4061{
4062 u64 cfg_offset;
4063 u32 cfg_base_addr;
4064 u64 cfg_base_addr_index;
4065 u32 trans_offset;
8e93bf6d 4066 int rc;
1da177e4 4067
8e93bf6d
SC		 4068 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4069 &cfg_base_addr_index, &cfg_offset);
4070 if (rc)
4071 return rc;
4809d098 4072 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4073 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4074 if (!h->cfgtable)
4075 return -ENOMEM;
4076 /* Find performant mode table. */
8e93bf6d 4077 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4078 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4079 cfg_base_addr_index)+cfg_offset+trans_offset,
4080 sizeof(*h->transtable));
4081 if (!h->transtable)
4082 return -ENOMEM;
4083 return 0;
4084}
1da177e4 4085
adfbc1ff
SC		 4086static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4087{
4088 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4089 if (h->max_commands < 16) {
4090 dev_warn(&h->pdev->dev, "Controller reports "
4091 "max supported commands of %d, an obvious lie. "
4092 "Using 16. Ensure that firmware is up to date.\n",
4093 h->max_commands);
4094 h->max_commands = 16;
1da177e4 4095 }
adfbc1ff 4096}
1da177e4 4097
afadbf4b
SC		 4098/* Interrogate the hardware for some limits:
4099 * max commands, max SG elements without chaining, and with chaining,
4100 * SG chain block size, etc.
4101 */
4102static void __devinit cciss_find_board_params(ctlr_info_t *h)
4103{
adfbc1ff 4104 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4105 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4106 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4107 /*
afadbf4b 4108 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4109 * Howvever spec says if 0, use 31
4110 */
afadbf4b
SC		 4111 h->max_cmd_sgentries = 31;
4112 if (h->maxsgentries > 512) {
4113 h->max_cmd_sgentries = 32;
4114 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4115 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4116 } else {
afadbf4b
SC		 4117 h->maxsgentries = 31; /* default to traditional values */
4118 h->chainsize = 0;
5c07a311 4119 }
afadbf4b 4120}
5c07a311 4121
501b92cd
SC		 4122static inline bool CISS_signature_present(ctlr_info_t *h)
4123{
4124 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4125 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4126 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4127 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4128 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4129 return false;
1da177e4 4130 }
501b92cd
SC		 4131 return true;
4132}
4133
322e304c
SC		 4134/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4135static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4136{
1da177e4 4137#ifdef CONFIG_X86
322e304c
SC		 4138 u32 prefetch;
4139
4140 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4141 prefetch |= 0x100;
4142 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4143#endif
322e304c 4144}
1da177e4 4145
bfd63ee5
SC		 4146/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4147 * in a prefetch beyond physical memory.
4148 */
4149static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4150{
4151 u32 dma_prefetch;
4152 __u32 dma_refetch;
4153
4154 if (h->board_id != 0x3225103C)
4155 return;
4156 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4157 dma_prefetch |= 0x8000;
4158 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4159 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4160 dma_refetch |= 0x1;
4161 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4162}
4163
f70dba83 4164static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4165{
4809d098 4166 int prod_index, err;
6539fa9b 4167
f70dba83 4168 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4169 if (prod_index < 0)
2ec24ff1 4170 return -ENODEV;
f70dba83
SC		 4171 h->product_name = products[prod_index].product_name;
4172 h->access = *(products[prod_index].access);
1da177e4 4173
f70dba83 4174 if (cciss_board_disabled(h)) {
b2a4a43d 4175 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4176 return -ENODEV;
1da177e4 4177 }
f70dba83 4178 err = pci_enable_device(h->pdev);
7c832835 4179 if (err) {
b2a4a43d 4180 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4181 return err;
f92e2f5f
MM		 4182 }
4183
f70dba83 4184 err = pci_request_regions(h->pdev, "cciss");
4e570309 4185 if (err) {
b2a4a43d
SC		 4186 dev_warn(&h->pdev->dev,
4187 "Cannot obtain PCI resources, aborting\n");
872225ca 4188 return err;
4e570309 4189 }
1da177e4 4190
b2a4a43d
SC		 4191 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4192 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4193
fb86a35b
MM		 4194/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4195 * else we use the IO-APIC interrupt assigned to us by system ROM.
4196 */
f70dba83
SC		 4197 cciss_interrupt_mode(h);
4198 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4199 if (err)
e1438581 4200 goto err_out_free_res;
f70dba83
SC		 4201 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4202 if (!h->vaddr) {
da550321
SC		 4203 err = -ENOMEM;
4204 goto err_out_free_res;
7c832835 4205 }
f70dba83 4206 err = cciss_wait_for_board_ready(h);
e99ba136 4207 if (err)
4e570309 4208 goto err_out_free_res;
f70dba83 4209 err = cciss_find_cfgtables(h);
4809d098 4210 if (err)
4e570309 4211 goto err_out_free_res;
b2a4a43d 4212 print_cfg_table(h);
f70dba83 4213 cciss_find_board_params(h);
1da177e4 4214
f70dba83 4215 if (!CISS_signature_present(h)) {
c33ac89b 4216 err = -ENODEV;
4e570309 4217 goto err_out_free_res;
1da177e4 4218 }
f70dba83
SC		 4219 cciss_enable_scsi_prefetch(h);
4220 cciss_p600_dma_prefetch_quirk(h);
4221 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4222 return 0;
4223
5faad620 4224err_out_free_res:
872225ca
MM		 4225 /*
4226 * Deliberately omit pci_disable_device(): it does something nasty to
4227 * Smart Array controllers that pci_enable_device does not undo
4228 */
f70dba83
SC		 4229 if (h->transtable)
4230 iounmap(h->transtable);
4231 if (h->cfgtable)
4232 iounmap(h->cfgtable);
4233 if (h->vaddr)
4234 iounmap(h->vaddr);
4235 pci_release_regions(h->pdev);
c33ac89b 4236 return err;
1da177e4
LT		 4237}
4238
6ae5ce8e
MM		 4239/* Function to find the first free pointer into our hba[] array
4240 * Returns -1 if no free entries are left.
7c832835 4241 */
b2a4a43d 4242static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4243{
799202cb 4244 int i;
1da177e4 4245
7c832835 4246 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4247 if (!hba[i]) {
f70dba83 4248 ctlr_info_t *h;
f2912a12 4249
f70dba83
SC		 4250 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4251 if (!h)
1da177e4 4252 goto Enomem;
f70dba83 4253 hba[i] = h;
1da177e4
LT		 4254 return i;
4255 }
4256 }
b2a4a43d 4257 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4258 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4259 return -1;
4260Enomem:
b2a4a43d 4261 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4262 return -1;
4263}
4264
f70dba83 4265static void free_hba(ctlr_info_t *h)
1da177e4 4266{
2c935593 4267 int i;
1da177e4 4268
f70dba83 4269 hba[h->ctlr] = NULL;
2c935593
SC		 4270 for (i = 0; i < h->highest_lun + 1; i++)
4271 if (h->gendisk[i] != NULL)
4272 put_disk(h->gendisk[i]);
4273 kfree(h);
1da177e4
LT		 4274}
4275
82eb03cf
CC		 4276/* Send a message CDB to the firmware. */
4277static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4278{
4279 typedef struct {
4280 CommandListHeader_struct CommandHeader;
4281 RequestBlock_struct Request;
4282 ErrDescriptor_struct ErrorDescriptor;
4283 } Command;
4284 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4285 Command *cmd;
4286 dma_addr_t paddr64;
4287 uint32_t paddr32, tag;
4288 void __iomem *vaddr;
4289 int i, err;
4290
4291 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4292 if (vaddr == NULL)
4293 return -ENOMEM;
4294
4295 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4296 CCISS commands, so they must be allocated from the lower 4GiB of
4297 memory. */
e930438c 4298 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4299 if (err) {
4300 iounmap(vaddr);
4301 return -ENOMEM;
4302 }
4303
4304 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4305 if (cmd == NULL) {
4306 iounmap(vaddr);
4307 return -ENOMEM;
4308 }
4309
4310 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4311 although there's no guarantee, we assume that the address is at
4312 least 4-byte aligned (most likely, it's page-aligned). */
4313 paddr32 = paddr64;
4314
4315 cmd->CommandHeader.ReplyQueue = 0;
4316 cmd->CommandHeader.SGList = 0;
4317 cmd->CommandHeader.SGTotal = 0;
4318 cmd->CommandHeader.Tag.lower = paddr32;
4319 cmd->CommandHeader.Tag.upper = 0;
4320 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4321
4322 cmd->Request.CDBLen = 16;
4323 cmd->Request.Type.Type = TYPE_MSG;
4324 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4325 cmd->Request.Type.Direction = XFER_NONE;
4326 cmd->Request.Timeout = 0; /* Don't time out */
4327 cmd->Request.CDB[0] = opcode;
4328 cmd->Request.CDB[1] = type;
4329 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4330
4331 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4332 cmd->ErrorDescriptor.Addr.upper = 0;
4333 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4334
4335 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4336
4337 for (i = 0; i < 10; i++) {
4338 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4339 if ((tag & ~3) == paddr32)
4340 break;
4341 schedule_timeout_uninterruptible(HZ);
4342 }
4343
4344 iounmap(vaddr);
4345
4346 /* we leak the DMA buffer here ... no choice since the controller could
4347 still complete the command. */
4348 if (i == 10) {
b2a4a43d
SC		 4349 dev_err(&pdev->dev,
4350 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4351 opcode, type);
4352 return -ETIMEDOUT;
4353 }
4354
4355 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4356
4357 if (tag & 2) {
b2a4a43d 4358 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4359 opcode, type);
4360 return -EIO;
4361 }
4362
b2a4a43d 4363 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4364 opcode, type);
4365 return 0;
4366}
4367
4368#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4369#define cciss_noop(p) cciss_message(p, 3, 0)
4370
4371static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4372{
4373/* the #defines are stolen from drivers/pci/msi.h. */
4374#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4375#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4376
4377 int pos;
4378 u16 control = 0;
4379
4380 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4381 if (pos) {
4382 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4383 if (control & PCI_MSI_FLAGS_ENABLE) {
b2a4a43d 4384 dev_info(&pdev->dev, "resetting MSI\n");
82eb03cf
CC		 4385 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4386 }
4387 }
4388
4389 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4390 if (pos) {
4391 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4392 if (control & PCI_MSIX_FLAGS_ENABLE) {
b2a4a43d 4393 dev_info(&pdev->dev, "resetting MSI-X\n");
82eb03cf
CC		 4394 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4395 }
4396 }
4397
4398 return 0;
4399}
4400
a6528d01
SC		 4401static int cciss_controller_hard_reset(struct pci_dev *pdev,
4402 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4403{
a6528d01
SC		 4404 u16 pmcsr;
4405 int pos;
82eb03cf 4406
a6528d01
SC		 4407 if (use_doorbell) {
4408 /* For everything after the P600, the PCI power state method
4409 * of resetting the controller doesn't work, so we have this
4410 * other way using the doorbell register.
4411 */
4412 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4413 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4414 msleep(1000);
4415 } else { /* Try to do it the PCI power state way */
4416
4417 /* Quoting from the Open CISS Specification: "The Power
4418 * Management Control/Status Register (CSR) controls the power
4419 * state of the device. The normal operating state is D0,
4420 * CSR=00h. The software off state is D3, CSR=03h. To reset
4421 * the controller, place the interface device in D3 then to D0,
4422 * this causes a secondary PCI reset which will reset the
4423 * controller." */
4424
4425 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4426 if (pos == 0) {
4427 dev_err(&pdev->dev,
4428 "cciss_controller_hard_reset: "
4429 "PCI PM not supported\n");
4430 return -ENODEV;
4431 }
4432 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4433 /* enter the D3hot power management state */
4434 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4435 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4436 pmcsr |= PCI_D3hot;
4437 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4438
a6528d01 4439 msleep(500);
82eb03cf 4440
a6528d01
SC		 4441 /* enter the D0 power management state */
4442 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4443 pmcsr |= PCI_D0;
4444 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4445
a6528d01
SC		 4446 msleep(500);
4447 }
4448 return 0;
4449}
82eb03cf 4450
a6528d01
SC		 4451/* This does a hard reset of the controller using PCI power management
4452 * states or using the doorbell register. */
4453static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4454{
4455 u16 saved_config_space[32];
4456 u64 cfg_offset;
4457 u32 cfg_base_addr;
4458 u64 cfg_base_addr_index;
4459 void __iomem *vaddr;
4460 unsigned long paddr;
4461 u32 misc_fw_support, active_transport;
4462 int rc, i;
4463 CfgTable_struct __iomem *cfgtable;
4464 bool use_doorbell;
058a0f9f 4465 u32 board_id;
a6528d01
SC		 4466
4467 /* For controllers as old a the p600, this is very nearly
4468 * the same thing as
4469 *
4470 * pci_save_state(pci_dev);
4471 * pci_set_power_state(pci_dev, PCI_D3hot);
4472 * pci_set_power_state(pci_dev, PCI_D0);
4473 * pci_restore_state(pci_dev);
4474 *
4475 * but we can't use these nice canned kernel routines on
4476 * kexec, because they also check the MSI/MSI-X state in PCI
4477 * configuration space and do the wrong thing when it is
4478 * set/cleared. Also, the pci_save/restore_state functions
4479 * violate the ordering requirements for restoring the
4480 * configuration space from the CCISS document (see the
4481 * comment below). So we roll our own ....
4482 *
4483 * For controllers newer than the P600, the pci power state
4484 * method of resetting doesn't work so we have another way
4485 * using the doorbell register.
4486 */
82eb03cf 4487
058a0f9f
SC		 4488 /* Exclude 640x boards. These are two pci devices in one slot
4489 * which share a battery backed cache module. One controls the
4490 * cache, the other accesses the cache through the one that controls
4491 * it. If we reset the one controlling the cache, the other will
4492 * likely not be happy. Just forbid resetting this conjoined mess.
4493 */
4494 cciss_lookup_board_id(pdev, &board_id);
4495 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4496 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4497 "due to shared cache module.");
82eb03cf
CC		 4498 return -ENODEV;
4499 }
4500
82eb03cf
CC		 4501 for (i = 0; i < 32; i++)
4502 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
82eb03cf 4503
a6528d01
SC		 4504 /* find the first memory BAR, so we can find the cfg table */
4505 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4506 if (rc)
4507 return rc;
4508 vaddr = remap_pci_mem(paddr, 0x250);
4509 if (!vaddr)
4510 return -ENOMEM;
82eb03cf 4511
a6528d01
SC		 4512 /* find cfgtable in order to check if reset via doorbell is supported */
4513 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4514 &cfg_base_addr_index, &cfg_offset);
4515 if (rc)
4516 goto unmap_vaddr;
4517 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4518 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4519 if (!cfgtable) {
4520 rc = -ENOMEM;
4521 goto unmap_vaddr;
4522 }
82eb03cf 4523
a6528d01
SC		 4524 /* If reset via doorbell register is supported, use that. */
4525 misc_fw_support = readl(&cfgtable->misc_fw_support);
4526 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4527
a6528d01
SC		 4528 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4529 if (rc)
4530 goto unmap_cfgtable;
82eb03cf
CC		 4531
4532 /* Restore the PCI configuration space. The Open CISS
4533 * Specification says, "Restore the PCI Configuration
4534 * Registers, offsets 00h through 60h. It is important to
4535 * restore the command register, 16-bits at offset 04h,
4536 * last. Do not restore the configuration status register,
a6528d01
SC		 4537 * 16-bits at offset 06h." Note that the offset is 2*i.
4538 */
82eb03cf
CC		 4539 for (i = 0; i < 32; i++) {
4540 if (i == 2 || i == 3)
4541 continue;
4542 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4543 }
4544 wmb();
4545 pci_write_config_word(pdev, 4, saved_config_space[2]);
4546
a6528d01
SC		 4547 /* Some devices (notably the HP Smart Array 5i Controller)
4548 need a little pause here */
4549 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4550
4551 /* Controller should be in simple mode at this point. If it's not,
4552 * It means we're on one of those controllers which doesn't support
4553 * the doorbell reset method and on which the PCI power management reset
4554 * method doesn't work (P800, for example.)
4555 * In those cases, don't try to proceed, as it generally doesn't work.
4556 */
4557 active_transport = readl(&cfgtable->TransportActive);
4558 if (active_transport & PERFORMANT_MODE) {
4559 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4560 " Ignoring controller.\n");
4561 rc = -ENODEV;
4562 }
4563
4564unmap_cfgtable:
4565 iounmap(cfgtable);
4566
4567unmap_vaddr:
4568 iounmap(vaddr);
4569 return rc;
82eb03cf
CC		 4570}
4571
83123cb1
SC		 4572static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4573{
a6528d01 4574 int rc, i;
83123cb1
SC		 4575
4576 if (!reset_devices)
4577 return 0;
4578
a6528d01
SC		 4579 /* Reset the controller with a PCI power-cycle or via doorbell */
4580 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4581
a6528d01
SC		 4582 /* -ENOTSUPP here means we cannot reset the controller
4583 * but it's already (and still) up and running in
058a0f9f
SC		 4584 * "performant mode". Or, it might be 640x, which can't reset
4585 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4586 */
4587 if (rc == -ENOTSUPP)
4588 return 0; /* just try to do the kdump anyhow. */
4589 if (rc)
4590 return -ENODEV;
4591 if (cciss_reset_msi(pdev))
4592 return -ENODEV;
83123cb1
SC		 4593
4594 /* Now try to get the controller to respond to a no-op */
4595 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4596 if (cciss_noop(pdev) == 0)
4597 break;
4598 else
4599 dev_warn(&pdev->dev, "no-op failed%s\n",
4600 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4601 "; re-trying" : ""));
4602 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4603 }
82eb03cf
CC		 4604 return 0;
4605}
4606
1da177e4
LT		 4607/*
4608 * This is it. Find all the controllers and register them. I really hate
4609 * stealing all these major device numbers.
4610 * returns the number of block devices registered.
4611 */
4612static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4613 const struct pci_device_id *ent)
1da177e4 4614{
1da177e4 4615 int i;
799202cb 4616 int j = 0;
5c07a311 4617 int k = 0;
1da177e4 4618 int rc;
22bece00 4619 int dac, return_code;
212a5026 4620 InquiryData_struct *inq_buff;
f70dba83 4621 ctlr_info_t *h;
1da177e4 4622
83123cb1
SC		 4623 rc = cciss_init_reset_devices(pdev);
4624 if (rc)
4625 return rc;
b2a4a43d 4626 i = alloc_cciss_hba(pdev);
7c832835 4627 if (i < 0)
e2019b58 4628 return -1;
1f8ef380 4629
f70dba83
SC		 4630 h = hba[i];
4631 h->pdev = pdev;
4632 h->busy_initializing = 1;
4633 INIT_HLIST_HEAD(&h->cmpQ);
4634 INIT_HLIST_HEAD(&h->reqQ);
4635 mutex_init(&h->busy_shutting_down);
1f8ef380 4636
f70dba83 4637 if (cciss_pci_init(h) != 0)
2cfa948c 4638 goto clean_no_release_regions;
1da177e4 4639
f70dba83
SC		 4640 sprintf(h->devname, "cciss%d", i);
4641 h->ctlr = i;
1da177e4 4642
f70dba83 4643 init_completion(&h->scan_wait);
b368c9dd 4644
f70dba83 4645 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4646 goto clean0;
4647
1da177e4 4648 /* configure PCI DMA stuff */
6a35528a 4649 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4650 dac = 1;
284901a9 4651 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4652 dac = 0;
1da177e4 4653 else {
b2a4a43d 4654 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4655 goto clean1;
4656 }
4657
4658 /*
4659 * register with the major number, or get a dynamic major number
4660 * by passing 0 as argument. This is done for greater than
4661 * 8 controller support.
4662 */
4663 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4664 h->major = COMPAQ_CISS_MAJOR + i;
4665 rc = register_blkdev(h->major, h->devname);
7c832835 4666 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4667 dev_err(&h->pdev->dev,
4668 "Unable to get major number %d for %s "
f70dba83 4669 "on hba %d\n", h->major, h->devname, i);
1da177e4 4670 goto clean1;
7c832835 4671 } else {
1da177e4 4672 if (i >= MAX_CTLR_ORIG)
f70dba83 4673 h->major = rc;
1da177e4
LT		 4674 }
4675
4676 /* make sure the board interrupts are off */
f70dba83
SC		 4677 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4678 if (h->msi_vector || h->msix_vector) {
4679 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4680 do_cciss_msix_intr,
f70dba83 4681 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4682 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4683 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4684 goto clean2;
4685 }
4686 } else {
f70dba83
SC		 4687 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4688 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4689 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4690 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4691 goto clean2;
4692 }
1da177e4 4693 }
40aabb58 4694
b2a4a43d 4695 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4696 h->devname, pdev->device, pci_name(pdev),
4697 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4698
f70dba83
SC		 4699 h->cmd_pool_bits =
4700 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4701 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC		 4702 h->cmd_pool = (CommandList_struct *)
4703 pci_alloc_consistent(h->pdev,
4704 h->nr_cmds * sizeof(CommandList_struct),
4705 &(h->cmd_pool_dhandle));
4706 h->errinfo_pool = (ErrorInfo_struct *)
4707 pci_alloc_consistent(h->pdev,
4708 h->nr_cmds * sizeof(ErrorInfo_struct),
4709 &(h->errinfo_pool_dhandle));
4710 if ((h->cmd_pool_bits == NULL)
4711 || (h->cmd_pool == NULL)
4712 || (h->errinfo_pool == NULL)) {
b2a4a43d 4713 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT		 4714 goto clean4;
4715 }
5c07a311
DB		 4716
4717 /* Need space for temp scatter list */
f70dba83 4718 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB		 4719 sizeof(struct scatterlist *),
4720 GFP_KERNEL);
f70dba83
SC		 4721 for (k = 0; k < h->nr_cmds; k++) {
4722 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4723 h->maxsgentries,
5c07a311 4724 GFP_KERNEL);
f70dba83 4725 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC		 4726 dev_err(&h->pdev->dev,
4727 "could not allocate s/g lists\n");
5c07a311
DB		 4728 goto clean4;
4729 }
4730 }
f70dba83
SC		 4731 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4732 h->chainsize, h->nr_cmds);
4733 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4734 goto clean4;
5c07a311 4735
f70dba83 4736 spin_lock_init(&h->lock);
1da177e4 4737
7c832835 4738 /* Initialize the pdev driver private data.
f70dba83
SC		 4739 have it point to h. */
4740 pci_set_drvdata(pdev, h);
7c832835
BH		 4741 /* command and error info recs zeroed out before
4742 they are used */
f70dba83
SC		 4743 memset(h->cmd_pool_bits, 0,
4744 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4745 * sizeof(unsigned long));
1da177e4 4746
f70dba83
SC		 4747 h->num_luns = 0;
4748 h->highest_lun = -1;
6ae5ce8e 4749 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 4750 h->drv[j] = NULL;
4751 h->gendisk[j] = NULL;
6ae5ce8e 4752 }
1da177e4 4753
f70dba83 4754 cciss_scsi_setup(h);
1da177e4
LT		 4755
4756 /* Turn the interrupts on so we can service requests */
f70dba83 4757 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4758
22bece00
MM		 4759 /* Get the firmware version */
4760 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4761 if (inq_buff == NULL) {
b2a4a43d 4762 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 4763 goto clean4;
4764 }
4765
f70dba83 4766 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4767 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4768 if (return_code == IO_OK) {
f70dba83
SC		 4769 h->firm_ver[0] = inq_buff->data_byte[32];
4770 h->firm_ver[1] = inq_buff->data_byte[33];
4771 h->firm_ver[2] = inq_buff->data_byte[34];
4772 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4773 } else { /* send command failed */
b2a4a43d 4774 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 4775 " version of controller\n");
4776 }
212a5026 4777 kfree(inq_buff);
22bece00 4778
f70dba83 4779 cciss_procinit(h);
92c4231a 4780
f70dba83 4781 h->cciss_max_sectors = 8192;
92c4231a 4782
f70dba83
SC		 4783 rebuild_lun_table(h, 1, 0);
4784 h->busy_initializing = 0;
e2019b58 4785 return 1;
1da177e4 4786
6ae5ce8e 4787clean4:
f70dba83 4788 kfree(h->cmd_pool_bits);
5c07a311 4789 /* Free up sg elements */
f70dba83
SC		 4790 for (k = 0; k < h->nr_cmds; k++)
4791 kfree(h->scatter_list[k]);
4792 kfree(h->scatter_list);
4793 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4794 if (h->cmd_pool)
4795 pci_free_consistent(h->pdev,
4796 h->nr_cmds * sizeof(CommandList_struct),
4797 h->cmd_pool, h->cmd_pool_dhandle);
4798 if (h->errinfo_pool)
4799 pci_free_consistent(h->pdev,
4800 h->nr_cmds * sizeof(ErrorInfo_struct),
4801 h->errinfo_pool,
4802 h->errinfo_pool_dhandle);
4803 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4804clean2:
f70dba83 4805 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4806clean1:
f70dba83 4807 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4808clean0:
2cfa948c
SC		 4809 pci_release_regions(pdev);
4810clean_no_release_regions:
f70dba83 4811 h->busy_initializing = 0;
9cef0d2f 4812
872225ca
MM		 4813 /*
4814 * Deliberately omit pci_disable_device(): it does something nasty to
4815 * Smart Array controllers that pci_enable_device does not undo
4816 */
799202cb 4817 pci_set_drvdata(pdev, NULL);
f70dba83 4818 free_hba(h);
e2019b58 4819 return -1;
1da177e4
LT		 4820}
4821
e9ca75b5 4822static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4823{
29009a03
SC		 4824 ctlr_info_t *h;
4825 char *flush_buf;
7c832835 4826 int return_code;
1da177e4 4827
29009a03
SC		 4828 h = pci_get_drvdata(pdev);
4829 flush_buf = kzalloc(4, GFP_KERNEL);
4830 if (!flush_buf) {
b2a4a43d 4831 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4832 return;
e9ca75b5 4833 }
29009a03
SC		 4834 /* write all data in the battery backed cache to disk */
4835 memset(flush_buf, 0, 4);
f70dba83 4836 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 4837 4, 0, CTLR_LUNID, TYPE_CMD);
4838 kfree(flush_buf);
4839 if (return_code != IO_OK)
b2a4a43d 4840 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4841 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4842 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 4843}
4844
4845static void __devexit cciss_remove_one(struct pci_dev *pdev)
4846{
f70dba83 4847 ctlr_info_t *h;
e9ca75b5
GB		 4848 int i, j;
4849
7c832835 4850 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4851 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 4852 return;
4853 }
0a9279cc 4854
f70dba83
SC		 4855 h = pci_get_drvdata(pdev);
4856 i = h->ctlr;
7c832835 4857 if (hba[i] == NULL) {
b2a4a43d 4858 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 4859 return;
4860 }
b6550777 4861
f70dba83 4862 mutex_lock(&h->busy_shutting_down);
0a9279cc 4863
f70dba83
SC		 4864 remove_from_scan_list(h);
4865 remove_proc_entry(h->devname, proc_cciss);
4866 unregister_blkdev(h->major, h->devname);
b6550777
BH		 4867
4868 /* remove it from the disk list */
4869 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4870 struct gendisk *disk = h->gendisk[j];
b6550777 4871 if (disk) {
165125e1 4872 struct request_queue *q = disk->queue;
b6550777 4873
097d0264 4874 if (disk->flags & GENHD_FL_UP) {
f70dba83 4875 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4876 del_gendisk(disk);
097d0264 4877 }
b6550777
BH		 4878 if (q)
4879 blk_cleanup_queue(q);
4880 }
4881 }
4882
ba198efb 4883#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4884 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4885#endif
b6550777 4886
e9ca75b5 4887 cciss_shutdown(pdev);
fb86a35b
MM		 4888
4889#ifdef CONFIG_PCI_MSI
f70dba83
SC		 4890 if (h->msix_vector)
4891 pci_disable_msix(h->pdev);
4892 else if (h->msi_vector)
4893 pci_disable_msi(h->pdev);
7c832835 4894#endif /* CONFIG_PCI_MSI */
fb86a35b 4895
f70dba83
SC		 4896 iounmap(h->transtable);
4897 iounmap(h->cfgtable);
4898 iounmap(h->vaddr);
1da177e4 4899
f70dba83
SC		 4900 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4901 h->cmd_pool, h->cmd_pool_dhandle);
4902 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4903 h->errinfo_pool, h->errinfo_pool_dhandle);
4904 kfree(h->cmd_pool_bits);
5c07a311 4905 /* Free up sg elements */
f70dba83
SC		 4906 for (j = 0; j < h->nr_cmds; j++)
4907 kfree(h->scatter_list[j]);
4908 kfree(h->scatter_list);
4909 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM		 4910 /*
4911 * Deliberately omit pci_disable_device(): it does something nasty to
4912 * Smart Array controllers that pci_enable_device does not undo
4913 */
7c832835 4914 pci_release_regions(pdev);
4e570309 4915 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 4916 cciss_destroy_hba_sysfs_entry(h);
4917 mutex_unlock(&h->busy_shutting_down);
4918 free_hba(h);
7c832835 4919}
1da177e4
LT		 4920
4921static struct pci_driver cciss_pci_driver = {
7c832835
BH		 4922 .name = "cciss",
4923 .probe = cciss_init_one,
4924 .remove = __devexit_p(cciss_remove_one),
4925 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4926 .shutdown = cciss_shutdown,
1da177e4
LT		 4927};
4928
4929/*
4930 * This is it. Register the PCI driver information for the cards we control
7c832835 4931 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 4932 */
4933static int __init cciss_init(void)
4934{
7fe06326
AP		 4935 int err;
4936
10cbda97
JA		 4937 /*
4938 * The hardware requires that commands are aligned on a 64-bit
4939 * boundary. Given that we use pci_alloc_consistent() to allocate an
4940 * array of them, the size must be a multiple of 8 bytes.
4941 */
1b7d0d28 4942 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 4943 printk(KERN_INFO DRIVER_NAME "\n");
4944
7fe06326
AP		 4945 err = bus_register(&cciss_bus_type);
4946 if (err)
4947 return err;
4948
b368c9dd
AP		 4949 /* Start the scan thread */
4950 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4951 if (IS_ERR(cciss_scan_thread)) {
4952 err = PTR_ERR(cciss_scan_thread);
4953 goto err_bus_unregister;
4954 }
4955
1da177e4 4956 /* Register for our PCI devices */
7fe06326
AP		 4957 err = pci_register_driver(&cciss_pci_driver);
4958 if (err)
b368c9dd 4959 goto err_thread_stop;
7fe06326 4960
617e1344 4961 return err;
7fe06326 4962
b368c9dd
AP		 4963err_thread_stop:
4964 kthread_stop(cciss_scan_thread);
4965err_bus_unregister:
7fe06326 4966 bus_unregister(&cciss_bus_type);
b368c9dd 4967
7fe06326 4968 return err;
1da177e4
LT		 4969}
4970
4971static void __exit cciss_cleanup(void)
4972{
4973 int i;
4974
4975 pci_unregister_driver(&cciss_pci_driver);
4976 /* double check that all controller entrys have been removed */
7c832835
BH		 4977 for (i = 0; i < MAX_CTLR; i++) {
4978 if (hba[i] != NULL) {
b2a4a43d
SC		 4979 dev_warn(&hba[i]->pdev->dev,
4980 "had to remove controller\n");
1da177e4
LT		 4981 cciss_remove_one(hba[i]->pdev);
4982 }
4983 }
b368c9dd 4984 kthread_stop(cciss_scan_thread);
928b4d8c 4985 remove_proc_entry("driver/cciss", NULL);
7fe06326 4986 bus_unregister(&cciss_bus_type);
1da177e4
LT		 4987}
4988
4989module_init(cciss_init);
4990module_exit(cciss_cleanup);
Linux kernel - Deliverables
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