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cciss: factor out cciss_big_passthru
[deliverable/linux.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
405f5571 29#include <linux/smp_lock.h>
1da177e4
LT		 30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1da177e4
LT		 44#include <asm/uaccess.h>
45#include <asm/io.h>
46
eb0df996 47#include <linux/dma-mapping.h>
1da177e4
LT		 48#include <linux/blkdev.h>
49#include <linux/genhd.h>
50#include <linux/completion.h>
d5d3b736 51#include <scsi/scsi.h>
03bbfee5
MMOD		 52#include <scsi/sg.h>
53#include <scsi/scsi_ioctl.h>
54#include <linux/cdrom.h>
231bc2a2 55#include <linux/scatterlist.h>
0a9279cc 56#include <linux/kthread.h>
1da177e4
LT		 57
58#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 59#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 61
62/* Embedded module documentation macros - see modules.h */
63MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 64MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 65MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66MODULE_VERSION("3.6.26");
1da177e4
LT		 67MODULE_LICENSE("GPL");
68
2ec24ff1
SC		 69static int cciss_allow_hpsa;
70module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
71MODULE_PARM_DESC(cciss_allow_hpsa,
72 "Prevent cciss driver from accessing hardware known to be "
73 " supported by the hpsa driver");
74
1da177e4
LT		 75#include "cciss_cmd.h"
76#include "cciss.h"
77#include <linux/cciss_ioctl.h>
78
79/* define the PCI info for the cards we can control */
80static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
24aac480
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
77ca7286
MM		 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
841fdffd
MM		 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
1da177e4
LT		 113 {0,}
114};
7c832835 115
1da177e4
LT		 116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
1da177e4
LT		 118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
7c832835 120 * access = Address of the struct of function pointers
1da177e4
LT		 121 */
122static struct board_type products[] = {
49153998
MM		 123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
49153998
MM		 133 {0x3235103C, "Smart Array P400i", &SA5_access},
134 {0x3211103C, "Smart Array E200i", &SA5_access},
135 {0x3212103C, "Smart Array E200", &SA5_access},
136 {0x3213103C, "Smart Array E200i", &SA5_access},
137 {0x3214103C, "Smart Array E200i", &SA5_access},
138 {0x3215103C, "Smart Array E200i", &SA5_access},
139 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 140/* controllers below this line are also supported by the hpsa driver. */
141#define HPSA_BOUNDARY 0x3223103C
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 {0x3241103C, "Smart Array P212", &SA5_access},
146 {0x3243103C, "Smart Array P410", &SA5_access},
147 {0x3245103C, "Smart Array P410i", &SA5_access},
148 {0x3247103C, "Smart Array P411", &SA5_access},
149 {0x3249103C, "Smart Array P812", &SA5_access},
77ca7286
MM		 150 {0x324A103C, "Smart Array P712m", &SA5_access},
151 {0x324B103C, "Smart Array P711m", &SA5_access},
841fdffd
MM		 152 {0x3250103C, "Smart Array", &SA5_access},
153 {0x3251103C, "Smart Array", &SA5_access},
154 {0x3252103C, "Smart Array", &SA5_access},
155 {0x3253103C, "Smart Array", &SA5_access},
156 {0x3254103C, "Smart Array", &SA5_access},
1da177e4
LT		 157};
158
d14c4ab5 159/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 160#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 161#define MAX_IOCTL_CONFIG_WAIT 1000
162
163/*define how many times we will try a command because of bus resets */
164#define MAX_CMD_RETRIES 3
165
1da177e4
LT		 166#define MAX_CTLR 32
167
168/* Originally cciss driver only supports 8 major numbers */
169#define MAX_CTLR_ORIG 8
170
1da177e4
LT		 171static ctlr_info_t *hba[MAX_CTLR];
172
b368c9dd
AP		 173static struct task_struct *cciss_scan_thread;
174static DEFINE_MUTEX(scan_mutex);
175static LIST_HEAD(scan_q);
176
165125e1 177static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 178static irqreturn_t do_cciss_intx(int irq, void *dev_id);
179static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 180static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 181static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 182static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 183static int do_ioctl(struct block_device *bdev, fmode_t mode,
184 unsigned int cmd, unsigned long arg);
ef7822c2 185static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 186 unsigned int cmd, unsigned long arg);
a885c8c4 187static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 188
1da177e4 189static int cciss_revalidate(struct gendisk *disk);
2d11d993 190static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 191static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 192 int clear_all, int via_ioctl);
1da177e4 193
f70dba83 194static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 195 sector_t *total_size, unsigned int *block_size);
f70dba83 196static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 197 sector_t *total_size, unsigned int *block_size);
f70dba83 198static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 199 sector_t total_size,
00988a35 200 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 201 drive_info_struct *drv);
dac5488a 202static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 203static void start_io(ctlr_info_t *h);
f70dba83 204static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 205 __u8 page_code, unsigned char scsi3addr[],
206 int cmd_type);
85cc61ae 207static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
208 int attempt_retry);
209static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 210
d6f4965d 211static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 212static int scan_thread(void *data);
213static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 214static void cciss_hba_release(struct device *dev);
215static void cciss_device_release(struct device *dev);
361e9b07 216static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 217static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 218static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 219static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
220 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
221 u64 *cfg_offset);
222static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
223 unsigned long *memory_bar);
224
33079b21 225
5e216153
MM		 226/* performant mode helper functions */
227static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
228 int *bucket_map);
229static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 230
1da177e4 231#ifdef CONFIG_PROC_FS
f70dba83 232static void cciss_procinit(ctlr_info_t *h);
1da177e4 233#else
f70dba83 234static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 235{
236}
237#endif /* CONFIG_PROC_FS */
1da177e4
LT		 238
239#ifdef CONFIG_COMPAT
ef7822c2
AV		 240static int cciss_compat_ioctl(struct block_device *, fmode_t,
241 unsigned, unsigned long);
1da177e4
LT		 242#endif
243
83d5cde4 244static const struct block_device_operations cciss_fops = {
7c832835 245 .owner = THIS_MODULE,
6e9624b8 246 .open = cciss_unlocked_open,
ef7822c2 247 .release = cciss_release,
8a6cfeb6 248 .ioctl = do_ioctl,
7c832835 249 .getgeo = cciss_getgeo,
1da177e4 250#ifdef CONFIG_COMPAT
ef7822c2 251 .compat_ioctl = cciss_compat_ioctl,
1da177e4 252#endif
7c832835 253 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 254};
255
5e216153
MM		 256/* set_performant_mode: Modify the tag for cciss performant
257 * set bit 0 for pull model, bits 3-1 for block fetch
258 * register number
259 */
260static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
261{
262 if (likely(h->transMethod == CFGTBL_Trans_Performant))
263 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
264}
265
1da177e4
LT		 266/*
267 * Enqueuing and dequeuing functions for cmdlists.
268 */
8a3173de 269static inline void addQ(struct hlist_head *list, CommandList_struct *c)
1da177e4 270{
8a3173de 271 hlist_add_head(&c->list, list);
1da177e4
LT		 272}
273
8a3173de 274static inline void removeQ(CommandList_struct *c)
1da177e4 275{
b59e64d0
HR		 276 /*
277 * After kexec/dump some commands might still
278 * be in flight, which the firmware will try
279 * to complete. Resetting the firmware doesn't work
280 * with old fw revisions, so we have to mark
281 * them off as 'stale' to prevent the driver from
282 * falling over.
283 */
284 if (WARN_ON(hlist_unhashed(&c->list))) {
285 c->cmd_type = CMD_MSG_STALE;
8a3173de 286 return;
b59e64d0 287 }
8a3173de
JA		 288
289 hlist_del_init(&c->list);
1da177e4
LT		 290}
291
664a717d
MM		 292static void enqueue_cmd_and_start_io(ctlr_info_t *h,
293 CommandList_struct *c)
294{
295 unsigned long flags;
5e216153 296 set_performant_mode(h, c);
664a717d
MM		 297 spin_lock_irqsave(&h->lock, flags);
298 addQ(&h->reqQ, c);
299 h->Qdepth++;
300 start_io(h);
301 spin_unlock_irqrestore(&h->lock, flags);
302}
303
dccc9b56 304static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 305 int nr_cmds)
306{
307 int i;
308
309 if (!cmd_sg_list)
310 return;
311 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 312 kfree(cmd_sg_list[i]);
313 cmd_sg_list[i] = NULL;
49fc5601
SC		 314 }
315 kfree(cmd_sg_list);
316}
317
dccc9b56
SC		 318static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
319 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 320{
321 int j;
dccc9b56 322 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 323
324 if (chainsize <= 0)
325 return NULL;
326
327 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
328 if (!cmd_sg_list)
329 return NULL;
330
331 /* Build up chain blocks for each command */
332 for (j = 0; j < nr_cmds; j++) {
49fc5601 333 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 334 cmd_sg_list[j] = kmalloc((chainsize *
335 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
336 if (!cmd_sg_list[j]) {
49fc5601
SC		 337 dev_err(&h->pdev->dev, "Cannot get memory "
338 "for s/g chains.\n");
339 goto clean;
340 }
341 }
342 return cmd_sg_list;
343clean:
344 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
345 return NULL;
346}
347
d45033ef
SC		 348static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
349{
350 SGDescriptor_struct *chain_sg;
351 u64bit temp64;
352
353 if (c->Header.SGTotal <= h->max_cmd_sgentries)
354 return;
355
356 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
357 temp64.val32.lower = chain_sg->Addr.lower;
358 temp64.val32.upper = chain_sg->Addr.upper;
359 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
360}
361
362static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
363 SGDescriptor_struct *chain_block, int len)
364{
365 SGDescriptor_struct *chain_sg;
366 u64bit temp64;
367
368 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
369 chain_sg->Ext = CCISS_SG_CHAIN;
370 chain_sg->Len = len;
371 temp64.val = pci_map_single(h->pdev, chain_block, len,
372 PCI_DMA_TODEVICE);
373 chain_sg->Addr.lower = temp64.val32.lower;
374 chain_sg->Addr.upper = temp64.val32.upper;
375}
376
1da177e4
LT		 377#include "cciss_scsi.c" /* For SCSI tape support */
378
1e6f2dc1
AB		 379static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
380 "UNKNOWN"
381};
0e4a9d03 382#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 383
1da177e4
LT		 384#ifdef CONFIG_PROC_FS
385
386/*
387 * Report information about this controller.
388 */
389#define ENG_GIG 1000000000
390#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 391#define ENGAGE_SCSI "engage scsi"
1da177e4
LT		 392
393static struct proc_dir_entry *proc_cciss;
394
89b6e743 395static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 396{
89b6e743
MM		 397 ctlr_info_t *h = seq->private;
398
399 seq_printf(seq, "%s: HP %s Controller\n"
400 "Board ID: 0x%08lx\n"
401 "Firmware Version: %c%c%c%c\n"
402 "IRQ: %d\n"
403 "Logical drives: %d\n"
404 "Current Q depth: %d\n"
405 "Current # commands on controller: %d\n"
406 "Max Q depth since init: %d\n"
407 "Max # commands on controller since init: %d\n"
408 "Max SG entries since init: %d\n",
409 h->devname,
410 h->product_name,
411 (unsigned long)h->board_id,
412 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 413 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 414 h->num_luns,
415 h->Qdepth, h->commands_outstanding,
416 h->maxQsinceinit, h->max_outstanding, h->maxSG);
417
418#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 419 cciss_seq_tape_report(seq, h);
89b6e743
MM		 420#endif /* CONFIG_CISS_SCSI_TAPE */
421}
1da177e4 422
89b6e743
MM		 423static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
424{
425 ctlr_info_t *h = seq->private;
89b6e743 426 unsigned long flags;
1da177e4
LT		 427
428 /* prevent displaying bogus info during configuration
429 * or deconfiguration of a logical volume
430 */
f70dba83 431 spin_lock_irqsave(&h->lock, flags);
1da177e4 432 if (h->busy_configuring) {
f70dba83 433 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 434 return ERR_PTR(-EBUSY);
1da177e4
LT		 435 }
436 h->busy_configuring = 1;
f70dba83 437 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 438
89b6e743
MM		 439 if (*pos == 0)
440 cciss_seq_show_header(seq);
441
442 return pos;
443}
444
445static int cciss_seq_show(struct seq_file *seq, void *v)
446{
447 sector_t vol_sz, vol_sz_frac;
448 ctlr_info_t *h = seq->private;
449 unsigned ctlr = h->ctlr;
450 loff_t *pos = v;
9cef0d2f 451 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 452
453 if (*pos > h->highest_lun)
454 return 0;
455
531c2dc7
SC		 456 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
457 return 0;
458
89b6e743
MM		 459 if (drv->heads == 0)
460 return 0;
461
462 vol_sz = drv->nr_blocks;
463 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
464 vol_sz_frac *= 100;
465 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
466
fa52bec9 467 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 468 drv->raid_level = RAID_UNKNOWN;
469 seq_printf(seq, "cciss/c%dd%d:"
470 "\t%4u.%02uGB\tRAID %s\n",
471 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
472 raid_label[drv->raid_level]);
473 return 0;
474}
475
476static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
477{
478 ctlr_info_t *h = seq->private;
479
480 if (*pos > h->highest_lun)
481 return NULL;
482 *pos += 1;
483
484 return pos;
485}
486
487static void cciss_seq_stop(struct seq_file *seq, void *v)
488{
489 ctlr_info_t *h = seq->private;
490
491 /* Only reset h->busy_configuring if we succeeded in setting
492 * it during cciss_seq_start. */
493 if (v == ERR_PTR(-EBUSY))
494 return;
7c832835 495
1da177e4 496 h->busy_configuring = 0;
1da177e4
LT		 497}
498
88e9d34c 499static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 500 .start = cciss_seq_start,
501 .show = cciss_seq_show,
502 .next = cciss_seq_next,
503 .stop = cciss_seq_stop,
504};
505
506static int cciss_seq_open(struct inode *inode, struct file *file)
507{
508 int ret = seq_open(file, &cciss_seq_ops);
509 struct seq_file *seq = file->private_data;
510
511 if (!ret)
512 seq->private = PDE(inode)->data;
513
514 return ret;
515}
516
517static ssize_t
518cciss_proc_write(struct file *file, const char __user *buf,
519 size_t length, loff_t *ppos)
1da177e4 520{
89b6e743
MM		 521 int err;
522 char *buffer;
523
524#ifndef CONFIG_CISS_SCSI_TAPE
525 return -EINVAL;
1da177e4
LT		 526#endif
527
89b6e743 528 if (!buf || length > PAGE_SIZE - 1)
7c832835 529 return -EINVAL;
89b6e743
MM		 530
531 buffer = (char *)__get_free_page(GFP_KERNEL);
532 if (!buffer)
533 return -ENOMEM;
534
535 err = -EFAULT;
536 if (copy_from_user(buffer, buf, length))
537 goto out;
538 buffer[length] = '\0';
539
540#ifdef CONFIG_CISS_SCSI_TAPE
541 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
542 struct seq_file *seq = file->private_data;
543 ctlr_info_t *h = seq->private;
89b6e743 544
f70dba83 545 err = cciss_engage_scsi(h);
8721c81f 546 if (err == 0)
89b6e743
MM		 547 err = length;
548 } else
549#endif /* CONFIG_CISS_SCSI_TAPE */
550 err = -EINVAL;
7c832835
BH		 551 /* might be nice to have "disengage" too, but it's not
552 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 553
554out:
555 free_page((unsigned long)buffer);
556 return err;
1da177e4
LT		 557}
558
828c0950 559static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 560 .owner = THIS_MODULE,
561 .open = cciss_seq_open,
562 .read = seq_read,
563 .llseek = seq_lseek,
564 .release = seq_release,
565 .write = cciss_proc_write,
566};
567
f70dba83 568static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 569{
570 struct proc_dir_entry *pde;
571
89b6e743 572 if (proc_cciss == NULL)
928b4d8c 573 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 574 if (!proc_cciss)
575 return;
f70dba83 576 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 577 S_IROTH, proc_cciss,
f70dba83 578 &cciss_proc_fops, h);
1da177e4 579}
7c832835 580#endif /* CONFIG_PROC_FS */
1da177e4 581
7fe06326
AP		 582#define MAX_PRODUCT_NAME_LEN 19
583
584#define to_hba(n) container_of(n, struct ctlr_info, dev)
585#define to_drv(n) container_of(n, drive_info_struct, dev)
586
d6f4965d
AP		 587static ssize_t host_store_rescan(struct device *dev,
588 struct device_attribute *attr,
589 const char *buf, size_t count)
590{
591 struct ctlr_info *h = to_hba(dev);
592
593 add_to_scan_list(h);
594 wake_up_process(cciss_scan_thread);
595 wait_for_completion_interruptible(&h->scan_wait);
596
597 return count;
598}
8ba95c69 599static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 600
601static ssize_t dev_show_unique_id(struct device *dev,
602 struct device_attribute *attr,
603 char *buf)
604{
605 drive_info_struct *drv = to_drv(dev);
606 struct ctlr_info *h = to_hba(drv->dev.parent);
607 __u8 sn[16];
608 unsigned long flags;
609 int ret = 0;
610
f70dba83 611 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 612 if (h->busy_configuring)
613 ret = -EBUSY;
614 else
615 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 616 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 617
618 if (ret)
619 return ret;
620 else
621 return snprintf(buf, 16 * 2 + 2,
622 "%02X%02X%02X%02X%02X%02X%02X%02X"
623 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
624 sn[0], sn[1], sn[2], sn[3],
625 sn[4], sn[5], sn[6], sn[7],
626 sn[8], sn[9], sn[10], sn[11],
627 sn[12], sn[13], sn[14], sn[15]);
628}
8ba95c69 629static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 630
631static ssize_t dev_show_vendor(struct device *dev,
632 struct device_attribute *attr,
633 char *buf)
634{
635 drive_info_struct *drv = to_drv(dev);
636 struct ctlr_info *h = to_hba(drv->dev.parent);
637 char vendor[VENDOR_LEN + 1];
638 unsigned long flags;
639 int ret = 0;
640
f70dba83 641 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 642 if (h->busy_configuring)
643 ret = -EBUSY;
644 else
645 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 646 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 647
648 if (ret)
649 return ret;
650 else
651 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
652}
8ba95c69 653static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 654
655static ssize_t dev_show_model(struct device *dev,
656 struct device_attribute *attr,
657 char *buf)
658{
659 drive_info_struct *drv = to_drv(dev);
660 struct ctlr_info *h = to_hba(drv->dev.parent);
661 char model[MODEL_LEN + 1];
662 unsigned long flags;
663 int ret = 0;
664
f70dba83 665 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 666 if (h->busy_configuring)
667 ret = -EBUSY;
668 else
669 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 670 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 671
672 if (ret)
673 return ret;
674 else
675 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
676}
8ba95c69 677static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 678
679static ssize_t dev_show_rev(struct device *dev,
680 struct device_attribute *attr,
681 char *buf)
682{
683 drive_info_struct *drv = to_drv(dev);
684 struct ctlr_info *h = to_hba(drv->dev.parent);
685 char rev[REV_LEN + 1];
686 unsigned long flags;
687 int ret = 0;
688
f70dba83 689 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 690 if (h->busy_configuring)
691 ret = -EBUSY;
692 else
693 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 694 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 695
696 if (ret)
697 return ret;
698 else
699 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
700}
8ba95c69 701static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 702
ce84a8ae
SC		 703static ssize_t cciss_show_lunid(struct device *dev,
704 struct device_attribute *attr, char *buf)
705{
9cef0d2f
SC		 706 drive_info_struct *drv = to_drv(dev);
707 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 708 unsigned long flags;
709 unsigned char lunid[8];
710
f70dba83 711 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 712 if (h->busy_configuring) {
f70dba83 713 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 714 return -EBUSY;
715 }
716 if (!drv->heads) {
f70dba83 717 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 718 return -ENOTTY;
719 }
720 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 721 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 722 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
723 lunid[0], lunid[1], lunid[2], lunid[3],
724 lunid[4], lunid[5], lunid[6], lunid[7]);
725}
8ba95c69 726static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 727
3ff1111d
SC		 728static ssize_t cciss_show_raid_level(struct device *dev,
729 struct device_attribute *attr, char *buf)
730{
9cef0d2f
SC		 731 drive_info_struct *drv = to_drv(dev);
732 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 733 int raid;
734 unsigned long flags;
735
f70dba83 736 spin_lock_irqsave(&h->lock, flags);
3ff1111d 737 if (h->busy_configuring) {
f70dba83 738 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 739 return -EBUSY;
740 }
741 raid = drv->raid_level;
f70dba83 742 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 743 if (raid < 0 || raid > RAID_UNKNOWN)
744 raid = RAID_UNKNOWN;
745
746 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
747 raid_label[raid]);
748}
8ba95c69 749static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 750
e272afec
SC		 751static ssize_t cciss_show_usage_count(struct device *dev,
752 struct device_attribute *attr, char *buf)
753{
9cef0d2f
SC		 754 drive_info_struct *drv = to_drv(dev);
755 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 756 unsigned long flags;
757 int count;
758
f70dba83 759 spin_lock_irqsave(&h->lock, flags);
e272afec 760 if (h->busy_configuring) {
f70dba83 761 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 762 return -EBUSY;
763 }
764 count = drv->usage_count;
f70dba83 765 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 766 return snprintf(buf, 20, "%d\n", count);
767}
8ba95c69 768static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 769
d6f4965d
AP		 770static struct attribute *cciss_host_attrs[] = {
771 &dev_attr_rescan.attr,
772 NULL
773};
774
775static struct attribute_group cciss_host_attr_group = {
776 .attrs = cciss_host_attrs,
777};
778
9f792d9f 779static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 780 &cciss_host_attr_group,
781 NULL
782};
783
784static struct device_type cciss_host_type = {
785 .name = "cciss_host",
786 .groups = cciss_host_attr_groups,
617e1344 787 .release = cciss_hba_release,
d6f4965d
AP		 788};
789
7fe06326
AP		 790static struct attribute *cciss_dev_attrs[] = {
791 &dev_attr_unique_id.attr,
792 &dev_attr_model.attr,
793 &dev_attr_vendor.attr,
794 &dev_attr_rev.attr,
ce84a8ae 795 &dev_attr_lunid.attr,
3ff1111d 796 &dev_attr_raid_level.attr,
e272afec 797 &dev_attr_usage_count.attr,
7fe06326
AP		 798 NULL
799};
800
801static struct attribute_group cciss_dev_attr_group = {
802 .attrs = cciss_dev_attrs,
803};
804
a4dbd674 805static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 806 &cciss_dev_attr_group,
807 NULL
808};
809
810static struct device_type cciss_dev_type = {
811 .name = "cciss_device",
812 .groups = cciss_dev_attr_groups,
617e1344 813 .release = cciss_device_release,
7fe06326
AP		 814};
815
816static struct bus_type cciss_bus_type = {
817 .name = "cciss",
818};
819
617e1344
SC		 820/*
821 * cciss_hba_release is called when the reference count
822 * of h->dev goes to zero.
823 */
824static void cciss_hba_release(struct device *dev)
825{
826 /*
827 * nothing to do, but need this to avoid a warning
828 * about not having a release handler from lib/kref.c.
829 */
830}
7fe06326
AP		 831
832/*
833 * Initialize sysfs entry for each controller. This sets up and registers
834 * the 'cciss#' directory for each individual controller under
835 * /sys/bus/pci/devices/<dev>/.
836 */
837static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
838{
839 device_initialize(&h->dev);
840 h->dev.type = &cciss_host_type;
841 h->dev.bus = &cciss_bus_type;
842 dev_set_name(&h->dev, "%s", h->devname);
843 h->dev.parent = &h->pdev->dev;
844
845 return device_add(&h->dev);
846}
847
848/*
849 * Remove sysfs entries for an hba.
850 */
851static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
852{
853 device_del(&h->dev);
617e1344
SC		 854 put_device(&h->dev); /* final put. */
855}
856
857/* cciss_device_release is called when the reference count
9cef0d2f 858 * of h->drv[x]dev goes to zero.
617e1344
SC		 859 */
860static void cciss_device_release(struct device *dev)
861{
9cef0d2f
SC		 862 drive_info_struct *drv = to_drv(dev);
863 kfree(drv);
7fe06326
AP		 864}
865
866/*
867 * Initialize sysfs for each logical drive. This sets up and registers
868 * the 'c#d#' directory for each individual logical drive under
869 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
870 * /sys/block/cciss!c#d# to this entry.
871 */
617e1344 872static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 873 int drv_index)
874{
617e1344
SC		 875 struct device *dev;
876
9cef0d2f 877 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 878 return 0;
879
9cef0d2f 880 dev = &h->drv[drv_index]->dev;
617e1344
SC		 881 device_initialize(dev);
882 dev->type = &cciss_dev_type;
883 dev->bus = &cciss_bus_type;
884 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
885 dev->parent = &h->dev;
9cef0d2f 886 h->drv[drv_index]->device_initialized = 1;
617e1344 887 return device_add(dev);
7fe06326
AP		 888}
889
890/*
891 * Remove sysfs entries for a logical drive.
892 */
8ce51966
SC		 893static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
894 int ctlr_exiting)
7fe06326 895{
9cef0d2f 896 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 897
898 /* special case for c*d0, we only destroy it on controller exit */
899 if (drv_index == 0 && !ctlr_exiting)
900 return;
901
617e1344
SC		 902 device_del(dev);
903 put_device(dev); /* the "final" put. */
9cef0d2f 904 h->drv[drv_index] = NULL;
7fe06326
AP		 905}
906
7c832835
BH		 907/*
908 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 909 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 910 * which ones are free or in use.
7c832835 911 */
6b4d96b8 912static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 913{
914 CommandList_struct *c;
7c832835 915 int i;
1da177e4
LT		 916 u64bit temp64;
917 dma_addr_t cmd_dma_handle, err_dma_handle;
918
6b4d96b8
SC		 919 do {
920 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
921 if (i == h->nr_cmds)
7c832835 922 return NULL;
6b4d96b8
SC		 923 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
924 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 925 c = h->cmd_pool + i;
926 memset(c, 0, sizeof(CommandList_struct));
927 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
928 c->err_info = h->errinfo_pool + i;
929 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
930 err_dma_handle = h->errinfo_pool_dhandle
931 + i * sizeof(ErrorInfo_struct);
932 h->nr_allocs++;
1da177e4 933
6b4d96b8 934 c->cmdindex = i;
33079b21 935
6b4d96b8
SC		 936 INIT_HLIST_NODE(&c->list);
937 c->busaddr = (__u32) cmd_dma_handle;
938 temp64.val = (__u64) err_dma_handle;
939 c->ErrDesc.Addr.lower = temp64.val32.lower;
940 c->ErrDesc.Addr.upper = temp64.val32.upper;
941 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 942
6b4d96b8
SC		 943 c->ctlr = h->ctlr;
944 return c;
945}
33079b21 946
6b4d96b8
SC		 947/* allocate a command using pci_alloc_consistent, used for ioctls,
948 * etc., not for the main i/o path.
949 */
950static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
951{
952 CommandList_struct *c;
953 u64bit temp64;
954 dma_addr_t cmd_dma_handle, err_dma_handle;
955
956 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
957 sizeof(CommandList_struct), &cmd_dma_handle);
958 if (c == NULL)
959 return NULL;
960 memset(c, 0, sizeof(CommandList_struct));
961
962 c->cmdindex = -1;
963
964 c->err_info = (ErrorInfo_struct *)
965 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
966 &err_dma_handle);
967
968 if (c->err_info == NULL) {
969 pci_free_consistent(h->pdev,
970 sizeof(CommandList_struct), c, cmd_dma_handle);
971 return NULL;
7c832835 972 }
6b4d96b8 973 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 974
8a3173de 975 INIT_HLIST_NODE(&c->list);
1da177e4 976 c->busaddr = (__u32) cmd_dma_handle;
7c832835 977 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 978 c->ErrDesc.Addr.lower = temp64.val32.lower;
979 c->ErrDesc.Addr.upper = temp64.val32.upper;
980 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 981
7c832835
BH		 982 c->ctlr = h->ctlr;
983 return c;
1da177e4
LT		 984}
985
6b4d96b8 986static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 987{
988 int i;
6b4d96b8
SC		 989
990 i = c - h->cmd_pool;
991 clear_bit(i & (BITS_PER_LONG - 1),
992 h->cmd_pool_bits + (i / BITS_PER_LONG));
993 h->nr_frees++;
994}
995
996static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
997{
1da177e4
LT		 998 u64bit temp64;
999
6b4d96b8
SC		 1000 temp64.val32.lower = c->ErrDesc.Addr.lower;
1001 temp64.val32.upper = c->ErrDesc.Addr.upper;
1002 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1003 c->err_info, (dma_addr_t) temp64.val);
1004 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
1005 c, (dma_addr_t) c->busaddr);
1da177e4
LT		 1006}
1007
1008static inline ctlr_info_t *get_host(struct gendisk *disk)
1009{
7c832835 1010 return disk->queue->queuedata;
1da177e4
LT		 1011}
1012
1013static inline drive_info_struct *get_drv(struct gendisk *disk)
1014{
1015 return disk->private_data;
1016}
1017
1018/*
1019 * Open. Make sure the device is really there.
1020 */
ef7822c2 1021static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1022{
f70dba83 1023 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1024 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1025
b2a4a43d 1026 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1027 if (drv->busy_configuring)
ddd47442 1028 return -EBUSY;
1da177e4
LT		 1029 /*
1030 * Root is allowed to open raw volume zero even if it's not configured
1031 * so array config can still work. Root is also allowed to open any
1032 * volume that has a LUN ID, so it can issue IOCTL to reread the
1033 * disk information. I don't think I really like this
1034 * but I'm already using way to many device nodes to claim another one
1035 * for "raw controller".
1036 */
7a06f789 1037 if (drv->heads == 0) {
ef7822c2 1038 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1039 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1040 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1041 return -ENXIO;
1da177e4 1042 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1043 } else if (memcmp(drv->LunID, CTLR_LUNID,
1044 sizeof(drv->LunID))) {
1da177e4
LT		 1045 return -ENXIO;
1046 }
1047 }
1048 if (!capable(CAP_SYS_ADMIN))
1049 return -EPERM;
1050 }
1051 drv->usage_count++;
f70dba83 1052 h->usage_count++;
1da177e4
LT		 1053 return 0;
1054}
7c832835 1055
6e9624b8
AB		 1056static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1057{
1058 int ret;
1059
1060 lock_kernel();
1061 ret = cciss_open(bdev, mode);
1062 unlock_kernel();
1063
1064 return ret;
1065}
1066
1da177e4
LT		 1067/*
1068 * Close. Sync first.
1069 */
ef7822c2 1070static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1071{
f70dba83 1072 ctlr_info_t *h;
6e9624b8 1073 drive_info_struct *drv;
1da177e4 1074
6e9624b8 1075 lock_kernel();
f70dba83 1076 h = get_host(disk);
6e9624b8 1077 drv = get_drv(disk);
b2a4a43d 1078 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1079 drv->usage_count--;
f70dba83 1080 h->usage_count--;
6e9624b8 1081 unlock_kernel();
1da177e4
LT		 1082 return 0;
1083}
1084
ef7822c2
AV		 1085static int do_ioctl(struct block_device *bdev, fmode_t mode,
1086 unsigned cmd, unsigned long arg)
1da177e4
LT		 1087{
1088 int ret;
1089 lock_kernel();
ef7822c2 1090 ret = cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1091 unlock_kernel();
1092 return ret;
1093}
1094
8a6cfeb6
AB		 1095#ifdef CONFIG_COMPAT
1096
ef7822c2
AV		 1097static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1098 unsigned cmd, unsigned long arg);
1099static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1100 unsigned cmd, unsigned long arg);
1da177e4 1101
ef7822c2
AV		 1102static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1103 unsigned cmd, unsigned long arg)
1da177e4
LT		 1104{
1105 switch (cmd) {
1106 case CCISS_GETPCIINFO:
1107 case CCISS_GETINTINFO:
1108 case CCISS_SETINTINFO:
1109 case CCISS_GETNODENAME:
1110 case CCISS_SETNODENAME:
1111 case CCISS_GETHEARTBEAT:
1112 case CCISS_GETBUSTYPES:
1113 case CCISS_GETFIRMVER:
1114 case CCISS_GETDRIVVER:
1115 case CCISS_REVALIDVOLS:
1116 case CCISS_DEREGDISK:
1117 case CCISS_REGNEWDISK:
1118 case CCISS_REGNEWD:
1119 case CCISS_RESCANDISK:
1120 case CCISS_GETLUNINFO:
ef7822c2 1121 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1122
1123 case CCISS_PASSTHRU32:
ef7822c2 1124 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1125 case CCISS_BIG_PASSTHRU32:
ef7822c2 1126 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1127
1128 default:
1129 return -ENOIOCTLCMD;
1130 }
1131}
1132
ef7822c2
AV		 1133static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1134 unsigned cmd, unsigned long arg)
1da177e4
LT		 1135{
1136 IOCTL32_Command_struct __user *arg32 =
7c832835 1137 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1138 IOCTL_Command_struct arg64;
1139 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1140 int err;
1141 u32 cp;
1142
1143 err = 0;
7c832835
BH		 1144 err |=
1145 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1146 sizeof(arg64.LUN_info));
1147 err |=
1148 copy_from_user(&arg64.Request, &arg32->Request,
1149 sizeof(arg64.Request));
1150 err |=
1151 copy_from_user(&arg64.error_info, &arg32->error_info,
1152 sizeof(arg64.error_info));
1da177e4
LT		 1153 err |= get_user(arg64.buf_size, &arg32->buf_size);
1154 err |= get_user(cp, &arg32->buf);
1155 arg64.buf = compat_ptr(cp);
1156 err |= copy_to_user(p, &arg64, sizeof(arg64));
1157
1158 if (err)
1159 return -EFAULT;
1160
ef7822c2 1161 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1162 if (err)
1163 return err;
7c832835
BH		 1164 err |=
1165 copy_in_user(&arg32->error_info, &p->error_info,
1166 sizeof(arg32->error_info));
1da177e4
LT		 1167 if (err)
1168 return -EFAULT;
1169 return err;
1170}
1171
ef7822c2
AV		 1172static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1173 unsigned cmd, unsigned long arg)
1da177e4
LT		 1174{
1175 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1176 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1177 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1178 BIG_IOCTL_Command_struct __user *p =
1179 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1180 int err;
1181 u32 cp;
1182
1183 err = 0;
7c832835
BH		 1184 err |=
1185 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1186 sizeof(arg64.LUN_info));
1187 err |=
1188 copy_from_user(&arg64.Request, &arg32->Request,
1189 sizeof(arg64.Request));
1190 err |=
1191 copy_from_user(&arg64.error_info, &arg32->error_info,
1192 sizeof(arg64.error_info));
1da177e4
LT		 1193 err |= get_user(arg64.buf_size, &arg32->buf_size);
1194 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1195 err |= get_user(cp, &arg32->buf);
1196 arg64.buf = compat_ptr(cp);
1197 err |= copy_to_user(p, &arg64, sizeof(arg64));
1198
1199 if (err)
7c832835 1200 return -EFAULT;
1da177e4 1201
ef7822c2 1202 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1203 if (err)
1204 return err;
7c832835
BH		 1205 err |=
1206 copy_in_user(&arg32->error_info, &p->error_info,
1207 sizeof(arg32->error_info));
1da177e4
LT		 1208 if (err)
1209 return -EFAULT;
1210 return err;
1211}
1212#endif
a885c8c4
CH		 1213
1214static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1215{
1216 drive_info_struct *drv = get_drv(bdev->bd_disk);
1217
1218 if (!drv->cylinders)
1219 return -ENXIO;
1220
1221 geo->heads = drv->heads;
1222 geo->sectors = drv->sectors;
1223 geo->cylinders = drv->cylinders;
1224 return 0;
1225}
1226
f70dba83 1227static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1228{
1229 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1230 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1231 (void)check_for_unit_attention(h, c);
0a9279cc 1232}
0a25a5ae
SC		 1233
1234static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1235{
1236 cciss_pci_info_struct pciinfo;
1237
1238 if (!argp)
1239 return -EINVAL;
1240 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1241 pciinfo.bus = h->pdev->bus->number;
1242 pciinfo.dev_fn = h->pdev->devfn;
1243 pciinfo.board_id = h->board_id;
1244 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1245 return -EFAULT;
1246 return 0;
1247}
1248
576e661c
SC		 1249static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1250{
1251 cciss_coalint_struct intinfo;
1252
1253 if (!argp)
1254 return -EINVAL;
1255 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1256 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1257 if (copy_to_user
1258 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1259 return -EFAULT;
1260 return 0;
1261}
1262
4c800eed
SC		 1263static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1264{
1265 cciss_coalint_struct intinfo;
1266 unsigned long flags;
1267 int i;
1268
1269 if (!argp)
1270 return -EINVAL;
1271 if (!capable(CAP_SYS_ADMIN))
1272 return -EPERM;
1273 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1274 return -EFAULT;
1275 if ((intinfo.delay == 0) && (intinfo.count == 0))
1276 return -EINVAL;
1277 spin_lock_irqsave(&h->lock, flags);
1278 /* Update the field, and then ring the doorbell */
1279 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1280 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1281 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1282
1283 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1284 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1285 break;
1286 udelay(1000); /* delay and try again */
1287 }
1288 spin_unlock_irqrestore(&h->lock, flags);
1289 if (i >= MAX_IOCTL_CONFIG_WAIT)
1290 return -EAGAIN;
1291 return 0;
1292}
1293
25216109
SC		 1294static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1295{
1296 NodeName_type NodeName;
1297 int i;
1298
1299 if (!argp)
1300 return -EINVAL;
1301 for (i = 0; i < 16; i++)
1302 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1303 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1304 return -EFAULT;
1305 return 0;
1306}
1307
4f43f32c
SC		 1308static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1309{
1310 NodeName_type NodeName;
1311 unsigned long flags;
1312 int i;
1313
1314 if (!argp)
1315 return -EINVAL;
1316 if (!capable(CAP_SYS_ADMIN))
1317 return -EPERM;
1318 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1319 return -EFAULT;
1320 spin_lock_irqsave(&h->lock, flags);
1321 /* Update the field, and then ring the doorbell */
1322 for (i = 0; i < 16; i++)
1323 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1324 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1325 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1326 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1327 break;
1328 udelay(1000); /* delay and try again */
1329 }
1330 spin_unlock_irqrestore(&h->lock, flags);
1331 if (i >= MAX_IOCTL_CONFIG_WAIT)
1332 return -EAGAIN;
1333 return 0;
1334}
1335
93c74931
SC		 1336static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1337{
1338 Heartbeat_type heartbeat;
1339
1340 if (!argp)
1341 return -EINVAL;
1342 heartbeat = readl(&h->cfgtable->HeartBeat);
1343 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1344 return -EFAULT;
1345 return 0;
1346}
1347
d18dfad4
SC		 1348static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1349{
1350 BusTypes_type BusTypes;
1351
1352 if (!argp)
1353 return -EINVAL;
1354 BusTypes = readl(&h->cfgtable->BusTypes);
1355 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1356 return -EFAULT;
1357 return 0;
1358}
1359
8a4f7fbf
SC		 1360static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1361{
1362 FirmwareVer_type firmware;
1363
1364 if (!argp)
1365 return -EINVAL;
1366 memcpy(firmware, h->firm_ver, 4);
1367
1368 if (copy_to_user
1369 (argp, firmware, sizeof(FirmwareVer_type)))
1370 return -EFAULT;
1371 return 0;
1372}
1373
c525919d
SC		 1374static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1375{
1376 DriverVer_type DriverVer = DRIVER_VERSION;
1377
1378 if (!argp)
1379 return -EINVAL;
1380 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1381 return -EFAULT;
1382 return 0;
1383}
1384
0894b32c
SC		 1385static int cciss_getluninfo(ctlr_info_t *h,
1386 struct gendisk *disk, void __user *argp)
1387{
1388 LogvolInfo_struct luninfo;
1389 drive_info_struct *drv = get_drv(disk);
1390
1391 if (!argp)
1392 return -EINVAL;
1393 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1394 luninfo.num_opens = drv->usage_count;
1395 luninfo.num_parts = 0;
1396 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1397 return -EFAULT;
1398 return 0;
1399}
1400
f32f125b
SC		 1401static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1402{
1403 IOCTL_Command_struct iocommand;
1404 CommandList_struct *c;
1405 char *buff = NULL;
1406 u64bit temp64;
1407 DECLARE_COMPLETION_ONSTACK(wait);
1408
1409 if (!argp)
1410 return -EINVAL;
1411
1412 if (!capable(CAP_SYS_RAWIO))
1413 return -EPERM;
1414
1415 if (copy_from_user
1416 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1417 return -EFAULT;
1418 if ((iocommand.buf_size < 1) &&
1419 (iocommand.Request.Type.Direction != XFER_NONE)) {
1420 return -EINVAL;
1421 }
1422 if (iocommand.buf_size > 0) {
1423 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1424 if (buff == NULL)
1425 return -EFAULT;
1426 }
1427 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1428 /* Copy the data into the buffer we created */
1429 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1430 kfree(buff);
1431 return -EFAULT;
1432 }
1433 } else {
1434 memset(buff, 0, iocommand.buf_size);
1435 }
1436 c = cmd_special_alloc(h);
1437 if (!c) {
1438 kfree(buff);
1439 return -ENOMEM;
1440 }
1441 /* Fill in the command type */
1442 c->cmd_type = CMD_IOCTL_PEND;
1443 /* Fill in Command Header */
1444 c->Header.ReplyQueue = 0; /* unused in simple mode */
1445 if (iocommand.buf_size > 0) { /* buffer to fill */
1446 c->Header.SGList = 1;
1447 c->Header.SGTotal = 1;
1448 } else { /* no buffers to fill */
1449 c->Header.SGList = 0;
1450 c->Header.SGTotal = 0;
1451 }
1452 c->Header.LUN = iocommand.LUN_info;
1453 /* use the kernel address the cmd block for tag */
1454 c->Header.Tag.lower = c->busaddr;
1455
1456 /* Fill in Request block */
1457 c->Request = iocommand.Request;
1458
1459 /* Fill in the scatter gather information */
1460 if (iocommand.buf_size > 0) {
1461 temp64.val = pci_map_single(h->pdev, buff,
1462 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1463 c->SG[0].Addr.lower = temp64.val32.lower;
1464 c->SG[0].Addr.upper = temp64.val32.upper;
1465 c->SG[0].Len = iocommand.buf_size;
1466 c->SG[0].Ext = 0; /* we are not chaining */
1467 }
1468 c->waiting = &wait;
1469
1470 enqueue_cmd_and_start_io(h, c);
1471 wait_for_completion(&wait);
1472
1473 /* unlock the buffers from DMA */
1474 temp64.val32.lower = c->SG[0].Addr.lower;
1475 temp64.val32.upper = c->SG[0].Addr.upper;
1476 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1477 PCI_DMA_BIDIRECTIONAL);
1478 check_ioctl_unit_attention(h, c);
1479
1480 /* Copy the error information out */
1481 iocommand.error_info = *(c->err_info);
1482 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1483 kfree(buff);
1484 cmd_special_free(h, c);
1485 return -EFAULT;
1486 }
1487
1488 if (iocommand.Request.Type.Direction == XFER_READ) {
1489 /* Copy the data out of the buffer we created */
1490 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1491 kfree(buff);
1492 cmd_special_free(h, c);
1493 return -EFAULT;
1494 }
1495 }
1496 kfree(buff);
1497 cmd_special_free(h, c);
1498 return 0;
1499}
1500
0c9f5ba7
SC		 1501static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1502{
1503 BIG_IOCTL_Command_struct *ioc;
1504 CommandList_struct *c;
1505 unsigned char **buff = NULL;
1506 int *buff_size = NULL;
1507 u64bit temp64;
1508 BYTE sg_used = 0;
1509 int status = 0;
1510 int i;
1511 DECLARE_COMPLETION_ONSTACK(wait);
1512 __u32 left;
1513 __u32 sz;
1514 BYTE __user *data_ptr;
1515
1516 if (!argp)
1517 return -EINVAL;
1518 if (!capable(CAP_SYS_RAWIO))
1519 return -EPERM;
1520 ioc = (BIG_IOCTL_Command_struct *)
1521 kmalloc(sizeof(*ioc), GFP_KERNEL);
1522 if (!ioc) {
1523 status = -ENOMEM;
1524 goto cleanup1;
1525 }
1526 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1527 status = -EFAULT;
1528 goto cleanup1;
1529 }
1530 if ((ioc->buf_size < 1) &&
1531 (ioc->Request.Type.Direction != XFER_NONE)) {
1532 status = -EINVAL;
1533 goto cleanup1;
1534 }
1535 /* Check kmalloc limits using all SGs */
1536 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1537 status = -EINVAL;
1538 goto cleanup1;
1539 }
1540 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1541 status = -EINVAL;
1542 goto cleanup1;
1543 }
1544 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1545 if (!buff) {
1546 status = -ENOMEM;
1547 goto cleanup1;
1548 }
1549 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1550 if (!buff_size) {
1551 status = -ENOMEM;
1552 goto cleanup1;
1553 }
1554 left = ioc->buf_size;
1555 data_ptr = ioc->buf;
1556 while (left) {
1557 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1558 buff_size[sg_used] = sz;
1559 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1560 if (buff[sg_used] == NULL) {
1561 status = -ENOMEM;
1562 goto cleanup1;
1563 }
1564 if (ioc->Request.Type.Direction == XFER_WRITE) {
1565 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1566 status = -EFAULT;
1567 goto cleanup1;
1568 }
1569 } else {
1570 memset(buff[sg_used], 0, sz);
1571 }
1572 left -= sz;
1573 data_ptr += sz;
1574 sg_used++;
1575 }
1576 c = cmd_special_alloc(h);
1577 if (!c) {
1578 status = -ENOMEM;
1579 goto cleanup1;
1580 }
1581 c->cmd_type = CMD_IOCTL_PEND;
1582 c->Header.ReplyQueue = 0;
1583
1584 if (ioc->buf_size > 0) {
1585 c->Header.SGList = sg_used;
1586 c->Header.SGTotal = sg_used;
1587 } else {
1588 c->Header.SGList = 0;
1589 c->Header.SGTotal = 0;
1590 }
1591 c->Header.LUN = ioc->LUN_info;
1592 c->Header.Tag.lower = c->busaddr;
1593
1594 c->Request = ioc->Request;
1595 if (ioc->buf_size > 0) {
1596 for (i = 0; i < sg_used; i++) {
1597 temp64.val =
1598 pci_map_single(h->pdev, buff[i], buff_size[i],
1599 PCI_DMA_BIDIRECTIONAL);
1600 c->SG[i].Addr.lower = temp64.val32.lower;
1601 c->SG[i].Addr.upper = temp64.val32.upper;
1602 c->SG[i].Len = buff_size[i];
1603 c->SG[i].Ext = 0; /* we are not chaining */
1604 }
1605 }
1606 c->waiting = &wait;
1607 enqueue_cmd_and_start_io(h, c);
1608 wait_for_completion(&wait);
1609 /* unlock the buffers from DMA */
1610 for (i = 0; i < sg_used; i++) {
1611 temp64.val32.lower = c->SG[i].Addr.lower;
1612 temp64.val32.upper = c->SG[i].Addr.upper;
1613 pci_unmap_single(h->pdev,
1614 (dma_addr_t) temp64.val, buff_size[i],
1615 PCI_DMA_BIDIRECTIONAL);
1616 }
1617 check_ioctl_unit_attention(h, c);
1618 /* Copy the error information out */
1619 ioc->error_info = *(c->err_info);
1620 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1621 cmd_special_free(h, c);
1622 status = -EFAULT;
1623 goto cleanup1;
1624 }
1625 if (ioc->Request.Type.Direction == XFER_READ) {
1626 /* Copy the data out of the buffer we created */
1627 BYTE __user *ptr = ioc->buf;
1628 for (i = 0; i < sg_used; i++) {
1629 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1630 cmd_special_free(h, c);
1631 status = -EFAULT;
1632 goto cleanup1;
1633 }
1634 ptr += buff_size[i];
1635 }
1636 }
1637 cmd_special_free(h, c);
1638 status = 0;
1639cleanup1:
1640 if (buff) {
1641 for (i = 0; i < sg_used; i++)
1642 kfree(buff[i]);
1643 kfree(buff);
1644 }
1645 kfree(buff_size);
1646 kfree(ioc);
1647 return status;
1648}
1649
ef7822c2 1650static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1651 unsigned int cmd, unsigned long arg)
1da177e4 1652{
1da177e4 1653 struct gendisk *disk = bdev->bd_disk;
f70dba83 1654 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1655 void __user *argp = (void __user *)arg;
1656
b2a4a43d
SC		 1657 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1658 cmd, arg);
7c832835 1659 switch (cmd) {
1da177e4 1660 case CCISS_GETPCIINFO:
0a25a5ae 1661 return cciss_getpciinfo(h, argp);
1da177e4 1662 case CCISS_GETINTINFO:
576e661c 1663 return cciss_getintinfo(h, argp);
1da177e4 1664 case CCISS_SETINTINFO:
4c800eed 1665 return cciss_setintinfo(h, argp);
1da177e4 1666 case CCISS_GETNODENAME:
25216109 1667 return cciss_getnodename(h, argp);
1da177e4 1668 case CCISS_SETNODENAME:
4f43f32c 1669 return cciss_setnodename(h, argp);
1da177e4 1670 case CCISS_GETHEARTBEAT:
93c74931 1671 return cciss_getheartbeat(h, argp);
1da177e4 1672 case CCISS_GETBUSTYPES:
d18dfad4 1673 return cciss_getbustypes(h, argp);
1da177e4 1674 case CCISS_GETFIRMVER:
8a4f7fbf 1675 return cciss_getfirmver(h, argp);
7c832835 1676 case CCISS_GETDRIVVER:
c525919d 1677 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1678 case CCISS_DEREGDISK:
1679 case CCISS_REGNEWD:
1da177e4 1680 case CCISS_REVALIDVOLS:
f70dba83 1681 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1682 case CCISS_GETLUNINFO:
1683 return cciss_getluninfo(h, disk, argp);
1da177e4 1684 case CCISS_PASSTHRU:
f32f125b 1685 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1686 case CCISS_BIG_PASSTHRU:
1687 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1688
1689 /* scsi_cmd_ioctl handles these, below, though some are not */
1690 /* very meaningful for cciss. SG_IO is the main one people want. */
1691
1692 case SG_GET_VERSION_NUM:
1693 case SG_SET_TIMEOUT:
1694 case SG_GET_TIMEOUT:
1695 case SG_GET_RESERVED_SIZE:
1696 case SG_SET_RESERVED_SIZE:
1697 case SG_EMULATED_HOST:
1698 case SG_IO:
1699 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1700 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1701
1702 /* scsi_cmd_ioctl would normally handle these, below, but */
1703 /* they aren't a good fit for cciss, as CD-ROMs are */
1704 /* not supported, and we don't have any bus/target/lun */
1705 /* which we present to the kernel. */
1706
1707 case CDROM_SEND_PACKET:
1708 case CDROMCLOSETRAY:
1709 case CDROMEJECT:
1710 case SCSI_IOCTL_GET_IDLUN:
1711 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1712 default:
1713 return -ENOTTY;
1714 }
1da177e4
LT		 1715}
1716
7b30f092
JA		 1717static void cciss_check_queues(ctlr_info_t *h)
1718{
1719 int start_queue = h->next_to_run;
1720 int i;
1721
1722 /* check to see if we have maxed out the number of commands that can
1723 * be placed on the queue. If so then exit. We do this check here
1724 * in case the interrupt we serviced was from an ioctl and did not
1725 * free any new commands.
1726 */
f880632f 1727 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1728 return;
1729
1730 /* We have room on the queue for more commands. Now we need to queue
1731 * them up. We will also keep track of the next queue to run so
1732 * that every queue gets a chance to be started first.
1733 */
1734 for (i = 0; i < h->highest_lun + 1; i++) {
1735 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1736 /* make sure the disk has been added and the drive is real
1737 * because this can be called from the middle of init_one.
1738 */
9cef0d2f
SC		 1739 if (!h->drv[curr_queue])
1740 continue;
1741 if (!(h->drv[curr_queue]->queue) ||
1742 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1743 continue;
1744 blk_start_queue(h->gendisk[curr_queue]->queue);
1745
1746 /* check to see if we have maxed out the number of commands
1747 * that can be placed on the queue.
1748 */
f880632f 1749 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1750 if (curr_queue == start_queue) {
1751 h->next_to_run =
1752 (start_queue + 1) % (h->highest_lun + 1);
1753 break;
1754 } else {
1755 h->next_to_run = curr_queue;
1756 break;
1757 }
7b30f092
JA		 1758 }
1759 }
1760}
1761
ca1e0484
MM		 1762static void cciss_softirq_done(struct request *rq)
1763{
f70dba83
SC		 1764 CommandList_struct *c = rq->completion_data;
1765 ctlr_info_t *h = hba[c->ctlr];
1766 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1767 u64bit temp64;
664a717d 1768 unsigned long flags;
ca1e0484 1769 int i, ddir;
5c07a311 1770 int sg_index = 0;
ca1e0484 1771
f70dba83 1772 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1773 ddir = PCI_DMA_FROMDEVICE;
1774 else
1775 ddir = PCI_DMA_TODEVICE;
1776
1777 /* command did not need to be retried */
1778 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1779 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1780 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1781 cciss_unmap_sg_chain_block(h, c);
5c07a311 1782 /* Point to the next block */
f70dba83 1783 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1784 sg_index = 0;
1785 }
1786 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1787 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1788 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1789 ddir);
1790 ++sg_index;
ca1e0484
MM		 1791 }
1792
b2a4a43d 1793 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1794
c3a4d78c 1795 /* set the residual count for pc requests */
33659ebb 1796 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1797 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1798
c3a4d78c 1799 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1800
ca1e0484 1801 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1802 cmd_free(h, c);
7b30f092 1803 cciss_check_queues(h);
ca1e0484
MM		 1804 spin_unlock_irqrestore(&h->lock, flags);
1805}
1806
39ccf9a6
SC		 1807static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1808 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1809{
9cef0d2f
SC		 1810 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1811 sizeof(h->drv[log_unit]->LunID));
b57695fe 1812}
1813
7fe06326
AP		 1814/* This function gets the SCSI vendor, model, and revision of a logical drive
1815 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1816 * they cannot be read.
1817 */
f70dba83 1818static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1819 char *vendor, char *model, char *rev)
1820{
1821 int rc;
1822 InquiryData_struct *inq_buf;
b57695fe 1823 unsigned char scsi3addr[8];
7fe06326
AP		 1824
1825 *vendor = '\0';
1826 *model = '\0';
1827 *rev = '\0';
1828
1829 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1830 if (!inq_buf)
1831 return;
1832
f70dba83
SC		 1833 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1834 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1835 scsi3addr, TYPE_CMD);
7fe06326
AP		 1836 if (rc == IO_OK) {
1837 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1838 vendor[VENDOR_LEN] = '\0';
1839 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1840 model[MODEL_LEN] = '\0';
1841 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1842 rev[REV_LEN] = '\0';
1843 }
1844
1845 kfree(inq_buf);
1846 return;
1847}
1848
a72da29b
MM		 1849/* This function gets the serial number of a logical drive via
1850 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1851 * number cannot be had, for whatever reason, 16 bytes of 0xff
1852 * are returned instead.
1853 */
f70dba83 1854static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1855 unsigned char *serial_no, int buflen)
1856{
1857#define PAGE_83_INQ_BYTES 64
1858 int rc;
1859 unsigned char *buf;
b57695fe 1860 unsigned char scsi3addr[8];
a72da29b
MM		 1861
1862 if (buflen > 16)
1863 buflen = 16;
1864 memset(serial_no, 0xff, buflen);
1865 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1866 if (!buf)
1867 return;
1868 memset(serial_no, 0, buflen);
f70dba83
SC		 1869 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1870 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1871 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1872 if (rc == IO_OK)
1873 memcpy(serial_no, &buf[8], buflen);
1874 kfree(buf);
1875 return;
1876}
1877
617e1344
SC		 1878/*
1879 * cciss_add_disk sets up the block device queue for a logical drive
1880 */
1881static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1882 int drv_index)
1883{
1884 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1885 if (!disk->queue)
1886 goto init_queue_failure;
6ae5ce8e
MM		 1887 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1888 disk->major = h->major;
1889 disk->first_minor = drv_index << NWD_SHIFT;
1890 disk->fops = &cciss_fops;
9cef0d2f
SC		 1891 if (cciss_create_ld_sysfs_entry(h, drv_index))
1892 goto cleanup_queue;
1893 disk->private_data = h->drv[drv_index];
1894 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1895
1896 /* Set up queue information */
1897 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1898
1899 /* This is a hardware imposed limit. */
8a78362c 1900 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1901
086fa5ff 1902 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1903
1904 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1905
1906 disk->queue->queuedata = h;
1907
e1defc4f 1908 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1909 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1910
1911 /* Make sure all queue data is written out before */
9cef0d2f 1912 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1913 /* allows the interrupt handler to start the queue */
1914 wmb();
9cef0d2f 1915 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1916 add_disk(disk);
617e1344
SC		 1917 return 0;
1918
1919cleanup_queue:
1920 blk_cleanup_queue(disk->queue);
1921 disk->queue = NULL;
e8074f79 1922init_queue_failure:
617e1344 1923 return -1;
6ae5ce8e
MM		 1924}
1925
ddd47442 1926/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1927 * If the usage_count is zero and it is a heretofore unknown drive, or,
1928 * the drive's capacity, geometry, or serial number has changed,
1929 * then the drive information will be updated and the disk will be
1930 * re-registered with the kernel. If these conditions don't hold,
1931 * then it will be left alone for the next reboot. The exception to this
1932 * is disk 0 which will always be left registered with the kernel since it
1933 * is also the controller node. Any changes to disk 0 will show up on
1934 * the next reboot.
7c832835 1935 */
f70dba83
SC		 1936static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1937 int first_time, int via_ioctl)
7c832835 1938{
ddd47442 1939 struct gendisk *disk;
ddd47442
MM		 1940 InquiryData_struct *inq_buff = NULL;
1941 unsigned int block_size;
00988a35 1942 sector_t total_size;
ddd47442
MM		 1943 unsigned long flags = 0;
1944 int ret = 0;
a72da29b
MM		 1945 drive_info_struct *drvinfo;
1946
1947 /* Get information about the disk and modify the driver structure */
1948 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1949 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1950 if (inq_buff == NULL || drvinfo == NULL)
1951 goto mem_msg;
1952
1953 /* testing to see if 16-byte CDBs are already being used */
1954 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1955 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1956 &total_size, &block_size);
1957
1958 } else {
f70dba83 1959 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1960 /* if read_capacity returns all F's this volume is >2TB */
1961 /* in size so we switch to 16-byte CDB's for all */
1962 /* read/write ops */
1963 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1964 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1965 &total_size, &block_size);
1966 h->cciss_read = CCISS_READ_16;
1967 h->cciss_write = CCISS_WRITE_16;
1968 } else {
1969 h->cciss_read = CCISS_READ_10;
1970 h->cciss_write = CCISS_WRITE_10;
1971 }
1972 }
1973
f70dba83 1974 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 1975 inq_buff, drvinfo);
1976 drvinfo->block_size = block_size;
1977 drvinfo->nr_blocks = total_size + 1;
1978
f70dba83 1979 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1980 drvinfo->model, drvinfo->rev);
f70dba83 1981 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1982 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 1983 /* Save the lunid in case we deregister the disk, below. */
1984 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1985 sizeof(drvinfo->LunID));
a72da29b
MM		 1986
1987 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 1988 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 1989 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 1990 h->drv[drv_index]->serial_no, 16) == 0) &&
1991 drvinfo->block_size == h->drv[drv_index]->block_size &&
1992 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1993 drvinfo->heads == h->drv[drv_index]->heads &&
1994 drvinfo->sectors == h->drv[drv_index]->sectors &&
1995 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 1996 /* The disk is unchanged, nothing to update */
1997 goto freeret;
a72da29b 1998
6ae5ce8e
MM		 1999 /* If we get here it's not the same disk, or something's changed,
2000 * so we need to * deregister it, and re-register it, if it's not
2001 * in use.
2002 * If the disk already exists then deregister it before proceeding
2003 * (unless it's the first disk (for the controller node).
2004 */
9cef0d2f 2005 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2006 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2007 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2008 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2009 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2010
9cef0d2f 2011 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2012 * which keeps the interrupt handler from starting
2013 * the queue.
2014 */
2d11d993 2015 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2016 }
2017
2018 /* If the disk is in use return */
2019 if (ret)
a72da29b
MM		 2020 goto freeret;
2021
6ae5ce8e 2022 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2023 * and serial number inquiry. If the disk was deregistered
2024 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2025 */
9cef0d2f
SC		 2026 if (h->drv[drv_index] == NULL) {
2027 drvinfo->device_initialized = 0;
2028 h->drv[drv_index] = drvinfo;
2029 drvinfo = NULL; /* so it won't be freed below. */
2030 } else {
2031 /* special case for cxd0 */
2032 h->drv[drv_index]->block_size = drvinfo->block_size;
2033 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2034 h->drv[drv_index]->heads = drvinfo->heads;
2035 h->drv[drv_index]->sectors = drvinfo->sectors;
2036 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2037 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2038 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2039 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2040 VENDOR_LEN + 1);
2041 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2042 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2043 }
ddd47442
MM		 2044
2045 ++h->num_luns;
2046 disk = h->gendisk[drv_index];
9cef0d2f 2047 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2048
6ae5ce8e
MM		 2049 /* If it's not disk 0 (drv_index != 0)
2050 * or if it was disk 0, but there was previously
2051 * no actual corresponding configured logical drive
2052 * (raid_leve == -1) then we want to update the
2053 * logical drive's information.
2054 */
361e9b07
SC		 2055 if (drv_index || first_time) {
2056 if (cciss_add_disk(h, disk, drv_index) != 0) {
2057 cciss_free_gendisk(h, drv_index);
9cef0d2f 2058 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2059 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2060 drv_index);
361e9b07
SC		 2061 --h->num_luns;
2062 }
2063 }
ddd47442 2064
6ae5ce8e 2065freeret:
ddd47442 2066 kfree(inq_buff);
a72da29b 2067 kfree(drvinfo);
ddd47442 2068 return;
6ae5ce8e 2069mem_msg:
b2a4a43d 2070 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2071 goto freeret;
2072}
2073
2074/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2075 * that has a null drv pointer and allocate the drive info struct and
2076 * will return that index This is where new drives will be added.
2077 * If the index to be returned is greater than the highest_lun index for
2078 * the controller then highest_lun is set * to this new index.
2079 * If there are no available indexes or if tha allocation fails, then -1
2080 * is returned. * "controller_node" is used to know if this is a real
2081 * logical drive, or just the controller node, which determines if this
2082 * counts towards highest_lun.
7c832835 2083 */
9cef0d2f 2084static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2085{
2086 int i;
9cef0d2f 2087 drive_info_struct *drv;
ddd47442 2088
9cef0d2f 2089 /* Search for an empty slot for our drive info */
7c832835 2090 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2091
2092 /* if not cxd0 case, and it's occupied, skip it. */
2093 if (h->drv[i] && i != 0)
2094 continue;
2095 /*
2096 * If it's cxd0 case, and drv is alloc'ed already, and a
2097 * disk is configured there, skip it.
2098 */
2099 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2100 continue;
2101
2102 /*
2103 * We've found an empty slot. Update highest_lun
2104 * provided this isn't just the fake cxd0 controller node.
2105 */
2106 if (i > h->highest_lun && !controller_node)
2107 h->highest_lun = i;
2108
2109 /* If adding a real disk at cxd0, and it's already alloc'ed */
2110 if (i == 0 && h->drv[i] != NULL)
ddd47442 2111 return i;
9cef0d2f
SC		 2112
2113 /*
2114 * Found an empty slot, not already alloc'ed. Allocate it.
2115 * Mark it with raid_level == -1, so we know it's new later on.
2116 */
2117 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2118 if (!drv)
2119 return -1;
2120 drv->raid_level = -1; /* so we know it's new */
2121 h->drv[i] = drv;
2122 return i;
ddd47442
MM		 2123 }
2124 return -1;
2125}
2126
9cef0d2f
SC		 2127static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2128{
2129 kfree(h->drv[drv_index]);
2130 h->drv[drv_index] = NULL;
2131}
2132
361e9b07
SC		 2133static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2134{
2135 put_disk(h->gendisk[drv_index]);
2136 h->gendisk[drv_index] = NULL;
2137}
2138
6ae5ce8e
MM		 2139/* cciss_add_gendisk finds a free hba[]->drv structure
2140 * and allocates a gendisk if needed, and sets the lunid
2141 * in the drvinfo structure. It returns the index into
2142 * the ->drv[] array, or -1 if none are free.
2143 * is_controller_node indicates whether highest_lun should
2144 * count this disk, or if it's only being added to provide
2145 * a means to talk to the controller in case no logical
2146 * drives have yet been configured.
2147 */
39ccf9a6
SC		 2148static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2149 int controller_node)
6ae5ce8e
MM		 2150{
2151 int drv_index;
2152
9cef0d2f 2153 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2154 if (drv_index == -1)
2155 return -1;
8ce51966 2156
6ae5ce8e
MM		 2157 /*Check if the gendisk needs to be allocated */
2158 if (!h->gendisk[drv_index]) {
2159 h->gendisk[drv_index] =
2160 alloc_disk(1 << NWD_SHIFT);
2161 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2162 dev_err(&h->pdev->dev,
2163 "could not allocate a new disk %d\n",
2164 drv_index);
9cef0d2f 2165 goto err_free_drive_info;
6ae5ce8e
MM		 2166 }
2167 }
9cef0d2f
SC		 2168 memcpy(h->drv[drv_index]->LunID, lunid,
2169 sizeof(h->drv[drv_index]->LunID));
2170 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2171 goto err_free_disk;
6ae5ce8e
MM		 2172 /* Don't need to mark this busy because nobody */
2173 /* else knows about this disk yet to contend */
2174 /* for access to it. */
9cef0d2f 2175 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2176 wmb();
2177 return drv_index;
7fe06326
AP		 2178
2179err_free_disk:
361e9b07 2180 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2181err_free_drive_info:
2182 cciss_free_drive_info(h, drv_index);
7fe06326 2183 return -1;
6ae5ce8e
MM		 2184}
2185
2186/* This is for the special case of a controller which
2187 * has no logical drives. In this case, we still need
2188 * to register a disk so the controller can be accessed
2189 * by the Array Config Utility.
2190 */
2191static void cciss_add_controller_node(ctlr_info_t *h)
2192{
2193 struct gendisk *disk;
2194 int drv_index;
2195
2196 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2197 return;
2198
39ccf9a6 2199 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2200 if (drv_index == -1)
2201 goto error;
9cef0d2f
SC		 2202 h->drv[drv_index]->block_size = 512;
2203 h->drv[drv_index]->nr_blocks = 0;
2204 h->drv[drv_index]->heads = 0;
2205 h->drv[drv_index]->sectors = 0;
2206 h->drv[drv_index]->cylinders = 0;
2207 h->drv[drv_index]->raid_level = -1;
2208 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2209 disk = h->gendisk[drv_index];
361e9b07
SC		 2210 if (cciss_add_disk(h, disk, drv_index) == 0)
2211 return;
2212 cciss_free_gendisk(h, drv_index);
9cef0d2f 2213 cciss_free_drive_info(h, drv_index);
361e9b07 2214error:
b2a4a43d 2215 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2216 return;
6ae5ce8e
MM		 2217}
2218
ddd47442 2219/* This function will add and remove logical drives from the Logical
d14c4ab5 2220 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2221 * so that mount points are preserved until the next reboot. This allows
2222 * for the removal of logical drives in the middle of the drive array
2223 * without a re-ordering of those drives.
2224 * INPUT
2225 * h = The controller to perform the operations on
7c832835 2226 */
2d11d993
SC		 2227static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2228 int via_ioctl)
1da177e4 2229{
ddd47442
MM		 2230 int num_luns;
2231 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2232 int return_code;
2233 int listlength = 0;
2234 int i;
2235 int drv_found;
2236 int drv_index = 0;
39ccf9a6 2237 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2238 unsigned long flags;
ddd47442 2239
6ae5ce8e
MM		 2240 if (!capable(CAP_SYS_RAWIO))
2241 return -EPERM;
2242
ddd47442 2243 /* Set busy_configuring flag for this operation */
f70dba83 2244 spin_lock_irqsave(&h->lock, flags);
7c832835 2245 if (h->busy_configuring) {
f70dba83 2246 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2247 return -EBUSY;
2248 }
2249 h->busy_configuring = 1;
f70dba83 2250 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2251
a72da29b
MM		 2252 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2253 if (ld_buff == NULL)
2254 goto mem_msg;
2255
f70dba83 2256 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2257 sizeof(ReportLunData_struct),
2258 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2259
a72da29b
MM		 2260 if (return_code == IO_OK)
2261 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2262 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2263 dev_warn(&h->pdev->dev,
2264 "report logical volume command failed\n");
a72da29b
MM		 2265 listlength = 0;
2266 goto freeret;
2267 }
2268
2269 num_luns = listlength / 8; /* 8 bytes per entry */
2270 if (num_luns > CISS_MAX_LUN) {
2271 num_luns = CISS_MAX_LUN;
b2a4a43d 2272 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2273 " on controller than can be handled by"
2274 " this driver.\n");
2275 }
2276
6ae5ce8e
MM		 2277 if (num_luns == 0)
2278 cciss_add_controller_node(h);
2279
2280 /* Compare controller drive array to driver's drive array
2281 * to see if any drives are missing on the controller due
2282 * to action of Array Config Utility (user deletes drive)
2283 * and deregister logical drives which have disappeared.
2284 */
a72da29b
MM		 2285 for (i = 0; i <= h->highest_lun; i++) {
2286 int j;
2287 drv_found = 0;
d8a0be6a
SC		 2288
2289 /* skip holes in the array from already deleted drives */
9cef0d2f 2290 if (h->drv[i] == NULL)
d8a0be6a
SC		 2291 continue;
2292
a72da29b 2293 for (j = 0; j < num_luns; j++) {
39ccf9a6 2294 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2295 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2296 sizeof(lunid)) == 0) {
a72da29b
MM		 2297 drv_found = 1;
2298 break;
2299 }
2300 }
2301 if (!drv_found) {
2302 /* Deregister it from the OS, it's gone. */
f70dba83 2303 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2304 h->drv[i]->busy_configuring = 1;
f70dba83 2305 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2306 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2307 if (h->drv[i] != NULL)
2308 h->drv[i]->busy_configuring = 0;
ddd47442 2309 }
a72da29b 2310 }
ddd47442 2311
a72da29b
MM		 2312 /* Compare controller drive array to driver's drive array.
2313 * Check for updates in the drive information and any new drives
2314 * on the controller due to ACU adding logical drives, or changing
2315 * a logical drive's size, etc. Reregister any new/changed drives
2316 */
2317 for (i = 0; i < num_luns; i++) {
2318 int j;
ddd47442 2319
a72da29b 2320 drv_found = 0;
ddd47442 2321
39ccf9a6 2322 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2323 /* Find if the LUN is already in the drive array
2324 * of the driver. If so then update its info
2325 * if not in use. If it does not exist then find
2326 * the first free index and add it.
2327 */
2328 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2329 if (h->drv[j] != NULL &&
2330 memcmp(h->drv[j]->LunID, lunid,
2331 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2332 drv_index = j;
2333 drv_found = 1;
2334 break;
ddd47442 2335 }
a72da29b 2336 }
ddd47442 2337
a72da29b
MM		 2338 /* check if the drive was found already in the array */
2339 if (!drv_found) {
eece695f 2340 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2341 if (drv_index == -1)
2342 goto freeret;
a72da29b 2343 }
f70dba83 2344 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2345 } /* end for */
ddd47442 2346
6ae5ce8e 2347freeret:
ddd47442
MM		 2348 kfree(ld_buff);
2349 h->busy_configuring = 0;
2350 /* We return -1 here to tell the ACU that we have registered/updated
2351 * all of the drives that we can and to keep it from calling us
2352 * additional times.
7c832835 2353 */
ddd47442 2354 return -1;
6ae5ce8e 2355mem_msg:
b2a4a43d 2356 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2357 h->busy_configuring = 0;
ddd47442
MM		 2358 goto freeret;
2359}
2360
9ddb27b4
SC		 2361static void cciss_clear_drive_info(drive_info_struct *drive_info)
2362{
2363 /* zero out the disk size info */
2364 drive_info->nr_blocks = 0;
2365 drive_info->block_size = 0;
2366 drive_info->heads = 0;
2367 drive_info->sectors = 0;
2368 drive_info->cylinders = 0;
2369 drive_info->raid_level = -1;
2370 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2371 memset(drive_info->model, 0, sizeof(drive_info->model));
2372 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2373 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2374 /*
2375 * don't clear the LUNID though, we need to remember which
2376 * one this one is.
2377 */
2378}
2379
ddd47442
MM		 2380/* This function will deregister the disk and it's queue from the
2381 * kernel. It must be called with the controller lock held and the
2382 * drv structures busy_configuring flag set. It's parameters are:
2383 *
2384 * disk = This is the disk to be deregistered
2385 * drv = This is the drive_info_struct associated with the disk to be
2386 * deregistered. It contains information about the disk used
2387 * by the driver.
2388 * clear_all = This flag determines whether or not the disk information
2389 * is going to be completely cleared out and the highest_lun
2390 * reset. Sometimes we want to clear out information about
d14c4ab5 2391 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2392 * the highest_lun should be left unchanged and the LunID
2393 * should not be cleared.
2d11d993
SC		 2394 * via_ioctl
2395 * This indicates whether we've reached this path via ioctl.
2396 * This affects the maximum usage count allowed for c0d0 to be messed with.
2397 * If this path is reached via ioctl(), then the max_usage_count will
2398 * be 1, as the process calling ioctl() has got to have the device open.
2399 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2400*/
a0ea8622 2401static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2402 int clear_all, int via_ioctl)
ddd47442 2403{
799202cb 2404 int i;
a0ea8622
SC		 2405 struct gendisk *disk;
2406 drive_info_struct *drv;
9cef0d2f 2407 int recalculate_highest_lun;
1da177e4
LT		 2408
2409 if (!capable(CAP_SYS_RAWIO))
2410 return -EPERM;
2411
9cef0d2f 2412 drv = h->drv[drv_index];
a0ea8622
SC		 2413 disk = h->gendisk[drv_index];
2414
1da177e4 2415 /* make sure logical volume is NOT is use */
7c832835 2416 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2417 if (drv->usage_count > via_ioctl)
7c832835
BH		 2418 return -EBUSY;
2419 } else if (drv->usage_count > 0)
2420 return -EBUSY;
1da177e4 2421
9cef0d2f
SC		 2422 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2423
ddd47442
MM		 2424 /* invalidate the devices and deregister the disk. If it is disk
2425 * zero do not deregister it but just zero out it's values. This
2426 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2427 */
2428 if (h->gendisk[0] != disk) {
5a9df732 2429 struct request_queue *q = disk->queue;
097d0264 2430 if (disk->flags & GENHD_FL_UP) {
8ce51966 2431 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2432 del_gendisk(disk);
5a9df732 2433 }
9cef0d2f 2434 if (q)
5a9df732 2435 blk_cleanup_queue(q);
5a9df732
AB		 2436 /* If clear_all is set then we are deleting the logical
2437 * drive, not just refreshing its info. For drives
2438 * other than disk 0 we will call put_disk. We do not
2439 * do this for disk 0 as we need it to be able to
2440 * configure the controller.
a72da29b 2441 */
5a9df732
AB		 2442 if (clear_all){
2443 /* This isn't pretty, but we need to find the
2444 * disk in our array and NULL our the pointer.
2445 * This is so that we will call alloc_disk if
2446 * this index is used again later.
a72da29b 2447 */
5a9df732 2448 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2449 if (h->gendisk[i] == disk) {
5a9df732
AB		 2450 h->gendisk[i] = NULL;
2451 break;
799202cb 2452 }
799202cb 2453 }
5a9df732 2454 put_disk(disk);
ddd47442 2455 }
799202cb
MM		 2456 } else {
2457 set_capacity(disk, 0);
9cef0d2f 2458 cciss_clear_drive_info(drv);
ddd47442
MM		 2459 }
2460
2461 --h->num_luns;
ddd47442 2462
9cef0d2f
SC		 2463 /* if it was the last disk, find the new hightest lun */
2464 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2465 int newhighest = -1;
9cef0d2f
SC		 2466 for (i = 0; i <= h->highest_lun; i++) {
2467 /* if the disk has size > 0, it is available */
2468 if (h->drv[i] && h->drv[i]->heads)
2469 newhighest = i;
1da177e4 2470 }
9cef0d2f 2471 h->highest_lun = newhighest;
ddd47442 2472 }
e2019b58 2473 return 0;
1da177e4 2474}
ddd47442 2475
f70dba83 2476static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2477 size_t size, __u8 page_code, unsigned char *scsi3addr,
2478 int cmd_type)
1da177e4 2479{
1da177e4
LT		 2480 u64bit buff_dma_handle;
2481 int status = IO_OK;
2482
2483 c->cmd_type = CMD_IOCTL_PEND;
2484 c->Header.ReplyQueue = 0;
7c832835 2485 if (buff != NULL) {
1da177e4 2486 c->Header.SGList = 1;
7c832835 2487 c->Header.SGTotal = 1;
1da177e4
LT		 2488 } else {
2489 c->Header.SGList = 0;
7c832835 2490 c->Header.SGTotal = 0;
1da177e4
LT		 2491 }
2492 c->Header.Tag.lower = c->busaddr;
b57695fe 2493 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2494
2495 c->Request.Type.Type = cmd_type;
2496 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2497 switch (cmd) {
2498 case CISS_INQUIRY:
1da177e4 2499 /* are we trying to read a vital product page */
7c832835 2500 if (page_code != 0) {
1da177e4
LT		 2501 c->Request.CDB[1] = 0x01;
2502 c->Request.CDB[2] = page_code;
2503 }
2504 c->Request.CDBLen = 6;
7c832835 2505 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2506 c->Request.Type.Direction = XFER_READ;
2507 c->Request.Timeout = 0;
7c832835
BH		 2508 c->Request.CDB[0] = CISS_INQUIRY;
2509 c->Request.CDB[4] = size & 0xFF;
2510 break;
1da177e4
LT		 2511 case CISS_REPORT_LOG:
2512 case CISS_REPORT_PHYS:
7c832835 2513 /* Talking to controller so It's a physical command
1da177e4 2514 mode = 00 target = 0. Nothing to write.
7c832835 2515 */
1da177e4
LT		 2516 c->Request.CDBLen = 12;
2517 c->Request.Type.Attribute = ATTR_SIMPLE;
2518 c->Request.Type.Direction = XFER_READ;
2519 c->Request.Timeout = 0;
2520 c->Request.CDB[0] = cmd;
b028461d 2521 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2522 c->Request.CDB[7] = (size >> 16) & 0xFF;
2523 c->Request.CDB[8] = (size >> 8) & 0xFF;
2524 c->Request.CDB[9] = size & 0xFF;
2525 break;
2526
2527 case CCISS_READ_CAPACITY:
1da177e4
LT		 2528 c->Request.CDBLen = 10;
2529 c->Request.Type.Attribute = ATTR_SIMPLE;
2530 c->Request.Type.Direction = XFER_READ;
2531 c->Request.Timeout = 0;
2532 c->Request.CDB[0] = cmd;
7c832835 2533 break;
00988a35 2534 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2535 c->Request.CDBLen = 16;
2536 c->Request.Type.Attribute = ATTR_SIMPLE;
2537 c->Request.Type.Direction = XFER_READ;
2538 c->Request.Timeout = 0;
2539 c->Request.CDB[0] = cmd;
2540 c->Request.CDB[1] = 0x10;
2541 c->Request.CDB[10] = (size >> 24) & 0xFF;
2542 c->Request.CDB[11] = (size >> 16) & 0xFF;
2543 c->Request.CDB[12] = (size >> 8) & 0xFF;
2544 c->Request.CDB[13] = size & 0xFF;
2545 c->Request.Timeout = 0;
2546 c->Request.CDB[0] = cmd;
2547 break;
1da177e4
LT		 2548 case CCISS_CACHE_FLUSH:
2549 c->Request.CDBLen = 12;
2550 c->Request.Type.Attribute = ATTR_SIMPLE;
2551 c->Request.Type.Direction = XFER_WRITE;
2552 c->Request.Timeout = 0;
2553 c->Request.CDB[0] = BMIC_WRITE;
2554 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2555 break;
88f627ae 2556 case TEST_UNIT_READY:
88f627ae
SC		 2557 c->Request.CDBLen = 6;
2558 c->Request.Type.Attribute = ATTR_SIMPLE;
2559 c->Request.Type.Direction = XFER_NONE;
2560 c->Request.Timeout = 0;
2561 break;
1da177e4 2562 default:
b2a4a43d 2563 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2564 return IO_ERROR;
1da177e4
LT		 2565 }
2566 } else if (cmd_type == TYPE_MSG) {
2567 switch (cmd) {
7c832835 2568 case 0: /* ABORT message */
3da8b713 2569 c->Request.CDBLen = 12;
2570 c->Request.Type.Attribute = ATTR_SIMPLE;
2571 c->Request.Type.Direction = XFER_WRITE;
2572 c->Request.Timeout = 0;
7c832835
BH		 2573 c->Request.CDB[0] = cmd; /* abort */
2574 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2575 /* buff contains the tag of the command to abort */
2576 memcpy(&c->Request.CDB[4], buff, 8);
2577 break;
7c832835 2578 case 1: /* RESET message */
88f627ae 2579 c->Request.CDBLen = 16;
3da8b713 2580 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2581 c->Request.Type.Direction = XFER_NONE;
3da8b713 2582 c->Request.Timeout = 0;
2583 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2584 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2585 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2586 break;
1da177e4
LT		 2587 case 3: /* No-Op message */
2588 c->Request.CDBLen = 1;
2589 c->Request.Type.Attribute = ATTR_SIMPLE;
2590 c->Request.Type.Direction = XFER_WRITE;
2591 c->Request.Timeout = 0;
2592 c->Request.CDB[0] = cmd;
2593 break;
2594 default:
b2a4a43d
SC		 2595 dev_warn(&h->pdev->dev,
2596 "unknown message type %d\n", cmd);
1da177e4
LT		 2597 return IO_ERROR;
2598 }
2599 } else {
b2a4a43d 2600 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2601 return IO_ERROR;
2602 }
2603 /* Fill in the scatter gather information */
2604 if (size > 0) {
2605 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2606 buff, size,
2607 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2608 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2609 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2610 c->SG[0].Len = size;
7c832835 2611 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2612 }
2613 return status;
2614}
7c832835 2615
3c2ab402 2616static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2617{
2618 switch (c->err_info->ScsiStatus) {
2619 case SAM_STAT_GOOD:
2620 return IO_OK;
2621 case SAM_STAT_CHECK_CONDITION:
2622 switch (0xf & c->err_info->SenseInfo[2]) {
2623 case 0: return IO_OK; /* no sense */
2624 case 1: return IO_OK; /* recovered error */
2625 default:
c08fac65
SC		 2626 if (check_for_unit_attention(h, c))
2627 return IO_NEEDS_RETRY;
b2a4a43d 2628 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2629 "check condition, sense key = 0x%02x\n",
b2a4a43d 2630 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2631 }
2632 break;
2633 default:
b2a4a43d
SC		 2634 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2635 "scsi status = 0x%02x\n",
3c2ab402 2636 c->Request.CDB[0], c->err_info->ScsiStatus);
2637 break;
2638 }
2639 return IO_ERROR;
2640}
2641
789a424a 2642static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2643{
5390cfc3 2644 int return_status = IO_OK;
7c832835 2645
789a424a 2646 if (c->err_info->CommandStatus == CMD_SUCCESS)
2647 return IO_OK;
5390cfc3 2648
2649 switch (c->err_info->CommandStatus) {
2650 case CMD_TARGET_STATUS:
3c2ab402 2651 return_status = check_target_status(h, c);
5390cfc3 2652 break;
2653 case CMD_DATA_UNDERRUN:
2654 case CMD_DATA_OVERRUN:
2655 /* expected for inquiry and report lun commands */
2656 break;
2657 case CMD_INVALID:
b2a4a43d 2658 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2659 "reported invalid\n", c->Request.CDB[0]);
2660 return_status = IO_ERROR;
2661 break;
2662 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2663 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2664 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2665 return_status = IO_ERROR;
2666 break;
2667 case CMD_HARDWARE_ERR:
b2a4a43d 2668 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2669 " hardware error\n", c->Request.CDB[0]);
2670 return_status = IO_ERROR;
2671 break;
2672 case CMD_CONNECTION_LOST:
b2a4a43d 2673 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2674 "connection lost\n", c->Request.CDB[0]);
2675 return_status = IO_ERROR;
2676 break;
2677 case CMD_ABORTED:
b2a4a43d 2678 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2679 "aborted\n", c->Request.CDB[0]);
2680 return_status = IO_ERROR;
2681 break;
2682 case CMD_ABORT_FAILED:
b2a4a43d 2683 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2684 "abort failed\n", c->Request.CDB[0]);
2685 return_status = IO_ERROR;
2686 break;
2687 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2688 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2689 c->Request.CDB[0]);
789a424a 2690 return_status = IO_NEEDS_RETRY;
5390cfc3 2691 break;
2692 default:
b2a4a43d 2693 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2694 "unknown status %x\n", c->Request.CDB[0],
2695 c->err_info->CommandStatus);
2696 return_status = IO_ERROR;
7c832835 2697 }
789a424a 2698 return return_status;
2699}
2700
2701static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2702 int attempt_retry)
2703{
2704 DECLARE_COMPLETION_ONSTACK(wait);
2705 u64bit buff_dma_handle;
789a424a 2706 int return_status = IO_OK;
2707
2708resend_cmd2:
2709 c->waiting = &wait;
664a717d 2710 enqueue_cmd_and_start_io(h, c);
789a424a 2711
2712 wait_for_completion(&wait);
2713
2714 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2715 goto command_done;
2716
2717 return_status = process_sendcmd_error(h, c);
2718
2719 if (return_status == IO_NEEDS_RETRY &&
2720 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2721 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2722 c->Request.CDB[0]);
2723 c->retry_count++;
2724 /* erase the old error information */
2725 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2726 return_status = IO_OK;
2727 INIT_COMPLETION(wait);
2728 goto resend_cmd2;
2729 }
5390cfc3 2730
2731command_done:
1da177e4 2732 /* unlock the buffers from DMA */
bb2a37bf
MM		 2733 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2734 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2735 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2736 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2737 return return_status;
2738}
2739
f70dba83 2740static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2741 __u8 page_code, unsigned char scsi3addr[],
2742 int cmd_type)
5390cfc3 2743{
5390cfc3 2744 CommandList_struct *c;
2745 int return_status;
2746
6b4d96b8 2747 c = cmd_special_alloc(h);
5390cfc3 2748 if (!c)
2749 return -ENOMEM;
f70dba83 2750 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2751 scsi3addr, cmd_type);
5390cfc3 2752 if (return_status == IO_OK)
789a424a 2753 return_status = sendcmd_withirq_core(h, c, 1);
2754
6b4d96b8 2755 cmd_special_free(h, c);
7c832835 2756 return return_status;
1da177e4 2757}
7c832835 2758
f70dba83 2759static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2760 sector_t total_size,
7c832835
BH		 2761 unsigned int block_size,
2762 InquiryData_struct *inq_buff,
2763 drive_info_struct *drv)
1da177e4
LT		 2764{
2765 int return_code;
00988a35 2766 unsigned long t;
b57695fe 2767 unsigned char scsi3addr[8];
00988a35 2768
1da177e4 2769 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2770 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2771 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2772 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2773 if (return_code == IO_OK) {
7c832835 2774 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2775 dev_warn(&h->pdev->dev,
2776 "reading geometry failed, volume "
7c832835 2777 "does not support reading geometry\n");
1da177e4 2778 drv->heads = 255;
b028461d 2779 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2780 drv->cylinders = total_size + 1;
89f97ad1 2781 drv->raid_level = RAID_UNKNOWN;
1da177e4 2782 } else {
1da177e4
LT		 2783 drv->heads = inq_buff->data_byte[6];
2784 drv->sectors = inq_buff->data_byte[7];
2785 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2786 drv->cylinders += inq_buff->data_byte[5];
2787 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2788 }
2789 drv->block_size = block_size;
97c06978 2790 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2791 t = drv->heads * drv->sectors;
2792 if (t > 1) {
97c06978
MMOD		 2793 sector_t real_size = total_size + 1;
2794 unsigned long rem = sector_div(real_size, t);
3f7705ea 2795 if (rem)
97c06978
MMOD		 2796 real_size++;
2797 drv->cylinders = real_size;
1da177e4 2798 }
7c832835 2799 } else { /* Get geometry failed */
b2a4a43d 2800 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2801 }
1da177e4 2802}
7c832835 2803
1da177e4 2804static void
f70dba83 2805cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2806 unsigned int *block_size)
1da177e4 2807{
00988a35 2808 ReadCapdata_struct *buf;
1da177e4 2809 int return_code;
b57695fe 2810 unsigned char scsi3addr[8];
1aebe187
MK		 2811
2812 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2813 if (!buf) {
b2a4a43d 2814 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2815 return;
2816 }
1aebe187 2817
f70dba83
SC		 2818 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2819 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2820 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2821 if (return_code == IO_OK) {
4c1f2b31
AV		 2822 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2823 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2824 } else { /* read capacity command failed */
b2a4a43d 2825 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2826 *total_size = 0;
2827 *block_size = BLOCK_SIZE;
2828 }
00988a35 2829 kfree(buf);
00988a35
MMOD		 2830}
2831
f70dba83 2832static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2833 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2834{
2835 ReadCapdata_struct_16 *buf;
2836 int return_code;
b57695fe 2837 unsigned char scsi3addr[8];
1aebe187
MK		 2838
2839 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2840 if (!buf) {
b2a4a43d 2841 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2842 return;
2843 }
1aebe187 2844
f70dba83
SC		 2845 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2846 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2847 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2848 0, scsi3addr, TYPE_CMD);
00988a35 2849 if (return_code == IO_OK) {
4c1f2b31
AV		 2850 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2851 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2852 } else { /* read capacity command failed */
b2a4a43d 2853 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2854 *total_size = 0;
2855 *block_size = BLOCK_SIZE;
2856 }
b2a4a43d 2857 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2858 (unsigned long long)*total_size+1, *block_size);
00988a35 2859 kfree(buf);
1da177e4
LT		 2860}
2861
1da177e4
LT		 2862static int cciss_revalidate(struct gendisk *disk)
2863{
2864 ctlr_info_t *h = get_host(disk);
2865 drive_info_struct *drv = get_drv(disk);
2866 int logvol;
7c832835 2867 int FOUND = 0;
1da177e4 2868 unsigned int block_size;
00988a35 2869 sector_t total_size;
1da177e4
LT		 2870 InquiryData_struct *inq_buff = NULL;
2871
7c832835 2872 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
9cef0d2f 2873 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2874 sizeof(drv->LunID)) == 0) {
7c832835 2875 FOUND = 1;
1da177e4
LT		 2876 break;
2877 }
2878 }
2879
7c832835
BH		 2880 if (!FOUND)
2881 return 1;
1da177e4 2882
7c832835
BH		 2883 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2884 if (inq_buff == NULL) {
b2a4a43d 2885 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2886 return 1;
2887 }
00988a35 2888 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2889 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2890 &total_size, &block_size);
2891 } else {
f70dba83 2892 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2893 &total_size, &block_size);
2894 }
f70dba83 2895 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2896 inq_buff, drv);
1da177e4 2897
e1defc4f 2898 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2899 set_capacity(disk, drv->nr_blocks);
2900
1da177e4
LT		 2901 kfree(inq_buff);
2902 return 0;
2903}
2904
1da177e4
LT		 2905/*
2906 * Map (physical) PCI mem into (virtual) kernel space
2907 */
2908static void __iomem *remap_pci_mem(ulong base, ulong size)
2909{
7c832835
BH		 2910 ulong page_base = ((ulong) base) & PAGE_MASK;
2911 ulong page_offs = ((ulong) base) - page_base;
2912 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2913
7c832835 2914 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2915}
2916
7c832835
BH		 2917/*
2918 * Takes jobs of the Q and sends them to the hardware, then puts it on
2919 * the Q to wait for completion.
2920 */
2921static void start_io(ctlr_info_t *h)
1da177e4
LT		 2922{
2923 CommandList_struct *c;
7c832835 2924
8a3173de
JA		 2925 while (!hlist_empty(&h->reqQ)) {
2926 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
1da177e4
LT		 2927 /* can't do anything if fifo is full */
2928 if ((h->access.fifo_full(h))) {
b2a4a43d 2929 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2930 break;
2931 }
2932
7c832835 2933 /* Get the first entry from the Request Q */
8a3173de 2934 removeQ(c);
1da177e4 2935 h->Qdepth--;
7c832835
BH		 2936
2937 /* Tell the controller execute command */
1da177e4 2938 h->access.submit_command(h, c);
7c832835
BH		 2939
2940 /* Put job onto the completed Q */
8a3173de 2941 addQ(&h->cmpQ, c);
1da177e4
LT		 2942 }
2943}
7c832835 2944
f70dba83 2945/* Assumes that h->lock is held. */
1da177e4
LT		 2946/* Zeros out the error record and then resends the command back */
2947/* to the controller */
7c832835 2948static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 2949{
2950 /* erase the old error information */
2951 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2952
2953 /* add it to software queue and then send it to the controller */
8a3173de 2954 addQ(&h->reqQ, c);
1da177e4 2955 h->Qdepth++;
7c832835 2956 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 2957 h->maxQsinceinit = h->Qdepth;
2958
2959 start_io(h);
2960}
a9925a06 2961
1a614f50
SC		 2962static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2963 unsigned int msg_byte, unsigned int host_byte,
2964 unsigned int driver_byte)
2965{
2966 /* inverse of macros in scsi.h */
2967 return (scsi_status_byte & 0xff) |
2968 ((msg_byte & 0xff) << 8) |
2969 ((host_byte & 0xff) << 16) |
2970 ((driver_byte & 0xff) << 24);
2971}
2972
0a9279cc
MM		 2973static inline int evaluate_target_status(ctlr_info_t *h,
2974 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 2975{
2976 unsigned char sense_key;
1a614f50
SC		 2977 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2978 int error_value;
2979
0a9279cc 2980 *retry_cmd = 0;
1a614f50
SC		 2981 /* If we get in here, it means we got "target status", that is, scsi status */
2982 status_byte = cmd->err_info->ScsiStatus;
2983 driver_byte = DRIVER_OK;
2984 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2985
33659ebb 2986 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 2987 host_byte = DID_PASSTHROUGH;
2988 else
2989 host_byte = DID_OK;
2990
2991 error_value = make_status_bytes(status_byte, msg_byte,
2992 host_byte, driver_byte);
03bbfee5 2993
1a614f50 2994 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 2995 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 2996 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 2997 "has SCSI Status 0x%x\n",
2998 cmd, cmd->err_info->ScsiStatus);
1a614f50 2999 return error_value;
03bbfee5
MMOD		 3000 }
3001
3002 /* check the sense key */
3003 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3004 /* no status or recovered error */
33659ebb
CH		 3005 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3006 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3007 error_value = 0;
03bbfee5 3008
0a9279cc 3009 if (check_for_unit_attention(h, cmd)) {
33659ebb 3010 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3011 return 0;
3012 }
3013
33659ebb
CH		 3014 /* Not SG_IO or similar? */
3015 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3016 if (error_value != 0)
b2a4a43d 3017 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3018 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3019 return error_value;
03bbfee5
MMOD		 3020 }
3021
3022 /* SG_IO or similar, copy sense data back */
3023 if (cmd->rq->sense) {
3024 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3025 cmd->rq->sense_len = cmd->err_info->SenseLen;
3026 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3027 cmd->rq->sense_len);
3028 } else
3029 cmd->rq->sense_len = 0;
3030
1a614f50 3031 return error_value;
03bbfee5
MMOD		 3032}
3033
7c832835 3034/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3035 * buffers for the completed job. Note that this function does not need
3036 * to hold the hba/queue lock.
7c832835
BH		 3037 */
3038static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3039 int timeout)
1da177e4 3040{
1da177e4 3041 int retry_cmd = 0;
198b7660
MMOD		 3042 struct request *rq = cmd->rq;
3043
3044 rq->errors = 0;
7c832835 3045
1da177e4 3046 if (timeout)
1a614f50 3047 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3048
d38ae168
MMOD		 3049 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3050 goto after_error_processing;
7c832835 3051
d38ae168 3052 switch (cmd->err_info->CommandStatus) {
d38ae168 3053 case CMD_TARGET_STATUS:
0a9279cc 3054 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3055 break;
3056 case CMD_DATA_UNDERRUN:
33659ebb 3057 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3058 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3059 " completed with data underrun "
3060 "reported\n", cmd);
c3a4d78c 3061 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3062 }
d38ae168
MMOD		 3063 break;
3064 case CMD_DATA_OVERRUN:
33659ebb 3065 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3066 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3067 " completed with data overrun "
3068 "reported\n", cmd);
d38ae168
MMOD		 3069 break;
3070 case CMD_INVALID:
b2a4a43d 3071 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3072 "reported invalid\n", cmd);
1a614f50
SC		 3073 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3074 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3075 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3076 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3077 break;
3078 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3079 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3080 "protocol error\n", cmd);
1a614f50
SC		 3081 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3082 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3083 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3084 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3085 break;
3086 case CMD_HARDWARE_ERR:
b2a4a43d 3087 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3088 " hardware error\n", cmd);
1a614f50
SC		 3089 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3090 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3091 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3092 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3093 break;
3094 case CMD_CONNECTION_LOST:
b2a4a43d 3095 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3096 "connection lost\n", cmd);
1a614f50
SC		 3097 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3098 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3099 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3100 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3101 break;
3102 case CMD_ABORTED:
b2a4a43d 3103 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3104 "aborted\n", cmd);
1a614f50
SC		 3105 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3106 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3107 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3108 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3109 break;
3110 case CMD_ABORT_FAILED:
b2a4a43d 3111 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3112 "abort failed\n", cmd);
1a614f50
SC		 3113 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3114 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3115 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3116 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3117 break;
3118 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3119 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3120 "abort %p\n", h->ctlr, cmd);
3121 if (cmd->retry_count < MAX_CMD_RETRIES) {
3122 retry_cmd = 1;
b2a4a43d 3123 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3124 cmd->retry_count++;
3125 } else
b2a4a43d
SC		 3126 dev_warn(&h->pdev->dev,
3127 "%p retried too many times\n", cmd);
1a614f50
SC		 3128 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3129 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3130 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3131 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3132 break;
3133 case CMD_TIMEOUT:
b2a4a43d 3134 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3135 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3136 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3137 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3138 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3139 break;
3140 default:
b2a4a43d 3141 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3142 "unknown status %x\n", cmd,
3143 cmd->err_info->CommandStatus);
1a614f50
SC		 3144 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3145 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3146 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3147 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3148 }
d38ae168
MMOD		 3149
3150after_error_processing:
3151
1da177e4 3152 /* We need to return this command */
7c832835
BH		 3153 if (retry_cmd) {
3154 resend_cciss_cmd(h, cmd);
1da177e4 3155 return;
7c832835 3156 }
03bbfee5 3157 cmd->rq->completion_data = cmd;
a9925a06 3158 blk_complete_request(cmd->rq);
1da177e4
LT		 3159}
3160
0c2b3908
MM		 3161static inline u32 cciss_tag_contains_index(u32 tag)
3162{
5e216153 3163#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3164 return tag & DIRECT_LOOKUP_BIT;
3165}
3166
3167static inline u32 cciss_tag_to_index(u32 tag)
3168{
5e216153 3169#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3170 return tag >> DIRECT_LOOKUP_SHIFT;
3171}
3172
3173static inline u32 cciss_tag_discard_error_bits(u32 tag)
3174{
3175#define CCISS_ERROR_BITS 0x03
3176 return tag & ~CCISS_ERROR_BITS;
3177}
3178
3179static inline void cciss_mark_tag_indexed(u32 *tag)
3180{
3181 *tag |= DIRECT_LOOKUP_BIT;
3182}
3183
3184static inline void cciss_set_tag_index(u32 *tag, u32 index)
3185{
3186 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3187}
3188
7c832835
BH		 3189/*
3190 * Get a request and submit it to the controller.
1da177e4 3191 */
165125e1 3192static void do_cciss_request(struct request_queue *q)
1da177e4 3193{
7c832835 3194 ctlr_info_t *h = q->queuedata;
1da177e4 3195 CommandList_struct *c;
00988a35
MMOD		 3196 sector_t start_blk;
3197 int seg;
1da177e4
LT		 3198 struct request *creq;
3199 u64bit temp64;
5c07a311
DB		 3200 struct scatterlist *tmp_sg;
3201 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3202 drive_info_struct *drv;
3203 int i, dir;
5c07a311
DB		 3204 int sg_index = 0;
3205 int chained = 0;
1da177e4
LT		 3206
3207 /* We call start_io here in case there is a command waiting on the
3208 * queue that has not been sent.
7c832835 3209 */
1da177e4
LT		 3210 if (blk_queue_plugged(q))
3211 goto startio;
3212
7c832835 3213 queue:
9934c8c0 3214 creq = blk_peek_request(q);
1da177e4
LT		 3215 if (!creq)
3216 goto startio;
3217
5c07a311 3218 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3219
6b4d96b8
SC		 3220 c = cmd_alloc(h);
3221 if (!c)
1da177e4
LT		 3222 goto full;
3223
9934c8c0 3224 blk_start_request(creq);
1da177e4 3225
5c07a311 3226 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3227 spin_unlock_irq(q->queue_lock);
3228
3229 c->cmd_type = CMD_RWREQ;
3230 c->rq = creq;
7c832835
BH		 3231
3232 /* fill in the request */
1da177e4 3233 drv = creq->rq_disk->private_data;
b028461d 3234 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3235 /* got command from pool, so use the command block index instead */
3236 /* for direct lookups. */
3237 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3238 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3239 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3240 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3241 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3242 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3243 c->Request.Type.Attribute = ATTR_SIMPLE;
3244 c->Request.Type.Direction =
a52de245 3245 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3246 c->Request.Timeout = 0; /* Don't time out */
7c832835 3247 c->Request.CDB[0] =
00988a35 3248 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3249 start_blk = blk_rq_pos(creq);
b2a4a43d 3250 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3251 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3252 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3253 seg = blk_rq_map_sg(q, creq, tmp_sg);
3254
7c832835 3255 /* get the DMA records for the setup */
1da177e4
LT		 3256 if (c->Request.Type.Direction == XFER_READ)
3257 dir = PCI_DMA_FROMDEVICE;
3258 else
3259 dir = PCI_DMA_TODEVICE;
3260
5c07a311
DB		 3261 curr_sg = c->SG;
3262 sg_index = 0;
3263 chained = 0;
3264
7c832835 3265 for (i = 0; i < seg; i++) {
5c07a311
DB		 3266 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3267 !chained && ((seg - i) > 1)) {
5c07a311 3268 /* Point to next chain block. */
dccc9b56 3269 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3270 sg_index = 0;
3271 chained = 1;
3272 }
3273 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3274 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3275 tmp_sg[i].offset,
3276 tmp_sg[i].length, dir);
3277 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3278 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3279 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3280 ++sg_index;
1da177e4 3281 }
d45033ef
SC		 3282 if (chained)
3283 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3284 (seg - (h->max_cmd_sgentries - 1)) *
3285 sizeof(SGDescriptor_struct));
5c07a311 3286
7c832835
BH		 3287 /* track how many SG entries we are using */
3288 if (seg > h->maxSG)
3289 h->maxSG = seg;
1da177e4 3290
b2a4a43d 3291 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3292 "chained[%d]\n",
3293 blk_rq_sectors(creq), seg, chained);
1da177e4 3294
5e216153
MM		 3295 c->Header.SGTotal = seg + chained;
3296 if (seg <= h->max_cmd_sgentries)
3297 c->Header.SGList = c->Header.SGTotal;
3298 else
5c07a311 3299 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3300 set_performant_mode(h, c);
5c07a311 3301
33659ebb 3302 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3303 if(h->cciss_read == CCISS_READ_10) {
3304 c->Request.CDB[1] = 0;
b028461d 3305 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3306 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3307 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3308 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3309 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3310 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3311 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3312 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3313 } else {
582539e5
RD		 3314 u32 upper32 = upper_32_bits(start_blk);
3315
03bbfee5
MMOD		 3316 c->Request.CDBLen = 16;
3317 c->Request.CDB[1]= 0;
b028461d 3318 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3319 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3320 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3321 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3322 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3323 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3324 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3325 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3326 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3327 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3328 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3329 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3330 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3331 }
33659ebb 3332 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3333 c->Request.CDBLen = creq->cmd_len;
3334 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3335 } else {
b2a4a43d
SC		 3336 dev_warn(&h->pdev->dev, "bad request type %d\n",
3337 creq->cmd_type);
03bbfee5 3338 BUG();
00988a35 3339 }
1da177e4
LT		 3340
3341 spin_lock_irq(q->queue_lock);
3342
8a3173de 3343 addQ(&h->reqQ, c);
1da177e4 3344 h->Qdepth++;
7c832835
BH		 3345 if (h->Qdepth > h->maxQsinceinit)
3346 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3347
3348 goto queue;
00988a35 3349full:
1da177e4 3350 blk_stop_queue(q);
00988a35 3351startio:
1da177e4
LT		 3352 /* We will already have the driver lock here so not need
3353 * to lock it.
7c832835 3354 */
1da177e4
LT		 3355 start_io(h);
3356}
3357
3da8b713 3358static inline unsigned long get_next_completion(ctlr_info_t *h)
3359{
3da8b713 3360 return h->access.command_completed(h);
3da8b713 3361}
3362
3363static inline int interrupt_pending(ctlr_info_t *h)
3364{
3da8b713 3365 return h->access.intr_pending(h);
3da8b713 3366}
3367
3368static inline long interrupt_not_for_us(ctlr_info_t *h)
3369{
81125860 3370 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3371 (h->interrupts_enabled == 0));
3da8b713 3372}
3373
0c2b3908
MM		 3374static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3375 u32 raw_tag)
1da177e4 3376{
0c2b3908
MM		 3377 if (unlikely(tag_index >= h->nr_cmds)) {
3378 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3379 return 1;
3380 }
3381 return 0;
3382}
3383
3384static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3385 u32 raw_tag)
3386{
3387 removeQ(c);
3388 if (likely(c->cmd_type == CMD_RWREQ))
3389 complete_command(h, c, 0);
3390 else if (c->cmd_type == CMD_IOCTL_PEND)
3391 complete(c->waiting);
3392#ifdef CONFIG_CISS_SCSI_TAPE
3393 else if (c->cmd_type == CMD_SCSI)
3394 complete_scsi_command(c, 0, raw_tag);
3395#endif
3396}
3397
29979a71
MM		 3398static inline u32 next_command(ctlr_info_t *h)
3399{
3400 u32 a;
3401
3402 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3403 return h->access.command_completed(h);
3404
3405 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3406 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3407 (h->reply_pool_head)++;
3408 h->commands_outstanding--;
3409 } else {
3410 a = FIFO_EMPTY;
3411 }
3412 /* Check for wraparound */
3413 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3414 h->reply_pool_head = h->reply_pool;
3415 h->reply_pool_wraparound ^= 1;
3416 }
3417 return a;
3418}
3419
0c2b3908
MM		 3420/* process completion of an indexed ("direct lookup") command */
3421static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3422{
3423 u32 tag_index;
1da177e4 3424 CommandList_struct *c;
0c2b3908
MM		 3425
3426 tag_index = cciss_tag_to_index(raw_tag);
3427 if (bad_tag(h, tag_index, raw_tag))
5e216153 3428 return next_command(h);
0c2b3908
MM		 3429 c = h->cmd_pool + tag_index;
3430 finish_cmd(h, c, raw_tag);
5e216153 3431 return next_command(h);
0c2b3908
MM		 3432}
3433
3434/* process completion of a non-indexed command */
3435static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3436{
3437 u32 tag;
3438 CommandList_struct *c = NULL;
3439 struct hlist_node *tmp;
3440 __u32 busaddr_masked, tag_masked;
3441
3442 tag = cciss_tag_discard_error_bits(raw_tag);
3443 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3444 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3445 tag_masked = cciss_tag_discard_error_bits(tag);
3446 if (busaddr_masked == tag_masked) {
3447 finish_cmd(h, c, raw_tag);
5e216153 3448 return next_command(h);
0c2b3908
MM		 3449 }
3450 }
3451 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3452 return next_command(h);
0c2b3908
MM		 3453}
3454
3455static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3456{
3457 ctlr_info_t *h = dev_id;
1da177e4 3458 unsigned long flags;
0c2b3908 3459 u32 raw_tag;
1da177e4 3460
3da8b713 3461 if (interrupt_not_for_us(h))
1da177e4 3462 return IRQ_NONE;
f70dba83 3463 spin_lock_irqsave(&h->lock, flags);
3da8b713 3464 while (interrupt_pending(h)) {
0c2b3908
MM		 3465 raw_tag = get_next_completion(h);
3466 while (raw_tag != FIFO_EMPTY) {
3467 if (cciss_tag_contains_index(raw_tag))
3468 raw_tag = process_indexed_cmd(h, raw_tag);
3469 else
3470 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3471 }
3472 }
f70dba83 3473 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3474 return IRQ_HANDLED;
3475}
1da177e4 3476
0c2b3908
MM		 3477/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3478 * check the interrupt pending register because it is not set.
3479 */
3480static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3481{
3482 ctlr_info_t *h = dev_id;
3483 unsigned long flags;
3484 u32 raw_tag;
8a3173de 3485
f70dba83 3486 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3487 raw_tag = get_next_completion(h);
3488 while (raw_tag != FIFO_EMPTY) {
3489 if (cciss_tag_contains_index(raw_tag))
3490 raw_tag = process_indexed_cmd(h, raw_tag);
3491 else
3492 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3493 }
f70dba83 3494 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3495 return IRQ_HANDLED;
3496}
7c832835 3497
b368c9dd
AP		 3498/**
3499 * add_to_scan_list() - add controller to rescan queue
3500 * @h: Pointer to the controller.
3501 *
3502 * Adds the controller to the rescan queue if not already on the queue.
3503 *
3504 * returns 1 if added to the queue, 0 if skipped (could be on the
3505 * queue already, or the controller could be initializing or shutting
3506 * down).
3507 **/
3508static int add_to_scan_list(struct ctlr_info *h)
3509{
3510 struct ctlr_info *test_h;
3511 int found = 0;
3512 int ret = 0;
3513
3514 if (h->busy_initializing)
3515 return 0;
3516
3517 if (!mutex_trylock(&h->busy_shutting_down))
3518 return 0;
3519
3520 mutex_lock(&scan_mutex);
3521 list_for_each_entry(test_h, &scan_q, scan_list) {
3522 if (test_h == h) {
3523 found = 1;
3524 break;
3525 }
3526 }
3527 if (!found && !h->busy_scanning) {
3528 INIT_COMPLETION(h->scan_wait);
3529 list_add_tail(&h->scan_list, &scan_q);
3530 ret = 1;
3531 }
3532 mutex_unlock(&scan_mutex);
3533 mutex_unlock(&h->busy_shutting_down);
3534
3535 return ret;
3536}
3537
3538/**
3539 * remove_from_scan_list() - remove controller from rescan queue
3540 * @h: Pointer to the controller.
3541 *
3542 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3543 * the controller is currently conducting a rescan. The controller
3544 * can be in one of three states:
3545 * 1. Doesn't need a scan
3546 * 2. On the scan list, but not scanning yet (we remove it)
3547 * 3. Busy scanning (and not on the list). In this case we want to wait for
3548 * the scan to complete to make sure the scanning thread for this
3549 * controller is completely idle.
b368c9dd
AP		 3550 **/
3551static void remove_from_scan_list(struct ctlr_info *h)
3552{
3553 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3554
3555 mutex_lock(&scan_mutex);
3556 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3557 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3558 list_del(&h->scan_list);
3559 complete_all(&h->scan_wait);
3560 mutex_unlock(&scan_mutex);
3561 return;
3562 }
3563 }
fd8489cf
SC		 3564 if (h->busy_scanning) { /* state 3. */
3565 mutex_unlock(&scan_mutex);
b368c9dd 3566 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3567 } else { /* state 1, nothing to do. */
3568 mutex_unlock(&scan_mutex);
3569 }
b368c9dd
AP		 3570}
3571
3572/**
3573 * scan_thread() - kernel thread used to rescan controllers
3574 * @data: Ignored.
3575 *
3576 * A kernel thread used scan for drive topology changes on
3577 * controllers. The thread processes only one controller at a time
3578 * using a queue. Controllers are added to the queue using
3579 * add_to_scan_list() and removed from the queue either after done
3580 * processing or using remove_from_scan_list().
3581 *
3582 * returns 0.
3583 **/
0a9279cc
MM		 3584static int scan_thread(void *data)
3585{
b368c9dd 3586 struct ctlr_info *h;
0a9279cc 3587
b368c9dd
AP		 3588 while (1) {
3589 set_current_state(TASK_INTERRUPTIBLE);
3590 schedule();
0a9279cc
MM		 3591 if (kthread_should_stop())
3592 break;
b368c9dd
AP		 3593
3594 while (1) {
3595 mutex_lock(&scan_mutex);
3596 if (list_empty(&scan_q)) {
3597 mutex_unlock(&scan_mutex);
3598 break;
3599 }
3600
3601 h = list_entry(scan_q.next,
3602 struct ctlr_info,
3603 scan_list);
3604 list_del(&h->scan_list);
3605 h->busy_scanning = 1;
3606 mutex_unlock(&scan_mutex);
3607
d06dfbd2
SC		 3608 rebuild_lun_table(h, 0, 0);
3609 complete_all(&h->scan_wait);
3610 mutex_lock(&scan_mutex);
3611 h->busy_scanning = 0;
3612 mutex_unlock(&scan_mutex);
b368c9dd 3613 }
0a9279cc 3614 }
b368c9dd 3615
0a9279cc
MM		 3616 return 0;
3617}
3618
3619static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3620{
3621 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3622 return 0;
3623
3624 switch (c->err_info->SenseInfo[12]) {
3625 case STATE_CHANGED:
b2a4a43d
SC		 3626 dev_warn(&h->pdev->dev, "a state change "
3627 "detected, command retried\n");
0a9279cc
MM		 3628 return 1;
3629 break;
3630 case LUN_FAILED:
b2a4a43d
SC		 3631 dev_warn(&h->pdev->dev, "LUN failure "
3632 "detected, action required\n");
0a9279cc
MM		 3633 return 1;
3634 break;
3635 case REPORT_LUNS_CHANGED:
b2a4a43d 3636 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3637 /*
3638 * Here, we could call add_to_scan_list and wake up the scan thread,
3639 * except that it's quite likely that we will get more than one
3640 * REPORT_LUNS_CHANGED condition in quick succession, which means
3641 * that those which occur after the first one will likely happen
3642 * *during* the scan_thread's rescan. And the rescan code is not
3643 * robust enough to restart in the middle, undoing what it has already
3644 * done, and it's not clear that it's even possible to do this, since
3645 * part of what it does is notify the block layer, which starts
3646 * doing it's own i/o to read partition tables and so on, and the
3647 * driver doesn't have visibility to know what might need undoing.
3648 * In any event, if possible, it is horribly complicated to get right
3649 * so we just don't do it for now.
3650 *
3651 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3652 */
0a9279cc
MM		 3653 return 1;
3654 break;
3655 case POWER_OR_RESET:
b2a4a43d
SC		 3656 dev_warn(&h->pdev->dev,
3657 "a power on or device reset detected\n");
0a9279cc
MM		 3658 return 1;
3659 break;
3660 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3661 dev_warn(&h->pdev->dev,
3662 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3663 return 1;
3664 break;
3665 default:
b2a4a43d
SC		 3666 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3667 return 1;
0a9279cc
MM		 3668 }
3669}
3670
7c832835 3671/*
d14c4ab5 3672 * We cannot read the structure directly, for portability we must use
1da177e4 3673 * the io functions.
7c832835 3674 * This is for debug only.
1da177e4 3675 */
b2a4a43d 3676static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3677{
3678 int i;
3679 char temp_name[17];
b2a4a43d 3680 CfgTable_struct *tb = h->cfgtable;
1da177e4 3681
b2a4a43d
SC		 3682 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3683 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3684 for (i = 0; i < 4; i++)
1da177e4 3685 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3686 temp_name[4] = '\0';
b2a4a43d
SC		 3687 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3688 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3689 readl(&(tb->SpecValence)));
3690 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3691 readl(&(tb->TransportSupport)));
b2a4a43d 3692 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3693 readl(&(tb->TransportActive)));
b2a4a43d 3694 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3695 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3696 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3697 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3698 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3699 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3700 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3701 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3702 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3703 readl(&(tb->BusTypes)));
7c832835 3704 for (i = 0; i < 16; i++)
1da177e4
LT		 3705 temp_name[i] = readb(&(tb->ServerName[i]));
3706 temp_name[16] = '\0';
b2a4a43d
SC		 3707 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3708 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3709 readl(&(tb->HeartBeat)));
1da177e4 3710}
1da177e4 3711
7c832835 3712static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3713{
3714 int i, offset, mem_type, bar_type;
7c832835 3715 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3716 return 0;
3717 offset = 0;
7c832835
BH		 3718 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3719 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3720 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3721 offset += 4;
3722 else {
3723 mem_type = pci_resource_flags(pdev, i) &
7c832835 3724 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3725 switch (mem_type) {
7c832835
BH		 3726 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3727 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3728 offset += 4; /* 32 bit */
3729 break;
3730 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3731 offset += 8;
3732 break;
3733 default: /* reserved in PCI 2.2 */
b2a4a43d 3734 dev_warn(&pdev->dev,
7c832835
BH		 3735 "Base address is invalid\n");
3736 return -1;
1da177e4
LT		 3737 break;
3738 }
3739 }
7c832835
BH		 3740 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3741 return i + 1;
1da177e4
LT		 3742 }
3743 return -1;
3744}
3745
5e216153
MM		 3746/* Fill in bucket_map[], given nsgs (the max number of
3747 * scatter gather elements supported) and bucket[],
3748 * which is an array of 8 integers. The bucket[] array
3749 * contains 8 different DMA transfer sizes (in 16
3750 * byte increments) which the controller uses to fetch
3751 * commands. This function fills in bucket_map[], which
3752 * maps a given number of scatter gather elements to one of
3753 * the 8 DMA transfer sizes. The point of it is to allow the
3754 * controller to only do as much DMA as needed to fetch the
3755 * command, with the DMA transfer size encoded in the lower
3756 * bits of the command address.
3757 */
3758static void calc_bucket_map(int bucket[], int num_buckets,
3759 int nsgs, int *bucket_map)
3760{
3761 int i, j, b, size;
3762
3763 /* even a command with 0 SGs requires 4 blocks */
3764#define MINIMUM_TRANSFER_BLOCKS 4
3765#define NUM_BUCKETS 8
3766 /* Note, bucket_map must have nsgs+1 entries. */
3767 for (i = 0; i <= nsgs; i++) {
3768 /* Compute size of a command with i SG entries */
3769 size = i + MINIMUM_TRANSFER_BLOCKS;
3770 b = num_buckets; /* Assume the biggest bucket */
3771 /* Find the bucket that is just big enough */
3772 for (j = 0; j < 8; j++) {
3773 if (bucket[j] >= size) {
3774 b = j;
3775 break;
3776 }
3777 }
3778 /* for a command with i SG entries, use bucket b. */
3779 bucket_map[i] = b;
3780 }
3781}
3782
0f8a6a1e
SC		 3783static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3784{
3785 int i;
3786
3787 /* under certain very rare conditions, this can take awhile.
3788 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3789 * as we enter this code.) */
3790 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3791 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3792 break;
3793 msleep(10);
3794 }
3795}
3796
b9933135
SC		 3797static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3798{
3799 /* This is a bit complicated. There are 8 registers on
3800 * the controller which we write to to tell it 8 different
3801 * sizes of commands which there may be. It's a way of
3802 * reducing the DMA done to fetch each command. Encoded into
3803 * each command's tag are 3 bits which communicate to the controller
3804 * which of the eight sizes that command fits within. The size of
3805 * each command depends on how many scatter gather entries there are.
3806 * Each SG entry requires 16 bytes. The eight registers are programmed
3807 * with the number of 16-byte blocks a command of that size requires.
3808 * The smallest command possible requires 5 such 16 byte blocks.
3809 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3810 * blocks. Note, this only extends to the SG entries contained
3811 * within the command block, and does not extend to chained blocks
3812 * of SG elements. bft[] contains the eight values we write to
3813 * the registers. They are not evenly distributed, but have more
3814 * sizes for small commands, and fewer sizes for larger commands.
3815 */
5e216153 3816 __u32 trans_offset;
b9933135 3817 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3818 /*
3819 * 5 = 1 s/g entry or 4k
3820 * 6 = 2 s/g entry or 8k
3821 * 8 = 4 s/g entry or 16k
3822 * 10 = 6 s/g entry or 24k
3823 */
5e216153 3824 unsigned long register_value;
5e216153
MM		 3825 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3826
5e216153
MM		 3827 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3828
3829 /* Controller spec: zero out this buffer. */
3830 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3831 h->reply_pool_head = h->reply_pool;
3832
3833 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3834 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3835 h->blockFetchTable);
3836 writel(bft[0], &h->transtable->BlockFetch0);
3837 writel(bft[1], &h->transtable->BlockFetch1);
3838 writel(bft[2], &h->transtable->BlockFetch2);
3839 writel(bft[3], &h->transtable->BlockFetch3);
3840 writel(bft[4], &h->transtable->BlockFetch4);
3841 writel(bft[5], &h->transtable->BlockFetch5);
3842 writel(bft[6], &h->transtable->BlockFetch6);
3843 writel(bft[7], &h->transtable->BlockFetch7);
3844
3845 /* size of controller ring buffer */
3846 writel(h->max_commands, &h->transtable->RepQSize);
3847 writel(1, &h->transtable->RepQCount);
3848 writel(0, &h->transtable->RepQCtrAddrLow32);
3849 writel(0, &h->transtable->RepQCtrAddrHigh32);
3850 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3851 writel(0, &h->transtable->RepQAddr0High32);
3852 writel(CFGTBL_Trans_Performant,
3853 &(h->cfgtable->HostWrite.TransportRequest));
3854
5e216153 3855 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3856 cciss_wait_for_mode_change_ack(h);
5e216153 3857 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3858 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3859 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3860 " performant mode\n");
b9933135
SC		 3861}
3862
3863static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3864{
3865 __u32 trans_support;
3866
3867 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3868 /* Attempt to put controller into performant mode if supported */
3869 /* Does board support performant mode? */
3870 trans_support = readl(&(h->cfgtable->TransportSupport));
3871 if (!(trans_support & PERFORMANT_MODE))
3872 return;
3873
b2a4a43d 3874 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3875 /* Performant mode demands commands on a 32 byte boundary
3876 * pci_alloc_consistent aligns on page boundarys already.
3877 * Just need to check if divisible by 32
3878 */
3879 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3880 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3881 "cciss info: command size[",
3882 (int)sizeof(CommandList_struct),
3883 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 3884 return;
3885 }
3886
b9933135
SC		 3887 /* Performant mode ring buffer and supporting data structures */
3888 h->reply_pool = (__u64 *)pci_alloc_consistent(
3889 h->pdev, h->max_commands * sizeof(__u64),
3890 &(h->reply_pool_dhandle));
3891
3892 /* Need a block fetch table for performant mode */
3893 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3894 sizeof(__u32)), GFP_KERNEL);
3895
3896 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3897 goto clean_up;
3898
3899 cciss_enter_performant_mode(h);
3900
5e216153
MM		 3901 /* Change the access methods to the performant access methods */
3902 h->access = SA5_performant_access;
b9933135 3903 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 3904
3905 return;
3906clean_up:
3907 kfree(h->blockFetchTable);
3908 if (h->reply_pool)
3909 pci_free_consistent(h->pdev,
3910 h->max_commands * sizeof(__u64),
3911 h->reply_pool,
3912 h->reply_pool_dhandle);
3913 return;
3914
3915} /* cciss_put_controller_into_performant_mode */
3916
fb86a35b
MM		 3917/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3918 * controllers that are capable. If not, we use IO-APIC mode.
3919 */
3920
f70dba83 3921static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 3922{
3923#ifdef CONFIG_PCI_MSI
7c832835
BH		 3924 int err;
3925 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3926 {0, 2}, {0, 3}
3927 };
fb86a35b
MM		 3928
3929 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 3930 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3931 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 3932 goto default_int_mode;
3933
f70dba83
SC		 3934 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3935 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3936 if (!err) {
f70dba83
SC		 3937 h->intr[0] = cciss_msix_entries[0].vector;
3938 h->intr[1] = cciss_msix_entries[1].vector;
3939 h->intr[2] = cciss_msix_entries[2].vector;
3940 h->intr[3] = cciss_msix_entries[3].vector;
3941 h->msix_vector = 1;
7c832835
BH		 3942 return;
3943 }
3944 if (err > 0) {
b2a4a43d
SC		 3945 dev_warn(&h->pdev->dev,
3946 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3947 goto default_int_mode;
7c832835 3948 } else {
b2a4a43d
SC		 3949 dev_warn(&h->pdev->dev,
3950 "MSI-X init failed %d\n", err);
1ecb9c0f 3951 goto default_int_mode;
7c832835
BH		 3952 }
3953 }
f70dba83
SC		 3954 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3955 if (!pci_enable_msi(h->pdev))
3956 h->msi_vector = 1;
3957 else
b2a4a43d 3958 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3959 }
1ecb9c0f 3960default_int_mode:
7c832835 3961#endif /* CONFIG_PCI_MSI */
fb86a35b 3962 /* if we get here we're going to use the default interrupt mode */
f70dba83 3963 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 3964 return;
3965}
3966
6539fa9b 3967static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3968{
6539fa9b
SC		 3969 int i;
3970 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 3971
3972 subsystem_vendor_id = pdev->subsystem_vendor;
3973 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 3974 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3975 subsystem_vendor_id;
2ec24ff1
SC		 3976
3977 for (i = 0; i < ARRAY_SIZE(products); i++) {
3978 /* Stand aside for hpsa driver on request */
3979 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
3980 return -ENODEV;
6539fa9b
SC		 3981 if (*board_id == products[i].board_id)
3982 return i;
2ec24ff1 3983 }
6539fa9b
SC		 3984 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3985 *board_id);
3986 return -ENODEV;
3987}
1da177e4 3988
dd9c426e
SC		 3989static inline bool cciss_board_disabled(ctlr_info_t *h)
3990{
3991 u16 command;
1da177e4 3992
dd9c426e
SC		 3993 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
3994 return ((command & PCI_COMMAND_MEMORY) == 0);
3995}
1da177e4 3996
d474830d
SC		 3997static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
3998 unsigned long *memory_bar)
3999{
4000 int i;
4e570309 4001
d474830d
SC		 4002 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4003 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4004 /* addressing mode bits already removed */
4005 *memory_bar = pci_resource_start(pdev, i);
4006 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4007 *memory_bar);
4008 return 0;
4009 }
4010 dev_warn(&pdev->dev, "no memory BAR found\n");
4011 return -ENODEV;
4012}
1da177e4 4013
e99ba136
SC		 4014static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4015{
4016 int i;
4017 u32 scratchpad;
1da177e4 4018
e99ba136
SC		 4019 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
4020 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4021 if (scratchpad == CCISS_FIRMWARE_READY)
4022 return 0;
4023 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4024 }
e99ba136
SC		 4025 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
4026 return -ENODEV;
4027}
e1438581 4028
8e93bf6d
SC		 4029static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4030 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4031 u64 *cfg_offset)
4032{
4033 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4034 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4035 *cfg_base_addr &= (u32) 0x0000ffff;
4036 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4037 if (*cfg_base_addr_index == -1) {
4038 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4039 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4040 return -ENODEV;
4041 }
4042 return 0;
4043}
1da177e4 4044
4809d098
SC		 4045static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4046{
4047 u64 cfg_offset;
4048 u32 cfg_base_addr;
4049 u64 cfg_base_addr_index;
4050 u32 trans_offset;
8e93bf6d 4051 int rc;
1da177e4 4052
8e93bf6d
SC		 4053 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4054 &cfg_base_addr_index, &cfg_offset);
4055 if (rc)
4056 return rc;
4809d098 4057 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4058 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4059 if (!h->cfgtable)
4060 return -ENOMEM;
4061 /* Find performant mode table. */
8e93bf6d 4062 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4063 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4064 cfg_base_addr_index)+cfg_offset+trans_offset,
4065 sizeof(*h->transtable));
4066 if (!h->transtable)
4067 return -ENOMEM;
4068 return 0;
4069}
1da177e4 4070
adfbc1ff
SC		 4071static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4072{
4073 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4074 if (h->max_commands < 16) {
4075 dev_warn(&h->pdev->dev, "Controller reports "
4076 "max supported commands of %d, an obvious lie. "
4077 "Using 16. Ensure that firmware is up to date.\n",
4078 h->max_commands);
4079 h->max_commands = 16;
1da177e4 4080 }
adfbc1ff 4081}
1da177e4 4082
afadbf4b
SC		 4083/* Interrogate the hardware for some limits:
4084 * max commands, max SG elements without chaining, and with chaining,
4085 * SG chain block size, etc.
4086 */
4087static void __devinit cciss_find_board_params(ctlr_info_t *h)
4088{
adfbc1ff 4089 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4090 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4091 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4092 /*
afadbf4b 4093 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4094 * Howvever spec says if 0, use 31
4095 */
afadbf4b
SC		 4096 h->max_cmd_sgentries = 31;
4097 if (h->maxsgentries > 512) {
4098 h->max_cmd_sgentries = 32;
4099 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4100 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4101 } else {
afadbf4b
SC		 4102 h->maxsgentries = 31; /* default to traditional values */
4103 h->chainsize = 0;
5c07a311 4104 }
afadbf4b 4105}
5c07a311 4106
501b92cd
SC		 4107static inline bool CISS_signature_present(ctlr_info_t *h)
4108{
4109 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4110 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4111 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4112 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4113 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4114 return false;
1da177e4 4115 }
501b92cd
SC		 4116 return true;
4117}
4118
322e304c
SC		 4119/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4120static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4121{
1da177e4 4122#ifdef CONFIG_X86
322e304c
SC		 4123 u32 prefetch;
4124
4125 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4126 prefetch |= 0x100;
4127 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4128#endif
322e304c 4129}
1da177e4 4130
bfd63ee5
SC		 4131/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4132 * in a prefetch beyond physical memory.
4133 */
4134static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4135{
4136 u32 dma_prefetch;
4137 __u32 dma_refetch;
4138
4139 if (h->board_id != 0x3225103C)
4140 return;
4141 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4142 dma_prefetch |= 0x8000;
4143 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4144 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4145 dma_refetch |= 0x1;
4146 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4147}
4148
f70dba83 4149static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4150{
4809d098 4151 int prod_index, err;
6539fa9b 4152
f70dba83 4153 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4154 if (prod_index < 0)
2ec24ff1 4155 return -ENODEV;
f70dba83
SC		 4156 h->product_name = products[prod_index].product_name;
4157 h->access = *(products[prod_index].access);
1da177e4 4158
f70dba83 4159 if (cciss_board_disabled(h)) {
b2a4a43d 4160 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4161 return -ENODEV;
1da177e4 4162 }
f70dba83 4163 err = pci_enable_device(h->pdev);
7c832835 4164 if (err) {
b2a4a43d 4165 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4166 return err;
f92e2f5f
MM		 4167 }
4168
f70dba83 4169 err = pci_request_regions(h->pdev, "cciss");
4e570309 4170 if (err) {
b2a4a43d
SC		 4171 dev_warn(&h->pdev->dev,
4172 "Cannot obtain PCI resources, aborting\n");
872225ca 4173 return err;
4e570309 4174 }
1da177e4 4175
b2a4a43d
SC		 4176 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4177 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4178
fb86a35b
MM		 4179/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4180 * else we use the IO-APIC interrupt assigned to us by system ROM.
4181 */
f70dba83
SC		 4182 cciss_interrupt_mode(h);
4183 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4184 if (err)
e1438581 4185 goto err_out_free_res;
f70dba83
SC		 4186 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4187 if (!h->vaddr) {
da550321
SC		 4188 err = -ENOMEM;
4189 goto err_out_free_res;
7c832835 4190 }
f70dba83 4191 err = cciss_wait_for_board_ready(h);
e99ba136 4192 if (err)
4e570309 4193 goto err_out_free_res;
f70dba83 4194 err = cciss_find_cfgtables(h);
4809d098 4195 if (err)
4e570309 4196 goto err_out_free_res;
b2a4a43d 4197 print_cfg_table(h);
f70dba83 4198 cciss_find_board_params(h);
1da177e4 4199
f70dba83 4200 if (!CISS_signature_present(h)) {
c33ac89b 4201 err = -ENODEV;
4e570309 4202 goto err_out_free_res;
1da177e4 4203 }
f70dba83
SC		 4204 cciss_enable_scsi_prefetch(h);
4205 cciss_p600_dma_prefetch_quirk(h);
4206 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4207 return 0;
4208
5faad620 4209err_out_free_res:
872225ca
MM		 4210 /*
4211 * Deliberately omit pci_disable_device(): it does something nasty to
4212 * Smart Array controllers that pci_enable_device does not undo
4213 */
f70dba83
SC		 4214 if (h->transtable)
4215 iounmap(h->transtable);
4216 if (h->cfgtable)
4217 iounmap(h->cfgtable);
4218 if (h->vaddr)
4219 iounmap(h->vaddr);
4220 pci_release_regions(h->pdev);
c33ac89b 4221 return err;
1da177e4
LT		 4222}
4223
6ae5ce8e
MM		 4224/* Function to find the first free pointer into our hba[] array
4225 * Returns -1 if no free entries are left.
7c832835 4226 */
b2a4a43d 4227static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4228{
799202cb 4229 int i;
1da177e4 4230
7c832835 4231 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4232 if (!hba[i]) {
f70dba83 4233 ctlr_info_t *h;
f2912a12 4234
f70dba83
SC		 4235 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4236 if (!h)
1da177e4 4237 goto Enomem;
f70dba83 4238 hba[i] = h;
1da177e4
LT		 4239 return i;
4240 }
4241 }
b2a4a43d 4242 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4243 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4244 return -1;
4245Enomem:
b2a4a43d 4246 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4247 return -1;
4248}
4249
f70dba83 4250static void free_hba(ctlr_info_t *h)
1da177e4 4251{
2c935593 4252 int i;
1da177e4 4253
f70dba83 4254 hba[h->ctlr] = NULL;
2c935593
SC		 4255 for (i = 0; i < h->highest_lun + 1; i++)
4256 if (h->gendisk[i] != NULL)
4257 put_disk(h->gendisk[i]);
4258 kfree(h);
1da177e4
LT		 4259}
4260
82eb03cf
CC		 4261/* Send a message CDB to the firmware. */
4262static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4263{
4264 typedef struct {
4265 CommandListHeader_struct CommandHeader;
4266 RequestBlock_struct Request;
4267 ErrDescriptor_struct ErrorDescriptor;
4268 } Command;
4269 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4270 Command *cmd;
4271 dma_addr_t paddr64;
4272 uint32_t paddr32, tag;
4273 void __iomem *vaddr;
4274 int i, err;
4275
4276 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4277 if (vaddr == NULL)
4278 return -ENOMEM;
4279
4280 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4281 CCISS commands, so they must be allocated from the lower 4GiB of
4282 memory. */
e930438c 4283 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4284 if (err) {
4285 iounmap(vaddr);
4286 return -ENOMEM;
4287 }
4288
4289 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4290 if (cmd == NULL) {
4291 iounmap(vaddr);
4292 return -ENOMEM;
4293 }
4294
4295 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4296 although there's no guarantee, we assume that the address is at
4297 least 4-byte aligned (most likely, it's page-aligned). */
4298 paddr32 = paddr64;
4299
4300 cmd->CommandHeader.ReplyQueue = 0;
4301 cmd->CommandHeader.SGList = 0;
4302 cmd->CommandHeader.SGTotal = 0;
4303 cmd->CommandHeader.Tag.lower = paddr32;
4304 cmd->CommandHeader.Tag.upper = 0;
4305 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4306
4307 cmd->Request.CDBLen = 16;
4308 cmd->Request.Type.Type = TYPE_MSG;
4309 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4310 cmd->Request.Type.Direction = XFER_NONE;
4311 cmd->Request.Timeout = 0; /* Don't time out */
4312 cmd->Request.CDB[0] = opcode;
4313 cmd->Request.CDB[1] = type;
4314 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4315
4316 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4317 cmd->ErrorDescriptor.Addr.upper = 0;
4318 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4319
4320 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4321
4322 for (i = 0; i < 10; i++) {
4323 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4324 if ((tag & ~3) == paddr32)
4325 break;
4326 schedule_timeout_uninterruptible(HZ);
4327 }
4328
4329 iounmap(vaddr);
4330
4331 /* we leak the DMA buffer here ... no choice since the controller could
4332 still complete the command. */
4333 if (i == 10) {
b2a4a43d
SC		 4334 dev_err(&pdev->dev,
4335 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4336 opcode, type);
4337 return -ETIMEDOUT;
4338 }
4339
4340 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4341
4342 if (tag & 2) {
b2a4a43d 4343 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4344 opcode, type);
4345 return -EIO;
4346 }
4347
b2a4a43d 4348 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4349 opcode, type);
4350 return 0;
4351}
4352
4353#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4354#define cciss_noop(p) cciss_message(p, 3, 0)
4355
4356static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4357{
4358/* the #defines are stolen from drivers/pci/msi.h. */
4359#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4360#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4361
4362 int pos;
4363 u16 control = 0;
4364
4365 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4366 if (pos) {
4367 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4368 if (control & PCI_MSI_FLAGS_ENABLE) {
b2a4a43d 4369 dev_info(&pdev->dev, "resetting MSI\n");
82eb03cf
CC		 4370 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4371 }
4372 }
4373
4374 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4375 if (pos) {
4376 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4377 if (control & PCI_MSIX_FLAGS_ENABLE) {
b2a4a43d 4378 dev_info(&pdev->dev, "resetting MSI-X\n");
82eb03cf
CC		 4379 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4380 }
4381 }
4382
4383 return 0;
4384}
4385
a6528d01
SC		 4386static int cciss_controller_hard_reset(struct pci_dev *pdev,
4387 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4388{
a6528d01
SC		 4389 u16 pmcsr;
4390 int pos;
82eb03cf 4391
a6528d01
SC		 4392 if (use_doorbell) {
4393 /* For everything after the P600, the PCI power state method
4394 * of resetting the controller doesn't work, so we have this
4395 * other way using the doorbell register.
4396 */
4397 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4398 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4399 msleep(1000);
4400 } else { /* Try to do it the PCI power state way */
4401
4402 /* Quoting from the Open CISS Specification: "The Power
4403 * Management Control/Status Register (CSR) controls the power
4404 * state of the device. The normal operating state is D0,
4405 * CSR=00h. The software off state is D3, CSR=03h. To reset
4406 * the controller, place the interface device in D3 then to D0,
4407 * this causes a secondary PCI reset which will reset the
4408 * controller." */
4409
4410 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4411 if (pos == 0) {
4412 dev_err(&pdev->dev,
4413 "cciss_controller_hard_reset: "
4414 "PCI PM not supported\n");
4415 return -ENODEV;
4416 }
4417 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4418 /* enter the D3hot power management state */
4419 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4420 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4421 pmcsr |= PCI_D3hot;
4422 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4423
a6528d01 4424 msleep(500);
82eb03cf 4425
a6528d01
SC		 4426 /* enter the D0 power management state */
4427 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4428 pmcsr |= PCI_D0;
4429 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4430
a6528d01
SC		 4431 msleep(500);
4432 }
4433 return 0;
4434}
82eb03cf 4435
a6528d01
SC		 4436/* This does a hard reset of the controller using PCI power management
4437 * states or using the doorbell register. */
4438static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4439{
4440 u16 saved_config_space[32];
4441 u64 cfg_offset;
4442 u32 cfg_base_addr;
4443 u64 cfg_base_addr_index;
4444 void __iomem *vaddr;
4445 unsigned long paddr;
4446 u32 misc_fw_support, active_transport;
4447 int rc, i;
4448 CfgTable_struct __iomem *cfgtable;
4449 bool use_doorbell;
058a0f9f 4450 u32 board_id;
a6528d01
SC		 4451
4452 /* For controllers as old a the p600, this is very nearly
4453 * the same thing as
4454 *
4455 * pci_save_state(pci_dev);
4456 * pci_set_power_state(pci_dev, PCI_D3hot);
4457 * pci_set_power_state(pci_dev, PCI_D0);
4458 * pci_restore_state(pci_dev);
4459 *
4460 * but we can't use these nice canned kernel routines on
4461 * kexec, because they also check the MSI/MSI-X state in PCI
4462 * configuration space and do the wrong thing when it is
4463 * set/cleared. Also, the pci_save/restore_state functions
4464 * violate the ordering requirements for restoring the
4465 * configuration space from the CCISS document (see the
4466 * comment below). So we roll our own ....
4467 *
4468 * For controllers newer than the P600, the pci power state
4469 * method of resetting doesn't work so we have another way
4470 * using the doorbell register.
4471 */
82eb03cf 4472
058a0f9f
SC		 4473 /* Exclude 640x boards. These are two pci devices in one slot
4474 * which share a battery backed cache module. One controls the
4475 * cache, the other accesses the cache through the one that controls
4476 * it. If we reset the one controlling the cache, the other will
4477 * likely not be happy. Just forbid resetting this conjoined mess.
4478 */
4479 cciss_lookup_board_id(pdev, &board_id);
4480 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4481 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4482 "due to shared cache module.");
82eb03cf
CC		 4483 return -ENODEV;
4484 }
4485
82eb03cf
CC		 4486 for (i = 0; i < 32; i++)
4487 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
82eb03cf 4488
a6528d01
SC		 4489 /* find the first memory BAR, so we can find the cfg table */
4490 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4491 if (rc)
4492 return rc;
4493 vaddr = remap_pci_mem(paddr, 0x250);
4494 if (!vaddr)
4495 return -ENOMEM;
82eb03cf 4496
a6528d01
SC		 4497 /* find cfgtable in order to check if reset via doorbell is supported */
4498 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4499 &cfg_base_addr_index, &cfg_offset);
4500 if (rc)
4501 goto unmap_vaddr;
4502 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4503 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4504 if (!cfgtable) {
4505 rc = -ENOMEM;
4506 goto unmap_vaddr;
4507 }
82eb03cf 4508
a6528d01
SC		 4509 /* If reset via doorbell register is supported, use that. */
4510 misc_fw_support = readl(&cfgtable->misc_fw_support);
4511 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4512
a6528d01
SC		 4513 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4514 if (rc)
4515 goto unmap_cfgtable;
82eb03cf
CC		 4516
4517 /* Restore the PCI configuration space. The Open CISS
4518 * Specification says, "Restore the PCI Configuration
4519 * Registers, offsets 00h through 60h. It is important to
4520 * restore the command register, 16-bits at offset 04h,
4521 * last. Do not restore the configuration status register,
a6528d01
SC		 4522 * 16-bits at offset 06h." Note that the offset is 2*i.
4523 */
82eb03cf
CC		 4524 for (i = 0; i < 32; i++) {
4525 if (i == 2 || i == 3)
4526 continue;
4527 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4528 }
4529 wmb();
4530 pci_write_config_word(pdev, 4, saved_config_space[2]);
4531
a6528d01
SC		 4532 /* Some devices (notably the HP Smart Array 5i Controller)
4533 need a little pause here */
4534 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4535
4536 /* Controller should be in simple mode at this point. If it's not,
4537 * It means we're on one of those controllers which doesn't support
4538 * the doorbell reset method and on which the PCI power management reset
4539 * method doesn't work (P800, for example.)
4540 * In those cases, don't try to proceed, as it generally doesn't work.
4541 */
4542 active_transport = readl(&cfgtable->TransportActive);
4543 if (active_transport & PERFORMANT_MODE) {
4544 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4545 " Ignoring controller.\n");
4546 rc = -ENODEV;
4547 }
4548
4549unmap_cfgtable:
4550 iounmap(cfgtable);
4551
4552unmap_vaddr:
4553 iounmap(vaddr);
4554 return rc;
82eb03cf
CC		 4555}
4556
83123cb1
SC		 4557static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4558{
a6528d01 4559 int rc, i;
83123cb1
SC		 4560
4561 if (!reset_devices)
4562 return 0;
4563
a6528d01
SC		 4564 /* Reset the controller with a PCI power-cycle or via doorbell */
4565 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4566
a6528d01
SC		 4567 /* -ENOTSUPP here means we cannot reset the controller
4568 * but it's already (and still) up and running in
058a0f9f
SC		 4569 * "performant mode". Or, it might be 640x, which can't reset
4570 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4571 */
4572 if (rc == -ENOTSUPP)
4573 return 0; /* just try to do the kdump anyhow. */
4574 if (rc)
4575 return -ENODEV;
4576 if (cciss_reset_msi(pdev))
4577 return -ENODEV;
83123cb1
SC		 4578
4579 /* Now try to get the controller to respond to a no-op */
4580 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4581 if (cciss_noop(pdev) == 0)
4582 break;
4583 else
4584 dev_warn(&pdev->dev, "no-op failed%s\n",
4585 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4586 "; re-trying" : ""));
4587 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4588 }
82eb03cf
CC		 4589 return 0;
4590}
4591
1da177e4
LT		 4592/*
4593 * This is it. Find all the controllers and register them. I really hate
4594 * stealing all these major device numbers.
4595 * returns the number of block devices registered.
4596 */
4597static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4598 const struct pci_device_id *ent)
1da177e4 4599{
1da177e4 4600 int i;
799202cb 4601 int j = 0;
5c07a311 4602 int k = 0;
1da177e4 4603 int rc;
22bece00 4604 int dac, return_code;
212a5026 4605 InquiryData_struct *inq_buff;
f70dba83 4606 ctlr_info_t *h;
1da177e4 4607
83123cb1
SC		 4608 rc = cciss_init_reset_devices(pdev);
4609 if (rc)
4610 return rc;
b2a4a43d 4611 i = alloc_cciss_hba(pdev);
7c832835 4612 if (i < 0)
e2019b58 4613 return -1;
1f8ef380 4614
f70dba83
SC		 4615 h = hba[i];
4616 h->pdev = pdev;
4617 h->busy_initializing = 1;
4618 INIT_HLIST_HEAD(&h->cmpQ);
4619 INIT_HLIST_HEAD(&h->reqQ);
4620 mutex_init(&h->busy_shutting_down);
1f8ef380 4621
f70dba83 4622 if (cciss_pci_init(h) != 0)
2cfa948c 4623 goto clean_no_release_regions;
1da177e4 4624
f70dba83
SC		 4625 sprintf(h->devname, "cciss%d", i);
4626 h->ctlr = i;
1da177e4 4627
f70dba83 4628 init_completion(&h->scan_wait);
b368c9dd 4629
f70dba83 4630 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4631 goto clean0;
4632
1da177e4 4633 /* configure PCI DMA stuff */
6a35528a 4634 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4635 dac = 1;
284901a9 4636 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4637 dac = 0;
1da177e4 4638 else {
b2a4a43d 4639 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4640 goto clean1;
4641 }
4642
4643 /*
4644 * register with the major number, or get a dynamic major number
4645 * by passing 0 as argument. This is done for greater than
4646 * 8 controller support.
4647 */
4648 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4649 h->major = COMPAQ_CISS_MAJOR + i;
4650 rc = register_blkdev(h->major, h->devname);
7c832835 4651 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4652 dev_err(&h->pdev->dev,
4653 "Unable to get major number %d for %s "
f70dba83 4654 "on hba %d\n", h->major, h->devname, i);
1da177e4 4655 goto clean1;
7c832835 4656 } else {
1da177e4 4657 if (i >= MAX_CTLR_ORIG)
f70dba83 4658 h->major = rc;
1da177e4
LT		 4659 }
4660
4661 /* make sure the board interrupts are off */
f70dba83
SC		 4662 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4663 if (h->msi_vector || h->msix_vector) {
4664 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4665 do_cciss_msix_intr,
f70dba83 4666 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4667 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4668 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4669 goto clean2;
4670 }
4671 } else {
f70dba83
SC		 4672 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4673 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4674 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4675 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4676 goto clean2;
4677 }
1da177e4 4678 }
40aabb58 4679
b2a4a43d 4680 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4681 h->devname, pdev->device, pci_name(pdev),
4682 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4683
f70dba83
SC		 4684 h->cmd_pool_bits =
4685 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4686 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC		 4687 h->cmd_pool = (CommandList_struct *)
4688 pci_alloc_consistent(h->pdev,
4689 h->nr_cmds * sizeof(CommandList_struct),
4690 &(h->cmd_pool_dhandle));
4691 h->errinfo_pool = (ErrorInfo_struct *)
4692 pci_alloc_consistent(h->pdev,
4693 h->nr_cmds * sizeof(ErrorInfo_struct),
4694 &(h->errinfo_pool_dhandle));
4695 if ((h->cmd_pool_bits == NULL)
4696 || (h->cmd_pool == NULL)
4697 || (h->errinfo_pool == NULL)) {
b2a4a43d 4698 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT		 4699 goto clean4;
4700 }
5c07a311
DB		 4701
4702 /* Need space for temp scatter list */
f70dba83 4703 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB		 4704 sizeof(struct scatterlist *),
4705 GFP_KERNEL);
f70dba83
SC		 4706 for (k = 0; k < h->nr_cmds; k++) {
4707 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4708 h->maxsgentries,
5c07a311 4709 GFP_KERNEL);
f70dba83 4710 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC		 4711 dev_err(&h->pdev->dev,
4712 "could not allocate s/g lists\n");
5c07a311
DB		 4713 goto clean4;
4714 }
4715 }
f70dba83
SC		 4716 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4717 h->chainsize, h->nr_cmds);
4718 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4719 goto clean4;
5c07a311 4720
f70dba83 4721 spin_lock_init(&h->lock);
1da177e4 4722
7c832835 4723 /* Initialize the pdev driver private data.
f70dba83
SC		 4724 have it point to h. */
4725 pci_set_drvdata(pdev, h);
7c832835
BH		 4726 /* command and error info recs zeroed out before
4727 they are used */
f70dba83
SC		 4728 memset(h->cmd_pool_bits, 0,
4729 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4730 * sizeof(unsigned long));
1da177e4 4731
f70dba83
SC		 4732 h->num_luns = 0;
4733 h->highest_lun = -1;
6ae5ce8e 4734 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 4735 h->drv[j] = NULL;
4736 h->gendisk[j] = NULL;
6ae5ce8e 4737 }
1da177e4 4738
f70dba83 4739 cciss_scsi_setup(h);
1da177e4
LT		 4740
4741 /* Turn the interrupts on so we can service requests */
f70dba83 4742 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4743
22bece00
MM		 4744 /* Get the firmware version */
4745 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4746 if (inq_buff == NULL) {
b2a4a43d 4747 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 4748 goto clean4;
4749 }
4750
f70dba83 4751 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4752 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4753 if (return_code == IO_OK) {
f70dba83
SC		 4754 h->firm_ver[0] = inq_buff->data_byte[32];
4755 h->firm_ver[1] = inq_buff->data_byte[33];
4756 h->firm_ver[2] = inq_buff->data_byte[34];
4757 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4758 } else { /* send command failed */
b2a4a43d 4759 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 4760 " version of controller\n");
4761 }
212a5026 4762 kfree(inq_buff);
22bece00 4763
f70dba83 4764 cciss_procinit(h);
92c4231a 4765
f70dba83 4766 h->cciss_max_sectors = 8192;
92c4231a 4767
f70dba83
SC		 4768 rebuild_lun_table(h, 1, 0);
4769 h->busy_initializing = 0;
e2019b58 4770 return 1;
1da177e4 4771
6ae5ce8e 4772clean4:
f70dba83 4773 kfree(h->cmd_pool_bits);
5c07a311 4774 /* Free up sg elements */
f70dba83
SC		 4775 for (k = 0; k < h->nr_cmds; k++)
4776 kfree(h->scatter_list[k]);
4777 kfree(h->scatter_list);
4778 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4779 if (h->cmd_pool)
4780 pci_free_consistent(h->pdev,
4781 h->nr_cmds * sizeof(CommandList_struct),
4782 h->cmd_pool, h->cmd_pool_dhandle);
4783 if (h->errinfo_pool)
4784 pci_free_consistent(h->pdev,
4785 h->nr_cmds * sizeof(ErrorInfo_struct),
4786 h->errinfo_pool,
4787 h->errinfo_pool_dhandle);
4788 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4789clean2:
f70dba83 4790 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4791clean1:
f70dba83 4792 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4793clean0:
2cfa948c
SC		 4794 pci_release_regions(pdev);
4795clean_no_release_regions:
f70dba83 4796 h->busy_initializing = 0;
9cef0d2f 4797
872225ca
MM		 4798 /*
4799 * Deliberately omit pci_disable_device(): it does something nasty to
4800 * Smart Array controllers that pci_enable_device does not undo
4801 */
799202cb 4802 pci_set_drvdata(pdev, NULL);
f70dba83 4803 free_hba(h);
e2019b58 4804 return -1;
1da177e4
LT		 4805}
4806
e9ca75b5 4807static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4808{
29009a03
SC		 4809 ctlr_info_t *h;
4810 char *flush_buf;
7c832835 4811 int return_code;
1da177e4 4812
29009a03
SC		 4813 h = pci_get_drvdata(pdev);
4814 flush_buf = kzalloc(4, GFP_KERNEL);
4815 if (!flush_buf) {
b2a4a43d 4816 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4817 return;
e9ca75b5 4818 }
29009a03
SC		 4819 /* write all data in the battery backed cache to disk */
4820 memset(flush_buf, 0, 4);
f70dba83 4821 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 4822 4, 0, CTLR_LUNID, TYPE_CMD);
4823 kfree(flush_buf);
4824 if (return_code != IO_OK)
b2a4a43d 4825 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4826 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4827 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 4828}
4829
4830static void __devexit cciss_remove_one(struct pci_dev *pdev)
4831{
f70dba83 4832 ctlr_info_t *h;
e9ca75b5
GB		 4833 int i, j;
4834
7c832835 4835 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4836 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 4837 return;
4838 }
0a9279cc 4839
f70dba83
SC		 4840 h = pci_get_drvdata(pdev);
4841 i = h->ctlr;
7c832835 4842 if (hba[i] == NULL) {
b2a4a43d 4843 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 4844 return;
4845 }
b6550777 4846
f70dba83 4847 mutex_lock(&h->busy_shutting_down);
0a9279cc 4848
f70dba83
SC		 4849 remove_from_scan_list(h);
4850 remove_proc_entry(h->devname, proc_cciss);
4851 unregister_blkdev(h->major, h->devname);
b6550777
BH		 4852
4853 /* remove it from the disk list */
4854 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4855 struct gendisk *disk = h->gendisk[j];
b6550777 4856 if (disk) {
165125e1 4857 struct request_queue *q = disk->queue;
b6550777 4858
097d0264 4859 if (disk->flags & GENHD_FL_UP) {
f70dba83 4860 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4861 del_gendisk(disk);
097d0264 4862 }
b6550777
BH		 4863 if (q)
4864 blk_cleanup_queue(q);
4865 }
4866 }
4867
ba198efb 4868#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4869 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4870#endif
b6550777 4871
e9ca75b5 4872 cciss_shutdown(pdev);
fb86a35b
MM		 4873
4874#ifdef CONFIG_PCI_MSI
f70dba83
SC		 4875 if (h->msix_vector)
4876 pci_disable_msix(h->pdev);
4877 else if (h->msi_vector)
4878 pci_disable_msi(h->pdev);
7c832835 4879#endif /* CONFIG_PCI_MSI */
fb86a35b 4880
f70dba83
SC		 4881 iounmap(h->transtable);
4882 iounmap(h->cfgtable);
4883 iounmap(h->vaddr);
1da177e4 4884
f70dba83
SC		 4885 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4886 h->cmd_pool, h->cmd_pool_dhandle);
4887 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4888 h->errinfo_pool, h->errinfo_pool_dhandle);
4889 kfree(h->cmd_pool_bits);
5c07a311 4890 /* Free up sg elements */
f70dba83
SC		 4891 for (j = 0; j < h->nr_cmds; j++)
4892 kfree(h->scatter_list[j]);
4893 kfree(h->scatter_list);
4894 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM		 4895 /*
4896 * Deliberately omit pci_disable_device(): it does something nasty to
4897 * Smart Array controllers that pci_enable_device does not undo
4898 */
7c832835 4899 pci_release_regions(pdev);
4e570309 4900 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 4901 cciss_destroy_hba_sysfs_entry(h);
4902 mutex_unlock(&h->busy_shutting_down);
4903 free_hba(h);
7c832835 4904}
1da177e4
LT		 4905
4906static struct pci_driver cciss_pci_driver = {
7c832835
BH		 4907 .name = "cciss",
4908 .probe = cciss_init_one,
4909 .remove = __devexit_p(cciss_remove_one),
4910 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4911 .shutdown = cciss_shutdown,
1da177e4
LT		 4912};
4913
4914/*
4915 * This is it. Register the PCI driver information for the cards we control
7c832835 4916 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 4917 */
4918static int __init cciss_init(void)
4919{
7fe06326
AP		 4920 int err;
4921
10cbda97
JA		 4922 /*
4923 * The hardware requires that commands are aligned on a 64-bit
4924 * boundary. Given that we use pci_alloc_consistent() to allocate an
4925 * array of them, the size must be a multiple of 8 bytes.
4926 */
1b7d0d28 4927 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 4928 printk(KERN_INFO DRIVER_NAME "\n");
4929
7fe06326
AP		 4930 err = bus_register(&cciss_bus_type);
4931 if (err)
4932 return err;
4933
b368c9dd
AP		 4934 /* Start the scan thread */
4935 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4936 if (IS_ERR(cciss_scan_thread)) {
4937 err = PTR_ERR(cciss_scan_thread);
4938 goto err_bus_unregister;
4939 }
4940
1da177e4 4941 /* Register for our PCI devices */
7fe06326
AP		 4942 err = pci_register_driver(&cciss_pci_driver);
4943 if (err)
b368c9dd 4944 goto err_thread_stop;
7fe06326 4945
617e1344 4946 return err;
7fe06326 4947
b368c9dd
AP		 4948err_thread_stop:
4949 kthread_stop(cciss_scan_thread);
4950err_bus_unregister:
7fe06326 4951 bus_unregister(&cciss_bus_type);
b368c9dd 4952
7fe06326 4953 return err;
1da177e4
LT		 4954}
4955
4956static void __exit cciss_cleanup(void)
4957{
4958 int i;
4959
4960 pci_unregister_driver(&cciss_pci_driver);
4961 /* double check that all controller entrys have been removed */
7c832835
BH		 4962 for (i = 0; i < MAX_CTLR; i++) {
4963 if (hba[i] != NULL) {
b2a4a43d
SC		 4964 dev_warn(&hba[i]->pdev->dev,
4965 "had to remove controller\n");
1da177e4
LT		 4966 cciss_remove_one(hba[i]->pdev);
4967 }
4968 }
b368c9dd 4969 kthread_stop(cciss_scan_thread);
928b4d8c 4970 remove_proc_entry("driver/cciss", NULL);
7fe06326 4971 bus_unregister(&cciss_bus_type);
1da177e4
LT		 4972}
4973
4974module_init(cciss_init);
4975module_exit(cciss_cleanup);
Linux kernel - Deliverables
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