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cciss: do not attempt PCI power management reset method if we know it won't work.
[deliverable/linux.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/major.h>
31#include <linux/fs.h>
32#include <linux/bio.h>
33#include <linux/blkpg.h>
34#include <linux/timer.h>
35#include <linux/proc_fs.h>
89b6e743 36#include <linux/seq_file.h>
7c832835 37#include <linux/init.h>
4d761609 38#include <linux/jiffies.h>
1da177e4
LT		 39#include <linux/hdreg.h>
40#include <linux/spinlock.h>
41#include <linux/compat.h>
b368c9dd 42#include <linux/mutex.h>
1da177e4
LT		 43#include <asm/uaccess.h>
44#include <asm/io.h>
45
eb0df996 46#include <linux/dma-mapping.h>
1da177e4
LT		 47#include <linux/blkdev.h>
48#include <linux/genhd.h>
49#include <linux/completion.h>
d5d3b736 50#include <scsi/scsi.h>
03bbfee5
MMOD		 51#include <scsi/sg.h>
52#include <scsi/scsi_ioctl.h>
53#include <linux/cdrom.h>
231bc2a2 54#include <linux/scatterlist.h>
0a9279cc 55#include <linux/kthread.h>
1da177e4
LT		 56
57#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 58#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 60
61/* Embedded module documentation macros - see modules.h */
62MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 63MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 64MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65MODULE_VERSION("3.6.26");
1da177e4
LT		 66MODULE_LICENSE("GPL");
67
2a48fc0a 68static DEFINE_MUTEX(cciss_mutex);
bbe425cd 69static struct proc_dir_entry *proc_cciss;
2ec24ff1 70
1da177e4
LT		 71#include "cciss_cmd.h"
72#include "cciss.h"
73#include <linux/cciss_ioctl.h>
74
75/* define the PCI info for the cards we can control */
76static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 97 {0,}
98};
7c832835 99
1da177e4
LT		 100MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
101
1da177e4
LT		 102/* board_id = Subsystem Device ID & Vendor ID
103 * product = Marketing Name for the board
7c832835 104 * access = Address of the struct of function pointers
1da177e4
LT		 105 */
106static struct board_type products[] = {
49153998
MM		 107 {0x40700E11, "Smart Array 5300", &SA5_access},
108 {0x40800E11, "Smart Array 5i", &SA5B_access},
109 {0x40820E11, "Smart Array 532", &SA5B_access},
110 {0x40830E11, "Smart Array 5312", &SA5B_access},
111 {0x409A0E11, "Smart Array 641", &SA5_access},
112 {0x409B0E11, "Smart Array 642", &SA5_access},
113 {0x409C0E11, "Smart Array 6400", &SA5_access},
114 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
115 {0x40910E11, "Smart Array 6i", &SA5_access},
116 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 117 {0x3223103C, "Smart Array P800", &SA5_access},
118 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 119 {0x3235103C, "Smart Array P400i", &SA5_access},
120 {0x3211103C, "Smart Array E200i", &SA5_access},
121 {0x3212103C, "Smart Array E200", &SA5_access},
122 {0x3213103C, "Smart Array E200i", &SA5_access},
123 {0x3214103C, "Smart Array E200i", &SA5_access},
124 {0x3215103C, "Smart Array E200i", &SA5_access},
125 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 126 {0x3223103C, "Smart Array P800", &SA5_access},
127 {0x3234103C, "Smart Array P400", &SA5_access},
49153998 128 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 129};
130
d14c4ab5 131/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 132#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 133#define MAX_IOCTL_CONFIG_WAIT 1000
134
135/*define how many times we will try a command because of bus resets */
136#define MAX_CMD_RETRIES 3
137
1da177e4
LT		 138#define MAX_CTLR 32
139
140/* Originally cciss driver only supports 8 major numbers */
141#define MAX_CTLR_ORIG 8
142
1da177e4
LT		 143static ctlr_info_t *hba[MAX_CTLR];
144
b368c9dd
AP		 145static struct task_struct *cciss_scan_thread;
146static DEFINE_MUTEX(scan_mutex);
147static LIST_HEAD(scan_q);
148
165125e1 149static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 150static irqreturn_t do_cciss_intx(int irq, void *dev_id);
151static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 152static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 153static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 154static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 155static int do_ioctl(struct block_device *bdev, fmode_t mode,
156 unsigned int cmd, unsigned long arg);
ef7822c2 157static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 158 unsigned int cmd, unsigned long arg);
a885c8c4 159static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 160
1da177e4 161static int cciss_revalidate(struct gendisk *disk);
2d11d993 162static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 163static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 164 int clear_all, int via_ioctl);
1da177e4 165
f70dba83 166static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 167 sector_t *total_size, unsigned int *block_size);
f70dba83 168static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 169 sector_t *total_size, unsigned int *block_size);
f70dba83 170static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 171 sector_t total_size,
00988a35 172 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 173 drive_info_struct *drv);
dac5488a 174static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 175static void start_io(ctlr_info_t *h);
f70dba83 176static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 177 __u8 page_code, unsigned char scsi3addr[],
178 int cmd_type);
85cc61ae 179static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
180 int attempt_retry);
181static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 182
d6f4965d 183static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 184static int scan_thread(void *data);
185static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 186static void cciss_hba_release(struct device *dev);
187static void cciss_device_release(struct device *dev);
361e9b07 188static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 189static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 190static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 191static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
192 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
193 u64 *cfg_offset);
194static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
195 unsigned long *memory_bar);
16011131 196static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
62710ae1
SC		 197static __devinit int write_driver_ver_to_cfgtable(
198 CfgTable_struct __iomem *cfgtable);
33079b21 199
5e216153
MM		 200/* performant mode helper functions */
201static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
202 int *bucket_map);
203static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 204
1da177e4 205#ifdef CONFIG_PROC_FS
f70dba83 206static void cciss_procinit(ctlr_info_t *h);
1da177e4 207#else
f70dba83 208static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 209{
210}
211#endif /* CONFIG_PROC_FS */
1da177e4
LT		 212
213#ifdef CONFIG_COMPAT
ef7822c2
AV		 214static int cciss_compat_ioctl(struct block_device *, fmode_t,
215 unsigned, unsigned long);
1da177e4
LT		 216#endif
217
83d5cde4 218static const struct block_device_operations cciss_fops = {
7c832835 219 .owner = THIS_MODULE,
6e9624b8 220 .open = cciss_unlocked_open,
ef7822c2 221 .release = cciss_release,
8a6cfeb6 222 .ioctl = do_ioctl,
7c832835 223 .getgeo = cciss_getgeo,
1da177e4 224#ifdef CONFIG_COMPAT
ef7822c2 225 .compat_ioctl = cciss_compat_ioctl,
1da177e4 226#endif
7c832835 227 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 228};
229
5e216153
MM		 230/* set_performant_mode: Modify the tag for cciss performant
231 * set bit 0 for pull model, bits 3-1 for block fetch
232 * register number
233 */
234static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
235{
0498cc2a 236 if (likely(h->transMethod & CFGTBL_Trans_Performant))
5e216153
MM		 237 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
238}
239
1da177e4
LT		 240/*
241 * Enqueuing and dequeuing functions for cmdlists.
242 */
e6e1ee93 243static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 244{
e6e1ee93 245 list_add_tail(&c->list, list);
1da177e4
LT		 246}
247
8a3173de 248static inline void removeQ(CommandList_struct *c)
1da177e4 249{
b59e64d0
HR		 250 /*
251 * After kexec/dump some commands might still
252 * be in flight, which the firmware will try
253 * to complete. Resetting the firmware doesn't work
254 * with old fw revisions, so we have to mark
255 * them off as 'stale' to prevent the driver from
256 * falling over.
257 */
e6e1ee93 258 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 259 c->cmd_type = CMD_MSG_STALE;
8a3173de 260 return;
b59e64d0 261 }
8a3173de 262
e6e1ee93 263 list_del_init(&c->list);
1da177e4
LT		 264}
265
664a717d
MM		 266static void enqueue_cmd_and_start_io(ctlr_info_t *h,
267 CommandList_struct *c)
268{
269 unsigned long flags;
5e216153 270 set_performant_mode(h, c);
664a717d
MM		 271 spin_lock_irqsave(&h->lock, flags);
272 addQ(&h->reqQ, c);
273 h->Qdepth++;
2a643ec6
SC		 274 if (h->Qdepth > h->maxQsinceinit)
275 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 276 start_io(h);
277 spin_unlock_irqrestore(&h->lock, flags);
278}
279
dccc9b56 280static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 281 int nr_cmds)
282{
283 int i;
284
285 if (!cmd_sg_list)
286 return;
287 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 288 kfree(cmd_sg_list[i]);
289 cmd_sg_list[i] = NULL;
49fc5601
SC		 290 }
291 kfree(cmd_sg_list);
292}
293
dccc9b56
SC		 294static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
295 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 296{
297 int j;
dccc9b56 298 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 299
300 if (chainsize <= 0)
301 return NULL;
302
303 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
304 if (!cmd_sg_list)
305 return NULL;
306
307 /* Build up chain blocks for each command */
308 for (j = 0; j < nr_cmds; j++) {
49fc5601 309 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 310 cmd_sg_list[j] = kmalloc((chainsize *
311 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
312 if (!cmd_sg_list[j]) {
49fc5601
SC		 313 dev_err(&h->pdev->dev, "Cannot get memory "
314 "for s/g chains.\n");
315 goto clean;
316 }
317 }
318 return cmd_sg_list;
319clean:
320 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
321 return NULL;
322}
323
d45033ef
SC		 324static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
325{
326 SGDescriptor_struct *chain_sg;
327 u64bit temp64;
328
329 if (c->Header.SGTotal <= h->max_cmd_sgentries)
330 return;
331
332 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
333 temp64.val32.lower = chain_sg->Addr.lower;
334 temp64.val32.upper = chain_sg->Addr.upper;
335 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
336}
337
338static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
339 SGDescriptor_struct *chain_block, int len)
340{
341 SGDescriptor_struct *chain_sg;
342 u64bit temp64;
343
344 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
345 chain_sg->Ext = CCISS_SG_CHAIN;
346 chain_sg->Len = len;
347 temp64.val = pci_map_single(h->pdev, chain_block, len,
348 PCI_DMA_TODEVICE);
349 chain_sg->Addr.lower = temp64.val32.lower;
350 chain_sg->Addr.upper = temp64.val32.upper;
351}
352
1da177e4
LT		 353#include "cciss_scsi.c" /* For SCSI tape support */
354
1e6f2dc1
AB		 355static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
356 "UNKNOWN"
357};
0e4a9d03 358#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 359
1da177e4
LT		 360#ifdef CONFIG_PROC_FS
361
362/*
363 * Report information about this controller.
364 */
365#define ENG_GIG 1000000000
366#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 367#define ENGAGE_SCSI "engage scsi"
1da177e4 368
89b6e743 369static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 370{
89b6e743
MM		 371 ctlr_info_t *h = seq->private;
372
373 seq_printf(seq, "%s: HP %s Controller\n"
374 "Board ID: 0x%08lx\n"
375 "Firmware Version: %c%c%c%c\n"
376 "IRQ: %d\n"
377 "Logical drives: %d\n"
378 "Current Q depth: %d\n"
379 "Current # commands on controller: %d\n"
380 "Max Q depth since init: %d\n"
381 "Max # commands on controller since init: %d\n"
382 "Max SG entries since init: %d\n",
383 h->devname,
384 h->product_name,
385 (unsigned long)h->board_id,
386 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 387 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 388 h->num_luns,
389 h->Qdepth, h->commands_outstanding,
390 h->maxQsinceinit, h->max_outstanding, h->maxSG);
391
392#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 393 cciss_seq_tape_report(seq, h);
89b6e743
MM		 394#endif /* CONFIG_CISS_SCSI_TAPE */
395}
1da177e4 396
89b6e743
MM		 397static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
398{
399 ctlr_info_t *h = seq->private;
89b6e743 400 unsigned long flags;
1da177e4
LT		 401
402 /* prevent displaying bogus info during configuration
403 * or deconfiguration of a logical volume
404 */
f70dba83 405 spin_lock_irqsave(&h->lock, flags);
1da177e4 406 if (h->busy_configuring) {
f70dba83 407 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 408 return ERR_PTR(-EBUSY);
1da177e4
LT		 409 }
410 h->busy_configuring = 1;
f70dba83 411 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 412
89b6e743
MM		 413 if (*pos == 0)
414 cciss_seq_show_header(seq);
415
416 return pos;
417}
418
419static int cciss_seq_show(struct seq_file *seq, void *v)
420{
421 sector_t vol_sz, vol_sz_frac;
422 ctlr_info_t *h = seq->private;
423 unsigned ctlr = h->ctlr;
424 loff_t *pos = v;
9cef0d2f 425 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 426
427 if (*pos > h->highest_lun)
428 return 0;
429
531c2dc7
SC		 430 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
431 return 0;
432
89b6e743
MM		 433 if (drv->heads == 0)
434 return 0;
435
436 vol_sz = drv->nr_blocks;
437 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
438 vol_sz_frac *= 100;
439 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
440
fa52bec9 441 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 442 drv->raid_level = RAID_UNKNOWN;
443 seq_printf(seq, "cciss/c%dd%d:"
444 "\t%4u.%02uGB\tRAID %s\n",
445 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
446 raid_label[drv->raid_level]);
447 return 0;
448}
449
450static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
451{
452 ctlr_info_t *h = seq->private;
453
454 if (*pos > h->highest_lun)
455 return NULL;
456 *pos += 1;
457
458 return pos;
459}
460
461static void cciss_seq_stop(struct seq_file *seq, void *v)
462{
463 ctlr_info_t *h = seq->private;
464
465 /* Only reset h->busy_configuring if we succeeded in setting
466 * it during cciss_seq_start. */
467 if (v == ERR_PTR(-EBUSY))
468 return;
7c832835 469
1da177e4 470 h->busy_configuring = 0;
1da177e4
LT		 471}
472
88e9d34c 473static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 474 .start = cciss_seq_start,
475 .show = cciss_seq_show,
476 .next = cciss_seq_next,
477 .stop = cciss_seq_stop,
478};
479
480static int cciss_seq_open(struct inode *inode, struct file *file)
481{
482 int ret = seq_open(file, &cciss_seq_ops);
483 struct seq_file *seq = file->private_data;
484
485 if (!ret)
486 seq->private = PDE(inode)->data;
487
488 return ret;
489}
490
491static ssize_t
492cciss_proc_write(struct file *file, const char __user *buf,
493 size_t length, loff_t *ppos)
1da177e4 494{
89b6e743
MM		 495 int err;
496 char *buffer;
497
498#ifndef CONFIG_CISS_SCSI_TAPE
499 return -EINVAL;
1da177e4
LT		 500#endif
501
89b6e743 502 if (!buf || length > PAGE_SIZE - 1)
7c832835 503 return -EINVAL;
89b6e743
MM		 504
505 buffer = (char *)__get_free_page(GFP_KERNEL);
506 if (!buffer)
507 return -ENOMEM;
508
509 err = -EFAULT;
510 if (copy_from_user(buffer, buf, length))
511 goto out;
512 buffer[length] = '\0';
513
514#ifdef CONFIG_CISS_SCSI_TAPE
515 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
516 struct seq_file *seq = file->private_data;
517 ctlr_info_t *h = seq->private;
89b6e743 518
f70dba83 519 err = cciss_engage_scsi(h);
8721c81f 520 if (err == 0)
89b6e743
MM		 521 err = length;
522 } else
523#endif /* CONFIG_CISS_SCSI_TAPE */
524 err = -EINVAL;
7c832835
BH		 525 /* might be nice to have "disengage" too, but it's not
526 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 527
528out:
529 free_page((unsigned long)buffer);
530 return err;
1da177e4
LT		 531}
532
828c0950 533static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 534 .owner = THIS_MODULE,
535 .open = cciss_seq_open,
536 .read = seq_read,
537 .llseek = seq_lseek,
538 .release = seq_release,
539 .write = cciss_proc_write,
540};
541
f70dba83 542static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 543{
544 struct proc_dir_entry *pde;
545
89b6e743 546 if (proc_cciss == NULL)
928b4d8c 547 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 548 if (!proc_cciss)
549 return;
f70dba83 550 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 551 S_IROTH, proc_cciss,
f70dba83 552 &cciss_proc_fops, h);
1da177e4 553}
7c832835 554#endif /* CONFIG_PROC_FS */
1da177e4 555
7fe06326
AP		 556#define MAX_PRODUCT_NAME_LEN 19
557
558#define to_hba(n) container_of(n, struct ctlr_info, dev)
559#define to_drv(n) container_of(n, drive_info_struct, dev)
560
ec52d5f1 561/* List of controllers which cannot be hard reset on kexec with reset_devices */
957c2ec5
SC		 562static u32 unresettable_controller[] = {
563 0x324a103C, /* Smart Array P712m */
564 0x324b103C, /* SmartArray P711m */
565 0x3223103C, /* Smart Array P800 */
566 0x3234103C, /* Smart Array P400 */
567 0x3235103C, /* Smart Array P400i */
568 0x3211103C, /* Smart Array E200i */
569 0x3212103C, /* Smart Array E200 */
570 0x3213103C, /* Smart Array E200i */
571 0x3214103C, /* Smart Array E200i */
572 0x3215103C, /* Smart Array E200i */
573 0x3237103C, /* Smart Array E500 */
574 0x323D103C, /* Smart Array P700m */
575 0x409C0E11, /* Smart Array 6400 */
576 0x409D0E11, /* Smart Array 6400 EM */
577};
578
ec52d5f1
SC		 579/* List of controllers which cannot even be soft reset */
580static u32 soft_unresettable_controller[] = {
581 0x409C0E11, /* Smart Array 6400 */
582 0x409D0E11, /* Smart Array 6400 EM */
583};
584
585static int ctlr_is_hard_resettable(u32 board_id)
957c2ec5
SC		 586{
587 int i;
588
589 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
ec52d5f1 590 if (unresettable_controller[i] == board_id)
957c2ec5
SC		 591 return 0;
592 return 1;
593}
594
ec52d5f1
SC		 595static int ctlr_is_soft_resettable(u32 board_id)
596{
597 int i;
598
599 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
600 if (soft_unresettable_controller[i] == board_id)
601 return 0;
602 return 1;
603}
604
605static int ctlr_is_resettable(u32 board_id)
606{
607 return ctlr_is_hard_resettable(board_id) ||
608 ctlr_is_soft_resettable(board_id);
609}
610
957c2ec5
SC		 611static ssize_t host_show_resettable(struct device *dev,
612 struct device_attribute *attr,
613 char *buf)
614{
615 struct ctlr_info *h = to_hba(dev);
616
ec52d5f1 617 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
957c2ec5
SC		 618}
619static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
620
d6f4965d
AP		 621static ssize_t host_store_rescan(struct device *dev,
622 struct device_attribute *attr,
623 const char *buf, size_t count)
624{
625 struct ctlr_info *h = to_hba(dev);
626
627 add_to_scan_list(h);
628 wake_up_process(cciss_scan_thread);
629 wait_for_completion_interruptible(&h->scan_wait);
630
631 return count;
632}
8ba95c69 633static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 634
635static ssize_t dev_show_unique_id(struct device *dev,
636 struct device_attribute *attr,
637 char *buf)
638{
639 drive_info_struct *drv = to_drv(dev);
640 struct ctlr_info *h = to_hba(drv->dev.parent);
641 __u8 sn[16];
642 unsigned long flags;
643 int ret = 0;
644
f70dba83 645 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 646 if (h->busy_configuring)
647 ret = -EBUSY;
648 else
649 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 650 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 651
652 if (ret)
653 return ret;
654 else
655 return snprintf(buf, 16 * 2 + 2,
656 "%02X%02X%02X%02X%02X%02X%02X%02X"
657 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
658 sn[0], sn[1], sn[2], sn[3],
659 sn[4], sn[5], sn[6], sn[7],
660 sn[8], sn[9], sn[10], sn[11],
661 sn[12], sn[13], sn[14], sn[15]);
662}
8ba95c69 663static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 664
665static ssize_t dev_show_vendor(struct device *dev,
666 struct device_attribute *attr,
667 char *buf)
668{
669 drive_info_struct *drv = to_drv(dev);
670 struct ctlr_info *h = to_hba(drv->dev.parent);
671 char vendor[VENDOR_LEN + 1];
672 unsigned long flags;
673 int ret = 0;
674
f70dba83 675 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 676 if (h->busy_configuring)
677 ret = -EBUSY;
678 else
679 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 680 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 681
682 if (ret)
683 return ret;
684 else
685 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
686}
8ba95c69 687static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 688
689static ssize_t dev_show_model(struct device *dev,
690 struct device_attribute *attr,
691 char *buf)
692{
693 drive_info_struct *drv = to_drv(dev);
694 struct ctlr_info *h = to_hba(drv->dev.parent);
695 char model[MODEL_LEN + 1];
696 unsigned long flags;
697 int ret = 0;
698
f70dba83 699 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 700 if (h->busy_configuring)
701 ret = -EBUSY;
702 else
703 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 704 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 705
706 if (ret)
707 return ret;
708 else
709 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
710}
8ba95c69 711static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 712
713static ssize_t dev_show_rev(struct device *dev,
714 struct device_attribute *attr,
715 char *buf)
716{
717 drive_info_struct *drv = to_drv(dev);
718 struct ctlr_info *h = to_hba(drv->dev.parent);
719 char rev[REV_LEN + 1];
720 unsigned long flags;
721 int ret = 0;
722
f70dba83 723 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 724 if (h->busy_configuring)
725 ret = -EBUSY;
726 else
727 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 728 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 729
730 if (ret)
731 return ret;
732 else
733 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
734}
8ba95c69 735static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 736
ce84a8ae
SC		 737static ssize_t cciss_show_lunid(struct device *dev,
738 struct device_attribute *attr, char *buf)
739{
9cef0d2f
SC		 740 drive_info_struct *drv = to_drv(dev);
741 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 742 unsigned long flags;
743 unsigned char lunid[8];
744
f70dba83 745 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 746 if (h->busy_configuring) {
f70dba83 747 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 748 return -EBUSY;
749 }
750 if (!drv->heads) {
f70dba83 751 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 752 return -ENOTTY;
753 }
754 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 755 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 756 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
757 lunid[0], lunid[1], lunid[2], lunid[3],
758 lunid[4], lunid[5], lunid[6], lunid[7]);
759}
8ba95c69 760static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 761
3ff1111d
SC		 762static ssize_t cciss_show_raid_level(struct device *dev,
763 struct device_attribute *attr, char *buf)
764{
9cef0d2f
SC		 765 drive_info_struct *drv = to_drv(dev);
766 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 767 int raid;
768 unsigned long flags;
769
f70dba83 770 spin_lock_irqsave(&h->lock, flags);
3ff1111d 771 if (h->busy_configuring) {
f70dba83 772 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 773 return -EBUSY;
774 }
775 raid = drv->raid_level;
f70dba83 776 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 777 if (raid < 0 || raid > RAID_UNKNOWN)
778 raid = RAID_UNKNOWN;
779
780 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
781 raid_label[raid]);
782}
8ba95c69 783static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 784
e272afec
SC		 785static ssize_t cciss_show_usage_count(struct device *dev,
786 struct device_attribute *attr, char *buf)
787{
9cef0d2f
SC		 788 drive_info_struct *drv = to_drv(dev);
789 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 790 unsigned long flags;
791 int count;
792
f70dba83 793 spin_lock_irqsave(&h->lock, flags);
e272afec 794 if (h->busy_configuring) {
f70dba83 795 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 796 return -EBUSY;
797 }
798 count = drv->usage_count;
f70dba83 799 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 800 return snprintf(buf, 20, "%d\n", count);
801}
8ba95c69 802static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 803
d6f4965d
AP		 804static struct attribute *cciss_host_attrs[] = {
805 &dev_attr_rescan.attr,
957c2ec5 806 &dev_attr_resettable.attr,
d6f4965d
AP		 807 NULL
808};
809
810static struct attribute_group cciss_host_attr_group = {
811 .attrs = cciss_host_attrs,
812};
813
9f792d9f 814static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 815 &cciss_host_attr_group,
816 NULL
817};
818
819static struct device_type cciss_host_type = {
820 .name = "cciss_host",
821 .groups = cciss_host_attr_groups,
617e1344 822 .release = cciss_hba_release,
d6f4965d
AP		 823};
824
7fe06326
AP		 825static struct attribute *cciss_dev_attrs[] = {
826 &dev_attr_unique_id.attr,
827 &dev_attr_model.attr,
828 &dev_attr_vendor.attr,
829 &dev_attr_rev.attr,
ce84a8ae 830 &dev_attr_lunid.attr,
3ff1111d 831 &dev_attr_raid_level.attr,
e272afec 832 &dev_attr_usage_count.attr,
7fe06326
AP		 833 NULL
834};
835
836static struct attribute_group cciss_dev_attr_group = {
837 .attrs = cciss_dev_attrs,
838};
839
a4dbd674 840static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 841 &cciss_dev_attr_group,
842 NULL
843};
844
845static struct device_type cciss_dev_type = {
846 .name = "cciss_device",
847 .groups = cciss_dev_attr_groups,
617e1344 848 .release = cciss_device_release,
7fe06326
AP		 849};
850
851static struct bus_type cciss_bus_type = {
852 .name = "cciss",
853};
854
617e1344
SC		 855/*
856 * cciss_hba_release is called when the reference count
857 * of h->dev goes to zero.
858 */
859static void cciss_hba_release(struct device *dev)
860{
861 /*
862 * nothing to do, but need this to avoid a warning
863 * about not having a release handler from lib/kref.c.
864 */
865}
7fe06326
AP		 866
867/*
868 * Initialize sysfs entry for each controller. This sets up and registers
869 * the 'cciss#' directory for each individual controller under
870 * /sys/bus/pci/devices/<dev>/.
871 */
872static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
873{
874 device_initialize(&h->dev);
875 h->dev.type = &cciss_host_type;
876 h->dev.bus = &cciss_bus_type;
877 dev_set_name(&h->dev, "%s", h->devname);
878 h->dev.parent = &h->pdev->dev;
879
880 return device_add(&h->dev);
881}
882
883/*
884 * Remove sysfs entries for an hba.
885 */
886static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
887{
888 device_del(&h->dev);
617e1344
SC		 889 put_device(&h->dev); /* final put. */
890}
891
892/* cciss_device_release is called when the reference count
9cef0d2f 893 * of h->drv[x]dev goes to zero.
617e1344
SC		 894 */
895static void cciss_device_release(struct device *dev)
896{
9cef0d2f
SC		 897 drive_info_struct *drv = to_drv(dev);
898 kfree(drv);
7fe06326
AP		 899}
900
901/*
902 * Initialize sysfs for each logical drive. This sets up and registers
903 * the 'c#d#' directory for each individual logical drive under
904 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
905 * /sys/block/cciss!c#d# to this entry.
906 */
617e1344 907static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 908 int drv_index)
909{
617e1344
SC		 910 struct device *dev;
911
9cef0d2f 912 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 913 return 0;
914
9cef0d2f 915 dev = &h->drv[drv_index]->dev;
617e1344
SC		 916 device_initialize(dev);
917 dev->type = &cciss_dev_type;
918 dev->bus = &cciss_bus_type;
919 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
920 dev->parent = &h->dev;
9cef0d2f 921 h->drv[drv_index]->device_initialized = 1;
617e1344 922 return device_add(dev);
7fe06326
AP		 923}
924
925/*
926 * Remove sysfs entries for a logical drive.
927 */
8ce51966
SC		 928static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
929 int ctlr_exiting)
7fe06326 930{
9cef0d2f 931 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 932
933 /* special case for c*d0, we only destroy it on controller exit */
934 if (drv_index == 0 && !ctlr_exiting)
935 return;
936
617e1344
SC		 937 device_del(dev);
938 put_device(dev); /* the "final" put. */
9cef0d2f 939 h->drv[drv_index] = NULL;
7fe06326
AP		 940}
941
7c832835
BH		 942/*
943 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 944 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 945 * which ones are free or in use.
7c832835 946 */
6b4d96b8 947static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 948{
949 CommandList_struct *c;
7c832835 950 int i;
1da177e4
LT		 951 u64bit temp64;
952 dma_addr_t cmd_dma_handle, err_dma_handle;
953
6b4d96b8
SC		 954 do {
955 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
956 if (i == h->nr_cmds)
7c832835 957 return NULL;
6b4d96b8
SC		 958 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
959 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 960 c = h->cmd_pool + i;
961 memset(c, 0, sizeof(CommandList_struct));
962 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
963 c->err_info = h->errinfo_pool + i;
964 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
965 err_dma_handle = h->errinfo_pool_dhandle
966 + i * sizeof(ErrorInfo_struct);
967 h->nr_allocs++;
1da177e4 968
6b4d96b8 969 c->cmdindex = i;
33079b21 970
e6e1ee93 971 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 972 c->busaddr = (__u32) cmd_dma_handle;
973 temp64.val = (__u64) err_dma_handle;
974 c->ErrDesc.Addr.lower = temp64.val32.lower;
975 c->ErrDesc.Addr.upper = temp64.val32.upper;
976 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 977
6b4d96b8
SC		 978 c->ctlr = h->ctlr;
979 return c;
980}
33079b21 981
6b4d96b8
SC		 982/* allocate a command using pci_alloc_consistent, used for ioctls,
983 * etc., not for the main i/o path.
984 */
985static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
986{
987 CommandList_struct *c;
988 u64bit temp64;
989 dma_addr_t cmd_dma_handle, err_dma_handle;
990
991 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
992 sizeof(CommandList_struct), &cmd_dma_handle);
993 if (c == NULL)
994 return NULL;
995 memset(c, 0, sizeof(CommandList_struct));
996
997 c->cmdindex = -1;
998
999 c->err_info = (ErrorInfo_struct *)
1000 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1001 &err_dma_handle);
1002
1003 if (c->err_info == NULL) {
1004 pci_free_consistent(h->pdev,
1005 sizeof(CommandList_struct), c, cmd_dma_handle);
1006 return NULL;
7c832835 1007 }
6b4d96b8 1008 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 1009
e6e1ee93 1010 INIT_LIST_HEAD(&c->list);
1da177e4 1011 c->busaddr = (__u32) cmd_dma_handle;
7c832835 1012 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 1013 c->ErrDesc.Addr.lower = temp64.val32.lower;
1014 c->ErrDesc.Addr.upper = temp64.val32.upper;
1015 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 1016
7c832835
BH		 1017 c->ctlr = h->ctlr;
1018 return c;
1da177e4
LT		 1019}
1020
6b4d96b8 1021static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 1022{
1023 int i;
6b4d96b8
SC		 1024
1025 i = c - h->cmd_pool;
1026 clear_bit(i & (BITS_PER_LONG - 1),
1027 h->cmd_pool_bits + (i / BITS_PER_LONG));
1028 h->nr_frees++;
1029}
1030
1031static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1032{
1da177e4
LT		 1033 u64bit temp64;
1034
6b4d96b8
SC		 1035 temp64.val32.lower = c->ErrDesc.Addr.lower;
1036 temp64.val32.upper = c->ErrDesc.Addr.upper;
1037 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1038 c->err_info, (dma_addr_t) temp64.val);
16011131
SC		 1039 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1040 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1da177e4
LT		 1041}
1042
1043static inline ctlr_info_t *get_host(struct gendisk *disk)
1044{
7c832835 1045 return disk->queue->queuedata;
1da177e4
LT		 1046}
1047
1048static inline drive_info_struct *get_drv(struct gendisk *disk)
1049{
1050 return disk->private_data;
1051}
1052
1053/*
1054 * Open. Make sure the device is really there.
1055 */
ef7822c2 1056static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1057{
f70dba83 1058 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1059 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1060
b2a4a43d 1061 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1062 if (drv->busy_configuring)
ddd47442 1063 return -EBUSY;
1da177e4
LT		 1064 /*
1065 * Root is allowed to open raw volume zero even if it's not configured
1066 * so array config can still work. Root is also allowed to open any
1067 * volume that has a LUN ID, so it can issue IOCTL to reread the
1068 * disk information. I don't think I really like this
1069 * but I'm already using way to many device nodes to claim another one
1070 * for "raw controller".
1071 */
7a06f789 1072 if (drv->heads == 0) {
ef7822c2 1073 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1074 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1075 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1076 return -ENXIO;
1da177e4 1077 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1078 } else if (memcmp(drv->LunID, CTLR_LUNID,
1079 sizeof(drv->LunID))) {
1da177e4
LT		 1080 return -ENXIO;
1081 }
1082 }
1083 if (!capable(CAP_SYS_ADMIN))
1084 return -EPERM;
1085 }
1086 drv->usage_count++;
f70dba83 1087 h->usage_count++;
1da177e4
LT		 1088 return 0;
1089}
7c832835 1090
6e9624b8
AB		 1091static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1092{
1093 int ret;
1094
2a48fc0a 1095 mutex_lock(&cciss_mutex);
6e9624b8 1096 ret = cciss_open(bdev, mode);
2a48fc0a 1097 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1098
1099 return ret;
1100}
1101
1da177e4
LT		 1102/*
1103 * Close. Sync first.
1104 */
ef7822c2 1105static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1106{
f70dba83 1107 ctlr_info_t *h;
6e9624b8 1108 drive_info_struct *drv;
1da177e4 1109
2a48fc0a 1110 mutex_lock(&cciss_mutex);
f70dba83 1111 h = get_host(disk);
6e9624b8 1112 drv = get_drv(disk);
b2a4a43d 1113 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1114 drv->usage_count--;
f70dba83 1115 h->usage_count--;
2a48fc0a 1116 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1117 return 0;
1118}
1119
ef7822c2
AV		 1120static int do_ioctl(struct block_device *bdev, fmode_t mode,
1121 unsigned cmd, unsigned long arg)
1da177e4
LT		 1122{
1123 int ret;
2a48fc0a 1124 mutex_lock(&cciss_mutex);
ef7822c2 1125 ret = cciss_ioctl(bdev, mode, cmd, arg);
2a48fc0a 1126 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1127 return ret;
1128}
1129
8a6cfeb6
AB		 1130#ifdef CONFIG_COMPAT
1131
ef7822c2
AV		 1132static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1133 unsigned cmd, unsigned long arg);
1134static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1135 unsigned cmd, unsigned long arg);
1da177e4 1136
ef7822c2
AV		 1137static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1138 unsigned cmd, unsigned long arg)
1da177e4
LT		 1139{
1140 switch (cmd) {
1141 case CCISS_GETPCIINFO:
1142 case CCISS_GETINTINFO:
1143 case CCISS_SETINTINFO:
1144 case CCISS_GETNODENAME:
1145 case CCISS_SETNODENAME:
1146 case CCISS_GETHEARTBEAT:
1147 case CCISS_GETBUSTYPES:
1148 case CCISS_GETFIRMVER:
1149 case CCISS_GETDRIVVER:
1150 case CCISS_REVALIDVOLS:
1151 case CCISS_DEREGDISK:
1152 case CCISS_REGNEWDISK:
1153 case CCISS_REGNEWD:
1154 case CCISS_RESCANDISK:
1155 case CCISS_GETLUNINFO:
ef7822c2 1156 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1157
1158 case CCISS_PASSTHRU32:
ef7822c2 1159 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1160 case CCISS_BIG_PASSTHRU32:
ef7822c2 1161 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1162
1163 default:
1164 return -ENOIOCTLCMD;
1165 }
1166}
1167
ef7822c2
AV		 1168static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1169 unsigned cmd, unsigned long arg)
1da177e4
LT		 1170{
1171 IOCTL32_Command_struct __user *arg32 =
7c832835 1172 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1173 IOCTL_Command_struct arg64;
1174 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1175 int err;
1176 u32 cp;
1177
1178 err = 0;
7c832835
BH		 1179 err |=
1180 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1181 sizeof(arg64.LUN_info));
1182 err |=
1183 copy_from_user(&arg64.Request, &arg32->Request,
1184 sizeof(arg64.Request));
1185 err |=
1186 copy_from_user(&arg64.error_info, &arg32->error_info,
1187 sizeof(arg64.error_info));
1da177e4
LT		 1188 err |= get_user(arg64.buf_size, &arg32->buf_size);
1189 err |= get_user(cp, &arg32->buf);
1190 arg64.buf = compat_ptr(cp);
1191 err |= copy_to_user(p, &arg64, sizeof(arg64));
1192
1193 if (err)
1194 return -EFAULT;
1195
ef7822c2 1196 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1197 if (err)
1198 return err;
7c832835
BH		 1199 err |=
1200 copy_in_user(&arg32->error_info, &p->error_info,
1201 sizeof(arg32->error_info));
1da177e4
LT		 1202 if (err)
1203 return -EFAULT;
1204 return err;
1205}
1206
ef7822c2
AV		 1207static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1208 unsigned cmd, unsigned long arg)
1da177e4
LT		 1209{
1210 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1211 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1212 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1213 BIG_IOCTL_Command_struct __user *p =
1214 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1215 int err;
1216 u32 cp;
1217
7ab5118d 1218 memset(&arg64, 0, sizeof(arg64));
1da177e4 1219 err = 0;
7c832835
BH		 1220 err |=
1221 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1222 sizeof(arg64.LUN_info));
1223 err |=
1224 copy_from_user(&arg64.Request, &arg32->Request,
1225 sizeof(arg64.Request));
1226 err |=
1227 copy_from_user(&arg64.error_info, &arg32->error_info,
1228 sizeof(arg64.error_info));
1da177e4
LT		 1229 err |= get_user(arg64.buf_size, &arg32->buf_size);
1230 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1231 err |= get_user(cp, &arg32->buf);
1232 arg64.buf = compat_ptr(cp);
1233 err |= copy_to_user(p, &arg64, sizeof(arg64));
1234
1235 if (err)
7c832835 1236 return -EFAULT;
1da177e4 1237
ef7822c2 1238 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1239 if (err)
1240 return err;
7c832835
BH		 1241 err |=
1242 copy_in_user(&arg32->error_info, &p->error_info,
1243 sizeof(arg32->error_info));
1da177e4
LT		 1244 if (err)
1245 return -EFAULT;
1246 return err;
1247}
1248#endif
a885c8c4
CH		 1249
1250static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1251{
1252 drive_info_struct *drv = get_drv(bdev->bd_disk);
1253
1254 if (!drv->cylinders)
1255 return -ENXIO;
1256
1257 geo->heads = drv->heads;
1258 geo->sectors = drv->sectors;
1259 geo->cylinders = drv->cylinders;
1260 return 0;
1261}
1262
f70dba83 1263static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1264{
1265 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1266 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1267 (void)check_for_unit_attention(h, c);
0a9279cc 1268}
0a25a5ae
SC		 1269
1270static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1271{
0a25a5ae 1272 cciss_pci_info_struct pciinfo;
1da177e4 1273
0a25a5ae
SC		 1274 if (!argp)
1275 return -EINVAL;
1276 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1277 pciinfo.bus = h->pdev->bus->number;
1278 pciinfo.dev_fn = h->pdev->devfn;
1279 pciinfo.board_id = h->board_id;
1280 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1281 return -EFAULT;
1282 return 0;
1283}
1da177e4 1284
576e661c
SC		 1285static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1286{
1287 cciss_coalint_struct intinfo;
1da177e4 1288
576e661c
SC		 1289 if (!argp)
1290 return -EINVAL;
1291 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1292 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1293 if (copy_to_user
1294 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1295 return -EFAULT;
1296 return 0;
1297}
1da177e4 1298
4c800eed
SC		 1299static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1300{
1301 cciss_coalint_struct intinfo;
1302 unsigned long flags;
1303 int i;
1da177e4 1304
4c800eed
SC		 1305 if (!argp)
1306 return -EINVAL;
1307 if (!capable(CAP_SYS_ADMIN))
1308 return -EPERM;
1309 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1310 return -EFAULT;
1311 if ((intinfo.delay == 0) && (intinfo.count == 0))
1312 return -EINVAL;
1313 spin_lock_irqsave(&h->lock, flags);
1314 /* Update the field, and then ring the doorbell */
1315 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1316 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1317 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1318
1319 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1320 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1321 break;
1322 udelay(1000); /* delay and try again */
1323 }
1324 spin_unlock_irqrestore(&h->lock, flags);
1325 if (i >= MAX_IOCTL_CONFIG_WAIT)
1326 return -EAGAIN;
1327 return 0;
1328}
1da177e4 1329
25216109
SC		 1330static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1331{
1332 NodeName_type NodeName;
1333 int i;
1da177e4 1334
25216109
SC		 1335 if (!argp)
1336 return -EINVAL;
1337 for (i = 0; i < 16; i++)
1338 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1339 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1340 return -EFAULT;
1341 return 0;
1342}
7c832835 1343
4f43f32c
SC		 1344static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1345{
1346 NodeName_type NodeName;
1347 unsigned long flags;
1348 int i;
7c832835 1349
4f43f32c
SC		 1350 if (!argp)
1351 return -EINVAL;
1352 if (!capable(CAP_SYS_ADMIN))
1353 return -EPERM;
1354 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1355 return -EFAULT;
1356 spin_lock_irqsave(&h->lock, flags);
1357 /* Update the field, and then ring the doorbell */
1358 for (i = 0; i < 16; i++)
1359 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1360 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1361 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1362 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1363 break;
1364 udelay(1000); /* delay and try again */
1365 }
1366 spin_unlock_irqrestore(&h->lock, flags);
1367 if (i >= MAX_IOCTL_CONFIG_WAIT)
1368 return -EAGAIN;
1369 return 0;
1370}
7c832835 1371
93c74931
SC		 1372static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1373{
1374 Heartbeat_type heartbeat;
7c832835 1375
93c74931
SC		 1376 if (!argp)
1377 return -EINVAL;
1378 heartbeat = readl(&h->cfgtable->HeartBeat);
1379 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1380 return -EFAULT;
1381 return 0;
1382}
0a9279cc 1383
d18dfad4
SC		 1384static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1385{
1386 BusTypes_type BusTypes;
7c832835 1387
d18dfad4
SC		 1388 if (!argp)
1389 return -EINVAL;
1390 BusTypes = readl(&h->cfgtable->BusTypes);
1391 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1392 return -EFAULT;
1393 return 0;
1394}
1395
8a4f7fbf
SC		 1396static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1397{
1398 FirmwareVer_type firmware;
1399
1400 if (!argp)
1401 return -EINVAL;
1402 memcpy(firmware, h->firm_ver, 4);
1403
1404 if (copy_to_user
1405 (argp, firmware, sizeof(FirmwareVer_type)))
1406 return -EFAULT;
1407 return 0;
1408}
1409
c525919d
SC		 1410static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1411{
1412 DriverVer_type DriverVer = DRIVER_VERSION;
1413
1414 if (!argp)
1415 return -EINVAL;
1416 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1417 return -EFAULT;
1418 return 0;
1419}
1420
0894b32c
SC		 1421static int cciss_getluninfo(ctlr_info_t *h,
1422 struct gendisk *disk, void __user *argp)
1423{
1424 LogvolInfo_struct luninfo;
1425 drive_info_struct *drv = get_drv(disk);
1426
1427 if (!argp)
1428 return -EINVAL;
1429 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1430 luninfo.num_opens = drv->usage_count;
1431 luninfo.num_parts = 0;
1432 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1433 return -EFAULT;
1434 return 0;
1435}
1436
f32f125b
SC		 1437static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1438{
1439 IOCTL_Command_struct iocommand;
1440 CommandList_struct *c;
1441 char *buff = NULL;
1442 u64bit temp64;
1443 DECLARE_COMPLETION_ONSTACK(wait);
1444
1445 if (!argp)
1446 return -EINVAL;
1447
1448 if (!capable(CAP_SYS_RAWIO))
1449 return -EPERM;
1450
1451 if (copy_from_user
1452 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1453 return -EFAULT;
1454 if ((iocommand.buf_size < 1) &&
1455 (iocommand.Request.Type.Direction != XFER_NONE)) {
1456 return -EINVAL;
1457 }
1458 if (iocommand.buf_size > 0) {
1459 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1460 if (buff == NULL)
1461 return -EFAULT;
1462 }
1463 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1464 /* Copy the data into the buffer we created */
1465 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1466 kfree(buff);
1467 return -EFAULT;
1468 }
1469 } else {
1470 memset(buff, 0, iocommand.buf_size);
1471 }
1472 c = cmd_special_alloc(h);
1473 if (!c) {
1474 kfree(buff);
1475 return -ENOMEM;
1476 }
1477 /* Fill in the command type */
1478 c->cmd_type = CMD_IOCTL_PEND;
1479 /* Fill in Command Header */
1480 c->Header.ReplyQueue = 0; /* unused in simple mode */
1481 if (iocommand.buf_size > 0) { /* buffer to fill */
1482 c->Header.SGList = 1;
1483 c->Header.SGTotal = 1;
1484 } else { /* no buffers to fill */
1485 c->Header.SGList = 0;
1486 c->Header.SGTotal = 0;
1487 }
1488 c->Header.LUN = iocommand.LUN_info;
1489 /* use the kernel address the cmd block for tag */
1490 c->Header.Tag.lower = c->busaddr;
1491
1492 /* Fill in Request block */
1493 c->Request = iocommand.Request;
1494
1495 /* Fill in the scatter gather information */
1496 if (iocommand.buf_size > 0) {
1497 temp64.val = pci_map_single(h->pdev, buff,
1498 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1499 c->SG[0].Addr.lower = temp64.val32.lower;
1500 c->SG[0].Addr.upper = temp64.val32.upper;
1501 c->SG[0].Len = iocommand.buf_size;
1502 c->SG[0].Ext = 0; /* we are not chaining */
1503 }
1504 c->waiting = &wait;
1505
1506 enqueue_cmd_and_start_io(h, c);
1507 wait_for_completion(&wait);
1508
1509 /* unlock the buffers from DMA */
1510 temp64.val32.lower = c->SG[0].Addr.lower;
1511 temp64.val32.upper = c->SG[0].Addr.upper;
1512 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1513 PCI_DMA_BIDIRECTIONAL);
1514 check_ioctl_unit_attention(h, c);
1515
1516 /* Copy the error information out */
1517 iocommand.error_info = *(c->err_info);
1518 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1519 kfree(buff);
1520 cmd_special_free(h, c);
1521 return -EFAULT;
1522 }
1523
1524 if (iocommand.Request.Type.Direction == XFER_READ) {
1525 /* Copy the data out of the buffer we created */
1526 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1527 kfree(buff);
6b4d96b8 1528 cmd_special_free(h, c);
f32f125b 1529 return -EFAULT;
1da177e4 1530 }
f32f125b
SC		 1531 }
1532 kfree(buff);
1533 cmd_special_free(h, c);
1534 return 0;
1535}
1536
0c9f5ba7
SC		 1537static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1538{
1539 BIG_IOCTL_Command_struct *ioc;
1540 CommandList_struct *c;
1541 unsigned char **buff = NULL;
1542 int *buff_size = NULL;
1543 u64bit temp64;
1544 BYTE sg_used = 0;
1545 int status = 0;
1546 int i;
1547 DECLARE_COMPLETION_ONSTACK(wait);
1548 __u32 left;
1549 __u32 sz;
1550 BYTE __user *data_ptr;
1551
1552 if (!argp)
1553 return -EINVAL;
1554 if (!capable(CAP_SYS_RAWIO))
1555 return -EPERM;
fcab1c11 1556 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
0c9f5ba7
SC		 1557 if (!ioc) {
1558 status = -ENOMEM;
1559 goto cleanup1;
1560 }
1561 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1562 status = -EFAULT;
1563 goto cleanup1;
1564 }
1565 if ((ioc->buf_size < 1) &&
1566 (ioc->Request.Type.Direction != XFER_NONE)) {
1567 status = -EINVAL;
1568 goto cleanup1;
1569 }
1570 /* Check kmalloc limits using all SGs */
1571 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1572 status = -EINVAL;
1573 goto cleanup1;
1574 }
1575 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1576 status = -EINVAL;
1577 goto cleanup1;
1578 }
1579 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1580 if (!buff) {
1581 status = -ENOMEM;
1582 goto cleanup1;
1583 }
1584 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1585 if (!buff_size) {
1586 status = -ENOMEM;
1587 goto cleanup1;
1588 }
1589 left = ioc->buf_size;
1590 data_ptr = ioc->buf;
1591 while (left) {
1592 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1593 buff_size[sg_used] = sz;
1594 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1595 if (buff[sg_used] == NULL) {
1596 status = -ENOMEM;
1597 goto cleanup1;
1598 }
1599 if (ioc->Request.Type.Direction == XFER_WRITE) {
1600 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1601 status = -EFAULT;
1602 goto cleanup1;
1603 }
0c9f5ba7
SC		 1604 } else {
1605 memset(buff[sg_used], 0, sz);
1606 }
1607 left -= sz;
1608 data_ptr += sz;
1609 sg_used++;
1610 }
1611 c = cmd_special_alloc(h);
1612 if (!c) {
1613 status = -ENOMEM;
1614 goto cleanup1;
1615 }
1616 c->cmd_type = CMD_IOCTL_PEND;
1617 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1618 c->Header.SGList = sg_used;
1619 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1620 c->Header.LUN = ioc->LUN_info;
1621 c->Header.Tag.lower = c->busaddr;
1622
1623 c->Request = ioc->Request;
fcfb5c0c
SC		 1624 for (i = 0; i < sg_used; i++) {
1625 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1626 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1627 c->SG[i].Addr.lower = temp64.val32.lower;
1628 c->SG[i].Addr.upper = temp64.val32.upper;
1629 c->SG[i].Len = buff_size[i];
1630 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1631 }
1632 c->waiting = &wait;
1633 enqueue_cmd_and_start_io(h, c);
1634 wait_for_completion(&wait);
1635 /* unlock the buffers from DMA */
1636 for (i = 0; i < sg_used; i++) {
1637 temp64.val32.lower = c->SG[i].Addr.lower;
1638 temp64.val32.upper = c->SG[i].Addr.upper;
1639 pci_unmap_single(h->pdev,
1640 (dma_addr_t) temp64.val, buff_size[i],
1641 PCI_DMA_BIDIRECTIONAL);
1642 }
1643 check_ioctl_unit_attention(h, c);
1644 /* Copy the error information out */
1645 ioc->error_info = *(c->err_info);
1646 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1647 cmd_special_free(h, c);
1648 status = -EFAULT;
1649 goto cleanup1;
1650 }
1651 if (ioc->Request.Type.Direction == XFER_READ) {
1652 /* Copy the data out of the buffer we created */
1653 BYTE __user *ptr = ioc->buf;
1654 for (i = 0; i < sg_used; i++) {
1655 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1656 cmd_special_free(h, c);
7c832835
BH		 1657 status = -EFAULT;
1658 goto cleanup1;
1659 }
0c9f5ba7 1660 ptr += buff_size[i];
1da177e4 1661 }
0c9f5ba7
SC		 1662 }
1663 cmd_special_free(h, c);
1664 status = 0;
1665cleanup1:
1666 if (buff) {
1667 for (i = 0; i < sg_used; i++)
1668 kfree(buff[i]);
1669 kfree(buff);
1670 }
1671 kfree(buff_size);
1672 kfree(ioc);
1673 return status;
1674}
1675
ef7822c2 1676static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1677 unsigned int cmd, unsigned long arg)
1da177e4 1678{
1da177e4 1679 struct gendisk *disk = bdev->bd_disk;
f70dba83 1680 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1681 void __user *argp = (void __user *)arg;
1682
b2a4a43d
SC		 1683 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1684 cmd, arg);
7c832835 1685 switch (cmd) {
1da177e4 1686 case CCISS_GETPCIINFO:
0a25a5ae 1687 return cciss_getpciinfo(h, argp);
1da177e4 1688 case CCISS_GETINTINFO:
576e661c 1689 return cciss_getintinfo(h, argp);
1da177e4 1690 case CCISS_SETINTINFO:
4c800eed 1691 return cciss_setintinfo(h, argp);
1da177e4 1692 case CCISS_GETNODENAME:
25216109 1693 return cciss_getnodename(h, argp);
1da177e4 1694 case CCISS_SETNODENAME:
4f43f32c 1695 return cciss_setnodename(h, argp);
1da177e4 1696 case CCISS_GETHEARTBEAT:
93c74931 1697 return cciss_getheartbeat(h, argp);
1da177e4 1698 case CCISS_GETBUSTYPES:
d18dfad4 1699 return cciss_getbustypes(h, argp);
1da177e4 1700 case CCISS_GETFIRMVER:
8a4f7fbf 1701 return cciss_getfirmver(h, argp);
7c832835 1702 case CCISS_GETDRIVVER:
c525919d 1703 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1704 case CCISS_DEREGDISK:
1705 case CCISS_REGNEWD:
1da177e4 1706 case CCISS_REVALIDVOLS:
f70dba83 1707 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1708 case CCISS_GETLUNINFO:
1709 return cciss_getluninfo(h, disk, argp);
1da177e4 1710 case CCISS_PASSTHRU:
f32f125b 1711 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1712 case CCISS_BIG_PASSTHRU:
1713 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1714
1715 /* scsi_cmd_ioctl handles these, below, though some are not */
1716 /* very meaningful for cciss. SG_IO is the main one people want. */
1717
1718 case SG_GET_VERSION_NUM:
1719 case SG_SET_TIMEOUT:
1720 case SG_GET_TIMEOUT:
1721 case SG_GET_RESERVED_SIZE:
1722 case SG_SET_RESERVED_SIZE:
1723 case SG_EMULATED_HOST:
1724 case SG_IO:
1725 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1726 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1727
1728 /* scsi_cmd_ioctl would normally handle these, below, but */
1729 /* they aren't a good fit for cciss, as CD-ROMs are */
1730 /* not supported, and we don't have any bus/target/lun */
1731 /* which we present to the kernel. */
1732
1733 case CDROM_SEND_PACKET:
1734 case CDROMCLOSETRAY:
1735 case CDROMEJECT:
1736 case SCSI_IOCTL_GET_IDLUN:
1737 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1738 default:
1739 return -ENOTTY;
1740 }
1da177e4
LT		 1741}
1742
7b30f092
JA		 1743static void cciss_check_queues(ctlr_info_t *h)
1744{
1745 int start_queue = h->next_to_run;
1746 int i;
1747
1748 /* check to see if we have maxed out the number of commands that can
1749 * be placed on the queue. If so then exit. We do this check here
1750 * in case the interrupt we serviced was from an ioctl and did not
1751 * free any new commands.
1752 */
f880632f 1753 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1754 return;
1755
1756 /* We have room on the queue for more commands. Now we need to queue
1757 * them up. We will also keep track of the next queue to run so
1758 * that every queue gets a chance to be started first.
1759 */
1760 for (i = 0; i < h->highest_lun + 1; i++) {
1761 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1762 /* make sure the disk has been added and the drive is real
1763 * because this can be called from the middle of init_one.
1764 */
9cef0d2f
SC		 1765 if (!h->drv[curr_queue])
1766 continue;
1767 if (!(h->drv[curr_queue]->queue) ||
1768 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1769 continue;
1770 blk_start_queue(h->gendisk[curr_queue]->queue);
1771
1772 /* check to see if we have maxed out the number of commands
1773 * that can be placed on the queue.
1774 */
f880632f 1775 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1776 if (curr_queue == start_queue) {
1777 h->next_to_run =
1778 (start_queue + 1) % (h->highest_lun + 1);
1779 break;
1780 } else {
1781 h->next_to_run = curr_queue;
1782 break;
1783 }
7b30f092
JA		 1784 }
1785 }
1786}
1787
ca1e0484
MM		 1788static void cciss_softirq_done(struct request *rq)
1789{
f70dba83
SC		 1790 CommandList_struct *c = rq->completion_data;
1791 ctlr_info_t *h = hba[c->ctlr];
1792 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1793 u64bit temp64;
664a717d 1794 unsigned long flags;
ca1e0484 1795 int i, ddir;
5c07a311 1796 int sg_index = 0;
ca1e0484 1797
f70dba83 1798 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1799 ddir = PCI_DMA_FROMDEVICE;
1800 else
1801 ddir = PCI_DMA_TODEVICE;
1802
1803 /* command did not need to be retried */
1804 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1805 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1806 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1807 cciss_unmap_sg_chain_block(h, c);
5c07a311 1808 /* Point to the next block */
f70dba83 1809 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1810 sg_index = 0;
1811 }
1812 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1813 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1814 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1815 ddir);
1816 ++sg_index;
ca1e0484
MM		 1817 }
1818
b2a4a43d 1819 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1820
c3a4d78c 1821 /* set the residual count for pc requests */
33659ebb 1822 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1823 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1824
c3a4d78c 1825 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1826
ca1e0484 1827 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1828 cmd_free(h, c);
7b30f092 1829 cciss_check_queues(h);
ca1e0484
MM		 1830 spin_unlock_irqrestore(&h->lock, flags);
1831}
1832
39ccf9a6
SC		 1833static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1834 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1835{
9cef0d2f
SC		 1836 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1837 sizeof(h->drv[log_unit]->LunID));
b57695fe 1838}
1839
7fe06326
AP		 1840/* This function gets the SCSI vendor, model, and revision of a logical drive
1841 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1842 * they cannot be read.
1843 */
f70dba83 1844static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1845 char *vendor, char *model, char *rev)
1846{
1847 int rc;
1848 InquiryData_struct *inq_buf;
b57695fe 1849 unsigned char scsi3addr[8];
7fe06326
AP		 1850
1851 *vendor = '\0';
1852 *model = '\0';
1853 *rev = '\0';
1854
1855 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1856 if (!inq_buf)
1857 return;
1858
f70dba83
SC		 1859 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1860 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1861 scsi3addr, TYPE_CMD);
7fe06326
AP		 1862 if (rc == IO_OK) {
1863 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1864 vendor[VENDOR_LEN] = '\0';
1865 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1866 model[MODEL_LEN] = '\0';
1867 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1868 rev[REV_LEN] = '\0';
1869 }
1870
1871 kfree(inq_buf);
1872 return;
1873}
1874
a72da29b
MM		 1875/* This function gets the serial number of a logical drive via
1876 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1877 * number cannot be had, for whatever reason, 16 bytes of 0xff
1878 * are returned instead.
1879 */
f70dba83 1880static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1881 unsigned char *serial_no, int buflen)
1882{
1883#define PAGE_83_INQ_BYTES 64
1884 int rc;
1885 unsigned char *buf;
b57695fe 1886 unsigned char scsi3addr[8];
a72da29b
MM		 1887
1888 if (buflen > 16)
1889 buflen = 16;
1890 memset(serial_no, 0xff, buflen);
1891 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1892 if (!buf)
1893 return;
1894 memset(serial_no, 0, buflen);
f70dba83
SC		 1895 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1896 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1897 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1898 if (rc == IO_OK)
1899 memcpy(serial_no, &buf[8], buflen);
1900 kfree(buf);
1901 return;
1902}
1903
617e1344
SC		 1904/*
1905 * cciss_add_disk sets up the block device queue for a logical drive
1906 */
1907static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1908 int drv_index)
1909{
1910 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1911 if (!disk->queue)
1912 goto init_queue_failure;
6ae5ce8e
MM		 1913 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1914 disk->major = h->major;
1915 disk->first_minor = drv_index << NWD_SHIFT;
1916 disk->fops = &cciss_fops;
9cef0d2f
SC		 1917 if (cciss_create_ld_sysfs_entry(h, drv_index))
1918 goto cleanup_queue;
1919 disk->private_data = h->drv[drv_index];
1920 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1921
1922 /* Set up queue information */
1923 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1924
1925 /* This is a hardware imposed limit. */
8a78362c 1926 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1927
086fa5ff 1928 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1929
1930 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1931
1932 disk->queue->queuedata = h;
1933
e1defc4f 1934 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1935 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1936
1937 /* Make sure all queue data is written out before */
9cef0d2f 1938 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1939 /* allows the interrupt handler to start the queue */
1940 wmb();
9cef0d2f 1941 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1942 add_disk(disk);
617e1344
SC		 1943 return 0;
1944
1945cleanup_queue:
1946 blk_cleanup_queue(disk->queue);
1947 disk->queue = NULL;
e8074f79 1948init_queue_failure:
617e1344 1949 return -1;
6ae5ce8e
MM		 1950}
1951
ddd47442 1952/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1953 * If the usage_count is zero and it is a heretofore unknown drive, or,
1954 * the drive's capacity, geometry, or serial number has changed,
1955 * then the drive information will be updated and the disk will be
1956 * re-registered with the kernel. If these conditions don't hold,
1957 * then it will be left alone for the next reboot. The exception to this
1958 * is disk 0 which will always be left registered with the kernel since it
1959 * is also the controller node. Any changes to disk 0 will show up on
1960 * the next reboot.
7c832835 1961 */
f70dba83
SC		 1962static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1963 int first_time, int via_ioctl)
7c832835 1964{
ddd47442 1965 struct gendisk *disk;
ddd47442
MM		 1966 InquiryData_struct *inq_buff = NULL;
1967 unsigned int block_size;
00988a35 1968 sector_t total_size;
ddd47442
MM		 1969 unsigned long flags = 0;
1970 int ret = 0;
a72da29b
MM		 1971 drive_info_struct *drvinfo;
1972
1973 /* Get information about the disk and modify the driver structure */
1974 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1975 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1976 if (inq_buff == NULL || drvinfo == NULL)
1977 goto mem_msg;
1978
1979 /* testing to see if 16-byte CDBs are already being used */
1980 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1981 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1982 &total_size, &block_size);
1983
1984 } else {
f70dba83 1985 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1986 /* if read_capacity returns all F's this volume is >2TB */
1987 /* in size so we switch to 16-byte CDB's for all */
1988 /* read/write ops */
1989 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1990 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1991 &total_size, &block_size);
1992 h->cciss_read = CCISS_READ_16;
1993 h->cciss_write = CCISS_WRITE_16;
1994 } else {
1995 h->cciss_read = CCISS_READ_10;
1996 h->cciss_write = CCISS_WRITE_10;
1997 }
1998 }
1999
f70dba83 2000 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 2001 inq_buff, drvinfo);
2002 drvinfo->block_size = block_size;
2003 drvinfo->nr_blocks = total_size + 1;
2004
f70dba83 2005 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 2006 drvinfo->model, drvinfo->rev);
f70dba83 2007 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 2008 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 2009 /* Save the lunid in case we deregister the disk, below. */
2010 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2011 sizeof(drvinfo->LunID));
a72da29b
MM		 2012
2013 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 2014 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 2015 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 2016 h->drv[drv_index]->serial_no, 16) == 0) &&
2017 drvinfo->block_size == h->drv[drv_index]->block_size &&
2018 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2019 drvinfo->heads == h->drv[drv_index]->heads &&
2020 drvinfo->sectors == h->drv[drv_index]->sectors &&
2021 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2022 /* The disk is unchanged, nothing to update */
2023 goto freeret;
a72da29b 2024
6ae5ce8e
MM		 2025 /* If we get here it's not the same disk, or something's changed,
2026 * so we need to * deregister it, and re-register it, if it's not
2027 * in use.
2028 * If the disk already exists then deregister it before proceeding
2029 * (unless it's the first disk (for the controller node).
2030 */
9cef0d2f 2031 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2032 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2033 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2034 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2035 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2036
9cef0d2f 2037 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2038 * which keeps the interrupt handler from starting
2039 * the queue.
2040 */
2d11d993 2041 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2042 }
2043
2044 /* If the disk is in use return */
2045 if (ret)
a72da29b
MM		 2046 goto freeret;
2047
6ae5ce8e 2048 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2049 * and serial number inquiry. If the disk was deregistered
2050 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2051 */
9cef0d2f
SC		 2052 if (h->drv[drv_index] == NULL) {
2053 drvinfo->device_initialized = 0;
2054 h->drv[drv_index] = drvinfo;
2055 drvinfo = NULL; /* so it won't be freed below. */
2056 } else {
2057 /* special case for cxd0 */
2058 h->drv[drv_index]->block_size = drvinfo->block_size;
2059 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2060 h->drv[drv_index]->heads = drvinfo->heads;
2061 h->drv[drv_index]->sectors = drvinfo->sectors;
2062 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2063 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2064 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2065 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2066 VENDOR_LEN + 1);
2067 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2068 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2069 }
ddd47442
MM		 2070
2071 ++h->num_luns;
2072 disk = h->gendisk[drv_index];
9cef0d2f 2073 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2074
6ae5ce8e
MM		 2075 /* If it's not disk 0 (drv_index != 0)
2076 * or if it was disk 0, but there was previously
2077 * no actual corresponding configured logical drive
2078 * (raid_leve == -1) then we want to update the
2079 * logical drive's information.
2080 */
361e9b07
SC		 2081 if (drv_index || first_time) {
2082 if (cciss_add_disk(h, disk, drv_index) != 0) {
2083 cciss_free_gendisk(h, drv_index);
9cef0d2f 2084 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2085 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2086 drv_index);
361e9b07
SC		 2087 --h->num_luns;
2088 }
2089 }
ddd47442 2090
6ae5ce8e 2091freeret:
ddd47442 2092 kfree(inq_buff);
a72da29b 2093 kfree(drvinfo);
ddd47442 2094 return;
6ae5ce8e 2095mem_msg:
b2a4a43d 2096 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2097 goto freeret;
2098}
2099
2100/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2101 * that has a null drv pointer and allocate the drive info struct and
2102 * will return that index This is where new drives will be added.
2103 * If the index to be returned is greater than the highest_lun index for
2104 * the controller then highest_lun is set * to this new index.
2105 * If there are no available indexes or if tha allocation fails, then -1
2106 * is returned. * "controller_node" is used to know if this is a real
2107 * logical drive, or just the controller node, which determines if this
2108 * counts towards highest_lun.
7c832835 2109 */
9cef0d2f 2110static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2111{
2112 int i;
9cef0d2f 2113 drive_info_struct *drv;
ddd47442 2114
9cef0d2f 2115 /* Search for an empty slot for our drive info */
7c832835 2116 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2117
2118 /* if not cxd0 case, and it's occupied, skip it. */
2119 if (h->drv[i] && i != 0)
2120 continue;
2121 /*
2122 * If it's cxd0 case, and drv is alloc'ed already, and a
2123 * disk is configured there, skip it.
2124 */
2125 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2126 continue;
2127
2128 /*
2129 * We've found an empty slot. Update highest_lun
2130 * provided this isn't just the fake cxd0 controller node.
2131 */
2132 if (i > h->highest_lun && !controller_node)
2133 h->highest_lun = i;
2134
2135 /* If adding a real disk at cxd0, and it's already alloc'ed */
2136 if (i == 0 && h->drv[i] != NULL)
ddd47442 2137 return i;
9cef0d2f
SC		 2138
2139 /*
2140 * Found an empty slot, not already alloc'ed. Allocate it.
2141 * Mark it with raid_level == -1, so we know it's new later on.
2142 */
2143 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2144 if (!drv)
2145 return -1;
2146 drv->raid_level = -1; /* so we know it's new */
2147 h->drv[i] = drv;
2148 return i;
ddd47442
MM		 2149 }
2150 return -1;
2151}
2152
9cef0d2f
SC		 2153static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2154{
2155 kfree(h->drv[drv_index]);
2156 h->drv[drv_index] = NULL;
2157}
2158
361e9b07
SC		 2159static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2160{
2161 put_disk(h->gendisk[drv_index]);
2162 h->gendisk[drv_index] = NULL;
2163}
2164
6ae5ce8e
MM		 2165/* cciss_add_gendisk finds a free hba[]->drv structure
2166 * and allocates a gendisk if needed, and sets the lunid
2167 * in the drvinfo structure. It returns the index into
2168 * the ->drv[] array, or -1 if none are free.
2169 * is_controller_node indicates whether highest_lun should
2170 * count this disk, or if it's only being added to provide
2171 * a means to talk to the controller in case no logical
2172 * drives have yet been configured.
2173 */
39ccf9a6
SC		 2174static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2175 int controller_node)
6ae5ce8e
MM		 2176{
2177 int drv_index;
2178
9cef0d2f 2179 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2180 if (drv_index == -1)
2181 return -1;
8ce51966 2182
6ae5ce8e
MM		 2183 /*Check if the gendisk needs to be allocated */
2184 if (!h->gendisk[drv_index]) {
2185 h->gendisk[drv_index] =
2186 alloc_disk(1 << NWD_SHIFT);
2187 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2188 dev_err(&h->pdev->dev,
2189 "could not allocate a new disk %d\n",
2190 drv_index);
9cef0d2f 2191 goto err_free_drive_info;
6ae5ce8e
MM		 2192 }
2193 }
9cef0d2f
SC		 2194 memcpy(h->drv[drv_index]->LunID, lunid,
2195 sizeof(h->drv[drv_index]->LunID));
2196 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2197 goto err_free_disk;
6ae5ce8e
MM		 2198 /* Don't need to mark this busy because nobody */
2199 /* else knows about this disk yet to contend */
2200 /* for access to it. */
9cef0d2f 2201 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2202 wmb();
2203 return drv_index;
7fe06326
AP		 2204
2205err_free_disk:
361e9b07 2206 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2207err_free_drive_info:
2208 cciss_free_drive_info(h, drv_index);
7fe06326 2209 return -1;
6ae5ce8e
MM		 2210}
2211
2212/* This is for the special case of a controller which
2213 * has no logical drives. In this case, we still need
2214 * to register a disk so the controller can be accessed
2215 * by the Array Config Utility.
2216 */
2217static void cciss_add_controller_node(ctlr_info_t *h)
2218{
2219 struct gendisk *disk;
2220 int drv_index;
2221
2222 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2223 return;
2224
39ccf9a6 2225 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2226 if (drv_index == -1)
2227 goto error;
9cef0d2f
SC		 2228 h->drv[drv_index]->block_size = 512;
2229 h->drv[drv_index]->nr_blocks = 0;
2230 h->drv[drv_index]->heads = 0;
2231 h->drv[drv_index]->sectors = 0;
2232 h->drv[drv_index]->cylinders = 0;
2233 h->drv[drv_index]->raid_level = -1;
2234 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2235 disk = h->gendisk[drv_index];
361e9b07
SC		 2236 if (cciss_add_disk(h, disk, drv_index) == 0)
2237 return;
2238 cciss_free_gendisk(h, drv_index);
9cef0d2f 2239 cciss_free_drive_info(h, drv_index);
361e9b07 2240error:
b2a4a43d 2241 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2242 return;
6ae5ce8e
MM		 2243}
2244
ddd47442 2245/* This function will add and remove logical drives from the Logical
d14c4ab5 2246 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2247 * so that mount points are preserved until the next reboot. This allows
2248 * for the removal of logical drives in the middle of the drive array
2249 * without a re-ordering of those drives.
2250 * INPUT
2251 * h = The controller to perform the operations on
7c832835 2252 */
2d11d993
SC		 2253static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2254 int via_ioctl)
1da177e4 2255{
ddd47442
MM		 2256 int num_luns;
2257 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2258 int return_code;
2259 int listlength = 0;
2260 int i;
2261 int drv_found;
2262 int drv_index = 0;
39ccf9a6 2263 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2264 unsigned long flags;
ddd47442 2265
6ae5ce8e
MM		 2266 if (!capable(CAP_SYS_RAWIO))
2267 return -EPERM;
2268
ddd47442 2269 /* Set busy_configuring flag for this operation */
f70dba83 2270 spin_lock_irqsave(&h->lock, flags);
7c832835 2271 if (h->busy_configuring) {
f70dba83 2272 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2273 return -EBUSY;
2274 }
2275 h->busy_configuring = 1;
f70dba83 2276 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2277
a72da29b
MM		 2278 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2279 if (ld_buff == NULL)
2280 goto mem_msg;
2281
f70dba83 2282 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2283 sizeof(ReportLunData_struct),
2284 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2285
a72da29b
MM		 2286 if (return_code == IO_OK)
2287 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2288 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2289 dev_warn(&h->pdev->dev,
2290 "report logical volume command failed\n");
a72da29b
MM		 2291 listlength = 0;
2292 goto freeret;
2293 }
2294
2295 num_luns = listlength / 8; /* 8 bytes per entry */
2296 if (num_luns > CISS_MAX_LUN) {
2297 num_luns = CISS_MAX_LUN;
b2a4a43d 2298 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2299 " on controller than can be handled by"
2300 " this driver.\n");
2301 }
2302
6ae5ce8e
MM		 2303 if (num_luns == 0)
2304 cciss_add_controller_node(h);
2305
2306 /* Compare controller drive array to driver's drive array
2307 * to see if any drives are missing on the controller due
2308 * to action of Array Config Utility (user deletes drive)
2309 * and deregister logical drives which have disappeared.
2310 */
a72da29b
MM		 2311 for (i = 0; i <= h->highest_lun; i++) {
2312 int j;
2313 drv_found = 0;
d8a0be6a
SC		 2314
2315 /* skip holes in the array from already deleted drives */
9cef0d2f 2316 if (h->drv[i] == NULL)
d8a0be6a
SC		 2317 continue;
2318
a72da29b 2319 for (j = 0; j < num_luns; j++) {
39ccf9a6 2320 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2321 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2322 sizeof(lunid)) == 0) {
a72da29b
MM		 2323 drv_found = 1;
2324 break;
2325 }
2326 }
2327 if (!drv_found) {
2328 /* Deregister it from the OS, it's gone. */
f70dba83 2329 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2330 h->drv[i]->busy_configuring = 1;
f70dba83 2331 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2332 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2333 if (h->drv[i] != NULL)
2334 h->drv[i]->busy_configuring = 0;
ddd47442 2335 }
a72da29b 2336 }
ddd47442 2337
a72da29b
MM		 2338 /* Compare controller drive array to driver's drive array.
2339 * Check for updates in the drive information and any new drives
2340 * on the controller due to ACU adding logical drives, or changing
2341 * a logical drive's size, etc. Reregister any new/changed drives
2342 */
2343 for (i = 0; i < num_luns; i++) {
2344 int j;
ddd47442 2345
a72da29b 2346 drv_found = 0;
ddd47442 2347
39ccf9a6 2348 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2349 /* Find if the LUN is already in the drive array
2350 * of the driver. If so then update its info
2351 * if not in use. If it does not exist then find
2352 * the first free index and add it.
2353 */
2354 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2355 if (h->drv[j] != NULL &&
2356 memcmp(h->drv[j]->LunID, lunid,
2357 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2358 drv_index = j;
2359 drv_found = 1;
2360 break;
ddd47442 2361 }
a72da29b 2362 }
ddd47442 2363
a72da29b
MM		 2364 /* check if the drive was found already in the array */
2365 if (!drv_found) {
eece695f 2366 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2367 if (drv_index == -1)
2368 goto freeret;
a72da29b 2369 }
f70dba83 2370 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2371 } /* end for */
ddd47442 2372
6ae5ce8e 2373freeret:
ddd47442
MM		 2374 kfree(ld_buff);
2375 h->busy_configuring = 0;
2376 /* We return -1 here to tell the ACU that we have registered/updated
2377 * all of the drives that we can and to keep it from calling us
2378 * additional times.
7c832835 2379 */
ddd47442 2380 return -1;
6ae5ce8e 2381mem_msg:
b2a4a43d 2382 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2383 h->busy_configuring = 0;
ddd47442
MM		 2384 goto freeret;
2385}
2386
9ddb27b4
SC		 2387static void cciss_clear_drive_info(drive_info_struct *drive_info)
2388{
2389 /* zero out the disk size info */
2390 drive_info->nr_blocks = 0;
2391 drive_info->block_size = 0;
2392 drive_info->heads = 0;
2393 drive_info->sectors = 0;
2394 drive_info->cylinders = 0;
2395 drive_info->raid_level = -1;
2396 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2397 memset(drive_info->model, 0, sizeof(drive_info->model));
2398 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2399 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2400 /*
2401 * don't clear the LUNID though, we need to remember which
2402 * one this one is.
2403 */
2404}
2405
ddd47442
MM		 2406/* This function will deregister the disk and it's queue from the
2407 * kernel. It must be called with the controller lock held and the
2408 * drv structures busy_configuring flag set. It's parameters are:
2409 *
2410 * disk = This is the disk to be deregistered
2411 * drv = This is the drive_info_struct associated with the disk to be
2412 * deregistered. It contains information about the disk used
2413 * by the driver.
2414 * clear_all = This flag determines whether or not the disk information
2415 * is going to be completely cleared out and the highest_lun
2416 * reset. Sometimes we want to clear out information about
d14c4ab5 2417 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2418 * the highest_lun should be left unchanged and the LunID
2419 * should not be cleared.
2d11d993
SC		 2420 * via_ioctl
2421 * This indicates whether we've reached this path via ioctl.
2422 * This affects the maximum usage count allowed for c0d0 to be messed with.
2423 * If this path is reached via ioctl(), then the max_usage_count will
2424 * be 1, as the process calling ioctl() has got to have the device open.
2425 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2426*/
a0ea8622 2427static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2428 int clear_all, int via_ioctl)
ddd47442 2429{
799202cb 2430 int i;
a0ea8622
SC		 2431 struct gendisk *disk;
2432 drive_info_struct *drv;
9cef0d2f 2433 int recalculate_highest_lun;
1da177e4
LT		 2434
2435 if (!capable(CAP_SYS_RAWIO))
2436 return -EPERM;
2437
9cef0d2f 2438 drv = h->drv[drv_index];
a0ea8622
SC		 2439 disk = h->gendisk[drv_index];
2440
1da177e4 2441 /* make sure logical volume is NOT is use */
7c832835 2442 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2443 if (drv->usage_count > via_ioctl)
7c832835
BH		 2444 return -EBUSY;
2445 } else if (drv->usage_count > 0)
2446 return -EBUSY;
1da177e4 2447
9cef0d2f
SC		 2448 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2449
ddd47442
MM		 2450 /* invalidate the devices and deregister the disk. If it is disk
2451 * zero do not deregister it but just zero out it's values. This
2452 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2453 */
2454 if (h->gendisk[0] != disk) {
5a9df732 2455 struct request_queue *q = disk->queue;
097d0264 2456 if (disk->flags & GENHD_FL_UP) {
8ce51966 2457 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2458 del_gendisk(disk);
5a9df732 2459 }
9cef0d2f 2460 if (q)
5a9df732 2461 blk_cleanup_queue(q);
5a9df732
AB		 2462 /* If clear_all is set then we are deleting the logical
2463 * drive, not just refreshing its info. For drives
2464 * other than disk 0 we will call put_disk. We do not
2465 * do this for disk 0 as we need it to be able to
2466 * configure the controller.
a72da29b 2467 */
5a9df732
AB		 2468 if (clear_all){
2469 /* This isn't pretty, but we need to find the
2470 * disk in our array and NULL our the pointer.
2471 * This is so that we will call alloc_disk if
2472 * this index is used again later.
a72da29b 2473 */
5a9df732 2474 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2475 if (h->gendisk[i] == disk) {
5a9df732
AB		 2476 h->gendisk[i] = NULL;
2477 break;
799202cb 2478 }
799202cb 2479 }
5a9df732 2480 put_disk(disk);
ddd47442 2481 }
799202cb
MM		 2482 } else {
2483 set_capacity(disk, 0);
9cef0d2f 2484 cciss_clear_drive_info(drv);
ddd47442
MM		 2485 }
2486
2487 --h->num_luns;
ddd47442 2488
9cef0d2f
SC		 2489 /* if it was the last disk, find the new hightest lun */
2490 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2491 int newhighest = -1;
9cef0d2f
SC		 2492 for (i = 0; i <= h->highest_lun; i++) {
2493 /* if the disk has size > 0, it is available */
2494 if (h->drv[i] && h->drv[i]->heads)
2495 newhighest = i;
1da177e4 2496 }
9cef0d2f 2497 h->highest_lun = newhighest;
ddd47442 2498 }
e2019b58 2499 return 0;
1da177e4 2500}
ddd47442 2501
5afe2781
SC		 2502static int __devinit cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2503 u8 reset_type)
2504{
2505 CommandList_struct *c;
2506 int return_status;
2507
2508 c = cmd_alloc(h);
2509 if (!c)
2510 return -ENOMEM;
2511 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2512 CTLR_LUNID, TYPE_MSG);
2513 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2514 if (return_status != IO_OK) {
2515 cmd_special_free(h, c);
2516 return return_status;
2517 }
2518 c->waiting = NULL;
2519 enqueue_cmd_and_start_io(h, c);
2520 /* Don't wait for completion, the reset won't complete. Don't free
2521 * the command either. This is the last command we will send before
2522 * re-initializing everything, so it doesn't matter and won't leak.
2523 */
2524 return 0;
2525}
2526
f70dba83 2527static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2528 size_t size, __u8 page_code, unsigned char *scsi3addr,
2529 int cmd_type)
1da177e4 2530{
1da177e4
LT		 2531 u64bit buff_dma_handle;
2532 int status = IO_OK;
2533
2534 c->cmd_type = CMD_IOCTL_PEND;
2535 c->Header.ReplyQueue = 0;
7c832835 2536 if (buff != NULL) {
1da177e4 2537 c->Header.SGList = 1;
7c832835 2538 c->Header.SGTotal = 1;
1da177e4
LT		 2539 } else {
2540 c->Header.SGList = 0;
7c832835 2541 c->Header.SGTotal = 0;
1da177e4
LT		 2542 }
2543 c->Header.Tag.lower = c->busaddr;
b57695fe 2544 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2545
2546 c->Request.Type.Type = cmd_type;
2547 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2548 switch (cmd) {
2549 case CISS_INQUIRY:
1da177e4 2550 /* are we trying to read a vital product page */
7c832835 2551 if (page_code != 0) {
1da177e4
LT		 2552 c->Request.CDB[1] = 0x01;
2553 c->Request.CDB[2] = page_code;
2554 }
2555 c->Request.CDBLen = 6;
7c832835 2556 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2557 c->Request.Type.Direction = XFER_READ;
2558 c->Request.Timeout = 0;
7c832835
BH		 2559 c->Request.CDB[0] = CISS_INQUIRY;
2560 c->Request.CDB[4] = size & 0xFF;
2561 break;
1da177e4
LT		 2562 case CISS_REPORT_LOG:
2563 case CISS_REPORT_PHYS:
7c832835 2564 /* Talking to controller so It's a physical command
1da177e4 2565 mode = 00 target = 0. Nothing to write.
7c832835 2566 */
1da177e4
LT		 2567 c->Request.CDBLen = 12;
2568 c->Request.Type.Attribute = ATTR_SIMPLE;
2569 c->Request.Type.Direction = XFER_READ;
2570 c->Request.Timeout = 0;
2571 c->Request.CDB[0] = cmd;
b028461d 2572 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2573 c->Request.CDB[7] = (size >> 16) & 0xFF;
2574 c->Request.CDB[8] = (size >> 8) & 0xFF;
2575 c->Request.CDB[9] = size & 0xFF;
2576 break;
2577
2578 case CCISS_READ_CAPACITY:
1da177e4
LT		 2579 c->Request.CDBLen = 10;
2580 c->Request.Type.Attribute = ATTR_SIMPLE;
2581 c->Request.Type.Direction = XFER_READ;
2582 c->Request.Timeout = 0;
2583 c->Request.CDB[0] = cmd;
7c832835 2584 break;
00988a35 2585 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2586 c->Request.CDBLen = 16;
2587 c->Request.Type.Attribute = ATTR_SIMPLE;
2588 c->Request.Type.Direction = XFER_READ;
2589 c->Request.Timeout = 0;
2590 c->Request.CDB[0] = cmd;
2591 c->Request.CDB[1] = 0x10;
2592 c->Request.CDB[10] = (size >> 24) & 0xFF;
2593 c->Request.CDB[11] = (size >> 16) & 0xFF;
2594 c->Request.CDB[12] = (size >> 8) & 0xFF;
2595 c->Request.CDB[13] = size & 0xFF;
2596 c->Request.Timeout = 0;
2597 c->Request.CDB[0] = cmd;
2598 break;
1da177e4
LT		 2599 case CCISS_CACHE_FLUSH:
2600 c->Request.CDBLen = 12;
2601 c->Request.Type.Attribute = ATTR_SIMPLE;
2602 c->Request.Type.Direction = XFER_WRITE;
2603 c->Request.Timeout = 0;
2604 c->Request.CDB[0] = BMIC_WRITE;
2605 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2606 break;
88f627ae 2607 case TEST_UNIT_READY:
88f627ae
SC		 2608 c->Request.CDBLen = 6;
2609 c->Request.Type.Attribute = ATTR_SIMPLE;
2610 c->Request.Type.Direction = XFER_NONE;
2611 c->Request.Timeout = 0;
2612 break;
1da177e4 2613 default:
b2a4a43d 2614 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2615 return IO_ERROR;
1da177e4
LT		 2616 }
2617 } else if (cmd_type == TYPE_MSG) {
2618 switch (cmd) {
8f71bb82 2619 case CCISS_ABORT_MSG:
3da8b713 2620 c->Request.CDBLen = 12;
2621 c->Request.Type.Attribute = ATTR_SIMPLE;
2622 c->Request.Type.Direction = XFER_WRITE;
2623 c->Request.Timeout = 0;
7c832835
BH		 2624 c->Request.CDB[0] = cmd; /* abort */
2625 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2626 /* buff contains the tag of the command to abort */
2627 memcpy(&c->Request.CDB[4], buff, 8);
2628 break;
8f71bb82 2629 case CCISS_RESET_MSG:
88f627ae 2630 c->Request.CDBLen = 16;
3da8b713 2631 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2632 c->Request.Type.Direction = XFER_NONE;
3da8b713 2633 c->Request.Timeout = 0;
2634 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2635 c->Request.CDB[0] = cmd; /* reset */
8f71bb82 2636 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
00988a35 2637 break;
8f71bb82 2638 case CCISS_NOOP_MSG:
1da177e4
LT		 2639 c->Request.CDBLen = 1;
2640 c->Request.Type.Attribute = ATTR_SIMPLE;
2641 c->Request.Type.Direction = XFER_WRITE;
2642 c->Request.Timeout = 0;
2643 c->Request.CDB[0] = cmd;
2644 break;
2645 default:
b2a4a43d
SC		 2646 dev_warn(&h->pdev->dev,
2647 "unknown message type %d\n", cmd);
1da177e4
LT		 2648 return IO_ERROR;
2649 }
2650 } else {
b2a4a43d 2651 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2652 return IO_ERROR;
2653 }
2654 /* Fill in the scatter gather information */
2655 if (size > 0) {
2656 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2657 buff, size,
2658 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2659 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2660 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2661 c->SG[0].Len = size;
7c832835 2662 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2663 }
2664 return status;
2665}
7c832835 2666
3c2ab402 2667static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2668{
2669 switch (c->err_info->ScsiStatus) {
2670 case SAM_STAT_GOOD:
2671 return IO_OK;
2672 case SAM_STAT_CHECK_CONDITION:
2673 switch (0xf & c->err_info->SenseInfo[2]) {
2674 case 0: return IO_OK; /* no sense */
2675 case 1: return IO_OK; /* recovered error */
2676 default:
c08fac65
SC		 2677 if (check_for_unit_attention(h, c))
2678 return IO_NEEDS_RETRY;
b2a4a43d 2679 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2680 "check condition, sense key = 0x%02x\n",
b2a4a43d 2681 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2682 }
2683 break;
2684 default:
b2a4a43d
SC		 2685 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2686 "scsi status = 0x%02x\n",
3c2ab402 2687 c->Request.CDB[0], c->err_info->ScsiStatus);
2688 break;
2689 }
2690 return IO_ERROR;
2691}
2692
789a424a 2693static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2694{
5390cfc3 2695 int return_status = IO_OK;
7c832835 2696
789a424a 2697 if (c->err_info->CommandStatus == CMD_SUCCESS)
2698 return IO_OK;
5390cfc3 2699
2700 switch (c->err_info->CommandStatus) {
2701 case CMD_TARGET_STATUS:
3c2ab402 2702 return_status = check_target_status(h, c);
5390cfc3 2703 break;
2704 case CMD_DATA_UNDERRUN:
2705 case CMD_DATA_OVERRUN:
2706 /* expected for inquiry and report lun commands */
2707 break;
2708 case CMD_INVALID:
b2a4a43d 2709 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2710 "reported invalid\n", c->Request.CDB[0]);
2711 return_status = IO_ERROR;
2712 break;
2713 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2714 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2715 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2716 return_status = IO_ERROR;
2717 break;
2718 case CMD_HARDWARE_ERR:
b2a4a43d 2719 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2720 " hardware error\n", c->Request.CDB[0]);
2721 return_status = IO_ERROR;
2722 break;
2723 case CMD_CONNECTION_LOST:
b2a4a43d 2724 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2725 "connection lost\n", c->Request.CDB[0]);
2726 return_status = IO_ERROR;
2727 break;
2728 case CMD_ABORTED:
b2a4a43d 2729 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2730 "aborted\n", c->Request.CDB[0]);
2731 return_status = IO_ERROR;
2732 break;
2733 case CMD_ABORT_FAILED:
b2a4a43d 2734 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2735 "abort failed\n", c->Request.CDB[0]);
2736 return_status = IO_ERROR;
2737 break;
2738 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2739 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2740 c->Request.CDB[0]);
789a424a 2741 return_status = IO_NEEDS_RETRY;
5390cfc3 2742 break;
6d9a4f9e
SC		 2743 case CMD_UNABORTABLE:
2744 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2745 return_status = IO_ERROR;
2746 break;
5390cfc3 2747 default:
b2a4a43d 2748 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2749 "unknown status %x\n", c->Request.CDB[0],
2750 c->err_info->CommandStatus);
2751 return_status = IO_ERROR;
7c832835 2752 }
789a424a 2753 return return_status;
2754}
2755
2756static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2757 int attempt_retry)
2758{
2759 DECLARE_COMPLETION_ONSTACK(wait);
2760 u64bit buff_dma_handle;
789a424a 2761 int return_status = IO_OK;
2762
2763resend_cmd2:
2764 c->waiting = &wait;
664a717d 2765 enqueue_cmd_and_start_io(h, c);
789a424a 2766
2767 wait_for_completion(&wait);
2768
2769 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2770 goto command_done;
2771
2772 return_status = process_sendcmd_error(h, c);
2773
2774 if (return_status == IO_NEEDS_RETRY &&
2775 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2776 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2777 c->Request.CDB[0]);
2778 c->retry_count++;
2779 /* erase the old error information */
2780 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2781 return_status = IO_OK;
2782 INIT_COMPLETION(wait);
2783 goto resend_cmd2;
2784 }
5390cfc3 2785
2786command_done:
1da177e4 2787 /* unlock the buffers from DMA */
bb2a37bf
MM		 2788 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2789 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2790 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2791 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2792 return return_status;
2793}
2794
f70dba83 2795static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2796 __u8 page_code, unsigned char scsi3addr[],
2797 int cmd_type)
5390cfc3 2798{
5390cfc3 2799 CommandList_struct *c;
2800 int return_status;
2801
6b4d96b8 2802 c = cmd_special_alloc(h);
5390cfc3 2803 if (!c)
2804 return -ENOMEM;
f70dba83 2805 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2806 scsi3addr, cmd_type);
5390cfc3 2807 if (return_status == IO_OK)
789a424a 2808 return_status = sendcmd_withirq_core(h, c, 1);
2809
6b4d96b8 2810 cmd_special_free(h, c);
7c832835 2811 return return_status;
1da177e4 2812}
7c832835 2813
f70dba83 2814static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2815 sector_t total_size,
7c832835
BH		 2816 unsigned int block_size,
2817 InquiryData_struct *inq_buff,
2818 drive_info_struct *drv)
1da177e4
LT		 2819{
2820 int return_code;
00988a35 2821 unsigned long t;
b57695fe 2822 unsigned char scsi3addr[8];
00988a35 2823
1da177e4 2824 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2825 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2826 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2827 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2828 if (return_code == IO_OK) {
7c832835 2829 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2830 dev_warn(&h->pdev->dev,
2831 "reading geometry failed, volume "
7c832835 2832 "does not support reading geometry\n");
1da177e4 2833 drv->heads = 255;
b028461d 2834 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2835 drv->cylinders = total_size + 1;
89f97ad1 2836 drv->raid_level = RAID_UNKNOWN;
1da177e4 2837 } else {
1da177e4
LT		 2838 drv->heads = inq_buff->data_byte[6];
2839 drv->sectors = inq_buff->data_byte[7];
2840 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2841 drv->cylinders += inq_buff->data_byte[5];
2842 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2843 }
2844 drv->block_size = block_size;
97c06978 2845 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2846 t = drv->heads * drv->sectors;
2847 if (t > 1) {
97c06978
MMOD		 2848 sector_t real_size = total_size + 1;
2849 unsigned long rem = sector_div(real_size, t);
3f7705ea 2850 if (rem)
97c06978
MMOD		 2851 real_size++;
2852 drv->cylinders = real_size;
1da177e4 2853 }
7c832835 2854 } else { /* Get geometry failed */
b2a4a43d 2855 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2856 }
1da177e4 2857}
7c832835 2858
1da177e4 2859static void
f70dba83 2860cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2861 unsigned int *block_size)
1da177e4 2862{
00988a35 2863 ReadCapdata_struct *buf;
1da177e4 2864 int return_code;
b57695fe 2865 unsigned char scsi3addr[8];
1aebe187
MK		 2866
2867 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2868 if (!buf) {
b2a4a43d 2869 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2870 return;
2871 }
1aebe187 2872
f70dba83
SC		 2873 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2874 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2875 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2876 if (return_code == IO_OK) {
4c1f2b31
AV		 2877 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2878 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2879 } else { /* read capacity command failed */
b2a4a43d 2880 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2881 *total_size = 0;
2882 *block_size = BLOCK_SIZE;
2883 }
00988a35 2884 kfree(buf);
00988a35
MMOD		 2885}
2886
f70dba83 2887static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2888 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2889{
2890 ReadCapdata_struct_16 *buf;
2891 int return_code;
b57695fe 2892 unsigned char scsi3addr[8];
1aebe187
MK		 2893
2894 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2895 if (!buf) {
b2a4a43d 2896 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2897 return;
2898 }
1aebe187 2899
f70dba83
SC		 2900 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2901 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2902 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2903 0, scsi3addr, TYPE_CMD);
00988a35 2904 if (return_code == IO_OK) {
4c1f2b31
AV		 2905 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2906 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2907 } else { /* read capacity command failed */
b2a4a43d 2908 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2909 *total_size = 0;
2910 *block_size = BLOCK_SIZE;
2911 }
b2a4a43d 2912 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2913 (unsigned long long)*total_size+1, *block_size);
00988a35 2914 kfree(buf);
1da177e4
LT		 2915}
2916
1da177e4
LT		 2917static int cciss_revalidate(struct gendisk *disk)
2918{
2919 ctlr_info_t *h = get_host(disk);
2920 drive_info_struct *drv = get_drv(disk);
2921 int logvol;
7c832835 2922 int FOUND = 0;
1da177e4 2923 unsigned int block_size;
00988a35 2924 sector_t total_size;
1da177e4
LT		 2925 InquiryData_struct *inq_buff = NULL;
2926
68264e9d 2927 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
0fc13c89 2928 if (!h->drv[logvol])
453434cf 2929 continue;
9cef0d2f 2930 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2931 sizeof(drv->LunID)) == 0) {
7c832835 2932 FOUND = 1;
1da177e4
LT		 2933 break;
2934 }
2935 }
2936
7c832835
BH		 2937 if (!FOUND)
2938 return 1;
1da177e4 2939
7c832835
BH		 2940 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2941 if (inq_buff == NULL) {
b2a4a43d 2942 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2943 return 1;
2944 }
00988a35 2945 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2946 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2947 &total_size, &block_size);
2948 } else {
f70dba83 2949 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2950 &total_size, &block_size);
2951 }
f70dba83 2952 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2953 inq_buff, drv);
1da177e4 2954
e1defc4f 2955 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2956 set_capacity(disk, drv->nr_blocks);
2957
1da177e4
LT		 2958 kfree(inq_buff);
2959 return 0;
2960}
2961
1da177e4
LT		 2962/*
2963 * Map (physical) PCI mem into (virtual) kernel space
2964 */
2965static void __iomem *remap_pci_mem(ulong base, ulong size)
2966{
7c832835
BH		 2967 ulong page_base = ((ulong) base) & PAGE_MASK;
2968 ulong page_offs = ((ulong) base) - page_base;
2969 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2970
7c832835 2971 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2972}
2973
7c832835
BH		 2974/*
2975 * Takes jobs of the Q and sends them to the hardware, then puts it on
2976 * the Q to wait for completion.
2977 */
2978static void start_io(ctlr_info_t *h)
1da177e4
LT		 2979{
2980 CommandList_struct *c;
7c832835 2981
e6e1ee93
JA		 2982 while (!list_empty(&h->reqQ)) {
2983 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 2984 /* can't do anything if fifo is full */
2985 if ((h->access.fifo_full(h))) {
b2a4a43d 2986 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2987 break;
2988 }
2989
7c832835 2990 /* Get the first entry from the Request Q */
8a3173de 2991 removeQ(c);
1da177e4 2992 h->Qdepth--;
7c832835
BH		 2993
2994 /* Tell the controller execute command */
1da177e4 2995 h->access.submit_command(h, c);
7c832835
BH		 2996
2997 /* Put job onto the completed Q */
8a3173de 2998 addQ(&h->cmpQ, c);
1da177e4
LT		 2999 }
3000}
7c832835 3001
f70dba83 3002/* Assumes that h->lock is held. */
1da177e4
LT		 3003/* Zeros out the error record and then resends the command back */
3004/* to the controller */
7c832835 3005static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 3006{
3007 /* erase the old error information */
3008 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3009
3010 /* add it to software queue and then send it to the controller */
8a3173de 3011 addQ(&h->reqQ, c);
1da177e4 3012 h->Qdepth++;
7c832835 3013 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 3014 h->maxQsinceinit = h->Qdepth;
3015
3016 start_io(h);
3017}
a9925a06 3018
1a614f50
SC		 3019static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3020 unsigned int msg_byte, unsigned int host_byte,
3021 unsigned int driver_byte)
3022{
3023 /* inverse of macros in scsi.h */
3024 return (scsi_status_byte & 0xff) |
3025 ((msg_byte & 0xff) << 8) |
3026 ((host_byte & 0xff) << 16) |
3027 ((driver_byte & 0xff) << 24);
3028}
3029
0a9279cc
MM		 3030static inline int evaluate_target_status(ctlr_info_t *h,
3031 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 3032{
3033 unsigned char sense_key;
1a614f50
SC		 3034 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3035 int error_value;
3036
0a9279cc 3037 *retry_cmd = 0;
1a614f50
SC		 3038 /* If we get in here, it means we got "target status", that is, scsi status */
3039 status_byte = cmd->err_info->ScsiStatus;
3040 driver_byte = DRIVER_OK;
3041 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3042
33659ebb 3043 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 3044 host_byte = DID_PASSTHROUGH;
3045 else
3046 host_byte = DID_OK;
3047
3048 error_value = make_status_bytes(status_byte, msg_byte,
3049 host_byte, driver_byte);
03bbfee5 3050
1a614f50 3051 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3052 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3053 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3054 "has SCSI Status 0x%x\n",
3055 cmd, cmd->err_info->ScsiStatus);
1a614f50 3056 return error_value;
03bbfee5
MMOD		 3057 }
3058
3059 /* check the sense key */
3060 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3061 /* no status or recovered error */
33659ebb
CH		 3062 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3063 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3064 error_value = 0;
03bbfee5 3065
0a9279cc 3066 if (check_for_unit_attention(h, cmd)) {
33659ebb 3067 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3068 return 0;
3069 }
3070
33659ebb
CH		 3071 /* Not SG_IO or similar? */
3072 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3073 if (error_value != 0)
b2a4a43d 3074 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3075 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3076 return error_value;
03bbfee5
MMOD		 3077 }
3078
3079 /* SG_IO or similar, copy sense data back */
3080 if (cmd->rq->sense) {
3081 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3082 cmd->rq->sense_len = cmd->err_info->SenseLen;
3083 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3084 cmd->rq->sense_len);
3085 } else
3086 cmd->rq->sense_len = 0;
3087
1a614f50 3088 return error_value;
03bbfee5
MMOD		 3089}
3090
7c832835 3091/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3092 * buffers for the completed job. Note that this function does not need
3093 * to hold the hba/queue lock.
7c832835
BH		 3094 */
3095static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3096 int timeout)
1da177e4 3097{
1da177e4 3098 int retry_cmd = 0;
198b7660
MMOD		 3099 struct request *rq = cmd->rq;
3100
3101 rq->errors = 0;
7c832835 3102
1da177e4 3103 if (timeout)
1a614f50 3104 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3105
d38ae168
MMOD		 3106 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3107 goto after_error_processing;
7c832835 3108
d38ae168 3109 switch (cmd->err_info->CommandStatus) {
d38ae168 3110 case CMD_TARGET_STATUS:
0a9279cc 3111 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3112 break;
3113 case CMD_DATA_UNDERRUN:
33659ebb 3114 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3115 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3116 " completed with data underrun "
3117 "reported\n", cmd);
c3a4d78c 3118 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3119 }
d38ae168
MMOD		 3120 break;
3121 case CMD_DATA_OVERRUN:
33659ebb 3122 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3123 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3124 " completed with data overrun "
3125 "reported\n", cmd);
d38ae168
MMOD		 3126 break;
3127 case CMD_INVALID:
b2a4a43d 3128 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3129 "reported invalid\n", cmd);
1a614f50
SC		 3130 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3131 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3132 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3133 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3134 break;
3135 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3136 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3137 "protocol error\n", cmd);
1a614f50
SC		 3138 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3139 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3140 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3141 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3142 break;
3143 case CMD_HARDWARE_ERR:
b2a4a43d 3144 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3145 " hardware error\n", cmd);
1a614f50
SC		 3146 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3147 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3148 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3149 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3150 break;
3151 case CMD_CONNECTION_LOST:
b2a4a43d 3152 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3153 "connection lost\n", cmd);
1a614f50
SC		 3154 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3155 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3156 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3157 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3158 break;
3159 case CMD_ABORTED:
b2a4a43d 3160 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3161 "aborted\n", cmd);
1a614f50
SC		 3162 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3163 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3164 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3165 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3166 break;
3167 case CMD_ABORT_FAILED:
b2a4a43d 3168 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3169 "abort failed\n", cmd);
1a614f50
SC		 3170 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3171 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3172 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3173 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3174 break;
3175 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3176 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3177 "abort %p\n", h->ctlr, cmd);
3178 if (cmd->retry_count < MAX_CMD_RETRIES) {
3179 retry_cmd = 1;
b2a4a43d 3180 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3181 cmd->retry_count++;
3182 } else
b2a4a43d
SC		 3183 dev_warn(&h->pdev->dev,
3184 "%p retried too many times\n", cmd);
1a614f50
SC		 3185 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3186 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3187 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3188 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3189 break;
3190 case CMD_TIMEOUT:
b2a4a43d 3191 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3192 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3193 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3194 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3195 DID_PASSTHROUGH : DID_ERROR);
d38ae168 3196 break;
6d9a4f9e
SC		 3197 case CMD_UNABORTABLE:
3198 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3199 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3200 cmd->err_info->CommandStatus, DRIVER_OK,
3201 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3202 DID_PASSTHROUGH : DID_ERROR);
3203 break;
d38ae168 3204 default:
b2a4a43d 3205 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3206 "unknown status %x\n", cmd,
3207 cmd->err_info->CommandStatus);
1a614f50
SC		 3208 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3209 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3210 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3211 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3212 }
d38ae168
MMOD		 3213
3214after_error_processing:
3215
1da177e4 3216 /* We need to return this command */
7c832835
BH		 3217 if (retry_cmd) {
3218 resend_cciss_cmd(h, cmd);
1da177e4 3219 return;
7c832835 3220 }
03bbfee5 3221 cmd->rq->completion_data = cmd;
a9925a06 3222 blk_complete_request(cmd->rq);
1da177e4
LT		 3223}
3224
0c2b3908
MM		 3225static inline u32 cciss_tag_contains_index(u32 tag)
3226{
5e216153 3227#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3228 return tag & DIRECT_LOOKUP_BIT;
3229}
3230
3231static inline u32 cciss_tag_to_index(u32 tag)
3232{
5e216153 3233#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3234 return tag >> DIRECT_LOOKUP_SHIFT;
3235}
3236
0498cc2a 3237static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
0c2b3908 3238{
0498cc2a
SC		 3239#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3240#define CCISS_SIMPLE_ERROR_BITS 0x03
3241 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3242 return tag & ~CCISS_PERF_ERROR_BITS;
3243 return tag & ~CCISS_SIMPLE_ERROR_BITS;
0c2b3908
MM		 3244}
3245
3246static inline void cciss_mark_tag_indexed(u32 *tag)
3247{
3248 *tag |= DIRECT_LOOKUP_BIT;
3249}
3250
3251static inline void cciss_set_tag_index(u32 *tag, u32 index)
3252{
3253 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3254}
3255
7c832835
BH		 3256/*
3257 * Get a request and submit it to the controller.
1da177e4 3258 */
165125e1 3259static void do_cciss_request(struct request_queue *q)
1da177e4 3260{
7c832835 3261 ctlr_info_t *h = q->queuedata;
1da177e4 3262 CommandList_struct *c;
00988a35
MMOD		 3263 sector_t start_blk;
3264 int seg;
1da177e4
LT		 3265 struct request *creq;
3266 u64bit temp64;
5c07a311
DB		 3267 struct scatterlist *tmp_sg;
3268 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3269 drive_info_struct *drv;
3270 int i, dir;
5c07a311
DB		 3271 int sg_index = 0;
3272 int chained = 0;
1da177e4 3273
7c832835 3274 queue:
9934c8c0 3275 creq = blk_peek_request(q);
1da177e4
LT		 3276 if (!creq)
3277 goto startio;
3278
5c07a311 3279 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3280
6b4d96b8
SC		 3281 c = cmd_alloc(h);
3282 if (!c)
1da177e4
LT		 3283 goto full;
3284
9934c8c0 3285 blk_start_request(creq);
1da177e4 3286
5c07a311 3287 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3288 spin_unlock_irq(q->queue_lock);
3289
3290 c->cmd_type = CMD_RWREQ;
3291 c->rq = creq;
7c832835
BH		 3292
3293 /* fill in the request */
1da177e4 3294 drv = creq->rq_disk->private_data;
b028461d 3295 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3296 /* got command from pool, so use the command block index instead */
3297 /* for direct lookups. */
3298 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3299 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3300 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3301 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3302 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3303 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3304 c->Request.Type.Attribute = ATTR_SIMPLE;
3305 c->Request.Type.Direction =
a52de245 3306 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3307 c->Request.Timeout = 0; /* Don't time out */
7c832835 3308 c->Request.CDB[0] =
00988a35 3309 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3310 start_blk = blk_rq_pos(creq);
b2a4a43d 3311 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3312 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3313 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3314 seg = blk_rq_map_sg(q, creq, tmp_sg);
3315
7c832835 3316 /* get the DMA records for the setup */
1da177e4
LT		 3317 if (c->Request.Type.Direction == XFER_READ)
3318 dir = PCI_DMA_FROMDEVICE;
3319 else
3320 dir = PCI_DMA_TODEVICE;
3321
5c07a311
DB		 3322 curr_sg = c->SG;
3323 sg_index = 0;
3324 chained = 0;
3325
7c832835 3326 for (i = 0; i < seg; i++) {
5c07a311
DB		 3327 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3328 !chained && ((seg - i) > 1)) {
5c07a311 3329 /* Point to next chain block. */
dccc9b56 3330 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3331 sg_index = 0;
3332 chained = 1;
3333 }
3334 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3335 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3336 tmp_sg[i].offset,
3337 tmp_sg[i].length, dir);
3338 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3339 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3340 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3341 ++sg_index;
1da177e4 3342 }
d45033ef
SC		 3343 if (chained)
3344 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3345 (seg - (h->max_cmd_sgentries - 1)) *
3346 sizeof(SGDescriptor_struct));
5c07a311 3347
7c832835
BH		 3348 /* track how many SG entries we are using */
3349 if (seg > h->maxSG)
3350 h->maxSG = seg;
1da177e4 3351
b2a4a43d 3352 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3353 "chained[%d]\n",
3354 blk_rq_sectors(creq), seg, chained);
1da177e4 3355
5e216153
MM		 3356 c->Header.SGTotal = seg + chained;
3357 if (seg <= h->max_cmd_sgentries)
3358 c->Header.SGList = c->Header.SGTotal;
3359 else
5c07a311 3360 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3361 set_performant_mode(h, c);
5c07a311 3362
33659ebb 3363 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3364 if(h->cciss_read == CCISS_READ_10) {
3365 c->Request.CDB[1] = 0;
b028461d 3366 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3367 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3368 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3369 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3370 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3371 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3372 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3373 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3374 } else {
582539e5
RD		 3375 u32 upper32 = upper_32_bits(start_blk);
3376
03bbfee5
MMOD		 3377 c->Request.CDBLen = 16;
3378 c->Request.CDB[1]= 0;
b028461d 3379 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3380 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3381 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3382 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3383 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3384 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3385 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3386 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3387 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3388 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3389 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3390 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3391 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3392 }
33659ebb 3393 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3394 c->Request.CDBLen = creq->cmd_len;
3395 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3396 } else {
b2a4a43d
SC		 3397 dev_warn(&h->pdev->dev, "bad request type %d\n",
3398 creq->cmd_type);
03bbfee5 3399 BUG();
00988a35 3400 }
1da177e4
LT		 3401
3402 spin_lock_irq(q->queue_lock);
3403
8a3173de 3404 addQ(&h->reqQ, c);
1da177e4 3405 h->Qdepth++;
7c832835
BH		 3406 if (h->Qdepth > h->maxQsinceinit)
3407 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3408
3409 goto queue;
00988a35 3410full:
1da177e4 3411 blk_stop_queue(q);
00988a35 3412startio:
1da177e4
LT		 3413 /* We will already have the driver lock here so not need
3414 * to lock it.
7c832835 3415 */
1da177e4
LT		 3416 start_io(h);
3417}
3418
3da8b713 3419static inline unsigned long get_next_completion(ctlr_info_t *h)
3420{
3da8b713 3421 return h->access.command_completed(h);
3da8b713 3422}
3423
3424static inline int interrupt_pending(ctlr_info_t *h)
3425{
3da8b713 3426 return h->access.intr_pending(h);
3da8b713 3427}
3428
3429static inline long interrupt_not_for_us(ctlr_info_t *h)
3430{
81125860 3431 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3432 (h->interrupts_enabled == 0));
3da8b713 3433}
3434
0c2b3908
MM		 3435static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3436 u32 raw_tag)
1da177e4 3437{
0c2b3908
MM		 3438 if (unlikely(tag_index >= h->nr_cmds)) {
3439 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3440 return 1;
3441 }
3442 return 0;
3443}
3444
3445static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3446 u32 raw_tag)
3447{
3448 removeQ(c);
3449 if (likely(c->cmd_type == CMD_RWREQ))
3450 complete_command(h, c, 0);
3451 else if (c->cmd_type == CMD_IOCTL_PEND)
3452 complete(c->waiting);
3453#ifdef CONFIG_CISS_SCSI_TAPE
3454 else if (c->cmd_type == CMD_SCSI)
3455 complete_scsi_command(c, 0, raw_tag);
3456#endif
3457}
3458
29979a71
MM		 3459static inline u32 next_command(ctlr_info_t *h)
3460{
3461 u32 a;
3462
0498cc2a 3463 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
29979a71
MM		 3464 return h->access.command_completed(h);
3465
3466 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3467 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3468 (h->reply_pool_head)++;
3469 h->commands_outstanding--;
3470 } else {
3471 a = FIFO_EMPTY;
3472 }
3473 /* Check for wraparound */
3474 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3475 h->reply_pool_head = h->reply_pool;
3476 h->reply_pool_wraparound ^= 1;
3477 }
3478 return a;
3479}
3480
0c2b3908
MM		 3481/* process completion of an indexed ("direct lookup") command */
3482static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3483{
3484 u32 tag_index;
1da177e4 3485 CommandList_struct *c;
0c2b3908
MM		 3486
3487 tag_index = cciss_tag_to_index(raw_tag);
3488 if (bad_tag(h, tag_index, raw_tag))
5e216153 3489 return next_command(h);
0c2b3908
MM		 3490 c = h->cmd_pool + tag_index;
3491 finish_cmd(h, c, raw_tag);
5e216153 3492 return next_command(h);
0c2b3908
MM		 3493}
3494
3495/* process completion of a non-indexed command */
3496static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3497{
0c2b3908 3498 CommandList_struct *c = NULL;
0c2b3908
MM		 3499 __u32 busaddr_masked, tag_masked;
3500
0498cc2a 3501 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
e6e1ee93 3502 list_for_each_entry(c, &h->cmpQ, list) {
0498cc2a 3503 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
0c2b3908
MM		 3504 if (busaddr_masked == tag_masked) {
3505 finish_cmd(h, c, raw_tag);
5e216153 3506 return next_command(h);
0c2b3908
MM		 3507 }
3508 }
3509 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3510 return next_command(h);
0c2b3908
MM		 3511}
3512
5afe2781
SC		 3513/* Some controllers, like p400, will give us one interrupt
3514 * after a soft reset, even if we turned interrupts off.
3515 * Only need to check for this in the cciss_xxx_discard_completions
3516 * functions.
3517 */
3518static int ignore_bogus_interrupt(ctlr_info_t *h)
3519{
3520 if (likely(!reset_devices))
3521 return 0;
3522
3523 if (likely(h->interrupts_enabled))
3524 return 0;
3525
3526 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3527 "(known firmware bug.) Ignoring.\n");
3528
3529 return 1;
3530}
3531
3532static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3533{
3534 ctlr_info_t *h = dev_id;
3535 unsigned long flags;
3536 u32 raw_tag;
3537
3538 if (ignore_bogus_interrupt(h))
3539 return IRQ_NONE;
3540
3541 if (interrupt_not_for_us(h))
3542 return IRQ_NONE;
3543 spin_lock_irqsave(&h->lock, flags);
3544 while (interrupt_pending(h)) {
3545 raw_tag = get_next_completion(h);
3546 while (raw_tag != FIFO_EMPTY)
3547 raw_tag = next_command(h);
3548 }
3549 spin_unlock_irqrestore(&h->lock, flags);
3550 return IRQ_HANDLED;
3551}
3552
3553static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3554{
3555 ctlr_info_t *h = dev_id;
3556 unsigned long flags;
3557 u32 raw_tag;
3558
3559 if (ignore_bogus_interrupt(h))
3560 return IRQ_NONE;
3561
3562 spin_lock_irqsave(&h->lock, flags);
3563 raw_tag = get_next_completion(h);
3564 while (raw_tag != FIFO_EMPTY)
3565 raw_tag = next_command(h);
3566 spin_unlock_irqrestore(&h->lock, flags);
3567 return IRQ_HANDLED;
3568}
3569
0c2b3908
MM		 3570static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3571{
3572 ctlr_info_t *h = dev_id;
1da177e4 3573 unsigned long flags;
0c2b3908 3574 u32 raw_tag;
1da177e4 3575
3da8b713 3576 if (interrupt_not_for_us(h))
1da177e4 3577 return IRQ_NONE;
f70dba83 3578 spin_lock_irqsave(&h->lock, flags);
3da8b713 3579 while (interrupt_pending(h)) {
0c2b3908
MM		 3580 raw_tag = get_next_completion(h);
3581 while (raw_tag != FIFO_EMPTY) {
3582 if (cciss_tag_contains_index(raw_tag))
3583 raw_tag = process_indexed_cmd(h, raw_tag);
3584 else
3585 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3586 }
3587 }
f70dba83 3588 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3589 return IRQ_HANDLED;
3590}
1da177e4 3591
0c2b3908
MM		 3592/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3593 * check the interrupt pending register because it is not set.
3594 */
3595static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3596{
3597 ctlr_info_t *h = dev_id;
3598 unsigned long flags;
3599 u32 raw_tag;
8a3173de 3600
f70dba83 3601 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3602 raw_tag = get_next_completion(h);
3603 while (raw_tag != FIFO_EMPTY) {
3604 if (cciss_tag_contains_index(raw_tag))
3605 raw_tag = process_indexed_cmd(h, raw_tag);
3606 else
3607 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3608 }
f70dba83 3609 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3610 return IRQ_HANDLED;
3611}
7c832835 3612
b368c9dd
AP		 3613/**
3614 * add_to_scan_list() - add controller to rescan queue
3615 * @h: Pointer to the controller.
3616 *
3617 * Adds the controller to the rescan queue if not already on the queue.
3618 *
3619 * returns 1 if added to the queue, 0 if skipped (could be on the
3620 * queue already, or the controller could be initializing or shutting
3621 * down).
3622 **/
3623static int add_to_scan_list(struct ctlr_info *h)
3624{
3625 struct ctlr_info *test_h;
3626 int found = 0;
3627 int ret = 0;
3628
3629 if (h->busy_initializing)
3630 return 0;
3631
3632 if (!mutex_trylock(&h->busy_shutting_down))
3633 return 0;
3634
3635 mutex_lock(&scan_mutex);
3636 list_for_each_entry(test_h, &scan_q, scan_list) {
3637 if (test_h == h) {
3638 found = 1;
3639 break;
3640 }
3641 }
3642 if (!found && !h->busy_scanning) {
3643 INIT_COMPLETION(h->scan_wait);
3644 list_add_tail(&h->scan_list, &scan_q);
3645 ret = 1;
3646 }
3647 mutex_unlock(&scan_mutex);
3648 mutex_unlock(&h->busy_shutting_down);
3649
3650 return ret;
3651}
3652
3653/**
3654 * remove_from_scan_list() - remove controller from rescan queue
3655 * @h: Pointer to the controller.
3656 *
3657 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3658 * the controller is currently conducting a rescan. The controller
3659 * can be in one of three states:
3660 * 1. Doesn't need a scan
3661 * 2. On the scan list, but not scanning yet (we remove it)
3662 * 3. Busy scanning (and not on the list). In this case we want to wait for
3663 * the scan to complete to make sure the scanning thread for this
3664 * controller is completely idle.
b368c9dd
AP		 3665 **/
3666static void remove_from_scan_list(struct ctlr_info *h)
3667{
3668 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3669
3670 mutex_lock(&scan_mutex);
3671 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3672 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3673 list_del(&h->scan_list);
3674 complete_all(&h->scan_wait);
3675 mutex_unlock(&scan_mutex);
3676 return;
3677 }
3678 }
fd8489cf
SC		 3679 if (h->busy_scanning) { /* state 3. */
3680 mutex_unlock(&scan_mutex);
b368c9dd 3681 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3682 } else { /* state 1, nothing to do. */
3683 mutex_unlock(&scan_mutex);
3684 }
b368c9dd
AP		 3685}
3686
3687/**
3688 * scan_thread() - kernel thread used to rescan controllers
3689 * @data: Ignored.
3690 *
3691 * A kernel thread used scan for drive topology changes on
3692 * controllers. The thread processes only one controller at a time
3693 * using a queue. Controllers are added to the queue using
3694 * add_to_scan_list() and removed from the queue either after done
3695 * processing or using remove_from_scan_list().
3696 *
3697 * returns 0.
3698 **/
0a9279cc
MM		 3699static int scan_thread(void *data)
3700{
b368c9dd 3701 struct ctlr_info *h;
0a9279cc 3702
b368c9dd
AP		 3703 while (1) {
3704 set_current_state(TASK_INTERRUPTIBLE);
3705 schedule();
0a9279cc
MM		 3706 if (kthread_should_stop())
3707 break;
b368c9dd
AP		 3708
3709 while (1) {
3710 mutex_lock(&scan_mutex);
3711 if (list_empty(&scan_q)) {
3712 mutex_unlock(&scan_mutex);
3713 break;
3714 }
3715
3716 h = list_entry(scan_q.next,
3717 struct ctlr_info,
3718 scan_list);
3719 list_del(&h->scan_list);
3720 h->busy_scanning = 1;
3721 mutex_unlock(&scan_mutex);
3722
d06dfbd2
SC		 3723 rebuild_lun_table(h, 0, 0);
3724 complete_all(&h->scan_wait);
3725 mutex_lock(&scan_mutex);
3726 h->busy_scanning = 0;
3727 mutex_unlock(&scan_mutex);
b368c9dd 3728 }
0a9279cc 3729 }
b368c9dd 3730
0a9279cc
MM		 3731 return 0;
3732}
3733
3734static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3735{
3736 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3737 return 0;
3738
3739 switch (c->err_info->SenseInfo[12]) {
3740 case STATE_CHANGED:
b2a4a43d
SC		 3741 dev_warn(&h->pdev->dev, "a state change "
3742 "detected, command retried\n");
0a9279cc
MM		 3743 return 1;
3744 break;
3745 case LUN_FAILED:
b2a4a43d
SC		 3746 dev_warn(&h->pdev->dev, "LUN failure "
3747 "detected, action required\n");
0a9279cc
MM		 3748 return 1;
3749 break;
3750 case REPORT_LUNS_CHANGED:
b2a4a43d 3751 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3752 /*
3753 * Here, we could call add_to_scan_list and wake up the scan thread,
3754 * except that it's quite likely that we will get more than one
3755 * REPORT_LUNS_CHANGED condition in quick succession, which means
3756 * that those which occur after the first one will likely happen
3757 * *during* the scan_thread's rescan. And the rescan code is not
3758 * robust enough to restart in the middle, undoing what it has already
3759 * done, and it's not clear that it's even possible to do this, since
3760 * part of what it does is notify the block layer, which starts
3761 * doing it's own i/o to read partition tables and so on, and the
3762 * driver doesn't have visibility to know what might need undoing.
3763 * In any event, if possible, it is horribly complicated to get right
3764 * so we just don't do it for now.
3765 *
3766 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3767 */
0a9279cc
MM		 3768 return 1;
3769 break;
3770 case POWER_OR_RESET:
b2a4a43d
SC		 3771 dev_warn(&h->pdev->dev,
3772 "a power on or device reset detected\n");
0a9279cc
MM		 3773 return 1;
3774 break;
3775 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3776 dev_warn(&h->pdev->dev,
3777 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3778 return 1;
3779 break;
3780 default:
b2a4a43d
SC		 3781 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3782 return 1;
0a9279cc
MM		 3783 }
3784}
3785
7c832835 3786/*
d14c4ab5 3787 * We cannot read the structure directly, for portability we must use
1da177e4 3788 * the io functions.
7c832835 3789 * This is for debug only.
1da177e4 3790 */
b2a4a43d 3791static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3792{
3793 int i;
3794 char temp_name[17];
b2a4a43d 3795 CfgTable_struct *tb = h->cfgtable;
1da177e4 3796
b2a4a43d
SC		 3797 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3798 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3799 for (i = 0; i < 4; i++)
1da177e4 3800 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3801 temp_name[4] = '\0';
b2a4a43d
SC		 3802 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3803 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3804 readl(&(tb->SpecValence)));
3805 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3806 readl(&(tb->TransportSupport)));
b2a4a43d 3807 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3808 readl(&(tb->TransportActive)));
b2a4a43d 3809 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3810 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3811 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3812 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3813 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3814 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3815 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3816 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3817 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3818 readl(&(tb->BusTypes)));
7c832835 3819 for (i = 0; i < 16; i++)
1da177e4
LT		 3820 temp_name[i] = readb(&(tb->ServerName[i]));
3821 temp_name[16] = '\0';
b2a4a43d
SC		 3822 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3823 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3824 readl(&(tb->HeartBeat)));
1da177e4 3825}
1da177e4 3826
7c832835 3827static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3828{
3829 int i, offset, mem_type, bar_type;
7c832835 3830 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3831 return 0;
3832 offset = 0;
7c832835
BH		 3833 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3834 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3835 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3836 offset += 4;
3837 else {
3838 mem_type = pci_resource_flags(pdev, i) &
7c832835 3839 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3840 switch (mem_type) {
7c832835
BH		 3841 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3842 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3843 offset += 4; /* 32 bit */
3844 break;
3845 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3846 offset += 8;
3847 break;
3848 default: /* reserved in PCI 2.2 */
b2a4a43d 3849 dev_warn(&pdev->dev,
7c832835
BH		 3850 "Base address is invalid\n");
3851 return -1;
1da177e4
LT		 3852 break;
3853 }
3854 }
7c832835
BH		 3855 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3856 return i + 1;
1da177e4
LT		 3857 }
3858 return -1;
3859}
3860
5e216153
MM		 3861/* Fill in bucket_map[], given nsgs (the max number of
3862 * scatter gather elements supported) and bucket[],
3863 * which is an array of 8 integers. The bucket[] array
3864 * contains 8 different DMA transfer sizes (in 16
3865 * byte increments) which the controller uses to fetch
3866 * commands. This function fills in bucket_map[], which
3867 * maps a given number of scatter gather elements to one of
3868 * the 8 DMA transfer sizes. The point of it is to allow the
3869 * controller to only do as much DMA as needed to fetch the
3870 * command, with the DMA transfer size encoded in the lower
3871 * bits of the command address.
3872 */
3873static void calc_bucket_map(int bucket[], int num_buckets,
3874 int nsgs, int *bucket_map)
3875{
3876 int i, j, b, size;
3877
3878 /* even a command with 0 SGs requires 4 blocks */
3879#define MINIMUM_TRANSFER_BLOCKS 4
3880#define NUM_BUCKETS 8
3881 /* Note, bucket_map must have nsgs+1 entries. */
3882 for (i = 0; i <= nsgs; i++) {
3883 /* Compute size of a command with i SG entries */
3884 size = i + MINIMUM_TRANSFER_BLOCKS;
3885 b = num_buckets; /* Assume the biggest bucket */
3886 /* Find the bucket that is just big enough */
3887 for (j = 0; j < 8; j++) {
3888 if (bucket[j] >= size) {
3889 b = j;
3890 break;
3891 }
3892 }
3893 /* for a command with i SG entries, use bucket b. */
3894 bucket_map[i] = b;
3895 }
3896}
3897
0f8a6a1e
SC		 3898static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3899{
3900 int i;
3901
3902 /* under certain very rare conditions, this can take awhile.
3903 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3904 * as we enter this code.) */
3905 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3906 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3907 break;
332c2f80 3908 usleep_range(10000, 20000);
0f8a6a1e
SC		 3909 }
3910}
3911
0498cc2a
SC		 3912static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3913 u32 use_short_tags)
b9933135
SC		 3914{
3915 /* This is a bit complicated. There are 8 registers on
3916 * the controller which we write to to tell it 8 different
3917 * sizes of commands which there may be. It's a way of
3918 * reducing the DMA done to fetch each command. Encoded into
3919 * each command's tag are 3 bits which communicate to the controller
3920 * which of the eight sizes that command fits within. The size of
3921 * each command depends on how many scatter gather entries there are.
3922 * Each SG entry requires 16 bytes. The eight registers are programmed
3923 * with the number of 16-byte blocks a command of that size requires.
3924 * The smallest command possible requires 5 such 16 byte blocks.
3925 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3926 * blocks. Note, this only extends to the SG entries contained
3927 * within the command block, and does not extend to chained blocks
3928 * of SG elements. bft[] contains the eight values we write to
3929 * the registers. They are not evenly distributed, but have more
3930 * sizes for small commands, and fewer sizes for larger commands.
3931 */
5e216153 3932 __u32 trans_offset;
b9933135 3933 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3934 /*
3935 * 5 = 1 s/g entry or 4k
3936 * 6 = 2 s/g entry or 8k
3937 * 8 = 4 s/g entry or 16k
3938 * 10 = 6 s/g entry or 24k
3939 */
5e216153 3940 unsigned long register_value;
5e216153
MM		 3941 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3942
5e216153
MM		 3943 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3944
3945 /* Controller spec: zero out this buffer. */
3946 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3947 h->reply_pool_head = h->reply_pool;
3948
3949 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3950 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3951 h->blockFetchTable);
3952 writel(bft[0], &h->transtable->BlockFetch0);
3953 writel(bft[1], &h->transtable->BlockFetch1);
3954 writel(bft[2], &h->transtable->BlockFetch2);
3955 writel(bft[3], &h->transtable->BlockFetch3);
3956 writel(bft[4], &h->transtable->BlockFetch4);
3957 writel(bft[5], &h->transtable->BlockFetch5);
3958 writel(bft[6], &h->transtable->BlockFetch6);
3959 writel(bft[7], &h->transtable->BlockFetch7);
3960
3961 /* size of controller ring buffer */
3962 writel(h->max_commands, &h->transtable->RepQSize);
3963 writel(1, &h->transtable->RepQCount);
3964 writel(0, &h->transtable->RepQCtrAddrLow32);
3965 writel(0, &h->transtable->RepQCtrAddrHigh32);
3966 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3967 writel(0, &h->transtable->RepQAddr0High32);
0498cc2a 3968 writel(CFGTBL_Trans_Performant | use_short_tags,
5e216153
MM		 3969 &(h->cfgtable->HostWrite.TransportRequest));
3970
5e216153 3971 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3972 cciss_wait_for_mode_change_ack(h);
5e216153 3973 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3974 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3975 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3976 " performant mode\n");
b9933135
SC		 3977}
3978
3979static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3980{
3981 __u32 trans_support;
3982
3983 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3984 /* Attempt to put controller into performant mode if supported */
3985 /* Does board support performant mode? */
3986 trans_support = readl(&(h->cfgtable->TransportSupport));
3987 if (!(trans_support & PERFORMANT_MODE))
3988 return;
3989
b2a4a43d 3990 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3991 /* Performant mode demands commands on a 32 byte boundary
3992 * pci_alloc_consistent aligns on page boundarys already.
3993 * Just need to check if divisible by 32
3994 */
3995 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3996 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3997 "cciss info: command size[",
3998 (int)sizeof(CommandList_struct),
3999 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 4000 return;
4001 }
4002
b9933135
SC		 4003 /* Performant mode ring buffer and supporting data structures */
4004 h->reply_pool = (__u64 *)pci_alloc_consistent(
4005 h->pdev, h->max_commands * sizeof(__u64),
4006 &(h->reply_pool_dhandle));
4007
4008 /* Need a block fetch table for performant mode */
4009 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4010 sizeof(__u32)), GFP_KERNEL);
4011
4012 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4013 goto clean_up;
4014
0498cc2a
SC		 4015 cciss_enter_performant_mode(h,
4016 trans_support & CFGTBL_Trans_use_short_tags);
b9933135 4017
5e216153
MM		 4018 /* Change the access methods to the performant access methods */
4019 h->access = SA5_performant_access;
b9933135 4020 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 4021
4022 return;
4023clean_up:
4024 kfree(h->blockFetchTable);
4025 if (h->reply_pool)
4026 pci_free_consistent(h->pdev,
4027 h->max_commands * sizeof(__u64),
4028 h->reply_pool,
4029 h->reply_pool_dhandle);
4030 return;
4031
4032} /* cciss_put_controller_into_performant_mode */
4033
fb86a35b
MM		 4034/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4035 * controllers that are capable. If not, we use IO-APIC mode.
4036 */
4037
f70dba83 4038static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 4039{
4040#ifdef CONFIG_PCI_MSI
7c832835
BH		 4041 int err;
4042 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4043 {0, 2}, {0, 3}
4044 };
fb86a35b
MM		 4045
4046 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 4047 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4048 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 4049 goto default_int_mode;
4050
f70dba83
SC		 4051 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4052 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 4053 if (!err) {
f70dba83
SC		 4054 h->intr[0] = cciss_msix_entries[0].vector;
4055 h->intr[1] = cciss_msix_entries[1].vector;
4056 h->intr[2] = cciss_msix_entries[2].vector;
4057 h->intr[3] = cciss_msix_entries[3].vector;
4058 h->msix_vector = 1;
7c832835
BH		 4059 return;
4060 }
4061 if (err > 0) {
b2a4a43d
SC		 4062 dev_warn(&h->pdev->dev,
4063 "only %d MSI-X vectors available\n", err);
1ecb9c0f 4064 goto default_int_mode;
7c832835 4065 } else {
b2a4a43d
SC		 4066 dev_warn(&h->pdev->dev,
4067 "MSI-X init failed %d\n", err);
1ecb9c0f 4068 goto default_int_mode;
7c832835
BH		 4069 }
4070 }
f70dba83
SC		 4071 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4072 if (!pci_enable_msi(h->pdev))
4073 h->msi_vector = 1;
4074 else
b2a4a43d 4075 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 4076 }
1ecb9c0f 4077default_int_mode:
7c832835 4078#endif /* CONFIG_PCI_MSI */
fb86a35b 4079 /* if we get here we're going to use the default interrupt mode */
f70dba83 4080 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 4081 return;
4082}
4083
6539fa9b 4084static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 4085{
6539fa9b
SC		 4086 int i;
4087 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 4088
4089 subsystem_vendor_id = pdev->subsystem_vendor;
4090 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 4091 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4092 subsystem_vendor_id;
2ec24ff1 4093
4205df34 4094 for (i = 0; i < ARRAY_SIZE(products); i++)
6539fa9b
SC		 4095 if (*board_id == products[i].board_id)
4096 return i;
6539fa9b
SC		 4097 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4098 *board_id);
4099 return -ENODEV;
4100}
1da177e4 4101
dd9c426e
SC		 4102static inline bool cciss_board_disabled(ctlr_info_t *h)
4103{
4104 u16 command;
1da177e4 4105
dd9c426e
SC		 4106 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4107 return ((command & PCI_COMMAND_MEMORY) == 0);
4108}
1da177e4 4109
d474830d
SC		 4110static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4111 unsigned long *memory_bar)
4112{
4113 int i;
4e570309 4114
d474830d
SC		 4115 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4116 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4117 /* addressing mode bits already removed */
4118 *memory_bar = pci_resource_start(pdev, i);
4119 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4120 *memory_bar);
4121 return 0;
4122 }
4123 dev_warn(&pdev->dev, "no memory BAR found\n");
4124 return -ENODEV;
4125}
1da177e4 4126
afa842fa
SC		 4127static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
4128 void __iomem *vaddr, int wait_for_ready)
4129#define BOARD_READY 1
4130#define BOARD_NOT_READY 0
e99ba136 4131{
afa842fa 4132 int i, iterations;
e99ba136 4133 u32 scratchpad;
1da177e4 4134
afa842fa
SC		 4135 if (wait_for_ready)
4136 iterations = CCISS_BOARD_READY_ITERATIONS;
4137 else
4138 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4139
4140 for (i = 0; i < iterations; i++) {
4141 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4142 if (wait_for_ready) {
4143 if (scratchpad == CCISS_FIRMWARE_READY)
4144 return 0;
4145 } else {
4146 if (scratchpad != CCISS_FIRMWARE_READY)
4147 return 0;
4148 }
e99ba136 4149 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4150 }
afa842fa 4151 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4152 return -ENODEV;
4153}
e1438581 4154
8e93bf6d
SC		 4155static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4156 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4157 u64 *cfg_offset)
4158{
4159 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4160 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4161 *cfg_base_addr &= (u32) 0x0000ffff;
4162 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4163 if (*cfg_base_addr_index == -1) {
4164 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4165 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4166 return -ENODEV;
4167 }
4168 return 0;
4169}
1da177e4 4170
4809d098
SC		 4171static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4172{
4173 u64 cfg_offset;
4174 u32 cfg_base_addr;
4175 u64 cfg_base_addr_index;
4176 u32 trans_offset;
8e93bf6d 4177 int rc;
1da177e4 4178
8e93bf6d
SC		 4179 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4180 &cfg_base_addr_index, &cfg_offset);
4181 if (rc)
4182 return rc;
4809d098 4183 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4184 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4185 if (!h->cfgtable)
4186 return -ENOMEM;
62710ae1
SC		 4187 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4188 if (rc)
4189 return rc;
4809d098 4190 /* Find performant mode table. */
8e93bf6d 4191 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4192 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4193 cfg_base_addr_index)+cfg_offset+trans_offset,
4194 sizeof(*h->transtable));
4195 if (!h->transtable)
4196 return -ENOMEM;
4197 return 0;
4198}
1da177e4 4199
adfbc1ff
SC		 4200static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4201{
4202 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4203
4204 /* Limit commands in memory limited kdump scenario. */
4205 if (reset_devices && h->max_commands > 32)
4206 h->max_commands = 32;
4207
adfbc1ff
SC		 4208 if (h->max_commands < 16) {
4209 dev_warn(&h->pdev->dev, "Controller reports "
4210 "max supported commands of %d, an obvious lie. "
4211 "Using 16. Ensure that firmware is up to date.\n",
4212 h->max_commands);
4213 h->max_commands = 16;
1da177e4 4214 }
adfbc1ff 4215}
1da177e4 4216
afadbf4b
SC		 4217/* Interrogate the hardware for some limits:
4218 * max commands, max SG elements without chaining, and with chaining,
4219 * SG chain block size, etc.
4220 */
4221static void __devinit cciss_find_board_params(ctlr_info_t *h)
4222{
adfbc1ff 4223 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4224 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4225 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4226 /*
afadbf4b 4227 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4228 * Howvever spec says if 0, use 31
4229 */
afadbf4b
SC		 4230 h->max_cmd_sgentries = 31;
4231 if (h->maxsgentries > 512) {
4232 h->max_cmd_sgentries = 32;
4233 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4234 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4235 } else {
afadbf4b
SC		 4236 h->maxsgentries = 31; /* default to traditional values */
4237 h->chainsize = 0;
5c07a311 4238 }
afadbf4b 4239}
5c07a311 4240
501b92cd
SC		 4241static inline bool CISS_signature_present(ctlr_info_t *h)
4242{
4243 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4244 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4245 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4246 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4247 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4248 return false;
1da177e4 4249 }
501b92cd
SC		 4250 return true;
4251}
4252
322e304c
SC		 4253/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4254static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4255{
1da177e4 4256#ifdef CONFIG_X86
322e304c
SC		 4257 u32 prefetch;
4258
4259 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4260 prefetch |= 0x100;
4261 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4262#endif
322e304c 4263}
1da177e4 4264
bfd63ee5
SC		 4265/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4266 * in a prefetch beyond physical memory.
4267 */
4268static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4269{
4270 u32 dma_prefetch;
4271 __u32 dma_refetch;
4272
4273 if (h->board_id != 0x3225103C)
4274 return;
4275 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4276 dma_prefetch |= 0x8000;
4277 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4278 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4279 dma_refetch |= 0x1;
4280 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4281}
4282
f70dba83 4283static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4284{
4809d098 4285 int prod_index, err;
6539fa9b 4286
f70dba83 4287 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4288 if (prod_index < 0)
2ec24ff1 4289 return -ENODEV;
f70dba83
SC		 4290 h->product_name = products[prod_index].product_name;
4291 h->access = *(products[prod_index].access);
1da177e4 4292
f70dba83 4293 if (cciss_board_disabled(h)) {
b2a4a43d 4294 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4295 return -ENODEV;
1da177e4 4296 }
f70dba83 4297 err = pci_enable_device(h->pdev);
7c832835 4298 if (err) {
b2a4a43d 4299 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4300 return err;
f92e2f5f
MM		 4301 }
4302
f70dba83 4303 err = pci_request_regions(h->pdev, "cciss");
4e570309 4304 if (err) {
b2a4a43d
SC		 4305 dev_warn(&h->pdev->dev,
4306 "Cannot obtain PCI resources, aborting\n");
872225ca 4307 return err;
4e570309 4308 }
1da177e4 4309
b2a4a43d
SC		 4310 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4311 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4312
fb86a35b
MM		 4313/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4314 * else we use the IO-APIC interrupt assigned to us by system ROM.
4315 */
f70dba83
SC		 4316 cciss_interrupt_mode(h);
4317 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4318 if (err)
e1438581 4319 goto err_out_free_res;
f70dba83
SC		 4320 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4321 if (!h->vaddr) {
da550321
SC		 4322 err = -ENOMEM;
4323 goto err_out_free_res;
7c832835 4324 }
afa842fa 4325 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4326 if (err)
4e570309 4327 goto err_out_free_res;
f70dba83 4328 err = cciss_find_cfgtables(h);
4809d098 4329 if (err)
4e570309 4330 goto err_out_free_res;
b2a4a43d 4331 print_cfg_table(h);
f70dba83 4332 cciss_find_board_params(h);
1da177e4 4333
f70dba83 4334 if (!CISS_signature_present(h)) {
c33ac89b 4335 err = -ENODEV;
4e570309 4336 goto err_out_free_res;
1da177e4 4337 }
f70dba83
SC		 4338 cciss_enable_scsi_prefetch(h);
4339 cciss_p600_dma_prefetch_quirk(h);
4340 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4341 return 0;
4342
5faad620 4343err_out_free_res:
872225ca
MM		 4344 /*
4345 * Deliberately omit pci_disable_device(): it does something nasty to
4346 * Smart Array controllers that pci_enable_device does not undo
4347 */
f70dba83
SC		 4348 if (h->transtable)
4349 iounmap(h->transtable);
4350 if (h->cfgtable)
4351 iounmap(h->cfgtable);
4352 if (h->vaddr)
4353 iounmap(h->vaddr);
4354 pci_release_regions(h->pdev);
c33ac89b 4355 return err;
1da177e4
LT		 4356}
4357
6ae5ce8e
MM		 4358/* Function to find the first free pointer into our hba[] array
4359 * Returns -1 if no free entries are left.
7c832835 4360 */
b2a4a43d 4361static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4362{
799202cb 4363 int i;
1da177e4 4364
7c832835 4365 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4366 if (!hba[i]) {
f70dba83 4367 ctlr_info_t *h;
f2912a12 4368
f70dba83
SC		 4369 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4370 if (!h)
1da177e4 4371 goto Enomem;
f70dba83 4372 hba[i] = h;
1da177e4
LT		 4373 return i;
4374 }
4375 }
b2a4a43d 4376 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4377 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4378 return -1;
4379Enomem:
b2a4a43d 4380 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4381 return -1;
4382}
4383
f70dba83 4384static void free_hba(ctlr_info_t *h)
1da177e4 4385{
2c935593 4386 int i;
1da177e4 4387
f70dba83 4388 hba[h->ctlr] = NULL;
2c935593
SC		 4389 for (i = 0; i < h->highest_lun + 1; i++)
4390 if (h->gendisk[i] != NULL)
4391 put_disk(h->gendisk[i]);
4392 kfree(h);
1da177e4
LT		 4393}
4394
82eb03cf
CC		 4395/* Send a message CDB to the firmware. */
4396static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4397{
4398 typedef struct {
4399 CommandListHeader_struct CommandHeader;
4400 RequestBlock_struct Request;
4401 ErrDescriptor_struct ErrorDescriptor;
4402 } Command;
4403 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4404 Command *cmd;
4405 dma_addr_t paddr64;
4406 uint32_t paddr32, tag;
4407 void __iomem *vaddr;
4408 int i, err;
4409
4410 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4411 if (vaddr == NULL)
4412 return -ENOMEM;
4413
4414 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4415 CCISS commands, so they must be allocated from the lower 4GiB of
4416 memory. */
e930438c 4417 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4418 if (err) {
4419 iounmap(vaddr);
4420 return -ENOMEM;
4421 }
4422
4423 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4424 if (cmd == NULL) {
4425 iounmap(vaddr);
4426 return -ENOMEM;
4427 }
4428
4429 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4430 although there's no guarantee, we assume that the address is at
4431 least 4-byte aligned (most likely, it's page-aligned). */
4432 paddr32 = paddr64;
4433
4434 cmd->CommandHeader.ReplyQueue = 0;
4435 cmd->CommandHeader.SGList = 0;
4436 cmd->CommandHeader.SGTotal = 0;
4437 cmd->CommandHeader.Tag.lower = paddr32;
4438 cmd->CommandHeader.Tag.upper = 0;
4439 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4440
4441 cmd->Request.CDBLen = 16;
4442 cmd->Request.Type.Type = TYPE_MSG;
4443 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4444 cmd->Request.Type.Direction = XFER_NONE;
4445 cmd->Request.Timeout = 0; /* Don't time out */
4446 cmd->Request.CDB[0] = opcode;
4447 cmd->Request.CDB[1] = type;
4448 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4449
4450 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4451 cmd->ErrorDescriptor.Addr.upper = 0;
4452 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4453
4454 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4455
4456 for (i = 0; i < 10; i++) {
4457 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4458 if ((tag & ~3) == paddr32)
4459 break;
3e28601f 4460 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
82eb03cf
CC		 4461 }
4462
4463 iounmap(vaddr);
4464
4465 /* we leak the DMA buffer here ... no choice since the controller could
4466 still complete the command. */
4467 if (i == 10) {
b2a4a43d
SC		 4468 dev_err(&pdev->dev,
4469 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4470 opcode, type);
4471 return -ETIMEDOUT;
4472 }
4473
4474 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4475
4476 if (tag & 2) {
b2a4a43d 4477 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4478 opcode, type);
4479 return -EIO;
4480 }
4481
b2a4a43d 4482 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4483 opcode, type);
4484 return 0;
4485}
4486
82eb03cf
CC		 4487#define cciss_noop(p) cciss_message(p, 3, 0)
4488
a6528d01 4489static int cciss_controller_hard_reset(struct pci_dev *pdev,
bf2e2e6b 4490 void * __iomem vaddr, u32 use_doorbell)
82eb03cf 4491{
a6528d01
SC		 4492 u16 pmcsr;
4493 int pos;
82eb03cf 4494
a6528d01
SC		 4495 if (use_doorbell) {
4496 /* For everything after the P600, the PCI power state method
4497 * of resetting the controller doesn't work, so we have this
4498 * other way using the doorbell register.
4499 */
4500 dev_info(&pdev->dev, "using doorbell to reset controller\n");
bf2e2e6b 4501 writel(use_doorbell, vaddr + SA5_DOORBELL);
a6528d01
SC		 4502 } else { /* Try to do it the PCI power state way */
4503
4504 /* Quoting from the Open CISS Specification: "The Power
4505 * Management Control/Status Register (CSR) controls the power
4506 * state of the device. The normal operating state is D0,
4507 * CSR=00h. The software off state is D3, CSR=03h. To reset
4508 * the controller, place the interface device in D3 then to D0,
4509 * this causes a secondary PCI reset which will reset the
4510 * controller." */
4511
4512 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4513 if (pos == 0) {
4514 dev_err(&pdev->dev,
4515 "cciss_controller_hard_reset: "
4516 "PCI PM not supported\n");
4517 return -ENODEV;
4518 }
4519 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4520 /* enter the D3hot power management state */
4521 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4522 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4523 pmcsr |= PCI_D3hot;
4524 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4525
a6528d01 4526 msleep(500);
82eb03cf 4527
a6528d01
SC		 4528 /* enter the D0 power management state */
4529 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4530 pmcsr |= PCI_D0;
4531 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
a6528d01
SC		 4532 }
4533 return 0;
4534}
82eb03cf 4535
62710ae1
SC		 4536static __devinit void init_driver_version(char *driver_version, int len)
4537{
4538 memset(driver_version, 0, len);
4539 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4540}
4541
4542static __devinit int write_driver_ver_to_cfgtable(
4543 CfgTable_struct __iomem *cfgtable)
4544{
4545 char *driver_version;
4546 int i, size = sizeof(cfgtable->driver_version);
4547
4548 driver_version = kmalloc(size, GFP_KERNEL);
4549 if (!driver_version)
4550 return -ENOMEM;
4551
4552 init_driver_version(driver_version, size);
4553 for (i = 0; i < size; i++)
4554 writeb(driver_version[i], &cfgtable->driver_version[i]);
4555 kfree(driver_version);
4556 return 0;
4557}
4558
4559static __devinit void read_driver_ver_from_cfgtable(
4560 CfgTable_struct __iomem *cfgtable, unsigned char *driver_ver)
4561{
4562 int i;
4563
4564 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4565 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4566}
4567
4568static __devinit int controller_reset_failed(
4569 CfgTable_struct __iomem *cfgtable)
4570{
4571
4572 char *driver_ver, *old_driver_ver;
4573 int rc, size = sizeof(cfgtable->driver_version);
4574
4575 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4576 if (!old_driver_ver)
4577 return -ENOMEM;
4578 driver_ver = old_driver_ver + size;
4579
4580 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4581 * should have been changed, otherwise we know the reset failed.
4582 */
4583 init_driver_version(old_driver_ver, size);
4584 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4585 rc = !memcmp(driver_ver, old_driver_ver, size);
4586 kfree(old_driver_ver);
4587 return rc;
4588}
4589
a6528d01
SC		 4590/* This does a hard reset of the controller using PCI power management
4591 * states or using the doorbell register. */
4592static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4593{
a6528d01
SC		 4594 u64 cfg_offset;
4595 u32 cfg_base_addr;
4596 u64 cfg_base_addr_index;
4597 void __iomem *vaddr;
4598 unsigned long paddr;
62710ae1 4599 u32 misc_fw_support;
f442e64b 4600 int rc;
a6528d01 4601 CfgTable_struct __iomem *cfgtable;
bf2e2e6b 4602 u32 use_doorbell;
058a0f9f 4603 u32 board_id;
f442e64b 4604 u16 command_register;
a6528d01
SC		 4605
4606 /* For controllers as old a the p600, this is very nearly
4607 * the same thing as
4608 *
4609 * pci_save_state(pci_dev);
4610 * pci_set_power_state(pci_dev, PCI_D3hot);
4611 * pci_set_power_state(pci_dev, PCI_D0);
4612 * pci_restore_state(pci_dev);
4613 *
a6528d01
SC		 4614 * For controllers newer than the P600, the pci power state
4615 * method of resetting doesn't work so we have another way
4616 * using the doorbell register.
4617 */
82eb03cf 4618
058a0f9f
SC		 4619 /* Exclude 640x boards. These are two pci devices in one slot
4620 * which share a battery backed cache module. One controls the
4621 * cache, the other accesses the cache through the one that controls
4622 * it. If we reset the one controlling the cache, the other will
4623 * likely not be happy. Just forbid resetting this conjoined mess.
4624 */
4625 cciss_lookup_board_id(pdev, &board_id);
ec52d5f1 4626 if (!ctlr_is_resettable(board_id)) {
058a0f9f
SC		 4627 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4628 "due to shared cache module.");
82eb03cf
CC		 4629 return -ENODEV;
4630 }
4631
ec52d5f1
SC		 4632 /* if controller is soft- but not hard resettable... */
4633 if (!ctlr_is_hard_resettable(board_id))
4634 return -ENOTSUPP; /* try soft reset later. */
4635
f442e64b
SC		 4636 /* Save the PCI command register */
4637 pci_read_config_word(pdev, 4, &command_register);
4638 /* Turn the board off. This is so that later pci_restore_state()
4639 * won't turn the board on before the rest of config space is ready.
4640 */
4641 pci_disable_device(pdev);
4642 pci_save_state(pdev);
82eb03cf 4643
a6528d01
SC		 4644 /* find the first memory BAR, so we can find the cfg table */
4645 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4646 if (rc)
4647 return rc;
4648 vaddr = remap_pci_mem(paddr, 0x250);
4649 if (!vaddr)
4650 return -ENOMEM;
82eb03cf 4651
a6528d01
SC		 4652 /* find cfgtable in order to check if reset via doorbell is supported */
4653 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4654 &cfg_base_addr_index, &cfg_offset);
4655 if (rc)
4656 goto unmap_vaddr;
4657 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4658 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4659 if (!cfgtable) {
4660 rc = -ENOMEM;
4661 goto unmap_vaddr;
4662 }
62710ae1
SC		 4663 rc = write_driver_ver_to_cfgtable(cfgtable);
4664 if (rc)
4665 goto unmap_vaddr;
82eb03cf 4666
bf2e2e6b
SC		 4667 /* If reset via doorbell register is supported, use that.
4668 * There are two such methods. Favor the newest method.
75230ff2 4669 */
bf2e2e6b
SC		 4670 misc_fw_support = readl(&cfgtable->misc_fw_support);
4671 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4672 if (use_doorbell) {
4673 use_doorbell = DOORBELL_CTLR_RESET2;
4674 } else {
4675 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4676 if (use_doorbell)
4677 use_doorbell = DOORBELL_CTLR_RESET;
4678 }
75230ff2 4679
a6528d01
SC		 4680 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4681 if (rc)
4682 goto unmap_cfgtable;
f442e64b
SC		 4683 pci_restore_state(pdev);
4684 rc = pci_enable_device(pdev);
4685 if (rc) {
4686 dev_warn(&pdev->dev, "failed to enable device.\n");
4687 goto unmap_cfgtable;
82eb03cf 4688 }
f442e64b 4689 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4690
a6528d01
SC		 4691 /* Some devices (notably the HP Smart Array 5i Controller)
4692 need a little pause here */
4693 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4694
afa842fa 4695 /* Wait for board to become not ready, then ready. */
59ec86bb 4696 dev_info(&pdev->dev, "Waiting for board to reset.\n");
afa842fa 4697 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
5afe2781
SC		 4698 if (rc) {
4699 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4700 " Will try soft reset.\n");
4701 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4702 goto unmap_cfgtable;
4703 }
afa842fa
SC		 4704 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4705 if (rc) {
4706 dev_warn(&pdev->dev,
5afe2781
SC		 4707 "failed waiting for board to become ready "
4708 "after hard reset\n");
afa842fa
SC		 4709 goto unmap_cfgtable;
4710 }
afa842fa 4711
62710ae1
SC		 4712 rc = controller_reset_failed(vaddr);
4713 if (rc < 0)
4714 goto unmap_cfgtable;
4715 if (rc) {
5afe2781
SC		 4716 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4717 "controller. Will try soft reset.\n");
4718 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
62710ae1 4719 } else {
5afe2781 4720 dev_info(&pdev->dev, "Board ready after hard reset.\n");
a6528d01
SC		 4721 }
4722
4723unmap_cfgtable:
4724 iounmap(cfgtable);
4725
4726unmap_vaddr:
4727 iounmap(vaddr);
4728 return rc;
82eb03cf
CC		 4729}
4730
83123cb1
SC		 4731static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4732{
a6528d01 4733 int rc, i;
83123cb1
SC		 4734
4735 if (!reset_devices)
4736 return 0;
4737
a6528d01
SC		 4738 /* Reset the controller with a PCI power-cycle or via doorbell */
4739 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4740
a6528d01
SC		 4741 /* -ENOTSUPP here means we cannot reset the controller
4742 * but it's already (and still) up and running in
058a0f9f
SC		 4743 * "performant mode". Or, it might be 640x, which can't reset
4744 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4745 */
4746 if (rc == -ENOTSUPP)
5afe2781 4747 return rc; /* just try to do the kdump anyhow. */
a6528d01
SC		 4748 if (rc)
4749 return -ENODEV;
83123cb1
SC		 4750
4751 /* Now try to get the controller to respond to a no-op */
59ec86bb 4752 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
83123cb1
SC		 4753 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4754 if (cciss_noop(pdev) == 0)
4755 break;
4756 else
4757 dev_warn(&pdev->dev, "no-op failed%s\n",
4758 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4759 "; re-trying" : ""));
4760 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4761 }
82eb03cf
CC		 4762 return 0;
4763}
4764
54dae343
SC		 4765static __devinit int cciss_allocate_cmd_pool(ctlr_info_t *h)
4766{
4767 h->cmd_pool_bits = kmalloc(
4768 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4769 sizeof(unsigned long), GFP_KERNEL);
4770 h->cmd_pool = pci_alloc_consistent(h->pdev,
4771 h->nr_cmds * sizeof(CommandList_struct),
4772 &(h->cmd_pool_dhandle));
4773 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4774 h->nr_cmds * sizeof(ErrorInfo_struct),
4775 &(h->errinfo_pool_dhandle));
4776 if ((h->cmd_pool_bits == NULL)
4777 || (h->cmd_pool == NULL)
4778 || (h->errinfo_pool == NULL)) {
4779 dev_err(&h->pdev->dev, "out of memory");
4780 return -ENOMEM;
4781 }
4782 return 0;
4783}
4784
abf7966e
SC		 4785static __devinit int cciss_allocate_scatterlists(ctlr_info_t *h)
4786{
4787 int i;
4788
4789 /* zero it, so that on free we need not know how many were alloc'ed */
4790 h->scatter_list = kzalloc(h->max_commands *
4791 sizeof(struct scatterlist *), GFP_KERNEL);
4792 if (!h->scatter_list)
4793 return -ENOMEM;
4794
4795 for (i = 0; i < h->nr_cmds; i++) {
4796 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4797 h->maxsgentries, GFP_KERNEL);
4798 if (h->scatter_list[i] == NULL) {
4799 dev_err(&h->pdev->dev, "could not allocate "
4800 "s/g lists\n");
4801 return -ENOMEM;
4802 }
4803 }
4804 return 0;
4805}
4806
4807static void cciss_free_scatterlists(ctlr_info_t *h)
4808{
4809 int i;
4810
4811 if (h->scatter_list) {
4812 for (i = 0; i < h->nr_cmds; i++)
4813 kfree(h->scatter_list[i]);
4814 kfree(h->scatter_list);
4815 }
4816}
4817
54dae343
SC		 4818static void cciss_free_cmd_pool(ctlr_info_t *h)
4819{
4820 kfree(h->cmd_pool_bits);
4821 if (h->cmd_pool)
4822 pci_free_consistent(h->pdev,
4823 h->nr_cmds * sizeof(CommandList_struct),
4824 h->cmd_pool, h->cmd_pool_dhandle);
4825 if (h->errinfo_pool)
4826 pci_free_consistent(h->pdev,
4827 h->nr_cmds * sizeof(ErrorInfo_struct),
4828 h->errinfo_pool, h->errinfo_pool_dhandle);
4829}
4830
2b48085f
SC		 4831static int cciss_request_irq(ctlr_info_t *h,
4832 irqreturn_t (*msixhandler)(int, void *),
4833 irqreturn_t (*intxhandler)(int, void *))
4834{
4835 if (h->msix_vector || h->msi_vector) {
4836 if (!request_irq(h->intr[PERF_MODE_INT], msixhandler,
4837 IRQF_DISABLED, h->devname, h))
4838 return 0;
4839 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4840 " for %s\n", h->intr[PERF_MODE_INT],
4841 h->devname);
4842 return -1;
4843 }
4844
4845 if (!request_irq(h->intr[PERF_MODE_INT], intxhandler,
4846 IRQF_DISABLED, h->devname, h))
4847 return 0;
4848 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4849 h->intr[PERF_MODE_INT], h->devname);
4850 return -1;
4851}
4852
5afe2781
SC		 4853static int __devinit cciss_kdump_soft_reset(ctlr_info_t *h)
4854{
4855 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4856 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4857 return -EIO;
4858 }
4859
4860 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4861 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4862 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4863 return -1;
4864 }
4865
4866 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4867 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4868 dev_warn(&h->pdev->dev, "Board failed to become ready "
4869 "after soft reset.\n");
4870 return -1;
4871 }
4872
4873 return 0;
4874}
4875
4876static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4877{
4878 int ctlr = h->ctlr;
4879
4880 free_irq(h->intr[PERF_MODE_INT], h);
4881#ifdef CONFIG_PCI_MSI
4882 if (h->msix_vector)
4883 pci_disable_msix(h->pdev);
4884 else if (h->msi_vector)
4885 pci_disable_msi(h->pdev);
4886#endif /* CONFIG_PCI_MSI */
4887 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4888 cciss_free_scatterlists(h);
4889 cciss_free_cmd_pool(h);
4890 kfree(h->blockFetchTable);
4891 if (h->reply_pool)
4892 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4893 h->reply_pool, h->reply_pool_dhandle);
4894 if (h->transtable)
4895 iounmap(h->transtable);
4896 if (h->cfgtable)
4897 iounmap(h->cfgtable);
4898 if (h->vaddr)
4899 iounmap(h->vaddr);
4900 unregister_blkdev(h->major, h->devname);
4901 cciss_destroy_hba_sysfs_entry(h);
4902 pci_release_regions(h->pdev);
4903 kfree(h);
4904 hba[ctlr] = NULL;
4905}
4906
1da177e4
LT		 4907/*
4908 * This is it. Find all the controllers and register them. I really hate
4909 * stealing all these major device numbers.
4910 * returns the number of block devices registered.
4911 */
4912static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4913 const struct pci_device_id *ent)
1da177e4 4914{
1da177e4 4915 int i;
799202cb 4916 int j = 0;
1da177e4 4917 int rc;
5afe2781 4918 int try_soft_reset = 0;
22bece00 4919 int dac, return_code;
212a5026 4920 InquiryData_struct *inq_buff;
f70dba83 4921 ctlr_info_t *h;
5afe2781 4922 unsigned long flags;
1da177e4 4923
83123cb1 4924 rc = cciss_init_reset_devices(pdev);
5afe2781
SC		 4925 if (rc) {
4926 if (rc != -ENOTSUPP)
4927 return rc;
4928 /* If the reset fails in a particular way (it has no way to do
4929 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4930 * a soft reset once we get the controller configured up to the
4931 * point that it can accept a command.
4932 */
4933 try_soft_reset = 1;
4934 rc = 0;
4935 }
4936
4937reinit_after_soft_reset:
4938
b2a4a43d 4939 i = alloc_cciss_hba(pdev);
7c832835 4940 if (i < 0)
e2019b58 4941 return -1;
1f8ef380 4942
f70dba83
SC		 4943 h = hba[i];
4944 h->pdev = pdev;
4945 h->busy_initializing = 1;
e6e1ee93
JA		 4946 INIT_LIST_HEAD(&h->cmpQ);
4947 INIT_LIST_HEAD(&h->reqQ);
f70dba83 4948 mutex_init(&h->busy_shutting_down);
1f8ef380 4949
f70dba83 4950 if (cciss_pci_init(h) != 0)
2cfa948c 4951 goto clean_no_release_regions;
1da177e4 4952
f70dba83
SC		 4953 sprintf(h->devname, "cciss%d", i);
4954 h->ctlr = i;
1da177e4 4955
f70dba83 4956 init_completion(&h->scan_wait);
b368c9dd 4957
f70dba83 4958 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4959 goto clean0;
4960
1da177e4 4961 /* configure PCI DMA stuff */
6a35528a 4962 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4963 dac = 1;
284901a9 4964 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4965 dac = 0;
1da177e4 4966 else {
b2a4a43d 4967 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4968 goto clean1;
4969 }
4970
4971 /*
4972 * register with the major number, or get a dynamic major number
4973 * by passing 0 as argument. This is done for greater than
4974 * 8 controller support.
4975 */
4976 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4977 h->major = COMPAQ_CISS_MAJOR + i;
4978 rc = register_blkdev(h->major, h->devname);
7c832835 4979 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4980 dev_err(&h->pdev->dev,
4981 "Unable to get major number %d for %s "
f70dba83 4982 "on hba %d\n", h->major, h->devname, i);
1da177e4 4983 goto clean1;
7c832835 4984 } else {
1da177e4 4985 if (i >= MAX_CTLR_ORIG)
f70dba83 4986 h->major = rc;
1da177e4
LT		 4987 }
4988
4989 /* make sure the board interrupts are off */
f70dba83 4990 h->access.set_intr_mask(h, CCISS_INTR_OFF);
2b48085f
SC		 4991 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
4992 if (rc)
4993 goto clean2;
40aabb58 4994
b2a4a43d 4995 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4996 h->devname, pdev->device, pci_name(pdev),
4997 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4998
54dae343 4999 if (cciss_allocate_cmd_pool(h))
1da177e4 5000 goto clean4;
5c07a311 5001
abf7966e 5002 if (cciss_allocate_scatterlists(h))
4ee69851
DC		 5003 goto clean4;
5004
f70dba83
SC		 5005 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5006 h->chainsize, h->nr_cmds);
5007 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 5008 goto clean4;
5c07a311 5009
f70dba83 5010 spin_lock_init(&h->lock);
1da177e4 5011
7c832835 5012 /* Initialize the pdev driver private data.
f70dba83
SC		 5013 have it point to h. */
5014 pci_set_drvdata(pdev, h);
7c832835
BH		 5015 /* command and error info recs zeroed out before
5016 they are used */
f70dba83
SC		 5017 memset(h->cmd_pool_bits, 0,
5018 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 5019 * sizeof(unsigned long));
1da177e4 5020
f70dba83
SC		 5021 h->num_luns = 0;
5022 h->highest_lun = -1;
6ae5ce8e 5023 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 5024 h->drv[j] = NULL;
5025 h->gendisk[j] = NULL;
6ae5ce8e 5026 }
1da177e4 5027
5afe2781
SC		 5028 /* At this point, the controller is ready to take commands.
5029 * Now, if reset_devices and the hard reset didn't work, try
5030 * the soft reset and see if that works.
5031 */
5032 if (try_soft_reset) {
5033
5034 /* This is kind of gross. We may or may not get a completion
5035 * from the soft reset command, and if we do, then the value
5036 * from the fifo may or may not be valid. So, we wait 10 secs
5037 * after the reset throwing away any completions we get during
5038 * that time. Unregister the interrupt handler and register
5039 * fake ones to scoop up any residual completions.
5040 */
5041 spin_lock_irqsave(&h->lock, flags);
5042 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5043 spin_unlock_irqrestore(&h->lock, flags);
5044 free_irq(h->intr[PERF_MODE_INT], h);
5045 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5046 cciss_intx_discard_completions);
5047 if (rc) {
5048 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5049 "soft reset.\n");
5050 goto clean4;
5051 }
5052
5053 rc = cciss_kdump_soft_reset(h);
5054 if (rc) {
5055 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5056 goto clean4;
5057 }
5058
5059 dev_info(&h->pdev->dev, "Board READY.\n");
5060 dev_info(&h->pdev->dev,
5061 "Waiting for stale completions to drain.\n");
5062 h->access.set_intr_mask(h, CCISS_INTR_ON);
5063 msleep(10000);
5064 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5065
5066 rc = controller_reset_failed(h->cfgtable);
5067 if (rc)
5068 dev_info(&h->pdev->dev,
5069 "Soft reset appears to have failed.\n");
5070
5071 /* since the controller's reset, we have to go back and re-init
5072 * everything. Easiest to just forget what we've done and do it
5073 * all over again.
5074 */
5075 cciss_undo_allocations_after_kdump_soft_reset(h);
5076 try_soft_reset = 0;
5077 if (rc)
5078 /* don't go to clean4, we already unallocated */
5079 return -ENODEV;
5080
5081 goto reinit_after_soft_reset;
5082 }
5083
f70dba83 5084 cciss_scsi_setup(h);
1da177e4
LT		 5085
5086 /* Turn the interrupts on so we can service requests */
f70dba83 5087 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 5088
22bece00
MM		 5089 /* Get the firmware version */
5090 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5091 if (inq_buff == NULL) {
b2a4a43d 5092 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 5093 goto clean4;
5094 }
5095
f70dba83 5096 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 5097 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 5098 if (return_code == IO_OK) {
f70dba83
SC		 5099 h->firm_ver[0] = inq_buff->data_byte[32];
5100 h->firm_ver[1] = inq_buff->data_byte[33];
5101 h->firm_ver[2] = inq_buff->data_byte[34];
5102 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 5103 } else { /* send command failed */
b2a4a43d 5104 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 5105 " version of controller\n");
5106 }
212a5026 5107 kfree(inq_buff);
22bece00 5108
f70dba83 5109 cciss_procinit(h);
92c4231a 5110
f70dba83 5111 h->cciss_max_sectors = 8192;
92c4231a 5112
f70dba83
SC		 5113 rebuild_lun_table(h, 1, 0);
5114 h->busy_initializing = 0;
e2019b58 5115 return 1;
1da177e4 5116
6ae5ce8e 5117clean4:
54dae343 5118 cciss_free_cmd_pool(h);
abf7966e 5119 cciss_free_scatterlists(h);
f70dba83 5120 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
f70dba83 5121 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 5122clean2:
f70dba83 5123 unregister_blkdev(h->major, h->devname);
6ae5ce8e 5124clean1:
f70dba83 5125 cciss_destroy_hba_sysfs_entry(h);
7fe06326 5126clean0:
2cfa948c
SC		 5127 pci_release_regions(pdev);
5128clean_no_release_regions:
f70dba83 5129 h->busy_initializing = 0;
9cef0d2f 5130
872225ca
MM		 5131 /*
5132 * Deliberately omit pci_disable_device(): it does something nasty to
5133 * Smart Array controllers that pci_enable_device does not undo
5134 */
799202cb 5135 pci_set_drvdata(pdev, NULL);
f70dba83 5136 free_hba(h);
e2019b58 5137 return -1;
1da177e4
LT		 5138}
5139
e9ca75b5 5140static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 5141{
29009a03
SC		 5142 ctlr_info_t *h;
5143 char *flush_buf;
7c832835 5144 int return_code;
1da177e4 5145
29009a03
SC		 5146 h = pci_get_drvdata(pdev);
5147 flush_buf = kzalloc(4, GFP_KERNEL);
5148 if (!flush_buf) {
b2a4a43d 5149 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 5150 return;
e9ca75b5 5151 }
29009a03
SC		 5152 /* write all data in the battery backed cache to disk */
5153 memset(flush_buf, 0, 4);
f70dba83 5154 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 5155 4, 0, CTLR_LUNID, TYPE_CMD);
5156 kfree(flush_buf);
5157 if (return_code != IO_OK)
b2a4a43d 5158 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 5159 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 5160 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 5161}
5162
5163static void __devexit cciss_remove_one(struct pci_dev *pdev)
5164{
f70dba83 5165 ctlr_info_t *h;
e9ca75b5
GB		 5166 int i, j;
5167
7c832835 5168 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 5169 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 5170 return;
5171 }
0a9279cc 5172
f70dba83
SC		 5173 h = pci_get_drvdata(pdev);
5174 i = h->ctlr;
7c832835 5175 if (hba[i] == NULL) {
b2a4a43d 5176 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 5177 return;
5178 }
b6550777 5179
f70dba83 5180 mutex_lock(&h->busy_shutting_down);
0a9279cc 5181
f70dba83
SC		 5182 remove_from_scan_list(h);
5183 remove_proc_entry(h->devname, proc_cciss);
5184 unregister_blkdev(h->major, h->devname);
b6550777
BH		 5185
5186 /* remove it from the disk list */
5187 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 5188 struct gendisk *disk = h->gendisk[j];
b6550777 5189 if (disk) {
165125e1 5190 struct request_queue *q = disk->queue;
b6550777 5191
097d0264 5192 if (disk->flags & GENHD_FL_UP) {
f70dba83 5193 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 5194 del_gendisk(disk);
097d0264 5195 }
b6550777
BH		 5196 if (q)
5197 blk_cleanup_queue(q);
5198 }
5199 }
5200
ba198efb 5201#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 5202 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 5203#endif
b6550777 5204
e9ca75b5 5205 cciss_shutdown(pdev);
fb86a35b
MM		 5206
5207#ifdef CONFIG_PCI_MSI
f70dba83
SC		 5208 if (h->msix_vector)
5209 pci_disable_msix(h->pdev);
5210 else if (h->msi_vector)
5211 pci_disable_msi(h->pdev);
7c832835 5212#endif /* CONFIG_PCI_MSI */
fb86a35b 5213
f70dba83
SC		 5214 iounmap(h->transtable);
5215 iounmap(h->cfgtable);
5216 iounmap(h->vaddr);
1da177e4 5217
54dae343 5218 cciss_free_cmd_pool(h);
5c07a311 5219 /* Free up sg elements */
f70dba83
SC		 5220 for (j = 0; j < h->nr_cmds; j++)
5221 kfree(h->scatter_list[j]);
5222 kfree(h->scatter_list);
5223 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
e363e014
SC		 5224 kfree(h->blockFetchTable);
5225 if (h->reply_pool)
5226 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5227 h->reply_pool, h->reply_pool_dhandle);
872225ca
MM		 5228 /*
5229 * Deliberately omit pci_disable_device(): it does something nasty to
5230 * Smart Array controllers that pci_enable_device does not undo
5231 */
7c832835 5232 pci_release_regions(pdev);
4e570309 5233 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 5234 cciss_destroy_hba_sysfs_entry(h);
5235 mutex_unlock(&h->busy_shutting_down);
5236 free_hba(h);
7c832835 5237}
1da177e4
LT		 5238
5239static struct pci_driver cciss_pci_driver = {
7c832835
BH		 5240 .name = "cciss",
5241 .probe = cciss_init_one,
5242 .remove = __devexit_p(cciss_remove_one),
5243 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 5244 .shutdown = cciss_shutdown,
1da177e4
LT		 5245};
5246
5247/*
5248 * This is it. Register the PCI driver information for the cards we control
7c832835 5249 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 5250 */
5251static int __init cciss_init(void)
5252{
7fe06326
AP		 5253 int err;
5254
10cbda97
JA		 5255 /*
5256 * The hardware requires that commands are aligned on a 64-bit
5257 * boundary. Given that we use pci_alloc_consistent() to allocate an
5258 * array of them, the size must be a multiple of 8 bytes.
5259 */
1b7d0d28 5260 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 5261 printk(KERN_INFO DRIVER_NAME "\n");
5262
7fe06326
AP		 5263 err = bus_register(&cciss_bus_type);
5264 if (err)
5265 return err;
5266
b368c9dd
AP		 5267 /* Start the scan thread */
5268 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5269 if (IS_ERR(cciss_scan_thread)) {
5270 err = PTR_ERR(cciss_scan_thread);
5271 goto err_bus_unregister;
5272 }
5273
1da177e4 5274 /* Register for our PCI devices */
7fe06326
AP		 5275 err = pci_register_driver(&cciss_pci_driver);
5276 if (err)
b368c9dd 5277 goto err_thread_stop;
7fe06326 5278
617e1344 5279 return err;
7fe06326 5280
b368c9dd
AP		 5281err_thread_stop:
5282 kthread_stop(cciss_scan_thread);
5283err_bus_unregister:
7fe06326 5284 bus_unregister(&cciss_bus_type);
b368c9dd 5285
7fe06326 5286 return err;
1da177e4
LT		 5287}
5288
5289static void __exit cciss_cleanup(void)
5290{
5291 int i;
5292
5293 pci_unregister_driver(&cciss_pci_driver);
5294 /* double check that all controller entrys have been removed */
7c832835
BH		 5295 for (i = 0; i < MAX_CTLR; i++) {
5296 if (hba[i] != NULL) {
b2a4a43d
SC		 5297 dev_warn(&hba[i]->pdev->dev,
5298 "had to remove controller\n");
1da177e4
LT		 5299 cciss_remove_one(hba[i]->pdev);
5300 }
5301 }
b368c9dd 5302 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 5303 if (proc_cciss)
5304 remove_proc_entry("driver/cciss", NULL);
7fe06326 5305 bus_unregister(&cciss_bus_type);
1da177e4
LT		 5306}
5307
5308module_init(cciss_init);
5309module_exit(cciss_cleanup);
Linux kernel - Deliverables
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