cciss: remove some superfluous tests from cciss_bigpassthru()
[deliverable/linux.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
405f5571 29#include <linux/smp_lock.h>
1da177e4
LT
30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT
40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1da177e4
LT
44#include <asm/uaccess.h>
45#include <asm/io.h>
46
eb0df996 47#include <linux/dma-mapping.h>
1da177e4
LT
48#include <linux/blkdev.h>
49#include <linux/genhd.h>
50#include <linux/completion.h>
d5d3b736 51#include <scsi/scsi.h>
03bbfee5
MMOD
52#include <scsi/sg.h>
53#include <scsi/scsi_ioctl.h>
54#include <linux/cdrom.h>
231bc2a2 55#include <linux/scatterlist.h>
0a9279cc 56#include <linux/kthread.h>
1da177e4
LT
57
58#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM
59#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT
61
62/* Embedded module documentation macros - see modules.h */
63MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 64MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM
65MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66MODULE_VERSION("3.6.26");
1da177e4
LT
67MODULE_LICENSE("GPL");
68
2ec24ff1
SC
69static int cciss_allow_hpsa;
70module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
71MODULE_PARM_DESC(cciss_allow_hpsa,
72 "Prevent cciss driver from accessing hardware known to be "
73 " supported by the hpsa driver");
74
1da177e4
LT
75#include "cciss_cmd.h"
76#include "cciss.h"
77#include <linux/cciss_ioctl.h>
78
79/* define the PCI info for the cards we can control */
80static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
24aac480
MM
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
77ca7286
MM
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
841fdffd
MM
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
1da177e4
LT
113 {0,}
114};
7c832835 115
1da177e4
LT
116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
1da177e4
LT
118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
7c832835 120 * access = Address of the struct of function pointers
1da177e4
LT
121 */
122static struct board_type products[] = {
49153998
MM
123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
49153998
MM
133 {0x3235103C, "Smart Array P400i", &SA5_access},
134 {0x3211103C, "Smart Array E200i", &SA5_access},
135 {0x3212103C, "Smart Array E200", &SA5_access},
136 {0x3213103C, "Smart Array E200i", &SA5_access},
137 {0x3214103C, "Smart Array E200i", &SA5_access},
138 {0x3215103C, "Smart Array E200i", &SA5_access},
139 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC
140/* controllers below this line are also supported by the hpsa driver. */
141#define HPSA_BOUNDARY 0x3223103C
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM
144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 {0x3241103C, "Smart Array P212", &SA5_access},
146 {0x3243103C, "Smart Array P410", &SA5_access},
147 {0x3245103C, "Smart Array P410i", &SA5_access},
148 {0x3247103C, "Smart Array P411", &SA5_access},
149 {0x3249103C, "Smart Array P812", &SA5_access},
77ca7286
MM
150 {0x324A103C, "Smart Array P712m", &SA5_access},
151 {0x324B103C, "Smart Array P711m", &SA5_access},
841fdffd
MM
152 {0x3250103C, "Smart Array", &SA5_access},
153 {0x3251103C, "Smart Array", &SA5_access},
154 {0x3252103C, "Smart Array", &SA5_access},
155 {0x3253103C, "Smart Array", &SA5_access},
156 {0x3254103C, "Smart Array", &SA5_access},
1da177e4
LT
157};
158
d14c4ab5 159/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 160#define MAX_CONFIG_WAIT 30000
1da177e4
LT
161#define MAX_IOCTL_CONFIG_WAIT 1000
162
163/*define how many times we will try a command because of bus resets */
164#define MAX_CMD_RETRIES 3
165
1da177e4
LT
166#define MAX_CTLR 32
167
168/* Originally cciss driver only supports 8 major numbers */
169#define MAX_CTLR_ORIG 8
170
1da177e4
LT
171static ctlr_info_t *hba[MAX_CTLR];
172
b368c9dd
AP
173static struct task_struct *cciss_scan_thread;
174static DEFINE_MUTEX(scan_mutex);
175static LIST_HEAD(scan_q);
176
165125e1 177static void do_cciss_request(struct request_queue *q);
0c2b3908
MM
178static irqreturn_t do_cciss_intx(int irq, void *dev_id);
179static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 180static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 181static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 182static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB
183static int do_ioctl(struct block_device *bdev, fmode_t mode,
184 unsigned int cmd, unsigned long arg);
ef7822c2 185static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 186 unsigned int cmd, unsigned long arg);
a885c8c4 187static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 188
1da177e4 189static int cciss_revalidate(struct gendisk *disk);
2d11d993 190static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 191static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 192 int clear_all, int via_ioctl);
1da177e4 193
f70dba83 194static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 195 sector_t *total_size, unsigned int *block_size);
f70dba83 196static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 197 sector_t *total_size, unsigned int *block_size);
f70dba83 198static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 199 sector_t total_size,
00988a35 200 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 201 drive_info_struct *drv);
dac5488a 202static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 203static void start_io(ctlr_info_t *h);
f70dba83 204static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 205 __u8 page_code, unsigned char scsi3addr[],
206 int cmd_type);
85cc61ae 207static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
208 int attempt_retry);
209static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 210
d6f4965d 211static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM
212static int scan_thread(void *data);
213static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC
214static void cciss_hba_release(struct device *dev);
215static void cciss_device_release(struct device *dev);
361e9b07 216static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 217static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 218static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC
219static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
220 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
221 u64 *cfg_offset);
222static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
223 unsigned long *memory_bar);
224
33079b21 225
5e216153
MM
226/* performant mode helper functions */
227static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
228 int *bucket_map);
229static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 230
1da177e4 231#ifdef CONFIG_PROC_FS
f70dba83 232static void cciss_procinit(ctlr_info_t *h);
1da177e4 233#else
f70dba83 234static void cciss_procinit(ctlr_info_t *h)
7c832835
BH
235{
236}
237#endif /* CONFIG_PROC_FS */
1da177e4
LT
238
239#ifdef CONFIG_COMPAT
ef7822c2
AV
240static int cciss_compat_ioctl(struct block_device *, fmode_t,
241 unsigned, unsigned long);
1da177e4
LT
242#endif
243
83d5cde4 244static const struct block_device_operations cciss_fops = {
7c832835 245 .owner = THIS_MODULE,
6e9624b8 246 .open = cciss_unlocked_open,
ef7822c2 247 .release = cciss_release,
8a6cfeb6 248 .ioctl = do_ioctl,
7c832835 249 .getgeo = cciss_getgeo,
1da177e4 250#ifdef CONFIG_COMPAT
ef7822c2 251 .compat_ioctl = cciss_compat_ioctl,
1da177e4 252#endif
7c832835 253 .revalidate_disk = cciss_revalidate,
1da177e4
LT
254};
255
5e216153
MM
256/* set_performant_mode: Modify the tag for cciss performant
257 * set bit 0 for pull model, bits 3-1 for block fetch
258 * register number
259 */
260static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
261{
262 if (likely(h->transMethod == CFGTBL_Trans_Performant))
263 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
264}
265
1da177e4
LT
266/*
267 * Enqueuing and dequeuing functions for cmdlists.
268 */
8a3173de 269static inline void addQ(struct hlist_head *list, CommandList_struct *c)
1da177e4 270{
8a3173de 271 hlist_add_head(&c->list, list);
1da177e4
LT
272}
273
8a3173de 274static inline void removeQ(CommandList_struct *c)
1da177e4 275{
b59e64d0
HR
276 /*
277 * After kexec/dump some commands might still
278 * be in flight, which the firmware will try
279 * to complete. Resetting the firmware doesn't work
280 * with old fw revisions, so we have to mark
281 * them off as 'stale' to prevent the driver from
282 * falling over.
283 */
284 if (WARN_ON(hlist_unhashed(&c->list))) {
285 c->cmd_type = CMD_MSG_STALE;
8a3173de 286 return;
b59e64d0 287 }
8a3173de
JA
288
289 hlist_del_init(&c->list);
1da177e4
LT
290}
291
664a717d
MM
292static void enqueue_cmd_and_start_io(ctlr_info_t *h,
293 CommandList_struct *c)
294{
295 unsigned long flags;
5e216153 296 set_performant_mode(h, c);
664a717d
MM
297 spin_lock_irqsave(&h->lock, flags);
298 addQ(&h->reqQ, c);
299 h->Qdepth++;
300 start_io(h);
301 spin_unlock_irqrestore(&h->lock, flags);
302}
303
dccc9b56 304static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC
305 int nr_cmds)
306{
307 int i;
308
309 if (!cmd_sg_list)
310 return;
311 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC
312 kfree(cmd_sg_list[i]);
313 cmd_sg_list[i] = NULL;
49fc5601
SC
314 }
315 kfree(cmd_sg_list);
316}
317
dccc9b56
SC
318static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
319 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC
320{
321 int j;
dccc9b56 322 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC
323
324 if (chainsize <= 0)
325 return NULL;
326
327 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
328 if (!cmd_sg_list)
329 return NULL;
330
331 /* Build up chain blocks for each command */
332 for (j = 0; j < nr_cmds; j++) {
49fc5601 333 /* Need a block of chainsized s/g elements. */
dccc9b56
SC
334 cmd_sg_list[j] = kmalloc((chainsize *
335 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
336 if (!cmd_sg_list[j]) {
49fc5601
SC
337 dev_err(&h->pdev->dev, "Cannot get memory "
338 "for s/g chains.\n");
339 goto clean;
340 }
341 }
342 return cmd_sg_list;
343clean:
344 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
345 return NULL;
346}
347
d45033ef
SC
348static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
349{
350 SGDescriptor_struct *chain_sg;
351 u64bit temp64;
352
353 if (c->Header.SGTotal <= h->max_cmd_sgentries)
354 return;
355
356 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
357 temp64.val32.lower = chain_sg->Addr.lower;
358 temp64.val32.upper = chain_sg->Addr.upper;
359 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
360}
361
362static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
363 SGDescriptor_struct *chain_block, int len)
364{
365 SGDescriptor_struct *chain_sg;
366 u64bit temp64;
367
368 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
369 chain_sg->Ext = CCISS_SG_CHAIN;
370 chain_sg->Len = len;
371 temp64.val = pci_map_single(h->pdev, chain_block, len,
372 PCI_DMA_TODEVICE);
373 chain_sg->Addr.lower = temp64.val32.lower;
374 chain_sg->Addr.upper = temp64.val32.upper;
375}
376
1da177e4
LT
377#include "cciss_scsi.c" /* For SCSI tape support */
378
1e6f2dc1
AB
379static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
380 "UNKNOWN"
381};
0e4a9d03 382#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 383
1da177e4
LT
384#ifdef CONFIG_PROC_FS
385
386/*
387 * Report information about this controller.
388 */
389#define ENG_GIG 1000000000
390#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 391#define ENGAGE_SCSI "engage scsi"
1da177e4
LT
392
393static struct proc_dir_entry *proc_cciss;
394
89b6e743 395static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 396{
89b6e743
MM
397 ctlr_info_t *h = seq->private;
398
399 seq_printf(seq, "%s: HP %s Controller\n"
400 "Board ID: 0x%08lx\n"
401 "Firmware Version: %c%c%c%c\n"
402 "IRQ: %d\n"
403 "Logical drives: %d\n"
404 "Current Q depth: %d\n"
405 "Current # commands on controller: %d\n"
406 "Max Q depth since init: %d\n"
407 "Max # commands on controller since init: %d\n"
408 "Max SG entries since init: %d\n",
409 h->devname,
410 h->product_name,
411 (unsigned long)h->board_id,
412 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 413 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM
414 h->num_luns,
415 h->Qdepth, h->commands_outstanding,
416 h->maxQsinceinit, h->max_outstanding, h->maxSG);
417
418#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 419 cciss_seq_tape_report(seq, h);
89b6e743
MM
420#endif /* CONFIG_CISS_SCSI_TAPE */
421}
1da177e4 422
89b6e743
MM
423static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
424{
425 ctlr_info_t *h = seq->private;
89b6e743 426 unsigned long flags;
1da177e4
LT
427
428 /* prevent displaying bogus info during configuration
429 * or deconfiguration of a logical volume
430 */
f70dba83 431 spin_lock_irqsave(&h->lock, flags);
1da177e4 432 if (h->busy_configuring) {
f70dba83 433 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 434 return ERR_PTR(-EBUSY);
1da177e4
LT
435 }
436 h->busy_configuring = 1;
f70dba83 437 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 438
89b6e743
MM
439 if (*pos == 0)
440 cciss_seq_show_header(seq);
441
442 return pos;
443}
444
445static int cciss_seq_show(struct seq_file *seq, void *v)
446{
447 sector_t vol_sz, vol_sz_frac;
448 ctlr_info_t *h = seq->private;
449 unsigned ctlr = h->ctlr;
450 loff_t *pos = v;
9cef0d2f 451 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM
452
453 if (*pos > h->highest_lun)
454 return 0;
455
531c2dc7
SC
456 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
457 return 0;
458
89b6e743
MM
459 if (drv->heads == 0)
460 return 0;
461
462 vol_sz = drv->nr_blocks;
463 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
464 vol_sz_frac *= 100;
465 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
466
fa52bec9 467 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM
468 drv->raid_level = RAID_UNKNOWN;
469 seq_printf(seq, "cciss/c%dd%d:"
470 "\t%4u.%02uGB\tRAID %s\n",
471 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
472 raid_label[drv->raid_level]);
473 return 0;
474}
475
476static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
477{
478 ctlr_info_t *h = seq->private;
479
480 if (*pos > h->highest_lun)
481 return NULL;
482 *pos += 1;
483
484 return pos;
485}
486
487static void cciss_seq_stop(struct seq_file *seq, void *v)
488{
489 ctlr_info_t *h = seq->private;
490
491 /* Only reset h->busy_configuring if we succeeded in setting
492 * it during cciss_seq_start. */
493 if (v == ERR_PTR(-EBUSY))
494 return;
7c832835 495
1da177e4 496 h->busy_configuring = 0;
1da177e4
LT
497}
498
88e9d34c 499static const struct seq_operations cciss_seq_ops = {
89b6e743
MM
500 .start = cciss_seq_start,
501 .show = cciss_seq_show,
502 .next = cciss_seq_next,
503 .stop = cciss_seq_stop,
504};
505
506static int cciss_seq_open(struct inode *inode, struct file *file)
507{
508 int ret = seq_open(file, &cciss_seq_ops);
509 struct seq_file *seq = file->private_data;
510
511 if (!ret)
512 seq->private = PDE(inode)->data;
513
514 return ret;
515}
516
517static ssize_t
518cciss_proc_write(struct file *file, const char __user *buf,
519 size_t length, loff_t *ppos)
1da177e4 520{
89b6e743
MM
521 int err;
522 char *buffer;
523
524#ifndef CONFIG_CISS_SCSI_TAPE
525 return -EINVAL;
1da177e4
LT
526#endif
527
89b6e743 528 if (!buf || length > PAGE_SIZE - 1)
7c832835 529 return -EINVAL;
89b6e743
MM
530
531 buffer = (char *)__get_free_page(GFP_KERNEL);
532 if (!buffer)
533 return -ENOMEM;
534
535 err = -EFAULT;
536 if (copy_from_user(buffer, buf, length))
537 goto out;
538 buffer[length] = '\0';
539
540#ifdef CONFIG_CISS_SCSI_TAPE
541 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
542 struct seq_file *seq = file->private_data;
543 ctlr_info_t *h = seq->private;
89b6e743 544
f70dba83 545 err = cciss_engage_scsi(h);
8721c81f 546 if (err == 0)
89b6e743
MM
547 err = length;
548 } else
549#endif /* CONFIG_CISS_SCSI_TAPE */
550 err = -EINVAL;
7c832835
BH
551 /* might be nice to have "disengage" too, but it's not
552 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM
553
554out:
555 free_page((unsigned long)buffer);
556 return err;
1da177e4
LT
557}
558
828c0950 559static const struct file_operations cciss_proc_fops = {
89b6e743
MM
560 .owner = THIS_MODULE,
561 .open = cciss_seq_open,
562 .read = seq_read,
563 .llseek = seq_lseek,
564 .release = seq_release,
565 .write = cciss_proc_write,
566};
567
f70dba83 568static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT
569{
570 struct proc_dir_entry *pde;
571
89b6e743 572 if (proc_cciss == NULL)
928b4d8c 573 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM
574 if (!proc_cciss)
575 return;
f70dba83 576 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 577 S_IROTH, proc_cciss,
f70dba83 578 &cciss_proc_fops, h);
1da177e4 579}
7c832835 580#endif /* CONFIG_PROC_FS */
1da177e4 581
7fe06326
AP
582#define MAX_PRODUCT_NAME_LEN 19
583
584#define to_hba(n) container_of(n, struct ctlr_info, dev)
585#define to_drv(n) container_of(n, drive_info_struct, dev)
586
d6f4965d
AP
587static ssize_t host_store_rescan(struct device *dev,
588 struct device_attribute *attr,
589 const char *buf, size_t count)
590{
591 struct ctlr_info *h = to_hba(dev);
592
593 add_to_scan_list(h);
594 wake_up_process(cciss_scan_thread);
595 wait_for_completion_interruptible(&h->scan_wait);
596
597 return count;
598}
8ba95c69 599static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP
600
601static ssize_t dev_show_unique_id(struct device *dev,
602 struct device_attribute *attr,
603 char *buf)
604{
605 drive_info_struct *drv = to_drv(dev);
606 struct ctlr_info *h = to_hba(drv->dev.parent);
607 __u8 sn[16];
608 unsigned long flags;
609 int ret = 0;
610
f70dba83 611 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP
612 if (h->busy_configuring)
613 ret = -EBUSY;
614 else
615 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 616 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP
617
618 if (ret)
619 return ret;
620 else
621 return snprintf(buf, 16 * 2 + 2,
622 "%02X%02X%02X%02X%02X%02X%02X%02X"
623 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
624 sn[0], sn[1], sn[2], sn[3],
625 sn[4], sn[5], sn[6], sn[7],
626 sn[8], sn[9], sn[10], sn[11],
627 sn[12], sn[13], sn[14], sn[15]);
628}
8ba95c69 629static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP
630
631static ssize_t dev_show_vendor(struct device *dev,
632 struct device_attribute *attr,
633 char *buf)
634{
635 drive_info_struct *drv = to_drv(dev);
636 struct ctlr_info *h = to_hba(drv->dev.parent);
637 char vendor[VENDOR_LEN + 1];
638 unsigned long flags;
639 int ret = 0;
640
f70dba83 641 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP
642 if (h->busy_configuring)
643 ret = -EBUSY;
644 else
645 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 646 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP
647
648 if (ret)
649 return ret;
650 else
651 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
652}
8ba95c69 653static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP
654
655static ssize_t dev_show_model(struct device *dev,
656 struct device_attribute *attr,
657 char *buf)
658{
659 drive_info_struct *drv = to_drv(dev);
660 struct ctlr_info *h = to_hba(drv->dev.parent);
661 char model[MODEL_LEN + 1];
662 unsigned long flags;
663 int ret = 0;
664
f70dba83 665 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP
666 if (h->busy_configuring)
667 ret = -EBUSY;
668 else
669 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 670 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP
671
672 if (ret)
673 return ret;
674 else
675 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
676}
8ba95c69 677static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP
678
679static ssize_t dev_show_rev(struct device *dev,
680 struct device_attribute *attr,
681 char *buf)
682{
683 drive_info_struct *drv = to_drv(dev);
684 struct ctlr_info *h = to_hba(drv->dev.parent);
685 char rev[REV_LEN + 1];
686 unsigned long flags;
687 int ret = 0;
688
f70dba83 689 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP
690 if (h->busy_configuring)
691 ret = -EBUSY;
692 else
693 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 694 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP
695
696 if (ret)
697 return ret;
698 else
699 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
700}
8ba95c69 701static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 702
ce84a8ae
SC
703static ssize_t cciss_show_lunid(struct device *dev,
704 struct device_attribute *attr, char *buf)
705{
9cef0d2f
SC
706 drive_info_struct *drv = to_drv(dev);
707 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC
708 unsigned long flags;
709 unsigned char lunid[8];
710
f70dba83 711 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 712 if (h->busy_configuring) {
f70dba83 713 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC
714 return -EBUSY;
715 }
716 if (!drv->heads) {
f70dba83 717 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC
718 return -ENOTTY;
719 }
720 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 721 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC
722 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
723 lunid[0], lunid[1], lunid[2], lunid[3],
724 lunid[4], lunid[5], lunid[6], lunid[7]);
725}
8ba95c69 726static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 727
3ff1111d
SC
728static ssize_t cciss_show_raid_level(struct device *dev,
729 struct device_attribute *attr, char *buf)
730{
9cef0d2f
SC
731 drive_info_struct *drv = to_drv(dev);
732 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC
733 int raid;
734 unsigned long flags;
735
f70dba83 736 spin_lock_irqsave(&h->lock, flags);
3ff1111d 737 if (h->busy_configuring) {
f70dba83 738 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC
739 return -EBUSY;
740 }
741 raid = drv->raid_level;
f70dba83 742 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC
743 if (raid < 0 || raid > RAID_UNKNOWN)
744 raid = RAID_UNKNOWN;
745
746 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
747 raid_label[raid]);
748}
8ba95c69 749static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 750
e272afec
SC
751static ssize_t cciss_show_usage_count(struct device *dev,
752 struct device_attribute *attr, char *buf)
753{
9cef0d2f
SC
754 drive_info_struct *drv = to_drv(dev);
755 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC
756 unsigned long flags;
757 int count;
758
f70dba83 759 spin_lock_irqsave(&h->lock, flags);
e272afec 760 if (h->busy_configuring) {
f70dba83 761 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC
762 return -EBUSY;
763 }
764 count = drv->usage_count;
f70dba83 765 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC
766 return snprintf(buf, 20, "%d\n", count);
767}
8ba95c69 768static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 769
d6f4965d
AP
770static struct attribute *cciss_host_attrs[] = {
771 &dev_attr_rescan.attr,
772 NULL
773};
774
775static struct attribute_group cciss_host_attr_group = {
776 .attrs = cciss_host_attrs,
777};
778
9f792d9f 779static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP
780 &cciss_host_attr_group,
781 NULL
782};
783
784static struct device_type cciss_host_type = {
785 .name = "cciss_host",
786 .groups = cciss_host_attr_groups,
617e1344 787 .release = cciss_hba_release,
d6f4965d
AP
788};
789
7fe06326
AP
790static struct attribute *cciss_dev_attrs[] = {
791 &dev_attr_unique_id.attr,
792 &dev_attr_model.attr,
793 &dev_attr_vendor.attr,
794 &dev_attr_rev.attr,
ce84a8ae 795 &dev_attr_lunid.attr,
3ff1111d 796 &dev_attr_raid_level.attr,
e272afec 797 &dev_attr_usage_count.attr,
7fe06326
AP
798 NULL
799};
800
801static struct attribute_group cciss_dev_attr_group = {
802 .attrs = cciss_dev_attrs,
803};
804
a4dbd674 805static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP
806 &cciss_dev_attr_group,
807 NULL
808};
809
810static struct device_type cciss_dev_type = {
811 .name = "cciss_device",
812 .groups = cciss_dev_attr_groups,
617e1344 813 .release = cciss_device_release,
7fe06326
AP
814};
815
816static struct bus_type cciss_bus_type = {
817 .name = "cciss",
818};
819
617e1344
SC
820/*
821 * cciss_hba_release is called when the reference count
822 * of h->dev goes to zero.
823 */
824static void cciss_hba_release(struct device *dev)
825{
826 /*
827 * nothing to do, but need this to avoid a warning
828 * about not having a release handler from lib/kref.c.
829 */
830}
7fe06326
AP
831
832/*
833 * Initialize sysfs entry for each controller. This sets up and registers
834 * the 'cciss#' directory for each individual controller under
835 * /sys/bus/pci/devices/<dev>/.
836 */
837static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
838{
839 device_initialize(&h->dev);
840 h->dev.type = &cciss_host_type;
841 h->dev.bus = &cciss_bus_type;
842 dev_set_name(&h->dev, "%s", h->devname);
843 h->dev.parent = &h->pdev->dev;
844
845 return device_add(&h->dev);
846}
847
848/*
849 * Remove sysfs entries for an hba.
850 */
851static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
852{
853 device_del(&h->dev);
617e1344
SC
854 put_device(&h->dev); /* final put. */
855}
856
857/* cciss_device_release is called when the reference count
9cef0d2f 858 * of h->drv[x]dev goes to zero.
617e1344
SC
859 */
860static void cciss_device_release(struct device *dev)
861{
9cef0d2f
SC
862 drive_info_struct *drv = to_drv(dev);
863 kfree(drv);
7fe06326
AP
864}
865
866/*
867 * Initialize sysfs for each logical drive. This sets up and registers
868 * the 'c#d#' directory for each individual logical drive under
869 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
870 * /sys/block/cciss!c#d# to this entry.
871 */
617e1344 872static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP
873 int drv_index)
874{
617e1344
SC
875 struct device *dev;
876
9cef0d2f 877 if (h->drv[drv_index]->device_initialized)
8ce51966
SC
878 return 0;
879
9cef0d2f 880 dev = &h->drv[drv_index]->dev;
617e1344
SC
881 device_initialize(dev);
882 dev->type = &cciss_dev_type;
883 dev->bus = &cciss_bus_type;
884 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
885 dev->parent = &h->dev;
9cef0d2f 886 h->drv[drv_index]->device_initialized = 1;
617e1344 887 return device_add(dev);
7fe06326
AP
888}
889
890/*
891 * Remove sysfs entries for a logical drive.
892 */
8ce51966
SC
893static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
894 int ctlr_exiting)
7fe06326 895{
9cef0d2f 896 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC
897
898 /* special case for c*d0, we only destroy it on controller exit */
899 if (drv_index == 0 && !ctlr_exiting)
900 return;
901
617e1344
SC
902 device_del(dev);
903 put_device(dev); /* the "final" put. */
9cef0d2f 904 h->drv[drv_index] = NULL;
7fe06326
AP
905}
906
7c832835
BH
907/*
908 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 909 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 910 * which ones are free or in use.
7c832835 911 */
6b4d96b8 912static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT
913{
914 CommandList_struct *c;
7c832835 915 int i;
1da177e4
LT
916 u64bit temp64;
917 dma_addr_t cmd_dma_handle, err_dma_handle;
918
6b4d96b8
SC
919 do {
920 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
921 if (i == h->nr_cmds)
7c832835 922 return NULL;
6b4d96b8
SC
923 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
924 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC
925 c = h->cmd_pool + i;
926 memset(c, 0, sizeof(CommandList_struct));
927 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
928 c->err_info = h->errinfo_pool + i;
929 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
930 err_dma_handle = h->errinfo_pool_dhandle
931 + i * sizeof(ErrorInfo_struct);
932 h->nr_allocs++;
1da177e4 933
6b4d96b8 934 c->cmdindex = i;
33079b21 935
6b4d96b8
SC
936 INIT_HLIST_NODE(&c->list);
937 c->busaddr = (__u32) cmd_dma_handle;
938 temp64.val = (__u64) err_dma_handle;
939 c->ErrDesc.Addr.lower = temp64.val32.lower;
940 c->ErrDesc.Addr.upper = temp64.val32.upper;
941 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 942
6b4d96b8
SC
943 c->ctlr = h->ctlr;
944 return c;
945}
33079b21 946
6b4d96b8
SC
947/* allocate a command using pci_alloc_consistent, used for ioctls,
948 * etc., not for the main i/o path.
949 */
950static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
951{
952 CommandList_struct *c;
953 u64bit temp64;
954 dma_addr_t cmd_dma_handle, err_dma_handle;
955
956 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
957 sizeof(CommandList_struct), &cmd_dma_handle);
958 if (c == NULL)
959 return NULL;
960 memset(c, 0, sizeof(CommandList_struct));
961
962 c->cmdindex = -1;
963
964 c->err_info = (ErrorInfo_struct *)
965 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
966 &err_dma_handle);
967
968 if (c->err_info == NULL) {
969 pci_free_consistent(h->pdev,
970 sizeof(CommandList_struct), c, cmd_dma_handle);
971 return NULL;
7c832835 972 }
6b4d96b8 973 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 974
8a3173de 975 INIT_HLIST_NODE(&c->list);
1da177e4 976 c->busaddr = (__u32) cmd_dma_handle;
7c832835 977 temp64.val = (__u64) err_dma_handle;
1da177e4
LT
978 c->ErrDesc.Addr.lower = temp64.val32.lower;
979 c->ErrDesc.Addr.upper = temp64.val32.upper;
980 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 981
7c832835
BH
982 c->ctlr = h->ctlr;
983 return c;
1da177e4
LT
984}
985
6b4d96b8 986static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT
987{
988 int i;
6b4d96b8
SC
989
990 i = c - h->cmd_pool;
991 clear_bit(i & (BITS_PER_LONG - 1),
992 h->cmd_pool_bits + (i / BITS_PER_LONG));
993 h->nr_frees++;
994}
995
996static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
997{
1da177e4
LT
998 u64bit temp64;
999
6b4d96b8
SC
1000 temp64.val32.lower = c->ErrDesc.Addr.lower;
1001 temp64.val32.upper = c->ErrDesc.Addr.upper;
1002 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1003 c->err_info, (dma_addr_t) temp64.val);
1004 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
1005 c, (dma_addr_t) c->busaddr);
1da177e4
LT
1006}
1007
1008static inline ctlr_info_t *get_host(struct gendisk *disk)
1009{
7c832835 1010 return disk->queue->queuedata;
1da177e4
LT
1011}
1012
1013static inline drive_info_struct *get_drv(struct gendisk *disk)
1014{
1015 return disk->private_data;
1016}
1017
1018/*
1019 * Open. Make sure the device is really there.
1020 */
ef7822c2 1021static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1022{
f70dba83 1023 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1024 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1025
b2a4a43d 1026 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1027 if (drv->busy_configuring)
ddd47442 1028 return -EBUSY;
1da177e4
LT
1029 /*
1030 * Root is allowed to open raw volume zero even if it's not configured
1031 * so array config can still work. Root is also allowed to open any
1032 * volume that has a LUN ID, so it can issue IOCTL to reread the
1033 * disk information. I don't think I really like this
1034 * but I'm already using way to many device nodes to claim another one
1035 * for "raw controller".
1036 */
7a06f789 1037 if (drv->heads == 0) {
ef7822c2 1038 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1039 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1040 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1041 return -ENXIO;
1da177e4 1042 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC
1043 } else if (memcmp(drv->LunID, CTLR_LUNID,
1044 sizeof(drv->LunID))) {
1da177e4
LT
1045 return -ENXIO;
1046 }
1047 }
1048 if (!capable(CAP_SYS_ADMIN))
1049 return -EPERM;
1050 }
1051 drv->usage_count++;
f70dba83 1052 h->usage_count++;
1da177e4
LT
1053 return 0;
1054}
7c832835 1055
6e9624b8
AB
1056static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1057{
1058 int ret;
1059
1060 lock_kernel();
1061 ret = cciss_open(bdev, mode);
1062 unlock_kernel();
1063
1064 return ret;
1065}
1066
1da177e4
LT
1067/*
1068 * Close. Sync first.
1069 */
ef7822c2 1070static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1071{
f70dba83 1072 ctlr_info_t *h;
6e9624b8 1073 drive_info_struct *drv;
1da177e4 1074
6e9624b8 1075 lock_kernel();
f70dba83 1076 h = get_host(disk);
6e9624b8 1077 drv = get_drv(disk);
b2a4a43d 1078 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1079 drv->usage_count--;
f70dba83 1080 h->usage_count--;
6e9624b8 1081 unlock_kernel();
1da177e4
LT
1082 return 0;
1083}
1084
ef7822c2
AV
1085static int do_ioctl(struct block_device *bdev, fmode_t mode,
1086 unsigned cmd, unsigned long arg)
1da177e4
LT
1087{
1088 int ret;
1089 lock_kernel();
ef7822c2 1090 ret = cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT
1091 unlock_kernel();
1092 return ret;
1093}
1094
8a6cfeb6
AB
1095#ifdef CONFIG_COMPAT
1096
ef7822c2
AV
1097static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1098 unsigned cmd, unsigned long arg);
1099static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1100 unsigned cmd, unsigned long arg);
1da177e4 1101
ef7822c2
AV
1102static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1103 unsigned cmd, unsigned long arg)
1da177e4
LT
1104{
1105 switch (cmd) {
1106 case CCISS_GETPCIINFO:
1107 case CCISS_GETINTINFO:
1108 case CCISS_SETINTINFO:
1109 case CCISS_GETNODENAME:
1110 case CCISS_SETNODENAME:
1111 case CCISS_GETHEARTBEAT:
1112 case CCISS_GETBUSTYPES:
1113 case CCISS_GETFIRMVER:
1114 case CCISS_GETDRIVVER:
1115 case CCISS_REVALIDVOLS:
1116 case CCISS_DEREGDISK:
1117 case CCISS_REGNEWDISK:
1118 case CCISS_REGNEWD:
1119 case CCISS_RESCANDISK:
1120 case CCISS_GETLUNINFO:
ef7822c2 1121 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT
1122
1123 case CCISS_PASSTHRU32:
ef7822c2 1124 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1125 case CCISS_BIG_PASSTHRU32:
ef7822c2 1126 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT
1127
1128 default:
1129 return -ENOIOCTLCMD;
1130 }
1131}
1132
ef7822c2
AV
1133static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1134 unsigned cmd, unsigned long arg)
1da177e4
LT
1135{
1136 IOCTL32_Command_struct __user *arg32 =
7c832835 1137 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT
1138 IOCTL_Command_struct arg64;
1139 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1140 int err;
1141 u32 cp;
1142
1143 err = 0;
7c832835
BH
1144 err |=
1145 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1146 sizeof(arg64.LUN_info));
1147 err |=
1148 copy_from_user(&arg64.Request, &arg32->Request,
1149 sizeof(arg64.Request));
1150 err |=
1151 copy_from_user(&arg64.error_info, &arg32->error_info,
1152 sizeof(arg64.error_info));
1da177e4
LT
1153 err |= get_user(arg64.buf_size, &arg32->buf_size);
1154 err |= get_user(cp, &arg32->buf);
1155 arg64.buf = compat_ptr(cp);
1156 err |= copy_to_user(p, &arg64, sizeof(arg64));
1157
1158 if (err)
1159 return -EFAULT;
1160
ef7822c2 1161 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT
1162 if (err)
1163 return err;
7c832835
BH
1164 err |=
1165 copy_in_user(&arg32->error_info, &p->error_info,
1166 sizeof(arg32->error_info));
1da177e4
LT
1167 if (err)
1168 return -EFAULT;
1169 return err;
1170}
1171
ef7822c2
AV
1172static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1173 unsigned cmd, unsigned long arg)
1da177e4
LT
1174{
1175 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1176 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1177 BIG_IOCTL_Command_struct arg64;
7c832835
BH
1178 BIG_IOCTL_Command_struct __user *p =
1179 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT
1180 int err;
1181 u32 cp;
1182
1183 err = 0;
7c832835
BH
1184 err |=
1185 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1186 sizeof(arg64.LUN_info));
1187 err |=
1188 copy_from_user(&arg64.Request, &arg32->Request,
1189 sizeof(arg64.Request));
1190 err |=
1191 copy_from_user(&arg64.error_info, &arg32->error_info,
1192 sizeof(arg64.error_info));
1da177e4
LT
1193 err |= get_user(arg64.buf_size, &arg32->buf_size);
1194 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1195 err |= get_user(cp, &arg32->buf);
1196 arg64.buf = compat_ptr(cp);
1197 err |= copy_to_user(p, &arg64, sizeof(arg64));
1198
1199 if (err)
7c832835 1200 return -EFAULT;
1da177e4 1201
ef7822c2 1202 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT
1203 if (err)
1204 return err;
7c832835
BH
1205 err |=
1206 copy_in_user(&arg32->error_info, &p->error_info,
1207 sizeof(arg32->error_info));
1da177e4
LT
1208 if (err)
1209 return -EFAULT;
1210 return err;
1211}
1212#endif
a885c8c4
CH
1213
1214static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1215{
1216 drive_info_struct *drv = get_drv(bdev->bd_disk);
1217
1218 if (!drv->cylinders)
1219 return -ENXIO;
1220
1221 geo->heads = drv->heads;
1222 geo->sectors = drv->sectors;
1223 geo->cylinders = drv->cylinders;
1224 return 0;
1225}
1226
f70dba83 1227static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM
1228{
1229 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1230 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1231 (void)check_for_unit_attention(h, c);
0a9279cc 1232}
0a25a5ae
SC
1233
1234static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1235{
1236 cciss_pci_info_struct pciinfo;
1237
1238 if (!argp)
1239 return -EINVAL;
1240 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1241 pciinfo.bus = h->pdev->bus->number;
1242 pciinfo.dev_fn = h->pdev->devfn;
1243 pciinfo.board_id = h->board_id;
1244 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1245 return -EFAULT;
1246 return 0;
1247}
1248
576e661c
SC
1249static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1250{
1251 cciss_coalint_struct intinfo;
1252
1253 if (!argp)
1254 return -EINVAL;
1255 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1256 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1257 if (copy_to_user
1258 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1259 return -EFAULT;
1260 return 0;
1261}
1262
4c800eed
SC
1263static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1264{
1265 cciss_coalint_struct intinfo;
1266 unsigned long flags;
1267 int i;
1268
1269 if (!argp)
1270 return -EINVAL;
1271 if (!capable(CAP_SYS_ADMIN))
1272 return -EPERM;
1273 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1274 return -EFAULT;
1275 if ((intinfo.delay == 0) && (intinfo.count == 0))
1276 return -EINVAL;
1277 spin_lock_irqsave(&h->lock, flags);
1278 /* Update the field, and then ring the doorbell */
1279 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1280 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1281 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1282
1283 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1284 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1285 break;
1286 udelay(1000); /* delay and try again */
1287 }
1288 spin_unlock_irqrestore(&h->lock, flags);
1289 if (i >= MAX_IOCTL_CONFIG_WAIT)
1290 return -EAGAIN;
1291 return 0;
1292}
1293
25216109
SC
1294static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1295{
1296 NodeName_type NodeName;
1297 int i;
1298
1299 if (!argp)
1300 return -EINVAL;
1301 for (i = 0; i < 16; i++)
1302 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1303 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1304 return -EFAULT;
1305 return 0;
1306}
1307
4f43f32c
SC
1308static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1309{
1310 NodeName_type NodeName;
1311 unsigned long flags;
1312 int i;
1313
1314 if (!argp)
1315 return -EINVAL;
1316 if (!capable(CAP_SYS_ADMIN))
1317 return -EPERM;
1318 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1319 return -EFAULT;
1320 spin_lock_irqsave(&h->lock, flags);
1321 /* Update the field, and then ring the doorbell */
1322 for (i = 0; i < 16; i++)
1323 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1324 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1325 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1326 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1327 break;
1328 udelay(1000); /* delay and try again */
1329 }
1330 spin_unlock_irqrestore(&h->lock, flags);
1331 if (i >= MAX_IOCTL_CONFIG_WAIT)
1332 return -EAGAIN;
1333 return 0;
1334}
1335
93c74931
SC
1336static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1337{
1338 Heartbeat_type heartbeat;
1339
1340 if (!argp)
1341 return -EINVAL;
1342 heartbeat = readl(&h->cfgtable->HeartBeat);
1343 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1344 return -EFAULT;
1345 return 0;
1346}
1347
d18dfad4
SC
1348static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1349{
1350 BusTypes_type BusTypes;
1351
1352 if (!argp)
1353 return -EINVAL;
1354 BusTypes = readl(&h->cfgtable->BusTypes);
1355 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1356 return -EFAULT;
1357 return 0;
1358}
1359
8a4f7fbf
SC
1360static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1361{
1362 FirmwareVer_type firmware;
1363
1364 if (!argp)
1365 return -EINVAL;
1366 memcpy(firmware, h->firm_ver, 4);
1367
1368 if (copy_to_user
1369 (argp, firmware, sizeof(FirmwareVer_type)))
1370 return -EFAULT;
1371 return 0;
1372}
1373
c525919d
SC
1374static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1375{
1376 DriverVer_type DriverVer = DRIVER_VERSION;
1377
1378 if (!argp)
1379 return -EINVAL;
1380 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1381 return -EFAULT;
1382 return 0;
1383}
1384
0894b32c
SC
1385static int cciss_getluninfo(ctlr_info_t *h,
1386 struct gendisk *disk, void __user *argp)
1387{
1388 LogvolInfo_struct luninfo;
1389 drive_info_struct *drv = get_drv(disk);
1390
1391 if (!argp)
1392 return -EINVAL;
1393 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1394 luninfo.num_opens = drv->usage_count;
1395 luninfo.num_parts = 0;
1396 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1397 return -EFAULT;
1398 return 0;
1399}
1400
f32f125b
SC
1401static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1402{
1403 IOCTL_Command_struct iocommand;
1404 CommandList_struct *c;
1405 char *buff = NULL;
1406 u64bit temp64;
1407 DECLARE_COMPLETION_ONSTACK(wait);
1408
1409 if (!argp)
1410 return -EINVAL;
1411
1412 if (!capable(CAP_SYS_RAWIO))
1413 return -EPERM;
1414
1415 if (copy_from_user
1416 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1417 return -EFAULT;
1418 if ((iocommand.buf_size < 1) &&
1419 (iocommand.Request.Type.Direction != XFER_NONE)) {
1420 return -EINVAL;
1421 }
1422 if (iocommand.buf_size > 0) {
1423 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1424 if (buff == NULL)
1425 return -EFAULT;
1426 }
1427 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1428 /* Copy the data into the buffer we created */
1429 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1430 kfree(buff);
1431 return -EFAULT;
1432 }
1433 } else {
1434 memset(buff, 0, iocommand.buf_size);
1435 }
1436 c = cmd_special_alloc(h);
1437 if (!c) {
1438 kfree(buff);
1439 return -ENOMEM;
1440 }
1441 /* Fill in the command type */
1442 c->cmd_type = CMD_IOCTL_PEND;
1443 /* Fill in Command Header */
1444 c->Header.ReplyQueue = 0; /* unused in simple mode */
1445 if (iocommand.buf_size > 0) { /* buffer to fill */
1446 c->Header.SGList = 1;
1447 c->Header.SGTotal = 1;
1448 } else { /* no buffers to fill */
1449 c->Header.SGList = 0;
1450 c->Header.SGTotal = 0;
1451 }
1452 c->Header.LUN = iocommand.LUN_info;
1453 /* use the kernel address the cmd block for tag */
1454 c->Header.Tag.lower = c->busaddr;
1455
1456 /* Fill in Request block */
1457 c->Request = iocommand.Request;
1458
1459 /* Fill in the scatter gather information */
1460 if (iocommand.buf_size > 0) {
1461 temp64.val = pci_map_single(h->pdev, buff,
1462 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1463 c->SG[0].Addr.lower = temp64.val32.lower;
1464 c->SG[0].Addr.upper = temp64.val32.upper;
1465 c->SG[0].Len = iocommand.buf_size;
1466 c->SG[0].Ext = 0; /* we are not chaining */
1467 }
1468 c->waiting = &wait;
1469
1470 enqueue_cmd_and_start_io(h, c);
1471 wait_for_completion(&wait);
1472
1473 /* unlock the buffers from DMA */
1474 temp64.val32.lower = c->SG[0].Addr.lower;
1475 temp64.val32.upper = c->SG[0].Addr.upper;
1476 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1477 PCI_DMA_BIDIRECTIONAL);
1478 check_ioctl_unit_attention(h, c);
1479
1480 /* Copy the error information out */
1481 iocommand.error_info = *(c->err_info);
1482 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1483 kfree(buff);
1484 cmd_special_free(h, c);
1485 return -EFAULT;
1486 }
1487
1488 if (iocommand.Request.Type.Direction == XFER_READ) {
1489 /* Copy the data out of the buffer we created */
1490 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1491 kfree(buff);
1492 cmd_special_free(h, c);
1493 return -EFAULT;
1494 }
1495 }
1496 kfree(buff);
1497 cmd_special_free(h, c);
1498 return 0;
1499}
1500
0c9f5ba7
SC
1501static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1502{
1503 BIG_IOCTL_Command_struct *ioc;
1504 CommandList_struct *c;
1505 unsigned char **buff = NULL;
1506 int *buff_size = NULL;
1507 u64bit temp64;
1508 BYTE sg_used = 0;
1509 int status = 0;
1510 int i;
1511 DECLARE_COMPLETION_ONSTACK(wait);
1512 __u32 left;
1513 __u32 sz;
1514 BYTE __user *data_ptr;
1515
1516 if (!argp)
1517 return -EINVAL;
1518 if (!capable(CAP_SYS_RAWIO))
1519 return -EPERM;
1520 ioc = (BIG_IOCTL_Command_struct *)
1521 kmalloc(sizeof(*ioc), GFP_KERNEL);
1522 if (!ioc) {
1523 status = -ENOMEM;
1524 goto cleanup1;
1525 }
1526 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1527 status = -EFAULT;
1528 goto cleanup1;
1529 }
1530 if ((ioc->buf_size < 1) &&
1531 (ioc->Request.Type.Direction != XFER_NONE)) {
1532 status = -EINVAL;
1533 goto cleanup1;
1534 }
1535 /* Check kmalloc limits using all SGs */
1536 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1537 status = -EINVAL;
1538 goto cleanup1;
1539 }
1540 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1541 status = -EINVAL;
1542 goto cleanup1;
1543 }
1544 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1545 if (!buff) {
1546 status = -ENOMEM;
1547 goto cleanup1;
1548 }
1549 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1550 if (!buff_size) {
1551 status = -ENOMEM;
1552 goto cleanup1;
1553 }
1554 left = ioc->buf_size;
1555 data_ptr = ioc->buf;
1556 while (left) {
1557 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1558 buff_size[sg_used] = sz;
1559 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1560 if (buff[sg_used] == NULL) {
1561 status = -ENOMEM;
1562 goto cleanup1;
1563 }
1564 if (ioc->Request.Type.Direction == XFER_WRITE) {
1565 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1566 status = -EFAULT;
1567 goto cleanup1;
1568 }
1569 } else {
1570 memset(buff[sg_used], 0, sz);
1571 }
1572 left -= sz;
1573 data_ptr += sz;
1574 sg_used++;
1575 }
1576 c = cmd_special_alloc(h);
1577 if (!c) {
1578 status = -ENOMEM;
1579 goto cleanup1;
1580 }
1581 c->cmd_type = CMD_IOCTL_PEND;
1582 c->Header.ReplyQueue = 0;
fcfb5c0c
SC
1583 c->Header.SGList = sg_used;
1584 c->Header.SGTotal = sg_used;
0c9f5ba7
SC
1585 c->Header.LUN = ioc->LUN_info;
1586 c->Header.Tag.lower = c->busaddr;
1587
1588 c->Request = ioc->Request;
fcfb5c0c
SC
1589 for (i = 0; i < sg_used; i++) {
1590 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1591 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC
1592 c->SG[i].Addr.lower = temp64.val32.lower;
1593 c->SG[i].Addr.upper = temp64.val32.upper;
1594 c->SG[i].Len = buff_size[i];
1595 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC
1596 }
1597 c->waiting = &wait;
1598 enqueue_cmd_and_start_io(h, c);
1599 wait_for_completion(&wait);
1600 /* unlock the buffers from DMA */
1601 for (i = 0; i < sg_used; i++) {
1602 temp64.val32.lower = c->SG[i].Addr.lower;
1603 temp64.val32.upper = c->SG[i].Addr.upper;
1604 pci_unmap_single(h->pdev,
1605 (dma_addr_t) temp64.val, buff_size[i],
1606 PCI_DMA_BIDIRECTIONAL);
1607 }
1608 check_ioctl_unit_attention(h, c);
1609 /* Copy the error information out */
1610 ioc->error_info = *(c->err_info);
1611 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1612 cmd_special_free(h, c);
1613 status = -EFAULT;
1614 goto cleanup1;
1615 }
1616 if (ioc->Request.Type.Direction == XFER_READ) {
1617 /* Copy the data out of the buffer we created */
1618 BYTE __user *ptr = ioc->buf;
1619 for (i = 0; i < sg_used; i++) {
1620 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1621 cmd_special_free(h, c);
1622 status = -EFAULT;
1623 goto cleanup1;
1624 }
1625 ptr += buff_size[i];
1626 }
1627 }
1628 cmd_special_free(h, c);
1629 status = 0;
1630cleanup1:
1631 if (buff) {
1632 for (i = 0; i < sg_used; i++)
1633 kfree(buff[i]);
1634 kfree(buff);
1635 }
1636 kfree(buff_size);
1637 kfree(ioc);
1638 return status;
1639}
1640
ef7822c2 1641static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1642 unsigned int cmd, unsigned long arg)
1da177e4 1643{
1da177e4 1644 struct gendisk *disk = bdev->bd_disk;
f70dba83 1645 ctlr_info_t *h = get_host(disk);
1da177e4
LT
1646 void __user *argp = (void __user *)arg;
1647
b2a4a43d
SC
1648 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1649 cmd, arg);
7c832835 1650 switch (cmd) {
1da177e4 1651 case CCISS_GETPCIINFO:
0a25a5ae 1652 return cciss_getpciinfo(h, argp);
1da177e4 1653 case CCISS_GETINTINFO:
576e661c 1654 return cciss_getintinfo(h, argp);
1da177e4 1655 case CCISS_SETINTINFO:
4c800eed 1656 return cciss_setintinfo(h, argp);
1da177e4 1657 case CCISS_GETNODENAME:
25216109 1658 return cciss_getnodename(h, argp);
1da177e4 1659 case CCISS_SETNODENAME:
4f43f32c 1660 return cciss_setnodename(h, argp);
1da177e4 1661 case CCISS_GETHEARTBEAT:
93c74931 1662 return cciss_getheartbeat(h, argp);
1da177e4 1663 case CCISS_GETBUSTYPES:
d18dfad4 1664 return cciss_getbustypes(h, argp);
1da177e4 1665 case CCISS_GETFIRMVER:
8a4f7fbf 1666 return cciss_getfirmver(h, argp);
7c832835 1667 case CCISS_GETDRIVVER:
c525919d 1668 return cciss_getdrivver(h, argp);
6ae5ce8e
MM
1669 case CCISS_DEREGDISK:
1670 case CCISS_REGNEWD:
1da177e4 1671 case CCISS_REVALIDVOLS:
f70dba83 1672 return rebuild_lun_table(h, 0, 1);
0894b32c
SC
1673 case CCISS_GETLUNINFO:
1674 return cciss_getluninfo(h, disk, argp);
1da177e4 1675 case CCISS_PASSTHRU:
f32f125b 1676 return cciss_passthru(h, argp);
0c9f5ba7
SC
1677 case CCISS_BIG_PASSTHRU:
1678 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD
1679
1680 /* scsi_cmd_ioctl handles these, below, though some are not */
1681 /* very meaningful for cciss. SG_IO is the main one people want. */
1682
1683 case SG_GET_VERSION_NUM:
1684 case SG_SET_TIMEOUT:
1685 case SG_GET_TIMEOUT:
1686 case SG_GET_RESERVED_SIZE:
1687 case SG_SET_RESERVED_SIZE:
1688 case SG_EMULATED_HOST:
1689 case SG_IO:
1690 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1691 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD
1692
1693 /* scsi_cmd_ioctl would normally handle these, below, but */
1694 /* they aren't a good fit for cciss, as CD-ROMs are */
1695 /* not supported, and we don't have any bus/target/lun */
1696 /* which we present to the kernel. */
1697
1698 case CDROM_SEND_PACKET:
1699 case CDROMCLOSETRAY:
1700 case CDROMEJECT:
1701 case SCSI_IOCTL_GET_IDLUN:
1702 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT
1703 default:
1704 return -ENOTTY;
1705 }
1da177e4
LT
1706}
1707
7b30f092
JA
1708static void cciss_check_queues(ctlr_info_t *h)
1709{
1710 int start_queue = h->next_to_run;
1711 int i;
1712
1713 /* check to see if we have maxed out the number of commands that can
1714 * be placed on the queue. If so then exit. We do this check here
1715 * in case the interrupt we serviced was from an ioctl and did not
1716 * free any new commands.
1717 */
f880632f 1718 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA
1719 return;
1720
1721 /* We have room on the queue for more commands. Now we need to queue
1722 * them up. We will also keep track of the next queue to run so
1723 * that every queue gets a chance to be started first.
1724 */
1725 for (i = 0; i < h->highest_lun + 1; i++) {
1726 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1727 /* make sure the disk has been added and the drive is real
1728 * because this can be called from the middle of init_one.
1729 */
9cef0d2f
SC
1730 if (!h->drv[curr_queue])
1731 continue;
1732 if (!(h->drv[curr_queue]->queue) ||
1733 !(h->drv[curr_queue]->heads))
7b30f092
JA
1734 continue;
1735 blk_start_queue(h->gendisk[curr_queue]->queue);
1736
1737 /* check to see if we have maxed out the number of commands
1738 * that can be placed on the queue.
1739 */
f880632f 1740 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA
1741 if (curr_queue == start_queue) {
1742 h->next_to_run =
1743 (start_queue + 1) % (h->highest_lun + 1);
1744 break;
1745 } else {
1746 h->next_to_run = curr_queue;
1747 break;
1748 }
7b30f092
JA
1749 }
1750 }
1751}
1752
ca1e0484
MM
1753static void cciss_softirq_done(struct request *rq)
1754{
f70dba83
SC
1755 CommandList_struct *c = rq->completion_data;
1756 ctlr_info_t *h = hba[c->ctlr];
1757 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1758 u64bit temp64;
664a717d 1759 unsigned long flags;
ca1e0484 1760 int i, ddir;
5c07a311 1761 int sg_index = 0;
ca1e0484 1762
f70dba83 1763 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM
1764 ddir = PCI_DMA_FROMDEVICE;
1765 else
1766 ddir = PCI_DMA_TODEVICE;
1767
1768 /* command did not need to be retried */
1769 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1770 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1771 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1772 cciss_unmap_sg_chain_block(h, c);
5c07a311 1773 /* Point to the next block */
f70dba83 1774 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB
1775 sg_index = 0;
1776 }
1777 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1778 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1779 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1780 ddir);
1781 ++sg_index;
ca1e0484
MM
1782 }
1783
b2a4a43d 1784 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1785
c3a4d78c 1786 /* set the residual count for pc requests */
33659ebb 1787 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1788 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1789
c3a4d78c 1790 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1791
ca1e0484 1792 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1793 cmd_free(h, c);
7b30f092 1794 cciss_check_queues(h);
ca1e0484
MM
1795 spin_unlock_irqrestore(&h->lock, flags);
1796}
1797
39ccf9a6
SC
1798static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1799 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1800{
9cef0d2f
SC
1801 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1802 sizeof(h->drv[log_unit]->LunID));
b57695fe 1803}
1804
7fe06326
AP
1805/* This function gets the SCSI vendor, model, and revision of a logical drive
1806 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1807 * they cannot be read.
1808 */
f70dba83 1809static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP
1810 char *vendor, char *model, char *rev)
1811{
1812 int rc;
1813 InquiryData_struct *inq_buf;
b57695fe 1814 unsigned char scsi3addr[8];
7fe06326
AP
1815
1816 *vendor = '\0';
1817 *model = '\0';
1818 *rev = '\0';
1819
1820 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1821 if (!inq_buf)
1822 return;
1823
f70dba83
SC
1824 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1825 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1826 scsi3addr, TYPE_CMD);
7fe06326
AP
1827 if (rc == IO_OK) {
1828 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1829 vendor[VENDOR_LEN] = '\0';
1830 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1831 model[MODEL_LEN] = '\0';
1832 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1833 rev[REV_LEN] = '\0';
1834 }
1835
1836 kfree(inq_buf);
1837 return;
1838}
1839
a72da29b
MM
1840/* This function gets the serial number of a logical drive via
1841 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1842 * number cannot be had, for whatever reason, 16 bytes of 0xff
1843 * are returned instead.
1844 */
f70dba83 1845static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM
1846 unsigned char *serial_no, int buflen)
1847{
1848#define PAGE_83_INQ_BYTES 64
1849 int rc;
1850 unsigned char *buf;
b57695fe 1851 unsigned char scsi3addr[8];
a72da29b
MM
1852
1853 if (buflen > 16)
1854 buflen = 16;
1855 memset(serial_no, 0xff, buflen);
1856 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1857 if (!buf)
1858 return;
1859 memset(serial_no, 0, buflen);
f70dba83
SC
1860 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1861 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1862 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM
1863 if (rc == IO_OK)
1864 memcpy(serial_no, &buf[8], buflen);
1865 kfree(buf);
1866 return;
1867}
1868
617e1344
SC
1869/*
1870 * cciss_add_disk sets up the block device queue for a logical drive
1871 */
1872static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM
1873 int drv_index)
1874{
1875 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC
1876 if (!disk->queue)
1877 goto init_queue_failure;
6ae5ce8e
MM
1878 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1879 disk->major = h->major;
1880 disk->first_minor = drv_index << NWD_SHIFT;
1881 disk->fops = &cciss_fops;
9cef0d2f
SC
1882 if (cciss_create_ld_sysfs_entry(h, drv_index))
1883 goto cleanup_queue;
1884 disk->private_data = h->drv[drv_index];
1885 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM
1886
1887 /* Set up queue information */
1888 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1889
1890 /* This is a hardware imposed limit. */
8a78362c 1891 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1892
086fa5ff 1893 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM
1894
1895 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1896
1897 disk->queue->queuedata = h;
1898
e1defc4f 1899 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1900 h->drv[drv_index]->block_size);
6ae5ce8e
MM
1901
1902 /* Make sure all queue data is written out before */
9cef0d2f 1903 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM
1904 /* allows the interrupt handler to start the queue */
1905 wmb();
9cef0d2f 1906 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1907 add_disk(disk);
617e1344
SC
1908 return 0;
1909
1910cleanup_queue:
1911 blk_cleanup_queue(disk->queue);
1912 disk->queue = NULL;
e8074f79 1913init_queue_failure:
617e1344 1914 return -1;
6ae5ce8e
MM
1915}
1916
ddd47442 1917/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM
1918 * If the usage_count is zero and it is a heretofore unknown drive, or,
1919 * the drive's capacity, geometry, or serial number has changed,
1920 * then the drive information will be updated and the disk will be
1921 * re-registered with the kernel. If these conditions don't hold,
1922 * then it will be left alone for the next reboot. The exception to this
1923 * is disk 0 which will always be left registered with the kernel since it
1924 * is also the controller node. Any changes to disk 0 will show up on
1925 * the next reboot.
7c832835 1926 */
f70dba83
SC
1927static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1928 int first_time, int via_ioctl)
7c832835 1929{
ddd47442 1930 struct gendisk *disk;
ddd47442
MM
1931 InquiryData_struct *inq_buff = NULL;
1932 unsigned int block_size;
00988a35 1933 sector_t total_size;
ddd47442
MM
1934 unsigned long flags = 0;
1935 int ret = 0;
a72da29b
MM
1936 drive_info_struct *drvinfo;
1937
1938 /* Get information about the disk and modify the driver structure */
1939 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1940 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM
1941 if (inq_buff == NULL || drvinfo == NULL)
1942 goto mem_msg;
1943
1944 /* testing to see if 16-byte CDBs are already being used */
1945 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1946 cciss_read_capacity_16(h, drv_index,
a72da29b
MM
1947 &total_size, &block_size);
1948
1949 } else {
f70dba83 1950 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM
1951 /* if read_capacity returns all F's this volume is >2TB */
1952 /* in size so we switch to 16-byte CDB's for all */
1953 /* read/write ops */
1954 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1955 cciss_read_capacity_16(h, drv_index,
a72da29b
MM
1956 &total_size, &block_size);
1957 h->cciss_read = CCISS_READ_16;
1958 h->cciss_write = CCISS_WRITE_16;
1959 } else {
1960 h->cciss_read = CCISS_READ_10;
1961 h->cciss_write = CCISS_WRITE_10;
1962 }
1963 }
1964
f70dba83 1965 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM
1966 inq_buff, drvinfo);
1967 drvinfo->block_size = block_size;
1968 drvinfo->nr_blocks = total_size + 1;
1969
f70dba83 1970 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1971 drvinfo->model, drvinfo->rev);
f70dba83 1972 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1973 sizeof(drvinfo->serial_no));
9cef0d2f
SC
1974 /* Save the lunid in case we deregister the disk, below. */
1975 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1976 sizeof(drvinfo->LunID));
a72da29b
MM
1977
1978 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 1979 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 1980 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC
1981 h->drv[drv_index]->serial_no, 16) == 0) &&
1982 drvinfo->block_size == h->drv[drv_index]->block_size &&
1983 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1984 drvinfo->heads == h->drv[drv_index]->heads &&
1985 drvinfo->sectors == h->drv[drv_index]->sectors &&
1986 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM
1987 /* The disk is unchanged, nothing to update */
1988 goto freeret;
a72da29b 1989
6ae5ce8e
MM
1990 /* If we get here it's not the same disk, or something's changed,
1991 * so we need to * deregister it, and re-register it, if it's not
1992 * in use.
1993 * If the disk already exists then deregister it before proceeding
1994 * (unless it's the first disk (for the controller node).
1995 */
9cef0d2f 1996 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 1997 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 1998 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 1999 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2000 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2001
9cef0d2f 2002 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM
2003 * which keeps the interrupt handler from starting
2004 * the queue.
2005 */
2d11d993 2006 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM
2007 }
2008
2009 /* If the disk is in use return */
2010 if (ret)
a72da29b
MM
2011 goto freeret;
2012
6ae5ce8e 2013 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC
2014 * and serial number inquiry. If the disk was deregistered
2015 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2016 */
9cef0d2f
SC
2017 if (h->drv[drv_index] == NULL) {
2018 drvinfo->device_initialized = 0;
2019 h->drv[drv_index] = drvinfo;
2020 drvinfo = NULL; /* so it won't be freed below. */
2021 } else {
2022 /* special case for cxd0 */
2023 h->drv[drv_index]->block_size = drvinfo->block_size;
2024 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2025 h->drv[drv_index]->heads = drvinfo->heads;
2026 h->drv[drv_index]->sectors = drvinfo->sectors;
2027 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2028 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2029 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2030 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2031 VENDOR_LEN + 1);
2032 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2033 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2034 }
ddd47442
MM
2035
2036 ++h->num_luns;
2037 disk = h->gendisk[drv_index];
9cef0d2f 2038 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2039
6ae5ce8e
MM
2040 /* If it's not disk 0 (drv_index != 0)
2041 * or if it was disk 0, but there was previously
2042 * no actual corresponding configured logical drive
2043 * (raid_leve == -1) then we want to update the
2044 * logical drive's information.
2045 */
361e9b07
SC
2046 if (drv_index || first_time) {
2047 if (cciss_add_disk(h, disk, drv_index) != 0) {
2048 cciss_free_gendisk(h, drv_index);
9cef0d2f 2049 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC
2050 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2051 drv_index);
361e9b07
SC
2052 --h->num_luns;
2053 }
2054 }
ddd47442 2055
6ae5ce8e 2056freeret:
ddd47442 2057 kfree(inq_buff);
a72da29b 2058 kfree(drvinfo);
ddd47442 2059 return;
6ae5ce8e 2060mem_msg:
b2a4a43d 2061 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM
2062 goto freeret;
2063}
2064
2065/* This function will find the first index of the controllers drive array
9cef0d2f
SC
2066 * that has a null drv pointer and allocate the drive info struct and
2067 * will return that index This is where new drives will be added.
2068 * If the index to be returned is greater than the highest_lun index for
2069 * the controller then highest_lun is set * to this new index.
2070 * If there are no available indexes or if tha allocation fails, then -1
2071 * is returned. * "controller_node" is used to know if this is a real
2072 * logical drive, or just the controller node, which determines if this
2073 * counts towards highest_lun.
7c832835 2074 */
9cef0d2f 2075static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM
2076{
2077 int i;
9cef0d2f 2078 drive_info_struct *drv;
ddd47442 2079
9cef0d2f 2080 /* Search for an empty slot for our drive info */
7c832835 2081 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC
2082
2083 /* if not cxd0 case, and it's occupied, skip it. */
2084 if (h->drv[i] && i != 0)
2085 continue;
2086 /*
2087 * If it's cxd0 case, and drv is alloc'ed already, and a
2088 * disk is configured there, skip it.
2089 */
2090 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2091 continue;
2092
2093 /*
2094 * We've found an empty slot. Update highest_lun
2095 * provided this isn't just the fake cxd0 controller node.
2096 */
2097 if (i > h->highest_lun && !controller_node)
2098 h->highest_lun = i;
2099
2100 /* If adding a real disk at cxd0, and it's already alloc'ed */
2101 if (i == 0 && h->drv[i] != NULL)
ddd47442 2102 return i;
9cef0d2f
SC
2103
2104 /*
2105 * Found an empty slot, not already alloc'ed. Allocate it.
2106 * Mark it with raid_level == -1, so we know it's new later on.
2107 */
2108 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2109 if (!drv)
2110 return -1;
2111 drv->raid_level = -1; /* so we know it's new */
2112 h->drv[i] = drv;
2113 return i;
ddd47442
MM
2114 }
2115 return -1;
2116}
2117
9cef0d2f
SC
2118static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2119{
2120 kfree(h->drv[drv_index]);
2121 h->drv[drv_index] = NULL;
2122}
2123
361e9b07
SC
2124static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2125{
2126 put_disk(h->gendisk[drv_index]);
2127 h->gendisk[drv_index] = NULL;
2128}
2129
6ae5ce8e
MM
2130/* cciss_add_gendisk finds a free hba[]->drv structure
2131 * and allocates a gendisk if needed, and sets the lunid
2132 * in the drvinfo structure. It returns the index into
2133 * the ->drv[] array, or -1 if none are free.
2134 * is_controller_node indicates whether highest_lun should
2135 * count this disk, or if it's only being added to provide
2136 * a means to talk to the controller in case no logical
2137 * drives have yet been configured.
2138 */
39ccf9a6
SC
2139static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2140 int controller_node)
6ae5ce8e
MM
2141{
2142 int drv_index;
2143
9cef0d2f 2144 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM
2145 if (drv_index == -1)
2146 return -1;
8ce51966 2147
6ae5ce8e
MM
2148 /*Check if the gendisk needs to be allocated */
2149 if (!h->gendisk[drv_index]) {
2150 h->gendisk[drv_index] =
2151 alloc_disk(1 << NWD_SHIFT);
2152 if (!h->gendisk[drv_index]) {
b2a4a43d
SC
2153 dev_err(&h->pdev->dev,
2154 "could not allocate a new disk %d\n",
2155 drv_index);
9cef0d2f 2156 goto err_free_drive_info;
6ae5ce8e
MM
2157 }
2158 }
9cef0d2f
SC
2159 memcpy(h->drv[drv_index]->LunID, lunid,
2160 sizeof(h->drv[drv_index]->LunID));
2161 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2162 goto err_free_disk;
6ae5ce8e
MM
2163 /* Don't need to mark this busy because nobody */
2164 /* else knows about this disk yet to contend */
2165 /* for access to it. */
9cef0d2f 2166 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM
2167 wmb();
2168 return drv_index;
7fe06326
AP
2169
2170err_free_disk:
361e9b07 2171 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC
2172err_free_drive_info:
2173 cciss_free_drive_info(h, drv_index);
7fe06326 2174 return -1;
6ae5ce8e
MM
2175}
2176
2177/* This is for the special case of a controller which
2178 * has no logical drives. In this case, we still need
2179 * to register a disk so the controller can be accessed
2180 * by the Array Config Utility.
2181 */
2182static void cciss_add_controller_node(ctlr_info_t *h)
2183{
2184 struct gendisk *disk;
2185 int drv_index;
2186
2187 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2188 return;
2189
39ccf9a6 2190 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC
2191 if (drv_index == -1)
2192 goto error;
9cef0d2f
SC
2193 h->drv[drv_index]->block_size = 512;
2194 h->drv[drv_index]->nr_blocks = 0;
2195 h->drv[drv_index]->heads = 0;
2196 h->drv[drv_index]->sectors = 0;
2197 h->drv[drv_index]->cylinders = 0;
2198 h->drv[drv_index]->raid_level = -1;
2199 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2200 disk = h->gendisk[drv_index];
361e9b07
SC
2201 if (cciss_add_disk(h, disk, drv_index) == 0)
2202 return;
2203 cciss_free_gendisk(h, drv_index);
9cef0d2f 2204 cciss_free_drive_info(h, drv_index);
361e9b07 2205error:
b2a4a43d 2206 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2207 return;
6ae5ce8e
MM
2208}
2209
ddd47442 2210/* This function will add and remove logical drives from the Logical
d14c4ab5 2211 * drive array of the controller and maintain persistency of ordering
ddd47442
MM
2212 * so that mount points are preserved until the next reboot. This allows
2213 * for the removal of logical drives in the middle of the drive array
2214 * without a re-ordering of those drives.
2215 * INPUT
2216 * h = The controller to perform the operations on
7c832835 2217 */
2d11d993
SC
2218static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2219 int via_ioctl)
1da177e4 2220{
ddd47442
MM
2221 int num_luns;
2222 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM
2223 int return_code;
2224 int listlength = 0;
2225 int i;
2226 int drv_found;
2227 int drv_index = 0;
39ccf9a6 2228 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2229 unsigned long flags;
ddd47442 2230
6ae5ce8e
MM
2231 if (!capable(CAP_SYS_RAWIO))
2232 return -EPERM;
2233
ddd47442 2234 /* Set busy_configuring flag for this operation */
f70dba83 2235 spin_lock_irqsave(&h->lock, flags);
7c832835 2236 if (h->busy_configuring) {
f70dba83 2237 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM
2238 return -EBUSY;
2239 }
2240 h->busy_configuring = 1;
f70dba83 2241 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2242
a72da29b
MM
2243 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2244 if (ld_buff == NULL)
2245 goto mem_msg;
2246
f70dba83 2247 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2248 sizeof(ReportLunData_struct),
2249 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2250
a72da29b
MM
2251 if (return_code == IO_OK)
2252 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2253 else { /* reading number of logical volumes failed */
b2a4a43d
SC
2254 dev_warn(&h->pdev->dev,
2255 "report logical volume command failed\n");
a72da29b
MM
2256 listlength = 0;
2257 goto freeret;
2258 }
2259
2260 num_luns = listlength / 8; /* 8 bytes per entry */
2261 if (num_luns > CISS_MAX_LUN) {
2262 num_luns = CISS_MAX_LUN;
b2a4a43d 2263 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM
2264 " on controller than can be handled by"
2265 " this driver.\n");
2266 }
2267
6ae5ce8e
MM
2268 if (num_luns == 0)
2269 cciss_add_controller_node(h);
2270
2271 /* Compare controller drive array to driver's drive array
2272 * to see if any drives are missing on the controller due
2273 * to action of Array Config Utility (user deletes drive)
2274 * and deregister logical drives which have disappeared.
2275 */
a72da29b
MM
2276 for (i = 0; i <= h->highest_lun; i++) {
2277 int j;
2278 drv_found = 0;
d8a0be6a
SC
2279
2280 /* skip holes in the array from already deleted drives */
9cef0d2f 2281 if (h->drv[i] == NULL)
d8a0be6a
SC
2282 continue;
2283
a72da29b 2284 for (j = 0; j < num_luns; j++) {
39ccf9a6 2285 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2286 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2287 sizeof(lunid)) == 0) {
a72da29b
MM
2288 drv_found = 1;
2289 break;
2290 }
2291 }
2292 if (!drv_found) {
2293 /* Deregister it from the OS, it's gone. */
f70dba83 2294 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2295 h->drv[i]->busy_configuring = 1;
f70dba83 2296 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2297 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC
2298 if (h->drv[i] != NULL)
2299 h->drv[i]->busy_configuring = 0;
ddd47442 2300 }
a72da29b 2301 }
ddd47442 2302
a72da29b
MM
2303 /* Compare controller drive array to driver's drive array.
2304 * Check for updates in the drive information and any new drives
2305 * on the controller due to ACU adding logical drives, or changing
2306 * a logical drive's size, etc. Reregister any new/changed drives
2307 */
2308 for (i = 0; i < num_luns; i++) {
2309 int j;
ddd47442 2310
a72da29b 2311 drv_found = 0;
ddd47442 2312
39ccf9a6 2313 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM
2314 /* Find if the LUN is already in the drive array
2315 * of the driver. If so then update its info
2316 * if not in use. If it does not exist then find
2317 * the first free index and add it.
2318 */
2319 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC
2320 if (h->drv[j] != NULL &&
2321 memcmp(h->drv[j]->LunID, lunid,
2322 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM
2323 drv_index = j;
2324 drv_found = 1;
2325 break;
ddd47442 2326 }
a72da29b 2327 }
ddd47442 2328
a72da29b
MM
2329 /* check if the drive was found already in the array */
2330 if (!drv_found) {
eece695f 2331 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM
2332 if (drv_index == -1)
2333 goto freeret;
a72da29b 2334 }
f70dba83 2335 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2336 } /* end for */
ddd47442 2337
6ae5ce8e 2338freeret:
ddd47442
MM
2339 kfree(ld_buff);
2340 h->busy_configuring = 0;
2341 /* We return -1 here to tell the ACU that we have registered/updated
2342 * all of the drives that we can and to keep it from calling us
2343 * additional times.
7c832835 2344 */
ddd47442 2345 return -1;
6ae5ce8e 2346mem_msg:
b2a4a43d 2347 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2348 h->busy_configuring = 0;
ddd47442
MM
2349 goto freeret;
2350}
2351
9ddb27b4
SC
2352static void cciss_clear_drive_info(drive_info_struct *drive_info)
2353{
2354 /* zero out the disk size info */
2355 drive_info->nr_blocks = 0;
2356 drive_info->block_size = 0;
2357 drive_info->heads = 0;
2358 drive_info->sectors = 0;
2359 drive_info->cylinders = 0;
2360 drive_info->raid_level = -1;
2361 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2362 memset(drive_info->model, 0, sizeof(drive_info->model));
2363 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2364 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2365 /*
2366 * don't clear the LUNID though, we need to remember which
2367 * one this one is.
2368 */
2369}
2370
ddd47442
MM
2371/* This function will deregister the disk and it's queue from the
2372 * kernel. It must be called with the controller lock held and the
2373 * drv structures busy_configuring flag set. It's parameters are:
2374 *
2375 * disk = This is the disk to be deregistered
2376 * drv = This is the drive_info_struct associated with the disk to be
2377 * deregistered. It contains information about the disk used
2378 * by the driver.
2379 * clear_all = This flag determines whether or not the disk information
2380 * is going to be completely cleared out and the highest_lun
2381 * reset. Sometimes we want to clear out information about
d14c4ab5 2382 * the disk in preparation for re-adding it. In this case
ddd47442
MM
2383 * the highest_lun should be left unchanged and the LunID
2384 * should not be cleared.
2d11d993
SC
2385 * via_ioctl
2386 * This indicates whether we've reached this path via ioctl.
2387 * This affects the maximum usage count allowed for c0d0 to be messed with.
2388 * If this path is reached via ioctl(), then the max_usage_count will
2389 * be 1, as the process calling ioctl() has got to have the device open.
2390 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2391*/
a0ea8622 2392static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2393 int clear_all, int via_ioctl)
ddd47442 2394{
799202cb 2395 int i;
a0ea8622
SC
2396 struct gendisk *disk;
2397 drive_info_struct *drv;
9cef0d2f 2398 int recalculate_highest_lun;
1da177e4
LT
2399
2400 if (!capable(CAP_SYS_RAWIO))
2401 return -EPERM;
2402
9cef0d2f 2403 drv = h->drv[drv_index];
a0ea8622
SC
2404 disk = h->gendisk[drv_index];
2405
1da177e4 2406 /* make sure logical volume is NOT is use */
7c832835 2407 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2408 if (drv->usage_count > via_ioctl)
7c832835
BH
2409 return -EBUSY;
2410 } else if (drv->usage_count > 0)
2411 return -EBUSY;
1da177e4 2412
9cef0d2f
SC
2413 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2414
ddd47442
MM
2415 /* invalidate the devices and deregister the disk. If it is disk
2416 * zero do not deregister it but just zero out it's values. This
2417 * allows us to delete disk zero but keep the controller registered.
7c832835
BH
2418 */
2419 if (h->gendisk[0] != disk) {
5a9df732 2420 struct request_queue *q = disk->queue;
097d0264 2421 if (disk->flags & GENHD_FL_UP) {
8ce51966 2422 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2423 del_gendisk(disk);
5a9df732 2424 }
9cef0d2f 2425 if (q)
5a9df732 2426 blk_cleanup_queue(q);
5a9df732
AB
2427 /* If clear_all is set then we are deleting the logical
2428 * drive, not just refreshing its info. For drives
2429 * other than disk 0 we will call put_disk. We do not
2430 * do this for disk 0 as we need it to be able to
2431 * configure the controller.
a72da29b 2432 */
5a9df732
AB
2433 if (clear_all){
2434 /* This isn't pretty, but we need to find the
2435 * disk in our array and NULL our the pointer.
2436 * This is so that we will call alloc_disk if
2437 * this index is used again later.
a72da29b 2438 */
5a9df732 2439 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2440 if (h->gendisk[i] == disk) {
5a9df732
AB
2441 h->gendisk[i] = NULL;
2442 break;
799202cb 2443 }
799202cb 2444 }
5a9df732 2445 put_disk(disk);
ddd47442 2446 }
799202cb
MM
2447 } else {
2448 set_capacity(disk, 0);
9cef0d2f 2449 cciss_clear_drive_info(drv);
ddd47442
MM
2450 }
2451
2452 --h->num_luns;
ddd47442 2453
9cef0d2f
SC
2454 /* if it was the last disk, find the new hightest lun */
2455 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2456 int newhighest = -1;
9cef0d2f
SC
2457 for (i = 0; i <= h->highest_lun; i++) {
2458 /* if the disk has size > 0, it is available */
2459 if (h->drv[i] && h->drv[i]->heads)
2460 newhighest = i;
1da177e4 2461 }
9cef0d2f 2462 h->highest_lun = newhighest;
ddd47442 2463 }
e2019b58 2464 return 0;
1da177e4 2465}
ddd47442 2466
f70dba83 2467static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2468 size_t size, __u8 page_code, unsigned char *scsi3addr,
2469 int cmd_type)
1da177e4 2470{
1da177e4
LT
2471 u64bit buff_dma_handle;
2472 int status = IO_OK;
2473
2474 c->cmd_type = CMD_IOCTL_PEND;
2475 c->Header.ReplyQueue = 0;
7c832835 2476 if (buff != NULL) {
1da177e4 2477 c->Header.SGList = 1;
7c832835 2478 c->Header.SGTotal = 1;
1da177e4
LT
2479 } else {
2480 c->Header.SGList = 0;
7c832835 2481 c->Header.SGTotal = 0;
1da177e4
LT
2482 }
2483 c->Header.Tag.lower = c->busaddr;
b57695fe 2484 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT
2485
2486 c->Request.Type.Type = cmd_type;
2487 if (cmd_type == TYPE_CMD) {
7c832835
BH
2488 switch (cmd) {
2489 case CISS_INQUIRY:
1da177e4 2490 /* are we trying to read a vital product page */
7c832835 2491 if (page_code != 0) {
1da177e4
LT
2492 c->Request.CDB[1] = 0x01;
2493 c->Request.CDB[2] = page_code;
2494 }
2495 c->Request.CDBLen = 6;
7c832835 2496 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT
2497 c->Request.Type.Direction = XFER_READ;
2498 c->Request.Timeout = 0;
7c832835
BH
2499 c->Request.CDB[0] = CISS_INQUIRY;
2500 c->Request.CDB[4] = size & 0xFF;
2501 break;
1da177e4
LT
2502 case CISS_REPORT_LOG:
2503 case CISS_REPORT_PHYS:
7c832835 2504 /* Talking to controller so It's a physical command
1da177e4 2505 mode = 00 target = 0. Nothing to write.
7c832835 2506 */
1da177e4
LT
2507 c->Request.CDBLen = 12;
2508 c->Request.Type.Attribute = ATTR_SIMPLE;
2509 c->Request.Type.Direction = XFER_READ;
2510 c->Request.Timeout = 0;
2511 c->Request.CDB[0] = cmd;
b028461d 2512 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT
2513 c->Request.CDB[7] = (size >> 16) & 0xFF;
2514 c->Request.CDB[8] = (size >> 8) & 0xFF;
2515 c->Request.CDB[9] = size & 0xFF;
2516 break;
2517
2518 case CCISS_READ_CAPACITY:
1da177e4
LT
2519 c->Request.CDBLen = 10;
2520 c->Request.Type.Attribute = ATTR_SIMPLE;
2521 c->Request.Type.Direction = XFER_READ;
2522 c->Request.Timeout = 0;
2523 c->Request.CDB[0] = cmd;
7c832835 2524 break;
00988a35 2525 case CCISS_READ_CAPACITY_16:
00988a35
MMOD
2526 c->Request.CDBLen = 16;
2527 c->Request.Type.Attribute = ATTR_SIMPLE;
2528 c->Request.Type.Direction = XFER_READ;
2529 c->Request.Timeout = 0;
2530 c->Request.CDB[0] = cmd;
2531 c->Request.CDB[1] = 0x10;
2532 c->Request.CDB[10] = (size >> 24) & 0xFF;
2533 c->Request.CDB[11] = (size >> 16) & 0xFF;
2534 c->Request.CDB[12] = (size >> 8) & 0xFF;
2535 c->Request.CDB[13] = size & 0xFF;
2536 c->Request.Timeout = 0;
2537 c->Request.CDB[0] = cmd;
2538 break;
1da177e4
LT
2539 case CCISS_CACHE_FLUSH:
2540 c->Request.CDBLen = 12;
2541 c->Request.Type.Attribute = ATTR_SIMPLE;
2542 c->Request.Type.Direction = XFER_WRITE;
2543 c->Request.Timeout = 0;
2544 c->Request.CDB[0] = BMIC_WRITE;
2545 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2546 break;
88f627ae 2547 case TEST_UNIT_READY:
88f627ae
SC
2548 c->Request.CDBLen = 6;
2549 c->Request.Type.Attribute = ATTR_SIMPLE;
2550 c->Request.Type.Direction = XFER_NONE;
2551 c->Request.Timeout = 0;
2552 break;
1da177e4 2553 default:
b2a4a43d 2554 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2555 return IO_ERROR;
1da177e4
LT
2556 }
2557 } else if (cmd_type == TYPE_MSG) {
2558 switch (cmd) {
7c832835 2559 case 0: /* ABORT message */
3da8b713 2560 c->Request.CDBLen = 12;
2561 c->Request.Type.Attribute = ATTR_SIMPLE;
2562 c->Request.Type.Direction = XFER_WRITE;
2563 c->Request.Timeout = 0;
7c832835
BH
2564 c->Request.CDB[0] = cmd; /* abort */
2565 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2566 /* buff contains the tag of the command to abort */
2567 memcpy(&c->Request.CDB[4], buff, 8);
2568 break;
7c832835 2569 case 1: /* RESET message */
88f627ae 2570 c->Request.CDBLen = 16;
3da8b713 2571 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2572 c->Request.Type.Direction = XFER_NONE;
3da8b713 2573 c->Request.Timeout = 0;
2574 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2575 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2576 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2577 break;
1da177e4
LT
2578 case 3: /* No-Op message */
2579 c->Request.CDBLen = 1;
2580 c->Request.Type.Attribute = ATTR_SIMPLE;
2581 c->Request.Type.Direction = XFER_WRITE;
2582 c->Request.Timeout = 0;
2583 c->Request.CDB[0] = cmd;
2584 break;
2585 default:
b2a4a43d
SC
2586 dev_warn(&h->pdev->dev,
2587 "unknown message type %d\n", cmd);
1da177e4
LT
2588 return IO_ERROR;
2589 }
2590 } else {
b2a4a43d 2591 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT
2592 return IO_ERROR;
2593 }
2594 /* Fill in the scatter gather information */
2595 if (size > 0) {
2596 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH
2597 buff, size,
2598 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT
2599 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2600 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2601 c->SG[0].Len = size;
7c832835 2602 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT
2603 }
2604 return status;
2605}
7c832835 2606
3c2ab402 2607static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2608{
2609 switch (c->err_info->ScsiStatus) {
2610 case SAM_STAT_GOOD:
2611 return IO_OK;
2612 case SAM_STAT_CHECK_CONDITION:
2613 switch (0xf & c->err_info->SenseInfo[2]) {
2614 case 0: return IO_OK; /* no sense */
2615 case 1: return IO_OK; /* recovered error */
2616 default:
c08fac65
SC
2617 if (check_for_unit_attention(h, c))
2618 return IO_NEEDS_RETRY;
b2a4a43d 2619 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2620 "check condition, sense key = 0x%02x\n",
b2a4a43d 2621 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2622 }
2623 break;
2624 default:
b2a4a43d
SC
2625 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2626 "scsi status = 0x%02x\n",
3c2ab402 2627 c->Request.CDB[0], c->err_info->ScsiStatus);
2628 break;
2629 }
2630 return IO_ERROR;
2631}
2632
789a424a 2633static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2634{
5390cfc3 2635 int return_status = IO_OK;
7c832835 2636
789a424a 2637 if (c->err_info->CommandStatus == CMD_SUCCESS)
2638 return IO_OK;
5390cfc3 2639
2640 switch (c->err_info->CommandStatus) {
2641 case CMD_TARGET_STATUS:
3c2ab402 2642 return_status = check_target_status(h, c);
5390cfc3 2643 break;
2644 case CMD_DATA_UNDERRUN:
2645 case CMD_DATA_OVERRUN:
2646 /* expected for inquiry and report lun commands */
2647 break;
2648 case CMD_INVALID:
b2a4a43d 2649 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2650 "reported invalid\n", c->Request.CDB[0]);
2651 return_status = IO_ERROR;
2652 break;
2653 case CMD_PROTOCOL_ERR:
b2a4a43d
SC
2654 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2655 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2656 return_status = IO_ERROR;
2657 break;
2658 case CMD_HARDWARE_ERR:
b2a4a43d 2659 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2660 " hardware error\n", c->Request.CDB[0]);
2661 return_status = IO_ERROR;
2662 break;
2663 case CMD_CONNECTION_LOST:
b2a4a43d 2664 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2665 "connection lost\n", c->Request.CDB[0]);
2666 return_status = IO_ERROR;
2667 break;
2668 case CMD_ABORTED:
b2a4a43d 2669 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2670 "aborted\n", c->Request.CDB[0]);
2671 return_status = IO_ERROR;
2672 break;
2673 case CMD_ABORT_FAILED:
b2a4a43d 2674 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2675 "abort failed\n", c->Request.CDB[0]);
2676 return_status = IO_ERROR;
2677 break;
2678 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2679 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2680 c->Request.CDB[0]);
789a424a 2681 return_status = IO_NEEDS_RETRY;
5390cfc3 2682 break;
2683 default:
b2a4a43d 2684 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2685 "unknown status %x\n", c->Request.CDB[0],
2686 c->err_info->CommandStatus);
2687 return_status = IO_ERROR;
7c832835 2688 }
789a424a 2689 return return_status;
2690}
2691
2692static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2693 int attempt_retry)
2694{
2695 DECLARE_COMPLETION_ONSTACK(wait);
2696 u64bit buff_dma_handle;
789a424a 2697 int return_status = IO_OK;
2698
2699resend_cmd2:
2700 c->waiting = &wait;
664a717d 2701 enqueue_cmd_and_start_io(h, c);
789a424a 2702
2703 wait_for_completion(&wait);
2704
2705 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2706 goto command_done;
2707
2708 return_status = process_sendcmd_error(h, c);
2709
2710 if (return_status == IO_NEEDS_RETRY &&
2711 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2712 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2713 c->Request.CDB[0]);
2714 c->retry_count++;
2715 /* erase the old error information */
2716 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2717 return_status = IO_OK;
2718 INIT_COMPLETION(wait);
2719 goto resend_cmd2;
2720 }
5390cfc3 2721
2722command_done:
1da177e4 2723 /* unlock the buffers from DMA */
bb2a37bf
MM
2724 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2725 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH
2726 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2727 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2728 return return_status;
2729}
2730
f70dba83 2731static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2732 __u8 page_code, unsigned char scsi3addr[],
2733 int cmd_type)
5390cfc3 2734{
5390cfc3 2735 CommandList_struct *c;
2736 int return_status;
2737
6b4d96b8 2738 c = cmd_special_alloc(h);
5390cfc3 2739 if (!c)
2740 return -ENOMEM;
f70dba83 2741 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2742 scsi3addr, cmd_type);
5390cfc3 2743 if (return_status == IO_OK)
789a424a 2744 return_status = sendcmd_withirq_core(h, c, 1);
2745
6b4d96b8 2746 cmd_special_free(h, c);
7c832835 2747 return return_status;
1da177e4 2748}
7c832835 2749
f70dba83 2750static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2751 sector_t total_size,
7c832835
BH
2752 unsigned int block_size,
2753 InquiryData_struct *inq_buff,
2754 drive_info_struct *drv)
1da177e4
LT
2755{
2756 int return_code;
00988a35 2757 unsigned long t;
b57695fe 2758 unsigned char scsi3addr[8];
00988a35 2759
1da177e4 2760 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC
2761 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2762 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2763 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2764 if (return_code == IO_OK) {
7c832835 2765 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC
2766 dev_warn(&h->pdev->dev,
2767 "reading geometry failed, volume "
7c832835 2768 "does not support reading geometry\n");
1da177e4 2769 drv->heads = 255;
b028461d 2770 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2771 drv->cylinders = total_size + 1;
89f97ad1 2772 drv->raid_level = RAID_UNKNOWN;
1da177e4 2773 } else {
1da177e4
LT
2774 drv->heads = inq_buff->data_byte[6];
2775 drv->sectors = inq_buff->data_byte[7];
2776 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2777 drv->cylinders += inq_buff->data_byte[5];
2778 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW
2779 }
2780 drv->block_size = block_size;
97c06978 2781 drv->nr_blocks = total_size + 1;
3f7705ea
MW
2782 t = drv->heads * drv->sectors;
2783 if (t > 1) {
97c06978
MMOD
2784 sector_t real_size = total_size + 1;
2785 unsigned long rem = sector_div(real_size, t);
3f7705ea 2786 if (rem)
97c06978
MMOD
2787 real_size++;
2788 drv->cylinders = real_size;
1da177e4 2789 }
7c832835 2790 } else { /* Get geometry failed */
b2a4a43d 2791 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2792 }
1da177e4 2793}
7c832835 2794
1da177e4 2795static void
f70dba83 2796cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2797 unsigned int *block_size)
1da177e4 2798{
00988a35 2799 ReadCapdata_struct *buf;
1da177e4 2800 int return_code;
b57695fe 2801 unsigned char scsi3addr[8];
1aebe187
MK
2802
2803 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2804 if (!buf) {
b2a4a43d 2805 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD
2806 return;
2807 }
1aebe187 2808
f70dba83
SC
2809 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2810 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2811 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2812 if (return_code == IO_OK) {
4c1f2b31
AV
2813 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2814 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2815 } else { /* read capacity command failed */
b2a4a43d 2816 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT
2817 *total_size = 0;
2818 *block_size = BLOCK_SIZE;
2819 }
00988a35 2820 kfree(buf);
00988a35
MMOD
2821}
2822
f70dba83 2823static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2824 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD
2825{
2826 ReadCapdata_struct_16 *buf;
2827 int return_code;
b57695fe 2828 unsigned char scsi3addr[8];
1aebe187
MK
2829
2830 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2831 if (!buf) {
b2a4a43d 2832 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD
2833 return;
2834 }
1aebe187 2835
f70dba83
SC
2836 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2837 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2838 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2839 0, scsi3addr, TYPE_CMD);
00988a35 2840 if (return_code == IO_OK) {
4c1f2b31
AV
2841 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2842 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2843 } else { /* read capacity command failed */
b2a4a43d 2844 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD
2845 *total_size = 0;
2846 *block_size = BLOCK_SIZE;
2847 }
b2a4a43d 2848 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2849 (unsigned long long)*total_size+1, *block_size);
00988a35 2850 kfree(buf);
1da177e4
LT
2851}
2852
1da177e4
LT
2853static int cciss_revalidate(struct gendisk *disk)
2854{
2855 ctlr_info_t *h = get_host(disk);
2856 drive_info_struct *drv = get_drv(disk);
2857 int logvol;
7c832835 2858 int FOUND = 0;
1da177e4 2859 unsigned int block_size;
00988a35 2860 sector_t total_size;
1da177e4
LT
2861 InquiryData_struct *inq_buff = NULL;
2862
7c832835 2863 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
9cef0d2f 2864 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2865 sizeof(drv->LunID)) == 0) {
7c832835 2866 FOUND = 1;
1da177e4
LT
2867 break;
2868 }
2869 }
2870
7c832835
BH
2871 if (!FOUND)
2872 return 1;
1da177e4 2873
7c832835
BH
2874 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2875 if (inq_buff == NULL) {
b2a4a43d 2876 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH
2877 return 1;
2878 }
00988a35 2879 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2880 cciss_read_capacity(h, logvol,
00988a35
MMOD
2881 &total_size, &block_size);
2882 } else {
f70dba83 2883 cciss_read_capacity_16(h, logvol,
00988a35
MMOD
2884 &total_size, &block_size);
2885 }
f70dba83 2886 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2887 inq_buff, drv);
1da177e4 2888
e1defc4f 2889 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT
2890 set_capacity(disk, drv->nr_blocks);
2891
1da177e4
LT
2892 kfree(inq_buff);
2893 return 0;
2894}
2895
1da177e4
LT
2896/*
2897 * Map (physical) PCI mem into (virtual) kernel space
2898 */
2899static void __iomem *remap_pci_mem(ulong base, ulong size)
2900{
7c832835
BH
2901 ulong page_base = ((ulong) base) & PAGE_MASK;
2902 ulong page_offs = ((ulong) base) - page_base;
2903 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2904
7c832835 2905 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT
2906}
2907
7c832835
BH
2908/*
2909 * Takes jobs of the Q and sends them to the hardware, then puts it on
2910 * the Q to wait for completion.
2911 */
2912static void start_io(ctlr_info_t *h)
1da177e4
LT
2913{
2914 CommandList_struct *c;
7c832835 2915
8a3173de
JA
2916 while (!hlist_empty(&h->reqQ)) {
2917 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
1da177e4
LT
2918 /* can't do anything if fifo is full */
2919 if ((h->access.fifo_full(h))) {
b2a4a43d 2920 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT
2921 break;
2922 }
2923
7c832835 2924 /* Get the first entry from the Request Q */
8a3173de 2925 removeQ(c);
1da177e4 2926 h->Qdepth--;
7c832835
BH
2927
2928 /* Tell the controller execute command */
1da177e4 2929 h->access.submit_command(h, c);
7c832835
BH
2930
2931 /* Put job onto the completed Q */
8a3173de 2932 addQ(&h->cmpQ, c);
1da177e4
LT
2933 }
2934}
7c832835 2935
f70dba83 2936/* Assumes that h->lock is held. */
1da177e4
LT
2937/* Zeros out the error record and then resends the command back */
2938/* to the controller */
7c832835 2939static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT
2940{
2941 /* erase the old error information */
2942 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2943
2944 /* add it to software queue and then send it to the controller */
8a3173de 2945 addQ(&h->reqQ, c);
1da177e4 2946 h->Qdepth++;
7c832835 2947 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT
2948 h->maxQsinceinit = h->Qdepth;
2949
2950 start_io(h);
2951}
a9925a06 2952
1a614f50
SC
2953static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2954 unsigned int msg_byte, unsigned int host_byte,
2955 unsigned int driver_byte)
2956{
2957 /* inverse of macros in scsi.h */
2958 return (scsi_status_byte & 0xff) |
2959 ((msg_byte & 0xff) << 8) |
2960 ((host_byte & 0xff) << 16) |
2961 ((driver_byte & 0xff) << 24);
2962}
2963
0a9279cc
MM
2964static inline int evaluate_target_status(ctlr_info_t *h,
2965 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD
2966{
2967 unsigned char sense_key;
1a614f50
SC
2968 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2969 int error_value;
2970
0a9279cc 2971 *retry_cmd = 0;
1a614f50
SC
2972 /* If we get in here, it means we got "target status", that is, scsi status */
2973 status_byte = cmd->err_info->ScsiStatus;
2974 driver_byte = DRIVER_OK;
2975 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2976
33659ebb 2977 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC
2978 host_byte = DID_PASSTHROUGH;
2979 else
2980 host_byte = DID_OK;
2981
2982 error_value = make_status_bytes(status_byte, msg_byte,
2983 host_byte, driver_byte);
03bbfee5 2984
1a614f50 2985 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 2986 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 2987 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD
2988 "has SCSI Status 0x%x\n",
2989 cmd, cmd->err_info->ScsiStatus);
1a614f50 2990 return error_value;
03bbfee5
MMOD
2991 }
2992
2993 /* check the sense key */
2994 sense_key = 0xf & cmd->err_info->SenseInfo[2];
2995 /* no status or recovered error */
33659ebb
CH
2996 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
2997 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 2998 error_value = 0;
03bbfee5 2999
0a9279cc 3000 if (check_for_unit_attention(h, cmd)) {
33659ebb 3001 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM
3002 return 0;
3003 }
3004
33659ebb
CH
3005 /* Not SG_IO or similar? */
3006 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3007 if (error_value != 0)
b2a4a43d 3008 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3009 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3010 return error_value;
03bbfee5
MMOD
3011 }
3012
3013 /* SG_IO or similar, copy sense data back */
3014 if (cmd->rq->sense) {
3015 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3016 cmd->rq->sense_len = cmd->err_info->SenseLen;
3017 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3018 cmd->rq->sense_len);
3019 } else
3020 cmd->rq->sense_len = 0;
3021
1a614f50 3022 return error_value;
03bbfee5
MMOD
3023}
3024
7c832835 3025/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA
3026 * buffers for the completed job. Note that this function does not need
3027 * to hold the hba/queue lock.
7c832835
BH
3028 */
3029static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3030 int timeout)
1da177e4 3031{
1da177e4 3032 int retry_cmd = 0;
198b7660
MMOD
3033 struct request *rq = cmd->rq;
3034
3035 rq->errors = 0;
7c832835 3036
1da177e4 3037 if (timeout)
1a614f50 3038 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3039
d38ae168
MMOD
3040 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3041 goto after_error_processing;
7c832835 3042
d38ae168 3043 switch (cmd->err_info->CommandStatus) {
d38ae168 3044 case CMD_TARGET_STATUS:
0a9279cc 3045 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD
3046 break;
3047 case CMD_DATA_UNDERRUN:
33659ebb 3048 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3049 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD
3050 " completed with data underrun "
3051 "reported\n", cmd);
c3a4d78c 3052 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3053 }
d38ae168
MMOD
3054 break;
3055 case CMD_DATA_OVERRUN:
33659ebb 3056 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3057 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD
3058 " completed with data overrun "
3059 "reported\n", cmd);
d38ae168
MMOD
3060 break;
3061 case CMD_INVALID:
b2a4a43d 3062 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3063 "reported invalid\n", cmd);
1a614f50
SC
3064 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3065 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3066 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3067 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD
3068 break;
3069 case CMD_PROTOCOL_ERR:
b2a4a43d
SC
3070 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3071 "protocol error\n", cmd);
1a614f50
SC
3072 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3073 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3074 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3075 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD
3076 break;
3077 case CMD_HARDWARE_ERR:
b2a4a43d 3078 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3079 " hardware error\n", cmd);
1a614f50
SC
3080 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3081 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3082 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3083 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD
3084 break;
3085 case CMD_CONNECTION_LOST:
b2a4a43d 3086 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3087 "connection lost\n", cmd);
1a614f50
SC
3088 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3089 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3090 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3091 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD
3092 break;
3093 case CMD_ABORTED:
b2a4a43d 3094 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3095 "aborted\n", cmd);
1a614f50
SC
3096 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3097 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3098 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3099 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD
3100 break;
3101 case CMD_ABORT_FAILED:
b2a4a43d 3102 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3103 "abort failed\n", cmd);
1a614f50
SC
3104 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3105 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3106 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3107 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD
3108 break;
3109 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3110 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD
3111 "abort %p\n", h->ctlr, cmd);
3112 if (cmd->retry_count < MAX_CMD_RETRIES) {
3113 retry_cmd = 1;
b2a4a43d 3114 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD
3115 cmd->retry_count++;
3116 } else
b2a4a43d
SC
3117 dev_warn(&h->pdev->dev,
3118 "%p retried too many times\n", cmd);
1a614f50
SC
3119 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3120 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3121 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3122 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD
3123 break;
3124 case CMD_TIMEOUT:
b2a4a43d 3125 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC
3126 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3127 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3128 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3129 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD
3130 break;
3131 default:
b2a4a43d 3132 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD
3133 "unknown status %x\n", cmd,
3134 cmd->err_info->CommandStatus);
1a614f50
SC
3135 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3136 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH
3137 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3138 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3139 }
d38ae168
MMOD
3140
3141after_error_processing:
3142
1da177e4 3143 /* We need to return this command */
7c832835
BH
3144 if (retry_cmd) {
3145 resend_cciss_cmd(h, cmd);
1da177e4 3146 return;
7c832835 3147 }
03bbfee5 3148 cmd->rq->completion_data = cmd;
a9925a06 3149 blk_complete_request(cmd->rq);
1da177e4
LT
3150}
3151
0c2b3908
MM
3152static inline u32 cciss_tag_contains_index(u32 tag)
3153{
5e216153 3154#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM
3155 return tag & DIRECT_LOOKUP_BIT;
3156}
3157
3158static inline u32 cciss_tag_to_index(u32 tag)
3159{
5e216153 3160#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM
3161 return tag >> DIRECT_LOOKUP_SHIFT;
3162}
3163
3164static inline u32 cciss_tag_discard_error_bits(u32 tag)
3165{
3166#define CCISS_ERROR_BITS 0x03
3167 return tag & ~CCISS_ERROR_BITS;
3168}
3169
3170static inline void cciss_mark_tag_indexed(u32 *tag)
3171{
3172 *tag |= DIRECT_LOOKUP_BIT;
3173}
3174
3175static inline void cciss_set_tag_index(u32 *tag, u32 index)
3176{
3177 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3178}
3179
7c832835
BH
3180/*
3181 * Get a request and submit it to the controller.
1da177e4 3182 */
165125e1 3183static void do_cciss_request(struct request_queue *q)
1da177e4 3184{
7c832835 3185 ctlr_info_t *h = q->queuedata;
1da177e4 3186 CommandList_struct *c;
00988a35
MMOD
3187 sector_t start_blk;
3188 int seg;
1da177e4
LT
3189 struct request *creq;
3190 u64bit temp64;
5c07a311
DB
3191 struct scatterlist *tmp_sg;
3192 SGDescriptor_struct *curr_sg;
1da177e4
LT
3193 drive_info_struct *drv;
3194 int i, dir;
5c07a311
DB
3195 int sg_index = 0;
3196 int chained = 0;
1da177e4
LT
3197
3198 /* We call start_io here in case there is a command waiting on the
3199 * queue that has not been sent.
7c832835 3200 */
1da177e4
LT
3201 if (blk_queue_plugged(q))
3202 goto startio;
3203
7c832835 3204 queue:
9934c8c0 3205 creq = blk_peek_request(q);
1da177e4
LT
3206 if (!creq)
3207 goto startio;
3208
5c07a311 3209 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3210
6b4d96b8
SC
3211 c = cmd_alloc(h);
3212 if (!c)
1da177e4
LT
3213 goto full;
3214
9934c8c0 3215 blk_start_request(creq);
1da177e4 3216
5c07a311 3217 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT
3218 spin_unlock_irq(q->queue_lock);
3219
3220 c->cmd_type = CMD_RWREQ;
3221 c->rq = creq;
7c832835
BH
3222
3223 /* fill in the request */
1da177e4 3224 drv = creq->rq_disk->private_data;
b028461d 3225 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM
3226 /* got command from pool, so use the command block index instead */
3227 /* for direct lookups. */
3228 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM
3229 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3230 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3231 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3232 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3233 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH
3234 c->Request.Type.Attribute = ATTR_SIMPLE;
3235 c->Request.Type.Direction =
a52de245 3236 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3237 c->Request.Timeout = 0; /* Don't time out */
7c832835 3238 c->Request.CDB[0] =
00988a35 3239 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3240 start_blk = blk_rq_pos(creq);
b2a4a43d 3241 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3242 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3243 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT
3244 seg = blk_rq_map_sg(q, creq, tmp_sg);
3245
7c832835 3246 /* get the DMA records for the setup */
1da177e4
LT
3247 if (c->Request.Type.Direction == XFER_READ)
3248 dir = PCI_DMA_FROMDEVICE;
3249 else
3250 dir = PCI_DMA_TODEVICE;
3251
5c07a311
DB
3252 curr_sg = c->SG;
3253 sg_index = 0;
3254 chained = 0;
3255
7c832835 3256 for (i = 0; i < seg; i++) {
5c07a311
DB
3257 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3258 !chained && ((seg - i) > 1)) {
5c07a311 3259 /* Point to next chain block. */
dccc9b56 3260 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB
3261 sg_index = 0;
3262 chained = 1;
3263 }
3264 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3265 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB
3266 tmp_sg[i].offset,
3267 tmp_sg[i].length, dir);
3268 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3269 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3270 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3271 ++sg_index;
1da177e4 3272 }
d45033ef
SC
3273 if (chained)
3274 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3275 (seg - (h->max_cmd_sgentries - 1)) *
3276 sizeof(SGDescriptor_struct));
5c07a311 3277
7c832835
BH
3278 /* track how many SG entries we are using */
3279 if (seg > h->maxSG)
3280 h->maxSG = seg;
1da177e4 3281
b2a4a43d 3282 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB
3283 "chained[%d]\n",
3284 blk_rq_sectors(creq), seg, chained);
1da177e4 3285
5e216153
MM
3286 c->Header.SGTotal = seg + chained;
3287 if (seg <= h->max_cmd_sgentries)
3288 c->Header.SGList = c->Header.SGTotal;
3289 else
5c07a311 3290 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3291 set_performant_mode(h, c);
5c07a311 3292
33659ebb 3293 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD
3294 if(h->cciss_read == CCISS_READ_10) {
3295 c->Request.CDB[1] = 0;
b028461d 3296 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD
3297 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3298 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3299 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3300 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH
3301 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3302 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD
3303 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3304 } else {
582539e5
RD
3305 u32 upper32 = upper_32_bits(start_blk);
3306
03bbfee5
MMOD
3307 c->Request.CDBLen = 16;
3308 c->Request.CDB[1]= 0;
b028461d 3309 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD
3310 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3311 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3312 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD
3313 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3314 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3315 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3316 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH
3317 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3318 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3319 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3320 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD
3321 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3322 }
33659ebb 3323 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD
3324 c->Request.CDBLen = creq->cmd_len;
3325 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3326 } else {
b2a4a43d
SC
3327 dev_warn(&h->pdev->dev, "bad request type %d\n",
3328 creq->cmd_type);
03bbfee5 3329 BUG();
00988a35 3330 }
1da177e4
LT
3331
3332 spin_lock_irq(q->queue_lock);
3333
8a3173de 3334 addQ(&h->reqQ, c);
1da177e4 3335 h->Qdepth++;
7c832835
BH
3336 if (h->Qdepth > h->maxQsinceinit)
3337 h->maxQsinceinit = h->Qdepth;
1da177e4
LT
3338
3339 goto queue;
00988a35 3340full:
1da177e4 3341 blk_stop_queue(q);
00988a35 3342startio:
1da177e4
LT
3343 /* We will already have the driver lock here so not need
3344 * to lock it.
7c832835 3345 */
1da177e4
LT
3346 start_io(h);
3347}
3348
3da8b713 3349static inline unsigned long get_next_completion(ctlr_info_t *h)
3350{
3da8b713 3351 return h->access.command_completed(h);
3da8b713 3352}
3353
3354static inline int interrupt_pending(ctlr_info_t *h)
3355{
3da8b713 3356 return h->access.intr_pending(h);
3da8b713 3357}
3358
3359static inline long interrupt_not_for_us(ctlr_info_t *h)
3360{
81125860 3361 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3362 (h->interrupts_enabled == 0));
3da8b713 3363}
3364
0c2b3908
MM
3365static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3366 u32 raw_tag)
1da177e4 3367{
0c2b3908
MM
3368 if (unlikely(tag_index >= h->nr_cmds)) {
3369 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3370 return 1;
3371 }
3372 return 0;
3373}
3374
3375static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3376 u32 raw_tag)
3377{
3378 removeQ(c);
3379 if (likely(c->cmd_type == CMD_RWREQ))
3380 complete_command(h, c, 0);
3381 else if (c->cmd_type == CMD_IOCTL_PEND)
3382 complete(c->waiting);
3383#ifdef CONFIG_CISS_SCSI_TAPE
3384 else if (c->cmd_type == CMD_SCSI)
3385 complete_scsi_command(c, 0, raw_tag);
3386#endif
3387}
3388
29979a71
MM
3389static inline u32 next_command(ctlr_info_t *h)
3390{
3391 u32 a;
3392
3393 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3394 return h->access.command_completed(h);
3395
3396 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3397 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3398 (h->reply_pool_head)++;
3399 h->commands_outstanding--;
3400 } else {
3401 a = FIFO_EMPTY;
3402 }
3403 /* Check for wraparound */
3404 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3405 h->reply_pool_head = h->reply_pool;
3406 h->reply_pool_wraparound ^= 1;
3407 }
3408 return a;
3409}
3410
0c2b3908
MM
3411/* process completion of an indexed ("direct lookup") command */
3412static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3413{
3414 u32 tag_index;
1da177e4 3415 CommandList_struct *c;
0c2b3908
MM
3416
3417 tag_index = cciss_tag_to_index(raw_tag);
3418 if (bad_tag(h, tag_index, raw_tag))
5e216153 3419 return next_command(h);
0c2b3908
MM
3420 c = h->cmd_pool + tag_index;
3421 finish_cmd(h, c, raw_tag);
5e216153 3422 return next_command(h);
0c2b3908
MM
3423}
3424
3425/* process completion of a non-indexed command */
3426static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3427{
3428 u32 tag;
3429 CommandList_struct *c = NULL;
3430 struct hlist_node *tmp;
3431 __u32 busaddr_masked, tag_masked;
3432
3433 tag = cciss_tag_discard_error_bits(raw_tag);
3434 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3435 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3436 tag_masked = cciss_tag_discard_error_bits(tag);
3437 if (busaddr_masked == tag_masked) {
3438 finish_cmd(h, c, raw_tag);
5e216153 3439 return next_command(h);
0c2b3908
MM
3440 }
3441 }
3442 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3443 return next_command(h);
0c2b3908
MM
3444}
3445
3446static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3447{
3448 ctlr_info_t *h = dev_id;
1da177e4 3449 unsigned long flags;
0c2b3908 3450 u32 raw_tag;
1da177e4 3451
3da8b713 3452 if (interrupt_not_for_us(h))
1da177e4 3453 return IRQ_NONE;
f70dba83 3454 spin_lock_irqsave(&h->lock, flags);
3da8b713 3455 while (interrupt_pending(h)) {
0c2b3908
MM
3456 raw_tag = get_next_completion(h);
3457 while (raw_tag != FIFO_EMPTY) {
3458 if (cciss_tag_contains_index(raw_tag))
3459 raw_tag = process_indexed_cmd(h, raw_tag);
3460 else
3461 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT
3462 }
3463 }
f70dba83 3464 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM
3465 return IRQ_HANDLED;
3466}
1da177e4 3467
0c2b3908
MM
3468/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3469 * check the interrupt pending register because it is not set.
3470 */
3471static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3472{
3473 ctlr_info_t *h = dev_id;
3474 unsigned long flags;
3475 u32 raw_tag;
8a3173de 3476
f70dba83 3477 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM
3478 raw_tag = get_next_completion(h);
3479 while (raw_tag != FIFO_EMPTY) {
3480 if (cciss_tag_contains_index(raw_tag))
3481 raw_tag = process_indexed_cmd(h, raw_tag);
3482 else
3483 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3484 }
f70dba83 3485 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT
3486 return IRQ_HANDLED;
3487}
7c832835 3488
b368c9dd
AP
3489/**
3490 * add_to_scan_list() - add controller to rescan queue
3491 * @h: Pointer to the controller.
3492 *
3493 * Adds the controller to the rescan queue if not already on the queue.
3494 *
3495 * returns 1 if added to the queue, 0 if skipped (could be on the
3496 * queue already, or the controller could be initializing or shutting
3497 * down).
3498 **/
3499static int add_to_scan_list(struct ctlr_info *h)
3500{
3501 struct ctlr_info *test_h;
3502 int found = 0;
3503 int ret = 0;
3504
3505 if (h->busy_initializing)
3506 return 0;
3507
3508 if (!mutex_trylock(&h->busy_shutting_down))
3509 return 0;
3510
3511 mutex_lock(&scan_mutex);
3512 list_for_each_entry(test_h, &scan_q, scan_list) {
3513 if (test_h == h) {
3514 found = 1;
3515 break;
3516 }
3517 }
3518 if (!found && !h->busy_scanning) {
3519 INIT_COMPLETION(h->scan_wait);
3520 list_add_tail(&h->scan_list, &scan_q);
3521 ret = 1;
3522 }
3523 mutex_unlock(&scan_mutex);
3524 mutex_unlock(&h->busy_shutting_down);
3525
3526 return ret;
3527}
3528
3529/**
3530 * remove_from_scan_list() - remove controller from rescan queue
3531 * @h: Pointer to the controller.
3532 *
3533 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC
3534 * the controller is currently conducting a rescan. The controller
3535 * can be in one of three states:
3536 * 1. Doesn't need a scan
3537 * 2. On the scan list, but not scanning yet (we remove it)
3538 * 3. Busy scanning (and not on the list). In this case we want to wait for
3539 * the scan to complete to make sure the scanning thread for this
3540 * controller is completely idle.
b368c9dd
AP
3541 **/
3542static void remove_from_scan_list(struct ctlr_info *h)
3543{
3544 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP
3545
3546 mutex_lock(&scan_mutex);
3547 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3548 if (test_h == h) { /* state 2. */
b368c9dd
AP
3549 list_del(&h->scan_list);
3550 complete_all(&h->scan_wait);
3551 mutex_unlock(&scan_mutex);
3552 return;
3553 }
3554 }
fd8489cf
SC
3555 if (h->busy_scanning) { /* state 3. */
3556 mutex_unlock(&scan_mutex);
b368c9dd 3557 wait_for_completion(&h->scan_wait);
fd8489cf
SC
3558 } else { /* state 1, nothing to do. */
3559 mutex_unlock(&scan_mutex);
3560 }
b368c9dd
AP
3561}
3562
3563/**
3564 * scan_thread() - kernel thread used to rescan controllers
3565 * @data: Ignored.
3566 *
3567 * A kernel thread used scan for drive topology changes on
3568 * controllers. The thread processes only one controller at a time
3569 * using a queue. Controllers are added to the queue using
3570 * add_to_scan_list() and removed from the queue either after done
3571 * processing or using remove_from_scan_list().
3572 *
3573 * returns 0.
3574 **/
0a9279cc
MM
3575static int scan_thread(void *data)
3576{
b368c9dd 3577 struct ctlr_info *h;
0a9279cc 3578
b368c9dd
AP
3579 while (1) {
3580 set_current_state(TASK_INTERRUPTIBLE);
3581 schedule();
0a9279cc
MM
3582 if (kthread_should_stop())
3583 break;
b368c9dd
AP
3584
3585 while (1) {
3586 mutex_lock(&scan_mutex);
3587 if (list_empty(&scan_q)) {
3588 mutex_unlock(&scan_mutex);
3589 break;
3590 }
3591
3592 h = list_entry(scan_q.next,
3593 struct ctlr_info,
3594 scan_list);
3595 list_del(&h->scan_list);
3596 h->busy_scanning = 1;
3597 mutex_unlock(&scan_mutex);
3598
d06dfbd2
SC
3599 rebuild_lun_table(h, 0, 0);
3600 complete_all(&h->scan_wait);
3601 mutex_lock(&scan_mutex);
3602 h->busy_scanning = 0;
3603 mutex_unlock(&scan_mutex);
b368c9dd 3604 }
0a9279cc 3605 }
b368c9dd 3606
0a9279cc
MM
3607 return 0;
3608}
3609
3610static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3611{
3612 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3613 return 0;
3614
3615 switch (c->err_info->SenseInfo[12]) {
3616 case STATE_CHANGED:
b2a4a43d
SC
3617 dev_warn(&h->pdev->dev, "a state change "
3618 "detected, command retried\n");
0a9279cc
MM
3619 return 1;
3620 break;
3621 case LUN_FAILED:
b2a4a43d
SC
3622 dev_warn(&h->pdev->dev, "LUN failure "
3623 "detected, action required\n");
0a9279cc
MM
3624 return 1;
3625 break;
3626 case REPORT_LUNS_CHANGED:
b2a4a43d 3627 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC
3628 /*
3629 * Here, we could call add_to_scan_list and wake up the scan thread,
3630 * except that it's quite likely that we will get more than one
3631 * REPORT_LUNS_CHANGED condition in quick succession, which means
3632 * that those which occur after the first one will likely happen
3633 * *during* the scan_thread's rescan. And the rescan code is not
3634 * robust enough to restart in the middle, undoing what it has already
3635 * done, and it's not clear that it's even possible to do this, since
3636 * part of what it does is notify the block layer, which starts
3637 * doing it's own i/o to read partition tables and so on, and the
3638 * driver doesn't have visibility to know what might need undoing.
3639 * In any event, if possible, it is horribly complicated to get right
3640 * so we just don't do it for now.
3641 *
3642 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3643 */
0a9279cc
MM
3644 return 1;
3645 break;
3646 case POWER_OR_RESET:
b2a4a43d
SC
3647 dev_warn(&h->pdev->dev,
3648 "a power on or device reset detected\n");
0a9279cc
MM
3649 return 1;
3650 break;
3651 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC
3652 dev_warn(&h->pdev->dev,
3653 "unit attention cleared by another initiator\n");
0a9279cc
MM
3654 return 1;
3655 break;
3656 default:
b2a4a43d
SC
3657 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3658 return 1;
0a9279cc
MM
3659 }
3660}
3661
7c832835 3662/*
d14c4ab5 3663 * We cannot read the structure directly, for portability we must use
1da177e4 3664 * the io functions.
7c832835 3665 * This is for debug only.
1da177e4 3666 */
b2a4a43d 3667static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT
3668{
3669 int i;
3670 char temp_name[17];
b2a4a43d 3671 CfgTable_struct *tb = h->cfgtable;
1da177e4 3672
b2a4a43d
SC
3673 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3674 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3675 for (i = 0; i < 4; i++)
1da177e4 3676 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3677 temp_name[4] = '\0';
b2a4a43d
SC
3678 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3679 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3680 readl(&(tb->SpecValence)));
3681 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3682 readl(&(tb->TransportSupport)));
b2a4a43d 3683 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3684 readl(&(tb->TransportActive)));
b2a4a43d 3685 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3686 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3687 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3688 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3689 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3690 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3691 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3692 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC
3693 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3694 readl(&(tb->BusTypes)));
7c832835 3695 for (i = 0; i < 16; i++)
1da177e4
LT
3696 temp_name[i] = readb(&(tb->ServerName[i]));
3697 temp_name[16] = '\0';
b2a4a43d
SC
3698 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3699 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3700 readl(&(tb->HeartBeat)));
1da177e4 3701}
1da177e4 3702
7c832835 3703static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT
3704{
3705 int i, offset, mem_type, bar_type;
7c832835 3706 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT
3707 return 0;
3708 offset = 0;
7c832835
BH
3709 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3710 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT
3711 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3712 offset += 4;
3713 else {
3714 mem_type = pci_resource_flags(pdev, i) &
7c832835 3715 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3716 switch (mem_type) {
7c832835
BH
3717 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3718 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3719 offset += 4; /* 32 bit */
3720 break;
3721 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3722 offset += 8;
3723 break;
3724 default: /* reserved in PCI 2.2 */
b2a4a43d 3725 dev_warn(&pdev->dev,
7c832835
BH
3726 "Base address is invalid\n");
3727 return -1;
1da177e4
LT
3728 break;
3729 }
3730 }
7c832835
BH
3731 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3732 return i + 1;
1da177e4
LT
3733 }
3734 return -1;
3735}
3736
5e216153
MM
3737/* Fill in bucket_map[], given nsgs (the max number of
3738 * scatter gather elements supported) and bucket[],
3739 * which is an array of 8 integers. The bucket[] array
3740 * contains 8 different DMA transfer sizes (in 16
3741 * byte increments) which the controller uses to fetch
3742 * commands. This function fills in bucket_map[], which
3743 * maps a given number of scatter gather elements to one of
3744 * the 8 DMA transfer sizes. The point of it is to allow the
3745 * controller to only do as much DMA as needed to fetch the
3746 * command, with the DMA transfer size encoded in the lower
3747 * bits of the command address.
3748 */
3749static void calc_bucket_map(int bucket[], int num_buckets,
3750 int nsgs, int *bucket_map)
3751{
3752 int i, j, b, size;
3753
3754 /* even a command with 0 SGs requires 4 blocks */
3755#define MINIMUM_TRANSFER_BLOCKS 4
3756#define NUM_BUCKETS 8
3757 /* Note, bucket_map must have nsgs+1 entries. */
3758 for (i = 0; i <= nsgs; i++) {
3759 /* Compute size of a command with i SG entries */
3760 size = i + MINIMUM_TRANSFER_BLOCKS;
3761 b = num_buckets; /* Assume the biggest bucket */
3762 /* Find the bucket that is just big enough */
3763 for (j = 0; j < 8; j++) {
3764 if (bucket[j] >= size) {
3765 b = j;
3766 break;
3767 }
3768 }
3769 /* for a command with i SG entries, use bucket b. */
3770 bucket_map[i] = b;
3771 }
3772}
3773
0f8a6a1e
SC
3774static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3775{
3776 int i;
3777
3778 /* under certain very rare conditions, this can take awhile.
3779 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3780 * as we enter this code.) */
3781 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3782 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3783 break;
3784 msleep(10);
3785 }
3786}
3787
b9933135
SC
3788static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3789{
3790 /* This is a bit complicated. There are 8 registers on
3791 * the controller which we write to to tell it 8 different
3792 * sizes of commands which there may be. It's a way of
3793 * reducing the DMA done to fetch each command. Encoded into
3794 * each command's tag are 3 bits which communicate to the controller
3795 * which of the eight sizes that command fits within. The size of
3796 * each command depends on how many scatter gather entries there are.
3797 * Each SG entry requires 16 bytes. The eight registers are programmed
3798 * with the number of 16-byte blocks a command of that size requires.
3799 * The smallest command possible requires 5 such 16 byte blocks.
3800 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3801 * blocks. Note, this only extends to the SG entries contained
3802 * within the command block, and does not extend to chained blocks
3803 * of SG elements. bft[] contains the eight values we write to
3804 * the registers. They are not evenly distributed, but have more
3805 * sizes for small commands, and fewer sizes for larger commands.
3806 */
5e216153 3807 __u32 trans_offset;
b9933135 3808 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM
3809 /*
3810 * 5 = 1 s/g entry or 4k
3811 * 6 = 2 s/g entry or 8k
3812 * 8 = 4 s/g entry or 16k
3813 * 10 = 6 s/g entry or 24k
3814 */
5e216153 3815 unsigned long register_value;
5e216153
MM
3816 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3817
5e216153
MM
3818 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3819
3820 /* Controller spec: zero out this buffer. */
3821 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3822 h->reply_pool_head = h->reply_pool;
3823
3824 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3825 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3826 h->blockFetchTable);
3827 writel(bft[0], &h->transtable->BlockFetch0);
3828 writel(bft[1], &h->transtable->BlockFetch1);
3829 writel(bft[2], &h->transtable->BlockFetch2);
3830 writel(bft[3], &h->transtable->BlockFetch3);
3831 writel(bft[4], &h->transtable->BlockFetch4);
3832 writel(bft[5], &h->transtable->BlockFetch5);
3833 writel(bft[6], &h->transtable->BlockFetch6);
3834 writel(bft[7], &h->transtable->BlockFetch7);
3835
3836 /* size of controller ring buffer */
3837 writel(h->max_commands, &h->transtable->RepQSize);
3838 writel(1, &h->transtable->RepQCount);
3839 writel(0, &h->transtable->RepQCtrAddrLow32);
3840 writel(0, &h->transtable->RepQCtrAddrHigh32);
3841 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3842 writel(0, &h->transtable->RepQAddr0High32);
3843 writel(CFGTBL_Trans_Performant,
3844 &(h->cfgtable->HostWrite.TransportRequest));
3845
5e216153 3846 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3847 cciss_wait_for_mode_change_ack(h);
5e216153 3848 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3849 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3850 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3851 " performant mode\n");
b9933135
SC
3852}
3853
3854static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3855{
3856 __u32 trans_support;
3857
3858 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3859 /* Attempt to put controller into performant mode if supported */
3860 /* Does board support performant mode? */
3861 trans_support = readl(&(h->cfgtable->TransportSupport));
3862 if (!(trans_support & PERFORMANT_MODE))
3863 return;
3864
b2a4a43d 3865 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC
3866 /* Performant mode demands commands on a 32 byte boundary
3867 * pci_alloc_consistent aligns on page boundarys already.
3868 * Just need to check if divisible by 32
3869 */
3870 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3871 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC
3872 "cciss info: command size[",
3873 (int)sizeof(CommandList_struct),
3874 "] not divisible by 32, no performant mode..\n");
5e216153
MM
3875 return;
3876 }
3877
b9933135
SC
3878 /* Performant mode ring buffer and supporting data structures */
3879 h->reply_pool = (__u64 *)pci_alloc_consistent(
3880 h->pdev, h->max_commands * sizeof(__u64),
3881 &(h->reply_pool_dhandle));
3882
3883 /* Need a block fetch table for performant mode */
3884 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3885 sizeof(__u32)), GFP_KERNEL);
3886
3887 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3888 goto clean_up;
3889
3890 cciss_enter_performant_mode(h);
3891
5e216153
MM
3892 /* Change the access methods to the performant access methods */
3893 h->access = SA5_performant_access;
b9933135 3894 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM
3895
3896 return;
3897clean_up:
3898 kfree(h->blockFetchTable);
3899 if (h->reply_pool)
3900 pci_free_consistent(h->pdev,
3901 h->max_commands * sizeof(__u64),
3902 h->reply_pool,
3903 h->reply_pool_dhandle);
3904 return;
3905
3906} /* cciss_put_controller_into_performant_mode */
3907
fb86a35b
MM
3908/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3909 * controllers that are capable. If not, we use IO-APIC mode.
3910 */
3911
f70dba83 3912static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM
3913{
3914#ifdef CONFIG_PCI_MSI
7c832835
BH
3915 int err;
3916 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3917 {0, 2}, {0, 3}
3918 };
fb86a35b
MM
3919
3920 /* Some boards advertise MSI but don't really support it */
f70dba83
SC
3921 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3922 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM
3923 goto default_int_mode;
3924
f70dba83
SC
3925 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3926 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3927 if (!err) {
f70dba83
SC
3928 h->intr[0] = cciss_msix_entries[0].vector;
3929 h->intr[1] = cciss_msix_entries[1].vector;
3930 h->intr[2] = cciss_msix_entries[2].vector;
3931 h->intr[3] = cciss_msix_entries[3].vector;
3932 h->msix_vector = 1;
7c832835
BH
3933 return;
3934 }
3935 if (err > 0) {
b2a4a43d
SC
3936 dev_warn(&h->pdev->dev,
3937 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3938 goto default_int_mode;
7c832835 3939 } else {
b2a4a43d
SC
3940 dev_warn(&h->pdev->dev,
3941 "MSI-X init failed %d\n", err);
1ecb9c0f 3942 goto default_int_mode;
7c832835
BH
3943 }
3944 }
f70dba83
SC
3945 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3946 if (!pci_enable_msi(h->pdev))
3947 h->msi_vector = 1;
3948 else
b2a4a43d 3949 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3950 }
1ecb9c0f 3951default_int_mode:
7c832835 3952#endif /* CONFIG_PCI_MSI */
fb86a35b 3953 /* if we get here we're going to use the default interrupt mode */
f70dba83 3954 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM
3955 return;
3956}
3957
6539fa9b 3958static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3959{
6539fa9b
SC
3960 int i;
3961 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC
3962
3963 subsystem_vendor_id = pdev->subsystem_vendor;
3964 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC
3965 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3966 subsystem_vendor_id;
2ec24ff1
SC
3967
3968 for (i = 0; i < ARRAY_SIZE(products); i++) {
3969 /* Stand aside for hpsa driver on request */
3970 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
3971 return -ENODEV;
6539fa9b
SC
3972 if (*board_id == products[i].board_id)
3973 return i;
2ec24ff1 3974 }
6539fa9b
SC
3975 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3976 *board_id);
3977 return -ENODEV;
3978}
1da177e4 3979
dd9c426e
SC
3980static inline bool cciss_board_disabled(ctlr_info_t *h)
3981{
3982 u16 command;
1da177e4 3983
dd9c426e
SC
3984 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
3985 return ((command & PCI_COMMAND_MEMORY) == 0);
3986}
1da177e4 3987
d474830d
SC
3988static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
3989 unsigned long *memory_bar)
3990{
3991 int i;
4e570309 3992
d474830d
SC
3993 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3994 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3995 /* addressing mode bits already removed */
3996 *memory_bar = pci_resource_start(pdev, i);
3997 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3998 *memory_bar);
3999 return 0;
4000 }
4001 dev_warn(&pdev->dev, "no memory BAR found\n");
4002 return -ENODEV;
4003}
1da177e4 4004
e99ba136
SC
4005static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4006{
4007 int i;
4008 u32 scratchpad;
1da177e4 4009
e99ba136
SC
4010 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
4011 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4012 if (scratchpad == CCISS_FIRMWARE_READY)
4013 return 0;
4014 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4015 }
e99ba136
SC
4016 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
4017 return -ENODEV;
4018}
e1438581 4019
8e93bf6d
SC
4020static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4021 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4022 u64 *cfg_offset)
4023{
4024 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4025 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4026 *cfg_base_addr &= (u32) 0x0000ffff;
4027 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4028 if (*cfg_base_addr_index == -1) {
4029 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4030 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4031 return -ENODEV;
4032 }
4033 return 0;
4034}
1da177e4 4035
4809d098
SC
4036static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4037{
4038 u64 cfg_offset;
4039 u32 cfg_base_addr;
4040 u64 cfg_base_addr_index;
4041 u32 trans_offset;
8e93bf6d 4042 int rc;
1da177e4 4043
8e93bf6d
SC
4044 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4045 &cfg_base_addr_index, &cfg_offset);
4046 if (rc)
4047 return rc;
4809d098 4048 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4049 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC
4050 if (!h->cfgtable)
4051 return -ENOMEM;
4052 /* Find performant mode table. */
8e93bf6d 4053 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC
4054 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4055 cfg_base_addr_index)+cfg_offset+trans_offset,
4056 sizeof(*h->transtable));
4057 if (!h->transtable)
4058 return -ENOMEM;
4059 return 0;
4060}
1da177e4 4061
adfbc1ff
SC
4062static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4063{
4064 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4065 if (h->max_commands < 16) {
4066 dev_warn(&h->pdev->dev, "Controller reports "
4067 "max supported commands of %d, an obvious lie. "
4068 "Using 16. Ensure that firmware is up to date.\n",
4069 h->max_commands);
4070 h->max_commands = 16;
1da177e4 4071 }
adfbc1ff 4072}
1da177e4 4073
afadbf4b
SC
4074/* Interrogate the hardware for some limits:
4075 * max commands, max SG elements without chaining, and with chaining,
4076 * SG chain block size, etc.
4077 */
4078static void __devinit cciss_find_board_params(ctlr_info_t *h)
4079{
adfbc1ff 4080 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC
4081 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4082 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4083 /*
afadbf4b 4084 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB
4085 * Howvever spec says if 0, use 31
4086 */
afadbf4b
SC
4087 h->max_cmd_sgentries = 31;
4088 if (h->maxsgentries > 512) {
4089 h->max_cmd_sgentries = 32;
4090 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4091 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4092 } else {
afadbf4b
SC
4093 h->maxsgentries = 31; /* default to traditional values */
4094 h->chainsize = 0;
5c07a311 4095 }
afadbf4b 4096}
5c07a311 4097
501b92cd
SC
4098static inline bool CISS_signature_present(ctlr_info_t *h)
4099{
4100 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4101 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4102 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4103 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4104 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4105 return false;
1da177e4 4106 }
501b92cd
SC
4107 return true;
4108}
4109
322e304c
SC
4110/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4111static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4112{
1da177e4 4113#ifdef CONFIG_X86
322e304c
SC
4114 u32 prefetch;
4115
4116 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4117 prefetch |= 0x100;
4118 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4119#endif
322e304c 4120}
1da177e4 4121
bfd63ee5
SC
4122/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4123 * in a prefetch beyond physical memory.
4124 */
4125static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4126{
4127 u32 dma_prefetch;
4128 __u32 dma_refetch;
4129
4130 if (h->board_id != 0x3225103C)
4131 return;
4132 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4133 dma_prefetch |= 0x8000;
4134 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4135 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4136 dma_refetch |= 0x1;
4137 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4138}
4139
f70dba83 4140static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4141{
4809d098 4142 int prod_index, err;
6539fa9b 4143
f70dba83 4144 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4145 if (prod_index < 0)
2ec24ff1 4146 return -ENODEV;
f70dba83
SC
4147 h->product_name = products[prod_index].product_name;
4148 h->access = *(products[prod_index].access);
1da177e4 4149
f70dba83 4150 if (cciss_board_disabled(h)) {
b2a4a43d 4151 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4152 return -ENODEV;
1da177e4 4153 }
f70dba83 4154 err = pci_enable_device(h->pdev);
7c832835 4155 if (err) {
b2a4a43d 4156 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4157 return err;
f92e2f5f
MM
4158 }
4159
f70dba83 4160 err = pci_request_regions(h->pdev, "cciss");
4e570309 4161 if (err) {
b2a4a43d
SC
4162 dev_warn(&h->pdev->dev,
4163 "Cannot obtain PCI resources, aborting\n");
872225ca 4164 return err;
4e570309 4165 }
1da177e4 4166
b2a4a43d
SC
4167 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4168 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4169
fb86a35b
MM
4170/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4171 * else we use the IO-APIC interrupt assigned to us by system ROM.
4172 */
f70dba83
SC
4173 cciss_interrupt_mode(h);
4174 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4175 if (err)
e1438581 4176 goto err_out_free_res;
f70dba83
SC
4177 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4178 if (!h->vaddr) {
da550321
SC
4179 err = -ENOMEM;
4180 goto err_out_free_res;
7c832835 4181 }
f70dba83 4182 err = cciss_wait_for_board_ready(h);
e99ba136 4183 if (err)
4e570309 4184 goto err_out_free_res;
f70dba83 4185 err = cciss_find_cfgtables(h);
4809d098 4186 if (err)
4e570309 4187 goto err_out_free_res;
b2a4a43d 4188 print_cfg_table(h);
f70dba83 4189 cciss_find_board_params(h);
1da177e4 4190
f70dba83 4191 if (!CISS_signature_present(h)) {
c33ac89b 4192 err = -ENODEV;
4e570309 4193 goto err_out_free_res;
1da177e4 4194 }
f70dba83
SC
4195 cciss_enable_scsi_prefetch(h);
4196 cciss_p600_dma_prefetch_quirk(h);
4197 cciss_put_controller_into_performant_mode(h);
1da177e4
LT
4198 return 0;
4199
5faad620 4200err_out_free_res:
872225ca
MM
4201 /*
4202 * Deliberately omit pci_disable_device(): it does something nasty to
4203 * Smart Array controllers that pci_enable_device does not undo
4204 */
f70dba83
SC
4205 if (h->transtable)
4206 iounmap(h->transtable);
4207 if (h->cfgtable)
4208 iounmap(h->cfgtable);
4209 if (h->vaddr)
4210 iounmap(h->vaddr);
4211 pci_release_regions(h->pdev);
c33ac89b 4212 return err;
1da177e4
LT
4213}
4214
6ae5ce8e
MM
4215/* Function to find the first free pointer into our hba[] array
4216 * Returns -1 if no free entries are left.
7c832835 4217 */
b2a4a43d 4218static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4219{
799202cb 4220 int i;
1da177e4 4221
7c832835 4222 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4223 if (!hba[i]) {
f70dba83 4224 ctlr_info_t *h;
f2912a12 4225
f70dba83
SC
4226 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4227 if (!h)
1da177e4 4228 goto Enomem;
f70dba83 4229 hba[i] = h;
1da177e4
LT
4230 return i;
4231 }
4232 }
b2a4a43d 4233 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4234 " of %d controllers.\n", MAX_CTLR);
799202cb
MM
4235 return -1;
4236Enomem:
b2a4a43d 4237 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT
4238 return -1;
4239}
4240
f70dba83 4241static void free_hba(ctlr_info_t *h)
1da177e4 4242{
2c935593 4243 int i;
1da177e4 4244
f70dba83 4245 hba[h->ctlr] = NULL;
2c935593
SC
4246 for (i = 0; i < h->highest_lun + 1; i++)
4247 if (h->gendisk[i] != NULL)
4248 put_disk(h->gendisk[i]);
4249 kfree(h);
1da177e4
LT
4250}
4251
82eb03cf
CC
4252/* Send a message CDB to the firmware. */
4253static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4254{
4255 typedef struct {
4256 CommandListHeader_struct CommandHeader;
4257 RequestBlock_struct Request;
4258 ErrDescriptor_struct ErrorDescriptor;
4259 } Command;
4260 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4261 Command *cmd;
4262 dma_addr_t paddr64;
4263 uint32_t paddr32, tag;
4264 void __iomem *vaddr;
4265 int i, err;
4266
4267 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4268 if (vaddr == NULL)
4269 return -ENOMEM;
4270
4271 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4272 CCISS commands, so they must be allocated from the lower 4GiB of
4273 memory. */
e930438c 4274 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC
4275 if (err) {
4276 iounmap(vaddr);
4277 return -ENOMEM;
4278 }
4279
4280 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4281 if (cmd == NULL) {
4282 iounmap(vaddr);
4283 return -ENOMEM;
4284 }
4285
4286 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4287 although there's no guarantee, we assume that the address is at
4288 least 4-byte aligned (most likely, it's page-aligned). */
4289 paddr32 = paddr64;
4290
4291 cmd->CommandHeader.ReplyQueue = 0;
4292 cmd->CommandHeader.SGList = 0;
4293 cmd->CommandHeader.SGTotal = 0;
4294 cmd->CommandHeader.Tag.lower = paddr32;
4295 cmd->CommandHeader.Tag.upper = 0;
4296 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4297
4298 cmd->Request.CDBLen = 16;
4299 cmd->Request.Type.Type = TYPE_MSG;
4300 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4301 cmd->Request.Type.Direction = XFER_NONE;
4302 cmd->Request.Timeout = 0; /* Don't time out */
4303 cmd->Request.CDB[0] = opcode;
4304 cmd->Request.CDB[1] = type;
4305 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4306
4307 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4308 cmd->ErrorDescriptor.Addr.upper = 0;
4309 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4310
4311 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4312
4313 for (i = 0; i < 10; i++) {
4314 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4315 if ((tag & ~3) == paddr32)
4316 break;
4317 schedule_timeout_uninterruptible(HZ);
4318 }
4319
4320 iounmap(vaddr);
4321
4322 /* we leak the DMA buffer here ... no choice since the controller could
4323 still complete the command. */
4324 if (i == 10) {
b2a4a43d
SC
4325 dev_err(&pdev->dev,
4326 "controller message %02x:%02x timed out\n",
82eb03cf
CC
4327 opcode, type);
4328 return -ETIMEDOUT;
4329 }
4330
4331 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4332
4333 if (tag & 2) {
b2a4a43d 4334 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC
4335 opcode, type);
4336 return -EIO;
4337 }
4338
b2a4a43d 4339 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC
4340 opcode, type);
4341 return 0;
4342}
4343
4344#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4345#define cciss_noop(p) cciss_message(p, 3, 0)
4346
4347static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4348{
4349/* the #defines are stolen from drivers/pci/msi.h. */
4350#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4351#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4352
4353 int pos;
4354 u16 control = 0;
4355
4356 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4357 if (pos) {
4358 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4359 if (control & PCI_MSI_FLAGS_ENABLE) {
b2a4a43d 4360 dev_info(&pdev->dev, "resetting MSI\n");
82eb03cf
CC
4361 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4362 }
4363 }
4364
4365 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4366 if (pos) {
4367 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4368 if (control & PCI_MSIX_FLAGS_ENABLE) {
b2a4a43d 4369 dev_info(&pdev->dev, "resetting MSI-X\n");
82eb03cf
CC
4370 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4371 }
4372 }
4373
4374 return 0;
4375}
4376
a6528d01
SC
4377static int cciss_controller_hard_reset(struct pci_dev *pdev,
4378 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4379{
a6528d01
SC
4380 u16 pmcsr;
4381 int pos;
82eb03cf 4382
a6528d01
SC
4383 if (use_doorbell) {
4384 /* For everything after the P600, the PCI power state method
4385 * of resetting the controller doesn't work, so we have this
4386 * other way using the doorbell register.
4387 */
4388 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4389 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4390 msleep(1000);
4391 } else { /* Try to do it the PCI power state way */
4392
4393 /* Quoting from the Open CISS Specification: "The Power
4394 * Management Control/Status Register (CSR) controls the power
4395 * state of the device. The normal operating state is D0,
4396 * CSR=00h. The software off state is D3, CSR=03h. To reset
4397 * the controller, place the interface device in D3 then to D0,
4398 * this causes a secondary PCI reset which will reset the
4399 * controller." */
4400
4401 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4402 if (pos == 0) {
4403 dev_err(&pdev->dev,
4404 "cciss_controller_hard_reset: "
4405 "PCI PM not supported\n");
4406 return -ENODEV;
4407 }
4408 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4409 /* enter the D3hot power management state */
4410 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4411 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4412 pmcsr |= PCI_D3hot;
4413 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4414
a6528d01 4415 msleep(500);
82eb03cf 4416
a6528d01
SC
4417 /* enter the D0 power management state */
4418 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4419 pmcsr |= PCI_D0;
4420 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4421
a6528d01
SC
4422 msleep(500);
4423 }
4424 return 0;
4425}
82eb03cf 4426
a6528d01
SC
4427/* This does a hard reset of the controller using PCI power management
4428 * states or using the doorbell register. */
4429static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4430{
4431 u16 saved_config_space[32];
4432 u64 cfg_offset;
4433 u32 cfg_base_addr;
4434 u64 cfg_base_addr_index;
4435 void __iomem *vaddr;
4436 unsigned long paddr;
4437 u32 misc_fw_support, active_transport;
4438 int rc, i;
4439 CfgTable_struct __iomem *cfgtable;
4440 bool use_doorbell;
058a0f9f 4441 u32 board_id;
a6528d01
SC
4442
4443 /* For controllers as old a the p600, this is very nearly
4444 * the same thing as
4445 *
4446 * pci_save_state(pci_dev);
4447 * pci_set_power_state(pci_dev, PCI_D3hot);
4448 * pci_set_power_state(pci_dev, PCI_D0);
4449 * pci_restore_state(pci_dev);
4450 *
4451 * but we can't use these nice canned kernel routines on
4452 * kexec, because they also check the MSI/MSI-X state in PCI
4453 * configuration space and do the wrong thing when it is
4454 * set/cleared. Also, the pci_save/restore_state functions
4455 * violate the ordering requirements for restoring the
4456 * configuration space from the CCISS document (see the
4457 * comment below). So we roll our own ....
4458 *
4459 * For controllers newer than the P600, the pci power state
4460 * method of resetting doesn't work so we have another way
4461 * using the doorbell register.
4462 */
82eb03cf 4463
058a0f9f
SC
4464 /* Exclude 640x boards. These are two pci devices in one slot
4465 * which share a battery backed cache module. One controls the
4466 * cache, the other accesses the cache through the one that controls
4467 * it. If we reset the one controlling the cache, the other will
4468 * likely not be happy. Just forbid resetting this conjoined mess.
4469 */
4470 cciss_lookup_board_id(pdev, &board_id);
4471 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4472 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4473 "due to shared cache module.");
82eb03cf
CC
4474 return -ENODEV;
4475 }
4476
82eb03cf
CC
4477 for (i = 0; i < 32; i++)
4478 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
82eb03cf 4479
a6528d01
SC
4480 /* find the first memory BAR, so we can find the cfg table */
4481 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4482 if (rc)
4483 return rc;
4484 vaddr = remap_pci_mem(paddr, 0x250);
4485 if (!vaddr)
4486 return -ENOMEM;
82eb03cf 4487
a6528d01
SC
4488 /* find cfgtable in order to check if reset via doorbell is supported */
4489 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4490 &cfg_base_addr_index, &cfg_offset);
4491 if (rc)
4492 goto unmap_vaddr;
4493 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4494 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4495 if (!cfgtable) {
4496 rc = -ENOMEM;
4497 goto unmap_vaddr;
4498 }
82eb03cf 4499
a6528d01
SC
4500 /* If reset via doorbell register is supported, use that. */
4501 misc_fw_support = readl(&cfgtable->misc_fw_support);
4502 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4503
a6528d01
SC
4504 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4505 if (rc)
4506 goto unmap_cfgtable;
82eb03cf
CC
4507
4508 /* Restore the PCI configuration space. The Open CISS
4509 * Specification says, "Restore the PCI Configuration
4510 * Registers, offsets 00h through 60h. It is important to
4511 * restore the command register, 16-bits at offset 04h,
4512 * last. Do not restore the configuration status register,
a6528d01
SC
4513 * 16-bits at offset 06h." Note that the offset is 2*i.
4514 */
82eb03cf
CC
4515 for (i = 0; i < 32; i++) {
4516 if (i == 2 || i == 3)
4517 continue;
4518 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4519 }
4520 wmb();
4521 pci_write_config_word(pdev, 4, saved_config_space[2]);
4522
a6528d01
SC
4523 /* Some devices (notably the HP Smart Array 5i Controller)
4524 need a little pause here */
4525 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4526
4527 /* Controller should be in simple mode at this point. If it's not,
4528 * It means we're on one of those controllers which doesn't support
4529 * the doorbell reset method and on which the PCI power management reset
4530 * method doesn't work (P800, for example.)
4531 * In those cases, don't try to proceed, as it generally doesn't work.
4532 */
4533 active_transport = readl(&cfgtable->TransportActive);
4534 if (active_transport & PERFORMANT_MODE) {
4535 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4536 " Ignoring controller.\n");
4537 rc = -ENODEV;
4538 }
4539
4540unmap_cfgtable:
4541 iounmap(cfgtable);
4542
4543unmap_vaddr:
4544 iounmap(vaddr);
4545 return rc;
82eb03cf
CC
4546}
4547
83123cb1
SC
4548static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4549{
a6528d01 4550 int rc, i;
83123cb1
SC
4551
4552 if (!reset_devices)
4553 return 0;
4554
a6528d01
SC
4555 /* Reset the controller with a PCI power-cycle or via doorbell */
4556 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4557
a6528d01
SC
4558 /* -ENOTSUPP here means we cannot reset the controller
4559 * but it's already (and still) up and running in
058a0f9f
SC
4560 * "performant mode". Or, it might be 640x, which can't reset
4561 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC
4562 */
4563 if (rc == -ENOTSUPP)
4564 return 0; /* just try to do the kdump anyhow. */
4565 if (rc)
4566 return -ENODEV;
4567 if (cciss_reset_msi(pdev))
4568 return -ENODEV;
83123cb1
SC
4569
4570 /* Now try to get the controller to respond to a no-op */
4571 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4572 if (cciss_noop(pdev) == 0)
4573 break;
4574 else
4575 dev_warn(&pdev->dev, "no-op failed%s\n",
4576 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4577 "; re-trying" : ""));
4578 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4579 }
82eb03cf
CC
4580 return 0;
4581}
4582
1da177e4
LT
4583/*
4584 * This is it. Find all the controllers and register them. I really hate
4585 * stealing all these major device numbers.
4586 * returns the number of block devices registered.
4587 */
4588static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4589 const struct pci_device_id *ent)
1da177e4 4590{
1da177e4 4591 int i;
799202cb 4592 int j = 0;
5c07a311 4593 int k = 0;
1da177e4 4594 int rc;
22bece00 4595 int dac, return_code;
212a5026 4596 InquiryData_struct *inq_buff;
f70dba83 4597 ctlr_info_t *h;
1da177e4 4598
83123cb1
SC
4599 rc = cciss_init_reset_devices(pdev);
4600 if (rc)
4601 return rc;
b2a4a43d 4602 i = alloc_cciss_hba(pdev);
7c832835 4603 if (i < 0)
e2019b58 4604 return -1;
1f8ef380 4605
f70dba83
SC
4606 h = hba[i];
4607 h->pdev = pdev;
4608 h->busy_initializing = 1;
4609 INIT_HLIST_HEAD(&h->cmpQ);
4610 INIT_HLIST_HEAD(&h->reqQ);
4611 mutex_init(&h->busy_shutting_down);
1f8ef380 4612
f70dba83 4613 if (cciss_pci_init(h) != 0)
2cfa948c 4614 goto clean_no_release_regions;
1da177e4 4615
f70dba83
SC
4616 sprintf(h->devname, "cciss%d", i);
4617 h->ctlr = i;
1da177e4 4618
f70dba83 4619 init_completion(&h->scan_wait);
b368c9dd 4620
f70dba83 4621 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP
4622 goto clean0;
4623
1da177e4 4624 /* configure PCI DMA stuff */
6a35528a 4625 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4626 dac = 1;
284901a9 4627 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4628 dac = 0;
1da177e4 4629 else {
b2a4a43d 4630 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT
4631 goto clean1;
4632 }
4633
4634 /*
4635 * register with the major number, or get a dynamic major number
4636 * by passing 0 as argument. This is done for greater than
4637 * 8 controller support.
4638 */
4639 if (i < MAX_CTLR_ORIG)
f70dba83
SC
4640 h->major = COMPAQ_CISS_MAJOR + i;
4641 rc = register_blkdev(h->major, h->devname);
7c832835 4642 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC
4643 dev_err(&h->pdev->dev,
4644 "Unable to get major number %d for %s "
f70dba83 4645 "on hba %d\n", h->major, h->devname, i);
1da177e4 4646 goto clean1;
7c832835 4647 } else {
1da177e4 4648 if (i >= MAX_CTLR_ORIG)
f70dba83 4649 h->major = rc;
1da177e4
LT
4650 }
4651
4652 /* make sure the board interrupts are off */
f70dba83
SC
4653 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4654 if (h->msi_vector || h->msix_vector) {
4655 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4656 do_cciss_msix_intr,
f70dba83 4657 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4658 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4659 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM
4660 goto clean2;
4661 }
4662 } else {
f70dba83
SC
4663 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4664 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4665 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4666 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM
4667 goto clean2;
4668 }
1da177e4 4669 }
40aabb58 4670
b2a4a43d 4671 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC
4672 h->devname, pdev->device, pci_name(pdev),
4673 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4674
f70dba83
SC
4675 h->cmd_pool_bits =
4676 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4677 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC
4678 h->cmd_pool = (CommandList_struct *)
4679 pci_alloc_consistent(h->pdev,
4680 h->nr_cmds * sizeof(CommandList_struct),
4681 &(h->cmd_pool_dhandle));
4682 h->errinfo_pool = (ErrorInfo_struct *)
4683 pci_alloc_consistent(h->pdev,
4684 h->nr_cmds * sizeof(ErrorInfo_struct),
4685 &(h->errinfo_pool_dhandle));
4686 if ((h->cmd_pool_bits == NULL)
4687 || (h->cmd_pool == NULL)
4688 || (h->errinfo_pool == NULL)) {
b2a4a43d 4689 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT
4690 goto clean4;
4691 }
5c07a311
DB
4692
4693 /* Need space for temp scatter list */
f70dba83 4694 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB
4695 sizeof(struct scatterlist *),
4696 GFP_KERNEL);
f70dba83
SC
4697 for (k = 0; k < h->nr_cmds; k++) {
4698 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4699 h->maxsgentries,
5c07a311 4700 GFP_KERNEL);
f70dba83 4701 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC
4702 dev_err(&h->pdev->dev,
4703 "could not allocate s/g lists\n");
5c07a311
DB
4704 goto clean4;
4705 }
4706 }
f70dba83
SC
4707 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4708 h->chainsize, h->nr_cmds);
4709 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4710 goto clean4;
5c07a311 4711
f70dba83 4712 spin_lock_init(&h->lock);
1da177e4 4713
7c832835 4714 /* Initialize the pdev driver private data.
f70dba83
SC
4715 have it point to h. */
4716 pci_set_drvdata(pdev, h);
7c832835
BH
4717 /* command and error info recs zeroed out before
4718 they are used */
f70dba83
SC
4719 memset(h->cmd_pool_bits, 0,
4720 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4721 * sizeof(unsigned long));
1da177e4 4722
f70dba83
SC
4723 h->num_luns = 0;
4724 h->highest_lun = -1;
6ae5ce8e 4725 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC
4726 h->drv[j] = NULL;
4727 h->gendisk[j] = NULL;
6ae5ce8e 4728 }
1da177e4 4729
f70dba83 4730 cciss_scsi_setup(h);
1da177e4
LT
4731
4732 /* Turn the interrupts on so we can service requests */
f70dba83 4733 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4734
22bece00
MM
4735 /* Get the firmware version */
4736 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4737 if (inq_buff == NULL) {
b2a4a43d 4738 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM
4739 goto clean4;
4740 }
4741
f70dba83 4742 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4743 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4744 if (return_code == IO_OK) {
f70dba83
SC
4745 h->firm_ver[0] = inq_buff->data_byte[32];
4746 h->firm_ver[1] = inq_buff->data_byte[33];
4747 h->firm_ver[2] = inq_buff->data_byte[34];
4748 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4749 } else { /* send command failed */
b2a4a43d 4750 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM
4751 " version of controller\n");
4752 }
212a5026 4753 kfree(inq_buff);
22bece00 4754
f70dba83 4755 cciss_procinit(h);
92c4231a 4756
f70dba83 4757 h->cciss_max_sectors = 8192;
92c4231a 4758
f70dba83
SC
4759 rebuild_lun_table(h, 1, 0);
4760 h->busy_initializing = 0;
e2019b58 4761 return 1;
1da177e4 4762
6ae5ce8e 4763clean4:
f70dba83 4764 kfree(h->cmd_pool_bits);
5c07a311 4765 /* Free up sg elements */
f70dba83
SC
4766 for (k = 0; k < h->nr_cmds; k++)
4767 kfree(h->scatter_list[k]);
4768 kfree(h->scatter_list);
4769 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4770 if (h->cmd_pool)
4771 pci_free_consistent(h->pdev,
4772 h->nr_cmds * sizeof(CommandList_struct),
4773 h->cmd_pool, h->cmd_pool_dhandle);
4774 if (h->errinfo_pool)
4775 pci_free_consistent(h->pdev,
4776 h->nr_cmds * sizeof(ErrorInfo_struct),
4777 h->errinfo_pool,
4778 h->errinfo_pool_dhandle);
4779 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4780clean2:
f70dba83 4781 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4782clean1:
f70dba83 4783 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4784clean0:
2cfa948c
SC
4785 pci_release_regions(pdev);
4786clean_no_release_regions:
f70dba83 4787 h->busy_initializing = 0;
9cef0d2f 4788
872225ca
MM
4789 /*
4790 * Deliberately omit pci_disable_device(): it does something nasty to
4791 * Smart Array controllers that pci_enable_device does not undo
4792 */
799202cb 4793 pci_set_drvdata(pdev, NULL);
f70dba83 4794 free_hba(h);
e2019b58 4795 return -1;
1da177e4
LT
4796}
4797
e9ca75b5 4798static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4799{
29009a03
SC
4800 ctlr_info_t *h;
4801 char *flush_buf;
7c832835 4802 int return_code;
1da177e4 4803
29009a03
SC
4804 h = pci_get_drvdata(pdev);
4805 flush_buf = kzalloc(4, GFP_KERNEL);
4806 if (!flush_buf) {
b2a4a43d 4807 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4808 return;
e9ca75b5 4809 }
29009a03
SC
4810 /* write all data in the battery backed cache to disk */
4811 memset(flush_buf, 0, 4);
f70dba83 4812 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC
4813 4, 0, CTLR_LUNID, TYPE_CMD);
4814 kfree(flush_buf);
4815 if (return_code != IO_OK)
b2a4a43d 4816 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4817 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4818 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB
4819}
4820
4821static void __devexit cciss_remove_one(struct pci_dev *pdev)
4822{
f70dba83 4823 ctlr_info_t *h;
e9ca75b5
GB
4824 int i, j;
4825
7c832835 4826 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4827 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT
4828 return;
4829 }
0a9279cc 4830
f70dba83
SC
4831 h = pci_get_drvdata(pdev);
4832 i = h->ctlr;
7c832835 4833 if (hba[i] == NULL) {
b2a4a43d 4834 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT
4835 return;
4836 }
b6550777 4837
f70dba83 4838 mutex_lock(&h->busy_shutting_down);
0a9279cc 4839
f70dba83
SC
4840 remove_from_scan_list(h);
4841 remove_proc_entry(h->devname, proc_cciss);
4842 unregister_blkdev(h->major, h->devname);
b6550777
BH
4843
4844 /* remove it from the disk list */
4845 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4846 struct gendisk *disk = h->gendisk[j];
b6550777 4847 if (disk) {
165125e1 4848 struct request_queue *q = disk->queue;
b6550777 4849
097d0264 4850 if (disk->flags & GENHD_FL_UP) {
f70dba83 4851 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4852 del_gendisk(disk);
097d0264 4853 }
b6550777
BH
4854 if (q)
4855 blk_cleanup_queue(q);
4856 }
4857 }
4858
ba198efb 4859#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4860 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4861#endif
b6550777 4862
e9ca75b5 4863 cciss_shutdown(pdev);
fb86a35b
MM
4864
4865#ifdef CONFIG_PCI_MSI
f70dba83
SC
4866 if (h->msix_vector)
4867 pci_disable_msix(h->pdev);
4868 else if (h->msi_vector)
4869 pci_disable_msi(h->pdev);
7c832835 4870#endif /* CONFIG_PCI_MSI */
fb86a35b 4871
f70dba83
SC
4872 iounmap(h->transtable);
4873 iounmap(h->cfgtable);
4874 iounmap(h->vaddr);
1da177e4 4875
f70dba83
SC
4876 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4877 h->cmd_pool, h->cmd_pool_dhandle);
4878 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4879 h->errinfo_pool, h->errinfo_pool_dhandle);
4880 kfree(h->cmd_pool_bits);
5c07a311 4881 /* Free up sg elements */
f70dba83
SC
4882 for (j = 0; j < h->nr_cmds; j++)
4883 kfree(h->scatter_list[j]);
4884 kfree(h->scatter_list);
4885 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM
4886 /*
4887 * Deliberately omit pci_disable_device(): it does something nasty to
4888 * Smart Array controllers that pci_enable_device does not undo
4889 */
7c832835 4890 pci_release_regions(pdev);
4e570309 4891 pci_set_drvdata(pdev, NULL);
f70dba83
SC
4892 cciss_destroy_hba_sysfs_entry(h);
4893 mutex_unlock(&h->busy_shutting_down);
4894 free_hba(h);
7c832835 4895}
1da177e4
LT
4896
4897static struct pci_driver cciss_pci_driver = {
7c832835
BH
4898 .name = "cciss",
4899 .probe = cciss_init_one,
4900 .remove = __devexit_p(cciss_remove_one),
4901 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4902 .shutdown = cciss_shutdown,
1da177e4
LT
4903};
4904
4905/*
4906 * This is it. Register the PCI driver information for the cards we control
7c832835 4907 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT
4908 */
4909static int __init cciss_init(void)
4910{
7fe06326
AP
4911 int err;
4912
10cbda97
JA
4913 /*
4914 * The hardware requires that commands are aligned on a 64-bit
4915 * boundary. Given that we use pci_alloc_consistent() to allocate an
4916 * array of them, the size must be a multiple of 8 bytes.
4917 */
1b7d0d28 4918 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT
4919 printk(KERN_INFO DRIVER_NAME "\n");
4920
7fe06326
AP
4921 err = bus_register(&cciss_bus_type);
4922 if (err)
4923 return err;
4924
b368c9dd
AP
4925 /* Start the scan thread */
4926 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4927 if (IS_ERR(cciss_scan_thread)) {
4928 err = PTR_ERR(cciss_scan_thread);
4929 goto err_bus_unregister;
4930 }
4931
1da177e4 4932 /* Register for our PCI devices */
7fe06326
AP
4933 err = pci_register_driver(&cciss_pci_driver);
4934 if (err)
b368c9dd 4935 goto err_thread_stop;
7fe06326 4936
617e1344 4937 return err;
7fe06326 4938
b368c9dd
AP
4939err_thread_stop:
4940 kthread_stop(cciss_scan_thread);
4941err_bus_unregister:
7fe06326 4942 bus_unregister(&cciss_bus_type);
b368c9dd 4943
7fe06326 4944 return err;
1da177e4
LT
4945}
4946
4947static void __exit cciss_cleanup(void)
4948{
4949 int i;
4950
4951 pci_unregister_driver(&cciss_pci_driver);
4952 /* double check that all controller entrys have been removed */
7c832835
BH
4953 for (i = 0; i < MAX_CTLR; i++) {
4954 if (hba[i] != NULL) {
b2a4a43d
SC
4955 dev_warn(&hba[i]->pdev->dev,
4956 "had to remove controller\n");
1da177e4
LT
4957 cciss_remove_one(hba[i]->pdev);
4958 }
4959 }
b368c9dd 4960 kthread_stop(cciss_scan_thread);
928b4d8c 4961 remove_proc_entry("driver/cciss", NULL);
7fe06326 4962 bus_unregister(&cciss_bus_type);
1da177e4
LT
4963}
4964
4965module_init(cciss_init);
4966module_exit(cciss_cleanup);
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