[deliverable/linux.git] / drivers / block / cciss.h

#ifndef CCISS_H
#define CCISS_H

#include <linux/genhd.h>

#include "cciss_cmd.h"


#define NWD_SHIFT	4
#define MAX_PART	(1 << NWD_SHIFT)

#define IO_OK		0
#define IO_ERROR	1

#define VENDOR_LEN	8
#define MODEL_LEN	16
#define REV_LEN		4

struct ctlr_info;
typedef struct ctlr_info ctlr_info_t;

struct access_method {
	void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
	void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
	unsigned long (*fifo_full)(ctlr_info_t *h);
	unsigned long (*intr_pending)(ctlr_info_t *h);
	unsigned long (*command_completed)(ctlr_info_t *h);
};
typedef struct _drive_info_struct
{
 	__u32   LunID;	
	int 	usage_count;
	struct request_queue *queue;
	sector_t nr_blocks;
	int	block_size;
	int 	heads;
	int	sectors;
	int 	cylinders;
	int	raid_level; /* set to -1 to indicate that
			     * the drive is not in use/configured
			     */
	int	busy_configuring; /* This is set when a drive is being removed
				   * to prevent it from being opened or it's
				   * queue from being started.
				   */
	struct	device dev;
	__u8 serial_no[16]; /* from inquiry page 0x83,
			     * not necc. null terminated.
			     */
	char vendor[VENDOR_LEN + 1]; /* SCSI vendor string */
	char model[MODEL_LEN + 1];   /* SCSI model string */
	char rev[REV_LEN + 1];       /* SCSI revision string */
} drive_info_struct;

#ifdef CONFIG_CISS_SCSI_TAPE

struct sendcmd_reject_list {
	int ncompletions;
	unsigned long *complete; /* array of NR_CMDS tags */
};

#endif
struct ctlr_info 
{
	int	ctlr;
	char	devname[8];
	char    *product_name;
	char	firm_ver[4]; // Firmware version 
	struct pci_dev *pdev;
	__u32	board_id;
	void __iomem *vaddr;
	unsigned long paddr;
	int 	nr_cmds; /* Number of commands allowed on this controller */
	CfgTable_struct __iomem *cfgtable;
	int	interrupts_enabled;
	int	major;
	int 	max_commands;
	int	commands_outstanding;
	int 	max_outstanding; /* Debug */ 
	int	num_luns;
	int 	highest_lun;
	int	usage_count;  /* number of opens all all minor devices */
#	define DOORBELL_INT	0
#	define PERF_MODE_INT	1
#	define SIMPLE_MODE_INT	2
#	define MEMQ_MODE_INT	3
	unsigned int intr[4];
	unsigned int msix_vector;
	unsigned int msi_vector;
	int 	cciss_max_sectors;
	BYTE	cciss_read;
	BYTE	cciss_write;
	BYTE	cciss_read_capacity;

	// information about each logical volume
	drive_info_struct drv[CISS_MAX_LUN];

	struct access_method access;

	/* queue and queue Info */ 
	struct hlist_head reqQ;
	struct hlist_head cmpQ;
	unsigned int Qdepth;
	unsigned int maxQsinceinit;
	unsigned int maxSG;
	spinlock_t lock;

	//* pointers to command and error info pool */ 
	CommandList_struct 	*cmd_pool;
	dma_addr_t		cmd_pool_dhandle; 
	ErrorInfo_struct 	*errinfo_pool;
	dma_addr_t		errinfo_pool_dhandle; 
        unsigned long  		*cmd_pool_bits;
	int			nr_allocs;
	int			nr_frees; 
	int			busy_configuring;
	int			busy_initializing;

	/* This element holds the zero based queue number of the last
	 * queue to be started.  It is used for fairness.
	*/
	int			next_to_run;

	// Disk structures we need to pass back
	struct gendisk   *gendisk[CISS_MAX_LUN];
#ifdef CONFIG_CISS_SCSI_TAPE
	void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
	/* list of block side commands the scsi error handling sucked up */
	/* and saved for later processing */
	struct sendcmd_reject_list scsi_rejects;
#endif
	unsigned char alive;
	struct completion *rescan_wait;
	struct task_struct *cciss_scan_thread;
	struct device dev;
};

/*  Defining the diffent access_menthods */
/*
 * Memory mapped FIFO interface (SMART 53xx cards)
 */
#define SA5_DOORBELL	0x20
#define SA5_REQUEST_PORT_OFFSET	0x40
#define SA5_REPLY_INTR_MASK_OFFSET	0x34
#define SA5_REPLY_PORT_OFFSET		0x44
#define SA5_INTR_STATUS		0x30
#define SA5_SCRATCHPAD_OFFSET	0xB0

#define SA5_CTCFG_OFFSET	0xB4
#define SA5_CTMEM_OFFSET	0xB8

#define SA5_INTR_OFF		0x08
#define SA5B_INTR_OFF		0x04
#define SA5_INTR_PENDING	0x08
#define SA5B_INTR_PENDING	0x04
#define FIFO_EMPTY		0xffffffff	
#define CCISS_FIRMWARE_READY	0xffff0000 /* value in scratchpad register */

#define  CISS_ERROR_BIT		0x02

#define CCISS_INTR_ON 	1 
#define CCISS_INTR_OFF	0
/* 
	Send the command to the hardware 
*/
static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c) 
{
#ifdef CCISS_DEBUG
	 printk("Sending %x - down to controller\n", c->busaddr );
#endif /* CCISS_DEBUG */ 
         writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
	 h->commands_outstanding++;
	 if ( h->commands_outstanding > h->max_outstanding)
		h->max_outstanding = h->commands_outstanding;
}

/*  
 *  This card is the opposite of the other cards.  
 *   0 turns interrupts on... 
 *   0x08 turns them off... 
 */
static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
{
	if (val) 
	{ /* Turn interrupts on */
		h->interrupts_enabled = 1;
		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	} else /* Turn them off */
	{
		h->interrupts_enabled = 0;
        	writel( SA5_INTR_OFF, 
			h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	}
}
/*
 *  This card is the opposite of the other cards.
 *   0 turns interrupts on...
 *   0x04 turns them off...
 */
static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
{
        if (val)
        { /* Turn interrupts on */
		h->interrupts_enabled = 1;
                writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        } else /* Turn them off */
        {
		h->interrupts_enabled = 0;
                writel( SA5B_INTR_OFF,
                        h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        }
}
/*
 *  Returns true if fifo is full.  
 * 
 */ 
static unsigned long SA5_fifo_full(ctlr_info_t *h)
{
	if( h->commands_outstanding >= h->max_commands)
		return(1);
	else 
		return(0);

}
/* 
 *   returns value read from hardware. 
 *     returns FIFO_EMPTY if there is nothing to read 
 */ 
static unsigned long SA5_completed(ctlr_info_t *h)
{
	unsigned long register_value 
		= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
	if(register_value != FIFO_EMPTY)
	{
		h->commands_outstanding--;
#ifdef CCISS_DEBUG
		printk("cciss:  Read %lx back from board\n", register_value);
#endif /* CCISS_DEBUG */ 
	} 
#ifdef CCISS_DEBUG
	else
	{
		printk("cciss:  FIFO Empty read\n");
	}
#endif 
	return ( register_value); 

}
/*
 *	Returns true if an interrupt is pending.. 
 */
static unsigned long SA5_intr_pending(ctlr_info_t *h)
{
	unsigned long register_value  = 
		readl(h->vaddr + SA5_INTR_STATUS);
#ifdef CCISS_DEBUG
	printk("cciss: intr_pending %lx\n", register_value);
#endif  /* CCISS_DEBUG */
	if( register_value &  SA5_INTR_PENDING) 
		return  1;	
	return 0 ;
}

/*
 *      Returns true if an interrupt is pending..
 */
static unsigned long SA5B_intr_pending(ctlr_info_t *h)
{
        unsigned long register_value  =
                readl(h->vaddr + SA5_INTR_STATUS);
#ifdef CCISS_DEBUG
        printk("cciss: intr_pending %lx\n", register_value);
#endif  /* CCISS_DEBUG */
        if( register_value &  SA5B_INTR_PENDING)
                return  1;
        return 0 ;
}


static struct access_method SA5_access = {
	SA5_submit_command,
	SA5_intr_mask,
	SA5_fifo_full,
	SA5_intr_pending,
	SA5_completed,
};

static struct access_method SA5B_access = {
        SA5_submit_command,
        SA5B_intr_mask,
        SA5_fifo_full,
        SA5B_intr_pending,
        SA5_completed,
};

struct board_type {
	__u32	board_id;
	char	*product_name;
	struct access_method *access;
	int nr_cmds; /* Max cmds this kind of ctlr can handle. */
};

#define CCISS_LOCK(i)	(&hba[i]->lock)

#endif /* CCISS_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef CCISS_H
	2	#define CCISS_H
	3
	4	#include <linux/genhd.h>
	5
	6	#include "cciss_cmd.h"
	7
	8
1da177e4 LT	9	#define NWD_SHIFT 4
	10	#define MAX_PART (1 << NWD_SHIFT)
	11
	12	#define IO_OK 0
	13	#define IO_ERROR 1
	14
7fe06326 AP	15	#define VENDOR_LEN 8
	16	#define MODEL_LEN 16
	17	#define REV_LEN 4
	18
1da177e4 LT	19	struct ctlr_info;
	20	typedef struct ctlr_info ctlr_info_t;
	21
	22	struct access_method {
	23	void (submit_command)(ctlr_info_t h, CommandList_struct *c);
	24	void (set_intr_mask)(ctlr_info_t h, unsigned long val);
	25	unsigned long (fifo_full)(ctlr_info_t h);
	26	unsigned long (intr_pending)(ctlr_info_t h);
	27	unsigned long (command_completed)(ctlr_info_t h);
	28	};
	29	typedef struct _drive_info_struct
	30	{
	31	__u32 LunID;
	32	int usage_count;
ad2b9312	33	struct request_queue *queue;
1da177e4 LT	34	sector_t nr_blocks;
	35	int block_size;
	36	int heads;
	37	int sectors;
	38	int cylinders;
ddd47442 MM	39	int raid_level; /* set to -1 to indicate that
ddd47442 MM	40	* the drive is not in use/configured
7fe06326 AP	41	*/
	42	int busy_configuring; /* This is set when a drive is being removed
	43	* to prevent it from being opened or it's
	44	* queue from being started.
	45	*/
	46	struct device dev;
	47	__u8 serial_no[16]; /* from inquiry page 0x83,
	48	* not necc. null terminated.
	49	*/
	50	char vendor[VENDOR_LEN + 1]; /* SCSI vendor string */
	51	char model[MODEL_LEN + 1]; /* SCSI model string */
	52	char rev[REV_LEN + 1]; /* SCSI revision string */
1da177e4 LT	53	} drive_info_struct;
1da177e4 LT	54
3da8b713	55	#ifdef CONFIG_CISS_SCSI_TAPE
	56
	57	struct sendcmd_reject_list {
	58	int ncompletions;
	59	unsigned long complete; / array of NR_CMDS tags */
	60	};
	61
	62	#endif
1da177e4 LT	63	struct ctlr_info
	64	{
	65	int ctlr;
	66	char devname[8];
	67	char *product_name;
	68	char firm_ver[4]; // Firmware version
	69	struct pci_dev *pdev;
	70	__u32 board_id;
	71	void __iomem *vaddr;
	72	unsigned long paddr;
f880632f	73	int nr_cmds; /* Number of commands allowed on this controller */
1da177e4	74	CfgTable_struct __iomem *cfgtable;
1da177e4 LT	75	int interrupts_enabled;
	76	int major;
	77	int max_commands;
	78	int commands_outstanding;
	79	int max_outstanding; /* Debug */
	80	int num_luns;
	81	int highest_lun;
	82	int usage_count; /* number of opens all all minor devices */
fb86a35b MM	83	# define DOORBELL_INT 0
	84	# define PERF_MODE_INT 1
	85	# define SIMPLE_MODE_INT 2
	86	# define MEMQ_MODE_INT 3
	87	unsigned int intr[4];
	88	unsigned int msix_vector;
	89	unsigned int msi_vector;
92c4231a	90	int cciss_max_sectors;
00988a35 MMOD	91	BYTE cciss_read;
	92	BYTE cciss_write;
	93	BYTE cciss_read_capacity;
1da177e4 LT	94
	95	// information about each logical volume
	96	drive_info_struct drv[CISS_MAX_LUN];
	97
	98	struct access_method access;
	99
	100	/* queue and queue Info */
8a3173de JA	101	struct hlist_head reqQ;
8a3173de JA	102	struct hlist_head cmpQ;
1da177e4 LT	103	unsigned int Qdepth;
	104	unsigned int maxQsinceinit;
	105	unsigned int maxSG;
	106	spinlock_t lock;
1da177e4 LT	107
	108	//* pointers to command and error info pool */
	109	CommandList_struct *cmd_pool;
	110	dma_addr_t cmd_pool_dhandle;
	111	ErrorInfo_struct *errinfo_pool;
	112	dma_addr_t errinfo_pool_dhandle;
	113	unsigned long *cmd_pool_bits;
	114	int nr_allocs;
	115	int nr_frees;
	116	int busy_configuring;
1f8ef380	117	int busy_initializing;
1da177e4 LT	118
	119	/* This element holds the zero based queue number of the last
	120	* queue to be started. It is used for fairness.
	121	*/
	122	int next_to_run;
	123
	124	// Disk structures we need to pass back
799202cb	125	struct gendisk *gendisk[CISS_MAX_LUN];
1da177e4 LT	126	#ifdef CONFIG_CISS_SCSI_TAPE
1da177e4 LT	127	void scsi_ctlr; / ptr to structure containing scsi related stuff */
3da8b713	128	/* list of block side commands the scsi error handling sucked up */
	129	/* and saved for later processing */
	130	struct sendcmd_reject_list scsi_rejects;
1da177e4	131	#endif
33079b21	132	unsigned char alive;
0a9279cc MM	133	struct completion *rescan_wait;
0a9279cc MM	134	struct task_struct *cciss_scan_thread;
7fe06326	135	struct device dev;
1da177e4 LT	136	};
	137
	138	/* Defining the diffent access_menthods */
	139	/*
	140	* Memory mapped FIFO interface (SMART 53xx cards)
	141	*/
	142	#define SA5_DOORBELL 0x20
	143	#define SA5_REQUEST_PORT_OFFSET 0x40
	144	#define SA5_REPLY_INTR_MASK_OFFSET 0x34
	145	#define SA5_REPLY_PORT_OFFSET 0x44
	146	#define SA5_INTR_STATUS 0x30
	147	#define SA5_SCRATCHPAD_OFFSET 0xB0
	148
	149	#define SA5_CTCFG_OFFSET 0xB4
	150	#define SA5_CTMEM_OFFSET 0xB8
	151
	152	#define SA5_INTR_OFF 0x08
	153	#define SA5B_INTR_OFF 0x04
	154	#define SA5_INTR_PENDING 0x08
	155	#define SA5B_INTR_PENDING 0x04
	156	#define FIFO_EMPTY 0xffffffff
	157	#define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
	158
	159	#define CISS_ERROR_BIT 0x02
	160
	161	#define CCISS_INTR_ON 1
	162	#define CCISS_INTR_OFF 0
	163	/*
	164	Send the command to the hardware
	165	*/
	166	static void SA5_submit_command( ctlr_info_t h, CommandList_struct c)
	167	{
	168	#ifdef CCISS_DEBUG
	169	printk("Sending %x - down to controller\n", c->busaddr );
	170	#endif /* CCISS_DEBUG */
	171	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
	172	h->commands_outstanding++;
	173	if ( h->commands_outstanding > h->max_outstanding)
	174	h->max_outstanding = h->commands_outstanding;
	175	}
	176
	177	/*
	178	* This card is the opposite of the other cards.
	179	* 0 turns interrupts on...
	180	* 0x08 turns them off...
	181	*/
	182	static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
	183	{
	184	if (val)
	185	{ /* Turn interrupts on */
	186	h->interrupts_enabled = 1;
	187	writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	188	} else /* Turn them off */
	189	{
	190	h->interrupts_enabled = 0;
	191	writel( SA5_INTR_OFF,
	192	h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	193	}
	194	}
	195	/*
	196	* This card is the opposite of the other cards.
	197	* 0 turns interrupts on...
	198	* 0x04 turns them off...
	199	*/
200	static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
201	{
202	if (val)
203	{ /* Turn interrupts on */
204	h->interrupts_enabled = 1;
205	writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
206	} else /* Turn them off */
207	{
208	h->interrupts_enabled = 0;
209	writel( SA5B_INTR_OFF,
210	h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
211	}
212	}
213	/*
214	* Returns true if fifo is full.
215	*
216	*/
217	static unsigned long SA5_fifo_full(ctlr_info_t *h)
218	{
219	if( h->commands_outstanding >= h->max_commands)
220	return(1);
221	else
222	return(0);
223
224	}
225	/*
226	* returns value read from hardware.
227	* returns FIFO_EMPTY if there is nothing to read
228	*/
229	static unsigned long SA5_completed(ctlr_info_t *h)
230	{
231	unsigned long register_value
232	= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
233	if(register_value != FIFO_EMPTY)
234	{
235	h->commands_outstanding--;
236	#ifdef CCISS_DEBUG
237	printk("cciss: Read %lx back from board\n", register_value);
238	#endif /* CCISS_DEBUG */
239	}
240	#ifdef CCISS_DEBUG
241	else
242	{
243	printk("cciss: FIFO Empty read\n");
244	}
245	#endif
246	return ( register_value);
247
248	}
249	/*
250	* Returns true if an interrupt is pending..
251	*/
252	static unsigned long SA5_intr_pending(ctlr_info_t *h)
253	{
254	unsigned long register_value =
255	readl(h->vaddr + SA5_INTR_STATUS);
256	#ifdef CCISS_DEBUG
257	printk("cciss: intr_pending %lx\n", register_value);
258	#endif /* CCISS_DEBUG */
259	if( register_value & SA5_INTR_PENDING)
260	return 1;
261	return 0 ;
262	}
263
264	/*
265	* Returns true if an interrupt is pending..
266	*/
267	static unsigned long SA5B_intr_pending(ctlr_info_t *h)
268	{
269	unsigned long register_value =
270	readl(h->vaddr + SA5_INTR_STATUS);
271	#ifdef CCISS_DEBUG
272	printk("cciss: intr_pending %lx\n", register_value);
273	#endif /* CCISS_DEBUG */
274	if( register_value & SA5B_INTR_PENDING)
275	return 1;
276	return 0 ;
277	}
278
279
280	static struct access_method SA5_access = {
281	SA5_submit_command,
282	SA5_intr_mask,
283	SA5_fifo_full,
284	SA5_intr_pending,
285	SA5_completed,
286	};
287
288	static struct access_method SA5B_access = {
289	SA5_submit_command,
290	SA5B_intr_mask,
291	SA5_fifo_full,
292	SA5B_intr_pending,
293	SA5_completed,
294	};
295
296	struct board_type {
297	__u32 board_id;
298	char *product_name;
299	struct access_method *access;
f880632f	300	int nr_cmds; /* Max cmds this kind of ctlr can handle. */
1da177e4 LT	301	};
1da177e4 LT	302
ad2b9312	303	#define CCISS_LOCK(i) (&hba[i]->lock)
1da177e4 LT	304
	305	#endif /* CCISS_H */
	306