[deliverable/linux.git] / drivers / block / cciss.h

#ifndef CCISS_H
#define CCISS_H

#include <linux/genhd.h>
#include <linux/mutex.h>

#include "cciss_cmd.h"


#define NWD_SHIFT	4
#define MAX_PART	(1 << NWD_SHIFT)

#define IO_OK		0
#define IO_ERROR	1
#define IO_NEEDS_RETRY  3

#define VENDOR_LEN	8
#define MODEL_LEN	16
#define REV_LEN		4

struct ctlr_info;
typedef struct ctlr_info ctlr_info_t;

struct access_method {
	void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
	void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
	unsigned long (*fifo_full)(ctlr_info_t *h);
	unsigned long (*intr_pending)(ctlr_info_t *h);
	unsigned long (*command_completed)(ctlr_info_t *h);
};
typedef struct _drive_info_struct
{
	unsigned char LunID[8];
	int 	usage_count;
	struct request_queue *queue;
	sector_t nr_blocks;
	int	block_size;
	int 	heads;
	int	sectors;
	int 	cylinders;
	int	raid_level; /* set to -1 to indicate that
			     * the drive is not in use/configured
			     */
	int	busy_configuring; /* This is set when a drive is being removed
				   * to prevent it from being opened or it's
				   * queue from being started.
				   */
	struct	device dev;
	__u8 serial_no[16]; /* from inquiry page 0x83,
			     * not necc. null terminated.
			     */
	char vendor[VENDOR_LEN + 1]; /* SCSI vendor string */
	char model[MODEL_LEN + 1];   /* SCSI model string */
	char rev[REV_LEN + 1];       /* SCSI revision string */
	char device_initialized;     /* indicates whether dev is initialized */
} drive_info_struct;

struct ctlr_info 
{
	int	ctlr;
	char	devname[8];
	char    *product_name;
	char	firm_ver[4]; // Firmware version 
	struct pci_dev *pdev;
	__u32	board_id;
	void __iomem *vaddr;
	unsigned long paddr;
	int 	nr_cmds; /* Number of commands allowed on this controller */
	CfgTable_struct __iomem *cfgtable;
	int	interrupts_enabled;
	int	major;
	int 	max_commands;
	int	commands_outstanding;
	int 	max_outstanding; /* Debug */ 
	int	num_luns;
	int 	highest_lun;
	int	usage_count;  /* number of opens all all minor devices */
#	define DOORBELL_INT	0
#	define PERF_MODE_INT	1
#	define SIMPLE_MODE_INT	2
#	define MEMQ_MODE_INT	3
	unsigned int intr[4];
	unsigned int msix_vector;
	unsigned int msi_vector;
	int 	cciss_max_sectors;
	BYTE	cciss_read;
	BYTE	cciss_write;
	BYTE	cciss_read_capacity;

	// information about each logical volume
	drive_info_struct *drv[CISS_MAX_LUN];

	struct access_method access;

	/* queue and queue Info */ 
	struct hlist_head reqQ;
	struct hlist_head cmpQ;
	unsigned int Qdepth;
	unsigned int maxQsinceinit;
	unsigned int maxSG;
	spinlock_t lock;

	//* pointers to command and error info pool */ 
	CommandList_struct 	*cmd_pool;
	dma_addr_t		cmd_pool_dhandle; 
	ErrorInfo_struct 	*errinfo_pool;
	dma_addr_t		errinfo_pool_dhandle; 
        unsigned long  		*cmd_pool_bits;
	int			nr_allocs;
	int			nr_frees; 
	int			busy_configuring;
	int			busy_initializing;
	int			busy_scanning;
	struct mutex		busy_shutting_down;

	/* This element holds the zero based queue number of the last
	 * queue to be started.  It is used for fairness.
	*/
	int			next_to_run;

	// Disk structures we need to pass back
	struct gendisk   *gendisk[CISS_MAX_LUN];
#ifdef CONFIG_CISS_SCSI_TAPE
	void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
	/* list of block side commands the scsi error handling sucked up */
	/* and saved for later processing */
#endif
	unsigned char alive;
	struct list_head scan_list;
	struct completion scan_wait;
	struct device dev;
};

/*  Defining the diffent access_menthods */
/*
 * Memory mapped FIFO interface (SMART 53xx cards)
 */
#define SA5_DOORBELL	0x20
#define SA5_REQUEST_PORT_OFFSET	0x40
#define SA5_REPLY_INTR_MASK_OFFSET	0x34
#define SA5_REPLY_PORT_OFFSET		0x44
#define SA5_INTR_STATUS		0x30
#define SA5_SCRATCHPAD_OFFSET	0xB0

#define SA5_CTCFG_OFFSET	0xB4
#define SA5_CTMEM_OFFSET	0xB8

#define SA5_INTR_OFF		0x08
#define SA5B_INTR_OFF		0x04
#define SA5_INTR_PENDING	0x08
#define SA5B_INTR_PENDING	0x04
#define FIFO_EMPTY		0xffffffff	
#define CCISS_FIRMWARE_READY	0xffff0000 /* value in scratchpad register */

#define  CISS_ERROR_BIT		0x02

#define CCISS_INTR_ON 	1 
#define CCISS_INTR_OFF	0
/* 
	Send the command to the hardware 
*/
static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c) 
{
#ifdef CCISS_DEBUG
	 printk("Sending %x - down to controller\n", c->busaddr );
#endif /* CCISS_DEBUG */ 
         writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
	 h->commands_outstanding++;
	 if ( h->commands_outstanding > h->max_outstanding)
		h->max_outstanding = h->commands_outstanding;
}

/*  
 *  This card is the opposite of the other cards.  
 *   0 turns interrupts on... 
 *   0x08 turns them off... 
 */
static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
{
	if (val) 
	{ /* Turn interrupts on */
		h->interrupts_enabled = 1;
		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	} else /* Turn them off */
	{
		h->interrupts_enabled = 0;
        	writel( SA5_INTR_OFF, 
			h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	}
}
/*
 *  This card is the opposite of the other cards.
 *   0 turns interrupts on...
 *   0x04 turns them off...
 */
static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
{
        if (val)
        { /* Turn interrupts on */
		h->interrupts_enabled = 1;
                writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        } else /* Turn them off */
        {
		h->interrupts_enabled = 0;
                writel( SA5B_INTR_OFF,
                        h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        }
}
/*
 *  Returns true if fifo is full.  
 * 
 */ 
static unsigned long SA5_fifo_full(ctlr_info_t *h)
{
	if( h->commands_outstanding >= h->max_commands)
		return(1);
	else 
		return(0);

}
/* 
 *   returns value read from hardware. 
 *     returns FIFO_EMPTY if there is nothing to read 
 */ 
static unsigned long SA5_completed(ctlr_info_t *h)
{
	unsigned long register_value 
		= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
	if(register_value != FIFO_EMPTY)
	{
		h->commands_outstanding--;
#ifdef CCISS_DEBUG
		printk("cciss:  Read %lx back from board\n", register_value);
#endif /* CCISS_DEBUG */ 
	} 
#ifdef CCISS_DEBUG
	else
	{
		printk("cciss:  FIFO Empty read\n");
	}
#endif 
	return ( register_value); 

}
/*
 *	Returns true if an interrupt is pending.. 
 */
static unsigned long SA5_intr_pending(ctlr_info_t *h)
{
	unsigned long register_value  = 
		readl(h->vaddr + SA5_INTR_STATUS);
#ifdef CCISS_DEBUG
	printk("cciss: intr_pending %lx\n", register_value);
#endif  /* CCISS_DEBUG */
	if( register_value &  SA5_INTR_PENDING) 
		return  1;	
	return 0 ;
}

/*
 *      Returns true if an interrupt is pending..
 */
static unsigned long SA5B_intr_pending(ctlr_info_t *h)
{
        unsigned long register_value  =
                readl(h->vaddr + SA5_INTR_STATUS);
#ifdef CCISS_DEBUG
        printk("cciss: intr_pending %lx\n", register_value);
#endif  /* CCISS_DEBUG */
        if( register_value &  SA5B_INTR_PENDING)
                return  1;
        return 0 ;
}


static struct access_method SA5_access = {
	SA5_submit_command,
	SA5_intr_mask,
	SA5_fifo_full,
	SA5_intr_pending,
	SA5_completed,
};

static struct access_method SA5B_access = {
        SA5_submit_command,
        SA5B_intr_mask,
        SA5_fifo_full,
        SA5B_intr_pending,
        SA5_completed,
};

struct board_type {
	__u32	board_id;
	char	*product_name;
	struct access_method *access;
	int nr_cmds; /* Max cmds this kind of ctlr can handle. */
};

#define CCISS_LOCK(i)	(&hba[i]->lock)

#endif /* CCISS_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef CCISS_H
	2	#define CCISS_H
	3
	4	#include <linux/genhd.h>
b368c9dd	5	#include <linux/mutex.h>
1da177e4 LT	6
	7	#include "cciss_cmd.h"
	8
	9
1da177e4 LT	10	#define NWD_SHIFT 4
	11	#define MAX_PART (1 << NWD_SHIFT)
	12
	13	#define IO_OK 0
	14	#define IO_ERROR 1
789a424a	15	#define IO_NEEDS_RETRY 3
1da177e4	16
7fe06326 AP	17	#define VENDOR_LEN 8
	18	#define MODEL_LEN 16
	19	#define REV_LEN 4
	20
1da177e4 LT	21	struct ctlr_info;
	22	typedef struct ctlr_info ctlr_info_t;
	23
	24	struct access_method {
	25	void (submit_command)(ctlr_info_t h, CommandList_struct *c);
	26	void (set_intr_mask)(ctlr_info_t h, unsigned long val);
	27	unsigned long (fifo_full)(ctlr_info_t h);
	28	unsigned long (intr_pending)(ctlr_info_t h);
	29	unsigned long (command_completed)(ctlr_info_t h);
	30	};
	31	typedef struct _drive_info_struct
	32	{
39ccf9a6	33	unsigned char LunID[8];
1da177e4	34	int usage_count;
ad2b9312	35	struct request_queue *queue;
1da177e4 LT	36	sector_t nr_blocks;
	37	int block_size;
	38	int heads;
	39	int sectors;
	40	int cylinders;
ddd47442 MM	41	int raid_level; /* set to -1 to indicate that
ddd47442 MM	42	* the drive is not in use/configured
7fe06326 AP	43	*/
	44	int busy_configuring; /* This is set when a drive is being removed
	45	* to prevent it from being opened or it's
	46	* queue from being started.
	47	*/
9cef0d2f	48	struct device dev;
7fe06326 AP	49	__u8 serial_no[16]; /* from inquiry page 0x83,
	50	* not necc. null terminated.
	51	*/
	52	char vendor[VENDOR_LEN + 1]; /* SCSI vendor string */
	53	char model[MODEL_LEN + 1]; /* SCSI model string */
	54	char rev[REV_LEN + 1]; /* SCSI revision string */
9cef0d2f	55	char device_initialized; /* indicates whether dev is initialized */
1da177e4 LT	56	} drive_info_struct;
	57
	58	struct ctlr_info
	59	{
	60	int ctlr;
	61	char devname[8];
	62	char *product_name;
	63	char firm_ver[4]; // Firmware version
	64	struct pci_dev *pdev;
	65	__u32 board_id;
	66	void __iomem *vaddr;
	67	unsigned long paddr;
f880632f	68	int nr_cmds; /* Number of commands allowed on this controller */
1da177e4	69	CfgTable_struct __iomem *cfgtable;
1da177e4 LT	70	int interrupts_enabled;
	71	int major;
	72	int max_commands;
	73	int commands_outstanding;
	74	int max_outstanding; /* Debug */
	75	int num_luns;
	76	int highest_lun;
	77	int usage_count; /* number of opens all all minor devices */
fb86a35b MM	78	# define DOORBELL_INT 0
	79	# define PERF_MODE_INT 1
	80	# define SIMPLE_MODE_INT 2
	81	# define MEMQ_MODE_INT 3
	82	unsigned int intr[4];
	83	unsigned int msix_vector;
	84	unsigned int msi_vector;
92c4231a	85	int cciss_max_sectors;
00988a35 MMOD	86	BYTE cciss_read;
	87	BYTE cciss_write;
	88	BYTE cciss_read_capacity;
1da177e4 LT	89
1da177e4 LT	90	// information about each logical volume
9cef0d2f	91	drive_info_struct *drv[CISS_MAX_LUN];
1da177e4 LT	92
	93	struct access_method access;
	94
	95	/* queue and queue Info */
8a3173de JA	96	struct hlist_head reqQ;
8a3173de JA	97	struct hlist_head cmpQ;
1da177e4 LT	98	unsigned int Qdepth;
	99	unsigned int maxQsinceinit;
	100	unsigned int maxSG;
	101	spinlock_t lock;
1da177e4 LT	102
	103	//* pointers to command and error info pool */
	104	CommandList_struct *cmd_pool;
	105	dma_addr_t cmd_pool_dhandle;
	106	ErrorInfo_struct *errinfo_pool;
	107	dma_addr_t errinfo_pool_dhandle;
	108	unsigned long *cmd_pool_bits;
	109	int nr_allocs;
	110	int nr_frees;
	111	int busy_configuring;
1f8ef380	112	int busy_initializing;
b368c9dd AP	113	int busy_scanning;
b368c9dd AP	114	struct mutex busy_shutting_down;
1da177e4 LT	115
	116	/* This element holds the zero based queue number of the last
	117	* queue to be started. It is used for fairness.
	118	*/
	119	int next_to_run;
	120
	121	// Disk structures we need to pass back
799202cb	122	struct gendisk *gendisk[CISS_MAX_LUN];
1da177e4 LT	123	#ifdef CONFIG_CISS_SCSI_TAPE
1da177e4 LT	124	void scsi_ctlr; / ptr to structure containing scsi related stuff */
3da8b713	125	/* list of block side commands the scsi error handling sucked up */
3da8b713	126	/* and saved for later processing */
1da177e4	127	#endif
33079b21	128	unsigned char alive;
b368c9dd AP	129	struct list_head scan_list;
b368c9dd AP	130	struct completion scan_wait;
7fe06326	131	struct device dev;
1da177e4 LT	132	};
	133
	134	/* Defining the diffent access_menthods */
	135	/*
	136	* Memory mapped FIFO interface (SMART 53xx cards)
	137	*/
	138	#define SA5_DOORBELL 0x20
	139	#define SA5_REQUEST_PORT_OFFSET 0x40
	140	#define SA5_REPLY_INTR_MASK_OFFSET 0x34
	141	#define SA5_REPLY_PORT_OFFSET 0x44
	142	#define SA5_INTR_STATUS 0x30
	143	#define SA5_SCRATCHPAD_OFFSET 0xB0
	144
	145	#define SA5_CTCFG_OFFSET 0xB4
	146	#define SA5_CTMEM_OFFSET 0xB8
	147
	148	#define SA5_INTR_OFF 0x08
	149	#define SA5B_INTR_OFF 0x04
	150	#define SA5_INTR_PENDING 0x08
	151	#define SA5B_INTR_PENDING 0x04
	152	#define FIFO_EMPTY 0xffffffff
	153	#define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
	154
	155	#define CISS_ERROR_BIT 0x02
	156
	157	#define CCISS_INTR_ON 1
	158	#define CCISS_INTR_OFF 0
	159	/*
	160	Send the command to the hardware
	161	*/
	162	static void SA5_submit_command( ctlr_info_t h, CommandList_struct c)
	163	{
	164	#ifdef CCISS_DEBUG
	165	printk("Sending %x - down to controller\n", c->busaddr );
	166	#endif /* CCISS_DEBUG */
	167	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
	168	h->commands_outstanding++;
	169	if ( h->commands_outstanding > h->max_outstanding)
	170	h->max_outstanding = h->commands_outstanding;
	171	}
	172
	173	/*
	174	* This card is the opposite of the other cards.
	175	* 0 turns interrupts on...
	176	* 0x08 turns them off...
	177	*/
	178	static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
	179	{
	180	if (val)
	181	{ /* Turn interrupts on */
	182	h->interrupts_enabled = 1;
	183	writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	184	} else /* Turn them off */
	185	{
	186	h->interrupts_enabled = 0;
	187	writel( SA5_INTR_OFF,
	188	h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	189	}
	190	}
	191	/*
	192	* This card is the opposite of the other cards.
	193	* 0 turns interrupts on...
	194	* 0x04 turns them off...
	195	*/
196	static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
197	{
198	if (val)
199	{ /* Turn interrupts on */
200	h->interrupts_enabled = 1;
201	writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
202	} else /* Turn them off */
203	{
204	h->interrupts_enabled = 0;
205	writel( SA5B_INTR_OFF,
206	h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
207	}
208	}
209	/*
210	* Returns true if fifo is full.
211	*
212	*/
213	static unsigned long SA5_fifo_full(ctlr_info_t *h)
214	{
215	if( h->commands_outstanding >= h->max_commands)
216	return(1);
217	else
218	return(0);
219
220	}
221	/*
222	* returns value read from hardware.
223	* returns FIFO_EMPTY if there is nothing to read
224	*/
225	static unsigned long SA5_completed(ctlr_info_t *h)
226	{
227	unsigned long register_value
228	= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
229	if(register_value != FIFO_EMPTY)
230	{
231	h->commands_outstanding--;
232	#ifdef CCISS_DEBUG
233	printk("cciss: Read %lx back from board\n", register_value);
234	#endif /* CCISS_DEBUG */
235	}
236	#ifdef CCISS_DEBUG
237	else
238	{
239	printk("cciss: FIFO Empty read\n");
240	}
241	#endif
242	return ( register_value);
243
244	}
245	/*
246	* Returns true if an interrupt is pending..
247	*/
248	static unsigned long SA5_intr_pending(ctlr_info_t *h)
249	{
250	unsigned long register_value =
251	readl(h->vaddr + SA5_INTR_STATUS);
252	#ifdef CCISS_DEBUG
253	printk("cciss: intr_pending %lx\n", register_value);
254	#endif /* CCISS_DEBUG */
255	if( register_value & SA5_INTR_PENDING)
256	return 1;
257	return 0 ;
258	}
259
260	/*
261	* Returns true if an interrupt is pending..
262	*/
263	static unsigned long SA5B_intr_pending(ctlr_info_t *h)
264	{
265	unsigned long register_value =
266	readl(h->vaddr + SA5_INTR_STATUS);
267	#ifdef CCISS_DEBUG
268	printk("cciss: intr_pending %lx\n", register_value);
269	#endif /* CCISS_DEBUG */
270	if( register_value & SA5B_INTR_PENDING)
271	return 1;
272	return 0 ;
273	}
274
275
276	static struct access_method SA5_access = {
277	SA5_submit_command,
278	SA5_intr_mask,
279	SA5_fifo_full,
280	SA5_intr_pending,
281	SA5_completed,
282	};
283
284	static struct access_method SA5B_access = {
285	SA5_submit_command,
286	SA5B_intr_mask,
287	SA5_fifo_full,
288	SA5B_intr_pending,
289	SA5_completed,
290	};
291
292	struct board_type {
293	__u32 board_id;
294	char *product_name;
295	struct access_method *access;
f880632f	296	int nr_cmds; /* Max cmds this kind of ctlr can handle. */
1da177e4 LT	297	};
1da177e4 LT	298
ad2b9312	299	#define CCISS_LOCK(i) (&hba[i]->lock)
1da177e4 LT	300
	301	#endif /* CCISS_H */
	302