[deliverable/linux.git] / drivers / block / mtip32xx / mtip32xx.h

/*
 * mtip32xx.h - Header file for the P320 SSD Block Driver
 *   Copyright (C) 2011 Micron Technology, Inc.
 *
 * Portions of this code were derived from works subjected to the
 * following copyright:
 *    Copyright (C) 2009 Integrated Device Technology, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

#ifndef __MTIP32XX_H__
#define __MTIP32XX_H__

#include <linux/spinlock.h>
#include <linux/rwsem.h>
#include <linux/ata.h>
#include <linux/interrupt.h>
#include <linux/genhd.h>

/* Offset of Subsystem Device ID in pci confoguration space */
#define PCI_SUBSYSTEM_DEVICEID	0x2E

/* offset of Device Control register in PCIe extended capabilites space */
#define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET	0x48

/* check for erase mode support during secure erase */
#define MTIP_SEC_ERASE_MODE     0x2

/* # of times to retry timed out/failed IOs */
#define MTIP_MAX_RETRIES	2

/* Various timeout values in ms */
#define MTIP_NCQ_COMMAND_TIMEOUT_MS       5000
#define MTIP_IOCTL_COMMAND_TIMEOUT_MS     5000
#define MTIP_INTERNAL_COMMAND_TIMEOUT_MS  5000

/* check for timeouts every 500ms */
#define MTIP_TIMEOUT_CHECK_PERIOD	500

/* ftl rebuild */
#define MTIP_FTL_REBUILD_OFFSET		142
#define MTIP_FTL_REBUILD_MAGIC		0xED51
#define MTIP_FTL_REBUILD_TIMEOUT_MS	2400000

/* unaligned IO handling */
#define MTIP_MAX_UNALIGNED_SLOTS	8

/* Macro to extract the tag bit number from a tag value. */
#define MTIP_TAG_BIT(tag)	(tag & 0x1F)

/*
 * Macro to extract the tag index from a tag value. The index
 * is used to access the correct s_active/Command Issue register based
 * on the tag value.
 */
#define MTIP_TAG_INDEX(tag)	(tag >> 5)

/*
 * Maximum number of scatter gather entries
 * a single command may have.
 */
#define MTIP_MAX_SG		128

/*
 * Maximum number of slot groups (Command Issue & s_active registers)
 * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
 */
#define MTIP_MAX_SLOT_GROUPS	8

/* Internal command tag. */
#define MTIP_TAG_INTERNAL	0

/* Micron Vendor ID & P320x SSD Device ID */
#define PCI_VENDOR_ID_MICRON    0x1344
#define P320H_DEVICE_ID		0x5150
#define P320M_DEVICE_ID		0x5151
#define P320S_DEVICE_ID		0x5152
#define P325M_DEVICE_ID		0x5153
#define P420H_DEVICE_ID		0x5160
#define P420M_DEVICE_ID		0x5161
#define P425M_DEVICE_ID		0x5163

/* Driver name and version strings */
#define MTIP_DRV_NAME		"mtip32xx"
#define MTIP_DRV_VERSION	"1.2.6os3"

/* Maximum number of minor device numbers per device. */
#define MTIP_MAX_MINORS		16

/* Maximum number of supported command slots. */
#define MTIP_MAX_COMMAND_SLOTS	(MTIP_MAX_SLOT_GROUPS * 32)

/*
 * Per-tag bitfield size in longs.
 * Linux bit manipulation functions
 * (i.e. test_and_set_bit, find_next_zero_bit)
 * manipulate memory in longs, so we try to make the math work.
 * take the slot groups and find the number of longs, rounding up.
 * Careful! i386 and x86_64 use different size longs!
 */
#define U32_PER_LONG	(sizeof(long) / sizeof(u32))
#define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
					(U32_PER_LONG-1))/U32_PER_LONG)

/* BAR number used to access the HBA registers. */
#define MTIP_ABAR		5

#ifdef DEBUG
 #define dbg_printk(format, arg...)	\
	printk(pr_fmt(format), ##arg);
#else
 #define dbg_printk(format, arg...)
#endif

#define MTIP_DFS_MAX_BUF_SIZE 1024

#define __force_bit2int (unsigned int __force)

enum {
	/* below are bit numbers in 'flags' defined in mtip_port */
	MTIP_PF_IC_ACTIVE_BIT       = 0, /* pio/ioctl */
	MTIP_PF_EH_ACTIVE_BIT       = 1, /* error handling */
	MTIP_PF_SE_ACTIVE_BIT       = 2, /* secure erase */
	MTIP_PF_DM_ACTIVE_BIT       = 3, /* download microcde */
	MTIP_PF_PAUSE_IO      =	((1 << MTIP_PF_IC_ACTIVE_BIT) |
				(1 << MTIP_PF_EH_ACTIVE_BIT) |
				(1 << MTIP_PF_SE_ACTIVE_BIT) |
				(1 << MTIP_PF_DM_ACTIVE_BIT)),

	MTIP_PF_SVC_THD_ACTIVE_BIT  = 4,
	MTIP_PF_ISSUE_CMDS_BIT      = 5,
	MTIP_PF_REBUILD_BIT         = 6,
	MTIP_PF_SVC_THD_STOP_BIT    = 8,

	/* below are bit numbers in 'dd_flag' defined in driver_data */
	MTIP_DDF_SEC_LOCK_BIT	    = 0,
	MTIP_DDF_REMOVE_PENDING_BIT = 1,
	MTIP_DDF_OVER_TEMP_BIT      = 2,
	MTIP_DDF_WRITE_PROTECT_BIT  = 3,
	MTIP_DDF_STOP_IO      = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
				(1 << MTIP_DDF_SEC_LOCK_BIT) |
				(1 << MTIP_DDF_OVER_TEMP_BIT) |
				(1 << MTIP_DDF_WRITE_PROTECT_BIT)),

	MTIP_DDF_CLEANUP_BIT        = 5,
	MTIP_DDF_RESUME_BIT         = 6,
	MTIP_DDF_INIT_DONE_BIT      = 7,
	MTIP_DDF_REBUILD_FAILED_BIT = 8,
};

struct smart_attr {
	u8 attr_id;
	u16 flags;
	u8 cur;
	u8 worst;
	u32 data;
	u8 res[3];
} __packed;

struct mtip_work {
	struct work_struct work;
	void *port;
	int cpu_binding;
	u32 completed;
} ____cacheline_aligned_in_smp;

#define DEFINE_HANDLER(group)                                  \
	void mtip_workq_sdbf##group(struct work_struct *work)       \
	{                                                      \
		struct mtip_work *w = (struct mtip_work *) work;         \
		mtip_workq_sdbfx(w->port, group, w->completed);     \
	}

#define MTIP_TRIM_TIMEOUT_MS		240000
#define MTIP_MAX_TRIM_ENTRIES		8
#define MTIP_MAX_TRIM_ENTRY_LEN		0xfff8

struct mtip_trim_entry {
	u32 lba;   /* starting lba of region */
	u16 rsvd;  /* unused */
	u16 range; /* # of 512b blocks to trim */
} __packed;

struct mtip_trim {
	/* Array of regions to trim */
	struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
} __packed;

/* Register Frame Information Structure (FIS), host to device. */
struct host_to_dev_fis {
	/*
	 * FIS type.
	 * - 27h Register FIS, host to device.
	 * - 34h Register FIS, device to host.
	 * - 39h DMA Activate FIS, device to host.
	 * - 41h DMA Setup FIS, bi-directional.
	 * - 46h Data FIS, bi-directional.
	 * - 58h BIST Activate FIS, bi-directional.
	 * - 5Fh PIO Setup FIS, device to host.
	 * - A1h Set Device Bits FIS, device to host.
	 */
	unsigned char type;
	unsigned char opts;
	unsigned char command;
	unsigned char features;

	union {
		unsigned char lba_low;
		unsigned char sector;
	};
	union {
		unsigned char lba_mid;
		unsigned char cyl_low;
	};
	union {
		unsigned char lba_hi;
		unsigned char cyl_hi;
	};
	union {
		unsigned char device;
		unsigned char head;
	};

	union {
		unsigned char lba_low_ex;
		unsigned char sector_ex;
	};
	union {
		unsigned char lba_mid_ex;
		unsigned char cyl_low_ex;
	};
	union {
		unsigned char lba_hi_ex;
		unsigned char cyl_hi_ex;
	};
	unsigned char features_ex;

	unsigned char sect_count;
	unsigned char sect_cnt_ex;
	unsigned char res2;
	unsigned char control;

	unsigned int res3;
};

/* Command header structure. */
struct mtip_cmd_hdr {
	/*
	 * Command options.
	 * - Bits 31:16 Number of PRD entries.
	 * - Bits 15:8 Unused in this implementation.
	 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
	 * - Bit 6 Write bit, should be set when writing data to the device.
	 * - Bit 5 Unused in this implementation.
	 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
	 */
	unsigned int opts;
	/* This field is unsed when using NCQ. */
	union {
		unsigned int byte_count;
		unsigned int status;
	};
	/*
	 * Lower 32 bits of the command table address associated with this
	 * header. The command table addresses must be 128 byte aligned.
	 */
	unsigned int ctba;
	/*
	 * If 64 bit addressing is used this field is the upper 32 bits
	 * of the command table address associated with this command.
	 */
	unsigned int ctbau;
	/* Reserved and unused. */
	unsigned int res[4];
};

/* Command scatter gather structure (PRD). */
struct mtip_cmd_sg {
	/*
	 * Low 32 bits of the data buffer address. For P320 this
	 * address must be 8 byte aligned signified by bits 2:0 being
	 * set to 0.
	 */
	unsigned int dba;
	/*
	 * When 64 bit addressing is used this field is the upper
	 * 32 bits of the data buffer address.
	 */
	unsigned int dba_upper;
	/* Unused. */
	unsigned int reserved;
	/*
	 * Bit 31: interrupt when this data block has been transferred.
	 * Bits 30..22: reserved
	 * Bits 21..0: byte count (minus 1).  For P320 the byte count must be
	 * 8 byte aligned signified by bits 2:0 being set to 1.
	 */
	unsigned int info;
};
struct mtip_port;

/* Structure used to describe a command. */
struct mtip_cmd {

	struct mtip_cmd_hdr *command_header; /* ptr to command header entry */

	dma_addr_t command_header_dma; /* corresponding physical address */

	void *command; /* ptr to command table entry */

	dma_addr_t command_dma; /* corresponding physical address */

	void *comp_data; /* data passed to completion function comp_func() */
	/*
	 * Completion function called by the ISR upon completion of
	 * a command.
	 */
	void (*comp_func)(struct mtip_port *port,
				int tag,
				void *data,
				int status);
	/* Additional callback function that may be called by comp_func() */
	void (*async_callback)(void *data, int status);

	void *async_data; /* Addl. data passed to async_callback() */

	int scatter_ents; /* Number of scatter list entries used */

	int unaligned; /* command is unaligned on 4k boundary */

	struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */

	int retries; /* The number of retries left for this command. */

	int direction; /* Data transfer direction */

	unsigned long comp_time; /* command completion time, in jiffies */

	atomic_t active; /* declares if this command sent to the drive. */
};

/* Structure used to describe a port. */
struct mtip_port {
	/* Pointer back to the driver data for this port. */
	struct driver_data *dd;
	/*
	 * Used to determine if the data pointed to by the
	 * identify field is valid.
	 */
	unsigned long identify_valid;
	/* Base address of the memory mapped IO for the port. */
	void __iomem *mmio;
	/* Array of pointers to the memory mapped s_active registers. */
	void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
	/* Array of pointers to the memory mapped completed registers. */
	void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
	/* Array of pointers to the memory mapped Command Issue registers. */
	void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
	/*
	 * Pointer to the beginning of the command header memory as used
	 * by the driver.
	 */
	void *command_list;
	/*
	 * Pointer to the beginning of the command header memory as used
	 * by the DMA.
	 */
	dma_addr_t command_list_dma;
	/*
	 * Pointer to the beginning of the RX FIS memory as used
	 * by the driver.
	 */
	void *rxfis;
	/*
	 * Pointer to the beginning of the RX FIS memory as used
	 * by the DMA.
	 */
	dma_addr_t rxfis_dma;
	/*
	 * Pointer to the beginning of the command table memory as used
	 * by the driver.
	 */
	void *command_table;
	/*
	 * Pointer to the beginning of the command table memory as used
	 * by the DMA.
	 */
	dma_addr_t command_tbl_dma;
	/*
	 * Pointer to the beginning of the identify data memory as used
	 * by the driver.
	 */
	u16 *identify;
	/*
	 * Pointer to the beginning of the identify data memory as used
	 * by the DMA.
	 */
	dma_addr_t identify_dma;
	/*
	 * Pointer to the beginning of a sector buffer that is used
	 * by the driver when issuing internal commands.
	 */
	u16 *sector_buffer;
	/*
	 * Pointer to the beginning of a sector buffer that is used
	 * by the DMA when the driver issues internal commands.
	 */
	dma_addr_t sector_buffer_dma;
	/*
	 * Bit significant, used to determine if a command slot has
	 * been allocated. i.e. the slot is in use.  Bits are cleared
	 * when the command slot and all associated data structures
	 * are no longer needed.
	 */
	u16 *log_buf;
	dma_addr_t log_buf_dma;

	u8 *smart_buf;
	dma_addr_t smart_buf_dma;

	unsigned long allocated[SLOTBITS_IN_LONGS];
	/*
	 * used to queue commands when an internal command is in progress
	 * or error handling is active
	 */
	unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
	/*
	 * Array of command slots. Structure includes pointers to the
	 * command header and command table, and completion function and data
	 * pointers.
	 */
	struct mtip_cmd commands[MTIP_MAX_COMMAND_SLOTS];
	/* Used by mtip_service_thread to wait for an event */
	wait_queue_head_t svc_wait;
	/*
	 * indicates the state of the port. Also, helps the service thread
	 * to determine its action on wake up.
	 */
	unsigned long flags;
	/*
	 * Timer used to complete commands that have been active for too long.
	 */
	struct timer_list cmd_timer;
	unsigned long ic_pause_timer;
	/*
	 * Semaphore used to block threads if there are no
	 * command slots available.
	 */
	struct semaphore cmd_slot;

	/* Semaphore to control queue depth of unaligned IOs */
	struct semaphore cmd_slot_unal;

	/* Spinlock for working around command-issue bug. */
	spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
};

/*
 * Driver private data structure.
 *
 * One structure is allocated per probed device.
 */
struct driver_data {
	void __iomem *mmio; /* Base address of the HBA registers. */

	int major; /* Major device number. */

	int instance; /* Instance number. First device probed is 0, ... */

	struct gendisk *disk; /* Pointer to our gendisk structure. */

	struct pci_dev *pdev; /* Pointer to the PCI device structure. */

	struct request_queue *queue; /* Our request queue. */

	struct mtip_port *port; /* Pointer to the port data structure. */

	unsigned product_type; /* magic value declaring the product type */

	unsigned slot_groups; /* number of slot groups the product supports */

	unsigned long index; /* Index to determine the disk name */

	unsigned long dd_flag; /* NOTE: use atomic bit operations on this */

	struct task_struct *mtip_svc_handler; /* task_struct of svc thd */

	struct dentry *dfs_node;

	bool trim_supp; /* flag indicating trim support */

	int numa_node; /* NUMA support */

	char workq_name[32];

	struct workqueue_struct *isr_workq;

	struct mtip_work work[MTIP_MAX_SLOT_GROUPS];

	atomic_t irq_workers_active;

	int isr_binding;

	int unal_qdepth; /* qdepth of unaligned IO queue */

	struct list_head online_list; /* linkage for online list */

	struct list_head remove_list; /* linkage for removing list */
};

#endif
Commit	Line	Data
88523a61 SB	1	/*
	2	* mtip32xx.h - Header file for the P320 SSD Block Driver
	3	* Copyright (C) 2011 Micron Technology, Inc.
	4	*
	5	* Portions of this code were derived from works subjected to the
	6	* following copyright:
	7	* Copyright (C) 2009 Integrated Device Technology, Inc.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	*/
	20
	21	#ifndef __MTIP32XX_H__
	22	#define __MTIP32XX_H__
	23
	24	#include <linux/spinlock.h>
	25	#include <linux/rwsem.h>
	26	#include <linux/ata.h>
	27	#include <linux/interrupt.h>
	28	#include <linux/genhd.h>
88523a61 SB	29
	30	/* Offset of Subsystem Device ID in pci confoguration space */
	31	#define PCI_SUBSYSTEM_DEVICEID 0x2E
	32
	33	/* offset of Device Control register in PCIe extended capabilites space */
	34	#define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
	35
4453bc88	36	/* check for erase mode support during secure erase */
4b9e8845	37	#define MTIP_SEC_ERASE_MODE 0x2
4453bc88	38
c74b0f58 AT	39	/* # of times to retry timed out/failed IOs */
c74b0f58 AT	40	#define MTIP_MAX_RETRIES 2
88523a61 SB	41
	42	/* Various timeout values in ms */
	43	#define MTIP_NCQ_COMMAND_TIMEOUT_MS 5000
	44	#define MTIP_IOCTL_COMMAND_TIMEOUT_MS 5000
	45	#define MTIP_INTERNAL_COMMAND_TIMEOUT_MS 5000
	46
	47	/* check for timeouts every 500ms */
	48	#define MTIP_TIMEOUT_CHECK_PERIOD 500
	49
	50	/* ftl rebuild */
	51	#define MTIP_FTL_REBUILD_OFFSET 142
60ec0eec	52	#define MTIP_FTL_REBUILD_MAGIC 0xED51
88523a61 SB	53	#define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
88523a61 SB	54
2077d947 AT	55	/* unaligned IO handling */
	56	#define MTIP_MAX_UNALIGNED_SLOTS 8
	57
88523a61	58	/* Macro to extract the tag bit number from a tag value. */
60ec0eec	59	#define MTIP_TAG_BIT(tag) (tag & 0x1F)
88523a61 SB	60
	61	/*
	62	* Macro to extract the tag index from a tag value. The index
	63	* is used to access the correct s_active/Command Issue register based
	64	* on the tag value.
	65	*/
	66	#define MTIP_TAG_INDEX(tag) (tag >> 5)
	67
	68	/*
	69	* Maximum number of scatter gather entries
	70	* a single command may have.
	71	*/
	72	#define MTIP_MAX_SG 128
	73
	74	/*
	75	* Maximum number of slot groups (Command Issue & s_active registers)
	76	* NOTE: This is the driver maximum; check dd->slot_groups for actual value.
	77	*/
	78	#define MTIP_MAX_SLOT_GROUPS 8
	79
	80	/* Internal command tag. */
	81	#define MTIP_TAG_INTERNAL 0
	82
	83	/* Micron Vendor ID & P320x SSD Device ID */
	84	#define PCI_VENDOR_ID_MICRON 0x1344
1a131458 AT	85	#define P320H_DEVICE_ID 0x5150
	86	#define P320M_DEVICE_ID 0x5151
	87	#define P320S_DEVICE_ID 0x5152
	88	#define P325M_DEVICE_ID 0x5153
	89	#define P420H_DEVICE_ID 0x5160
	90	#define P420M_DEVICE_ID 0x5161
	91	#define P425M_DEVICE_ID 0x5163
88523a61 SB	92
	93	/* Driver name and version strings */
	94	#define MTIP_DRV_NAME "mtip32xx"
60ec0eec	95	#define MTIP_DRV_VERSION "1.2.6os3"
88523a61 SB	96
	97	/* Maximum number of minor device numbers per device. */
	98	#define MTIP_MAX_MINORS 16
	99
	100	/* Maximum number of supported command slots. */
	101	#define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
	102
	103	/*
	104	* Per-tag bitfield size in longs.
	105	* Linux bit manipulation functions
	106	* (i.e. test_and_set_bit, find_next_zero_bit)
	107	* manipulate memory in longs, so we try to make the math work.
	108	* take the slot groups and find the number of longs, rounding up.
	109	* Careful! i386 and x86_64 use different size longs!
	110	*/
	111	#define U32_PER_LONG (sizeof(long) / sizeof(u32))
	112	#define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
	113	(U32_PER_LONG-1))/U32_PER_LONG)
	114
	115	/* BAR number used to access the HBA registers. */
	116	#define MTIP_ABAR 5
	117
88523a61 SB	118	#ifdef DEBUG
	119	#define dbg_printk(format, arg...) \
	120	printk(pr_fmt(format), ##arg);
	121	#else
	122	#define dbg_printk(format, arg...)
	123	#endif
	124
7b421d24 AT	125	#define MTIP_DFS_MAX_BUF_SIZE 1024
7b421d24 AT	126
60ec0eec AT	127	#define __force_bit2int (unsigned int __force)
60ec0eec AT	128
8ce80093 AT	129	enum {
	130	/* below are bit numbers in 'flags' defined in mtip_port */
	131	MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */
	132	MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
	133	MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
	134	MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
0caff003 AT	135	MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) \|
	136	(1 << MTIP_PF_EH_ACTIVE_BIT) \|
	137	(1 << MTIP_PF_SE_ACTIVE_BIT) \|
8ce80093 AT	138	(1 << MTIP_PF_DM_ACTIVE_BIT)),
	139
	140	MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
	141	MTIP_PF_ISSUE_CMDS_BIT = 5,
	142	MTIP_PF_REBUILD_BIT = 6,
	143	MTIP_PF_SVC_THD_STOP_BIT = 8,
	144
	145	/* below are bit numbers in 'dd_flag' defined in driver_data */
12a166c9	146	MTIP_DDF_SEC_LOCK_BIT = 0,
8ce80093 AT	147	MTIP_DDF_REMOVE_PENDING_BIT = 1,
	148	MTIP_DDF_OVER_TEMP_BIT = 2,
	149	MTIP_DDF_WRITE_PROTECT_BIT = 3,
0caff003 AT	150	MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) \|
	151	(1 << MTIP_DDF_SEC_LOCK_BIT) \|
	152	(1 << MTIP_DDF_OVER_TEMP_BIT) \|
8ce80093	153	(1 << MTIP_DDF_WRITE_PROTECT_BIT)),
8a857a88	154
8ce80093 AT	155	MTIP_DDF_CLEANUP_BIT = 5,
	156	MTIP_DDF_RESUME_BIT = 6,
	157	MTIP_DDF_INIT_DONE_BIT = 7,
	158	MTIP_DDF_REBUILD_FAILED_BIT = 8,
	159	};
f6587217	160
836413e8	161	struct smart_attr {
f6587217 AT	162	u8 attr_id;
	163	u16 flags;
	164	u8 cur;
	165	u8 worst;
	166	u32 data;
	167	u8 res[3];
836413e8	168	} __packed;
f6587217	169
16c906e5 AT	170	struct mtip_work {
	171	struct work_struct work;
	172	void *port;
	173	int cpu_binding;
	174	u32 completed;
	175	} ____cacheline_aligned_in_smp;
	176
	177	#define DEFINE_HANDLER(group) \
	178	void mtip_workq_sdbf##group(struct work_struct *work) \
	179	{ \
	180	struct mtip_work w = (struct mtip_work ) work; \
	181	mtip_workq_sdbfx(w->port, group, w->completed); \
	182	}
	183
15283469 AT	184	#define MTIP_TRIM_TIMEOUT_MS 240000
15283469 AT	185	#define MTIP_MAX_TRIM_ENTRIES 8
0caff003	186	#define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
15283469 AT	187
	188	struct mtip_trim_entry {
	189	u32 lba; /* starting lba of region */
	190	u16 rsvd; /* unused */
	191	u16 range; /* # of 512b blocks to trim */
	192	} __packed;
	193
	194	struct mtip_trim {
	195	/* Array of regions to trim */
	196	struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
	197	} __packed;
	198
88523a61 SB	199	/* Register Frame Information Structure (FIS), host to device. */
	200	struct host_to_dev_fis {
	201	/*
	202	* FIS type.
	203	* - 27h Register FIS, host to device.
	204	* - 34h Register FIS, device to host.
	205	* - 39h DMA Activate FIS, device to host.
	206	* - 41h DMA Setup FIS, bi-directional.
	207	* - 46h Data FIS, bi-directional.
	208	* - 58h BIST Activate FIS, bi-directional.
	209	* - 5Fh PIO Setup FIS, device to host.
	210	* - A1h Set Device Bits FIS, device to host.
	211	*/
	212	unsigned char type;
	213	unsigned char opts;
	214	unsigned char command;
	215	unsigned char features;
	216
	217	union {
	218	unsigned char lba_low;
	219	unsigned char sector;
	220	};
	221	union {
	222	unsigned char lba_mid;
	223	unsigned char cyl_low;
	224	};
	225	union {
	226	unsigned char lba_hi;
	227	unsigned char cyl_hi;
	228	};
	229	union {
	230	unsigned char device;
	231	unsigned char head;
	232	};
	233
	234	union {
	235	unsigned char lba_low_ex;
	236	unsigned char sector_ex;
	237	};
	238	union {
	239	unsigned char lba_mid_ex;
	240	unsigned char cyl_low_ex;
	241	};
	242	union {
	243	unsigned char lba_hi_ex;
	244	unsigned char cyl_hi_ex;
	245	};
	246	unsigned char features_ex;
	247
	248	unsigned char sect_count;
	249	unsigned char sect_cnt_ex;
	250	unsigned char res2;
	251	unsigned char control;
	252
	253	unsigned int res3;
	254	};
	255
	256	/* Command header structure. */
	257	struct mtip_cmd_hdr {
	258	/*
	259	* Command options.
	260	* - Bits 31:16 Number of PRD entries.
	261	* - Bits 15:8 Unused in this implementation.
	262	* - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
263	* - Bit 6 Write bit, should be set when writing data to the device.
264	* - Bit 5 Unused in this implementation.
265	* - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
266	*/
267	unsigned int opts;
268	/* This field is unsed when using NCQ. */
269	union {
270	unsigned int byte_count;
271	unsigned int status;
272	};
273	/*
274	* Lower 32 bits of the command table address associated with this
275	* header. The command table addresses must be 128 byte aligned.
276	*/
277	unsigned int ctba;
278	/*
279	* If 64 bit addressing is used this field is the upper 32 bits
280	* of the command table address associated with this command.
281	*/
282	unsigned int ctbau;
283	/* Reserved and unused. */
284	unsigned int res[4];
285	};
286
287	/* Command scatter gather structure (PRD). */
288	struct mtip_cmd_sg {
289	/*
290	* Low 32 bits of the data buffer address. For P320 this
291	* address must be 8 byte aligned signified by bits 2:0 being
292	* set to 0.
293	*/
294	unsigned int dba;
295	/*
296	* When 64 bit addressing is used this field is the upper
297	* 32 bits of the data buffer address.
298	*/
299	unsigned int dba_upper;
300	/* Unused. */
301	unsigned int reserved;
302	/*
303	* Bit 31: interrupt when this data block has been transferred.
304	* Bits 30..22: reserved
305	* Bits 21..0: byte count (minus 1). For P320 the byte count must be
306	* 8 byte aligned signified by bits 2:0 being set to 1.
307	*/
308	unsigned int info;
309	};
310	struct mtip_port;
311
312	/* Structure used to describe a command. */
313	struct mtip_cmd {
314
315	struct mtip_cmd_hdr command_header; / ptr to command header entry */
316
317	dma_addr_t command_header_dma; /* corresponding physical address */
318
319	void command; / ptr to command table entry */
320
321	dma_addr_t command_dma; /* corresponding physical address */
322
323	void comp_data; / data passed to completion function comp_func() */
324	/*
325	* Completion function called by the ISR upon completion of
326	* a command.
327	*/
328	void (comp_func)(struct mtip_port port,
329	int tag,
330	void *data,
331	int status);
332	/* Additional callback function that may be called by comp_func() */
333	void (async_callback)(void data, int status);
334
335	void async_data; / Addl. data passed to async_callback() */
336
337	int scatter_ents; /* Number of scatter list entries used */
338
2077d947 AT	339	int unaligned; /* command is unaligned on 4k boundary */
2077d947 AT	340
88523a61 SB	341	struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
	342
	343	int retries; /* The number of retries left for this command. */
	344
	345	int direction; /* Data transfer direction */
	346
	347	unsigned long comp_time; /* command completion time, in jiffies */
	348
60ec0eec	349	atomic_t active; /* declares if this command sent to the drive. */
88523a61 SB	350	};
	351
	352	/* Structure used to describe a port. */
	353	struct mtip_port {
	354	/* Pointer back to the driver data for this port. */
	355	struct driver_data *dd;
	356	/*
	357	* Used to determine if the data pointed to by the
	358	* identify field is valid.
	359	*/
	360	unsigned long identify_valid;
	361	/* Base address of the memory mapped IO for the port. */
	362	void __iomem *mmio;
	363	/* Array of pointers to the memory mapped s_active registers. */
	364	void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
60ec0eec	365	/* Array of pointers to the memory mapped completed registers. */
88523a61 SB	366	void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
	367	/* Array of pointers to the memory mapped Command Issue registers. */
	368	void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
	369	/*
	370	* Pointer to the beginning of the command header memory as used
	371	* by the driver.
	372	*/
	373	void *command_list;
	374	/*
	375	* Pointer to the beginning of the command header memory as used
	376	* by the DMA.
	377	*/
	378	dma_addr_t command_list_dma;
	379	/*
	380	* Pointer to the beginning of the RX FIS memory as used
	381	* by the driver.
	382	*/
	383	void *rxfis;
	384	/*
	385	* Pointer to the beginning of the RX FIS memory as used
	386	* by the DMA.
	387	*/
	388	dma_addr_t rxfis_dma;
	389	/*
	390	* Pointer to the beginning of the command table memory as used
	391	* by the driver.
	392	*/
	393	void *command_table;
	394	/*
	395	* Pointer to the beginning of the command table memory as used
	396	* by the DMA.
	397	*/
	398	dma_addr_t command_tbl_dma;
	399	/*
	400	* Pointer to the beginning of the identify data memory as used
	401	* by the driver.
	402	*/
	403	u16 *identify;
	404	/*
	405	* Pointer to the beginning of the identify data memory as used
	406	* by the DMA.
	407	*/
	408	dma_addr_t identify_dma;
	409	/*
	410	* Pointer to the beginning of a sector buffer that is used
	411	* by the driver when issuing internal commands.
	412	*/
	413	u16 *sector_buffer;
	414	/*
	415	* Pointer to the beginning of a sector buffer that is used
	416	* by the DMA when the driver issues internal commands.
	417	*/
	418	dma_addr_t sector_buffer_dma;
	419	/*
	420	* Bit significant, used to determine if a command slot has
	421	* been allocated. i.e. the slot is in use. Bits are cleared
	422	* when the command slot and all associated data structures
	423	* are no longer needed.
	424	*/
f6587217 AT	425	u16 *log_buf;
	426	dma_addr_t log_buf_dma;
	427
	428	u8 *smart_buf;
	429	dma_addr_t smart_buf_dma;
	430
88523a61	431	unsigned long allocated[SLOTBITS_IN_LONGS];
60ec0eec AT	432	/*
	433	* used to queue commands when an internal command is in progress
	434	* or error handling is active
	435	*/
	436	unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
88523a61 SB	437	/*
	438	* Array of command slots. Structure includes pointers to the
	439	* command header and command table, and completion function and data
	440	* pointers.
	441	*/
	442	struct mtip_cmd commands[MTIP_MAX_COMMAND_SLOTS];
60ec0eec AT	443	/* Used by mtip_service_thread to wait for an event */
	444	wait_queue_head_t svc_wait;
	445	/*
	446	* indicates the state of the port. Also, helps the service thread
	447	* to determine its action on wake up.
	448	*/
	449	unsigned long flags;
88523a61 SB	450	/*
	451	* Timer used to complete commands that have been active for too long.
	452	*/
	453	struct timer_list cmd_timer;
c74b0f58	454	unsigned long ic_pause_timer;
88523a61 SB	455	/*
	456	* Semaphore used to block threads if there are no
	457	* command slots available.
	458	*/
	459	struct semaphore cmd_slot;
2077d947 AT	460
	461	/* Semaphore to control queue depth of unaligned IOs */
	462	struct semaphore cmd_slot_unal;
	463
88523a61	464	/* Spinlock for working around command-issue bug. */
16c906e5	465	spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
88523a61 SB	466	};
	467
	468	/*
	469	* Driver private data structure.
	470	*
	471	* One structure is allocated per probed device.
	472	*/
	473	struct driver_data {
	474	void __iomem mmio; / Base address of the HBA registers. */
	475
	476	int major; /* Major device number. */
	477
	478	int instance; /* Instance number. First device probed is 0, ... */
	479
88523a61 SB	480	struct gendisk disk; / Pointer to our gendisk structure. */
	481
	482	struct pci_dev pdev; / Pointer to the PCI device structure. */
	483
	484	struct request_queue queue; / Our request queue. */
88523a61 SB	485
	486	struct mtip_port port; / Pointer to the port data structure. */
	487
88523a61 SB	488	unsigned product_type; /* magic value declaring the product type */
	489
	490	unsigned slot_groups; /* number of slot groups the product supports */
	491
88523a61 SB	492	unsigned long index; /* Index to determine the disk name */
88523a61 SB	493
45038367	494	unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
88523a61	495
60ec0eec	496	struct task_struct mtip_svc_handler; / task_struct of svc thd */
7b421d24 AT	497
7b421d24 AT	498	struct dentry *dfs_node;
16c906e5	499
15283469 AT	500	bool trim_supp; /* flag indicating trim support */
15283469 AT	501
16c906e5 AT	502	int numa_node; /* NUMA support */
	503
	504	char workq_name[32];
	505
	506	struct workqueue_struct *isr_workq;
	507
	508	struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
	509
	510	atomic_t irq_workers_active;
	511
	512	int isr_binding;
0caff003	513
2077d947	514	int unal_qdepth; /* qdepth of unaligned IO queue */
ebb37277	515
0caff003 AT	516	struct list_head online_list; /* linkage for online list */
	517
	518	struct list_head remove_list; /* linkage for removing list */
88523a61 SB	519	};
88523a61 SB	520
88523a61	521	#endif