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nvme: fail SCSI read/write command with unsupported protection bit
[deliverable/linux.git] / drivers / block / nvme-scsi.c
CommitLineData
5d0f6131
VV		 1/*
2 * NVM Express device driver
8757ad65 3 * Copyright (c) 2011-2014, Intel Corporation.
5d0f6131
VV		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
5d0f6131
VV		 13 */
14
15/*
16 * Refer to the SCSI-NVMe Translation spec for details on how
17 * each command is translated.
18 */
19
20#include <linux/nvme.h>
21#include <linux/bio.h>
22#include <linux/bitops.h>
23#include <linux/blkdev.h>
320a3827 24#include <linux/compat.h>
5d0f6131
VV		 25#include <linux/delay.h>
26#include <linux/errno.h>
27#include <linux/fs.h>
28#include <linux/genhd.h>
29#include <linux/idr.h>
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/kdev_t.h>
34#include <linux/kthread.h>
35#include <linux/kernel.h>
36#include <linux/mm.h>
37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <linux/poison.h>
41#include <linux/sched.h>
42#include <linux/slab.h>
43#include <linux/types.h>
3726897e 44#include <asm/unaligned.h>
5d0f6131
VV		 45#include <scsi/sg.h>
46#include <scsi/scsi.h>
47
48
49static int sg_version_num = 30534; /* 2 digits for each component */
50
5d0f6131
VV		 51/* VPD Page Codes */
52#define VPD_SUPPORTED_PAGES 0x00
53#define VPD_SERIAL_NUMBER 0x80
54#define VPD_DEVICE_IDENTIFIERS 0x83
55#define VPD_EXTENDED_INQUIRY 0x86
7f749d9c 56#define VPD_BLOCK_LIMITS 0xB0
5d0f6131
VV		 57#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
58
3726897e 59/* format unit paramter list offsets */
5d0f6131
VV		 60#define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
61#define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
62#define FORMAT_UNIT_PROT_INT_OFFSET 3
63#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
64#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
65
66/* Misc. defines */
5d0f6131
VV		 67#define FIXED_SENSE_DATA 0x70
68#define DESC_FORMAT_SENSE_DATA 0x72
69#define FIXED_SENSE_DATA_ADD_LENGTH 10
70#define LUN_ENTRY_SIZE 8
71#define LUN_DATA_HEADER_SIZE 8
72#define ALL_LUNS_RETURNED 0x02
73#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
74#define RESTRICTED_LUNS_RETURNED 0x00
75#define NVME_POWER_STATE_START_VALID 0x00
76#define NVME_POWER_STATE_ACTIVE 0x01
77#define NVME_POWER_STATE_IDLE 0x02
78#define NVME_POWER_STATE_STANDBY 0x03
79#define NVME_POWER_STATE_LU_CONTROL 0x07
80#define POWER_STATE_0 0
81#define POWER_STATE_1 1
82#define POWER_STATE_2 2
83#define POWER_STATE_3 3
84#define DOWNLOAD_SAVE_ACTIVATE 0x05
85#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
86#define ACTIVATE_DEFERRED_MICROCODE 0x0F
87#define FORMAT_UNIT_IMMED_MASK 0x2
88#define FORMAT_UNIT_IMMED_OFFSET 1
89#define KELVIN_TEMP_FACTOR 273
90#define FIXED_FMT_SENSE_DATA_SIZE 18
91#define DESC_FMT_SENSE_DATA_SIZE 8
92
93/* SCSI/NVMe defines and bit masks */
94#define INQ_STANDARD_INQUIRY_PAGE 0x00
95#define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
96#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
97#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
98#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
7f749d9c 99#define INQ_BDEV_LIMITS_PAGE 0xB0
5d0f6131
VV		 100#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
101#define INQ_SERIAL_NUMBER_LENGTH 0x14
7f749d9c 102#define INQ_NUM_SUPPORTED_VPD_PAGES 6
5d0f6131
VV		 103#define VERSION_SPC_4 0x06
104#define ACA_UNSUPPORTED 0
105#define STANDARD_INQUIRY_LENGTH 36
106#define ADDITIONAL_STD_INQ_LENGTH 31
107#define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
108#define RESERVED_FIELD 0
109
5d0f6131
VV		 110/* Mode Sense/Select defines */
111#define MODE_PAGE_INFO_EXCEP 0x1C
112#define MODE_PAGE_CACHING 0x08
113#define MODE_PAGE_CONTROL 0x0A
114#define MODE_PAGE_POWER_CONDITION 0x1A
115#define MODE_PAGE_RETURN_ALL 0x3F
116#define MODE_PAGE_BLK_DES_LEN 0x08
117#define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
118#define MODE_PAGE_CACHING_LEN 0x14
119#define MODE_PAGE_CONTROL_LEN 0x0C
120#define MODE_PAGE_POW_CND_LEN 0x28
121#define MODE_PAGE_INF_EXC_LEN 0x0C
122#define MODE_PAGE_ALL_LEN 0x54
123#define MODE_SENSE6_MPH_SIZE 4
5d0f6131
VV		 124#define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
125#define MODE_SENSE_PAGE_CODE_OFFSET 2
126#define MODE_SENSE_PAGE_CODE_MASK 0x3F
5d0f6131
VV		 127#define MODE_SENSE_LLBAA_MASK 0x10
128#define MODE_SENSE_LLBAA_SHIFT 4
5d0f6131
VV		 129#define MODE_SENSE_DBD_MASK 8
130#define MODE_SENSE_DBD_SHIFT 3
131#define MODE_SENSE10_MPH_SIZE 8
5d0f6131
VV		 132#define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
133#define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
134#define MODE_SELECT_6_BD_OFFSET 3
135#define MODE_SELECT_10_BD_OFFSET 6
136#define MODE_SELECT_10_LLBAA_OFFSET 4
137#define MODE_SELECT_10_LLBAA_MASK 1
138#define MODE_SELECT_6_MPH_SIZE 4
139#define MODE_SELECT_10_MPH_SIZE 8
140#define CACHING_MODE_PAGE_WCE_MASK 0x04
141#define MODE_SENSE_BLK_DESC_ENABLED 0
142#define MODE_SENSE_BLK_DESC_COUNT 1
143#define MODE_SELECT_PAGE_CODE_MASK 0x3F
144#define SHORT_DESC_BLOCK 8
145#define LONG_DESC_BLOCK 16
146#define MODE_PAGE_POW_CND_LEN_FIELD 0x26
147#define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
148#define MODE_PAGE_CACHING_LEN_FIELD 0x12
149#define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
150#define MODE_SENSE_PC_CURRENT_VALUES 0
151
152/* Log Sense defines */
153#define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
154#define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
155#define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
156#define LOG_PAGE_TEMPERATURE_PAGE 0x0D
5d0f6131 157#define LOG_SENSE_CDB_SP_NOT_ENABLED 0
5d0f6131
VV		 158#define LOG_SENSE_CDB_PC_MASK 0xC0
159#define LOG_SENSE_CDB_PC_SHIFT 6
160#define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
161#define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
5d0f6131
VV		 162#define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
163#define LOG_INFO_EXCP_PAGE_LENGTH 0xC
164#define REMAINING_TEMP_PAGE_LENGTH 0xC
165#define LOG_TEMP_PAGE_LENGTH 0x10
166#define LOG_TEMP_UNKNOWN 0xFF
167#define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
168
169/* Read Capacity defines */
170#define READ_CAP_10_RESP_SIZE 8
171#define READ_CAP_16_RESP_SIZE 32
172
173/* NVMe Namespace and Command Defines */
5d0f6131
VV		 174#define BYTES_TO_DWORDS 4
175#define NVME_MAX_FIRMWARE_SLOT 7
176
177/* Report LUNs defines */
178#define REPORT_LUNS_FIRST_LUN_OFFSET 8
179
180/* SCSI ADDITIONAL SENSE Codes */
181
182#define SCSI_ASC_NO_SENSE 0x00
183#define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
184#define SCSI_ASC_LUN_NOT_READY 0x04
185#define SCSI_ASC_WARNING 0x0B
186#define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
187#define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
188#define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
189#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
190#define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
191#define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
192#define SCSI_ASC_ILLEGAL_COMMAND 0x20
193#define SCSI_ASC_ILLEGAL_BLOCK 0x21
194#define SCSI_ASC_INVALID_CDB 0x24
195#define SCSI_ASC_INVALID_LUN 0x25
196#define SCSI_ASC_INVALID_PARAMETER 0x26
197#define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
198#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
199
200/* SCSI ADDITIONAL SENSE Code Qualifiers */
201
202#define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
203#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
204#define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
205#define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
206#define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
207#define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
208#define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
209#define SCSI_ASCQ_INVALID_LUN_ID 0x09
210
3726897e
CH		 211/* copied from drivers/usb/gadget/function/storage_common.h */
212static inline u32 get_unaligned_be24(u8 *buf)
213{
214 return 0xffffff & (u32) get_unaligned_be32(buf - 1);
215}
5d0f6131
VV		 216
217/* Struct to gather data that needs to be extracted from a SCSI CDB.
218 Not conforming to any particular CDB variant, but compatible with all. */
219
220struct nvme_trans_io_cdb {
221 u8 fua;
222 u8 prot_info;
223 u64 lba;
224 u32 xfer_len;
225};
226
227
228/* Internal Helper Functions */
229
230
231/* Copy data to userspace memory */
232
233static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
234 unsigned long n)
235{
5d0f6131
VV		 236 int i;
237 void *index = from;
238 size_t remaining = n;
239 size_t xfer_len;
240
241 if (hdr->iovec_count > 0) {
8741ee4c 242 struct sg_iovec sgl;
5d0f6131
VV		 243
244 for (i = 0; i < hdr->iovec_count; i++) {
e61b0a86 245 if (copy_from_user(&sgl, hdr->dxferp +
8741ee4c 246 i * sizeof(struct sg_iovec),
e61b0a86 247 sizeof(struct sg_iovec)))
8741ee4c
VV		 248 return -EFAULT;
249 xfer_len = min(remaining, sgl.iov_len);
e61b0a86
CH		 250 if (copy_to_user(sgl.iov_base, index, xfer_len))
251 return -EFAULT;
252
5d0f6131
VV		 253 index += xfer_len;
254 remaining -= xfer_len;
255 if (remaining == 0)
256 break;
257 }
e61b0a86 258 return 0;
5d0f6131 259 }
e61b0a86
CH		 260
261 if (copy_to_user(hdr->dxferp, from, n))
262 return -EFAULT;
263 return 0;
5d0f6131
VV		 264}
265
266/* Copy data from userspace memory */
267
268static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
269 unsigned long n)
270{
5d0f6131
VV		 271 int i;
272 void *index = to;
273 size_t remaining = n;
274 size_t xfer_len;
275
276 if (hdr->iovec_count > 0) {
8741ee4c 277 struct sg_iovec sgl;
5d0f6131
VV		 278
279 for (i = 0; i < hdr->iovec_count; i++) {
e61b0a86 280 if (copy_from_user(&sgl, hdr->dxferp +
8741ee4c 281 i * sizeof(struct sg_iovec),
e61b0a86 282 sizeof(struct sg_iovec)))
8741ee4c
VV		 283 return -EFAULT;
284 xfer_len = min(remaining, sgl.iov_len);
e61b0a86
CH		 285 if (copy_from_user(index, sgl.iov_base, xfer_len))
286 return -EFAULT;
5d0f6131
VV		 287 index += xfer_len;
288 remaining -= xfer_len;
289 if (remaining == 0)
290 break;
291 }
e61b0a86 292 return 0;
5d0f6131
VV		 293 }
294
e61b0a86
CH		 295 if (copy_from_user(to, hdr->dxferp, n))
296 return -EFAULT;
297 return 0;
5d0f6131
VV		 298}
299
300/* Status/Sense Buffer Writeback */
301
302static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
303 u8 asc, u8 ascq)
304{
5d0f6131
VV		 305 u8 xfer_len;
306 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
307
308 if (scsi_status_is_good(status)) {
309 hdr->status = SAM_STAT_GOOD;
310 hdr->masked_status = GOOD;
311 hdr->host_status = DID_OK;
312 hdr->driver_status = DRIVER_OK;
313 hdr->sb_len_wr = 0;
314 } else {
315 hdr->status = status;
316 hdr->masked_status = status >> 1;
317 hdr->host_status = DID_OK;
318 hdr->driver_status = DRIVER_OK;
319
320 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
321 resp[0] = DESC_FORMAT_SENSE_DATA;
322 resp[1] = sense_key;
323 resp[2] = asc;
324 resp[3] = ascq;
325
326 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
327 hdr->sb_len_wr = xfer_len;
8741ee4c 328 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
e61b0a86 329 return -EFAULT;
5d0f6131
VV		 330 }
331
e61b0a86 332 return 0;
5d0f6131
VV		 333}
334
e61b0a86
CH		 335/*
336 * Take a status code from a lowlevel routine, and if it was a positive NVMe
337 * error code update the sense data based on it. In either case the passed
338 * in value is returned again, unless an -EFAULT from copy_to_user overrides
339 * it.
340 */
5d0f6131
VV		 341static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
342{
343 u8 status, sense_key, asc, ascq;
e61b0a86 344 int res;
5d0f6131
VV		 345
346 /* For non-nvme (Linux) errors, simply return the error code */
347 if (nvme_sc < 0)
348 return nvme_sc;
349
350 /* Mask DNR, More, and reserved fields */
e61b0a86 351 switch (nvme_sc & 0x7FF) {
5d0f6131
VV		 352 /* Generic Command Status */
353 case NVME_SC_SUCCESS:
354 status = SAM_STAT_GOOD;
355 sense_key = NO_SENSE;
356 asc = SCSI_ASC_NO_SENSE;
357 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
358 break;
359 case NVME_SC_INVALID_OPCODE:
360 status = SAM_STAT_CHECK_CONDITION;
361 sense_key = ILLEGAL_REQUEST;
362 asc = SCSI_ASC_ILLEGAL_COMMAND;
363 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
364 break;
365 case NVME_SC_INVALID_FIELD:
366 status = SAM_STAT_CHECK_CONDITION;
367 sense_key = ILLEGAL_REQUEST;
368 asc = SCSI_ASC_INVALID_CDB;
369 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
370 break;
371 case NVME_SC_DATA_XFER_ERROR:
372 status = SAM_STAT_CHECK_CONDITION;
373 sense_key = MEDIUM_ERROR;
374 asc = SCSI_ASC_NO_SENSE;
375 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
376 break;
377 case NVME_SC_POWER_LOSS:
378 status = SAM_STAT_TASK_ABORTED;
379 sense_key = ABORTED_COMMAND;
380 asc = SCSI_ASC_WARNING;
381 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
382 break;
383 case NVME_SC_INTERNAL:
384 status = SAM_STAT_CHECK_CONDITION;
385 sense_key = HARDWARE_ERROR;
386 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
387 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
388 break;
389 case NVME_SC_ABORT_REQ:
390 status = SAM_STAT_TASK_ABORTED;
391 sense_key = ABORTED_COMMAND;
392 asc = SCSI_ASC_NO_SENSE;
393 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
394 break;
395 case NVME_SC_ABORT_QUEUE:
396 status = SAM_STAT_TASK_ABORTED;
397 sense_key = ABORTED_COMMAND;
398 asc = SCSI_ASC_NO_SENSE;
399 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
400 break;
401 case NVME_SC_FUSED_FAIL:
402 status = SAM_STAT_TASK_ABORTED;
403 sense_key = ABORTED_COMMAND;
404 asc = SCSI_ASC_NO_SENSE;
405 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
406 break;
407 case NVME_SC_FUSED_MISSING:
408 status = SAM_STAT_TASK_ABORTED;
409 sense_key = ABORTED_COMMAND;
410 asc = SCSI_ASC_NO_SENSE;
411 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
412 break;
413 case NVME_SC_INVALID_NS:
414 status = SAM_STAT_CHECK_CONDITION;
415 sense_key = ILLEGAL_REQUEST;
416 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
417 ascq = SCSI_ASCQ_INVALID_LUN_ID;
418 break;
419 case NVME_SC_LBA_RANGE:
420 status = SAM_STAT_CHECK_CONDITION;
421 sense_key = ILLEGAL_REQUEST;
422 asc = SCSI_ASC_ILLEGAL_BLOCK;
423 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
424 break;
425 case NVME_SC_CAP_EXCEEDED:
426 status = SAM_STAT_CHECK_CONDITION;
427 sense_key = MEDIUM_ERROR;
428 asc = SCSI_ASC_NO_SENSE;
429 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
430 break;
431 case NVME_SC_NS_NOT_READY:
432 status = SAM_STAT_CHECK_CONDITION;
433 sense_key = NOT_READY;
434 asc = SCSI_ASC_LUN_NOT_READY;
435 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
436 break;
437
438 /* Command Specific Status */
439 case NVME_SC_INVALID_FORMAT:
440 status = SAM_STAT_CHECK_CONDITION;
441 sense_key = ILLEGAL_REQUEST;
442 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
443 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
444 break;
445 case NVME_SC_BAD_ATTRIBUTES:
446 status = SAM_STAT_CHECK_CONDITION;
447 sense_key = ILLEGAL_REQUEST;
448 asc = SCSI_ASC_INVALID_CDB;
449 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
450 break;
451
452 /* Media Errors */
453 case NVME_SC_WRITE_FAULT:
454 status = SAM_STAT_CHECK_CONDITION;
455 sense_key = MEDIUM_ERROR;
456 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
457 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
458 break;
459 case NVME_SC_READ_ERROR:
460 status = SAM_STAT_CHECK_CONDITION;
461 sense_key = MEDIUM_ERROR;
462 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
463 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
464 break;
465 case NVME_SC_GUARD_CHECK:
466 status = SAM_STAT_CHECK_CONDITION;
467 sense_key = MEDIUM_ERROR;
468 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
469 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
470 break;
471 case NVME_SC_APPTAG_CHECK:
472 status = SAM_STAT_CHECK_CONDITION;
473 sense_key = MEDIUM_ERROR;
474 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
475 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
476 break;
477 case NVME_SC_REFTAG_CHECK:
478 status = SAM_STAT_CHECK_CONDITION;
479 sense_key = MEDIUM_ERROR;
480 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
481 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
482 break;
483 case NVME_SC_COMPARE_FAILED:
484 status = SAM_STAT_CHECK_CONDITION;
485 sense_key = MISCOMPARE;
486 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
487 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
488 break;
489 case NVME_SC_ACCESS_DENIED:
490 status = SAM_STAT_CHECK_CONDITION;
491 sense_key = ILLEGAL_REQUEST;
492 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
493 ascq = SCSI_ASCQ_INVALID_LUN_ID;
494 break;
495
496 /* Unspecified/Default */
497 case NVME_SC_CMDID_CONFLICT:
498 case NVME_SC_CMD_SEQ_ERROR:
499 case NVME_SC_CQ_INVALID:
500 case NVME_SC_QID_INVALID:
501 case NVME_SC_QUEUE_SIZE:
502 case NVME_SC_ABORT_LIMIT:
503 case NVME_SC_ABORT_MISSING:
504 case NVME_SC_ASYNC_LIMIT:
505 case NVME_SC_FIRMWARE_SLOT:
506 case NVME_SC_FIRMWARE_IMAGE:
507 case NVME_SC_INVALID_VECTOR:
508 case NVME_SC_INVALID_LOG_PAGE:
509 default:
510 status = SAM_STAT_CHECK_CONDITION;
511 sense_key = ILLEGAL_REQUEST;
512 asc = SCSI_ASC_NO_SENSE;
513 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
514 break;
515 }
516
517 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
e61b0a86 518 return res ? res : nvme_sc;
5d0f6131
VV		 519}
520
521/* INQUIRY Helper Functions */
522
523static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
524 struct sg_io_hdr *hdr, u8 *inq_response,
525 int alloc_len)
526{
527 struct nvme_dev *dev = ns->dev;
528 dma_addr_t dma_addr;
529 void *mem;
530 struct nvme_id_ns *id_ns;
e61b0a86 531 int res;
5d0f6131
VV		 532 int nvme_sc;
533 int xfer_len;
534 u8 resp_data_format = 0x02;
535 u8 protect;
536 u8 cmdque = 0x01 << 1;
dedf4b15 537 u8 fw_offset = sizeof(dev->firmware_rev);
5d0f6131 538
e75ec752 539 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
5d0f6131
VV		 540 &dma_addr, GFP_KERNEL);
541 if (mem == NULL) {
542 res = -ENOMEM;
543 goto out_dma;
544 }
545
546 /* nvme ns identify - use DPS value for PROTECT field */
547 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
548 res = nvme_trans_status_code(hdr, nvme_sc);
5d0f6131
VV		 549 if (res)
550 goto out_free;
e61b0a86 551
5d0f6131
VV		 552 id_ns = mem;
553 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
554
555 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
556 inq_response[2] = VERSION_SPC_4;
557 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
558 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
559 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
560 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
561 strncpy(&inq_response[8], "NVMe ", 8);
562 strncpy(&inq_response[16], dev->model, 16);
dedf4b15
KB		 563
564 while (dev->firmware_rev[fw_offset - 1] == ' ' && fw_offset > 4)
565 fw_offset--;
566 fw_offset -= 4;
567 strncpy(&inq_response[32], dev->firmware_rev + fw_offset, 4);
5d0f6131
VV		 568
569 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
570 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
571
572 out_free:
e75ec752 573 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
5d0f6131
VV		 574 out_dma:
575 return res;
576}
577
578static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
579 struct sg_io_hdr *hdr, u8 *inq_response,
580 int alloc_len)
581{
5d0f6131
VV		 582 int xfer_len;
583
584 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
585 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
586 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
587 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
588 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
589 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
590 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
591 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
7f749d9c 592 inq_response[9] = INQ_BDEV_LIMITS_PAGE;
5d0f6131
VV		 593
594 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
e61b0a86 595 return nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
5d0f6131
VV		 596}
597
598static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
599 struct sg_io_hdr *hdr, u8 *inq_response,
600 int alloc_len)
601{
602 struct nvme_dev *dev = ns->dev;
5d0f6131
VV		 603 int xfer_len;
604
605 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
606 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
607 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
608 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
609
610 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
e61b0a86 611 return nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
5d0f6131
VV		 612}
613
614static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
615 u8 *inq_response, int alloc_len)
616{
617 struct nvme_dev *dev = ns->dev;
618 dma_addr_t dma_addr;
619 void *mem;
e61b0a86 620 int res;
5d0f6131 621 int nvme_sc;
5d0f6131 622 int xfer_len;
8741ee4c 623 __be32 tmp_id = cpu_to_be32(ns->ns_id);
5d0f6131 624
e75ec752 625 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
5d0f6131
VV		 626 &dma_addr, GFP_KERNEL);
627 if (mem == NULL) {
628 res = -ENOMEM;
629 goto out_dma;
630 }
631
4f1982b4 632 memset(inq_response, 0, alloc_len);
5d0f6131 633 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
4f1982b4
KB		 634 if (readl(&dev->bar->vs) >= NVME_VS(1, 1)) {
635 struct nvme_id_ns *id_ns = mem;
636 void *eui = id_ns->eui64;
637 int len = sizeof(id_ns->eui64);
5d0f6131 638
4f1982b4
KB		 639 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
640 res = nvme_trans_status_code(hdr, nvme_sc);
641 if (res)
642 goto out_free;
4f1982b4
KB		 643
644 if (readl(&dev->bar->vs) >= NVME_VS(1, 2)) {
645 if (bitmap_empty(eui, len * 8)) {
646 eui = id_ns->nguid;
647 len = sizeof(id_ns->nguid);
648 }
649 }
650 if (bitmap_empty(eui, len * 8))
651 goto scsi_string;
652
653 inq_response[3] = 4 + len; /* Page Length */
654 /* Designation Descriptor start */
655 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
656 inq_response[5] = 0x02; /* PIV=0b | Asso=00b | Designator Type=2h */
657 inq_response[6] = 0x00; /* Rsvd */
658 inq_response[7] = len; /* Designator Length */
659 memcpy(&inq_response[8], eui, len);
660 } else {
661 scsi_string:
662 if (alloc_len < 72) {
663 res = nvme_trans_completion(hdr,
664 SAM_STAT_CHECK_CONDITION,
665 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
666 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
667 goto out_free;
668 }
669 inq_response[3] = 0x48; /* Page Length */
670 /* Designation Descriptor start */
671 inq_response[4] = 0x03; /* Proto ID=0h | Code set=3h */
672 inq_response[5] = 0x08; /* PIV=0b | Asso=00b | Designator Type=8h */
673 inq_response[6] = 0x00; /* Rsvd */
674 inq_response[7] = 0x44; /* Designator Length */
675
e75ec752 676 sprintf(&inq_response[8], "%04x", to_pci_dev(dev->dev)->vendor);
4f1982b4
KB		 677 memcpy(&inq_response[12], dev->model, sizeof(dev->model));
678 sprintf(&inq_response[52], "%04x", tmp_id);
679 memcpy(&inq_response[56], dev->serial, sizeof(dev->serial));
680 }
681 xfer_len = alloc_len;
5d0f6131
VV		 682 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
683
684 out_free:
e75ec752 685 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
5d0f6131
VV		 686 out_dma:
687 return res;
688}
689
690static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
691 int alloc_len)
692{
693 u8 *inq_response;
e61b0a86 694 int res;
5d0f6131
VV		 695 int nvme_sc;
696 struct nvme_dev *dev = ns->dev;
697 dma_addr_t dma_addr;
698 void *mem;
699 struct nvme_id_ctrl *id_ctrl;
700 struct nvme_id_ns *id_ns;
701 int xfer_len;
702 u8 microcode = 0x80;
703 u8 spt;
704 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
705 u8 grd_chk, app_chk, ref_chk, protect;
706 u8 uask_sup = 0x20;
707 u8 v_sup;
708 u8 luiclr = 0x01;
709
710 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
711 if (inq_response == NULL) {
712 res = -ENOMEM;
713 goto out_mem;
714 }
715
e75ec752 716 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
5d0f6131
VV		 717 &dma_addr, GFP_KERNEL);
718 if (mem == NULL) {
719 res = -ENOMEM;
720 goto out_dma;
721 }
722
723 /* nvme ns identify */
724 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
725 res = nvme_trans_status_code(hdr, nvme_sc);
726 if (res)
727 goto out_free;
e61b0a86 728
5d0f6131
VV		 729 id_ns = mem;
730 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
731 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
732 grd_chk = protect << 2;
733 app_chk = protect << 1;
734 ref_chk = protect;
735
736 /* nvme controller identify */
737 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
738 res = nvme_trans_status_code(hdr, nvme_sc);
739 if (res)
740 goto out_free;
e61b0a86 741
5d0f6131
VV		 742 id_ctrl = mem;
743 v_sup = id_ctrl->vwc;
744
745 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
746 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
747 inq_response[2] = 0x00; /* Page Length MSB */
748 inq_response[3] = 0x3C; /* Page Length LSB */
749 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
750 inq_response[5] = uask_sup;
751 inq_response[6] = v_sup;
752 inq_response[7] = luiclr;
753 inq_response[8] = 0;
754 inq_response[9] = 0;
755
756 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
757 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
758
759 out_free:
e75ec752 760 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
5d0f6131
VV		 761 out_dma:
762 kfree(inq_response);
763 out_mem:
764 return res;
765}
766
7f749d9c
KB		 767static int nvme_trans_bdev_limits_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
768 u8 *inq_response, int alloc_len)
769{
770 __be32 max_sectors = cpu_to_be32(queue_max_hw_sectors(ns->queue));
771 __be32 max_discard = cpu_to_be32(ns->queue->limits.max_discard_sectors);
772 __be32 discard_desc_count = cpu_to_be32(0x100);
773
774 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
775 inq_response[1] = VPD_BLOCK_LIMITS;
776 inq_response[3] = 0x3c; /* Page Length */
777 memcpy(&inq_response[8], &max_sectors, sizeof(u32));
778 memcpy(&inq_response[20], &max_discard, sizeof(u32));
779
780 if (max_discard)
781 memcpy(&inq_response[24], &discard_desc_count, sizeof(u32));
782
783 return nvme_trans_copy_to_user(hdr, inq_response, 0x3c);
784}
785
5d0f6131
VV		 786static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
787 int alloc_len)
788{
789 u8 *inq_response;
e61b0a86 790 int res;
5d0f6131
VV		 791 int xfer_len;
792
03ea83e9 793 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV		 794 if (inq_response == NULL) {
795 res = -ENOMEM;
796 goto out_mem;
797 }
798
5d0f6131
VV		 799 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
800 inq_response[2] = 0x00; /* Page Length MSB */
801 inq_response[3] = 0x3C; /* Page Length LSB */
802 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
803 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
804 inq_response[6] = 0x00; /* Form Factor */
805
806 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
807 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
808
809 kfree(inq_response);
810 out_mem:
811 return res;
812}
813
814/* LOG SENSE Helper Functions */
815
816static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
817 int alloc_len)
818{
e61b0a86 819 int res;
5d0f6131
VV		 820 int xfer_len;
821 u8 *log_response;
822
03ea83e9 823 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
5d0f6131
VV		 824 if (log_response == NULL) {
825 res = -ENOMEM;
826 goto out_mem;
827 }
5d0f6131
VV		 828
829 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
830 /* Subpage=0x00, Page Length MSB=0 */
831 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
832 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
833 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
834 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
835
836 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
837 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
838
839 kfree(log_response);
840 out_mem:
841 return res;
842}
843
844static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
845 struct sg_io_hdr *hdr, int alloc_len)
846{
e61b0a86 847 int res;
5d0f6131
VV		 848 int xfer_len;
849 u8 *log_response;
850 struct nvme_command c;
851 struct nvme_dev *dev = ns->dev;
852 struct nvme_smart_log *smart_log;
853 dma_addr_t dma_addr;
854 void *mem;
855 u8 temp_c;
856 u16 temp_k;
857
03ea83e9 858 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV		 859 if (log_response == NULL) {
860 res = -ENOMEM;
861 goto out_mem;
862 }
5d0f6131 863
e75ec752 864 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_smart_log),
5d0f6131
VV		 865 &dma_addr, GFP_KERNEL);
866 if (mem == NULL) {
867 res = -ENOMEM;
868 goto out_dma;
869 }
870
871 /* Get SMART Log Page */
872 memset(&c, 0, sizeof(c));
873 c.common.opcode = nvme_admin_get_log_page;
874 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
875 c.common.prp1 = cpu_to_le64(dma_addr);
4131f2fc 876 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
ef351b97 877 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
f705f837 878 res = nvme_submit_sync_cmd(dev->admin_q, &c);
5d0f6131
VV		 879 if (res != NVME_SC_SUCCESS) {
880 temp_c = LOG_TEMP_UNKNOWN;
881 } else {
882 smart_log = mem;
883 temp_k = (smart_log->temperature[1] << 8) +
884 (smart_log->temperature[0]);
885 temp_c = temp_k - KELVIN_TEMP_FACTOR;
886 }
887
888 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
889 /* Subpage=0x00, Page Length MSB=0 */
890 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
891 /* Informational Exceptions Log Parameter 1 Start */
892 /* Parameter Code=0x0000 bytes 4,5 */
893 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
894 log_response[7] = 0x04; /* PARAMETER LENGTH */
895 /* Add sense Code and qualifier = 0x00 each */
896 /* Use Temperature from NVMe Get Log Page, convert to C from K */
897 log_response[10] = temp_c;
898
899 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
900 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
901
e75ec752 902 dma_free_coherent(dev->dev, sizeof(struct nvme_smart_log),
5d0f6131
VV		 903 mem, dma_addr);
904 out_dma:
905 kfree(log_response);
906 out_mem:
907 return res;
908}
909
910static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
911 int alloc_len)
912{
e61b0a86 913 int res;
5d0f6131
VV		 914 int xfer_len;
915 u8 *log_response;
916 struct nvme_command c;
917 struct nvme_dev *dev = ns->dev;
918 struct nvme_smart_log *smart_log;
919 dma_addr_t dma_addr;
920 void *mem;
921 u32 feature_resp;
922 u8 temp_c_cur, temp_c_thresh;
923 u16 temp_k;
924
03ea83e9 925 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV		 926 if (log_response == NULL) {
927 res = -ENOMEM;
928 goto out_mem;
929 }
5d0f6131 930
e75ec752 931 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_smart_log),
5d0f6131
VV		 932 &dma_addr, GFP_KERNEL);
933 if (mem == NULL) {
934 res = -ENOMEM;
935 goto out_dma;
936 }
937
938 /* Get SMART Log Page */
939 memset(&c, 0, sizeof(c));
940 c.common.opcode = nvme_admin_get_log_page;
941 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
942 c.common.prp1 = cpu_to_le64(dma_addr);
4131f2fc 943 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
ef351b97 944 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
f705f837 945 res = nvme_submit_sync_cmd(dev->admin_q, &c);
5d0f6131
VV		 946 if (res != NVME_SC_SUCCESS) {
947 temp_c_cur = LOG_TEMP_UNKNOWN;
948 } else {
949 smart_log = mem;
950 temp_k = (smart_log->temperature[1] << 8) +
951 (smart_log->temperature[0]);
952 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
953 }
954
955 /* Get Features for Temp Threshold */
956 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
957 &feature_resp);
958 if (res != NVME_SC_SUCCESS)
959 temp_c_thresh = LOG_TEMP_UNKNOWN;
960 else
961 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
962
963 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
964 /* Subpage=0x00, Page Length MSB=0 */
965 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
966 /* Temperature Log Parameter 1 (Temperature) Start */
967 /* Parameter Code = 0x0000 */
968 log_response[6] = 0x01; /* Format and Linking = 01b */
969 log_response[7] = 0x02; /* Parameter Length */
970 /* Use Temperature from NVMe Get Log Page, convert to C from K */
971 log_response[9] = temp_c_cur;
972 /* Temperature Log Parameter 2 (Reference Temperature) Start */
973 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
974 log_response[12] = 0x01; /* Format and Linking = 01b */
975 log_response[13] = 0x02; /* Parameter Length */
976 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
977 log_response[15] = temp_c_thresh;
978
979 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
980 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
981
e75ec752 982 dma_free_coherent(dev->dev, sizeof(struct nvme_smart_log),
5d0f6131
VV		 983 mem, dma_addr);
984 out_dma:
985 kfree(log_response);
986 out_mem:
987 return res;
988}
989
990/* MODE SENSE Helper Functions */
991
992static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
993 u16 mode_data_length, u16 blk_desc_len)
994{
995 /* Quick check to make sure I don't stomp on my own memory... */
996 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
e61b0a86 997 return -EINVAL;
5d0f6131
VV		 998
999 if (cdb10) {
1000 resp[0] = (mode_data_length & 0xFF00) >> 8;
1001 resp[1] = (mode_data_length & 0x00FF);
90851768 1002 resp[3] = 0x10 /* DPOFUA */;
5d0f6131
VV		 1003 resp[4] = llbaa;
1004 resp[5] = RESERVED_FIELD;
1005 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1006 resp[7] = (blk_desc_len & 0x00FF);
1007 } else {
1008 resp[0] = (mode_data_length & 0x00FF);
90851768 1009 resp[2] = 0x10 /* DPOFUA */;
5d0f6131
VV		 1010 resp[3] = (blk_desc_len & 0x00FF);
1011 }
1012
e61b0a86 1013 return 0;
5d0f6131
VV		 1014}
1015
1016static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1017 u8 *resp, int len, u8 llbaa)
1018{
e61b0a86 1019 int res;
5d0f6131
VV		 1020 int nvme_sc;
1021 struct nvme_dev *dev = ns->dev;
1022 dma_addr_t dma_addr;
1023 void *mem;
1024 struct nvme_id_ns *id_ns;
1025 u8 flbas;
1026 u32 lba_length;
1027
1028 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
e61b0a86 1029 return -EINVAL;
5d0f6131 1030 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
e61b0a86 1031 return -EINVAL;
5d0f6131 1032
e75ec752 1033 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
5d0f6131
VV		 1034 &dma_addr, GFP_KERNEL);
1035 if (mem == NULL) {
1036 res = -ENOMEM;
1037 goto out;
1038 }
1039
1040 /* nvme ns identify */
1041 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1042 res = nvme_trans_status_code(hdr, nvme_sc);
1043 if (res)
1044 goto out_dma;
e61b0a86 1045
5d0f6131
VV		 1046 id_ns = mem;
1047 flbas = (id_ns->flbas) & 0x0F;
1048 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1049
1050 if (llbaa == 0) {
8741ee4c 1051 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
5d0f6131 1052 /* Byte 4 is reserved */
8741ee4c 1053 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
5d0f6131
VV		 1054
1055 memcpy(resp, &tmp_cap, sizeof(u32));
1056 memcpy(&resp[4], &tmp_len, sizeof(u32));
1057 } else {
8741ee4c
VV		 1058 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1059 __be32 tmp_len = cpu_to_be32(lba_length);
5d0f6131
VV		 1060
1061 memcpy(resp, &tmp_cap, sizeof(u64));
1062 /* Bytes 8, 9, 10, 11 are reserved */
1063 memcpy(&resp[12], &tmp_len, sizeof(u32));
1064 }
1065
1066 out_dma:
e75ec752 1067 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
5d0f6131
VV		 1068 out:
1069 return res;
1070}
1071
1072static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1073 struct sg_io_hdr *hdr, u8 *resp,
1074 int len)
1075{
1076 if (len < MODE_PAGE_CONTROL_LEN)
e61b0a86 1077 return -EINVAL;
5d0f6131
VV		 1078
1079 resp[0] = MODE_PAGE_CONTROL;
1080 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1081 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1082 * D_SENSE=1, GLTSD=1, RLEC=0 */
1083 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1084 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1085 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1086 /* resp[6] and [7] are obsolete, thus zero */
1087 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1088 resp[9] = 0xFF;
1089 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1090
e61b0a86 1091 return 0;
5d0f6131
VV		 1092}
1093
1094static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1095 struct sg_io_hdr *hdr,
1096 u8 *resp, int len)
1097{
e61b0a86 1098 int res = 0;
5d0f6131
VV		 1099 int nvme_sc;
1100 struct nvme_dev *dev = ns->dev;
1101 u32 feature_resp;
1102 u8 vwc;
1103
1104 if (len < MODE_PAGE_CACHING_LEN)
e61b0a86 1105 return -EINVAL;
5d0f6131
VV		 1106
1107 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1108 &feature_resp);
1109 res = nvme_trans_status_code(hdr, nvme_sc);
1110 if (res)
e61b0a86
CH		 1111 return res;
1112
5d0f6131
VV		 1113 vwc = feature_resp & 0x00000001;
1114
1115 resp[0] = MODE_PAGE_CACHING;
1116 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1117 resp[2] = vwc << 2;
e61b0a86 1118 return 0;
5d0f6131
VV		 1119}
1120
1121static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1122 struct sg_io_hdr *hdr, u8 *resp,
1123 int len)
1124{
5d0f6131 1125 if (len < MODE_PAGE_POW_CND_LEN)
e61b0a86 1126 return -EINVAL;
5d0f6131
VV		 1127
1128 resp[0] = MODE_PAGE_POWER_CONDITION;
1129 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1130 /* All other bytes are zero */
1131
e61b0a86 1132 return 0;
5d0f6131
VV		 1133}
1134
1135static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1136 struct sg_io_hdr *hdr, u8 *resp,
1137 int len)
1138{
5d0f6131 1139 if (len < MODE_PAGE_INF_EXC_LEN)
e61b0a86 1140 return -EINVAL;
5d0f6131
VV		 1141
1142 resp[0] = MODE_PAGE_INFO_EXCEP;
1143 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1144 resp[2] = 0x88;
1145 /* All other bytes are zero */
1146
e61b0a86 1147 return 0;
5d0f6131
VV		 1148}
1149
1150static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1151 u8 *resp, int len)
1152{
e61b0a86 1153 int res;
5d0f6131
VV		 1154 u16 mode_pages_offset_1 = 0;
1155 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1156
1157 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1158 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1159 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1160
1161 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1162 MODE_PAGE_CACHING_LEN);
e61b0a86
CH		 1163 if (res)
1164 return res;
5d0f6131
VV		 1165 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1166 MODE_PAGE_CONTROL_LEN);
e61b0a86
CH		 1167 if (res)
1168 return res;
5d0f6131
VV		 1169 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1170 MODE_PAGE_POW_CND_LEN);
e61b0a86
CH		 1171 if (res)
1172 return res;
1173 return nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
5d0f6131 1174 MODE_PAGE_INF_EXC_LEN);
5d0f6131
VV		 1175}
1176
1177static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1178{
1179 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1180 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1181 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1182 } else {
1183 return 0;
1184 }
1185}
1186
1187static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1188 struct sg_io_hdr *hdr, u8 *cmd,
1189 u16 alloc_len, u8 cdb10,
1190 int (*mode_page_fill_func)
1191 (struct nvme_ns *,
1192 struct sg_io_hdr *hdr, u8 *, int),
1193 u16 mode_pages_tot_len)
1194{
e61b0a86 1195 int res;
5d0f6131
VV		 1196 int xfer_len;
1197 u8 *response;
1198 u8 dbd, llbaa;
1199 u16 resp_size;
1200 int mph_size;
1201 u16 mode_pages_offset_1;
1202 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1203
3726897e
CH		 1204 dbd = (cmd[1] & MODE_SENSE_DBD_MASK) >> MODE_SENSE_DBD_SHIFT;
1205 llbaa = (cmd[1] & MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT;
1206 mph_size = cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE;
1207
5d0f6131
VV		 1208 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1209
1210 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1211 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1212 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1213
1214 blk_desc_offset = mph_size;
1215 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1216
03ea83e9 1217 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 1218 if (response == NULL) {
1219 res = -ENOMEM;
1220 goto out_mem;
1221 }
5d0f6131
VV		 1222
1223 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1224 llbaa, mode_data_length, blk_desc_len);
e61b0a86 1225 if (res)
5d0f6131
VV		 1226 goto out_free;
1227 if (blk_desc_len > 0) {
1228 res = nvme_trans_fill_blk_desc(ns, hdr,
1229 &response[blk_desc_offset],
1230 blk_desc_len, llbaa);
e61b0a86 1231 if (res)
5d0f6131
VV		 1232 goto out_free;
1233 }
1234 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1235 mode_pages_tot_len);
e61b0a86 1236 if (res)
5d0f6131
VV		 1237 goto out_free;
1238
1239 xfer_len = min(alloc_len, resp_size);
1240 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1241
1242 out_free:
1243 kfree(response);
1244 out_mem:
1245 return res;
1246}
1247
1248/* Read Capacity Helper Functions */
1249
1250static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1251 u8 cdb16)
1252{
1253 u8 flbas;
1254 u32 lba_length;
1255 u64 rlba;
1256 u8 prot_en;
1257 u8 p_type_lut[4] = {0, 0, 1, 2};
8741ee4c
VV		 1258 __be64 tmp_rlba;
1259 __be32 tmp_rlba_32;
1260 __be32 tmp_len;
5d0f6131
VV		 1261
1262 flbas = (id_ns->flbas) & 0x0F;
1263 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1264 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1265 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1266
1267 if (!cdb16) {
1268 if (rlba > 0xFFFFFFFF)
1269 rlba = 0xFFFFFFFF;
1270 tmp_rlba_32 = cpu_to_be32(rlba);
1271 tmp_len = cpu_to_be32(lba_length);
1272 memcpy(response, &tmp_rlba_32, sizeof(u32));
1273 memcpy(&response[4], &tmp_len, sizeof(u32));
1274 } else {
1275 tmp_rlba = cpu_to_be64(rlba);
1276 tmp_len = cpu_to_be32(lba_length);
1277 memcpy(response, &tmp_rlba, sizeof(u64));
1278 memcpy(&response[8], &tmp_len, sizeof(u32));
1279 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1280 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1281 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1282 /* Bytes 16-31 - Reserved */
1283 }
1284}
1285
1286/* Start Stop Unit Helper Functions */
1287
1288static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1289 u8 pc, u8 pcmod, u8 start)
1290{
e61b0a86 1291 int res;
5d0f6131
VV		 1292 int nvme_sc;
1293 struct nvme_dev *dev = ns->dev;
1294 dma_addr_t dma_addr;
1295 void *mem;
1296 struct nvme_id_ctrl *id_ctrl;
1297 int lowest_pow_st; /* max npss = lowest power consumption */
1298 unsigned ps_desired = 0;
1299
1300 /* NVMe Controller Identify */
e75ec752 1301 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ctrl),
5d0f6131
VV		 1302 &dma_addr, GFP_KERNEL);
1303 if (mem == NULL) {
1304 res = -ENOMEM;
1305 goto out;
1306 }
1307 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1308 res = nvme_trans_status_code(hdr, nvme_sc);
1309 if (res)
1310 goto out_dma;
e61b0a86 1311
5d0f6131 1312 id_ctrl = mem;
b8e08084 1313 lowest_pow_st = max(POWER_STATE_0, (int)(id_ctrl->npss - 1));
5d0f6131
VV		 1314
1315 switch (pc) {
1316 case NVME_POWER_STATE_START_VALID:
1317 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1318 if (pcmod == 0 && start == 0x1)
1319 ps_desired = POWER_STATE_0;
1320 if (pcmod == 0 && start == 0x0)
1321 ps_desired = lowest_pow_st;
1322 break;
1323 case NVME_POWER_STATE_ACTIVE:
1324 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1325 if (pcmod == 0)
1326 ps_desired = POWER_STATE_0;
1327 break;
1328 case NVME_POWER_STATE_IDLE:
1329 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
5d0f6131 1330 if (pcmod == 0x0)
b8e08084 1331 ps_desired = POWER_STATE_1;
5d0f6131 1332 else if (pcmod == 0x1)
b8e08084 1333 ps_desired = POWER_STATE_2;
5d0f6131 1334 else if (pcmod == 0x2)
b8e08084 1335 ps_desired = POWER_STATE_3;
5d0f6131
VV		 1336 break;
1337 case NVME_POWER_STATE_STANDBY:
1338 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1339 if (pcmod == 0x0)
b8e08084 1340 ps_desired = max(POWER_STATE_0, (lowest_pow_st - 2));
5d0f6131 1341 else if (pcmod == 0x1)
b8e08084 1342 ps_desired = max(POWER_STATE_0, (lowest_pow_st - 1));
5d0f6131
VV		 1343 break;
1344 case NVME_POWER_STATE_LU_CONTROL:
1345 default:
1346 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1347 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1348 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1349 break;
1350 }
1351 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1352 NULL);
1353 res = nvme_trans_status_code(hdr, nvme_sc);
e61b0a86 1354
5d0f6131 1355 out_dma:
e75ec752 1356 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ctrl), mem, dma_addr);
5d0f6131
VV		 1357 out:
1358 return res;
1359}
1360
b90c48d0
CH		 1361static int nvme_trans_send_activate_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1362 u8 buffer_id)
1363{
1364 struct nvme_command c;
1365 int nvme_sc;
b90c48d0
CH		 1366
1367 memset(&c, 0, sizeof(c));
1368 c.common.opcode = nvme_admin_activate_fw;
1369 c.common.cdw10[0] = cpu_to_le32(buffer_id | NVME_FWACT_REPL_ACTV);
1370
1371 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
e61b0a86 1372 return nvme_trans_status_code(hdr, nvme_sc);
b90c48d0 1373}
5d0f6131 1374
b90c48d0 1375static int nvme_trans_send_download_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
5d0f6131
VV		 1376 u8 opcode, u32 tot_len, u32 offset,
1377 u8 buffer_id)
1378{
e61b0a86 1379 int res;
5d0f6131
VV		 1380 int nvme_sc;
1381 struct nvme_dev *dev = ns->dev;
1382 struct nvme_command c;
1383 struct nvme_iod *iod = NULL;
1384 unsigned length;
1385
1386 memset(&c, 0, sizeof(c));
b90c48d0 1387 c.common.opcode = nvme_admin_download_fw;
5d0f6131 1388
b90c48d0
CH		 1389 if (hdr->iovec_count > 0) {
1390 /* Assuming SGL is not allowed for this command */
1391 return nvme_trans_completion(hdr,
1392 SAM_STAT_CHECK_CONDITION,
1393 ILLEGAL_REQUEST,
1394 SCSI_ASC_INVALID_CDB,
1395 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1396 }
1397 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1398 (unsigned long)hdr->dxferp, tot_len);
1399 if (IS_ERR(iod))
1400 return PTR_ERR(iod);
1401 length = nvme_setup_prps(dev, iod, tot_len, GFP_KERNEL);
1402 if (length != tot_len) {
1403 res = -ENOMEM;
1404 goto out_unmap;
5d0f6131
VV		 1405 }
1406
b90c48d0
CH		 1407 c.dlfw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1408 c.dlfw.prp2 = cpu_to_le64(iod->first_dma);
1409 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1410 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
1411
f705f837 1412 nvme_sc = nvme_submit_sync_cmd(dev->admin_q, &c);
5d0f6131 1413 res = nvme_trans_status_code(hdr, nvme_sc);
5d0f6131
VV		 1414
1415 out_unmap:
b90c48d0
CH		 1416 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1417 nvme_free_iod(dev, iod);
5d0f6131
VV		 1418 return res;
1419}
1420
1421/* Mode Select Helper Functions */
1422
1423static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1424 u16 *bd_len, u8 *llbaa)
1425{
1426 if (cdb10) {
1427 /* 10 Byte CDB */
1428 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1429 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
9ac16938 1430 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &
5d0f6131
VV		 1431 MODE_SELECT_10_LLBAA_MASK;
1432 } else {
1433 /* 6 Byte CDB */
1434 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1435 }
1436}
1437
1438static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1439 u16 idx, u16 bd_len, u8 llbaa)
1440{
1441 u16 bd_num;
1442
1443 bd_num = bd_len / ((llbaa == 0) ?
1444 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1445 /* Store block descriptor info if a FORMAT UNIT comes later */
1446 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1447 if (llbaa == 0) {
1448 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1449 ns->mode_select_num_blocks =
1450 (parm_list[idx + 1] << 16) +
1451 (parm_list[idx + 2] << 8) +
1452 (parm_list[idx + 3]);
1453
1454 ns->mode_select_block_len =
1455 (parm_list[idx + 5] << 16) +
1456 (parm_list[idx + 6] << 8) +
1457 (parm_list[idx + 7]);
1458 } else {
1459 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1460 ns->mode_select_num_blocks =
1461 (((u64)parm_list[idx + 0]) << 56) +
1462 (((u64)parm_list[idx + 1]) << 48) +
1463 (((u64)parm_list[idx + 2]) << 40) +
1464 (((u64)parm_list[idx + 3]) << 32) +
1465 (((u64)parm_list[idx + 4]) << 24) +
1466 (((u64)parm_list[idx + 5]) << 16) +
1467 (((u64)parm_list[idx + 6]) << 8) +
1468 ((u64)parm_list[idx + 7]);
1469
1470 ns->mode_select_block_len =
1471 (parm_list[idx + 12] << 24) +
1472 (parm_list[idx + 13] << 16) +
1473 (parm_list[idx + 14] << 8) +
1474 (parm_list[idx + 15]);
1475 }
1476}
1477
710a143d 1478static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
5d0f6131
VV		 1479 u8 *mode_page, u8 page_code)
1480{
e61b0a86 1481 int res = 0;
5d0f6131
VV		 1482 int nvme_sc;
1483 struct nvme_dev *dev = ns->dev;
1484 unsigned dword11;
1485
1486 switch (page_code) {
1487 case MODE_PAGE_CACHING:
1488 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1489 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1490 0, NULL);
1491 res = nvme_trans_status_code(hdr, nvme_sc);
5d0f6131
VV		 1492 break;
1493 case MODE_PAGE_CONTROL:
1494 break;
1495 case MODE_PAGE_POWER_CONDITION:
1496 /* Verify the OS is not trying to set timers */
1497 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1498 res = nvme_trans_completion(hdr,
1499 SAM_STAT_CHECK_CONDITION,
1500 ILLEGAL_REQUEST,
1501 SCSI_ASC_INVALID_PARAMETER,
1502 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
5d0f6131
VV		 1503 break;
1504 }
1505 break;
1506 default:
1507 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1508 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1509 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
5d0f6131
VV		 1510 break;
1511 }
1512
1513 return res;
1514}
1515
1516static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1517 u8 *cmd, u16 parm_list_len, u8 pf,
1518 u8 sp, u8 cdb10)
1519{
e61b0a86 1520 int res;
5d0f6131
VV		 1521 u8 *parm_list;
1522 u16 bd_len;
1523 u8 llbaa = 0;
1524 u16 index, saved_index;
1525 u8 page_code;
1526 u16 mp_size;
1527
1528 /* Get parm list from data-in/out buffer */
1529 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1530 if (parm_list == NULL) {
1531 res = -ENOMEM;
1532 goto out;
1533 }
1534
1535 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
e61b0a86 1536 if (res)
5d0f6131
VV		 1537 goto out_mem;
1538
1539 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1540 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1541
1542 if (bd_len != 0) {
1543 /* Block Descriptors present, parse */
1544 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1545 index += bd_len;
1546 }
1547 saved_index = index;
1548
1549 /* Multiple mode pages may be present; iterate through all */
1550 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1551 do {
1552 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1553 mp_size = parm_list[index + 1] + 2;
1554 if ((page_code != MODE_PAGE_CACHING) &&
1555 (page_code != MODE_PAGE_CONTROL) &&
1556 (page_code != MODE_PAGE_POWER_CONDITION)) {
1557 res = nvme_trans_completion(hdr,
1558 SAM_STAT_CHECK_CONDITION,
1559 ILLEGAL_REQUEST,
1560 SCSI_ASC_INVALID_CDB,
1561 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1562 goto out_mem;
1563 }
1564 index += mp_size;
1565 } while (index < parm_list_len);
1566
1567 /* In 2nd Iteration, do the NVME Commands */
1568 index = saved_index;
1569 do {
1570 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1571 mp_size = parm_list[index + 1] + 2;
1572 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1573 page_code);
e61b0a86 1574 if (res)
5d0f6131
VV		 1575 break;
1576 index += mp_size;
1577 } while (index < parm_list_len);
1578
1579 out_mem:
1580 kfree(parm_list);
1581 out:
1582 return res;
1583}
1584
1585/* Format Unit Helper Functions */
1586
1587static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1588 struct sg_io_hdr *hdr)
1589{
e61b0a86 1590 int res = 0;
5d0f6131
VV		 1591 int nvme_sc;
1592 struct nvme_dev *dev = ns->dev;
1593 dma_addr_t dma_addr;
1594 void *mem;
1595 struct nvme_id_ns *id_ns;
1596 u8 flbas;
1597
1598 /*
1599 * SCSI Expects a MODE SELECT would have been issued prior to
1600 * a FORMAT UNIT, and the block size and number would be used
1601 * from the block descriptor in it. If a MODE SELECT had not
1602 * been issued, FORMAT shall use the current values for both.
1603 */
1604
1605 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
e75ec752 1606 mem = dma_alloc_coherent(dev->dev,
5d0f6131
VV		 1607 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1608 if (mem == NULL) {
1609 res = -ENOMEM;
1610 goto out;
1611 }
1612 /* nvme ns identify */
1613 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1614 res = nvme_trans_status_code(hdr, nvme_sc);
1615 if (res)
1616 goto out_dma;
e61b0a86 1617
5d0f6131
VV		 1618 id_ns = mem;
1619
1620 if (ns->mode_select_num_blocks == 0)
8741ee4c 1621 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
5d0f6131
VV		 1622 if (ns->mode_select_block_len == 0) {
1623 flbas = (id_ns->flbas) & 0x0F;
1624 ns->mode_select_block_len =
1625 (1 << (id_ns->lbaf[flbas].ds));
1626 }
1627 out_dma:
e75ec752 1628 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns),
5d0f6131
VV		 1629 mem, dma_addr);
1630 }
1631 out:
1632 return res;
1633}
1634
1635static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1636 u8 format_prot_info, u8 *nvme_pf_code)
1637{
e61b0a86 1638 int res;
5d0f6131
VV		 1639 u8 *parm_list;
1640 u8 pf_usage, pf_code;
1641
1642 parm_list = kmalloc(len, GFP_KERNEL);
1643 if (parm_list == NULL) {
1644 res = -ENOMEM;
1645 goto out;
1646 }
1647 res = nvme_trans_copy_from_user(hdr, parm_list, len);
e61b0a86 1648 if (res)
5d0f6131
VV		 1649 goto out_mem;
1650
1651 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1652 FORMAT_UNIT_IMMED_MASK) != 0) {
1653 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1654 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1655 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1656 goto out_mem;
1657 }
1658
1659 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1660 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1661 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1662 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1663 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1664 goto out_mem;
1665 }
1666 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1667 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1668 pf_code = (pf_usage << 2) | format_prot_info;
1669 switch (pf_code) {
1670 case 0:
1671 *nvme_pf_code = 0;
1672 break;
1673 case 2:
1674 *nvme_pf_code = 1;
1675 break;
1676 case 3:
1677 *nvme_pf_code = 2;
1678 break;
1679 case 7:
1680 *nvme_pf_code = 3;
1681 break;
1682 default:
1683 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1684 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1685 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1686 break;
1687 }
1688
1689 out_mem:
1690 kfree(parm_list);
1691 out:
1692 return res;
1693}
1694
1695static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1696 u8 prot_info)
1697{
e61b0a86 1698 int res;
5d0f6131
VV		 1699 int nvme_sc;
1700 struct nvme_dev *dev = ns->dev;
1701 dma_addr_t dma_addr;
1702 void *mem;
1703 struct nvme_id_ns *id_ns;
1704 u8 i;
1705 u8 flbas, nlbaf;
1706 u8 selected_lbaf = 0xFF;
1707 u32 cdw10 = 0;
1708 struct nvme_command c;
1709
1710 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
e75ec752 1711 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
5d0f6131
VV		 1712 &dma_addr, GFP_KERNEL);
1713 if (mem == NULL) {
1714 res = -ENOMEM;
1715 goto out;
1716 }
1717 /* nvme ns identify */
1718 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1719 res = nvme_trans_status_code(hdr, nvme_sc);
1720 if (res)
1721 goto out_dma;
e61b0a86 1722
5d0f6131
VV		 1723 id_ns = mem;
1724 flbas = (id_ns->flbas) & 0x0F;
1725 nlbaf = id_ns->nlbaf;
1726
1727 for (i = 0; i < nlbaf; i++) {
1728 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1729 selected_lbaf = i;
1730 break;
1731 }
1732 }
1733 if (selected_lbaf > 0x0F) {
1734 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1735 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1736 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1737 }
8741ee4c 1738 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
5d0f6131
VV		 1739 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1740 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1741 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1742 }
1743
1744 cdw10 |= prot_info << 5;
1745 cdw10 |= selected_lbaf & 0x0F;
1746 memset(&c, 0, sizeof(c));
1747 c.format.opcode = nvme_admin_format_nvm;
8741ee4c 1748 c.format.nsid = cpu_to_le32(ns->ns_id);
5d0f6131
VV		 1749 c.format.cdw10 = cpu_to_le32(cdw10);
1750
f705f837 1751 nvme_sc = nvme_submit_sync_cmd(dev->admin_q, &c);
5d0f6131 1752 res = nvme_trans_status_code(hdr, nvme_sc);
5d0f6131
VV		 1753
1754 out_dma:
e75ec752 1755 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
5d0f6131
VV		 1756 out:
1757 return res;
1758}
1759
5d0f6131
VV		 1760static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
1761 struct nvme_trans_io_cdb *cdb_info,
1762 u32 max_blocks)
1763{
1764 /* If using iovecs, send one nvme command per vector */
1765 if (hdr->iovec_count > 0)
1766 return hdr->iovec_count;
1767 else if (cdb_info->xfer_len > max_blocks)
1768 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
1769 else
1770 return 1;
1771}
1772
1773static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
1774 struct nvme_trans_io_cdb *cdb_info)
1775{
1776 u16 control = 0;
1777
1778 /* When Protection information support is added, implement here */
1779
1780 if (cdb_info->fua > 0)
1781 control |= NVME_RW_FUA;
1782
1783 return control;
1784}
1785
1786static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1787 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
1788{
e61b0a86 1789 int nvme_sc = NVME_SC_SUCCESS;
5d0f6131 1790 struct nvme_dev *dev = ns->dev;
5d0f6131
VV		 1791 u32 num_cmds;
1792 struct nvme_iod *iod;
1793 u64 unit_len;
1794 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
1795 u32 retcode;
1796 u32 i = 0;
1797 u64 nvme_offset = 0;
8741ee4c 1798 void __user *next_mapping_addr;
5d0f6131
VV		 1799 struct nvme_command c;
1800 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
1801 u16 control;
ddcb7762 1802 u32 max_blocks = queue_max_hw_sectors(ns->queue);
5d0f6131
VV		 1803
1804 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
1805
1806 /*
1807 * This loop handles two cases.
1808 * First, when an SGL is used in the form of an iovec list:
1809 * - Use iov_base as the next mapping address for the nvme command_id
1810 * - Use iov_len as the data transfer length for the command.
1811 * Second, when we have a single buffer
1812 * - If larger than max_blocks, split into chunks, offset
1813 * each nvme command accordingly.
1814 */
1815 for (i = 0; i < num_cmds; i++) {
1816 memset(&c, 0, sizeof(c));
1817 if (hdr->iovec_count > 0) {
8741ee4c
VV		 1818 struct sg_iovec sgl;
1819
1820 retcode = copy_from_user(&sgl, hdr->dxferp +
1821 i * sizeof(struct sg_iovec),
1822 sizeof(struct sg_iovec));
1823 if (retcode)
1824 return -EFAULT;
1825 unit_len = sgl.iov_len;
5d0f6131 1826 unit_num_blocks = unit_len >> ns->lba_shift;
8741ee4c 1827 next_mapping_addr = sgl.iov_base;
5d0f6131
VV		 1828 } else {
1829 unit_num_blocks = min((u64)max_blocks,
1830 (cdb_info->xfer_len - nvme_offset));
1831 unit_len = unit_num_blocks << ns->lba_shift;
1832 next_mapping_addr = hdr->dxferp +
1833 ((1 << ns->lba_shift) * nvme_offset);
1834 }
1835
1836 c.rw.opcode = opcode;
1837 c.rw.nsid = cpu_to_le32(ns->ns_id);
1838 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
1839 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
1840 control = nvme_trans_io_get_control(ns, cdb_info);
1841 c.rw.control = cpu_to_le16(control);
1842
1843 iod = nvme_map_user_pages(dev,
1844 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
1845 (unsigned long)next_mapping_addr, unit_len);
e61b0a86
CH		 1846 if (IS_ERR(iod))
1847 return PTR_ERR(iod);
1848
edd10d33 1849 retcode = nvme_setup_prps(dev, iod, unit_len, GFP_KERNEL);
5d0f6131
VV		 1850 if (retcode != unit_len) {
1851 nvme_unmap_user_pages(dev,
1852 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
1853 iod);
1854 nvme_free_iod(dev, iod);
e61b0a86 1855 return -ENOMEM;
5d0f6131 1856 }
edd10d33
KB		 1857 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1858 c.rw.prp2 = cpu_to_le64(iod->first_dma);
5d0f6131
VV		 1859
1860 nvme_offset += unit_num_blocks;
1861
f705f837 1862 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
e61b0a86 1863
5d0f6131
VV		 1864 nvme_unmap_user_pages(dev,
1865 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
1866 iod);
1867 nvme_free_iod(dev, iod);
e61b0a86
CH		 1868
1869
1870 if (nvme_sc != NVME_SC_SUCCESS)
1871 break;
5d0f6131 1872 }
5d0f6131 1873
e61b0a86 1874 return nvme_trans_status_code(hdr, nvme_sc);
5d0f6131
VV		 1875}
1876
1877
1878/* SCSI Command Translation Functions */
1879
1880static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
1881 u8 *cmd)
1882{
e61b0a86 1883 int res = 0;
cbbb7a2e 1884 struct nvme_trans_io_cdb cdb_info = { 0, };
5d0f6131
VV		 1885 u8 opcode = cmd[0];
1886 u64 xfer_bytes;
1887 u64 sum_iov_len = 0;
8741ee4c 1888 struct sg_iovec sgl;
5d0f6131 1889 int i;
8741ee4c 1890 size_t not_copied;
5d0f6131 1891
cbbb7a2e
CH		 1892 /*
1893 * The FUA and WPROTECT fields are not supported in 6-byte CDBs,
1894 * but always in the same place for all others.
1895 */
1896 switch (opcode) {
1897 case WRITE_6:
1898 case READ_6:
1899 break;
1900 default:
1901 cdb_info.fua = cmd[1] & 0x8;
1902 cdb_info.prot_info = (cmd[1] & 0xe0) >> 5;
772ce435
CH		 1903 if (cdb_info.prot_info && !ns->pi_type) {
1904 return nvme_trans_completion(hdr,
1905 SAM_STAT_CHECK_CONDITION,
1906 ILLEGAL_REQUEST,
1907 SCSI_ASC_INVALID_CDB,
1908 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1909 }
cbbb7a2e
CH		 1910 }
1911
5d0f6131
VV		 1912 switch (opcode) {
1913 case WRITE_6:
1914 case READ_6:
cbbb7a2e
CH		 1915 cdb_info.lba = get_unaligned_be24(&cmd[1]);
1916 cdb_info.xfer_len = cmd[4];
1917 if (cdb_info.xfer_len == 0)
1918 cdb_info.xfer_len = 256;
5d0f6131
VV		 1919 break;
1920 case WRITE_10:
1921 case READ_10:
cbbb7a2e
CH		 1922 cdb_info.lba = get_unaligned_be32(&cmd[2]);
1923 cdb_info.xfer_len = get_unaligned_be16(&cmd[7]);
5d0f6131
VV		 1924 break;
1925 case WRITE_12:
1926 case READ_12:
cbbb7a2e
CH		 1927 cdb_info.lba = get_unaligned_be32(&cmd[2]);
1928 cdb_info.xfer_len = get_unaligned_be32(&cmd[6]);
5d0f6131
VV		 1929 break;
1930 case WRITE_16:
1931 case READ_16:
cbbb7a2e
CH		 1932 cdb_info.lba = get_unaligned_be64(&cmd[2]);
1933 cdb_info.xfer_len = get_unaligned_be32(&cmd[10]);
5d0f6131
VV		 1934 break;
1935 default:
1936 /* Will never really reach here */
e61b0a86 1937 res = -EIO;
5d0f6131
VV		 1938 goto out;
1939 }
1940
1941 /* Calculate total length of transfer (in bytes) */
1942 if (hdr->iovec_count > 0) {
5d0f6131 1943 for (i = 0; i < hdr->iovec_count; i++) {
8741ee4c
VV		 1944 not_copied = copy_from_user(&sgl, hdr->dxferp +
1945 i * sizeof(struct sg_iovec),
1946 sizeof(struct sg_iovec));
1947 if (not_copied)
1948 return -EFAULT;
1949 sum_iov_len += sgl.iov_len;
5d0f6131 1950 /* IO vector sizes should be multiples of block size */
8741ee4c 1951 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
5d0f6131
VV		 1952 res = nvme_trans_completion(hdr,
1953 SAM_STAT_CHECK_CONDITION,
1954 ILLEGAL_REQUEST,
1955 SCSI_ASC_INVALID_PARAMETER,
1956 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1957 goto out;
1958 }
1959 }
1960 } else {
1961 sum_iov_len = hdr->dxfer_len;
1962 }
1963
1964 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
1965 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
1966
1967 /* If block count and actual data buffer size dont match, error out */
1968 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
1969 res = -EINVAL;
1970 goto out;
1971 }
1972
1973 /* Check for 0 length transfer - it is not illegal */
1974 if (cdb_info.xfer_len == 0)
1975 goto out;
1976
1977 /* Send NVMe IO Command(s) */
1978 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
e61b0a86 1979 if (res)
5d0f6131
VV		 1980 goto out;
1981
1982 out:
1983 return res;
1984}
1985
1986static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1987 u8 *cmd)
1988{
e61b0a86 1989 int res = 0;
5d0f6131
VV		 1990 u8 evpd;
1991 u8 page_code;
1992 int alloc_len;
1993 u8 *inq_response;
1994
3726897e
CH		 1995 evpd = cmd[1] & 0x01;
1996 page_code = cmd[2];
1997 alloc_len = get_unaligned_be16(&cmd[3]);
5d0f6131 1998
4f1982b4 1999 inq_response = kmalloc(alloc_len, GFP_KERNEL);
5d0f6131
VV		 2000 if (inq_response == NULL) {
2001 res = -ENOMEM;
2002 goto out_mem;
2003 }
2004
2005 if (evpd == 0) {
2006 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2007 res = nvme_trans_standard_inquiry_page(ns, hdr,
2008 inq_response, alloc_len);
2009 } else {
2010 res = nvme_trans_completion(hdr,
2011 SAM_STAT_CHECK_CONDITION,
2012 ILLEGAL_REQUEST,
2013 SCSI_ASC_INVALID_CDB,
2014 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2015 }
2016 } else {
2017 switch (page_code) {
2018 case VPD_SUPPORTED_PAGES:
2019 res = nvme_trans_supported_vpd_pages(ns, hdr,
2020 inq_response, alloc_len);
2021 break;
2022 case VPD_SERIAL_NUMBER:
2023 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2024 alloc_len);
2025 break;
2026 case VPD_DEVICE_IDENTIFIERS:
2027 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2028 alloc_len);
2029 break;
2030 case VPD_EXTENDED_INQUIRY:
2031 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2032 break;
7f749d9c
KB		 2033 case VPD_BLOCK_LIMITS:
2034 res = nvme_trans_bdev_limits_page(ns, hdr, inq_response,
2035 alloc_len);
2036 break;
5d0f6131
VV		 2037 case VPD_BLOCK_DEV_CHARACTERISTICS:
2038 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2039 break;
2040 default:
2041 res = nvme_trans_completion(hdr,
2042 SAM_STAT_CHECK_CONDITION,
2043 ILLEGAL_REQUEST,
2044 SCSI_ASC_INVALID_CDB,
2045 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2046 break;
2047 }
2048 }
2049 kfree(inq_response);
2050 out_mem:
2051 return res;
2052}
2053
2054static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2055 u8 *cmd)
2056{
e61b0a86 2057 int res;
5d0f6131 2058 u16 alloc_len;
5d0f6131
VV		 2059 u8 pc;
2060 u8 page_code;
2061
3726897e 2062 if (cmd[1] != LOG_SENSE_CDB_SP_NOT_ENABLED) {
5d0f6131
VV		 2063 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2064 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2065 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2066 goto out;
2067 }
3726897e
CH		 2068
2069 page_code = cmd[2] & LOG_SENSE_CDB_PAGE_CODE_MASK;
2070 pc = (cmd[2] & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
5d0f6131
VV		 2071 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2072 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2073 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2074 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2075 goto out;
2076 }
3726897e 2077 alloc_len = get_unaligned_be16(&cmd[7]);
5d0f6131
VV		 2078 switch (page_code) {
2079 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2080 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2081 break;
2082 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2083 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2084 break;
2085 case LOG_PAGE_TEMPERATURE_PAGE:
2086 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2087 break;
2088 default:
2089 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2090 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2091 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2092 break;
2093 }
2094
2095 out:
2096 return res;
2097}
2098
2099static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2100 u8 *cmd)
2101{
5d0f6131
VV		 2102 u8 cdb10 = 0;
2103 u16 parm_list_len;
2104 u8 page_format;
2105 u8 save_pages;
2106
3726897e
CH		 2107 page_format = cmd[1] & MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2108 save_pages = cmd[1] & MODE_SELECT_CDB_SAVE_PAGES_MASK;
5d0f6131 2109
3726897e
CH		 2110 if (cmd[0] == MODE_SELECT) {
2111 parm_list_len = cmd[4];
5d0f6131 2112 } else {
3726897e 2113 parm_list_len = cmd[7];
5d0f6131
VV		 2114 cdb10 = 1;
2115 }
2116
2117 if (parm_list_len != 0) {
2118 /*
2119 * According to SPC-4 r24, a paramter list length field of 0
2120 * shall not be considered an error
2121 */
e61b0a86 2122 return nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
5d0f6131
VV		 2123 page_format, save_pages, cdb10);
2124 }
2125
e61b0a86 2126 return 0;
5d0f6131
VV		 2127}
2128
2129static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2130 u8 *cmd)
2131{
e61b0a86 2132 int res = 0;
5d0f6131
VV		 2133 u16 alloc_len;
2134 u8 cdb10 = 0;
5d0f6131 2135
3726897e
CH		 2136 if (cmd[0] == MODE_SENSE) {
2137 alloc_len = cmd[4];
5d0f6131 2138 } else {
3726897e 2139 alloc_len = get_unaligned_be16(&cmd[7]);
5d0f6131
VV		 2140 cdb10 = 1;
2141 }
2142
3726897e
CH		 2143 if ((cmd[2] & MODE_SENSE_PAGE_CONTROL_MASK) !=
2144 MODE_SENSE_PC_CURRENT_VALUES) {
5d0f6131
VV		 2145 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2146 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2147 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2148 goto out;
2149 }
2150
3726897e 2151 switch (cmd[2] & MODE_SENSE_PAGE_CODE_MASK) {
5d0f6131
VV		 2152 case MODE_PAGE_CACHING:
2153 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2154 cdb10,
2155 &nvme_trans_fill_caching_page,
2156 MODE_PAGE_CACHING_LEN);
2157 break;
2158 case MODE_PAGE_CONTROL:
2159 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2160 cdb10,
2161 &nvme_trans_fill_control_page,
2162 MODE_PAGE_CONTROL_LEN);
2163 break;
2164 case MODE_PAGE_POWER_CONDITION:
2165 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2166 cdb10,
2167 &nvme_trans_fill_pow_cnd_page,
2168 MODE_PAGE_POW_CND_LEN);
2169 break;
2170 case MODE_PAGE_INFO_EXCEP:
2171 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2172 cdb10,
2173 &nvme_trans_fill_inf_exc_page,
2174 MODE_PAGE_INF_EXC_LEN);
2175 break;
2176 case MODE_PAGE_RETURN_ALL:
2177 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2178 cdb10,
2179 &nvme_trans_fill_all_pages,
2180 MODE_PAGE_ALL_LEN);
2181 break;
2182 default:
2183 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2184 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2185 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2186 break;
2187 }
2188
2189 out:
2190 return res;
2191}
2192
2193static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
3726897e 2194 u8 *cmd, u8 cdb16)
5d0f6131 2195{
e61b0a86 2196 int res;
5d0f6131 2197 int nvme_sc;
3726897e
CH		 2198 u32 alloc_len;
2199 u32 resp_size;
5d0f6131 2200 u32 xfer_len;
5d0f6131
VV		 2201 struct nvme_dev *dev = ns->dev;
2202 dma_addr_t dma_addr;
2203 void *mem;
2204 struct nvme_id_ns *id_ns;
2205 u8 *response;
2206
5d0f6131 2207 if (cdb16) {
3726897e 2208 alloc_len = get_unaligned_be32(&cmd[10]);
5d0f6131 2209 resp_size = READ_CAP_16_RESP_SIZE;
3726897e
CH		 2210 } else {
2211 alloc_len = READ_CAP_10_RESP_SIZE;
2212 resp_size = READ_CAP_10_RESP_SIZE;
5d0f6131
VV		 2213 }
2214
e75ec752 2215 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ns),
5d0f6131
VV		 2216 &dma_addr, GFP_KERNEL);
2217 if (mem == NULL) {
2218 res = -ENOMEM;
2219 goto out;
2220 }
2221 /* nvme ns identify */
2222 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2223 res = nvme_trans_status_code(hdr, nvme_sc);
2224 if (res)
2225 goto out_dma;
e61b0a86 2226
5d0f6131
VV		 2227 id_ns = mem;
2228
03ea83e9 2229 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 2230 if (response == NULL) {
2231 res = -ENOMEM;
2232 goto out_dma;
2233 }
5d0f6131
VV		 2234 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2235
2236 xfer_len = min(alloc_len, resp_size);
2237 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2238
2239 kfree(response);
2240 out_dma:
e75ec752 2241 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ns), mem, dma_addr);
5d0f6131
VV		 2242 out:
2243 return res;
2244}
2245
2246static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2247 u8 *cmd)
2248{
e61b0a86 2249 int res;
5d0f6131
VV		 2250 int nvme_sc;
2251 u32 alloc_len, xfer_len, resp_size;
5d0f6131
VV		 2252 u8 *response;
2253 struct nvme_dev *dev = ns->dev;
2254 dma_addr_t dma_addr;
2255 void *mem;
2256 struct nvme_id_ctrl *id_ctrl;
2257 u32 ll_length, lun_id;
2258 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
8741ee4c 2259 __be32 tmp_len;
5d0f6131 2260
3726897e
CH		 2261 switch (cmd[2]) {
2262 default:
2263 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
5d0f6131
VV		 2264 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2265 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
3726897e
CH		 2266 case ALL_LUNS_RETURNED:
2267 case ALL_WELL_KNOWN_LUNS_RETURNED:
2268 case RESTRICTED_LUNS_RETURNED:
5d0f6131 2269 /* NVMe Controller Identify */
e75ec752 2270 mem = dma_alloc_coherent(dev->dev, sizeof(struct nvme_id_ctrl),
5d0f6131
VV		 2271 &dma_addr, GFP_KERNEL);
2272 if (mem == NULL) {
2273 res = -ENOMEM;
2274 goto out;
2275 }
2276 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2277 res = nvme_trans_status_code(hdr, nvme_sc);
2278 if (res)
2279 goto out_dma;
e61b0a86 2280
5d0f6131 2281 id_ctrl = mem;
8741ee4c 2282 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
5d0f6131
VV		 2283 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2284
3726897e 2285 alloc_len = get_unaligned_be32(&cmd[6]);
5d0f6131
VV		 2286 if (alloc_len < resp_size) {
2287 res = nvme_trans_completion(hdr,
2288 SAM_STAT_CHECK_CONDITION,
2289 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2290 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2291 goto out_dma;
2292 }
2293
03ea83e9 2294 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 2295 if (response == NULL) {
2296 res = -ENOMEM;
2297 goto out_dma;
2298 }
5d0f6131
VV		 2299
2300 /* The first LUN ID will always be 0 per the SAM spec */
8741ee4c 2301 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
5d0f6131
VV		 2302 /*
2303 * Set the LUN Id and then increment to the next LUN
2304 * location in the parameter data.
2305 */
8741ee4c 2306 __be64 tmp_id = cpu_to_be64(lun_id);
5d0f6131
VV		 2307 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2308 lun_id_offset += LUN_ENTRY_SIZE;
2309 }
2310 tmp_len = cpu_to_be32(ll_length);
2311 memcpy(response, &tmp_len, sizeof(u32));
2312 }
2313
2314 xfer_len = min(alloc_len, resp_size);
2315 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2316
2317 kfree(response);
2318 out_dma:
e75ec752 2319 dma_free_coherent(dev->dev, sizeof(struct nvme_id_ctrl), mem, dma_addr);
5d0f6131
VV		 2320 out:
2321 return res;
2322}
2323
2324static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2325 u8 *cmd)
2326{
e61b0a86 2327 int res;
5d0f6131
VV		 2328 u8 alloc_len, xfer_len, resp_size;
2329 u8 desc_format;
2330 u8 *response;
2331
3726897e
CH		 2332 desc_format = cmd[1] & 0x01;
2333 alloc_len = cmd[4];
5d0f6131
VV		 2334
2335 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2336 (FIXED_FMT_SENSE_DATA_SIZE));
03ea83e9 2337 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 2338 if (response == NULL) {
2339 res = -ENOMEM;
2340 goto out;
2341 }
5d0f6131 2342
3726897e 2343 if (desc_format) {
5d0f6131
VV		 2344 /* Descriptor Format Sense Data */
2345 response[0] = DESC_FORMAT_SENSE_DATA;
2346 response[1] = NO_SENSE;
2347 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2348 response[2] = SCSI_ASC_NO_SENSE;
2349 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2350 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2351 } else {
2352 /* Fixed Format Sense Data */
2353 response[0] = FIXED_SENSE_DATA;
2354 /* Byte 1 = Obsolete */
2355 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2356 /* Bytes 3-6 - Information - set to zero */
2357 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2358 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2359 response[12] = SCSI_ASC_NO_SENSE;
2360 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2361 /* Byte 14 = Field Replaceable Unit Code = 0 */
2362 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2363 }
2364
2365 xfer_len = min(alloc_len, resp_size);
2366 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2367
2368 kfree(response);
2369 out:
2370 return res;
2371}
2372
2373static int nvme_trans_security_protocol(struct nvme_ns *ns,
2374 struct sg_io_hdr *hdr,
2375 u8 *cmd)
2376{
2377 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2378 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2379 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2380}
2381
2382static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2383 u8 *cmd)
2384{
e61b0a86 2385 int res;
5d0f6131 2386 int nvme_sc;
14385de1 2387 struct nvme_command c;
5d0f6131
VV		 2388 u8 immed, pcmod, pc, no_flush, start;
2389
3726897e
CH		 2390 immed = cmd[1] & 0x01;
2391 pcmod = cmd[3] & 0x0f;
2392 pc = (cmd[4] & 0xf0) >> 4;
2393 no_flush = cmd[4] & 0x04;
2394 start = cmd[4] & 0x01;
5d0f6131
VV		 2395
2396 if (immed != 0) {
e61b0a86 2397 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
5d0f6131
VV		 2398 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2399 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2400 } else {
2401 if (no_flush == 0) {
2402 /* Issue NVME FLUSH command prior to START STOP UNIT */
14385de1
KB		 2403 memset(&c, 0, sizeof(c));
2404 c.common.opcode = nvme_cmd_flush;
2405 c.common.nsid = cpu_to_le32(ns->ns_id);
2406
f705f837 2407 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
5d0f6131
VV		 2408 res = nvme_trans_status_code(hdr, nvme_sc);
2409 if (res)
e61b0a86 2410 return res;
5d0f6131
VV		 2411 }
2412 /* Setup the expected power state transition */
e61b0a86 2413 return nvme_trans_power_state(ns, hdr, pc, pcmod, start);
5d0f6131 2414 }
5d0f6131
VV		 2415}
2416
2417static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2418 struct sg_io_hdr *hdr, u8 *cmd)
2419{
5d0f6131 2420 int nvme_sc;
14385de1 2421 struct nvme_command c;
14385de1
KB		 2422
2423 memset(&c, 0, sizeof(c));
2424 c.common.opcode = nvme_cmd_flush;
2425 c.common.nsid = cpu_to_le32(ns->ns_id);
2426
f705f837 2427 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
e61b0a86 2428 return nvme_trans_status_code(hdr, nvme_sc);
5d0f6131
VV		 2429}
2430
2431static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2432 u8 *cmd)
2433{
e61b0a86 2434 int res;
5d0f6131
VV		 2435 u8 parm_hdr_len = 0;
2436 u8 nvme_pf_code = 0;
2437 u8 format_prot_info, long_list, format_data;
2438
3726897e
CH		 2439 format_prot_info = (cmd[1] & 0xc0) >> 6;
2440 long_list = cmd[1] & 0x20;
2441 format_data = cmd[1] & 0x10;
5d0f6131
VV		 2442
2443 if (format_data != 0) {
2444 if (format_prot_info != 0) {
2445 if (long_list == 0)
2446 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2447 else
2448 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2449 }
2450 } else if (format_data == 0 && format_prot_info != 0) {
2451 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2452 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2453 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2454 goto out;
2455 }
2456
2457 /* Get parm header from data-in/out buffer */
2458 /*
2459 * According to the translation spec, the only fields in the parameter
2460 * list we are concerned with are in the header. So allocate only that.
2461 */
2462 if (parm_hdr_len > 0) {
2463 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2464 format_prot_info, &nvme_pf_code);
e61b0a86 2465 if (res)
5d0f6131
VV		 2466 goto out;
2467 }
2468
2469 /* Attempt to activate any previously downloaded firmware image */
b90c48d0 2470 res = nvme_trans_send_activate_fw_cmd(ns, hdr, 0);
5d0f6131
VV		 2471
2472 /* Determine Block size and count and send format command */
2473 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
e61b0a86 2474 if (res)
5d0f6131
VV		 2475 goto out;
2476
2477 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2478
2479 out:
2480 return res;
2481}
2482
2483static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2484 struct sg_io_hdr *hdr,
2485 u8 *cmd)
2486{
5d0f6131
VV		 2487 struct nvme_dev *dev = ns->dev;
2488
2489 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
e61b0a86 2490 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
5d0f6131
VV		 2491 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2492 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2493 else
e61b0a86 2494 return nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
5d0f6131
VV		 2495}
2496
2497static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2498 u8 *cmd)
2499{
e61b0a86 2500 int res = 0;
5d0f6131
VV		 2501 u32 buffer_offset, parm_list_length;
2502 u8 buffer_id, mode;
2503
3726897e 2504 parm_list_length = get_unaligned_be24(&cmd[6]);
5d0f6131
VV		 2505 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2506 /* NVMe expects Firmware file to be a whole number of DWORDS */
2507 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2508 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2509 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2510 goto out;
2511 }
3726897e 2512 buffer_id = cmd[2];
5d0f6131
VV		 2513 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2514 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2515 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2516 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2517 goto out;
2518 }
3726897e
CH		 2519 mode = cmd[1] & 0x1f;
2520 buffer_offset = get_unaligned_be24(&cmd[3]);
5d0f6131
VV		 2521
2522 switch (mode) {
2523 case DOWNLOAD_SAVE_ACTIVATE:
b90c48d0 2524 res = nvme_trans_send_download_fw_cmd(ns, hdr, nvme_admin_download_fw,
5d0f6131
VV		 2525 parm_list_length, buffer_offset,
2526 buffer_id);
e61b0a86 2527 if (res)
5d0f6131 2528 goto out;
b90c48d0 2529 res = nvme_trans_send_activate_fw_cmd(ns, hdr, buffer_id);
5d0f6131
VV		 2530 break;
2531 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
b90c48d0 2532 res = nvme_trans_send_download_fw_cmd(ns, hdr, nvme_admin_download_fw,
5d0f6131
VV		 2533 parm_list_length, buffer_offset,
2534 buffer_id);
2535 break;
2536 case ACTIVATE_DEFERRED_MICROCODE:
b90c48d0 2537 res = nvme_trans_send_activate_fw_cmd(ns, hdr, buffer_id);
5d0f6131
VV		 2538 break;
2539 default:
2540 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2541 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2542 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2543 break;
2544 }
2545
2546 out:
2547 return res;
2548}
2549
ec503733
KB		 2550struct scsi_unmap_blk_desc {
2551 __be64 slba;
2552 __be32 nlb;
2553 u32 resv;
2554};
2555
2556struct scsi_unmap_parm_list {
2557 __be16 unmap_data_len;
2558 __be16 unmap_blk_desc_data_len;
2559 u32 resv;
2560 struct scsi_unmap_blk_desc desc[0];
2561};
2562
2563static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2564 u8 *cmd)
2565{
2566 struct nvme_dev *dev = ns->dev;
2567 struct scsi_unmap_parm_list *plist;
2568 struct nvme_dsm_range *range;
ec503733
KB		 2569 struct nvme_command c;
2570 int i, nvme_sc, res = -ENOMEM;
2571 u16 ndesc, list_len;
2572 dma_addr_t dma_addr;
2573
3726897e 2574 list_len = get_unaligned_be16(&cmd[7]);
ec503733
KB		 2575 if (!list_len)
2576 return -EINVAL;
2577
2578 plist = kmalloc(list_len, GFP_KERNEL);
2579 if (!plist)
2580 return -ENOMEM;
2581
2582 res = nvme_trans_copy_from_user(hdr, plist, list_len);
e61b0a86 2583 if (res)
ec503733
KB		 2584 goto out;
2585
2586 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2587 if (!ndesc || ndesc > 256) {
2588 res = -EINVAL;
2589 goto out;
2590 }
2591
e75ec752 2592 range = dma_alloc_coherent(dev->dev, ndesc * sizeof(*range),
ec503733
KB		 2593 &dma_addr, GFP_KERNEL);
2594 if (!range)
2595 goto out;
2596
2597 for (i = 0; i < ndesc; i++) {
2598 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2599 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2600 range[i].cattr = 0;
2601 }
2602
2603 memset(&c, 0, sizeof(c));
2604 c.dsm.opcode = nvme_cmd_dsm;
2605 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2606 c.dsm.prp1 = cpu_to_le64(dma_addr);
2607 c.dsm.nr = cpu_to_le32(ndesc - 1);
2608 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2609
f705f837 2610 nvme_sc = nvme_submit_sync_cmd(ns->queue, &c);
ec503733
KB		 2611 res = nvme_trans_status_code(hdr, nvme_sc);
2612
e75ec752 2613 dma_free_coherent(dev->dev, ndesc * sizeof(*range), range, dma_addr);
ec503733
KB		 2614 out:
2615 kfree(plist);
2616 return res;
2617}
2618
5d0f6131
VV		 2619static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2620{
2621 u8 cmd[BLK_MAX_CDB];
2622 int retcode;
2623 unsigned int opcode;
2624
2625 if (hdr->cmdp == NULL)
2626 return -EMSGSIZE;
2627 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2628 return -EFAULT;
2629
695a4fe7
KB		 2630 /*
2631 * Prime the hdr with good status for scsi commands that don't require
2632 * an nvme command for translation.
2633 */
2634 retcode = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2635 if (retcode)
2636 return retcode;
2637
5d0f6131
VV		 2638 opcode = cmd[0];
2639
2640 switch (opcode) {
2641 case READ_6:
2642 case READ_10:
2643 case READ_12:
2644 case READ_16:
2645 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2646 break;
2647 case WRITE_6:
2648 case WRITE_10:
2649 case WRITE_12:
2650 case WRITE_16:
2651 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2652 break;
2653 case INQUIRY:
2654 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2655 break;
2656 case LOG_SENSE:
2657 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2658 break;
2659 case MODE_SELECT:
2660 case MODE_SELECT_10:
2661 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2662 break;
2663 case MODE_SENSE:
2664 case MODE_SENSE_10:
2665 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2666 break;
2667 case READ_CAPACITY:
3726897e 2668 retcode = nvme_trans_read_capacity(ns, hdr, cmd, 0);
5d0f6131 2669 break;
eb846d9f 2670 case SERVICE_ACTION_IN_16:
3726897e
CH		 2671 switch (cmd[1]) {
2672 case SAI_READ_CAPACITY_16:
2673 retcode = nvme_trans_read_capacity(ns, hdr, cmd, 1);
2674 break;
2675 default:
5d0f6131 2676 goto out;
3726897e 2677 }
5d0f6131
VV		 2678 break;
2679 case REPORT_LUNS:
2680 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2681 break;
2682 case REQUEST_SENSE:
2683 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2684 break;
2685 case SECURITY_PROTOCOL_IN:
2686 case SECURITY_PROTOCOL_OUT:
2687 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2688 break;
2689 case START_STOP:
2690 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2691 break;
2692 case SYNCHRONIZE_CACHE:
2693 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
2694 break;
2695 case FORMAT_UNIT:
2696 retcode = nvme_trans_format_unit(ns, hdr, cmd);
2697 break;
2698 case TEST_UNIT_READY:
2699 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
2700 break;
2701 case WRITE_BUFFER:
2702 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
2703 break;
ec503733
KB		 2704 case UNMAP:
2705 retcode = nvme_trans_unmap(ns, hdr, cmd);
2706 break;
5d0f6131
VV		 2707 default:
2708 out:
2709 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2710 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2711 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2712 break;
2713 }
2714 return retcode;
2715}
2716
2717int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
2718{
2719 struct sg_io_hdr hdr;
2720 int retcode;
2721
2722 if (!capable(CAP_SYS_ADMIN))
2723 return -EACCES;
2724 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
2725 return -EFAULT;
2726 if (hdr.interface_id != 'S')
2727 return -EINVAL;
2728 if (hdr.cmd_len > BLK_MAX_CDB)
2729 return -EINVAL;
2730
e61b0a86
CH		 2731 /*
2732 * A positive return code means a NVMe status, which has been
2733 * translated to sense data.
2734 */
5d0f6131
VV		 2735 retcode = nvme_scsi_translate(ns, &hdr);
2736 if (retcode < 0)
2737 return retcode;
8741ee4c 2738 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
5d0f6131 2739 return -EFAULT;
e61b0a86 2740 return 0;
5d0f6131
VV		 2741}
2742
2743int nvme_sg_get_version_num(int __user *ip)
2744{
2745 return put_user(sg_version_num, ip);
2746}
Linux kernel - Deliverables
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