projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
NVMe: Retry failed commands with non-fatal errors
[deliverable/linux.git] / drivers / block / nvme-scsi.c
CommitLineData
5d0f6131
VV		 1/*
2 * NVM Express device driver
3 * Copyright (c) 2011, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19/*
20 * Refer to the SCSI-NVMe Translation spec for details on how
21 * each command is translated.
22 */
23
24#include <linux/nvme.h>
25#include <linux/bio.h>
26#include <linux/bitops.h>
27#include <linux/blkdev.h>
320a3827 28#include <linux/compat.h>
5d0f6131
VV		 29#include <linux/delay.h>
30#include <linux/errno.h>
31#include <linux/fs.h>
32#include <linux/genhd.h>
33#include <linux/idr.h>
34#include <linux/init.h>
35#include <linux/interrupt.h>
36#include <linux/io.h>
37#include <linux/kdev_t.h>
38#include <linux/kthread.h>
39#include <linux/kernel.h>
40#include <linux/mm.h>
41#include <linux/module.h>
42#include <linux/moduleparam.h>
43#include <linux/pci.h>
44#include <linux/poison.h>
45#include <linux/sched.h>
46#include <linux/slab.h>
47#include <linux/types.h>
5d0f6131
VV		 48#include <scsi/sg.h>
49#include <scsi/scsi.h>
50
51
52static int sg_version_num = 30534; /* 2 digits for each component */
53
54#define SNTI_TRANSLATION_SUCCESS 0
55#define SNTI_INTERNAL_ERROR 1
56
57/* VPD Page Codes */
58#define VPD_SUPPORTED_PAGES 0x00
59#define VPD_SERIAL_NUMBER 0x80
60#define VPD_DEVICE_IDENTIFIERS 0x83
61#define VPD_EXTENDED_INQUIRY 0x86
62#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
63
64/* CDB offsets */
65#define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
66#define REPORT_LUNS_SR_OFFSET 2
67#define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
68#define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
69#define REQUEST_SENSE_DESC_OFFSET 1
70#define REQUEST_SENSE_DESC_MASK 0x01
71#define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
72#define INQUIRY_EVPD_BYTE_OFFSET 1
73#define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
74#define INQUIRY_EVPD_BIT_MASK 1
75#define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
76#define START_STOP_UNIT_CDB_IMMED_OFFSET 1
77#define START_STOP_UNIT_CDB_IMMED_MASK 0x1
78#define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
79#define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
80#define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
81#define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
82#define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
83#define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
84#define START_STOP_UNIT_CDB_START_OFFSET 4
85#define START_STOP_UNIT_CDB_START_MASK 0x1
86#define WRITE_BUFFER_CDB_MODE_OFFSET 1
87#define WRITE_BUFFER_CDB_MODE_MASK 0x1F
88#define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
89#define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
90#define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
91#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
92#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
93#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
94#define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
95#define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
96#define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
97#define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
98#define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
99#define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
100#define FORMAT_UNIT_PROT_INT_OFFSET 3
101#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
102#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
ec503733 103#define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
5d0f6131
VV		 104
105/* Misc. defines */
106#define NIBBLE_SHIFT 4
107#define FIXED_SENSE_DATA 0x70
108#define DESC_FORMAT_SENSE_DATA 0x72
109#define FIXED_SENSE_DATA_ADD_LENGTH 10
110#define LUN_ENTRY_SIZE 8
111#define LUN_DATA_HEADER_SIZE 8
112#define ALL_LUNS_RETURNED 0x02
113#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
114#define RESTRICTED_LUNS_RETURNED 0x00
115#define NVME_POWER_STATE_START_VALID 0x00
116#define NVME_POWER_STATE_ACTIVE 0x01
117#define NVME_POWER_STATE_IDLE 0x02
118#define NVME_POWER_STATE_STANDBY 0x03
119#define NVME_POWER_STATE_LU_CONTROL 0x07
120#define POWER_STATE_0 0
121#define POWER_STATE_1 1
122#define POWER_STATE_2 2
123#define POWER_STATE_3 3
124#define DOWNLOAD_SAVE_ACTIVATE 0x05
125#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
126#define ACTIVATE_DEFERRED_MICROCODE 0x0F
127#define FORMAT_UNIT_IMMED_MASK 0x2
128#define FORMAT_UNIT_IMMED_OFFSET 1
129#define KELVIN_TEMP_FACTOR 273
130#define FIXED_FMT_SENSE_DATA_SIZE 18
131#define DESC_FMT_SENSE_DATA_SIZE 8
132
133/* SCSI/NVMe defines and bit masks */
134#define INQ_STANDARD_INQUIRY_PAGE 0x00
135#define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
136#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
137#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
138#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
139#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
140#define INQ_SERIAL_NUMBER_LENGTH 0x14
141#define INQ_NUM_SUPPORTED_VPD_PAGES 5
142#define VERSION_SPC_4 0x06
143#define ACA_UNSUPPORTED 0
144#define STANDARD_INQUIRY_LENGTH 36
145#define ADDITIONAL_STD_INQ_LENGTH 31
146#define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
147#define RESERVED_FIELD 0
148
149/* SCSI READ/WRITE Defines */
150#define IO_CDB_WP_MASK 0xE0
151#define IO_CDB_WP_SHIFT 5
152#define IO_CDB_FUA_MASK 0x8
153#define IO_6_CDB_LBA_OFFSET 0
154#define IO_6_CDB_LBA_MASK 0x001FFFFF
155#define IO_6_CDB_TX_LEN_OFFSET 4
156#define IO_6_DEFAULT_TX_LEN 256
157#define IO_10_CDB_LBA_OFFSET 2
158#define IO_10_CDB_TX_LEN_OFFSET 7
159#define IO_10_CDB_WP_OFFSET 1
160#define IO_10_CDB_FUA_OFFSET 1
161#define IO_12_CDB_LBA_OFFSET 2
162#define IO_12_CDB_TX_LEN_OFFSET 6
163#define IO_12_CDB_WP_OFFSET 1
164#define IO_12_CDB_FUA_OFFSET 1
165#define IO_16_CDB_FUA_OFFSET 1
166#define IO_16_CDB_WP_OFFSET 1
167#define IO_16_CDB_LBA_OFFSET 2
168#define IO_16_CDB_TX_LEN_OFFSET 10
169
170/* Mode Sense/Select defines */
171#define MODE_PAGE_INFO_EXCEP 0x1C
172#define MODE_PAGE_CACHING 0x08
173#define MODE_PAGE_CONTROL 0x0A
174#define MODE_PAGE_POWER_CONDITION 0x1A
175#define MODE_PAGE_RETURN_ALL 0x3F
176#define MODE_PAGE_BLK_DES_LEN 0x08
177#define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
178#define MODE_PAGE_CACHING_LEN 0x14
179#define MODE_PAGE_CONTROL_LEN 0x0C
180#define MODE_PAGE_POW_CND_LEN 0x28
181#define MODE_PAGE_INF_EXC_LEN 0x0C
182#define MODE_PAGE_ALL_LEN 0x54
183#define MODE_SENSE6_MPH_SIZE 4
184#define MODE_SENSE6_ALLOC_LEN_OFFSET 4
185#define MODE_SENSE_PAGE_CONTROL_OFFSET 2
186#define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
187#define MODE_SENSE_PAGE_CODE_OFFSET 2
188#define MODE_SENSE_PAGE_CODE_MASK 0x3F
189#define MODE_SENSE_LLBAA_OFFSET 1
190#define MODE_SENSE_LLBAA_MASK 0x10
191#define MODE_SENSE_LLBAA_SHIFT 4
192#define MODE_SENSE_DBD_OFFSET 1
193#define MODE_SENSE_DBD_MASK 8
194#define MODE_SENSE_DBD_SHIFT 3
195#define MODE_SENSE10_MPH_SIZE 8
196#define MODE_SENSE10_ALLOC_LEN_OFFSET 7
197#define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
198#define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
199#define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
200#define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
201#define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
202#define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
203#define MODE_SELECT_6_BD_OFFSET 3
204#define MODE_SELECT_10_BD_OFFSET 6
205#define MODE_SELECT_10_LLBAA_OFFSET 4
206#define MODE_SELECT_10_LLBAA_MASK 1
207#define MODE_SELECT_6_MPH_SIZE 4
208#define MODE_SELECT_10_MPH_SIZE 8
209#define CACHING_MODE_PAGE_WCE_MASK 0x04
210#define MODE_SENSE_BLK_DESC_ENABLED 0
211#define MODE_SENSE_BLK_DESC_COUNT 1
212#define MODE_SELECT_PAGE_CODE_MASK 0x3F
213#define SHORT_DESC_BLOCK 8
214#define LONG_DESC_BLOCK 16
215#define MODE_PAGE_POW_CND_LEN_FIELD 0x26
216#define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
217#define MODE_PAGE_CACHING_LEN_FIELD 0x12
218#define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
219#define MODE_SENSE_PC_CURRENT_VALUES 0
220
221/* Log Sense defines */
222#define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
223#define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
224#define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
225#define LOG_PAGE_TEMPERATURE_PAGE 0x0D
226#define LOG_SENSE_CDB_SP_OFFSET 1
227#define LOG_SENSE_CDB_SP_NOT_ENABLED 0
228#define LOG_SENSE_CDB_PC_OFFSET 2
229#define LOG_SENSE_CDB_PC_MASK 0xC0
230#define LOG_SENSE_CDB_PC_SHIFT 6
231#define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
232#define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
233#define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
234#define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
235#define LOG_INFO_EXCP_PAGE_LENGTH 0xC
236#define REMAINING_TEMP_PAGE_LENGTH 0xC
237#define LOG_TEMP_PAGE_LENGTH 0x10
238#define LOG_TEMP_UNKNOWN 0xFF
239#define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
240
241/* Read Capacity defines */
242#define READ_CAP_10_RESP_SIZE 8
243#define READ_CAP_16_RESP_SIZE 32
244
245/* NVMe Namespace and Command Defines */
246#define NVME_GET_SMART_LOG_PAGE 0x02
247#define NVME_GET_FEAT_TEMP_THRESH 0x04
248#define BYTES_TO_DWORDS 4
249#define NVME_MAX_FIRMWARE_SLOT 7
250
251/* Report LUNs defines */
252#define REPORT_LUNS_FIRST_LUN_OFFSET 8
253
254/* SCSI ADDITIONAL SENSE Codes */
255
256#define SCSI_ASC_NO_SENSE 0x00
257#define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
258#define SCSI_ASC_LUN_NOT_READY 0x04
259#define SCSI_ASC_WARNING 0x0B
260#define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
261#define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
262#define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
263#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
264#define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
265#define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
266#define SCSI_ASC_ILLEGAL_COMMAND 0x20
267#define SCSI_ASC_ILLEGAL_BLOCK 0x21
268#define SCSI_ASC_INVALID_CDB 0x24
269#define SCSI_ASC_INVALID_LUN 0x25
270#define SCSI_ASC_INVALID_PARAMETER 0x26
271#define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
272#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
273
274/* SCSI ADDITIONAL SENSE Code Qualifiers */
275
276#define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
277#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
278#define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
279#define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
280#define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
281#define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
282#define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
283#define SCSI_ASCQ_INVALID_LUN_ID 0x09
284
285/**
286 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
287 * enable DPOFUA support type 0x10 value.
288 */
289#define DEVICE_SPECIFIC_PARAMETER 0
290#define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
291
292/* MACROs to extract information from CDBs */
293
294#define GET_OPCODE(cdb) cdb[0]
295
296#define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
297
298#define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
299
300#define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
301(cdb[index + 1] << 8) | \
302(cdb[index + 2] << 0))
303
304#define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
305(cdb[index + 1] << 16) | \
306(cdb[index + 2] << 8) | \
307(cdb[index + 3] << 0))
308
309#define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
310(((u64)cdb[index + 1]) << 48) | \
311(((u64)cdb[index + 2]) << 40) | \
312(((u64)cdb[index + 3]) << 32) | \
313(((u64)cdb[index + 4]) << 24) | \
314(((u64)cdb[index + 5]) << 16) | \
315(((u64)cdb[index + 6]) << 8) | \
316(((u64)cdb[index + 7]) << 0))
317
318/* Inquiry Helper Macros */
319#define GET_INQ_EVPD_BIT(cdb) \
320((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
321INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
322
323#define GET_INQ_PAGE_CODE(cdb) \
324(GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
325
326#define GET_INQ_ALLOC_LENGTH(cdb) \
327(GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
328
329/* Report LUNs Helper Macros */
330#define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
331(GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
332
333/* Read Capacity Helper Macros */
334#define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
335(GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
336
337#define IS_READ_CAP_16(cdb) \
338((cdb[0] == SERVICE_ACTION_IN && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
339
340/* Request Sense Helper Macros */
341#define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
342(GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
343
344/* Mode Sense Helper Macros */
345#define GET_MODE_SENSE_DBD(cdb) \
346((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
347MODE_SENSE_DBD_SHIFT)
348
349#define GET_MODE_SENSE_LLBAA(cdb) \
350((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
351MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
352
353#define GET_MODE_SENSE_MPH_SIZE(cdb10) \
354(cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
355
356
357/* Struct to gather data that needs to be extracted from a SCSI CDB.
358 Not conforming to any particular CDB variant, but compatible with all. */
359
360struct nvme_trans_io_cdb {
361 u8 fua;
362 u8 prot_info;
363 u64 lba;
364 u32 xfer_len;
365};
366
367
368/* Internal Helper Functions */
369
370
371/* Copy data to userspace memory */
372
373static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
374 unsigned long n)
375{
376 int res = SNTI_TRANSLATION_SUCCESS;
377 unsigned long not_copied;
378 int i;
379 void *index = from;
380 size_t remaining = n;
381 size_t xfer_len;
382
383 if (hdr->iovec_count > 0) {
8741ee4c 384 struct sg_iovec sgl;
5d0f6131
VV		 385
386 for (i = 0; i < hdr->iovec_count; i++) {
8741ee4c
VV		 387 not_copied = copy_from_user(&sgl, hdr->dxferp +
388 i * sizeof(struct sg_iovec),
389 sizeof(struct sg_iovec));
390 if (not_copied)
391 return -EFAULT;
392 xfer_len = min(remaining, sgl.iov_len);
393 not_copied = copy_to_user(sgl.iov_base, index,
5d0f6131
VV		 394 xfer_len);
395 if (not_copied) {
396 res = -EFAULT;
397 break;
398 }
399 index += xfer_len;
400 remaining -= xfer_len;
401 if (remaining == 0)
402 break;
403 }
404 return res;
405 }
8741ee4c 406 not_copied = copy_to_user(hdr->dxferp, from, n);
5d0f6131
VV		 407 if (not_copied)
408 res = -EFAULT;
409 return res;
410}
411
412/* Copy data from userspace memory */
413
414static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
415 unsigned long n)
416{
417 int res = SNTI_TRANSLATION_SUCCESS;
418 unsigned long not_copied;
419 int i;
420 void *index = to;
421 size_t remaining = n;
422 size_t xfer_len;
423
424 if (hdr->iovec_count > 0) {
8741ee4c 425 struct sg_iovec sgl;
5d0f6131
VV		 426
427 for (i = 0; i < hdr->iovec_count; i++) {
8741ee4c
VV		 428 not_copied = copy_from_user(&sgl, hdr->dxferp +
429 i * sizeof(struct sg_iovec),
430 sizeof(struct sg_iovec));
431 if (not_copied)
432 return -EFAULT;
433 xfer_len = min(remaining, sgl.iov_len);
434 not_copied = copy_from_user(index, sgl.iov_base,
435 xfer_len);
5d0f6131
VV		 436 if (not_copied) {
437 res = -EFAULT;
438 break;
439 }
440 index += xfer_len;
441 remaining -= xfer_len;
442 if (remaining == 0)
443 break;
444 }
445 return res;
446 }
447
8741ee4c 448 not_copied = copy_from_user(to, hdr->dxferp, n);
5d0f6131
VV		 449 if (not_copied)
450 res = -EFAULT;
451 return res;
452}
453
454/* Status/Sense Buffer Writeback */
455
456static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
457 u8 asc, u8 ascq)
458{
459 int res = SNTI_TRANSLATION_SUCCESS;
460 u8 xfer_len;
461 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
462
463 if (scsi_status_is_good(status)) {
464 hdr->status = SAM_STAT_GOOD;
465 hdr->masked_status = GOOD;
466 hdr->host_status = DID_OK;
467 hdr->driver_status = DRIVER_OK;
468 hdr->sb_len_wr = 0;
469 } else {
470 hdr->status = status;
471 hdr->masked_status = status >> 1;
472 hdr->host_status = DID_OK;
473 hdr->driver_status = DRIVER_OK;
474
475 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
476 resp[0] = DESC_FORMAT_SENSE_DATA;
477 resp[1] = sense_key;
478 resp[2] = asc;
479 resp[3] = ascq;
480
481 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
482 hdr->sb_len_wr = xfer_len;
8741ee4c 483 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
5d0f6131
VV		 484 res = -EFAULT;
485 }
486
487 return res;
488}
489
490static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
491{
492 u8 status, sense_key, asc, ascq;
493 int res = SNTI_TRANSLATION_SUCCESS;
494
495 /* For non-nvme (Linux) errors, simply return the error code */
496 if (nvme_sc < 0)
497 return nvme_sc;
498
499 /* Mask DNR, More, and reserved fields */
500 nvme_sc &= 0x7FF;
501
502 switch (nvme_sc) {
503 /* Generic Command Status */
504 case NVME_SC_SUCCESS:
505 status = SAM_STAT_GOOD;
506 sense_key = NO_SENSE;
507 asc = SCSI_ASC_NO_SENSE;
508 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
509 break;
510 case NVME_SC_INVALID_OPCODE:
511 status = SAM_STAT_CHECK_CONDITION;
512 sense_key = ILLEGAL_REQUEST;
513 asc = SCSI_ASC_ILLEGAL_COMMAND;
514 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
515 break;
516 case NVME_SC_INVALID_FIELD:
517 status = SAM_STAT_CHECK_CONDITION;
518 sense_key = ILLEGAL_REQUEST;
519 asc = SCSI_ASC_INVALID_CDB;
520 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
521 break;
522 case NVME_SC_DATA_XFER_ERROR:
523 status = SAM_STAT_CHECK_CONDITION;
524 sense_key = MEDIUM_ERROR;
525 asc = SCSI_ASC_NO_SENSE;
526 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
527 break;
528 case NVME_SC_POWER_LOSS:
529 status = SAM_STAT_TASK_ABORTED;
530 sense_key = ABORTED_COMMAND;
531 asc = SCSI_ASC_WARNING;
532 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
533 break;
534 case NVME_SC_INTERNAL:
535 status = SAM_STAT_CHECK_CONDITION;
536 sense_key = HARDWARE_ERROR;
537 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
538 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
539 break;
540 case NVME_SC_ABORT_REQ:
541 status = SAM_STAT_TASK_ABORTED;
542 sense_key = ABORTED_COMMAND;
543 asc = SCSI_ASC_NO_SENSE;
544 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
545 break;
546 case NVME_SC_ABORT_QUEUE:
547 status = SAM_STAT_TASK_ABORTED;
548 sense_key = ABORTED_COMMAND;
549 asc = SCSI_ASC_NO_SENSE;
550 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
551 break;
552 case NVME_SC_FUSED_FAIL:
553 status = SAM_STAT_TASK_ABORTED;
554 sense_key = ABORTED_COMMAND;
555 asc = SCSI_ASC_NO_SENSE;
556 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
557 break;
558 case NVME_SC_FUSED_MISSING:
559 status = SAM_STAT_TASK_ABORTED;
560 sense_key = ABORTED_COMMAND;
561 asc = SCSI_ASC_NO_SENSE;
562 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
563 break;
564 case NVME_SC_INVALID_NS:
565 status = SAM_STAT_CHECK_CONDITION;
566 sense_key = ILLEGAL_REQUEST;
567 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
568 ascq = SCSI_ASCQ_INVALID_LUN_ID;
569 break;
570 case NVME_SC_LBA_RANGE:
571 status = SAM_STAT_CHECK_CONDITION;
572 sense_key = ILLEGAL_REQUEST;
573 asc = SCSI_ASC_ILLEGAL_BLOCK;
574 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
575 break;
576 case NVME_SC_CAP_EXCEEDED:
577 status = SAM_STAT_CHECK_CONDITION;
578 sense_key = MEDIUM_ERROR;
579 asc = SCSI_ASC_NO_SENSE;
580 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
581 break;
582 case NVME_SC_NS_NOT_READY:
583 status = SAM_STAT_CHECK_CONDITION;
584 sense_key = NOT_READY;
585 asc = SCSI_ASC_LUN_NOT_READY;
586 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
587 break;
588
589 /* Command Specific Status */
590 case NVME_SC_INVALID_FORMAT:
591 status = SAM_STAT_CHECK_CONDITION;
592 sense_key = ILLEGAL_REQUEST;
593 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
594 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
595 break;
596 case NVME_SC_BAD_ATTRIBUTES:
597 status = SAM_STAT_CHECK_CONDITION;
598 sense_key = ILLEGAL_REQUEST;
599 asc = SCSI_ASC_INVALID_CDB;
600 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
601 break;
602
603 /* Media Errors */
604 case NVME_SC_WRITE_FAULT:
605 status = SAM_STAT_CHECK_CONDITION;
606 sense_key = MEDIUM_ERROR;
607 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
608 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
609 break;
610 case NVME_SC_READ_ERROR:
611 status = SAM_STAT_CHECK_CONDITION;
612 sense_key = MEDIUM_ERROR;
613 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
614 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
615 break;
616 case NVME_SC_GUARD_CHECK:
617 status = SAM_STAT_CHECK_CONDITION;
618 sense_key = MEDIUM_ERROR;
619 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
620 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
621 break;
622 case NVME_SC_APPTAG_CHECK:
623 status = SAM_STAT_CHECK_CONDITION;
624 sense_key = MEDIUM_ERROR;
625 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
626 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
627 break;
628 case NVME_SC_REFTAG_CHECK:
629 status = SAM_STAT_CHECK_CONDITION;
630 sense_key = MEDIUM_ERROR;
631 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
632 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
633 break;
634 case NVME_SC_COMPARE_FAILED:
635 status = SAM_STAT_CHECK_CONDITION;
636 sense_key = MISCOMPARE;
637 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
638 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
639 break;
640 case NVME_SC_ACCESS_DENIED:
641 status = SAM_STAT_CHECK_CONDITION;
642 sense_key = ILLEGAL_REQUEST;
643 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
644 ascq = SCSI_ASCQ_INVALID_LUN_ID;
645 break;
646
647 /* Unspecified/Default */
648 case NVME_SC_CMDID_CONFLICT:
649 case NVME_SC_CMD_SEQ_ERROR:
650 case NVME_SC_CQ_INVALID:
651 case NVME_SC_QID_INVALID:
652 case NVME_SC_QUEUE_SIZE:
653 case NVME_SC_ABORT_LIMIT:
654 case NVME_SC_ABORT_MISSING:
655 case NVME_SC_ASYNC_LIMIT:
656 case NVME_SC_FIRMWARE_SLOT:
657 case NVME_SC_FIRMWARE_IMAGE:
658 case NVME_SC_INVALID_VECTOR:
659 case NVME_SC_INVALID_LOG_PAGE:
660 default:
661 status = SAM_STAT_CHECK_CONDITION;
662 sense_key = ILLEGAL_REQUEST;
663 asc = SCSI_ASC_NO_SENSE;
664 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
665 break;
666 }
667
668 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
669
670 return res;
671}
672
673/* INQUIRY Helper Functions */
674
675static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
676 struct sg_io_hdr *hdr, u8 *inq_response,
677 int alloc_len)
678{
679 struct nvme_dev *dev = ns->dev;
680 dma_addr_t dma_addr;
681 void *mem;
682 struct nvme_id_ns *id_ns;
683 int res = SNTI_TRANSLATION_SUCCESS;
684 int nvme_sc;
685 int xfer_len;
686 u8 resp_data_format = 0x02;
687 u8 protect;
688 u8 cmdque = 0x01 << 1;
689
690 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
691 &dma_addr, GFP_KERNEL);
692 if (mem == NULL) {
693 res = -ENOMEM;
694 goto out_dma;
695 }
696
697 /* nvme ns identify - use DPS value for PROTECT field */
698 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
699 res = nvme_trans_status_code(hdr, nvme_sc);
700 /*
701 * If nvme_sc was -ve, res will be -ve here.
702 * If nvme_sc was +ve, the status would bace been translated, and res
703 * can only be 0 or -ve.
704 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
705 * - If -ve, return because its a Linux error.
706 */
707 if (res)
708 goto out_free;
709 if (nvme_sc) {
710 res = nvme_sc;
711 goto out_free;
712 }
713 id_ns = mem;
714 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
715
716 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
717 inq_response[2] = VERSION_SPC_4;
718 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
719 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
720 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
721 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
722 strncpy(&inq_response[8], "NVMe ", 8);
723 strncpy(&inq_response[16], dev->model, 16);
724 strncpy(&inq_response[32], dev->firmware_rev, 4);
725
726 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
727 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
728
729 out_free:
730 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
731 dma_addr);
732 out_dma:
733 return res;
734}
735
736static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
737 struct sg_io_hdr *hdr, u8 *inq_response,
738 int alloc_len)
739{
740 int res = SNTI_TRANSLATION_SUCCESS;
741 int xfer_len;
742
743 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
744 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
745 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
746 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
747 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
748 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
749 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
750 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
751
752 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
753 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
754
755 return res;
756}
757
758static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
759 struct sg_io_hdr *hdr, u8 *inq_response,
760 int alloc_len)
761{
762 struct nvme_dev *dev = ns->dev;
763 int res = SNTI_TRANSLATION_SUCCESS;
764 int xfer_len;
765
766 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
767 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
768 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
769 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
770
771 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
772 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
773
774 return res;
775}
776
777static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
778 u8 *inq_response, int alloc_len)
779{
780 struct nvme_dev *dev = ns->dev;
781 dma_addr_t dma_addr;
782 void *mem;
783 struct nvme_id_ctrl *id_ctrl;
784 int res = SNTI_TRANSLATION_SUCCESS;
785 int nvme_sc;
786 u8 ieee[4];
787 int xfer_len;
8741ee4c 788 __be32 tmp_id = cpu_to_be32(ns->ns_id);
5d0f6131
VV		 789
790 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
791 &dma_addr, GFP_KERNEL);
792 if (mem == NULL) {
793 res = -ENOMEM;
794 goto out_dma;
795 }
796
797 /* nvme controller identify */
798 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
799 res = nvme_trans_status_code(hdr, nvme_sc);
800 if (res)
801 goto out_free;
802 if (nvme_sc) {
803 res = nvme_sc;
804 goto out_free;
805 }
806 id_ctrl = mem;
807
808 /* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
809 ieee[0] = id_ctrl->ieee[0] << 4;
810 ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
811 ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
812 ieee[3] = id_ctrl->ieee[2] >> 4;
813
814 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
815 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
816 inq_response[3] = 20; /* Page Length */
817 /* Designation Descriptor start */
818 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
819 inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */
820 inq_response[6] = 0x00; /* Rsvd */
821 inq_response[7] = 16; /* Designator Length */
822 /* Designator start */
823 inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
824 inq_response[9] = ieee[2]; /* IEEE ID */
825 inq_response[10] = ieee[1]; /* IEEE ID */
826 inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
827 inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
828 inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
829 inq_response[14] = dev->serial[0];
830 inq_response[15] = dev->serial[1];
831 inq_response[16] = dev->model[0];
832 inq_response[17] = dev->model[1];
833 memcpy(&inq_response[18], &tmp_id, sizeof(u32));
834 /* Last 2 bytes are zero */
835
836 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
837 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
838
839 out_free:
840 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
841 dma_addr);
842 out_dma:
843 return res;
844}
845
846static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
847 int alloc_len)
848{
849 u8 *inq_response;
850 int res = SNTI_TRANSLATION_SUCCESS;
851 int nvme_sc;
852 struct nvme_dev *dev = ns->dev;
853 dma_addr_t dma_addr;
854 void *mem;
855 struct nvme_id_ctrl *id_ctrl;
856 struct nvme_id_ns *id_ns;
857 int xfer_len;
858 u8 microcode = 0x80;
859 u8 spt;
860 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
861 u8 grd_chk, app_chk, ref_chk, protect;
862 u8 uask_sup = 0x20;
863 u8 v_sup;
864 u8 luiclr = 0x01;
865
866 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
867 if (inq_response == NULL) {
868 res = -ENOMEM;
869 goto out_mem;
870 }
871
872 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
873 &dma_addr, GFP_KERNEL);
874 if (mem == NULL) {
875 res = -ENOMEM;
876 goto out_dma;
877 }
878
879 /* nvme ns identify */
880 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
881 res = nvme_trans_status_code(hdr, nvme_sc);
882 if (res)
883 goto out_free;
884 if (nvme_sc) {
885 res = nvme_sc;
886 goto out_free;
887 }
888 id_ns = mem;
889 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
890 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
891 grd_chk = protect << 2;
892 app_chk = protect << 1;
893 ref_chk = protect;
894
895 /* nvme controller identify */
896 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
897 res = nvme_trans_status_code(hdr, nvme_sc);
898 if (res)
899 goto out_free;
900 if (nvme_sc) {
901 res = nvme_sc;
902 goto out_free;
903 }
904 id_ctrl = mem;
905 v_sup = id_ctrl->vwc;
906
907 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
908 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
909 inq_response[2] = 0x00; /* Page Length MSB */
910 inq_response[3] = 0x3C; /* Page Length LSB */
911 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
912 inq_response[5] = uask_sup;
913 inq_response[6] = v_sup;
914 inq_response[7] = luiclr;
915 inq_response[8] = 0;
916 inq_response[9] = 0;
917
918 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
919 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
920
921 out_free:
922 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
923 dma_addr);
924 out_dma:
925 kfree(inq_response);
926 out_mem:
927 return res;
928}
929
930static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
931 int alloc_len)
932{
933 u8 *inq_response;
934 int res = SNTI_TRANSLATION_SUCCESS;
935 int xfer_len;
936
03ea83e9 937 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV		 938 if (inq_response == NULL) {
939 res = -ENOMEM;
940 goto out_mem;
941 }
942
5d0f6131
VV		 943 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
944 inq_response[2] = 0x00; /* Page Length MSB */
945 inq_response[3] = 0x3C; /* Page Length LSB */
946 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
947 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
948 inq_response[6] = 0x00; /* Form Factor */
949
950 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
951 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
952
953 kfree(inq_response);
954 out_mem:
955 return res;
956}
957
958/* LOG SENSE Helper Functions */
959
960static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
961 int alloc_len)
962{
963 int res = SNTI_TRANSLATION_SUCCESS;
964 int xfer_len;
965 u8 *log_response;
966
03ea83e9 967 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
5d0f6131
VV		 968 if (log_response == NULL) {
969 res = -ENOMEM;
970 goto out_mem;
971 }
5d0f6131
VV		 972
973 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
974 /* Subpage=0x00, Page Length MSB=0 */
975 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
976 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
977 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
978 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
979
980 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
981 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
982
983 kfree(log_response);
984 out_mem:
985 return res;
986}
987
988static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
989 struct sg_io_hdr *hdr, int alloc_len)
990{
991 int res = SNTI_TRANSLATION_SUCCESS;
992 int xfer_len;
993 u8 *log_response;
994 struct nvme_command c;
995 struct nvme_dev *dev = ns->dev;
996 struct nvme_smart_log *smart_log;
997 dma_addr_t dma_addr;
998 void *mem;
999 u8 temp_c;
1000 u16 temp_k;
1001
03ea83e9 1002 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV		 1003 if (log_response == NULL) {
1004 res = -ENOMEM;
1005 goto out_mem;
1006 }
5d0f6131
VV		 1007
1008 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1009 sizeof(struct nvme_smart_log),
1010 &dma_addr, GFP_KERNEL);
1011 if (mem == NULL) {
1012 res = -ENOMEM;
1013 goto out_dma;
1014 }
1015
1016 /* Get SMART Log Page */
1017 memset(&c, 0, sizeof(c));
1018 c.common.opcode = nvme_admin_get_log_page;
1019 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1020 c.common.prp1 = cpu_to_le64(dma_addr);
1021 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1022 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1023 res = nvme_submit_admin_cmd(dev, &c, NULL);
1024 if (res != NVME_SC_SUCCESS) {
1025 temp_c = LOG_TEMP_UNKNOWN;
1026 } else {
1027 smart_log = mem;
1028 temp_k = (smart_log->temperature[1] << 8) +
1029 (smart_log->temperature[0]);
1030 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1031 }
1032
1033 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1034 /* Subpage=0x00, Page Length MSB=0 */
1035 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1036 /* Informational Exceptions Log Parameter 1 Start */
1037 /* Parameter Code=0x0000 bytes 4,5 */
1038 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1039 log_response[7] = 0x04; /* PARAMETER LENGTH */
1040 /* Add sense Code and qualifier = 0x00 each */
1041 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1042 log_response[10] = temp_c;
1043
1044 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1045 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1046
1047 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1048 mem, dma_addr);
1049 out_dma:
1050 kfree(log_response);
1051 out_mem:
1052 return res;
1053}
1054
1055static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1056 int alloc_len)
1057{
1058 int res = SNTI_TRANSLATION_SUCCESS;
1059 int xfer_len;
1060 u8 *log_response;
1061 struct nvme_command c;
1062 struct nvme_dev *dev = ns->dev;
1063 struct nvme_smart_log *smart_log;
1064 dma_addr_t dma_addr;
1065 void *mem;
1066 u32 feature_resp;
1067 u8 temp_c_cur, temp_c_thresh;
1068 u16 temp_k;
1069
03ea83e9 1070 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV		 1071 if (log_response == NULL) {
1072 res = -ENOMEM;
1073 goto out_mem;
1074 }
5d0f6131
VV		 1075
1076 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1077 sizeof(struct nvme_smart_log),
1078 &dma_addr, GFP_KERNEL);
1079 if (mem == NULL) {
1080 res = -ENOMEM;
1081 goto out_dma;
1082 }
1083
1084 /* Get SMART Log Page */
1085 memset(&c, 0, sizeof(c));
1086 c.common.opcode = nvme_admin_get_log_page;
1087 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1088 c.common.prp1 = cpu_to_le64(dma_addr);
1089 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1090 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1091 res = nvme_submit_admin_cmd(dev, &c, NULL);
1092 if (res != NVME_SC_SUCCESS) {
1093 temp_c_cur = LOG_TEMP_UNKNOWN;
1094 } else {
1095 smart_log = mem;
1096 temp_k = (smart_log->temperature[1] << 8) +
1097 (smart_log->temperature[0]);
1098 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1099 }
1100
1101 /* Get Features for Temp Threshold */
1102 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1103 &feature_resp);
1104 if (res != NVME_SC_SUCCESS)
1105 temp_c_thresh = LOG_TEMP_UNKNOWN;
1106 else
1107 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1108
1109 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1110 /* Subpage=0x00, Page Length MSB=0 */
1111 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1112 /* Temperature Log Parameter 1 (Temperature) Start */
1113 /* Parameter Code = 0x0000 */
1114 log_response[6] = 0x01; /* Format and Linking = 01b */
1115 log_response[7] = 0x02; /* Parameter Length */
1116 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1117 log_response[9] = temp_c_cur;
1118 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1119 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1120 log_response[12] = 0x01; /* Format and Linking = 01b */
1121 log_response[13] = 0x02; /* Parameter Length */
1122 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1123 log_response[15] = temp_c_thresh;
1124
1125 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1126 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1127
1128 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1129 mem, dma_addr);
1130 out_dma:
1131 kfree(log_response);
1132 out_mem:
1133 return res;
1134}
1135
1136/* MODE SENSE Helper Functions */
1137
1138static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1139 u16 mode_data_length, u16 blk_desc_len)
1140{
1141 /* Quick check to make sure I don't stomp on my own memory... */
1142 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1143 return SNTI_INTERNAL_ERROR;
1144
1145 if (cdb10) {
1146 resp[0] = (mode_data_length & 0xFF00) >> 8;
1147 resp[1] = (mode_data_length & 0x00FF);
1148 /* resp[2] and [3] are zero */
1149 resp[4] = llbaa;
1150 resp[5] = RESERVED_FIELD;
1151 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1152 resp[7] = (blk_desc_len & 0x00FF);
1153 } else {
1154 resp[0] = (mode_data_length & 0x00FF);
1155 /* resp[1] and [2] are zero */
1156 resp[3] = (blk_desc_len & 0x00FF);
1157 }
1158
1159 return SNTI_TRANSLATION_SUCCESS;
1160}
1161
1162static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1163 u8 *resp, int len, u8 llbaa)
1164{
1165 int res = SNTI_TRANSLATION_SUCCESS;
1166 int nvme_sc;
1167 struct nvme_dev *dev = ns->dev;
1168 dma_addr_t dma_addr;
1169 void *mem;
1170 struct nvme_id_ns *id_ns;
1171 u8 flbas;
1172 u32 lba_length;
1173
1174 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1175 return SNTI_INTERNAL_ERROR;
1176 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1177 return SNTI_INTERNAL_ERROR;
1178
1179 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1180 &dma_addr, GFP_KERNEL);
1181 if (mem == NULL) {
1182 res = -ENOMEM;
1183 goto out;
1184 }
1185
1186 /* nvme ns identify */
1187 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1188 res = nvme_trans_status_code(hdr, nvme_sc);
1189 if (res)
1190 goto out_dma;
1191 if (nvme_sc) {
1192 res = nvme_sc;
1193 goto out_dma;
1194 }
1195 id_ns = mem;
1196 flbas = (id_ns->flbas) & 0x0F;
1197 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1198
1199 if (llbaa == 0) {
8741ee4c 1200 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
5d0f6131 1201 /* Byte 4 is reserved */
8741ee4c 1202 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
5d0f6131
VV		 1203
1204 memcpy(resp, &tmp_cap, sizeof(u32));
1205 memcpy(&resp[4], &tmp_len, sizeof(u32));
1206 } else {
8741ee4c
VV		 1207 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1208 __be32 tmp_len = cpu_to_be32(lba_length);
5d0f6131
VV		 1209
1210 memcpy(resp, &tmp_cap, sizeof(u64));
1211 /* Bytes 8, 9, 10, 11 are reserved */
1212 memcpy(&resp[12], &tmp_len, sizeof(u32));
1213 }
1214
1215 out_dma:
1216 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1217 dma_addr);
1218 out:
1219 return res;
1220}
1221
1222static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1223 struct sg_io_hdr *hdr, u8 *resp,
1224 int len)
1225{
1226 if (len < MODE_PAGE_CONTROL_LEN)
1227 return SNTI_INTERNAL_ERROR;
1228
1229 resp[0] = MODE_PAGE_CONTROL;
1230 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1231 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1232 * D_SENSE=1, GLTSD=1, RLEC=0 */
1233 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1234 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1235 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1236 /* resp[6] and [7] are obsolete, thus zero */
1237 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1238 resp[9] = 0xFF;
1239 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1240
1241 return SNTI_TRANSLATION_SUCCESS;
1242}
1243
1244static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1245 struct sg_io_hdr *hdr,
1246 u8 *resp, int len)
1247{
1248 int res = SNTI_TRANSLATION_SUCCESS;
1249 int nvme_sc;
1250 struct nvme_dev *dev = ns->dev;
1251 u32 feature_resp;
1252 u8 vwc;
1253
1254 if (len < MODE_PAGE_CACHING_LEN)
1255 return SNTI_INTERNAL_ERROR;
1256
1257 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1258 &feature_resp);
1259 res = nvme_trans_status_code(hdr, nvme_sc);
1260 if (res)
1261 goto out;
1262 if (nvme_sc) {
1263 res = nvme_sc;
1264 goto out;
1265 }
1266 vwc = feature_resp & 0x00000001;
1267
1268 resp[0] = MODE_PAGE_CACHING;
1269 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1270 resp[2] = vwc << 2;
1271
1272 out:
1273 return res;
1274}
1275
1276static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1277 struct sg_io_hdr *hdr, u8 *resp,
1278 int len)
1279{
1280 int res = SNTI_TRANSLATION_SUCCESS;
1281
1282 if (len < MODE_PAGE_POW_CND_LEN)
1283 return SNTI_INTERNAL_ERROR;
1284
1285 resp[0] = MODE_PAGE_POWER_CONDITION;
1286 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1287 /* All other bytes are zero */
1288
1289 return res;
1290}
1291
1292static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1293 struct sg_io_hdr *hdr, u8 *resp,
1294 int len)
1295{
1296 int res = SNTI_TRANSLATION_SUCCESS;
1297
1298 if (len < MODE_PAGE_INF_EXC_LEN)
1299 return SNTI_INTERNAL_ERROR;
1300
1301 resp[0] = MODE_PAGE_INFO_EXCEP;
1302 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1303 resp[2] = 0x88;
1304 /* All other bytes are zero */
1305
1306 return res;
1307}
1308
1309static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1310 u8 *resp, int len)
1311{
1312 int res = SNTI_TRANSLATION_SUCCESS;
1313 u16 mode_pages_offset_1 = 0;
1314 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1315
1316 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1317 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1318 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1319
1320 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1321 MODE_PAGE_CACHING_LEN);
1322 if (res != SNTI_TRANSLATION_SUCCESS)
1323 goto out;
1324 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1325 MODE_PAGE_CONTROL_LEN);
1326 if (res != SNTI_TRANSLATION_SUCCESS)
1327 goto out;
1328 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1329 MODE_PAGE_POW_CND_LEN);
1330 if (res != SNTI_TRANSLATION_SUCCESS)
1331 goto out;
1332 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1333 MODE_PAGE_INF_EXC_LEN);
1334 if (res != SNTI_TRANSLATION_SUCCESS)
1335 goto out;
1336
1337 out:
1338 return res;
1339}
1340
1341static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1342{
1343 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1344 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1345 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1346 } else {
1347 return 0;
1348 }
1349}
1350
1351static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1352 struct sg_io_hdr *hdr, u8 *cmd,
1353 u16 alloc_len, u8 cdb10,
1354 int (*mode_page_fill_func)
1355 (struct nvme_ns *,
1356 struct sg_io_hdr *hdr, u8 *, int),
1357 u16 mode_pages_tot_len)
1358{
1359 int res = SNTI_TRANSLATION_SUCCESS;
1360 int xfer_len;
1361 u8 *response;
1362 u8 dbd, llbaa;
1363 u16 resp_size;
1364 int mph_size;
1365 u16 mode_pages_offset_1;
1366 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1367
1368 dbd = GET_MODE_SENSE_DBD(cmd);
1369 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1370 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1371 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1372
1373 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1374 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1375 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1376
1377 blk_desc_offset = mph_size;
1378 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1379
03ea83e9 1380 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 1381 if (response == NULL) {
1382 res = -ENOMEM;
1383 goto out_mem;
1384 }
5d0f6131
VV		 1385
1386 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1387 llbaa, mode_data_length, blk_desc_len);
1388 if (res != SNTI_TRANSLATION_SUCCESS)
1389 goto out_free;
1390 if (blk_desc_len > 0) {
1391 res = nvme_trans_fill_blk_desc(ns, hdr,
1392 &response[blk_desc_offset],
1393 blk_desc_len, llbaa);
1394 if (res != SNTI_TRANSLATION_SUCCESS)
1395 goto out_free;
1396 }
1397 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1398 mode_pages_tot_len);
1399 if (res != SNTI_TRANSLATION_SUCCESS)
1400 goto out_free;
1401
1402 xfer_len = min(alloc_len, resp_size);
1403 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1404
1405 out_free:
1406 kfree(response);
1407 out_mem:
1408 return res;
1409}
1410
1411/* Read Capacity Helper Functions */
1412
1413static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1414 u8 cdb16)
1415{
1416 u8 flbas;
1417 u32 lba_length;
1418 u64 rlba;
1419 u8 prot_en;
1420 u8 p_type_lut[4] = {0, 0, 1, 2};
8741ee4c
VV		 1421 __be64 tmp_rlba;
1422 __be32 tmp_rlba_32;
1423 __be32 tmp_len;
5d0f6131
VV		 1424
1425 flbas = (id_ns->flbas) & 0x0F;
1426 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1427 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1428 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1429
1430 if (!cdb16) {
1431 if (rlba > 0xFFFFFFFF)
1432 rlba = 0xFFFFFFFF;
1433 tmp_rlba_32 = cpu_to_be32(rlba);
1434 tmp_len = cpu_to_be32(lba_length);
1435 memcpy(response, &tmp_rlba_32, sizeof(u32));
1436 memcpy(&response[4], &tmp_len, sizeof(u32));
1437 } else {
1438 tmp_rlba = cpu_to_be64(rlba);
1439 tmp_len = cpu_to_be32(lba_length);
1440 memcpy(response, &tmp_rlba, sizeof(u64));
1441 memcpy(&response[8], &tmp_len, sizeof(u32));
1442 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1443 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1444 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1445 /* Bytes 16-31 - Reserved */
1446 }
1447}
1448
1449/* Start Stop Unit Helper Functions */
1450
1451static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1452 u8 pc, u8 pcmod, u8 start)
1453{
1454 int res = SNTI_TRANSLATION_SUCCESS;
1455 int nvme_sc;
1456 struct nvme_dev *dev = ns->dev;
1457 dma_addr_t dma_addr;
1458 void *mem;
1459 struct nvme_id_ctrl *id_ctrl;
1460 int lowest_pow_st; /* max npss = lowest power consumption */
1461 unsigned ps_desired = 0;
1462
1463 /* NVMe Controller Identify */
1464 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1465 sizeof(struct nvme_id_ctrl),
1466 &dma_addr, GFP_KERNEL);
1467 if (mem == NULL) {
1468 res = -ENOMEM;
1469 goto out;
1470 }
1471 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1472 res = nvme_trans_status_code(hdr, nvme_sc);
1473 if (res)
1474 goto out_dma;
1475 if (nvme_sc) {
1476 res = nvme_sc;
1477 goto out_dma;
1478 }
1479 id_ctrl = mem;
1480 lowest_pow_st = id_ctrl->npss - 1;
1481
1482 switch (pc) {
1483 case NVME_POWER_STATE_START_VALID:
1484 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1485 if (pcmod == 0 && start == 0x1)
1486 ps_desired = POWER_STATE_0;
1487 if (pcmod == 0 && start == 0x0)
1488 ps_desired = lowest_pow_st;
1489 break;
1490 case NVME_POWER_STATE_ACTIVE:
1491 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1492 if (pcmod == 0)
1493 ps_desired = POWER_STATE_0;
1494 break;
1495 case NVME_POWER_STATE_IDLE:
1496 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
1497 /* min of desired state and (lps-1) because lps is STOP */
1498 if (pcmod == 0x0)
1499 ps_desired = min(POWER_STATE_1, (lowest_pow_st - 1));
1500 else if (pcmod == 0x1)
1501 ps_desired = min(POWER_STATE_2, (lowest_pow_st - 1));
1502 else if (pcmod == 0x2)
1503 ps_desired = min(POWER_STATE_3, (lowest_pow_st - 1));
1504 break;
1505 case NVME_POWER_STATE_STANDBY:
1506 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1507 if (pcmod == 0x0)
1508 ps_desired = max(0, (lowest_pow_st - 2));
1509 else if (pcmod == 0x1)
1510 ps_desired = max(0, (lowest_pow_st - 1));
1511 break;
1512 case NVME_POWER_STATE_LU_CONTROL:
1513 default:
1514 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1515 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1516 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1517 break;
1518 }
1519 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1520 NULL);
1521 res = nvme_trans_status_code(hdr, nvme_sc);
1522 if (res)
1523 goto out_dma;
1524 if (nvme_sc)
1525 res = nvme_sc;
1526 out_dma:
1527 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
1528 dma_addr);
1529 out:
1530 return res;
1531}
1532
1533/* Write Buffer Helper Functions */
1534/* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
1535
1536static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1537 u8 opcode, u32 tot_len, u32 offset,
1538 u8 buffer_id)
1539{
1540 int res = SNTI_TRANSLATION_SUCCESS;
1541 int nvme_sc;
1542 struct nvme_dev *dev = ns->dev;
1543 struct nvme_command c;
1544 struct nvme_iod *iod = NULL;
1545 unsigned length;
1546
1547 memset(&c, 0, sizeof(c));
1548 c.common.opcode = opcode;
1549 if (opcode == nvme_admin_download_fw) {
1550 if (hdr->iovec_count > 0) {
1551 /* Assuming SGL is not allowed for this command */
1552 res = nvme_trans_completion(hdr,
1553 SAM_STAT_CHECK_CONDITION,
1554 ILLEGAL_REQUEST,
1555 SCSI_ASC_INVALID_CDB,
1556 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1557 goto out;
1558 }
1559 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1560 (unsigned long)hdr->dxferp, tot_len);
1561 if (IS_ERR(iod)) {
1562 res = PTR_ERR(iod);
1563 goto out;
1564 }
edd10d33 1565 length = nvme_setup_prps(dev, iod, tot_len, GFP_KERNEL);
5d0f6131
VV		 1566 if (length != tot_len) {
1567 res = -ENOMEM;
1568 goto out_unmap;
1569 }
1570
edd10d33
KB		 1571 c.dlfw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1572 c.dlfw.prp2 = cpu_to_le64(iod->first_dma);
8741ee4c
VV		 1573 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1574 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
5d0f6131 1575 } else if (opcode == nvme_admin_activate_fw) {
ab3ea5bf
MW		 1576 u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
1577 c.common.cdw10[0] = cpu_to_le32(cdw10);
5d0f6131
VV		 1578 }
1579
1580 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1581 res = nvme_trans_status_code(hdr, nvme_sc);
1582 if (res)
1583 goto out_unmap;
1584 if (nvme_sc)
1585 res = nvme_sc;
1586
1587 out_unmap:
1588 if (opcode == nvme_admin_download_fw) {
1589 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1590 nvme_free_iod(dev, iod);
1591 }
1592 out:
1593 return res;
1594}
1595
1596/* Mode Select Helper Functions */
1597
1598static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1599 u16 *bd_len, u8 *llbaa)
1600{
1601 if (cdb10) {
1602 /* 10 Byte CDB */
1603 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1604 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1605 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &&
1606 MODE_SELECT_10_LLBAA_MASK;
1607 } else {
1608 /* 6 Byte CDB */
1609 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1610 }
1611}
1612
1613static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1614 u16 idx, u16 bd_len, u8 llbaa)
1615{
1616 u16 bd_num;
1617
1618 bd_num = bd_len / ((llbaa == 0) ?
1619 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1620 /* Store block descriptor info if a FORMAT UNIT comes later */
1621 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1622 if (llbaa == 0) {
1623 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1624 ns->mode_select_num_blocks =
1625 (parm_list[idx + 1] << 16) +
1626 (parm_list[idx + 2] << 8) +
1627 (parm_list[idx + 3]);
1628
1629 ns->mode_select_block_len =
1630 (parm_list[idx + 5] << 16) +
1631 (parm_list[idx + 6] << 8) +
1632 (parm_list[idx + 7]);
1633 } else {
1634 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1635 ns->mode_select_num_blocks =
1636 (((u64)parm_list[idx + 0]) << 56) +
1637 (((u64)parm_list[idx + 1]) << 48) +
1638 (((u64)parm_list[idx + 2]) << 40) +
1639 (((u64)parm_list[idx + 3]) << 32) +
1640 (((u64)parm_list[idx + 4]) << 24) +
1641 (((u64)parm_list[idx + 5]) << 16) +
1642 (((u64)parm_list[idx + 6]) << 8) +
1643 ((u64)parm_list[idx + 7]);
1644
1645 ns->mode_select_block_len =
1646 (parm_list[idx + 12] << 24) +
1647 (parm_list[idx + 13] << 16) +
1648 (parm_list[idx + 14] << 8) +
1649 (parm_list[idx + 15]);
1650 }
1651}
1652
710a143d 1653static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
5d0f6131
VV		 1654 u8 *mode_page, u8 page_code)
1655{
1656 int res = SNTI_TRANSLATION_SUCCESS;
1657 int nvme_sc;
1658 struct nvme_dev *dev = ns->dev;
1659 unsigned dword11;
1660
1661 switch (page_code) {
1662 case MODE_PAGE_CACHING:
1663 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1664 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1665 0, NULL);
1666 res = nvme_trans_status_code(hdr, nvme_sc);
1667 if (res)
1668 break;
1669 if (nvme_sc) {
1670 res = nvme_sc;
1671 break;
1672 }
1673 break;
1674 case MODE_PAGE_CONTROL:
1675 break;
1676 case MODE_PAGE_POWER_CONDITION:
1677 /* Verify the OS is not trying to set timers */
1678 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1679 res = nvme_trans_completion(hdr,
1680 SAM_STAT_CHECK_CONDITION,
1681 ILLEGAL_REQUEST,
1682 SCSI_ASC_INVALID_PARAMETER,
1683 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1684 if (!res)
1685 res = SNTI_INTERNAL_ERROR;
1686 break;
1687 }
1688 break;
1689 default:
1690 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1691 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1692 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1693 if (!res)
1694 res = SNTI_INTERNAL_ERROR;
1695 break;
1696 }
1697
1698 return res;
1699}
1700
1701static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1702 u8 *cmd, u16 parm_list_len, u8 pf,
1703 u8 sp, u8 cdb10)
1704{
1705 int res = SNTI_TRANSLATION_SUCCESS;
1706 u8 *parm_list;
1707 u16 bd_len;
1708 u8 llbaa = 0;
1709 u16 index, saved_index;
1710 u8 page_code;
1711 u16 mp_size;
1712
1713 /* Get parm list from data-in/out buffer */
1714 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1715 if (parm_list == NULL) {
1716 res = -ENOMEM;
1717 goto out;
1718 }
1719
1720 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1721 if (res != SNTI_TRANSLATION_SUCCESS)
1722 goto out_mem;
1723
1724 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1725 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1726
1727 if (bd_len != 0) {
1728 /* Block Descriptors present, parse */
1729 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1730 index += bd_len;
1731 }
1732 saved_index = index;
1733
1734 /* Multiple mode pages may be present; iterate through all */
1735 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1736 do {
1737 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1738 mp_size = parm_list[index + 1] + 2;
1739 if ((page_code != MODE_PAGE_CACHING) &&
1740 (page_code != MODE_PAGE_CONTROL) &&
1741 (page_code != MODE_PAGE_POWER_CONDITION)) {
1742 res = nvme_trans_completion(hdr,
1743 SAM_STAT_CHECK_CONDITION,
1744 ILLEGAL_REQUEST,
1745 SCSI_ASC_INVALID_CDB,
1746 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1747 goto out_mem;
1748 }
1749 index += mp_size;
1750 } while (index < parm_list_len);
1751
1752 /* In 2nd Iteration, do the NVME Commands */
1753 index = saved_index;
1754 do {
1755 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1756 mp_size = parm_list[index + 1] + 2;
1757 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1758 page_code);
1759 if (res != SNTI_TRANSLATION_SUCCESS)
1760 break;
1761 index += mp_size;
1762 } while (index < parm_list_len);
1763
1764 out_mem:
1765 kfree(parm_list);
1766 out:
1767 return res;
1768}
1769
1770/* Format Unit Helper Functions */
1771
1772static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1773 struct sg_io_hdr *hdr)
1774{
1775 int res = SNTI_TRANSLATION_SUCCESS;
1776 int nvme_sc;
1777 struct nvme_dev *dev = ns->dev;
1778 dma_addr_t dma_addr;
1779 void *mem;
1780 struct nvme_id_ns *id_ns;
1781 u8 flbas;
1782
1783 /*
1784 * SCSI Expects a MODE SELECT would have been issued prior to
1785 * a FORMAT UNIT, and the block size and number would be used
1786 * from the block descriptor in it. If a MODE SELECT had not
1787 * been issued, FORMAT shall use the current values for both.
1788 */
1789
1790 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
1791 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1792 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1793 if (mem == NULL) {
1794 res = -ENOMEM;
1795 goto out;
1796 }
1797 /* nvme ns identify */
1798 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1799 res = nvme_trans_status_code(hdr, nvme_sc);
1800 if (res)
1801 goto out_dma;
1802 if (nvme_sc) {
1803 res = nvme_sc;
1804 goto out_dma;
1805 }
1806 id_ns = mem;
1807
1808 if (ns->mode_select_num_blocks == 0)
8741ee4c 1809 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
5d0f6131
VV		 1810 if (ns->mode_select_block_len == 0) {
1811 flbas = (id_ns->flbas) & 0x0F;
1812 ns->mode_select_block_len =
1813 (1 << (id_ns->lbaf[flbas].ds));
1814 }
1815 out_dma:
1816 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1817 mem, dma_addr);
1818 }
1819 out:
1820 return res;
1821}
1822
1823static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1824 u8 format_prot_info, u8 *nvme_pf_code)
1825{
1826 int res = SNTI_TRANSLATION_SUCCESS;
1827 u8 *parm_list;
1828 u8 pf_usage, pf_code;
1829
1830 parm_list = kmalloc(len, GFP_KERNEL);
1831 if (parm_list == NULL) {
1832 res = -ENOMEM;
1833 goto out;
1834 }
1835 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1836 if (res != SNTI_TRANSLATION_SUCCESS)
1837 goto out_mem;
1838
1839 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1840 FORMAT_UNIT_IMMED_MASK) != 0) {
1841 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1842 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1843 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1844 goto out_mem;
1845 }
1846
1847 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1848 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1849 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1850 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1851 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1852 goto out_mem;
1853 }
1854 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1855 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1856 pf_code = (pf_usage << 2) | format_prot_info;
1857 switch (pf_code) {
1858 case 0:
1859 *nvme_pf_code = 0;
1860 break;
1861 case 2:
1862 *nvme_pf_code = 1;
1863 break;
1864 case 3:
1865 *nvme_pf_code = 2;
1866 break;
1867 case 7:
1868 *nvme_pf_code = 3;
1869 break;
1870 default:
1871 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1872 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1873 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1874 break;
1875 }
1876
1877 out_mem:
1878 kfree(parm_list);
1879 out:
1880 return res;
1881}
1882
1883static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1884 u8 prot_info)
1885{
1886 int res = SNTI_TRANSLATION_SUCCESS;
1887 int nvme_sc;
1888 struct nvme_dev *dev = ns->dev;
1889 dma_addr_t dma_addr;
1890 void *mem;
1891 struct nvme_id_ns *id_ns;
1892 u8 i;
1893 u8 flbas, nlbaf;
1894 u8 selected_lbaf = 0xFF;
1895 u32 cdw10 = 0;
1896 struct nvme_command c;
1897
1898 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
1899 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1900 &dma_addr, GFP_KERNEL);
1901 if (mem == NULL) {
1902 res = -ENOMEM;
1903 goto out;
1904 }
1905 /* nvme ns identify */
1906 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1907 res = nvme_trans_status_code(hdr, nvme_sc);
1908 if (res)
1909 goto out_dma;
1910 if (nvme_sc) {
1911 res = nvme_sc;
1912 goto out_dma;
1913 }
1914 id_ns = mem;
1915 flbas = (id_ns->flbas) & 0x0F;
1916 nlbaf = id_ns->nlbaf;
1917
1918 for (i = 0; i < nlbaf; i++) {
1919 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1920 selected_lbaf = i;
1921 break;
1922 }
1923 }
1924 if (selected_lbaf > 0x0F) {
1925 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1926 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1927 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1928 }
8741ee4c 1929 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
5d0f6131
VV		 1930 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1931 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1932 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1933 }
1934
1935 cdw10 |= prot_info << 5;
1936 cdw10 |= selected_lbaf & 0x0F;
1937 memset(&c, 0, sizeof(c));
1938 c.format.opcode = nvme_admin_format_nvm;
8741ee4c 1939 c.format.nsid = cpu_to_le32(ns->ns_id);
5d0f6131
VV		 1940 c.format.cdw10 = cpu_to_le32(cdw10);
1941
1942 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1943 res = nvme_trans_status_code(hdr, nvme_sc);
1944 if (res)
1945 goto out_dma;
1946 if (nvme_sc)
1947 res = nvme_sc;
1948
1949 out_dma:
1950 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1951 dma_addr);
1952 out:
1953 return res;
1954}
1955
1956/* Read/Write Helper Functions */
1957
1958static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1959 struct nvme_trans_io_cdb *cdb_info)
1960{
1961 cdb_info->fua = 0;
1962 cdb_info->prot_info = 0;
1963 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1964 IO_6_CDB_LBA_MASK;
1965 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1966
1967 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1968 if (cdb_info->xfer_len == 0)
1969 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1970}
1971
1972static inline void nvme_trans_get_io_cdb10(u8 *cmd,
1973 struct nvme_trans_io_cdb *cdb_info)
1974{
1975 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
1976 IO_CDB_FUA_MASK;
1977 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
1978 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1979 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
1980 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
1981}
1982
1983static inline void nvme_trans_get_io_cdb12(u8 *cmd,
1984 struct nvme_trans_io_cdb *cdb_info)
1985{
1986 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
1987 IO_CDB_FUA_MASK;
1988 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
1989 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1990 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
1991 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
1992}
1993
1994static inline void nvme_trans_get_io_cdb16(u8 *cmd,
1995 struct nvme_trans_io_cdb *cdb_info)
1996{
1997 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
1998 IO_CDB_FUA_MASK;
1999 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
2000 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2001 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
2002 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
2003}
2004
2005static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2006 struct nvme_trans_io_cdb *cdb_info,
2007 u32 max_blocks)
2008{
2009 /* If using iovecs, send one nvme command per vector */
2010 if (hdr->iovec_count > 0)
2011 return hdr->iovec_count;
2012 else if (cdb_info->xfer_len > max_blocks)
2013 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2014 else
2015 return 1;
2016}
2017
2018static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2019 struct nvme_trans_io_cdb *cdb_info)
2020{
2021 u16 control = 0;
2022
2023 /* When Protection information support is added, implement here */
2024
2025 if (cdb_info->fua > 0)
2026 control |= NVME_RW_FUA;
2027
2028 return control;
2029}
2030
2031static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2032 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2033{
2034 int res = SNTI_TRANSLATION_SUCCESS;
2035 int nvme_sc;
2036 struct nvme_dev *dev = ns->dev;
5d0f6131
VV		 2037 u32 num_cmds;
2038 struct nvme_iod *iod;
2039 u64 unit_len;
2040 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2041 u32 retcode;
2042 u32 i = 0;
2043 u64 nvme_offset = 0;
8741ee4c 2044 void __user *next_mapping_addr;
5d0f6131
VV		 2045 struct nvme_command c;
2046 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2047 u16 control;
ddcb7762 2048 u32 max_blocks = queue_max_hw_sectors(ns->queue);
5d0f6131
VV		 2049
2050 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2051
2052 /*
2053 * This loop handles two cases.
2054 * First, when an SGL is used in the form of an iovec list:
2055 * - Use iov_base as the next mapping address for the nvme command_id
2056 * - Use iov_len as the data transfer length for the command.
2057 * Second, when we have a single buffer
2058 * - If larger than max_blocks, split into chunks, offset
2059 * each nvme command accordingly.
2060 */
2061 for (i = 0; i < num_cmds; i++) {
2062 memset(&c, 0, sizeof(c));
2063 if (hdr->iovec_count > 0) {
8741ee4c
VV		 2064 struct sg_iovec sgl;
2065
2066 retcode = copy_from_user(&sgl, hdr->dxferp +
2067 i * sizeof(struct sg_iovec),
2068 sizeof(struct sg_iovec));
2069 if (retcode)
2070 return -EFAULT;
2071 unit_len = sgl.iov_len;
5d0f6131 2072 unit_num_blocks = unit_len >> ns->lba_shift;
8741ee4c 2073 next_mapping_addr = sgl.iov_base;
5d0f6131
VV		 2074 } else {
2075 unit_num_blocks = min((u64)max_blocks,
2076 (cdb_info->xfer_len - nvme_offset));
2077 unit_len = unit_num_blocks << ns->lba_shift;
2078 next_mapping_addr = hdr->dxferp +
2079 ((1 << ns->lba_shift) * nvme_offset);
2080 }
2081
2082 c.rw.opcode = opcode;
2083 c.rw.nsid = cpu_to_le32(ns->ns_id);
2084 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2085 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2086 control = nvme_trans_io_get_control(ns, cdb_info);
2087 c.rw.control = cpu_to_le16(control);
2088
2089 iod = nvme_map_user_pages(dev,
2090 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2091 (unsigned long)next_mapping_addr, unit_len);
2092 if (IS_ERR(iod)) {
2093 res = PTR_ERR(iod);
2094 goto out;
2095 }
edd10d33 2096 retcode = nvme_setup_prps(dev, iod, unit_len, GFP_KERNEL);
5d0f6131
VV		 2097 if (retcode != unit_len) {
2098 nvme_unmap_user_pages(dev,
2099 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2100 iod);
2101 nvme_free_iod(dev, iod);
2102 res = -ENOMEM;
2103 goto out;
2104 }
edd10d33
KB		 2105 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
2106 c.rw.prp2 = cpu_to_le64(iod->first_dma);
5d0f6131
VV		 2107
2108 nvme_offset += unit_num_blocks;
2109
4f5099af 2110 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
5d0f6131
VV		 2111 if (nvme_sc != NVME_SC_SUCCESS) {
2112 nvme_unmap_user_pages(dev,
2113 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2114 iod);
2115 nvme_free_iod(dev, iod);
2116 res = nvme_trans_status_code(hdr, nvme_sc);
2117 goto out;
2118 }
2119 nvme_unmap_user_pages(dev,
2120 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2121 iod);
2122 nvme_free_iod(dev, iod);
2123 }
2124 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2125
2126 out:
2127 return res;
2128}
2129
2130
2131/* SCSI Command Translation Functions */
2132
2133static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2134 u8 *cmd)
2135{
2136 int res = SNTI_TRANSLATION_SUCCESS;
2137 struct nvme_trans_io_cdb cdb_info;
2138 u8 opcode = cmd[0];
2139 u64 xfer_bytes;
2140 u64 sum_iov_len = 0;
8741ee4c 2141 struct sg_iovec sgl;
5d0f6131 2142 int i;
8741ee4c 2143 size_t not_copied;
5d0f6131
VV		 2144
2145 /* Extract Fields from CDB */
2146 switch (opcode) {
2147 case WRITE_6:
2148 case READ_6:
2149 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2150 break;
2151 case WRITE_10:
2152 case READ_10:
2153 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2154 break;
2155 case WRITE_12:
2156 case READ_12:
2157 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2158 break;
2159 case WRITE_16:
2160 case READ_16:
2161 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2162 break;
2163 default:
2164 /* Will never really reach here */
2165 res = SNTI_INTERNAL_ERROR;
2166 goto out;
2167 }
2168
2169 /* Calculate total length of transfer (in bytes) */
2170 if (hdr->iovec_count > 0) {
5d0f6131 2171 for (i = 0; i < hdr->iovec_count; i++) {
8741ee4c
VV		 2172 not_copied = copy_from_user(&sgl, hdr->dxferp +
2173 i * sizeof(struct sg_iovec),
2174 sizeof(struct sg_iovec));
2175 if (not_copied)
2176 return -EFAULT;
2177 sum_iov_len += sgl.iov_len;
5d0f6131 2178 /* IO vector sizes should be multiples of block size */
8741ee4c 2179 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
5d0f6131
VV		 2180 res = nvme_trans_completion(hdr,
2181 SAM_STAT_CHECK_CONDITION,
2182 ILLEGAL_REQUEST,
2183 SCSI_ASC_INVALID_PARAMETER,
2184 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2185 goto out;
2186 }
2187 }
2188 } else {
2189 sum_iov_len = hdr->dxfer_len;
2190 }
2191
2192 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2193 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2194
2195 /* If block count and actual data buffer size dont match, error out */
2196 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2197 res = -EINVAL;
2198 goto out;
2199 }
2200
2201 /* Check for 0 length transfer - it is not illegal */
2202 if (cdb_info.xfer_len == 0)
2203 goto out;
2204
2205 /* Send NVMe IO Command(s) */
2206 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2207 if (res != SNTI_TRANSLATION_SUCCESS)
2208 goto out;
2209
2210 out:
2211 return res;
2212}
2213
2214static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2215 u8 *cmd)
2216{
2217 int res = SNTI_TRANSLATION_SUCCESS;
2218 u8 evpd;
2219 u8 page_code;
2220 int alloc_len;
2221 u8 *inq_response;
2222
2223 evpd = GET_INQ_EVPD_BIT(cmd);
2224 page_code = GET_INQ_PAGE_CODE(cmd);
2225 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2226
2227 inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL);
2228 if (inq_response == NULL) {
2229 res = -ENOMEM;
2230 goto out_mem;
2231 }
2232
2233 if (evpd == 0) {
2234 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2235 res = nvme_trans_standard_inquiry_page(ns, hdr,
2236 inq_response, alloc_len);
2237 } else {
2238 res = nvme_trans_completion(hdr,
2239 SAM_STAT_CHECK_CONDITION,
2240 ILLEGAL_REQUEST,
2241 SCSI_ASC_INVALID_CDB,
2242 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2243 }
2244 } else {
2245 switch (page_code) {
2246 case VPD_SUPPORTED_PAGES:
2247 res = nvme_trans_supported_vpd_pages(ns, hdr,
2248 inq_response, alloc_len);
2249 break;
2250 case VPD_SERIAL_NUMBER:
2251 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2252 alloc_len);
2253 break;
2254 case VPD_DEVICE_IDENTIFIERS:
2255 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2256 alloc_len);
2257 break;
2258 case VPD_EXTENDED_INQUIRY:
2259 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2260 break;
2261 case VPD_BLOCK_DEV_CHARACTERISTICS:
2262 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2263 break;
2264 default:
2265 res = nvme_trans_completion(hdr,
2266 SAM_STAT_CHECK_CONDITION,
2267 ILLEGAL_REQUEST,
2268 SCSI_ASC_INVALID_CDB,
2269 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2270 break;
2271 }
2272 }
2273 kfree(inq_response);
2274 out_mem:
2275 return res;
2276}
2277
2278static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2279 u8 *cmd)
2280{
2281 int res = SNTI_TRANSLATION_SUCCESS;
2282 u16 alloc_len;
2283 u8 sp;
2284 u8 pc;
2285 u8 page_code;
2286
2287 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2288 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2289 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2290 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2291 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2292 goto out;
2293 }
2294 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2295 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2296 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2297 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2298 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2299 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2300 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2301 goto out;
2302 }
2303 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2304 switch (page_code) {
2305 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2306 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2307 break;
2308 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2309 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2310 break;
2311 case LOG_PAGE_TEMPERATURE_PAGE:
2312 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2313 break;
2314 default:
2315 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2316 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2317 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2318 break;
2319 }
2320
2321 out:
2322 return res;
2323}
2324
2325static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2326 u8 *cmd)
2327{
2328 int res = SNTI_TRANSLATION_SUCCESS;
2329 u8 cdb10 = 0;
2330 u16 parm_list_len;
2331 u8 page_format;
2332 u8 save_pages;
2333
2334 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2335 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2336
2337 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2338 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2339
2340 if (GET_OPCODE(cmd) == MODE_SELECT) {
2341 parm_list_len = GET_U8_FROM_CDB(cmd,
2342 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2343 } else {
2344 parm_list_len = GET_U16_FROM_CDB(cmd,
2345 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2346 cdb10 = 1;
2347 }
2348
2349 if (parm_list_len != 0) {
2350 /*
2351 * According to SPC-4 r24, a paramter list length field of 0
2352 * shall not be considered an error
2353 */
2354 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2355 page_format, save_pages, cdb10);
2356 }
2357
2358 return res;
2359}
2360
2361static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2362 u8 *cmd)
2363{
2364 int res = SNTI_TRANSLATION_SUCCESS;
2365 u16 alloc_len;
2366 u8 cdb10 = 0;
2367 u8 page_code;
2368 u8 pc;
2369
2370 if (GET_OPCODE(cmd) == MODE_SENSE) {
2371 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2372 } else {
2373 alloc_len = GET_U16_FROM_CDB(cmd,
2374 MODE_SENSE10_ALLOC_LEN_OFFSET);
2375 cdb10 = 1;
2376 }
2377
2378 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2379 MODE_SENSE_PAGE_CONTROL_MASK;
2380 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2381 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2382 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2383 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2384 goto out;
2385 }
2386
2387 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2388 MODE_SENSE_PAGE_CODE_MASK;
2389 switch (page_code) {
2390 case MODE_PAGE_CACHING:
2391 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2392 cdb10,
2393 &nvme_trans_fill_caching_page,
2394 MODE_PAGE_CACHING_LEN);
2395 break;
2396 case MODE_PAGE_CONTROL:
2397 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2398 cdb10,
2399 &nvme_trans_fill_control_page,
2400 MODE_PAGE_CONTROL_LEN);
2401 break;
2402 case MODE_PAGE_POWER_CONDITION:
2403 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2404 cdb10,
2405 &nvme_trans_fill_pow_cnd_page,
2406 MODE_PAGE_POW_CND_LEN);
2407 break;
2408 case MODE_PAGE_INFO_EXCEP:
2409 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2410 cdb10,
2411 &nvme_trans_fill_inf_exc_page,
2412 MODE_PAGE_INF_EXC_LEN);
2413 break;
2414 case MODE_PAGE_RETURN_ALL:
2415 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2416 cdb10,
2417 &nvme_trans_fill_all_pages,
2418 MODE_PAGE_ALL_LEN);
2419 break;
2420 default:
2421 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2422 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2423 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2424 break;
2425 }
2426
2427 out:
2428 return res;
2429}
2430
2431static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2432 u8 *cmd)
2433{
2434 int res = SNTI_TRANSLATION_SUCCESS;
2435 int nvme_sc;
2436 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2437 u32 resp_size = READ_CAP_10_RESP_SIZE;
2438 u32 xfer_len;
2439 u8 cdb16;
2440 struct nvme_dev *dev = ns->dev;
2441 dma_addr_t dma_addr;
2442 void *mem;
2443 struct nvme_id_ns *id_ns;
2444 u8 *response;
2445
2446 cdb16 = IS_READ_CAP_16(cmd);
2447 if (cdb16) {
2448 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2449 resp_size = READ_CAP_16_RESP_SIZE;
2450 }
2451
2452 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
2453 &dma_addr, GFP_KERNEL);
2454 if (mem == NULL) {
2455 res = -ENOMEM;
2456 goto out;
2457 }
2458 /* nvme ns identify */
2459 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2460 res = nvme_trans_status_code(hdr, nvme_sc);
2461 if (res)
2462 goto out_dma;
2463 if (nvme_sc) {
2464 res = nvme_sc;
2465 goto out_dma;
2466 }
2467 id_ns = mem;
2468
03ea83e9 2469 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 2470 if (response == NULL) {
2471 res = -ENOMEM;
2472 goto out_dma;
2473 }
5d0f6131
VV		 2474 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2475
2476 xfer_len = min(alloc_len, resp_size);
2477 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2478
2479 kfree(response);
2480 out_dma:
2481 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
2482 dma_addr);
2483 out:
2484 return res;
2485}
2486
2487static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2488 u8 *cmd)
2489{
2490 int res = SNTI_TRANSLATION_SUCCESS;
2491 int nvme_sc;
2492 u32 alloc_len, xfer_len, resp_size;
2493 u8 select_report;
2494 u8 *response;
2495 struct nvme_dev *dev = ns->dev;
2496 dma_addr_t dma_addr;
2497 void *mem;
2498 struct nvme_id_ctrl *id_ctrl;
2499 u32 ll_length, lun_id;
2500 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
8741ee4c 2501 __be32 tmp_len;
5d0f6131
VV		 2502
2503 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2504 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2505
2506 if ((select_report != ALL_LUNS_RETURNED) &&
2507 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2508 (select_report != RESTRICTED_LUNS_RETURNED)) {
2509 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2510 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2511 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2512 goto out;
2513 } else {
2514 /* NVMe Controller Identify */
2515 mem = dma_alloc_coherent(&dev->pci_dev->dev,
2516 sizeof(struct nvme_id_ctrl),
2517 &dma_addr, GFP_KERNEL);
2518 if (mem == NULL) {
2519 res = -ENOMEM;
2520 goto out;
2521 }
2522 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2523 res = nvme_trans_status_code(hdr, nvme_sc);
2524 if (res)
2525 goto out_dma;
2526 if (nvme_sc) {
2527 res = nvme_sc;
2528 goto out_dma;
2529 }
2530 id_ctrl = mem;
8741ee4c 2531 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
5d0f6131
VV		 2532 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2533
2534 if (alloc_len < resp_size) {
2535 res = nvme_trans_completion(hdr,
2536 SAM_STAT_CHECK_CONDITION,
2537 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2538 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2539 goto out_dma;
2540 }
2541
03ea83e9 2542 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 2543 if (response == NULL) {
2544 res = -ENOMEM;
2545 goto out_dma;
2546 }
5d0f6131
VV		 2547
2548 /* The first LUN ID will always be 0 per the SAM spec */
8741ee4c 2549 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
5d0f6131
VV		 2550 /*
2551 * Set the LUN Id and then increment to the next LUN
2552 * location in the parameter data.
2553 */
8741ee4c 2554 __be64 tmp_id = cpu_to_be64(lun_id);
5d0f6131
VV		 2555 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2556 lun_id_offset += LUN_ENTRY_SIZE;
2557 }
2558 tmp_len = cpu_to_be32(ll_length);
2559 memcpy(response, &tmp_len, sizeof(u32));
2560 }
2561
2562 xfer_len = min(alloc_len, resp_size);
2563 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2564
2565 kfree(response);
2566 out_dma:
2567 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
2568 dma_addr);
2569 out:
2570 return res;
2571}
2572
2573static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2574 u8 *cmd)
2575{
2576 int res = SNTI_TRANSLATION_SUCCESS;
2577 u8 alloc_len, xfer_len, resp_size;
2578 u8 desc_format;
2579 u8 *response;
2580
2581 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2582 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2583 desc_format &= REQUEST_SENSE_DESC_MASK;
2584
2585 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2586 (FIXED_FMT_SENSE_DATA_SIZE));
03ea83e9 2587 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV		 2588 if (response == NULL) {
2589 res = -ENOMEM;
2590 goto out;
2591 }
5d0f6131
VV		 2592
2593 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2594 /* Descriptor Format Sense Data */
2595 response[0] = DESC_FORMAT_SENSE_DATA;
2596 response[1] = NO_SENSE;
2597 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2598 response[2] = SCSI_ASC_NO_SENSE;
2599 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2600 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2601 } else {
2602 /* Fixed Format Sense Data */
2603 response[0] = FIXED_SENSE_DATA;
2604 /* Byte 1 = Obsolete */
2605 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2606 /* Bytes 3-6 - Information - set to zero */
2607 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2608 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2609 response[12] = SCSI_ASC_NO_SENSE;
2610 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2611 /* Byte 14 = Field Replaceable Unit Code = 0 */
2612 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2613 }
2614
2615 xfer_len = min(alloc_len, resp_size);
2616 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2617
2618 kfree(response);
2619 out:
2620 return res;
2621}
2622
2623static int nvme_trans_security_protocol(struct nvme_ns *ns,
2624 struct sg_io_hdr *hdr,
2625 u8 *cmd)
2626{
2627 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2628 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2629 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2630}
2631
2632static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2633 u8 *cmd)
2634{
2635 int res = SNTI_TRANSLATION_SUCCESS;
2636 int nvme_sc;
14385de1 2637 struct nvme_command c;
5d0f6131
VV		 2638 u8 immed, pcmod, pc, no_flush, start;
2639
2640 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2641 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2642 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2643 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2644 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2645
2646 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2647 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2648 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2649 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2650 start &= START_STOP_UNIT_CDB_START_MASK;
2651
2652 if (immed != 0) {
2653 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2654 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2655 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2656 } else {
2657 if (no_flush == 0) {
2658 /* Issue NVME FLUSH command prior to START STOP UNIT */
14385de1
KB		 2659 memset(&c, 0, sizeof(c));
2660 c.common.opcode = nvme_cmd_flush;
2661 c.common.nsid = cpu_to_le32(ns->ns_id);
2662
4f5099af 2663 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
5d0f6131
VV		 2664 res = nvme_trans_status_code(hdr, nvme_sc);
2665 if (res)
2666 goto out;
2667 if (nvme_sc) {
2668 res = nvme_sc;
2669 goto out;
2670 }
2671 }
2672 /* Setup the expected power state transition */
2673 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2674 }
2675
2676 out:
2677 return res;
2678}
2679
2680static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2681 struct sg_io_hdr *hdr, u8 *cmd)
2682{
2683 int res = SNTI_TRANSLATION_SUCCESS;
2684 int nvme_sc;
14385de1 2685 struct nvme_command c;
14385de1
KB		 2686
2687 memset(&c, 0, sizeof(c));
2688 c.common.opcode = nvme_cmd_flush;
2689 c.common.nsid = cpu_to_le32(ns->ns_id);
2690
4f5099af 2691 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
14385de1 2692
5d0f6131
VV		 2693 res = nvme_trans_status_code(hdr, nvme_sc);
2694 if (res)
2695 goto out;
2696 if (nvme_sc)
2697 res = nvme_sc;
2698
2699 out:
2700 return res;
2701}
2702
2703static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2704 u8 *cmd)
2705{
2706 int res = SNTI_TRANSLATION_SUCCESS;
2707 u8 parm_hdr_len = 0;
2708 u8 nvme_pf_code = 0;
2709 u8 format_prot_info, long_list, format_data;
2710
2711 format_prot_info = GET_U8_FROM_CDB(cmd,
2712 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2713 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2714 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2715
2716 format_prot_info = (format_prot_info &
2717 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2718 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2719 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2720 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2721
2722 if (format_data != 0) {
2723 if (format_prot_info != 0) {
2724 if (long_list == 0)
2725 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2726 else
2727 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2728 }
2729 } else if (format_data == 0 && format_prot_info != 0) {
2730 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2731 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2732 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2733 goto out;
2734 }
2735
2736 /* Get parm header from data-in/out buffer */
2737 /*
2738 * According to the translation spec, the only fields in the parameter
2739 * list we are concerned with are in the header. So allocate only that.
2740 */
2741 if (parm_hdr_len > 0) {
2742 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2743 format_prot_info, &nvme_pf_code);
2744 if (res != SNTI_TRANSLATION_SUCCESS)
2745 goto out;
2746 }
2747
2748 /* Attempt to activate any previously downloaded firmware image */
2749 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
2750
2751 /* Determine Block size and count and send format command */
2752 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2753 if (res != SNTI_TRANSLATION_SUCCESS)
2754 goto out;
2755
2756 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2757
2758 out:
2759 return res;
2760}
2761
2762static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2763 struct sg_io_hdr *hdr,
2764 u8 *cmd)
2765{
2766 int res = SNTI_TRANSLATION_SUCCESS;
2767 struct nvme_dev *dev = ns->dev;
2768
2769 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2770 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2771 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2772 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2773 else
2774 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2775
2776 return res;
2777}
2778
2779static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2780 u8 *cmd)
2781{
2782 int res = SNTI_TRANSLATION_SUCCESS;
2783 u32 buffer_offset, parm_list_length;
2784 u8 buffer_id, mode;
2785
2786 parm_list_length =
2787 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2788 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2789 /* NVMe expects Firmware file to be a whole number of DWORDS */
2790 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2791 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2792 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2793 goto out;
2794 }
2795 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2796 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2797 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2798 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2799 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2800 goto out;
2801 }
2802 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2803 WRITE_BUFFER_CDB_MODE_MASK;
2804 buffer_offset =
2805 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2806
2807 switch (mode) {
2808 case DOWNLOAD_SAVE_ACTIVATE:
2809 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2810 parm_list_length, buffer_offset,
2811 buffer_id);
2812 if (res != SNTI_TRANSLATION_SUCCESS)
2813 goto out;
2814 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2815 parm_list_length, buffer_offset,
2816 buffer_id);
2817 break;
2818 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
2819 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2820 parm_list_length, buffer_offset,
2821 buffer_id);
2822 break;
2823 case ACTIVATE_DEFERRED_MICROCODE:
2824 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2825 parm_list_length, buffer_offset,
2826 buffer_id);
2827 break;
2828 default:
2829 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2830 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2831 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2832 break;
2833 }
2834
2835 out:
2836 return res;
2837}
2838
ec503733
KB		 2839struct scsi_unmap_blk_desc {
2840 __be64 slba;
2841 __be32 nlb;
2842 u32 resv;
2843};
2844
2845struct scsi_unmap_parm_list {
2846 __be16 unmap_data_len;
2847 __be16 unmap_blk_desc_data_len;
2848 u32 resv;
2849 struct scsi_unmap_blk_desc desc[0];
2850};
2851
2852static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2853 u8 *cmd)
2854{
2855 struct nvme_dev *dev = ns->dev;
2856 struct scsi_unmap_parm_list *plist;
2857 struct nvme_dsm_range *range;
ec503733
KB		 2858 struct nvme_command c;
2859 int i, nvme_sc, res = -ENOMEM;
2860 u16 ndesc, list_len;
2861 dma_addr_t dma_addr;
2862
2863 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2864 if (!list_len)
2865 return -EINVAL;
2866
2867 plist = kmalloc(list_len, GFP_KERNEL);
2868 if (!plist)
2869 return -ENOMEM;
2870
2871 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2872 if (res != SNTI_TRANSLATION_SUCCESS)
2873 goto out;
2874
2875 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2876 if (!ndesc || ndesc > 256) {
2877 res = -EINVAL;
2878 goto out;
2879 }
2880
2881 range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2882 &dma_addr, GFP_KERNEL);
2883 if (!range)
2884 goto out;
2885
2886 for (i = 0; i < ndesc; i++) {
2887 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2888 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2889 range[i].cattr = 0;
2890 }
2891
2892 memset(&c, 0, sizeof(c));
2893 c.dsm.opcode = nvme_cmd_dsm;
2894 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2895 c.dsm.prp1 = cpu_to_le64(dma_addr);
2896 c.dsm.nr = cpu_to_le32(ndesc - 1);
2897 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2898
4f5099af 2899 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
ec503733
KB		 2900 res = nvme_trans_status_code(hdr, nvme_sc);
2901
2902 dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2903 range, dma_addr);
2904 out:
2905 kfree(plist);
2906 return res;
2907}
2908
5d0f6131
VV		 2909static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2910{
2911 u8 cmd[BLK_MAX_CDB];
2912 int retcode;
2913 unsigned int opcode;
2914
2915 if (hdr->cmdp == NULL)
2916 return -EMSGSIZE;
2917 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2918 return -EFAULT;
2919
2920 opcode = cmd[0];
2921
2922 switch (opcode) {
2923 case READ_6:
2924 case READ_10:
2925 case READ_12:
2926 case READ_16:
2927 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2928 break;
2929 case WRITE_6:
2930 case WRITE_10:
2931 case WRITE_12:
2932 case WRITE_16:
2933 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2934 break;
2935 case INQUIRY:
2936 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2937 break;
2938 case LOG_SENSE:
2939 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2940 break;
2941 case MODE_SELECT:
2942 case MODE_SELECT_10:
2943 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2944 break;
2945 case MODE_SENSE:
2946 case MODE_SENSE_10:
2947 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2948 break;
2949 case READ_CAPACITY:
2950 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2951 break;
2952 case SERVICE_ACTION_IN:
2953 if (IS_READ_CAP_16(cmd))
2954 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2955 else
2956 goto out;
2957 break;
2958 case REPORT_LUNS:
2959 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2960 break;
2961 case REQUEST_SENSE:
2962 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2963 break;
2964 case SECURITY_PROTOCOL_IN:
2965 case SECURITY_PROTOCOL_OUT:
2966 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2967 break;
2968 case START_STOP:
2969 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2970 break;
2971 case SYNCHRONIZE_CACHE:
2972 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
2973 break;
2974 case FORMAT_UNIT:
2975 retcode = nvme_trans_format_unit(ns, hdr, cmd);
2976 break;
2977 case TEST_UNIT_READY:
2978 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
2979 break;
2980 case WRITE_BUFFER:
2981 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
2982 break;
ec503733
KB		 2983 case UNMAP:
2984 retcode = nvme_trans_unmap(ns, hdr, cmd);
2985 break;
5d0f6131
VV		 2986 default:
2987 out:
2988 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2989 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2990 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2991 break;
2992 }
2993 return retcode;
2994}
2995
2996int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
2997{
2998 struct sg_io_hdr hdr;
2999 int retcode;
3000
3001 if (!capable(CAP_SYS_ADMIN))
3002 return -EACCES;
3003 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
3004 return -EFAULT;
3005 if (hdr.interface_id != 'S')
3006 return -EINVAL;
3007 if (hdr.cmd_len > BLK_MAX_CDB)
3008 return -EINVAL;
3009
3010 retcode = nvme_scsi_translate(ns, &hdr);
3011 if (retcode < 0)
3012 return retcode;
3013 if (retcode > 0)
3014 retcode = SNTI_TRANSLATION_SUCCESS;
8741ee4c 3015 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
5d0f6131
VV		 3016 return -EFAULT;
3017
3018 return retcode;
3019}
3020
320a3827
KB		 3021#ifdef CONFIG_COMPAT
3022typedef struct sg_io_hdr32 {
3023 compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
3024 compat_int_t dxfer_direction; /* [i] data transfer direction */
3025 unsigned char cmd_len; /* [i] SCSI command length ( <= 16 bytes) */
3026 unsigned char mx_sb_len; /* [i] max length to write to sbp */
3027 unsigned short iovec_count; /* [i] 0 implies no scatter gather */
3028 compat_uint_t dxfer_len; /* [i] byte count of data transfer */
3029 compat_uint_t dxferp; /* [i], [*io] points to data transfer memory
3030 or scatter gather list */
3031 compat_uptr_t cmdp; /* [i], [*i] points to command to perform */
3032 compat_uptr_t sbp; /* [i], [*o] points to sense_buffer memory */
3033 compat_uint_t timeout; /* [i] MAX_UINT->no timeout (unit: millisec) */
3034 compat_uint_t flags; /* [i] 0 -> default, see SG_FLAG... */
3035 compat_int_t pack_id; /* [i->o] unused internally (normally) */
3036 compat_uptr_t usr_ptr; /* [i->o] unused internally */
3037 unsigned char status; /* [o] scsi status */
3038 unsigned char masked_status; /* [o] shifted, masked scsi status */
3039 unsigned char msg_status; /* [o] messaging level data (optional) */
3040 unsigned char sb_len_wr; /* [o] byte count actually written to sbp */
3041 unsigned short host_status; /* [o] errors from host adapter */
3042 unsigned short driver_status; /* [o] errors from software driver */
3043 compat_int_t resid; /* [o] dxfer_len - actual_transferred */
3044 compat_uint_t duration; /* [o] time taken by cmd (unit: millisec) */
3045 compat_uint_t info; /* [o] auxiliary information */
3046} sg_io_hdr32_t; /* 64 bytes long (on sparc32) */
3047
3048typedef struct sg_iovec32 {
3049 compat_uint_t iov_base;
3050 compat_uint_t iov_len;
3051} sg_iovec32_t;
3052
3053static int sg_build_iovec(sg_io_hdr_t __user *sgio, void __user *dxferp, u16 iovec_count)
3054{
3055 sg_iovec_t __user *iov = (sg_iovec_t __user *) (sgio + 1);
3056 sg_iovec32_t __user *iov32 = dxferp;
3057 int i;
3058
3059 for (i = 0; i < iovec_count; i++) {
3060 u32 base, len;
3061
3062 if (get_user(base, &iov32[i].iov_base) ||
3063 get_user(len, &iov32[i].iov_len) ||
3064 put_user(compat_ptr(base), &iov[i].iov_base) ||
3065 put_user(len, &iov[i].iov_len))
3066 return -EFAULT;
3067 }
3068
3069 if (put_user(iov, &sgio->dxferp))
3070 return -EFAULT;
3071 return 0;
3072}
3073
3074int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg)
3075{
3076 sg_io_hdr32_t __user *sgio32 = (sg_io_hdr32_t __user *)arg;
3077 sg_io_hdr_t __user *sgio;
3078 u16 iovec_count;
3079 u32 data;
3080 void __user *dxferp;
3081 int err;
3082 int interface_id;
3083
3084 if (get_user(interface_id, &sgio32->interface_id))
3085 return -EFAULT;
3086 if (interface_id != 'S')
3087 return -EINVAL;
3088
3089 if (get_user(iovec_count, &sgio32->iovec_count))
3090 return -EFAULT;
3091
3092 {
3093 void __user *top = compat_alloc_user_space(0);
3094 void __user *new = compat_alloc_user_space(sizeof(sg_io_hdr_t) +
3095 (iovec_count * sizeof(sg_iovec_t)));
3096 if (new > top)
3097 return -EINVAL;
3098
3099 sgio = new;
3100 }
3101
3102 /* Ok, now construct. */
3103 if (copy_in_user(&sgio->interface_id, &sgio32->interface_id,
3104 (2 * sizeof(int)) +
3105 (2 * sizeof(unsigned char)) +
3106 (1 * sizeof(unsigned short)) +
3107 (1 * sizeof(unsigned int))))
3108 return -EFAULT;
3109
3110 if (get_user(data, &sgio32->dxferp))
3111 return -EFAULT;
3112 dxferp = compat_ptr(data);
3113 if (iovec_count) {
3114 if (sg_build_iovec(sgio, dxferp, iovec_count))
3115 return -EFAULT;
3116 } else {
3117 if (put_user(dxferp, &sgio->dxferp))
3118 return -EFAULT;
3119 }
3120
3121 {
3122 unsigned char __user *cmdp;
3123 unsigned char __user *sbp;
3124
3125 if (get_user(data, &sgio32->cmdp))
3126 return -EFAULT;
3127 cmdp = compat_ptr(data);
3128
3129 if (get_user(data, &sgio32->sbp))
3130 return -EFAULT;
3131 sbp = compat_ptr(data);
3132
3133 if (put_user(cmdp, &sgio->cmdp) ||
3134 put_user(sbp, &sgio->sbp))
3135 return -EFAULT;
3136 }
3137
3138 if (copy_in_user(&sgio->timeout, &sgio32->timeout,
3139 3 * sizeof(int)))
3140 return -EFAULT;
3141
3142 if (get_user(data, &sgio32->usr_ptr))
3143 return -EFAULT;
3144 if (put_user(compat_ptr(data), &sgio->usr_ptr))
3145 return -EFAULT;
3146
3147 err = nvme_sg_io(ns, sgio);
3148 if (err >= 0) {
3149 void __user *datap;
3150
3151 if (copy_in_user(&sgio32->pack_id, &sgio->pack_id,
3152 sizeof(int)) ||
3153 get_user(datap, &sgio->usr_ptr) ||
3154 put_user((u32)(unsigned long)datap,
3155 &sgio32->usr_ptr) ||
3156 copy_in_user(&sgio32->status, &sgio->status,
3157 (4 * sizeof(unsigned char)) +
3158 (2 * sizeof(unsigned short)) +
3159 (3 * sizeof(int))))
3160 err = -EFAULT;
3161 }
3162
3163 return err;
3164}
3165#endif
3166
5d0f6131
VV		 3167int nvme_sg_get_version_num(int __user *ip)
3168{
3169 return put_user(sg_version_num, ip);
3170}
Linux kernel - Deliverables
This page took 0.319904 seconds and 5 git commands to generate.