Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for the SWIM3 (Super Woz Integrated Machine 3) | |
3 | * floppy controller found on Power Macintoshes. | |
4 | * | |
5 | * Copyright (C) 1996 Paul Mackerras. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * TODO: | |
15 | * handle 2 drives | |
16 | * handle GCR disks | |
17 | */ | |
18 | ||
b3025457 BH |
19 | #undef DEBUG |
20 | ||
1da177e4 LT |
21 | #include <linux/stddef.h> |
22 | #include <linux/kernel.h> | |
23 | #include <linux/sched.h> | |
24 | #include <linux/timer.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/fd.h> | |
27 | #include <linux/ioctl.h> | |
28 | #include <linux/blkdev.h> | |
1da177e4 | 29 | #include <linux/interrupt.h> |
2a48fc0a | 30 | #include <linux/mutex.h> |
1da177e4 | 31 | #include <linux/module.h> |
515729ec | 32 | #include <linux/spinlock.h> |
106fd892 | 33 | #include <linux/wait.h> |
1da177e4 LT |
34 | #include <asm/io.h> |
35 | #include <asm/dbdma.h> | |
36 | #include <asm/prom.h> | |
37 | #include <asm/uaccess.h> | |
38 | #include <asm/mediabay.h> | |
39 | #include <asm/machdep.h> | |
40 | #include <asm/pmac_feature.h> | |
41 | ||
1da177e4 LT |
42 | #define MAX_FLOPPIES 2 |
43 | ||
b3025457 BH |
44 | static DEFINE_MUTEX(swim3_mutex); |
45 | static struct gendisk *disks[MAX_FLOPPIES]; | |
46 | ||
1da177e4 LT |
47 | enum swim_state { |
48 | idle, | |
49 | locating, | |
50 | seeking, | |
51 | settling, | |
52 | do_transfer, | |
53 | jogging, | |
54 | available, | |
55 | revalidating, | |
56 | ejecting | |
57 | }; | |
58 | ||
59 | #define REG(x) unsigned char x; char x ## _pad[15]; | |
60 | ||
61 | /* | |
62 | * The names for these registers mostly represent speculation on my part. | |
63 | * It will be interesting to see how close they are to the names Apple uses. | |
64 | */ | |
65 | struct swim3 { | |
66 | REG(data); | |
67 | REG(timer); /* counts down at 1MHz */ | |
68 | REG(error); | |
69 | REG(mode); | |
70 | REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */ | |
71 | REG(setup); | |
72 | REG(control); /* writing bits clears them */ | |
73 | REG(status); /* writing bits sets them in control */ | |
74 | REG(intr); | |
75 | REG(nseek); /* # tracks to seek */ | |
76 | REG(ctrack); /* current track number */ | |
77 | REG(csect); /* current sector number */ | |
78 | REG(gap3); /* size of gap 3 in track format */ | |
79 | REG(sector); /* sector # to read or write */ | |
80 | REG(nsect); /* # sectors to read or write */ | |
81 | REG(intr_enable); | |
82 | }; | |
83 | ||
84 | #define control_bic control | |
85 | #define control_bis status | |
86 | ||
87 | /* Bits in select register */ | |
88 | #define CA_MASK 7 | |
89 | #define LSTRB 8 | |
90 | ||
91 | /* Bits in control register */ | |
92 | #define DO_SEEK 0x80 | |
93 | #define FORMAT 0x40 | |
94 | #define SELECT 0x20 | |
95 | #define WRITE_SECTORS 0x10 | |
96 | #define DO_ACTION 0x08 | |
97 | #define DRIVE2_ENABLE 0x04 | |
98 | #define DRIVE_ENABLE 0x02 | |
99 | #define INTR_ENABLE 0x01 | |
100 | ||
101 | /* Bits in status register */ | |
102 | #define FIFO_1BYTE 0x80 | |
103 | #define FIFO_2BYTE 0x40 | |
104 | #define ERROR 0x20 | |
105 | #define DATA 0x08 | |
106 | #define RDDATA 0x04 | |
107 | #define INTR_PENDING 0x02 | |
108 | #define MARK_BYTE 0x01 | |
109 | ||
110 | /* Bits in intr and intr_enable registers */ | |
111 | #define ERROR_INTR 0x20 | |
112 | #define DATA_CHANGED 0x10 | |
113 | #define TRANSFER_DONE 0x08 | |
114 | #define SEEN_SECTOR 0x04 | |
115 | #define SEEK_DONE 0x02 | |
116 | #define TIMER_DONE 0x01 | |
117 | ||
118 | /* Bits in error register */ | |
119 | #define ERR_DATA_CRC 0x80 | |
120 | #define ERR_ADDR_CRC 0x40 | |
121 | #define ERR_OVERRUN 0x04 | |
122 | #define ERR_UNDERRUN 0x01 | |
123 | ||
124 | /* Bits in setup register */ | |
125 | #define S_SW_RESET 0x80 | |
126 | #define S_GCR_WRITE 0x40 | |
127 | #define S_IBM_DRIVE 0x20 | |
128 | #define S_TEST_MODE 0x10 | |
129 | #define S_FCLK_DIV2 0x08 | |
130 | #define S_GCR 0x04 | |
131 | #define S_COPY_PROT 0x02 | |
132 | #define S_INV_WDATA 0x01 | |
133 | ||
134 | /* Select values for swim3_action */ | |
135 | #define SEEK_POSITIVE 0 | |
136 | #define SEEK_NEGATIVE 4 | |
137 | #define STEP 1 | |
138 | #define MOTOR_ON 2 | |
139 | #define MOTOR_OFF 6 | |
140 | #define INDEX 3 | |
141 | #define EJECT 7 | |
142 | #define SETMFM 9 | |
143 | #define SETGCR 13 | |
144 | ||
145 | /* Select values for swim3_select and swim3_readbit */ | |
146 | #define STEP_DIR 0 | |
147 | #define STEPPING 1 | |
148 | #define MOTOR_ON 2 | |
149 | #define RELAX 3 /* also eject in progress */ | |
150 | #define READ_DATA_0 4 | |
151 | #define TWOMEG_DRIVE 5 | |
152 | #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */ | |
153 | #define DRIVE_PRESENT 7 | |
154 | #define DISK_IN 8 | |
155 | #define WRITE_PROT 9 | |
156 | #define TRACK_ZERO 10 | |
157 | #define TACHO 11 | |
158 | #define READ_DATA_1 12 | |
159 | #define MFM_MODE 13 | |
160 | #define SEEK_COMPLETE 14 | |
161 | #define ONEMEG_MEDIA 15 | |
162 | ||
163 | /* Definitions of values used in writing and formatting */ | |
164 | #define DATA_ESCAPE 0x99 | |
165 | #define GCR_SYNC_EXC 0x3f | |
166 | #define GCR_SYNC_CONV 0x80 | |
167 | #define GCR_FIRST_MARK 0xd5 | |
168 | #define GCR_SECOND_MARK 0xaa | |
169 | #define GCR_ADDR_MARK "\xd5\xaa\x00" | |
170 | #define GCR_DATA_MARK "\xd5\xaa\x0b" | |
171 | #define GCR_SLIP_BYTE "\x27\xaa" | |
172 | #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f" | |
173 | ||
174 | #define DATA_99 "\x99\x99" | |
175 | #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe" | |
176 | #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc" | |
177 | #define MFM_GAP_LEN 12 | |
178 | ||
179 | struct floppy_state { | |
180 | enum swim_state state; | |
181 | struct swim3 __iomem *swim3; /* hardware registers */ | |
182 | struct dbdma_regs __iomem *dma; /* DMA controller registers */ | |
183 | int swim3_intr; /* interrupt number for SWIM3 */ | |
184 | int dma_intr; /* interrupt number for DMA channel */ | |
185 | int cur_cyl; /* cylinder head is on, or -1 */ | |
186 | int cur_sector; /* last sector we saw go past */ | |
187 | int req_cyl; /* the cylinder for the current r/w request */ | |
188 | int head; /* head number ditto */ | |
189 | int req_sector; /* sector number ditto */ | |
190 | int scount; /* # sectors we're transferring at present */ | |
191 | int retries; | |
192 | int settle_time; | |
193 | int secpercyl; /* disk geometry information */ | |
194 | int secpertrack; | |
195 | int total_secs; | |
196 | int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */ | |
197 | struct dbdma_cmd *dma_cmd; | |
198 | int ref_count; | |
199 | int expect_cyl; | |
200 | struct timer_list timeout; | |
201 | int timeout_pending; | |
202 | int ejected; | |
203 | wait_queue_head_t wait; | |
204 | int wanted; | |
d58b0c39 | 205 | struct macio_dev *mdev; |
1da177e4 | 206 | char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)]; |
b3025457 BH |
207 | int index; |
208 | struct request *cur_req; | |
1da177e4 LT |
209 | }; |
210 | ||
b3025457 BH |
211 | #define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) |
212 | #define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) | |
213 | #define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) | |
214 | ||
215 | #ifdef DEBUG | |
216 | #define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) | |
217 | #else | |
218 | #define swim3_dbg(fmt, arg...) do { } while(0) | |
219 | #endif | |
220 | ||
1da177e4 LT |
221 | static struct floppy_state floppy_states[MAX_FLOPPIES]; |
222 | static int floppy_count = 0; | |
223 | static DEFINE_SPINLOCK(swim3_lock); | |
224 | ||
225 | static unsigned short write_preamble[] = { | |
226 | 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */ | |
227 | 0, 0, 0, 0, 0, 0, /* sync field */ | |
228 | 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */ | |
229 | 0x990f /* no escape for 512 bytes */ | |
230 | }; | |
231 | ||
232 | static unsigned short write_postamble[] = { | |
233 | 0x9904, /* insert CRC */ | |
234 | 0x4e4e, 0x4e4e, | |
235 | 0x9908, /* stop writing */ | |
236 | 0, 0, 0, 0, 0, 0 | |
237 | }; | |
238 | ||
1da177e4 LT |
239 | static void seek_track(struct floppy_state *fs, int n); |
240 | static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count); | |
1da177e4 LT |
241 | static void act(struct floppy_state *fs); |
242 | static void scan_timeout(unsigned long data); | |
243 | static void seek_timeout(unsigned long data); | |
244 | static void settle_timeout(unsigned long data); | |
245 | static void xfer_timeout(unsigned long data); | |
7d12e780 DH |
246 | static irqreturn_t swim3_interrupt(int irq, void *dev_id); |
247 | /*static void fd_dma_interrupt(int irq, void *dev_id);*/ | |
1da177e4 LT |
248 | static int grab_drive(struct floppy_state *fs, enum swim_state state, |
249 | int interruptible); | |
250 | static void release_drive(struct floppy_state *fs); | |
251 | static int fd_eject(struct floppy_state *fs); | |
b4d9a442 | 252 | static int floppy_ioctl(struct block_device *bdev, fmode_t mode, |
1da177e4 | 253 | unsigned int cmd, unsigned long param); |
b4d9a442 | 254 | static int floppy_open(struct block_device *bdev, fmode_t mode); |
db2a144b | 255 | static void floppy_release(struct gendisk *disk, fmode_t mode); |
4bbde777 TH |
256 | static unsigned int floppy_check_events(struct gendisk *disk, |
257 | unsigned int clearing); | |
1da177e4 | 258 | static int floppy_revalidate(struct gendisk *disk); |
1da177e4 | 259 | |
b3025457 | 260 | static bool swim3_end_request(struct floppy_state *fs, int err, unsigned int nr_bytes) |
f4bd4b90 | 261 | { |
b3025457 BH |
262 | struct request *req = fs->cur_req; |
263 | int rc; | |
f4bd4b90 | 264 | |
b3025457 BH |
265 | swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n", |
266 | err, nr_bytes, req); | |
f4bd4b90 | 267 | |
b3025457 BH |
268 | if (err) |
269 | nr_bytes = blk_rq_cur_bytes(req); | |
270 | rc = __blk_end_request(req, err, nr_bytes); | |
271 | if (rc) | |
272 | return true; | |
273 | fs->cur_req = NULL; | |
274 | return false; | |
f4bd4b90 TH |
275 | } |
276 | ||
1da177e4 LT |
277 | static void swim3_select(struct floppy_state *fs, int sel) |
278 | { | |
279 | struct swim3 __iomem *sw = fs->swim3; | |
280 | ||
281 | out_8(&sw->select, RELAX); | |
282 | if (sel & 8) | |
283 | out_8(&sw->control_bis, SELECT); | |
284 | else | |
285 | out_8(&sw->control_bic, SELECT); | |
286 | out_8(&sw->select, sel & CA_MASK); | |
287 | } | |
288 | ||
289 | static void swim3_action(struct floppy_state *fs, int action) | |
290 | { | |
291 | struct swim3 __iomem *sw = fs->swim3; | |
292 | ||
293 | swim3_select(fs, action); | |
294 | udelay(1); | |
295 | out_8(&sw->select, sw->select | LSTRB); | |
296 | udelay(2); | |
297 | out_8(&sw->select, sw->select & ~LSTRB); | |
298 | udelay(1); | |
299 | } | |
300 | ||
301 | static int swim3_readbit(struct floppy_state *fs, int bit) | |
302 | { | |
303 | struct swim3 __iomem *sw = fs->swim3; | |
304 | int stat; | |
305 | ||
306 | swim3_select(fs, bit); | |
307 | udelay(1); | |
308 | stat = in_8(&sw->status); | |
309 | return (stat & DATA) == 0; | |
310 | } | |
311 | ||
1da177e4 LT |
312 | static void start_request(struct floppy_state *fs) |
313 | { | |
314 | struct request *req; | |
315 | unsigned long x; | |
316 | ||
b3025457 BH |
317 | swim3_dbg("start request, initial state=%d\n", fs->state); |
318 | ||
1da177e4 LT |
319 | if (fs->state == idle && fs->wanted) { |
320 | fs->state = available; | |
321 | wake_up(&fs->wait); | |
322 | return; | |
323 | } | |
f4bd4b90 | 324 | while (fs->state == idle) { |
b3025457 BH |
325 | swim3_dbg("start request, idle loop, cur_req=%p\n", fs->cur_req); |
326 | if (!fs->cur_req) { | |
327 | fs->cur_req = blk_fetch_request(disks[fs->index]->queue); | |
328 | swim3_dbg(" fetched request %p\n", fs->cur_req); | |
329 | if (!fs->cur_req) | |
f4bd4b90 | 330 | break; |
f4bd4b90 | 331 | } |
b3025457 BH |
332 | req = fs->cur_req; |
333 | ||
334 | if (fs->mdev->media_bay && | |
335 | check_media_bay(fs->mdev->media_bay) != MB_FD) { | |
336 | swim3_dbg("%s", " media bay absent, dropping req\n"); | |
337 | swim3_end_request(fs, -ENODEV, 0); | |
338 | continue; | |
339 | } | |
340 | ||
341 | #if 0 /* This is really too verbose */ | |
342 | swim3_dbg("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n", | |
343 | req->rq_disk->disk_name, req->cmd, | |
344 | (long)blk_rq_pos(req), blk_rq_sectors(req), | |
b4f42e28 | 345 | bio_data(req->bio)); |
b3025457 BH |
346 | swim3_dbg(" errors=%d current_nr_sectors=%u\n", |
347 | req->errors, blk_rq_cur_sectors(req)); | |
1da177e4 LT |
348 | #endif |
349 | ||
83096ebf | 350 | if (blk_rq_pos(req) >= fs->total_secs) { |
b3025457 BH |
351 | swim3_dbg(" pos out of bounds (%ld, max is %ld)\n", |
352 | (long)blk_rq_pos(req), (long)fs->total_secs); | |
353 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
354 | continue; |
355 | } | |
1da177e4 | 356 | if (fs->ejected) { |
b3025457 BH |
357 | swim3_dbg("%s", " disk ejected\n"); |
358 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
359 | continue; |
360 | } | |
361 | ||
362 | if (rq_data_dir(req) == WRITE) { | |
363 | if (fs->write_prot < 0) | |
364 | fs->write_prot = swim3_readbit(fs, WRITE_PROT); | |
365 | if (fs->write_prot) { | |
b3025457 BH |
366 | swim3_dbg("%s", " try to write, disk write protected\n"); |
367 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
368 | continue; |
369 | } | |
370 | } | |
371 | ||
83096ebf TH |
372 | /* Do not remove the cast. blk_rq_pos(req) is now a |
373 | * sector_t and can be 64 bits, but it will never go | |
374 | * past 32 bits for this driver anyway, so we can | |
375 | * safely cast it down and not have to do a 64/32 | |
376 | * division | |
1da177e4 | 377 | */ |
83096ebf TH |
378 | fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl; |
379 | x = ((long)blk_rq_pos(req)) % fs->secpercyl; | |
1da177e4 LT |
380 | fs->head = x / fs->secpertrack; |
381 | fs->req_sector = x % fs->secpertrack + 1; | |
1da177e4 LT |
382 | fs->state = do_transfer; |
383 | fs->retries = 0; | |
384 | ||
385 | act(fs); | |
386 | } | |
387 | } | |
388 | ||
b3025457 BH |
389 | static void do_fd_request(struct request_queue * q) |
390 | { | |
391 | start_request(q->queuedata); | |
392 | } | |
393 | ||
1da177e4 LT |
394 | static void set_timeout(struct floppy_state *fs, int nticks, |
395 | void (*proc)(unsigned long)) | |
396 | { | |
1da177e4 LT |
397 | if (fs->timeout_pending) |
398 | del_timer(&fs->timeout); | |
399 | fs->timeout.expires = jiffies + nticks; | |
400 | fs->timeout.function = proc; | |
401 | fs->timeout.data = (unsigned long) fs; | |
402 | add_timer(&fs->timeout); | |
403 | fs->timeout_pending = 1; | |
1da177e4 LT |
404 | } |
405 | ||
406 | static inline void scan_track(struct floppy_state *fs) | |
407 | { | |
408 | struct swim3 __iomem *sw = fs->swim3; | |
409 | ||
410 | swim3_select(fs, READ_DATA_0); | |
411 | in_8(&sw->intr); /* clear SEEN_SECTOR bit */ | |
412 | in_8(&sw->error); | |
413 | out_8(&sw->intr_enable, SEEN_SECTOR); | |
414 | out_8(&sw->control_bis, DO_ACTION); | |
415 | /* enable intr when track found */ | |
416 | set_timeout(fs, HZ, scan_timeout); /* enable timeout */ | |
417 | } | |
418 | ||
419 | static inline void seek_track(struct floppy_state *fs, int n) | |
420 | { | |
421 | struct swim3 __iomem *sw = fs->swim3; | |
422 | ||
423 | if (n >= 0) { | |
424 | swim3_action(fs, SEEK_POSITIVE); | |
425 | sw->nseek = n; | |
426 | } else { | |
427 | swim3_action(fs, SEEK_NEGATIVE); | |
428 | sw->nseek = -n; | |
429 | } | |
430 | fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1; | |
431 | swim3_select(fs, STEP); | |
432 | in_8(&sw->error); | |
433 | /* enable intr when seek finished */ | |
434 | out_8(&sw->intr_enable, SEEK_DONE); | |
435 | out_8(&sw->control_bis, DO_SEEK); | |
436 | set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */ | |
437 | fs->settle_time = 0; | |
438 | } | |
439 | ||
440 | static inline void init_dma(struct dbdma_cmd *cp, int cmd, | |
441 | void *buf, int count) | |
442 | { | |
f5718726 DG |
443 | cp->req_count = cpu_to_le16(count); |
444 | cp->command = cpu_to_le16(cmd); | |
445 | cp->phy_addr = cpu_to_le32(virt_to_bus(buf)); | |
1da177e4 LT |
446 | cp->xfer_status = 0; |
447 | } | |
448 | ||
449 | static inline void setup_transfer(struct floppy_state *fs) | |
450 | { | |
451 | int n; | |
452 | struct swim3 __iomem *sw = fs->swim3; | |
453 | struct dbdma_cmd *cp = fs->dma_cmd; | |
454 | struct dbdma_regs __iomem *dr = fs->dma; | |
b3025457 | 455 | struct request *req = fs->cur_req; |
1da177e4 | 456 | |
b3025457 BH |
457 | if (blk_rq_cur_sectors(req) <= 0) { |
458 | swim3_warn("%s", "Transfer 0 sectors ?\n"); | |
1da177e4 LT |
459 | return; |
460 | } | |
b3025457 | 461 | if (rq_data_dir(req) == WRITE) |
1da177e4 LT |
462 | n = 1; |
463 | else { | |
464 | n = fs->secpertrack - fs->req_sector + 1; | |
b3025457 BH |
465 | if (n > blk_rq_cur_sectors(req)) |
466 | n = blk_rq_cur_sectors(req); | |
1da177e4 | 467 | } |
b3025457 BH |
468 | |
469 | swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n", | |
470 | fs->req_sector, fs->secpertrack, fs->head, n); | |
471 | ||
1da177e4 LT |
472 | fs->scount = n; |
473 | swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0); | |
474 | out_8(&sw->sector, fs->req_sector); | |
475 | out_8(&sw->nsect, n); | |
476 | out_8(&sw->gap3, 0); | |
477 | out_le32(&dr->cmdptr, virt_to_bus(cp)); | |
b3025457 | 478 | if (rq_data_dir(req) == WRITE) { |
1da177e4 LT |
479 | /* Set up 3 dma commands: write preamble, data, postamble */ |
480 | init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble)); | |
481 | ++cp; | |
b4f42e28 | 482 | init_dma(cp, OUTPUT_MORE, bio_data(req->bio), 512); |
1da177e4 LT |
483 | ++cp; |
484 | init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble)); | |
485 | } else { | |
b4f42e28 | 486 | init_dma(cp, INPUT_LAST, bio_data(req->bio), n * 512); |
1da177e4 LT |
487 | } |
488 | ++cp; | |
489 | out_le16(&cp->command, DBDMA_STOP); | |
490 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
491 | in_8(&sw->error); | |
492 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
b3025457 | 493 | if (rq_data_dir(req) == WRITE) |
1da177e4 LT |
494 | out_8(&sw->control_bis, WRITE_SECTORS); |
495 | in_8(&sw->intr); | |
496 | out_le32(&dr->control, (RUN << 16) | RUN); | |
497 | /* enable intr when transfer complete */ | |
498 | out_8(&sw->intr_enable, TRANSFER_DONE); | |
499 | out_8(&sw->control_bis, DO_ACTION); | |
500 | set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */ | |
501 | } | |
502 | ||
503 | static void act(struct floppy_state *fs) | |
504 | { | |
505 | for (;;) { | |
b3025457 BH |
506 | swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n", |
507 | fs->state, fs->req_cyl, fs->cur_cyl); | |
508 | ||
1da177e4 LT |
509 | switch (fs->state) { |
510 | case idle: | |
511 | return; /* XXX shouldn't get here */ | |
512 | ||
513 | case locating: | |
514 | if (swim3_readbit(fs, TRACK_ZERO)) { | |
b3025457 | 515 | swim3_dbg("%s", " locate track 0\n"); |
1da177e4 LT |
516 | fs->cur_cyl = 0; |
517 | if (fs->req_cyl == 0) | |
518 | fs->state = do_transfer; | |
519 | else | |
520 | fs->state = seeking; | |
521 | break; | |
522 | } | |
523 | scan_track(fs); | |
524 | return; | |
525 | ||
526 | case seeking: | |
527 | if (fs->cur_cyl < 0) { | |
528 | fs->expect_cyl = -1; | |
529 | fs->state = locating; | |
530 | break; | |
531 | } | |
532 | if (fs->req_cyl == fs->cur_cyl) { | |
b3025457 | 533 | swim3_warn("%s", "Whoops, seeking 0\n"); |
1da177e4 LT |
534 | fs->state = do_transfer; |
535 | break; | |
536 | } | |
537 | seek_track(fs, fs->req_cyl - fs->cur_cyl); | |
538 | return; | |
539 | ||
540 | case settling: | |
541 | /* check for SEEK_COMPLETE after 30ms */ | |
542 | fs->settle_time = (HZ + 32) / 33; | |
543 | set_timeout(fs, fs->settle_time, settle_timeout); | |
544 | return; | |
545 | ||
546 | case do_transfer: | |
547 | if (fs->cur_cyl != fs->req_cyl) { | |
548 | if (fs->retries > 5) { | |
b3025457 BH |
549 | swim3_err("Wrong cylinder in transfer, want: %d got %d\n", |
550 | fs->req_cyl, fs->cur_cyl); | |
551 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
552 | fs->state = idle; |
553 | return; | |
554 | } | |
555 | fs->state = seeking; | |
556 | break; | |
557 | } | |
558 | setup_transfer(fs); | |
559 | return; | |
560 | ||
561 | case jogging: | |
562 | seek_track(fs, -5); | |
563 | return; | |
564 | ||
565 | default: | |
b3025457 | 566 | swim3_err("Unknown state %d\n", fs->state); |
1da177e4 LT |
567 | return; |
568 | } | |
569 | } | |
570 | } | |
571 | ||
572 | static void scan_timeout(unsigned long data) | |
573 | { | |
574 | struct floppy_state *fs = (struct floppy_state *) data; | |
575 | struct swim3 __iomem *sw = fs->swim3; | |
b3025457 BH |
576 | unsigned long flags; |
577 | ||
578 | swim3_dbg("* scan timeout, state=%d\n", fs->state); | |
1da177e4 | 579 | |
b3025457 | 580 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
581 | fs->timeout_pending = 0; |
582 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
583 | out_8(&sw->select, RELAX); | |
584 | out_8(&sw->intr_enable, 0); | |
585 | fs->cur_cyl = -1; | |
586 | if (fs->retries > 5) { | |
b3025457 | 587 | swim3_end_request(fs, -EIO, 0); |
1da177e4 LT |
588 | fs->state = idle; |
589 | start_request(fs); | |
590 | } else { | |
591 | fs->state = jogging; | |
592 | act(fs); | |
593 | } | |
b3025457 | 594 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
595 | } |
596 | ||
597 | static void seek_timeout(unsigned long data) | |
598 | { | |
599 | struct floppy_state *fs = (struct floppy_state *) data; | |
600 | struct swim3 __iomem *sw = fs->swim3; | |
b3025457 BH |
601 | unsigned long flags; |
602 | ||
603 | swim3_dbg("* seek timeout, state=%d\n", fs->state); | |
1da177e4 | 604 | |
b3025457 | 605 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
606 | fs->timeout_pending = 0; |
607 | out_8(&sw->control_bic, DO_SEEK); | |
608 | out_8(&sw->select, RELAX); | |
609 | out_8(&sw->intr_enable, 0); | |
b3025457 BH |
610 | swim3_err("%s", "Seek timeout\n"); |
611 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
612 | fs->state = idle; |
613 | start_request(fs); | |
b3025457 | 614 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
615 | } |
616 | ||
617 | static void settle_timeout(unsigned long data) | |
618 | { | |
619 | struct floppy_state *fs = (struct floppy_state *) data; | |
620 | struct swim3 __iomem *sw = fs->swim3; | |
b3025457 BH |
621 | unsigned long flags; |
622 | ||
623 | swim3_dbg("* settle timeout, state=%d\n", fs->state); | |
1da177e4 | 624 | |
b3025457 | 625 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
626 | fs->timeout_pending = 0; |
627 | if (swim3_readbit(fs, SEEK_COMPLETE)) { | |
628 | out_8(&sw->select, RELAX); | |
629 | fs->state = locating; | |
630 | act(fs); | |
b3025457 | 631 | goto unlock; |
1da177e4 LT |
632 | } |
633 | out_8(&sw->select, RELAX); | |
634 | if (fs->settle_time < 2*HZ) { | |
635 | ++fs->settle_time; | |
636 | set_timeout(fs, 1, settle_timeout); | |
b3025457 | 637 | goto unlock; |
1da177e4 | 638 | } |
b3025457 BH |
639 | swim3_err("%s", "Seek settle timeout\n"); |
640 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
641 | fs->state = idle; |
642 | start_request(fs); | |
b3025457 BH |
643 | unlock: |
644 | spin_unlock_irqrestore(&swim3_lock, flags); | |
1da177e4 LT |
645 | } |
646 | ||
647 | static void xfer_timeout(unsigned long data) | |
648 | { | |
649 | struct floppy_state *fs = (struct floppy_state *) data; | |
650 | struct swim3 __iomem *sw = fs->swim3; | |
651 | struct dbdma_regs __iomem *dr = fs->dma; | |
b3025457 | 652 | unsigned long flags; |
1da177e4 LT |
653 | int n; |
654 | ||
b3025457 BH |
655 | swim3_dbg("* xfer timeout, state=%d\n", fs->state); |
656 | ||
657 | spin_lock_irqsave(&swim3_lock, flags); | |
1da177e4 LT |
658 | fs->timeout_pending = 0; |
659 | out_le32(&dr->control, RUN << 16); | |
660 | /* We must wait a bit for dbdma to stop */ | |
661 | for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++) | |
662 | udelay(1); | |
663 | out_8(&sw->intr_enable, 0); | |
664 | out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); | |
665 | out_8(&sw->select, RELAX); | |
b3025457 BH |
666 | swim3_err("Timeout %sing sector %ld\n", |
667 | (rq_data_dir(fs->cur_req)==WRITE? "writ": "read"), | |
668 | (long)blk_rq_pos(fs->cur_req)); | |
669 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
670 | fs->state = idle; |
671 | start_request(fs); | |
b3025457 | 672 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
673 | } |
674 | ||
7d12e780 | 675 | static irqreturn_t swim3_interrupt(int irq, void *dev_id) |
1da177e4 LT |
676 | { |
677 | struct floppy_state *fs = (struct floppy_state *) dev_id; | |
678 | struct swim3 __iomem *sw = fs->swim3; | |
679 | int intr, err, n; | |
680 | int stat, resid; | |
681 | struct dbdma_regs __iomem *dr; | |
682 | struct dbdma_cmd *cp; | |
b3025457 BH |
683 | unsigned long flags; |
684 | struct request *req = fs->cur_req; | |
685 | ||
686 | swim3_dbg("* interrupt, state=%d\n", fs->state); | |
1da177e4 | 687 | |
b3025457 | 688 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
689 | intr = in_8(&sw->intr); |
690 | err = (intr & ERROR_INTR)? in_8(&sw->error): 0; | |
691 | if ((intr & ERROR_INTR) && fs->state != do_transfer) | |
b3025457 BH |
692 | swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n", |
693 | fs->state, rq_data_dir(req), intr, err); | |
1da177e4 LT |
694 | switch (fs->state) { |
695 | case locating: | |
696 | if (intr & SEEN_SECTOR) { | |
697 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
698 | out_8(&sw->select, RELAX); | |
699 | out_8(&sw->intr_enable, 0); | |
700 | del_timer(&fs->timeout); | |
701 | fs->timeout_pending = 0; | |
702 | if (sw->ctrack == 0xff) { | |
b3025457 | 703 | swim3_err("%s", "Seen sector but cyl=ff?\n"); |
1da177e4 LT |
704 | fs->cur_cyl = -1; |
705 | if (fs->retries > 5) { | |
b3025457 | 706 | swim3_end_request(fs, -EIO, 0); |
1da177e4 LT |
707 | fs->state = idle; |
708 | start_request(fs); | |
709 | } else { | |
710 | fs->state = jogging; | |
711 | act(fs); | |
712 | } | |
713 | break; | |
714 | } | |
715 | fs->cur_cyl = sw->ctrack; | |
716 | fs->cur_sector = sw->csect; | |
717 | if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl) | |
b3025457 BH |
718 | swim3_err("Expected cyl %d, got %d\n", |
719 | fs->expect_cyl, fs->cur_cyl); | |
1da177e4 LT |
720 | fs->state = do_transfer; |
721 | act(fs); | |
722 | } | |
723 | break; | |
724 | case seeking: | |
725 | case jogging: | |
726 | if (sw->nseek == 0) { | |
727 | out_8(&sw->control_bic, DO_SEEK); | |
728 | out_8(&sw->select, RELAX); | |
729 | out_8(&sw->intr_enable, 0); | |
730 | del_timer(&fs->timeout); | |
731 | fs->timeout_pending = 0; | |
732 | if (fs->state == seeking) | |
733 | ++fs->retries; | |
734 | fs->state = settling; | |
735 | act(fs); | |
736 | } | |
737 | break; | |
738 | case settling: | |
739 | out_8(&sw->intr_enable, 0); | |
740 | del_timer(&fs->timeout); | |
741 | fs->timeout_pending = 0; | |
742 | act(fs); | |
743 | break; | |
744 | case do_transfer: | |
745 | if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0) | |
746 | break; | |
747 | out_8(&sw->intr_enable, 0); | |
748 | out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); | |
749 | out_8(&sw->select, RELAX); | |
750 | del_timer(&fs->timeout); | |
751 | fs->timeout_pending = 0; | |
752 | dr = fs->dma; | |
753 | cp = fs->dma_cmd; | |
b3025457 | 754 | if (rq_data_dir(req) == WRITE) |
1da177e4 LT |
755 | ++cp; |
756 | /* | |
757 | * Check that the main data transfer has finished. | |
758 | * On writing, the swim3 sometimes doesn't use | |
759 | * up all the bytes of the postamble, so we can still | |
760 | * see DMA active here. That doesn't matter as long | |
761 | * as all the sector data has been transferred. | |
762 | */ | |
763 | if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) { | |
764 | /* wait a little while for DMA to complete */ | |
765 | for (n = 0; n < 100; ++n) { | |
766 | if (cp->xfer_status != 0) | |
767 | break; | |
768 | udelay(1); | |
769 | barrier(); | |
770 | } | |
771 | } | |
772 | /* turn off DMA */ | |
773 | out_le32(&dr->control, (RUN | PAUSE) << 16); | |
f5718726 DG |
774 | stat = le16_to_cpu(cp->xfer_status); |
775 | resid = le16_to_cpu(cp->res_count); | |
1da177e4 LT |
776 | if (intr & ERROR_INTR) { |
777 | n = fs->scount - 1 - resid / 512; | |
778 | if (n > 0) { | |
b3025457 | 779 | blk_update_request(req, 0, n << 9); |
1da177e4 LT |
780 | fs->req_sector += n; |
781 | } | |
782 | if (fs->retries < 5) { | |
783 | ++fs->retries; | |
784 | act(fs); | |
785 | } else { | |
b3025457 BH |
786 | swim3_err("Error %sing block %ld (err=%x)\n", |
787 | rq_data_dir(req) == WRITE? "writ": "read", | |
788 | (long)blk_rq_pos(req), err); | |
789 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
790 | fs->state = idle; |
791 | } | |
792 | } else { | |
793 | if ((stat & ACTIVE) == 0 || resid != 0) { | |
794 | /* musta been an error */ | |
b3025457 BH |
795 | swim3_err("fd dma error: stat=%x resid=%d\n", stat, resid); |
796 | swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n", | |
797 | fs->state, rq_data_dir(req), intr, err); | |
798 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
799 | fs->state = idle; |
800 | start_request(fs); | |
801 | break; | |
802 | } | |
b3025457 BH |
803 | fs->retries = 0; |
804 | if (swim3_end_request(fs, 0, fs->scount << 9)) { | |
1da177e4 LT |
805 | fs->req_sector += fs->scount; |
806 | if (fs->req_sector > fs->secpertrack) { | |
807 | fs->req_sector -= fs->secpertrack; | |
808 | if (++fs->head > 1) { | |
809 | fs->head = 0; | |
810 | ++fs->req_cyl; | |
811 | } | |
812 | } | |
813 | act(fs); | |
467ca759 TH |
814 | } else |
815 | fs->state = idle; | |
1da177e4 LT |
816 | } |
817 | if (fs->state == idle) | |
818 | start_request(fs); | |
819 | break; | |
820 | default: | |
b3025457 | 821 | swim3_err("Don't know what to do in state %d\n", fs->state); |
1da177e4 | 822 | } |
b3025457 | 823 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
824 | return IRQ_HANDLED; |
825 | } | |
826 | ||
827 | /* | |
7d12e780 | 828 | static void fd_dma_interrupt(int irq, void *dev_id) |
1da177e4 LT |
829 | { |
830 | } | |
831 | */ | |
832 | ||
b3025457 | 833 | /* Called under the mutex to grab exclusive access to a drive */ |
1da177e4 LT |
834 | static int grab_drive(struct floppy_state *fs, enum swim_state state, |
835 | int interruptible) | |
836 | { | |
837 | unsigned long flags; | |
838 | ||
b3025457 BH |
839 | swim3_dbg("%s", "-> grab drive\n"); |
840 | ||
841 | spin_lock_irqsave(&swim3_lock, flags); | |
842 | if (fs->state != idle && fs->state != available) { | |
1da177e4 | 843 | ++fs->wanted; |
106fd892 AB |
844 | /* this will enable irqs in order to sleep */ |
845 | if (!interruptible) | |
846 | wait_event_lock_irq(fs->wait, | |
847 | fs->state == available, | |
848 | swim3_lock); | |
849 | else if (wait_event_interruptible_lock_irq(fs->wait, | |
850 | fs->state == available, | |
851 | swim3_lock)) { | |
852 | --fs->wanted; | |
b3025457 | 853 | spin_unlock_irqrestore(&swim3_lock, flags); |
106fd892 | 854 | return -EINTR; |
1da177e4 LT |
855 | } |
856 | --fs->wanted; | |
857 | } | |
858 | fs->state = state; | |
b3025457 BH |
859 | spin_unlock_irqrestore(&swim3_lock, flags); |
860 | ||
1da177e4 LT |
861 | return 0; |
862 | } | |
863 | ||
864 | static void release_drive(struct floppy_state *fs) | |
865 | { | |
866 | unsigned long flags; | |
867 | ||
b3025457 BH |
868 | swim3_dbg("%s", "-> release drive\n"); |
869 | ||
870 | spin_lock_irqsave(&swim3_lock, flags); | |
1da177e4 LT |
871 | fs->state = idle; |
872 | start_request(fs); | |
b3025457 | 873 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
874 | } |
875 | ||
876 | static int fd_eject(struct floppy_state *fs) | |
877 | { | |
878 | int err, n; | |
879 | ||
880 | err = grab_drive(fs, ejecting, 1); | |
881 | if (err) | |
882 | return err; | |
883 | swim3_action(fs, EJECT); | |
884 | for (n = 20; n > 0; --n) { | |
885 | if (signal_pending(current)) { | |
886 | err = -EINTR; | |
887 | break; | |
888 | } | |
889 | swim3_select(fs, RELAX); | |
86e84862 | 890 | schedule_timeout_interruptible(1); |
1da177e4 LT |
891 | if (swim3_readbit(fs, DISK_IN) == 0) |
892 | break; | |
893 | } | |
894 | swim3_select(fs, RELAX); | |
895 | udelay(150); | |
896 | fs->ejected = 1; | |
897 | release_drive(fs); | |
898 | return err; | |
899 | } | |
900 | ||
901 | static struct floppy_struct floppy_type = | |
902 | { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */ | |
903 | ||
8a6cfeb6 | 904 | static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode, |
1da177e4 LT |
905 | unsigned int cmd, unsigned long param) |
906 | { | |
b4d9a442 | 907 | struct floppy_state *fs = bdev->bd_disk->private_data; |
1da177e4 LT |
908 | int err; |
909 | ||
910 | if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)) | |
911 | return -EPERM; | |
912 | ||
d58b0c39 BH |
913 | if (fs->mdev->media_bay && |
914 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
915 | return -ENXIO; |
916 | ||
917 | switch (cmd) { | |
918 | case FDEJECT: | |
919 | if (fs->ref_count != 1) | |
920 | return -EBUSY; | |
921 | err = fd_eject(fs); | |
922 | return err; | |
923 | case FDGETPRM: | |
924 | if (copy_to_user((void __user *) param, &floppy_type, | |
925 | sizeof(struct floppy_struct))) | |
926 | return -EFAULT; | |
927 | return 0; | |
928 | } | |
929 | return -ENOTTY; | |
930 | } | |
931 | ||
8a6cfeb6 AB |
932 | static int floppy_ioctl(struct block_device *bdev, fmode_t mode, |
933 | unsigned int cmd, unsigned long param) | |
934 | { | |
935 | int ret; | |
936 | ||
2a48fc0a | 937 | mutex_lock(&swim3_mutex); |
8a6cfeb6 | 938 | ret = floppy_locked_ioctl(bdev, mode, cmd, param); |
2a48fc0a | 939 | mutex_unlock(&swim3_mutex); |
8a6cfeb6 AB |
940 | |
941 | return ret; | |
942 | } | |
943 | ||
b4d9a442 | 944 | static int floppy_open(struct block_device *bdev, fmode_t mode) |
1da177e4 | 945 | { |
b4d9a442 | 946 | struct floppy_state *fs = bdev->bd_disk->private_data; |
1da177e4 LT |
947 | struct swim3 __iomem *sw = fs->swim3; |
948 | int n, err = 0; | |
949 | ||
950 | if (fs->ref_count == 0) { | |
d58b0c39 BH |
951 | if (fs->mdev->media_bay && |
952 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
953 | return -ENXIO; |
954 | out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2); | |
955 | out_8(&sw->control_bic, 0xff); | |
956 | out_8(&sw->mode, 0x95); | |
957 | udelay(10); | |
958 | out_8(&sw->intr_enable, 0); | |
959 | out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE); | |
960 | swim3_action(fs, MOTOR_ON); | |
961 | fs->write_prot = -1; | |
962 | fs->cur_cyl = -1; | |
963 | for (n = 0; n < 2 * HZ; ++n) { | |
964 | if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE)) | |
965 | break; | |
966 | if (signal_pending(current)) { | |
967 | err = -EINTR; | |
968 | break; | |
969 | } | |
970 | swim3_select(fs, RELAX); | |
86e84862 | 971 | schedule_timeout_interruptible(1); |
1da177e4 LT |
972 | } |
973 | if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0 | |
974 | || swim3_readbit(fs, DISK_IN) == 0)) | |
975 | err = -ENXIO; | |
976 | swim3_action(fs, SETMFM); | |
977 | swim3_select(fs, RELAX); | |
978 | ||
b4d9a442 | 979 | } else if (fs->ref_count == -1 || mode & FMODE_EXCL) |
1da177e4 LT |
980 | return -EBUSY; |
981 | ||
b4d9a442 AV |
982 | if (err == 0 && (mode & FMODE_NDELAY) == 0 |
983 | && (mode & (FMODE_READ|FMODE_WRITE))) { | |
984 | check_disk_change(bdev); | |
1da177e4 LT |
985 | if (fs->ejected) |
986 | err = -ENXIO; | |
987 | } | |
988 | ||
b4d9a442 | 989 | if (err == 0 && (mode & FMODE_WRITE)) { |
1da177e4 LT |
990 | if (fs->write_prot < 0) |
991 | fs->write_prot = swim3_readbit(fs, WRITE_PROT); | |
992 | if (fs->write_prot) | |
993 | err = -EROFS; | |
994 | } | |
995 | ||
996 | if (err) { | |
997 | if (fs->ref_count == 0) { | |
998 | swim3_action(fs, MOTOR_OFF); | |
999 | out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE); | |
1000 | swim3_select(fs, RELAX); | |
1001 | } | |
1002 | return err; | |
1003 | } | |
1004 | ||
b4d9a442 | 1005 | if (mode & FMODE_EXCL) |
1da177e4 LT |
1006 | fs->ref_count = -1; |
1007 | else | |
1008 | ++fs->ref_count; | |
1009 | ||
1010 | return 0; | |
1011 | } | |
1012 | ||
6e9624b8 AB |
1013 | static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode) |
1014 | { | |
1015 | int ret; | |
1016 | ||
2a48fc0a | 1017 | mutex_lock(&swim3_mutex); |
6e9624b8 | 1018 | ret = floppy_open(bdev, mode); |
2a48fc0a | 1019 | mutex_unlock(&swim3_mutex); |
6e9624b8 AB |
1020 | |
1021 | return ret; | |
1022 | } | |
1023 | ||
db2a144b | 1024 | static void floppy_release(struct gendisk *disk, fmode_t mode) |
1da177e4 | 1025 | { |
b4d9a442 | 1026 | struct floppy_state *fs = disk->private_data; |
1da177e4 | 1027 | struct swim3 __iomem *sw = fs->swim3; |
b3025457 | 1028 | |
2a48fc0a | 1029 | mutex_lock(&swim3_mutex); |
1da177e4 LT |
1030 | if (fs->ref_count > 0 && --fs->ref_count == 0) { |
1031 | swim3_action(fs, MOTOR_OFF); | |
1032 | out_8(&sw->control_bic, 0xff); | |
1033 | swim3_select(fs, RELAX); | |
1034 | } | |
2a48fc0a | 1035 | mutex_unlock(&swim3_mutex); |
1da177e4 LT |
1036 | } |
1037 | ||
4bbde777 TH |
1038 | static unsigned int floppy_check_events(struct gendisk *disk, |
1039 | unsigned int clearing) | |
1da177e4 LT |
1040 | { |
1041 | struct floppy_state *fs = disk->private_data; | |
4bbde777 | 1042 | return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0; |
1da177e4 LT |
1043 | } |
1044 | ||
1045 | static int floppy_revalidate(struct gendisk *disk) | |
1046 | { | |
1047 | struct floppy_state *fs = disk->private_data; | |
1048 | struct swim3 __iomem *sw; | |
1049 | int ret, n; | |
1050 | ||
d58b0c39 BH |
1051 | if (fs->mdev->media_bay && |
1052 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
1053 | return -ENXIO; |
1054 | ||
1055 | sw = fs->swim3; | |
1056 | grab_drive(fs, revalidating, 0); | |
1057 | out_8(&sw->intr_enable, 0); | |
1058 | out_8(&sw->control_bis, DRIVE_ENABLE); | |
1059 | swim3_action(fs, MOTOR_ON); /* necessary? */ | |
1060 | fs->write_prot = -1; | |
1061 | fs->cur_cyl = -1; | |
1062 | mdelay(1); | |
1063 | for (n = HZ; n > 0; --n) { | |
1064 | if (swim3_readbit(fs, SEEK_COMPLETE)) | |
1065 | break; | |
1066 | if (signal_pending(current)) | |
1067 | break; | |
1068 | swim3_select(fs, RELAX); | |
86e84862 | 1069 | schedule_timeout_interruptible(1); |
1da177e4 LT |
1070 | } |
1071 | ret = swim3_readbit(fs, SEEK_COMPLETE) == 0 | |
1072 | || swim3_readbit(fs, DISK_IN) == 0; | |
1073 | if (ret) | |
1074 | swim3_action(fs, MOTOR_OFF); | |
1075 | else { | |
1076 | fs->ejected = 0; | |
1077 | swim3_action(fs, SETMFM); | |
1078 | } | |
1079 | swim3_select(fs, RELAX); | |
1080 | ||
1081 | release_drive(fs); | |
1082 | return ret; | |
1083 | } | |
1084 | ||
83d5cde4 | 1085 | static const struct block_device_operations floppy_fops = { |
6e9624b8 | 1086 | .open = floppy_unlocked_open, |
b4d9a442 | 1087 | .release = floppy_release, |
8a6cfeb6 | 1088 | .ioctl = floppy_ioctl, |
4bbde777 | 1089 | .check_events = floppy_check_events, |
1da177e4 LT |
1090 | .revalidate_disk= floppy_revalidate, |
1091 | }; | |
1092 | ||
b3025457 BH |
1093 | static void swim3_mb_event(struct macio_dev* mdev, int mb_state) |
1094 | { | |
1095 | struct floppy_state *fs = macio_get_drvdata(mdev); | |
7414d4f6 | 1096 | struct swim3 __iomem *sw; |
b3025457 BH |
1097 | |
1098 | if (!fs) | |
1099 | return; | |
7414d4f6 CD |
1100 | |
1101 | sw = fs->swim3; | |
1102 | ||
b3025457 BH |
1103 | if (mb_state != MB_FD) |
1104 | return; | |
1105 | ||
1106 | /* Clear state */ | |
1107 | out_8(&sw->intr_enable, 0); | |
1108 | in_8(&sw->intr); | |
1109 | in_8(&sw->error); | |
1110 | } | |
1111 | ||
3e9a6927 | 1112 | static int swim3_add_device(struct macio_dev *mdev, int index) |
1da177e4 | 1113 | { |
61c7a080 | 1114 | struct device_node *swim = mdev->ofdev.dev.of_node; |
3e9a6927 BH |
1115 | struct floppy_state *fs = &floppy_states[index]; |
1116 | int rc = -EBUSY; | |
1da177e4 | 1117 | |
b3025457 BH |
1118 | /* Do this first for message macros */ |
1119 | memset(fs, 0, sizeof(*fs)); | |
1120 | fs->mdev = mdev; | |
1121 | fs->index = index; | |
1122 | ||
3e9a6927 BH |
1123 | /* Check & Request resources */ |
1124 | if (macio_resource_count(mdev) < 2) { | |
b3025457 | 1125 | swim3_err("%s", "No address in device-tree\n"); |
3e9a6927 | 1126 | return -ENXIO; |
1da177e4 | 1127 | } |
b3025457 BH |
1128 | if (macio_irq_count(mdev) < 1) { |
1129 | swim3_err("%s", "No interrupt in device-tree\n"); | |
1130 | return -ENXIO; | |
cc5d0189 | 1131 | } |
3e9a6927 | 1132 | if (macio_request_resource(mdev, 0, "swim3 (mmio)")) { |
b3025457 | 1133 | swim3_err("%s", "Can't request mmio resource\n"); |
3e9a6927 | 1134 | return -EBUSY; |
1da177e4 | 1135 | } |
3e9a6927 | 1136 | if (macio_request_resource(mdev, 1, "swim3 (dma)")) { |
b3025457 | 1137 | swim3_err("%s", "Can't request dma resource\n"); |
3e9a6927 BH |
1138 | macio_release_resource(mdev, 0); |
1139 | return -EBUSY; | |
1da177e4 | 1140 | } |
3e9a6927 | 1141 | dev_set_drvdata(&mdev->ofdev.dev, fs); |
1da177e4 | 1142 | |
d58b0c39 | 1143 | if (mdev->media_bay == NULL) |
1da177e4 LT |
1144 | pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1); |
1145 | ||
1da177e4 | 1146 | fs->state = idle; |
3e9a6927 BH |
1147 | fs->swim3 = (struct swim3 __iomem *) |
1148 | ioremap(macio_resource_start(mdev, 0), 0x200); | |
1149 | if (fs->swim3 == NULL) { | |
b3025457 | 1150 | swim3_err("%s", "Couldn't map mmio registers\n"); |
3e9a6927 BH |
1151 | rc = -ENOMEM; |
1152 | goto out_release; | |
1153 | } | |
1154 | fs->dma = (struct dbdma_regs __iomem *) | |
1155 | ioremap(macio_resource_start(mdev, 1), 0x200); | |
1156 | if (fs->dma == NULL) { | |
b3025457 | 1157 | swim3_err("%s", "Couldn't map dma registers\n"); |
3e9a6927 BH |
1158 | iounmap(fs->swim3); |
1159 | rc = -ENOMEM; | |
1160 | goto out_release; | |
1161 | } | |
1162 | fs->swim3_intr = macio_irq(mdev, 0); | |
a419aef8 | 1163 | fs->dma_intr = macio_irq(mdev, 1); |
1da177e4 LT |
1164 | fs->cur_cyl = -1; |
1165 | fs->cur_sector = -1; | |
1166 | fs->secpercyl = 36; | |
1167 | fs->secpertrack = 18; | |
1168 | fs->total_secs = 2880; | |
1da177e4 LT |
1169 | init_waitqueue_head(&fs->wait); |
1170 | ||
1171 | fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space); | |
1172 | memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd)); | |
f5718726 | 1173 | fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP); |
1da177e4 | 1174 | |
b3025457 BH |
1175 | if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD) |
1176 | swim3_mb_event(mdev, MB_FD); | |
1177 | ||
1da177e4 | 1178 | if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) { |
b3025457 | 1179 | swim3_err("%s", "Couldn't request interrupt\n"); |
1da177e4 | 1180 | pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0); |
3e9a6927 | 1181 | goto out_unmap; |
1da177e4 LT |
1182 | return -EBUSY; |
1183 | } | |
1da177e4 LT |
1184 | |
1185 | init_timer(&fs->timeout); | |
1186 | ||
b3025457 | 1187 | swim3_info("SWIM3 floppy controller %s\n", |
d58b0c39 | 1188 | mdev->media_bay ? "in media bay" : ""); |
1da177e4 | 1189 | |
3e9a6927 BH |
1190 | return 0; |
1191 | ||
1192 | out_unmap: | |
1193 | iounmap(fs->dma); | |
1194 | iounmap(fs->swim3); | |
1195 | ||
1196 | out_release: | |
1197 | macio_release_resource(mdev, 0); | |
1198 | macio_release_resource(mdev, 1); | |
1199 | ||
1200 | return rc; | |
1201 | } | |
1202 | ||
8d85fce7 GKH |
1203 | static int swim3_attach(struct macio_dev *mdev, |
1204 | const struct of_device_id *match) | |
3e9a6927 | 1205 | { |
3e9a6927 | 1206 | struct gendisk *disk; |
b3025457 BH |
1207 | int index, rc; |
1208 | ||
1209 | index = floppy_count++; | |
1210 | if (index >= MAX_FLOPPIES) | |
1211 | return -ENXIO; | |
3e9a6927 BH |
1212 | |
1213 | /* Add the drive */ | |
b3025457 | 1214 | rc = swim3_add_device(mdev, index); |
3e9a6927 BH |
1215 | if (rc) |
1216 | return rc; | |
b3025457 BH |
1217 | /* Now register that disk. Same comment about failure handling */ |
1218 | disk = disks[index] = alloc_disk(1); | |
1219 | if (disk == NULL) | |
1220 | return -ENOMEM; | |
1221 | disk->queue = blk_init_queue(do_fd_request, &swim3_lock); | |
1222 | if (disk->queue == NULL) { | |
1223 | put_disk(disk); | |
1224 | return -ENOMEM; | |
1225 | } | |
1226 | disk->queue->queuedata = &floppy_states[index]; | |
3e9a6927 | 1227 | |
b3025457 | 1228 | if (index == 0) { |
3e9a6927 BH |
1229 | /* If we failed, there isn't much we can do as the driver is still |
1230 | * too dumb to remove the device, just bail out | |
1231 | */ | |
1232 | if (register_blkdev(FLOPPY_MAJOR, "fd")) | |
1233 | return 0; | |
3e9a6927 BH |
1234 | } |
1235 | ||
3e9a6927 | 1236 | disk->major = FLOPPY_MAJOR; |
b3025457 | 1237 | disk->first_minor = index; |
3e9a6927 | 1238 | disk->fops = &floppy_fops; |
b3025457 | 1239 | disk->private_data = &floppy_states[index]; |
3e9a6927 | 1240 | disk->flags |= GENHD_FL_REMOVABLE; |
b3025457 | 1241 | sprintf(disk->disk_name, "fd%d", index); |
3e9a6927 BH |
1242 | set_capacity(disk, 2880); |
1243 | add_disk(disk); | |
1244 | ||
1245 | return 0; | |
1246 | } | |
1247 | ||
1248 | static struct of_device_id swim3_match[] = | |
1249 | { | |
1250 | { | |
1251 | .name = "swim3", | |
1252 | }, | |
1253 | { | |
1254 | .compatible = "ohare-swim3" | |
1255 | }, | |
1256 | { | |
1257 | .compatible = "swim3" | |
1258 | }, | |
f41c53a5 | 1259 | { /* end of list */ } |
3e9a6927 BH |
1260 | }; |
1261 | ||
1262 | static struct macio_driver swim3_driver = | |
1263 | { | |
c2cdf6ab BH |
1264 | .driver = { |
1265 | .name = "swim3", | |
1266 | .of_match_table = swim3_match, | |
1267 | }, | |
3e9a6927 | 1268 | .probe = swim3_attach, |
b3025457 BH |
1269 | #ifdef CONFIG_PMAC_MEDIABAY |
1270 | .mediabay_event = swim3_mb_event, | |
1271 | #endif | |
3e9a6927 BH |
1272 | #if 0 |
1273 | .suspend = swim3_suspend, | |
1274 | .resume = swim3_resume, | |
1275 | #endif | |
1276 | }; | |
1277 | ||
1278 | ||
1279 | int swim3_init(void) | |
1280 | { | |
1281 | macio_register_driver(&swim3_driver); | |
1da177e4 LT |
1282 | return 0; |
1283 | } | |
1284 | ||
1285 | module_init(swim3_init) | |
1286 | ||
1287 | MODULE_LICENSE("GPL"); | |
1288 | MODULE_AUTHOR("Paul Mackerras"); | |
1289 | MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR); |