Commit | Line | Data |
---|---|---|
44127b77 FF |
1 | /* |
2 | * Copyright (C) 2014 Broadcom Corporation | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
14 | #include <linux/init.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/sysfs.h> | |
20 | #include <linux/io.h> | |
21 | #include <linux/string.h> | |
22 | #include <linux/device.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/of.h> | |
25 | #include <linux/bitops.h> | |
203bb85e | 26 | #include <linux/pm.h> |
44127b77 | 27 | |
dd1d78a1 | 28 | #ifdef CONFIG_ARM |
44127b77 FF |
29 | #include <asm/bug.h> |
30 | #include <asm/signal.h> | |
dd1d78a1 | 31 | #endif |
44127b77 | 32 | |
c400d5eb FF |
33 | #ifdef CONFIG_MIPS |
34 | #include <asm/traps.h> | |
35 | #endif | |
36 | ||
44127b77 | 37 | #define ARB_ERR_CAP_CLEAR (1 << 0) |
44127b77 FF |
38 | #define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12) |
39 | #define ARB_ERR_CAP_STATUS_TEA (1 << 11) | |
40 | #define ARB_ERR_CAP_STATUS_BS_SHIFT (1 << 2) | |
41 | #define ARB_ERR_CAP_STATUS_BS_MASK 0x3c | |
42 | #define ARB_ERR_CAP_STATUS_WRITE (1 << 1) | |
43 | #define ARB_ERR_CAP_STATUS_VALID (1 << 0) | |
f8083587 KC |
44 | |
45 | enum { | |
46 | ARB_TIMER, | |
47 | ARB_ERR_CAP_CLR, | |
48 | ARB_ERR_CAP_HI_ADDR, | |
49 | ARB_ERR_CAP_ADDR, | |
50 | ARB_ERR_CAP_DATA, | |
51 | ARB_ERR_CAP_STATUS, | |
52 | ARB_ERR_CAP_MASTER, | |
53 | }; | |
54 | ||
d1d67868 KC |
55 | static const int gisb_offsets_bcm7038[] = { |
56 | [ARB_TIMER] = 0x00c, | |
57 | [ARB_ERR_CAP_CLR] = 0x0c4, | |
58 | [ARB_ERR_CAP_HI_ADDR] = -1, | |
59 | [ARB_ERR_CAP_ADDR] = 0x0c8, | |
60 | [ARB_ERR_CAP_DATA] = 0x0cc, | |
61 | [ARB_ERR_CAP_STATUS] = 0x0d0, | |
62 | [ARB_ERR_CAP_MASTER] = -1, | |
63 | }; | |
64 | ||
65 | static const int gisb_offsets_bcm7400[] = { | |
66 | [ARB_TIMER] = 0x00c, | |
67 | [ARB_ERR_CAP_CLR] = 0x0c8, | |
68 | [ARB_ERR_CAP_HI_ADDR] = -1, | |
69 | [ARB_ERR_CAP_ADDR] = 0x0cc, | |
70 | [ARB_ERR_CAP_DATA] = 0x0d0, | |
71 | [ARB_ERR_CAP_STATUS] = 0x0d4, | |
72 | [ARB_ERR_CAP_MASTER] = 0x0d8, | |
73 | }; | |
74 | ||
75 | static const int gisb_offsets_bcm7435[] = { | |
76 | [ARB_TIMER] = 0x00c, | |
77 | [ARB_ERR_CAP_CLR] = 0x168, | |
78 | [ARB_ERR_CAP_HI_ADDR] = -1, | |
79 | [ARB_ERR_CAP_ADDR] = 0x16c, | |
80 | [ARB_ERR_CAP_DATA] = 0x170, | |
81 | [ARB_ERR_CAP_STATUS] = 0x174, | |
82 | [ARB_ERR_CAP_MASTER] = 0x178, | |
83 | }; | |
84 | ||
f8083587 KC |
85 | static const int gisb_offsets_bcm7445[] = { |
86 | [ARB_TIMER] = 0x008, | |
87 | [ARB_ERR_CAP_CLR] = 0x7e4, | |
88 | [ARB_ERR_CAP_HI_ADDR] = 0x7e8, | |
89 | [ARB_ERR_CAP_ADDR] = 0x7ec, | |
90 | [ARB_ERR_CAP_DATA] = 0x7f0, | |
91 | [ARB_ERR_CAP_STATUS] = 0x7f4, | |
92 | [ARB_ERR_CAP_MASTER] = 0x7f8, | |
93 | }; | |
44127b77 FF |
94 | |
95 | struct brcmstb_gisb_arb_device { | |
96 | void __iomem *base; | |
f8083587 | 97 | const int *gisb_offsets; |
fbf4e262 | 98 | bool big_endian; |
44127b77 FF |
99 | struct mutex lock; |
100 | struct list_head next; | |
101 | u32 valid_mask; | |
102 | const char *master_names[sizeof(u32) * BITS_PER_BYTE]; | |
203bb85e | 103 | u32 saved_timeout; |
44127b77 FF |
104 | }; |
105 | ||
106 | static LIST_HEAD(brcmstb_gisb_arb_device_list); | |
107 | ||
2b53eadc KC |
108 | static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg) |
109 | { | |
f8083587 KC |
110 | int offset = gdev->gisb_offsets[reg]; |
111 | ||
112 | /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */ | |
113 | if (offset == -1) | |
114 | return 1; | |
115 | ||
fbf4e262 KC |
116 | if (gdev->big_endian) |
117 | return ioread32be(gdev->base + offset); | |
118 | else | |
119 | return ioread32(gdev->base + offset); | |
2b53eadc KC |
120 | } |
121 | ||
122 | static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) | |
123 | { | |
f8083587 KC |
124 | int offset = gdev->gisb_offsets[reg]; |
125 | ||
126 | if (offset == -1) | |
127 | return; | |
fbf4e262 KC |
128 | |
129 | if (gdev->big_endian) | |
130 | iowrite32be(val, gdev->base + reg); | |
131 | else | |
132 | iowrite32(val, gdev->base + reg); | |
2b53eadc KC |
133 | } |
134 | ||
44127b77 FF |
135 | static ssize_t gisb_arb_get_timeout(struct device *dev, |
136 | struct device_attribute *attr, | |
137 | char *buf) | |
138 | { | |
139 | struct platform_device *pdev = to_platform_device(dev); | |
140 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); | |
141 | u32 timeout; | |
142 | ||
143 | mutex_lock(&gdev->lock); | |
2b53eadc | 144 | timeout = gisb_read(gdev, ARB_TIMER); |
44127b77 FF |
145 | mutex_unlock(&gdev->lock); |
146 | ||
147 | return sprintf(buf, "%d", timeout); | |
148 | } | |
149 | ||
150 | static ssize_t gisb_arb_set_timeout(struct device *dev, | |
151 | struct device_attribute *attr, | |
152 | const char *buf, size_t count) | |
153 | { | |
154 | struct platform_device *pdev = to_platform_device(dev); | |
155 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); | |
156 | int val, ret; | |
157 | ||
158 | ret = kstrtoint(buf, 10, &val); | |
159 | if (ret < 0) | |
160 | return ret; | |
161 | ||
162 | if (val == 0 || val >= 0xffffffff) | |
163 | return -EINVAL; | |
164 | ||
165 | mutex_lock(&gdev->lock); | |
2b53eadc | 166 | gisb_write(gdev, val, ARB_TIMER); |
44127b77 FF |
167 | mutex_unlock(&gdev->lock); |
168 | ||
169 | return count; | |
170 | } | |
171 | ||
172 | static const char * | |
173 | brcmstb_gisb_master_to_str(struct brcmstb_gisb_arb_device *gdev, | |
174 | u32 masters) | |
175 | { | |
176 | u32 mask = gdev->valid_mask & masters; | |
177 | ||
178 | if (hweight_long(mask) != 1) | |
179 | return NULL; | |
180 | ||
181 | return gdev->master_names[ffs(mask) - 1]; | |
182 | } | |
183 | ||
184 | static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev, | |
185 | const char *reason) | |
186 | { | |
187 | u32 cap_status; | |
188 | unsigned long arb_addr; | |
189 | u32 master; | |
190 | const char *m_name; | |
191 | char m_fmt[11]; | |
192 | ||
2b53eadc | 193 | cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS); |
44127b77 FF |
194 | |
195 | /* Invalid captured address, bail out */ | |
196 | if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) | |
197 | return 1; | |
198 | ||
199 | /* Read the address and master */ | |
2b53eadc | 200 | arb_addr = gisb_read(gdev, ARB_ERR_CAP_ADDR) & 0xffffffff; |
44127b77 | 201 | #if (IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT)) |
2b53eadc | 202 | arb_addr |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32; |
44127b77 | 203 | #endif |
2b53eadc | 204 | master = gisb_read(gdev, ARB_ERR_CAP_MASTER); |
44127b77 FF |
205 | |
206 | m_name = brcmstb_gisb_master_to_str(gdev, master); | |
207 | if (!m_name) { | |
208 | snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master); | |
209 | m_name = m_fmt; | |
210 | } | |
211 | ||
212 | pr_crit("%s: %s at 0x%lx [%c %s], core: %s\n", | |
213 | __func__, reason, arb_addr, | |
214 | cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R', | |
215 | cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "", | |
216 | m_name); | |
217 | ||
218 | /* clear the GISB error */ | |
2b53eadc | 219 | gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR); |
44127b77 FF |
220 | |
221 | return 0; | |
222 | } | |
223 | ||
dd1d78a1 | 224 | #ifdef CONFIG_ARM |
44127b77 FF |
225 | static int brcmstb_bus_error_handler(unsigned long addr, unsigned int fsr, |
226 | struct pt_regs *regs) | |
227 | { | |
228 | int ret = 0; | |
229 | struct brcmstb_gisb_arb_device *gdev; | |
230 | ||
231 | /* iterate over each GISB arb registered handlers */ | |
232 | list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) | |
233 | ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error"); | |
234 | /* | |
235 | * If it was an imprecise abort, then we need to correct the | |
236 | * return address to be _after_ the instruction. | |
237 | */ | |
238 | if (fsr & (1 << 10)) | |
239 | regs->ARM_pc += 4; | |
240 | ||
241 | return ret; | |
242 | } | |
dd1d78a1 | 243 | #endif |
44127b77 | 244 | |
c400d5eb FF |
245 | #ifdef CONFIG_MIPS |
246 | static int brcmstb_bus_error_handler(struct pt_regs *regs, int is_fixup) | |
247 | { | |
248 | int ret = 0; | |
249 | struct brcmstb_gisb_arb_device *gdev; | |
250 | u32 cap_status; | |
251 | ||
252 | list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) { | |
253 | cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS); | |
254 | ||
255 | /* Invalid captured address, bail out */ | |
256 | if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) { | |
257 | is_fixup = 1; | |
258 | goto out; | |
259 | } | |
260 | ||
261 | ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error"); | |
262 | } | |
263 | out: | |
264 | return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL; | |
265 | } | |
266 | #endif | |
267 | ||
44127b77 FF |
268 | static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id) |
269 | { | |
270 | brcmstb_gisb_arb_decode_addr(dev_id, "timeout"); | |
271 | ||
272 | return IRQ_HANDLED; | |
273 | } | |
274 | ||
275 | static irqreturn_t brcmstb_gisb_tea_handler(int irq, void *dev_id) | |
276 | { | |
277 | brcmstb_gisb_arb_decode_addr(dev_id, "target abort"); | |
278 | ||
279 | return IRQ_HANDLED; | |
280 | } | |
281 | ||
282 | static DEVICE_ATTR(gisb_arb_timeout, S_IWUSR | S_IRUGO, | |
283 | gisb_arb_get_timeout, gisb_arb_set_timeout); | |
284 | ||
285 | static struct attribute *gisb_arb_sysfs_attrs[] = { | |
286 | &dev_attr_gisb_arb_timeout.attr, | |
287 | NULL, | |
288 | }; | |
289 | ||
290 | static struct attribute_group gisb_arb_sysfs_attr_group = { | |
291 | .attrs = gisb_arb_sysfs_attrs, | |
292 | }; | |
293 | ||
d1d67868 KC |
294 | static const struct of_device_id brcmstb_gisb_arb_of_match[] = { |
295 | { .compatible = "brcm,gisb-arb", .data = gisb_offsets_bcm7445 }, | |
296 | { .compatible = "brcm,bcm7445-gisb-arb", .data = gisb_offsets_bcm7445 }, | |
297 | { .compatible = "brcm,bcm7435-gisb-arb", .data = gisb_offsets_bcm7435 }, | |
298 | { .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 }, | |
299 | { .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 }, | |
300 | { }, | |
301 | }; | |
302 | ||
2e8a29a1 | 303 | static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) |
44127b77 FF |
304 | { |
305 | struct device_node *dn = pdev->dev.of_node; | |
306 | struct brcmstb_gisb_arb_device *gdev; | |
d1d67868 | 307 | const struct of_device_id *of_id; |
44127b77 FF |
308 | struct resource *r; |
309 | int err, timeout_irq, tea_irq; | |
310 | unsigned int num_masters, j = 0; | |
311 | int i, first, last; | |
312 | ||
313 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
314 | timeout_irq = platform_get_irq(pdev, 0); | |
315 | tea_irq = platform_get_irq(pdev, 1); | |
316 | ||
317 | gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL); | |
318 | if (!gdev) | |
319 | return -ENOMEM; | |
320 | ||
321 | mutex_init(&gdev->lock); | |
322 | INIT_LIST_HEAD(&gdev->next); | |
323 | ||
c9d53c0f JH |
324 | gdev->base = devm_ioremap_resource(&pdev->dev, r); |
325 | if (IS_ERR(gdev->base)) | |
326 | return PTR_ERR(gdev->base); | |
44127b77 | 327 | |
d1d67868 KC |
328 | of_id = of_match_node(brcmstb_gisb_arb_of_match, dn); |
329 | if (!of_id) { | |
330 | pr_err("failed to look up compatible string\n"); | |
331 | return -EINVAL; | |
332 | } | |
333 | gdev->gisb_offsets = of_id->data; | |
fbf4e262 | 334 | gdev->big_endian = of_device_is_big_endian(dn); |
f8083587 | 335 | |
44127b77 FF |
336 | err = devm_request_irq(&pdev->dev, timeout_irq, |
337 | brcmstb_gisb_timeout_handler, 0, pdev->name, | |
338 | gdev); | |
339 | if (err < 0) | |
340 | return err; | |
341 | ||
342 | err = devm_request_irq(&pdev->dev, tea_irq, | |
343 | brcmstb_gisb_tea_handler, 0, pdev->name, | |
344 | gdev); | |
345 | if (err < 0) | |
346 | return err; | |
347 | ||
348 | /* If we do not have a valid mask, assume all masters are enabled */ | |
349 | if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask", | |
350 | &gdev->valid_mask)) | |
351 | gdev->valid_mask = 0xffffffff; | |
352 | ||
353 | /* Proceed with reading the litteral names if we agree on the | |
354 | * number of masters | |
355 | */ | |
356 | num_masters = of_property_count_strings(dn, | |
357 | "brcm,gisb-arb-master-names"); | |
358 | if (hweight_long(gdev->valid_mask) == num_masters) { | |
359 | first = ffs(gdev->valid_mask) - 1; | |
360 | last = fls(gdev->valid_mask) - 1; | |
361 | ||
362 | for (i = first; i < last; i++) { | |
363 | if (!(gdev->valid_mask & BIT(i))) | |
364 | continue; | |
365 | ||
366 | of_property_read_string_index(dn, | |
367 | "brcm,gisb-arb-master-names", j, | |
368 | &gdev->master_names[i]); | |
369 | j++; | |
370 | } | |
371 | } | |
372 | ||
373 | err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group); | |
374 | if (err) | |
375 | return err; | |
376 | ||
377 | platform_set_drvdata(pdev, gdev); | |
378 | ||
379 | list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list); | |
380 | ||
71354661 | 381 | #ifdef CONFIG_ARM |
f1bee783 FF |
382 | hook_fault_code(22, brcmstb_bus_error_handler, SIGBUS, 0, |
383 | "imprecise external abort"); | |
71354661 | 384 | #endif |
c400d5eb FF |
385 | #ifdef CONFIG_MIPS |
386 | board_be_handler = brcmstb_bus_error_handler; | |
387 | #endif | |
f1bee783 | 388 | |
44127b77 FF |
389 | dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n", |
390 | gdev->base, timeout_irq, tea_irq); | |
391 | ||
392 | return 0; | |
393 | } | |
394 | ||
203bb85e FF |
395 | #ifdef CONFIG_PM_SLEEP |
396 | static int brcmstb_gisb_arb_suspend(struct device *dev) | |
397 | { | |
398 | struct platform_device *pdev = to_platform_device(dev); | |
399 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); | |
400 | ||
71354661 | 401 | gdev->saved_timeout = gisb_read(gdev, ARB_TIMER); |
203bb85e FF |
402 | |
403 | return 0; | |
404 | } | |
405 | ||
406 | /* Make sure we provide the same timeout value that was configured before, and | |
407 | * do this before the GISB timeout interrupt handler has any chance to run. | |
408 | */ | |
409 | static int brcmstb_gisb_arb_resume_noirq(struct device *dev) | |
410 | { | |
411 | struct platform_device *pdev = to_platform_device(dev); | |
412 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); | |
413 | ||
71354661 | 414 | gisb_write(gdev, gdev->saved_timeout, ARB_TIMER); |
203bb85e FF |
415 | |
416 | return 0; | |
417 | } | |
418 | #else | |
419 | #define brcmstb_gisb_arb_suspend NULL | |
420 | #define brcmstb_gisb_arb_resume_noirq NULL | |
421 | #endif | |
422 | ||
423 | static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = { | |
424 | .suspend = brcmstb_gisb_arb_suspend, | |
425 | .resume_noirq = brcmstb_gisb_arb_resume_noirq, | |
426 | }; | |
427 | ||
44127b77 | 428 | static struct platform_driver brcmstb_gisb_arb_driver = { |
44127b77 FF |
429 | .driver = { |
430 | .name = "brcm-gisb-arb", | |
44127b77 | 431 | .of_match_table = brcmstb_gisb_arb_of_match, |
203bb85e | 432 | .pm = &brcmstb_gisb_arb_pm_ops, |
44127b77 FF |
433 | }, |
434 | }; | |
435 | ||
436 | static int __init brcm_gisb_driver_init(void) | |
437 | { | |
2e8a29a1 FF |
438 | return platform_driver_probe(&brcmstb_gisb_arb_driver, |
439 | brcmstb_gisb_arb_probe); | |
44127b77 FF |
440 | } |
441 | ||
442 | module_init(brcm_gisb_driver_init); |